Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1 | +---------------------------------------------------------------------+ |
| 2 | | Log file: mau.log | |
| 3 | | Compiler version: 5.1.0 (fca32d1) | |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 4 | | Created on: Wed Sep 13 01:00:26 2017 | |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 5 | +---------------------------------------------------------------------+ |
| 6 | |
| 7 | Match Table table0 did not specify the number of entries required. A default value (512) will be used. |
| 8 | Match Table ecmp_group_table did not specify the number of entries required. A default value (1024) will be used. |
| 9 | Match Entry Table table0 has already been associated with stat Table table0_counter. |
| 10 | Match Entry Table ecmp_group_table has already been associated with stat Table ecmp_group_table_counter. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 11 | Cannot implement table0 in phase 0 resources because table uses side effect tables. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 12 | Match Table table0 did not specify the number of entries required. A default value (512) will be used. |
| 13 | Match Table ecmp_group_table did not specify the number of entries required. A default value (1024) will be used. |
| 14 | Match Entry Table table0 has already been associated with stat Table table0_counter. |
| 15 | Match Entry Table ecmp_group_table has already been associated with stat Table ecmp_group_table_counter. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 16 | Cannot implement table0 in phase 0 resources because table uses side effect tables. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 17 | Match Table table0 did not specify the number of entries required. A default value (512) will be used. |
| 18 | Match Table ecmp_group_table did not specify the number of entries required. A default value (1024) will be used. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 19 | POV/metadata bridge containers added between ingress/egress: [0] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 20 | Metadata bridge_ingress_intrinsic containers added between ingress/egress: [128] |
| 21 | Match Entry Table table0 has already been associated with stat Table table0_counter. |
| 22 | Match Entry Table ecmp_group_table has already been associated with stat Table ecmp_group_table_counter. |
| 23 | Match table ingress_port_count_table has no match key fields |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 24 | Match table egress_port_count_table has no match key fields |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 25 | |
| 26 | ########################################## |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 27 | Call to decide_action_data_placement(stage=0, table=process_packet_out_table) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 28 | ########################################## |
| 29 | |
| 30 | |
| 31 | Max immediate bits used in any action is 0 bits. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 32 | Overhead bit width for table process_packet_out_table is 0 bits. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 33 | Bits available in overhead for non-essential immediate data is 32 bits. |
| 34 | ~~~~~~~~~~~~~~~~~~~~~ |
| 35 | Examining placing 0 bits in match overhead |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 36 | Overhead bit width for table process_packet_out_table is 0 bits. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 37 | Overhead SRAMs to use = 97 |
| 38 | Entries requested = 1024 and match entries get = 0 |
| 39 | ram_size_matrix = |
| 40 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 41 | 0 0 0 0 0 0 0 0 # 0 |
| 42 | |
| 43 | immediate_size_matrix = |
| 44 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 45 | 0 0 0 0 0 0 0 0 # 0 |
| 46 | |
| 47 | hash_to_phv_matrix = |
| 48 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 49 | 0 0 0 0 0 0 0 0 # 0 |
| 50 | |
| 51 | total action ram packing size = [0, 0, 0] |
| 52 | action_ram_packing: |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 53 | action _process_packet_out has [] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 54 | total action ram packing size = [0, 0, 0] |
| 55 | action_ram_packing: |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 56 | action _process_packet_out has [] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 57 | total action ram packing size = [0, 0, 0] |
| 58 | action_ram_packing: |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 59 | action _process_packet_out has [] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 60 | byte_enables = [] |
| 61 | After allocation of 32s, available_slots is [] |
| 62 | final packing is [] |
| 63 | byte_enables = [] |
| 64 | After allocation of 32s, available_slots is [] |
| 65 | final packing is [] |
| 66 | byte_enables = [] |
| 67 | After allocation of 32s, available_slots is [] |
| 68 | final packing is [] |
| 69 | Action Data SRAMs to use = 0 |
| 70 | TODO: Total RAMs use when put 0 bits in match overhead: 97 |
| 71 | TODO: Total RAMs use when put 0 bits in match overhead: 97 |
| 72 | ~~~~~~~~~~~~~~~~~~~~~ |
| 73 | Examining placing 8 bits in match overhead |
| 74 | ~~~~~~~~~~~~~~~~~~~~~ |
| 75 | Examining placing 16 bits in match overhead |
| 76 | ~~~~~~~~~~~~~~~~~~~~~ |
| 77 | Examining placing 24 bits in match overhead |
| 78 | ~~~~~~~~~~~~~~~~~~~~~ |
| 79 | Examining placing 32 bits in match overhead |
| 80 | |
| 81 | ########################################## |
| 82 | |
| 83 | Best Ram Usage is 97 rams |
| 84 | Best Immediate placement is 0 bits |
| 85 | Cannot use hash-action for table ecmp_group_table because it has more than one side-effect table |
| 86 | |
| 87 | ########################################## |
| 88 | Call to decide_action_data_placement(stage=0, table=ecmp_group_table) |
| 89 | ########################################## |
| 90 | |
| 91 | |
| 92 | Max immediate bits used in any action is 0 bits. |
| 93 | Overhead bit width for table ecmp_group_table is 0 bits. |
| 94 | Bits available in overhead for non-essential immediate data is 32 bits. |
| 95 | ~~~~~~~~~~~~~~~~~~~~~ |
| 96 | Examining placing 0 bits in match overhead |
| 97 | Overhead bit width for table ecmp_group_table is 0 bits. |
| 98 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 99 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 100 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[7:0]}. |
| 101 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[15:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 102 | |
| 103 | --------------------------------------------- |
| 104 | Call to can_any_match_key_fields_be_shared(stage=0, table=ecmp_group_table) |
| 105 | --------------------------------------------- |
| 106 | Decided way to allocate for table ecmp_group_table in stage 0 WAS non_shared |
| 107 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 108 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 109 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[7:0]}. |
| 110 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[15:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 111 | Overhead SRAMs to use = 3 |
| 112 | Entries requested = 1024 and match entries get = 3072 |
| 113 | ram_size_matrix = |
| 114 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 115 | 0 0 0 1 0 0 0 0 # 0 |
| 116 | |
| 117 | immediate_size_matrix = |
| 118 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 119 | 0 0 0 0 0 0 0 0 # 0 |
| 120 | |
| 121 | hash_to_phv_matrix = |
| 122 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 123 | 0 0 0 0 0 0 0 0 # 0 |
| 124 | |
| 125 | total action ram packing size = [16, 0, 0] |
| 126 | action_ram_packing: |
| 127 | action set_egress_port has [(16, 16, False)] |
| 128 | total action ram packing size = [16, 0, 0] |
| 129 | action_ram_packing: |
| 130 | action set_egress_port has [] |
| 131 | total action ram packing size = [16, 0, 0] |
| 132 | action_ram_packing: |
| 133 | action set_egress_port has [] |
| 134 | byte_enables = [1, 1] |
| 135 | Allocating Action Parameter Bus Byte 32 in stage 0 for Byte 0 of 16-bit constant |
| 136 | Allocating Action Parameter Bus Byte 33 in stage 0 for Byte 1 of 16-bit constant |
| 137 | Allocating Action Parameter Bus Byte 34 in stage 0 for Byte 0 of 16-bit constant |
| 138 | Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant |
| 139 | After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)] |
| 140 | final packing is [(16, 16, False)] |
| 141 | byte_enables = [] |
| 142 | After allocation of 32s, available_slots is [] |
| 143 | final packing is [] |
| 144 | byte_enables = [] |
| 145 | After allocation of 32s, available_slots is [] |
| 146 | final packing is [] |
| 147 | Action Data SRAMs to use = 1 |
| 148 | TODO: Total RAMs use when put 0 bits in match overhead: 4 |
| 149 | TODO: Total RAMs use when put 0 bits in match overhead: 4 |
| 150 | ~~~~~~~~~~~~~~~~~~~~~ |
| 151 | Examining placing 8 bits in match overhead |
| 152 | ~~~~~~~~~~~~~~~~~~~~~ |
| 153 | Examining placing 16 bits in match overhead |
| 154 | Overhead bit width for table ecmp_group_table is 0 bits. |
| 155 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 156 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 157 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[7:0]}. |
| 158 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[15:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 159 | |
| 160 | --------------------------------------------- |
| 161 | Call to can_any_match_key_fields_be_shared(stage=0, table=ecmp_group_table) |
| 162 | --------------------------------------------- |
| 163 | Decided way to allocate for table ecmp_group_table in stage 0 WAS non_shared |
| 164 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 165 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 166 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[7:0]}. |
| 167 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[15:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 168 | Overhead SRAMs to use = 3 |
| 169 | Entries requested = 1024 and match entries get = 3072 |
| 170 | ram_size_matrix = |
| 171 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 172 | 0 0 0 0 0 0 0 0 # 0 |
| 173 | |
| 174 | immediate_size_matrix = |
| 175 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 176 | 0 0 0 1 0 0 0 0 # 0 |
| 177 | |
| 178 | hash_to_phv_matrix = |
| 179 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 180 | 0 0 0 0 0 0 0 0 # 0 |
| 181 | |
| 182 | total action ram packing size = [0, 0, 0] |
| 183 | action_ram_packing: |
| 184 | action set_egress_port has [] |
| 185 | total action ram packing size = [0, 16, 0] |
| 186 | action_ram_packing: |
| 187 | action set_egress_port has [(16, 16, False)] |
| 188 | total action ram packing size = [0, 16, 0] |
| 189 | action_ram_packing: |
| 190 | action set_egress_port has [] |
| 191 | byte_enables = [] |
| 192 | After allocation of 32s, available_slots is [] |
| 193 | final packing is [] |
| 194 | byte_enables = [1, 1] |
| 195 | Allocating Action Parameter Bus Byte 32 in stage 0 for Byte 0 of 16-bit constant |
| 196 | Allocating Action Parameter Bus Byte 33 in stage 0 for Byte 1 of 16-bit constant |
| 197 | Allocating Action Parameter Bus Byte 34 in stage 0 for Byte 0 of 16-bit constant |
| 198 | Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant |
| 199 | After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)] |
| 200 | final packing is [(16, 16, False)] |
| 201 | byte_enables = [] |
| 202 | After allocation of 32s, available_slots is [] |
| 203 | final packing is [] |
| 204 | Action Data SRAMs to use = 0 |
| 205 | TODO: Total RAMs use when put 16 bits in match overhead: 3 |
| 206 | TODO: Total RAMs use when put 16 bits in match overhead: 3 |
| 207 | ~~~~~~~~~~~~~~~~~~~~~ |
| 208 | Examining placing 24 bits in match overhead |
| 209 | Overhead bit width for table ecmp_group_table is 0 bits. |
| 210 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 211 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 212 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[7:0]}. |
| 213 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[15:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 214 | |
| 215 | --------------------------------------------- |
| 216 | Call to can_any_match_key_fields_be_shared(stage=0, table=ecmp_group_table) |
| 217 | --------------------------------------------- |
| 218 | Decided way to allocate for table ecmp_group_table in stage 0 WAS non_shared |
| 219 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 220 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 221 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[7:0]}. |
| 222 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[15:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 223 | Overhead SRAMs to use = 3 |
| 224 | Entries requested = 1024 and match entries get = 3072 |
| 225 | ram_size_matrix = |
| 226 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 227 | 0 0 0 0 0 0 0 0 # 0 |
| 228 | |
| 229 | immediate_size_matrix = |
| 230 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 231 | 0 0 0 1 0 0 0 0 # 0 |
| 232 | |
| 233 | hash_to_phv_matrix = |
| 234 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 235 | 0 0 0 0 0 0 0 0 # 0 |
| 236 | |
| 237 | total action ram packing size = [0, 0, 0] |
| 238 | action_ram_packing: |
| 239 | action set_egress_port has [] |
| 240 | total action ram packing size = [0, 16, 0] |
| 241 | action_ram_packing: |
| 242 | action set_egress_port has [(16, 16, False)] |
| 243 | total action ram packing size = [0, 16, 0] |
| 244 | action_ram_packing: |
| 245 | action set_egress_port has [] |
| 246 | byte_enables = [] |
| 247 | After allocation of 32s, available_slots is [] |
| 248 | final packing is [] |
| 249 | byte_enables = [1, 1] |
| 250 | Allocating Action Parameter Bus Byte 32 in stage 0 for Byte 0 of 16-bit constant |
| 251 | Allocating Action Parameter Bus Byte 33 in stage 0 for Byte 1 of 16-bit constant |
| 252 | Allocating Action Parameter Bus Byte 34 in stage 0 for Byte 0 of 16-bit constant |
| 253 | Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant |
| 254 | After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)] |
| 255 | final packing is [(16, 16, False)] |
| 256 | byte_enables = [] |
| 257 | After allocation of 32s, available_slots is [] |
| 258 | final packing is [] |
| 259 | Action Data SRAMs to use = 0 |
| 260 | TODO: Total RAMs use when put 24 bits in match overhead: 3 |
| 261 | TODO: Total RAMs use when put 24 bits in match overhead: 3 |
| 262 | ~~~~~~~~~~~~~~~~~~~~~ |
| 263 | Examining placing 32 bits in match overhead |
| 264 | Overhead bit width for table ecmp_group_table is 0 bits. |
| 265 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 266 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 267 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[7:0]}. |
| 268 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[15:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 269 | |
| 270 | --------------------------------------------- |
| 271 | Call to can_any_match_key_fields_be_shared(stage=0, table=ecmp_group_table) |
| 272 | --------------------------------------------- |
| 273 | Decided way to allocate for table ecmp_group_table in stage 0 WAS non_shared |
| 274 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 275 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 276 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[7:0]}. |
| 277 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[15:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 278 | Overhead SRAMs to use = 3 |
| 279 | Entries requested = 1024 and match entries get = 3072 |
| 280 | ram_size_matrix = |
| 281 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 282 | 0 0 0 0 0 0 0 0 # 0 |
| 283 | |
| 284 | immediate_size_matrix = |
| 285 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 286 | 0 0 0 1 0 0 0 0 # 0 |
| 287 | |
| 288 | hash_to_phv_matrix = |
| 289 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 290 | 0 0 0 0 0 0 0 0 # 0 |
| 291 | |
| 292 | total action ram packing size = [0, 0, 0] |
| 293 | action_ram_packing: |
| 294 | action set_egress_port has [] |
| 295 | total action ram packing size = [0, 16, 0] |
| 296 | action_ram_packing: |
| 297 | action set_egress_port has [(16, 16, False)] |
| 298 | total action ram packing size = [0, 16, 0] |
| 299 | action_ram_packing: |
| 300 | action set_egress_port has [] |
| 301 | byte_enables = [] |
| 302 | After allocation of 32s, available_slots is [] |
| 303 | final packing is [] |
| 304 | byte_enables = [1, 1] |
| 305 | Allocating Action Parameter Bus Byte 32 in stage 0 for Byte 0 of 16-bit constant |
| 306 | Allocating Action Parameter Bus Byte 33 in stage 0 for Byte 1 of 16-bit constant |
| 307 | Allocating Action Parameter Bus Byte 34 in stage 0 for Byte 0 of 16-bit constant |
| 308 | Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant |
| 309 | After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)] |
| 310 | final packing is [(16, 16, False)] |
| 311 | byte_enables = [] |
| 312 | After allocation of 32s, available_slots is [] |
| 313 | final packing is [] |
| 314 | Action Data SRAMs to use = 0 |
| 315 | TODO: Total RAMs use when put 32 bits in match overhead: 3 |
| 316 | TODO: Total RAMs use when put 32 bits in match overhead: 3 |
| 317 | |
| 318 | ########################################## |
| 319 | |
| 320 | Best Ram Usage is 3 rams |
| 321 | Best Immediate placement is 16 bits |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 322 | Cannot implement table0 in phase 0 resources because table uses side effect tables. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 323 | |
| 324 | ---------------------------------------------- |
| 325 | Call to Allocate P4 Table with table table0__action__, number_entries = 512, table id = None, and match type = exact |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 326 | Allocating in stage 0 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 327 | ---------------------------------------------- |
| 328 | |
| 329 | ram_size_matrix = |
| 330 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 331 | 0 0 0 1 0 0 0 0 # 0 |
| 332 | 0 0 0 1 0 0 0 0 # 1 |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 333 | 0 0 0 1 0 0 0 0 # 2 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 334 | 0 0 0 0 0 0 0 0 # 3 |
| 335 | |
| 336 | immediate_size_matrix = |
| 337 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 338 | 0 0 0 0 0 0 0 0 # 0 |
| 339 | 0 0 0 0 0 0 0 0 # 1 |
| 340 | 0 0 0 0 0 0 0 0 # 2 |
| 341 | 0 0 0 0 0 0 0 0 # 3 |
| 342 | |
| 343 | hash_to_phv_matrix = |
| 344 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 345 | 0 0 0 0 0 0 0 0 # 0 |
| 346 | 0 0 0 1 0 0 0 0 # 1 |
| 347 | 0 0 0 0 0 0 0 0 # 2 |
| 348 | 0 0 0 0 0 0 0 0 # 3 |
| 349 | |
| 350 | total action ram packing size = [16, 0, 0] |
| 351 | action_ram_packing: |
| 352 | action set_egress_port has [(16, 16, False)] |
| 353 | action ecmp_group has [(16, 16, False)] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 354 | action send_to_cpu has [(16, 16, False)] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 355 | action _drop has [] |
| 356 | total action ram packing size = [16, 0, 0] |
| 357 | action_ram_packing: |
| 358 | action set_egress_port has [] |
| 359 | action ecmp_group has [] |
| 360 | action send_to_cpu has [] |
| 361 | action _drop has [] |
| 362 | total action ram packing size = [16, 0, 16] |
| 363 | action_ram_packing: |
| 364 | action set_egress_port has [(16, 0, False)] |
| 365 | action ecmp_group has [(16, 16, False)] |
| 366 | action send_to_cpu has [(16, 0, False)] |
| 367 | action _drop has [(16, 0, False)] |
| 368 | byte_enables = [1, 1] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 369 | Allocating Action Parameter Bus Byte 32 in stage 0 for Byte 0 of 16-bit constant |
| 370 | Allocating Action Parameter Bus Byte 33 in stage 0 for Byte 1 of 16-bit constant |
| 371 | Allocating Action Parameter Bus Byte 34 in stage 0 for Byte 0 of 16-bit constant |
| 372 | Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 373 | After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)] |
| 374 | final packing is [(16, 16, False)] |
| 375 | final packing is [(16, 16, False)] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 376 | final packing is [(16, 16, False)] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 377 | final packing is [] |
| 378 | byte_enables = [] |
| 379 | After allocation of 32s, available_slots is [] |
| 380 | final packing is [] |
| 381 | final packing is [] |
| 382 | final packing is [] |
| 383 | final packing is [] |
| 384 | byte_enables = [1, 1] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 385 | Allocating Action Parameter Bus Byte 36 in stage 0 for Byte 0 of 16-bit constant |
| 386 | Allocating Action Parameter Bus Byte 37 in stage 0 for Byte 1 of 16-bit constant |
| 387 | Allocating Action Parameter Bus Byte 38 in stage 0 for Byte 0 of 16-bit constant |
| 388 | Allocating Action Parameter Bus Byte 39 in stage 0 for Byte 1 of 16-bit constant |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 389 | After allocation of 32s, available_slots is [(16, 2, 0), (32, 9, 0), (16, 3, 16)] |
| 390 | final packing is [(16, 0, False)] |
| 391 | final packing is [(16, 16, False)] |
| 392 | final packing is [(16, 0, False)] |
| 393 | final packing is [(16, 0, False)] |
| 394 | ---------------------------------------------- |
| 395 | Call to allocate_hash_distribution_units with |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 396 | hash_algorithm = crc16 |
| 397 | hash_output_width = 16 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 398 | hash_bits_need = 1 |
| 399 | output_hash_bit_start = 0 |
| 400 | immediate_bit_positions = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] |
| 401 | used_for = Immediate |
| 402 | ---------------------------------------------- |
| 403 | available_tuples_sorted_by_parity_bytes_available = [(0, 3, 0), (1, 3, 0)] |
| 404 | available_tuples_split_sorted_by_parity_bytes_available = [] |
| 405 | Allocate fresh exact match group / hash group |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 406 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ipv4.dstAddr[7:0]}. |
| 407 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ipv4.dstAddr[15:8]}. |
| 408 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ipv4.dstAddr[23:16]}. |
| 409 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {tcp.dstPort[7:0]}. |
| 410 | Allocating: Byte 4 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ipv4.srcAddr[31:24]}. |
| 411 | Allocating: Byte 5 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {tcp.srcPort[7:0]}. |
| 412 | Allocating: Byte 6 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {tcp.dstPort[15:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 413 | Allocating: Byte 7 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ipv4.dstAddr[31:24]}. |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 414 | Allocating: Byte 8 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {ipv4.srcAddr[7:0]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 415 | Allocating: Byte 9 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {ipv4.srcAddr[15:8]}. |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 416 | Allocating: Byte 10 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {tcp.srcPort[15:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 417 | Allocating: Byte 11 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {ipv4.srcAddr[23:16]}. |
| 418 | ------------------- |
| 419 | Call to _allocate_hash_distribution_and_hash_bits |
| 420 | p4_table = table0__action__ |
| 421 | used_for = Immediate |
| 422 | hash_distribution_hash_id = 0 |
| 423 | hash_group_id = 0 |
| 424 | hash_bits_in_units = OrderedDict([(0, [0])]) |
| 425 | address_left_shift = 0 |
| 426 | ------------------- |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 427 | Allocating Hash Distribution Group 0/0 for table table0__action__ in stage 0. |
| 428 | Allocating Hash Bit 0 in hash match group 0 for table table0__action__ in stage 0. |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 429 | total_hash_result_bits = 16 |
| 430 | polynomial_as_hex_int = 0x18005 |
| 431 | seed = 0x0 |
| 432 | set the seed to be [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 433 | Hash Function 0 |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 434 | hash_bit_0 = ipv4.dstAddr[0] ^ ipv4.dstAddr[1] ^ ipv4.dstAddr[2] ^ ipv4.dstAddr[3] ^ ipv4.dstAddr[4] ^ ipv4.dstAddr[5] ^ ipv4.dstAddr[6] ^ ipv4.dstAddr[7] ^ ipv4.dstAddr[8] ^ ipv4.dstAddr[9] ^ ipv4.dstAddr[10] ^ ipv4.dstAddr[11] ^ ipv4.dstAddr[13] ^ ipv4.dstAddr[15] ^ ipv4.dstAddr[17] ^ ipv4.dstAddr[18] ^ ipv4.dstAddr[19] ^ ipv4.dstAddr[20] ^ ipv4.dstAddr[21] ^ ipv4.dstAddr[22] ^ ipv4.dstAddr[23] ^ tcp.dstPort[0] ^ tcp.dstPort[1] ^ tcp.dstPort[2] ^ tcp.dstPort[3] ^ tcp.dstPort[4] ^ tcp.dstPort[5] ^ tcp.dstPort[6] ^ tcp.dstPort[7] ^ ipv4.srcAddr[24] ^ ipv4.srcAddr[25] ^ ipv4.srcAddr[26] ^ ipv4.srcAddr[27] ^ ipv4.srcAddr[28] ^ ipv4.srcAddr[29] ^ ipv4.srcAddr[30] ^ tcp.srcPort[0] ^ tcp.srcPort[1] ^ tcp.srcPort[2] ^ tcp.srcPort[3] ^ tcp.srcPort[4] ^ tcp.srcPort[5] ^ tcp.srcPort[6] ^ tcp.srcPort[7] ^ tcp.dstPort[8] ^ tcp.dstPort[9] ^ tcp.dstPort[11] ^ tcp.dstPort[12] ^ tcp.dstPort[13] ^ tcp.dstPort[14] ^ tcp.dstPort[15] ^ ipv4.dstAddr[24] ^ ipv4.dstAddr[25] ^ ipv4.dstAddr[26] ^ ipv4.dstAddr[27] ^ ipv4.dstAddr[28] ^ ipv4.srcAddr[0] ^ ipv4.srcAddr[1] ^ ipv4.srcAddr[3] ^ ipv4.srcAddr[4] ^ ipv4.srcAddr[5] ^ ipv4.srcAddr[6] ^ ipv4.srcAddr[7] ^ ipv4.srcAddr[8] ^ ipv4.srcAddr[9] ^ ipv4.srcAddr[10] ^ ipv4.srcAddr[11] ^ ipv4.srcAddr[12] ^ ipv4.srcAddr[13] ^ ipv4.srcAddr[15] ^ tcp.srcPort[8] ^ tcp.srcPort[9] ^ tcp.srcPort[10] ^ tcp.srcPort[13] ^ tcp.srcPort[14] ^ tcp.srcPort[15] ^ ipv4.srcAddr[17] ^ ipv4.srcAddr[18] ^ ipv4.srcAddr[21] ^ ipv4.srcAddr[22] ^ ipv4.srcAddr[23] ^ 0 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 435 | hash_bit_1 = 0 |
| 436 | hash_bit_2 = 0 |
| 437 | hash_bit_3 = 0 |
| 438 | hash_bit_4 = 0 |
| 439 | hash_bit_5 = 0 |
| 440 | hash_bit_6 = 0 |
| 441 | hash_bit_7 = 0 |
| 442 | hash_bit_8 = 0 |
| 443 | hash_bit_9 = 0 |
| 444 | hash_bit_10 = 0 |
| 445 | hash_bit_11 = 0 |
| 446 | hash_bit_12 = 0 |
| 447 | hash_bit_13 = 0 |
| 448 | hash_bit_14 = 0 |
| 449 | hash_bit_15 = 0 |
| 450 | hash_bit_16 = 0 |
| 451 | hash_bit_17 = 0 |
| 452 | hash_bit_18 = 0 |
| 453 | hash_bit_19 = 0 |
| 454 | hash_bit_20 = 0 |
| 455 | hash_bit_21 = 0 |
| 456 | hash_bit_22 = 0 |
| 457 | hash_bit_23 = 0 |
| 458 | hash_bit_24 = 0 |
| 459 | hash_bit_25 = 0 |
| 460 | hash_bit_26 = 0 |
| 461 | hash_bit_27 = 0 |
| 462 | hash_bit_28 = 0 |
| 463 | hash_bit_29 = 0 |
| 464 | hash_bit_30 = 0 |
| 465 | hash_bit_31 = 0 |
| 466 | hash_bit_32 = 0 |
| 467 | hash_bit_33 = 0 |
| 468 | hash_bit_34 = 0 |
| 469 | hash_bit_35 = 0 |
| 470 | hash_bit_36 = 0 |
| 471 | hash_bit_37 = 0 |
| 472 | hash_bit_38 = 0 |
| 473 | hash_bit_39 = 0 |
| 474 | hash_bit_40 = 0 |
| 475 | hash_bit_41 = 0 |
| 476 | hash_bit_42 = 0 |
| 477 | hash_bit_43 = 0 |
| 478 | hash_bit_44 = 0 |
| 479 | hash_bit_45 = 0 |
| 480 | hash_bit_46 = 0 |
| 481 | hash_bit_47 = 0 |
| 482 | hash_bit_48 = 0 |
| 483 | hash_bit_49 = 0 |
| 484 | hash_bit_50 = 0 |
| 485 | hash_bit_51 = 0 |
| 486 | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 487 | Allocating Action Logical Table ID 0 in stage 0 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 488 | |
| 489 | ---------------------------------------------- |
| 490 | Call to Allocate P4 Table with table table0_counter, number_entries = 512, table id = None, and match type = exact |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 491 | Allocating in stage 0 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 492 | ---------------------------------------------- |
| 493 | |
| 494 | stat_stage_table referenced: direct |
| 495 | stat Table Resource Request is: |
| 496 | SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 497 | Sram Resource Request for P4 table table0_counter with handle 67108867 of type statistics in stage 0 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 498 | table_type : statistics |
| 499 | rams_for_width : 1 |
| 500 | use_stash : False |
| 501 | number_ways : 1 |
| 502 | way #0 |
| 503 | SRAM Request Group 0 |
| 504 | rams_for_depth : 2 |
| 505 | map_rams : 0 |
| 506 | way_number : 0 |
| 507 | ram_word_select_bits : 0 |
| 508 | ram_enable_select_bits : 0 |
| 509 | |
| 510 | |
| 511 | ---------------------------------------------- |
| 512 | Call to Allocate P4 Table with table table0, number_entries = 512, table id = None, and match type = ternary |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 513 | Allocating in stage 0 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 514 | ---------------------------------------------- |
| 515 | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 516 | Logical Table ID in stage 0 was not supplied by table placement for table table0. |
| 517 | Allocating Logical Table ID 0 in stage 0 |
| 518 | Allocating Table Type ID 0 of type ternary in stage 0 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 519 | |
| 520 | ----------------------------------------- |
| 521 | Call to allocate_ternary_match_key_2 |
| 522 | ----------------------------------------- |
| 523 | Total crossbar bytes to allocate = 16 |
| 524 | Minimum key bytes required by this match key = 16 |
| 525 | Allocating: Byte 133 is of type ternary and member of group 0 with 1 bytes |
| 526 | version/valid in nibble 1 for table table0. for version/valid |
| 527 | {unused[6:0], ig_intr_md.ingress_port[8:8]}. |
| 528 | Allocating: Byte 128 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[7:0]}. |
| 529 | Allocating: Byte 129 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[15:8]}. |
| 530 | Allocating: Byte 130 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[23:16]}. |
| 531 | Allocating: Byte 131 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[31:24]}. |
| 532 | Allocating: Byte 132 is of type ternary and member of group 0 with 5 bytes. for {ethernet.dstAddr[15:8]}. |
| 533 | Allocating: Byte 134 is of type ternary and member of group 1 with 5 bytes. for {ethernet.dstAddr[31:24]}. |
| 534 | Allocating: Byte 135 is of type ternary and member of group 1 with 5 bytes. for {ethernet.dstAddr[39:32]}. |
| 535 | Allocating: Byte 136 is of type ternary and member of group 1 with 5 bytes. for {ethernet.etherType[7:0]}. |
| 536 | Allocating: Byte 137 is of type ternary and member of group 1 with 5 bytes. for {ethernet.dstAddr[23:16]}. |
| 537 | Allocating: Byte 138 is of type ternary and member of group 1 with 5 bytes. for {ethernet.srcAddr[47:40]}. |
| 538 | Allocating: Byte 139 is of type ternary and member of group 2 with 5 bytes. for {ethernet.etherType[15:8]}. |
| 539 | Allocating: Byte 140 is of type ternary and member of group 2 with 5 bytes. for {ig_intr_md.ingress_port[7:0]}. |
| 540 | Allocating: Byte 141 is of type ternary and member of group 2 with 5 bytes. for {ethernet.dstAddr[7:0]}. |
| 541 | Allocating: Byte 142 is of type ternary and member of group 2 with 5 bytes. for {ethernet.srcAddr[39:32]}. |
| 542 | Allocating: Byte 143 is of type ternary and member of group 2 with 5 bytes. for {ethernet.dstAddr[47:40]}. |
| 543 | Formed Ternary Match Key: |
| 544 | {--unused--[3:0], ethernet.dstAddr[47:40], ethernet.srcAddr[39:32], ethernet.dstAddr[7:0], ig_intr_md.ingress_port[7:0], ethernet.etherType[15:8], --version--[1:0], --unused--[1:0], ethernet.srcAddr[47:40], ethernet.dstAddr[23:16], ethernet.etherType[7:0], ethernet.dstAddr[39:24], --unused--[2:0], ig_intr_md.ingress_port[8:8], ethernet.dstAddr[15:8], ethernet.srcAddr[31:0]} |
| 545 | |
| 546 | --------------------------------------------- |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 547 | Call to can_any_match_key_fields_be_shared(stage=0, table=table0) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 548 | --------------------------------------------- |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 549 | Decided way to allocate for table table0 in stage 0 WAS non_shared |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 550 | |
| 551 | ----------------------------------------- |
| 552 | Call to allocate_ternary_match_key_2 |
| 553 | ----------------------------------------- |
| 554 | Total crossbar bytes to allocate = 16 |
| 555 | Minimum key bytes required by this match key = 16 |
| 556 | Allocating: Byte 133 is of type ternary and member of group 0 with 1 bytes |
| 557 | version/valid in nibble 1 for table table0. for version/valid |
| 558 | {unused[6:0], ig_intr_md.ingress_port[8:8]}. |
| 559 | Allocating: Byte 128 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[7:0]}. |
| 560 | Allocating: Byte 129 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[15:8]}. |
| 561 | Allocating: Byte 130 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[23:16]}. |
| 562 | Allocating: Byte 131 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[31:24]}. |
| 563 | Allocating: Byte 132 is of type ternary and member of group 0 with 5 bytes. for {ethernet.dstAddr[15:8]}. |
| 564 | Allocating: Byte 134 is of type ternary and member of group 1 with 5 bytes. for {ethernet.dstAddr[31:24]}. |
| 565 | Allocating: Byte 135 is of type ternary and member of group 1 with 5 bytes. for {ethernet.dstAddr[39:32]}. |
| 566 | Allocating: Byte 136 is of type ternary and member of group 1 with 5 bytes. for {ethernet.etherType[7:0]}. |
| 567 | Allocating: Byte 137 is of type ternary and member of group 1 with 5 bytes. for {ethernet.dstAddr[23:16]}. |
| 568 | Allocating: Byte 138 is of type ternary and member of group 1 with 5 bytes. for {ethernet.srcAddr[47:40]}. |
| 569 | Allocating: Byte 139 is of type ternary and member of group 2 with 5 bytes. for {ethernet.etherType[15:8]}. |
| 570 | Allocating: Byte 140 is of type ternary and member of group 2 with 5 bytes. for {ig_intr_md.ingress_port[7:0]}. |
| 571 | Allocating: Byte 141 is of type ternary and member of group 2 with 5 bytes. for {ethernet.dstAddr[7:0]}. |
| 572 | Allocating: Byte 142 is of type ternary and member of group 2 with 5 bytes. for {ethernet.srcAddr[39:32]}. |
| 573 | Allocating: Byte 143 is of type ternary and member of group 2 with 5 bytes. for {ethernet.dstAddr[47:40]}. |
| 574 | Formed Ternary Match Key: |
| 575 | {--unused--[3:0], ethernet.dstAddr[47:40], ethernet.srcAddr[39:32], ethernet.dstAddr[7:0], ig_intr_md.ingress_port[7:0], ethernet.etherType[15:8], --version--[1:0], --unused--[1:0], ethernet.srcAddr[47:40], ethernet.dstAddr[23:16], ethernet.etherType[7:0], ethernet.dstAddr[39:24], --unused--[2:0], ig_intr_md.ingress_port[8:8], ethernet.dstAddr[15:8], ethernet.srcAddr[31:0]} |
| 576 | Skipping p4_primitive StageModifyFieldFromHashBitsPrimitive from overhead calculation. |
| 577 | Allocating: Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}. |
| 578 | Allocating: Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}. |
| 579 | For action set_egress_port, formed micro_instruction: |
| 580 | Micro Instruction deposit-field for PHV Container 130 has bit width 23 |
| 581 | Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0]) |
| 582 | Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4]) |
| 583 | Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9]) |
| 584 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 585 | Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11]) |
| 586 | Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15]) |
| 587 | Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16]) |
| 588 | Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20]) |
| 589 | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 590 | Allocating Action ALU 2 (16 bits) in stage 0 for match table table0's action set_egress_port |
| 591 | Allocating VLIW Instruction : 0 in stage 0 for match table table0's action set_egress_port |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 592 | For action ecmp_group, formed micro_instruction: |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 593 | Micro Instruction alu_a for PHV Container 135 has bit width 23 |
| 594 | Field Src2 [3:0] : 0x7 (4 bits in instruction bits [3:0]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 595 | Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4]) |
| 596 | Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9]) |
| 597 | Field opcode [9:0] : 0x31e (10 bits in instruction bits [19:10]) |
| 598 | Field unused [2:0] : 0x0 (3 bits in instruction bits [22:20]) |
| 599 | |
| 600 | For action ecmp_group, formed micro_instruction: |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 601 | Micro Instruction alu_a for PHV Container 136 has bit width 23 |
| 602 | Field Src2 [3:0] : 0x8 (4 bits in instruction bits [3:0]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 603 | Field Src1 [4:0] : 0x2 (5 bits in instruction bits [8:4]) |
| 604 | Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9]) |
| 605 | Field opcode [9:0] : 0x31e (10 bits in instruction bits [19:10]) |
| 606 | Field unused [2:0] : 0x0 (3 bits in instruction bits [22:20]) |
| 607 | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 608 | Allocating Action ALU 7 (16 bits) in stage 0 for match table table0's action ecmp_group |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 609 | Allocating Action ALU 8 (16 bits) in stage 0 for match table table0's action ecmp_group |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 610 | Allocating VLIW Instruction : 1 in stage 0 for match table table0's action ecmp_group |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 611 | For action send_to_cpu, formed micro_instruction: |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 612 | Micro Instruction deposit-field for PHV Container 130 has bit width 23 |
| 613 | Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0]) |
| 614 | Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4]) |
| 615 | Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9]) |
| 616 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 617 | Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11]) |
| 618 | Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15]) |
| 619 | Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16]) |
| 620 | Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20]) |
| 621 | |
| 622 | For action send_to_cpu, formed micro_instruction: |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 623 | Micro Instruction deposit-field for PHV Container 68 has bit width 20 |
| 624 | Field Src2 [3:0] : 0x4 (4 bits in instruction bits [3:0]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 625 | Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4]) |
| 626 | Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9]) |
| 627 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 628 | Field high_bit [2:0] : 0x0 (3 bits in instruction bits [13:11]) |
| 629 | Field low_bit_lo [1:0] : 0x0 (2 bits in instruction bits [15:14]) |
| 630 | Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16]) |
| 631 | Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19]) |
| 632 | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 633 | For action send_to_cpu, formed micro_instruction: |
| 634 | Micro Instruction deposit-field for PHV Container 129 has bit width 23 |
| 635 | Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0]) |
| 636 | Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4]) |
| 637 | Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9]) |
| 638 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 639 | Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11]) |
| 640 | Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15]) |
| 641 | Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16]) |
| 642 | Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20]) |
| 643 | |
| 644 | Allocating Action ALU 2 (16 bits) in stage 0 for match table table0's action send_to_cpu |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 645 | Allocating Action ALU 4 (8 bits) in stage 0 for match table table0's action send_to_cpu |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 646 | Allocating Action ALU 1 (16 bits) in stage 0 for match table table0's action send_to_cpu |
| 647 | Allocating VLIW Instruction : 1 in stage 0 for match table table0's action send_to_cpu |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 648 | For action _drop, formed micro_instruction: |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 649 | Micro Instruction deposit-field for PHV Container 69 has bit width 20 |
| 650 | Field Src2 [3:0] : 0x5 (4 bits in instruction bits [3:0]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 651 | Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4]) |
| 652 | Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9]) |
| 653 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 654 | Field high_bit [2:0] : 0x7 (3 bits in instruction bits [13:11]) |
| 655 | Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14]) |
| 656 | Field right_rotate [2:0] : 0x3 (3 bits in instruction bits [18:16]) |
| 657 | Field low_bit_hi [0:0] : 0x1 (1 bits in instruction bits [19:19]) |
| 658 | |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 659 | Allocating Action ALU 5 (8 bits) in stage 0 for match table table0's action _drop |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 660 | Allocating VLIW Instruction : 2 in stage 0 for match table table0's action _drop |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 661 | Ternary table Pack Format = |
| 662 | Pack Format: |
| 663 | table_word_width: 141 |
| 664 | memory_word_width: 47 |
| 665 | entries_per_table_word: 1 |
| 666 | number_memory_units_per_table_word: 3 |
| 667 | entry_list: [ |
| 668 | entry_number : 0 |
| 669 | field_list : [ |
| 670 | ] |
| 671 | Field --tcam_parity_2-- [1:0] : in bits [140:139] |
| 672 | Field --unused-- [3:0] : in bits [138:135] |
| 673 | Field ethernet.dstAddr [47:40] : in bits [134:127] |
| 674 | Field ethernet.srcAddr [39:32] : in bits [126:119] |
| 675 | Field ethernet.dstAddr [7:0] : in bits [118:111] |
| 676 | Field ig_intr_md.ingress_port [7:0] : in bits [110:103] |
| 677 | Field ethernet.etherType [15:8] : in bits [102:95] |
| 678 | Field --tcam_payload_2-- [0:0] : in bits [94:94] |
| 679 | Field --tcam_parity_1-- [1:0] : in bits [93:92] |
| 680 | Field --version-- [1:0] : in bits [91:90] |
| 681 | Field --unused-- [1:0] : in bits [89:88] |
| 682 | Field ethernet.srcAddr [47:40] : in bits [87:80] |
| 683 | Field ethernet.dstAddr [23:16] : in bits [79:72] |
| 684 | Field ethernet.etherType [7:0] : in bits [71:64] |
| 685 | Field ethernet.dstAddr [39:24] : in bits [63:48] |
| 686 | Field --tcam_payload_1-- [0:0] : in bits [47:47] |
| 687 | Field --tcam_parity_0-- [1:0] : in bits [46:45] |
| 688 | Field --unused-- [2:0] : in bits [44:42] |
| 689 | Field ig_intr_md.ingress_port [8:8] : in bits [41:41] |
| 690 | Field ethernet.dstAddr [15:8] : in bits [40:33] |
| 691 | Field ethernet.srcAddr [31:0] : in bits [32:1] |
| 692 | Field --tcam_payload_0-- [0:0] : in bits [0:0] |
| 693 | ] |
| 694 | |
| 695 | |
| 696 | ---------------------------------------------- |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 697 | Call to Allocate P4 Table with table process_packet_out_table__action__, number_entries = 1024, table id = None, and match type = exact |
| 698 | Allocating in stage 0 |
| 699 | ---------------------------------------------- |
| 700 | |
| 701 | ram_size_matrix = |
| 702 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 703 | 0 0 0 0 0 0 0 0 # 0 |
| 704 | |
| 705 | immediate_size_matrix = |
| 706 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 707 | 0 0 0 0 0 0 0 0 # 0 |
| 708 | |
| 709 | hash_to_phv_matrix = |
| 710 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 711 | 0 0 0 0 0 0 0 0 # 0 |
| 712 | |
| 713 | total action ram packing size = [0, 0, 0] |
| 714 | action_ram_packing: |
| 715 | action _process_packet_out has [] |
| 716 | total action ram packing size = [0, 0, 0] |
| 717 | action_ram_packing: |
| 718 | action _process_packet_out has [] |
| 719 | total action ram packing size = [0, 0, 0] |
| 720 | action_ram_packing: |
| 721 | action _process_packet_out has [] |
| 722 | byte_enables = [] |
| 723 | After allocation of 32s, available_slots is [] |
| 724 | final packing is [] |
| 725 | byte_enables = [] |
| 726 | After allocation of 32s, available_slots is [] |
| 727 | final packing is [] |
| 728 | byte_enables = [] |
| 729 | After allocation of 32s, available_slots is [] |
| 730 | final packing is [] |
| 731 | Allocating Action Logical Table ID 1 in stage 0 |
| 732 | |
| 733 | ---------------------------------------------- |
| 734 | Call to Allocate P4 Table with table process_packet_out_table, number_entries = 1024, table id = None, and match type = exact |
| 735 | Allocating in stage 0 |
| 736 | ---------------------------------------------- |
| 737 | |
| 738 | Logical Table ID in stage 0 was not supplied by table placement for table process_packet_out_table. |
| 739 | Allocating Logical Table ID 1 in stage 0 |
| 740 | Allocating Table Type ID 0 of type exact in stage 0 |
| 741 | Match Overhead: |
| 742 | Field --version_valid-- [3:0] (4 bits) |
| 743 | |
| 744 | Logical Table ID in stage 0 was not supplied by table placement for table process_packet_out_table. |
| 745 | Allocating Logical Table ID 1 in stage 0 |
| 746 | Allocating Table Type ID 0 of type exact in stage 0 |
| 747 | Allocating: Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}. |
| 748 | Match Table Resource Request is: |
| 749 | SRAM Resource Request for table process_packet_out_table (of type match), with 0 ways wants 0 rams. |
| 750 | Allocating: Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}. |
| 751 | For action _process_packet_out, formed micro_instruction: |
| 752 | Micro Instruction deposit-field for PHV Container 130 has bit width 23 |
| 753 | Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0]) |
| 754 | Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4]) |
| 755 | Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9]) |
| 756 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 757 | Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11]) |
| 758 | Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15]) |
| 759 | Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16]) |
| 760 | Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20]) |
| 761 | |
| 762 | For action _process_packet_out, formed micro_instruction: |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 763 | Micro Instruction deposit-field for PHV Container 68 has bit width 20 |
| 764 | Field Src2 [3:0] : 0x4 (4 bits in instruction bits [3:0]) |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 765 | Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4]) |
| 766 | Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9]) |
| 767 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 768 | Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11]) |
| 769 | Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14]) |
| 770 | Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16]) |
| 771 | Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19]) |
| 772 | |
| 773 | Allocating Action ALU 2 (16 bits) in stage 0 for match table process_packet_out_table's action _process_packet_out |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 774 | Allocating Action ALU 4 (8 bits) in stage 0 for match table process_packet_out_table's action _process_packet_out |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 775 | Allocating VLIW Instruction : 2 in stage 0 for match table process_packet_out_table's action _process_packet_out |
| 776 | |
| 777 | ---------------------------------------------- |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 778 | Call to Allocate P4 Table with table ecmp_group_table__action__, number_entries = 1024, table id = None, and match type = exact |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 779 | Allocating in stage 1 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 780 | ---------------------------------------------- |
| 781 | |
| 782 | ram_size_matrix = |
| 783 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 784 | 0 0 0 0 0 0 0 0 # 0 |
| 785 | |
| 786 | immediate_size_matrix = |
| 787 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 788 | 0 0 0 1 0 0 0 0 # 0 |
| 789 | |
| 790 | hash_to_phv_matrix = |
| 791 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 792 | 0 0 0 0 0 0 0 0 # 0 |
| 793 | |
| 794 | total action ram packing size = [0, 0, 0] |
| 795 | action_ram_packing: |
| 796 | action set_egress_port has [] |
| 797 | total action ram packing size = [0, 16, 0] |
| 798 | action_ram_packing: |
| 799 | action set_egress_port has [(16, 16, False)] |
| 800 | total action ram packing size = [0, 16, 0] |
| 801 | action_ram_packing: |
| 802 | action set_egress_port has [] |
| 803 | byte_enables = [] |
| 804 | After allocation of 32s, available_slots is [] |
| 805 | final packing is [] |
| 806 | byte_enables = [1, 1] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 807 | Allocating Action Parameter Bus Byte 32 in stage 1 for Byte 0 of 16-bit constant |
| 808 | Allocating Action Parameter Bus Byte 33 in stage 1 for Byte 1 of 16-bit constant |
| 809 | Allocating Action Parameter Bus Byte 34 in stage 1 for Byte 0 of 16-bit constant |
| 810 | Allocating Action Parameter Bus Byte 35 in stage 1 for Byte 1 of 16-bit constant |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 811 | After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)] |
| 812 | final packing is [(16, 16, False)] |
| 813 | byte_enables = [] |
| 814 | After allocation of 32s, available_slots is [] |
| 815 | final packing is [] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 816 | Allocating Action Logical Table ID 0 in stage 1 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 817 | |
| 818 | ---------------------------------------------- |
| 819 | Call to Allocate P4 Table with table ecmp_group_table_counter, number_entries = 1024, table id = None, and match type = exact |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 820 | Allocating in stage 1 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 821 | ---------------------------------------------- |
| 822 | |
| 823 | stat_stage_table referenced: direct |
| 824 | stat Table Resource Request is: |
| 825 | SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 826 | Sram Resource Request for P4 table ecmp_group_table_counter with handle 67108868 of type statistics in stage 1 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 827 | table_type : statistics |
| 828 | rams_for_width : 1 |
| 829 | use_stash : False |
| 830 | number_ways : 1 |
| 831 | way #0 |
| 832 | SRAM Request Group 0 |
| 833 | rams_for_depth : 2 |
| 834 | map_rams : 0 |
| 835 | way_number : 0 |
| 836 | ram_word_select_bits : 0 |
| 837 | ram_enable_select_bits : 0 |
| 838 | |
| 839 | |
| 840 | ---------------------------------------------- |
| 841 | Call to Allocate P4 Table with table ecmp_group_table, number_entries = 1024, table id = None, and match type = exact |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 842 | Allocating in stage 1 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 843 | ---------------------------------------------- |
| 844 | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 845 | Logical Table ID in stage 1 was not supplied by table placement for table ecmp_group_table. |
| 846 | Allocating Logical Table ID 0 in stage 1 |
| 847 | Allocating Table Type ID 0 of type exact in stage 1 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 848 | Match Overhead: |
| 849 | Field --version_valid-- [3:0] (4 bits) |
| 850 | Field --immediate-- [15:0] (16 bits) |
| 851 | |
| 852 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 853 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 854 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[7:0]}. |
| 855 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[15:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 856 | |
| 857 | --------------------------------------------- |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 858 | Call to can_any_match_key_fields_be_shared(stage=1, table=ecmp_group_table) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 859 | --------------------------------------------- |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 860 | Decided way to allocate for table ecmp_group_table in stage 1 WAS non_shared |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 861 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 862 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 863 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[7:0]}. |
| 864 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.group_id[15:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 865 | Packing choices are: |
| 866 | Choice 0 |
| 867 | entries_per_table_word : 1 |
| 868 | rams_for_width : 1 |
| 869 | total_rams_need : 1 |
| 870 | utilization : 0.328125 |
| 871 | total_logical_entries_get : 1024 |
| 872 | total_logical_entries_want : 1024 |
| 873 | Choice 1 |
| 874 | entries_per_table_word : 2 |
| 875 | rams_for_width : 1 |
| 876 | total_rams_need : 1 |
| 877 | utilization : 0.656250 |
| 878 | total_logical_entries_get : 2048 |
| 879 | total_logical_entries_want : 1024 |
| 880 | Choice 2 |
| 881 | entries_per_table_word : 3 |
| 882 | rams_for_width : 2 |
| 883 | total_rams_need : 2 |
| 884 | utilization : 0.492188 |
| 885 | total_logical_entries_get : 3072 |
| 886 | total_logical_entries_want : 1024 |
| 887 | Choice 3 |
| 888 | entries_per_table_word : 4 |
| 889 | rams_for_width : 2 |
| 890 | total_rams_need : 2 |
| 891 | utilization : 0.656250 |
| 892 | total_logical_entries_get : 4096 |
| 893 | total_logical_entries_want : 1024 |
| 894 | Choice 4 |
| 895 | entries_per_table_word : 5 |
| 896 | rams_for_width : 2 |
| 897 | total_rams_need : 2 |
| 898 | utilization : 0.820312 |
| 899 | total_logical_entries_get : 5120 |
| 900 | total_logical_entries_want : 1024 |
| 901 | Choice 5 |
| 902 | entries_per_table_word : 6 |
| 903 | rams_for_width : 3 |
| 904 | total_rams_need : 3 |
| 905 | utilization : 0.656250 |
| 906 | total_logical_entries_get : 6144 |
| 907 | total_logical_entries_want : 1024 |
| 908 | Choice 6 |
| 909 | entries_per_table_word : 7 |
| 910 | rams_for_width : 3 |
| 911 | total_rams_need : 3 |
| 912 | utilization : 0.765625 |
| 913 | total_logical_entries_get : 7168 |
| 914 | total_logical_entries_want : 1024 |
| 915 | Choice 7 |
| 916 | entries_per_table_word : 8 |
| 917 | rams_for_width : 3 |
| 918 | total_rams_need : 3 |
| 919 | utilization : 0.875000 |
| 920 | total_logical_entries_get : 8192 |
| 921 | total_logical_entries_want : 1024 |
| 922 | Choice 8 |
| 923 | entries_per_table_word : 9 |
| 924 | rams_for_width : 4 |
| 925 | total_rams_need : 4 |
| 926 | utilization : 0.738281 |
| 927 | total_logical_entries_get : 9216 |
| 928 | total_logical_entries_want : 1024 |
| 929 | First choice is to pack 1 entries per table word (1 rams) |
| 930 | -------------------------------------- |
| 931 | Attempting packing (attempt #1): |
| 932 | -------------------------------------- |
| 933 | number entries per table word: 1 |
| 934 | rams_for_width: 1 |
| 935 | total_rams: 1 |
| 936 | utilization: 0.328125 |
| 937 | total_ram_blocks_need_for_depth: 1 |
| 938 | This will be split into a 3-way table distributed as [1, 1, 1]. |
| 939 | Total number of hash functions need is 1. |
| 940 | Allocating Hash Bit 0 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 941 | Allocating Hash Bit 1 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 942 | Allocating Hash Bit 2 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 943 | Allocating Hash Bit 3 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 944 | Allocating Hash Bit 4 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 945 | Allocating Hash Bit 5 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 946 | Allocating Hash Bit 6 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 947 | Allocating Hash Bit 7 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 948 | Allocating Hash Bit 8 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 949 | Allocating Hash Bit 9 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 950 | Allocating Hash Bit 10 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 951 | Allocating Hash Bit 11 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 952 | Allocating Hash Bit 12 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 953 | Allocating Hash Bit 13 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 954 | Allocating Hash Bit 14 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 955 | Allocating Hash Bit 15 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 956 | Allocating Hash Bit 16 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 957 | Allocating Hash Bit 17 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 958 | Allocating Hash Bit 18 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 959 | Allocating Hash Bit 19 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 960 | Allocating Hash Bit 20 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 961 | Allocating Hash Bit 21 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 962 | Allocating Hash Bit 22 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 963 | Allocating Hash Bit 23 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 964 | Allocating Hash Bit 24 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 965 | Allocating Hash Bit 25 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 966 | Allocating Hash Bit 26 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 967 | Allocating Hash Bit 27 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 968 | Allocating Hash Bit 28 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 969 | Allocating Hash Bit 29 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 970 | Match Table Resource Request is: |
| 971 | SRAM Resource Request for table ecmp_group_table (of type match), with 3 ways wants 3 rams. |
| 972 | -------- |
| 973 | set the seed to be [0, 0, 1, 1, 0, 1, 0, 1, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 1, 1, 1, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] |
| 974 | For action set_egress_port, formed micro_instruction: |
| 975 | Micro Instruction deposit-field for PHV Container 130 has bit width 23 |
| 976 | Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0]) |
| 977 | Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4]) |
| 978 | Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9]) |
| 979 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 980 | Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11]) |
| 981 | Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15]) |
| 982 | Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16]) |
| 983 | Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20]) |
| 984 | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 985 | Allocating Action ALU 2 (16 bits) in stage 1 for match table ecmp_group_table's action set_egress_port |
| 986 | Allocating VLIW Instruction : 0 in stage 1 for match table ecmp_group_table's action set_egress_port |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 987 | |
| 988 | ---------------------------------------------- |
| 989 | Call to Allocate P4 Table with table ingress_port_count_table__action__, number_entries = 1024, table id = None, and match type = exact |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 990 | Allocating in stage 2 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 991 | ---------------------------------------------- |
| 992 | |
| 993 | ram_size_matrix = |
| 994 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 995 | 0 0 0 0 0 0 0 0 # 0 |
| 996 | |
| 997 | immediate_size_matrix = |
| 998 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 999 | 0 0 0 0 0 0 0 0 # 0 |
| 1000 | |
| 1001 | hash_to_phv_matrix = |
| 1002 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 1003 | 0 0 0 0 0 0 0 0 # 0 |
| 1004 | |
| 1005 | total action ram packing size = [0, 0, 0] |
| 1006 | action_ram_packing: |
| 1007 | action count_ingress has [] |
| 1008 | total action ram packing size = [0, 0, 0] |
| 1009 | action_ram_packing: |
| 1010 | action count_ingress has [] |
| 1011 | total action ram packing size = [0, 0, 0] |
| 1012 | action_ram_packing: |
| 1013 | action count_ingress has [] |
| 1014 | byte_enables = [] |
| 1015 | After allocation of 32s, available_slots is [] |
| 1016 | final packing is [] |
| 1017 | byte_enables = [] |
| 1018 | After allocation of 32s, available_slots is [] |
| 1019 | final packing is [] |
| 1020 | byte_enables = [] |
| 1021 | After allocation of 32s, available_slots is [] |
| 1022 | final packing is [] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1023 | Allocating Action Logical Table ID 0 in stage 2 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1024 | |
| 1025 | ---------------------------------------------- |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 1026 | Call to Allocate P4 Table with table ingress_port_counter, number_entries = 512, table id = None, and match type = exact |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1027 | Allocating in stage 2 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1028 | ---------------------------------------------- |
| 1029 | |
| 1030 | stat_stage_table referenced: indirect |
| 1031 | stat Table Resource Request is: |
| 1032 | SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1033 | Sram Resource Request for P4 table ingress_port_counter with handle 67108865 of type statistics in stage 2 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1034 | table_type : statistics |
| 1035 | rams_for_width : 1 |
| 1036 | use_stash : False |
| 1037 | number_ways : 1 |
| 1038 | way #0 |
| 1039 | SRAM Request Group 0 |
| 1040 | rams_for_depth : 2 |
| 1041 | map_rams : 0 |
| 1042 | way_number : 0 |
| 1043 | ram_word_select_bits : 0 |
| 1044 | ram_enable_select_bits : 0 |
| 1045 | |
| 1046 | |
| 1047 | ---------------------------------------------- |
| 1048 | Call to Allocate P4 Table with table ingress_port_count_table, number_entries = 1024, table id = None, and match type = exact |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1049 | Allocating in stage 2 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1050 | ---------------------------------------------- |
| 1051 | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1052 | Logical Table ID in stage 2 was not supplied by table placement for table ingress_port_count_table. |
| 1053 | Allocating Logical Table ID 0 in stage 2 |
| 1054 | Allocating Table Type ID 0 of type exact in stage 2 |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 1055 | Too few bits (9) specified to address ingress_port_counter from table ingress_port_count_table. 10 are needed. |
| 1056 | The most significant 1 bit will be padded with zeros. |
| 1057 | ---------------------------------------------- |
| 1058 | Call to allocate_hash_distribution_units with |
| 1059 | hash_algorithm = identity |
| 1060 | hash_output_width = 10 |
| 1061 | hash_bits_need = 10 |
| 1062 | output_hash_bit_start = 0 |
| 1063 | immediate_bit_positions = None |
| 1064 | used_for = Statistics Address |
| 1065 | ---------------------------------------------- |
| 1066 | available_tuples_sorted_by_parity_bytes_available = [(0, 3, 0), (1, 3, 0)] |
| 1067 | available_tuples_split_sorted_by_parity_bytes_available = [] |
| 1068 | Allocate fresh exact match group / hash group |
| 1069 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md.ingress_port[7:0]}. |
| 1070 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md.ingress_port[8:8]}. |
| 1071 | ------------------- |
| 1072 | Call to _allocate_hash_distribution_and_hash_bits |
| 1073 | p4_table = ingress_port_count_table |
| 1074 | used_for = Statistics Address |
| 1075 | hash_distribution_hash_id = 0 |
| 1076 | hash_group_id = 0 |
| 1077 | hash_bits_in_units = OrderedDict([(0, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9])]) |
| 1078 | address_left_shift = 1 |
| 1079 | ------------------- |
| 1080 | Allocating Hash Distribution Group 0/0 for table ingress_port_count_table in stage 2. |
| 1081 | Allocating Hash Bit 0 in hash match group 0 for table ingress_port_count_table in stage 2. |
| 1082 | Allocating Hash Bit 1 in hash match group 0 for table ingress_port_count_table in stage 2. |
| 1083 | Allocating Hash Bit 2 in hash match group 0 for table ingress_port_count_table in stage 2. |
| 1084 | Allocating Hash Bit 3 in hash match group 0 for table ingress_port_count_table in stage 2. |
| 1085 | Allocating Hash Bit 4 in hash match group 0 for table ingress_port_count_table in stage 2. |
| 1086 | Allocating Hash Bit 5 in hash match group 0 for table ingress_port_count_table in stage 2. |
| 1087 | Allocating Hash Bit 6 in hash match group 0 for table ingress_port_count_table in stage 2. |
| 1088 | Allocating Hash Bit 7 in hash match group 0 for table ingress_port_count_table in stage 2. |
| 1089 | Allocating Hash Bit 8 in hash match group 0 for table ingress_port_count_table in stage 2. |
| 1090 | Allocating Hash Bit 9 in hash match group 0 for table ingress_port_count_table in stage 2. |
| 1091 | seed = 0x0 |
| 1092 | set the seed to be [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] |
| 1093 | Hash Function 0 |
| 1094 | hash_bit_0 = ig_intr_md.ingress_port[0] ^ 0 |
| 1095 | hash_bit_1 = ig_intr_md.ingress_port[1] ^ 0 |
| 1096 | hash_bit_2 = ig_intr_md.ingress_port[2] ^ 0 |
| 1097 | hash_bit_3 = ig_intr_md.ingress_port[3] ^ 0 |
| 1098 | hash_bit_4 = ig_intr_md.ingress_port[4] ^ 0 |
| 1099 | hash_bit_5 = ig_intr_md.ingress_port[5] ^ 0 |
| 1100 | hash_bit_6 = ig_intr_md.ingress_port[6] ^ 0 |
| 1101 | hash_bit_7 = ig_intr_md.ingress_port[7] ^ 0 |
| 1102 | hash_bit_8 = ig_intr_md.ingress_port[8] ^ 0 |
| 1103 | hash_bit_9 = 0 |
| 1104 | hash_bit_10 = 0 |
| 1105 | hash_bit_11 = 0 |
| 1106 | hash_bit_12 = 0 |
| 1107 | hash_bit_13 = 0 |
| 1108 | hash_bit_14 = 0 |
| 1109 | hash_bit_15 = 0 |
| 1110 | hash_bit_16 = 0 |
| 1111 | hash_bit_17 = 0 |
| 1112 | hash_bit_18 = 0 |
| 1113 | hash_bit_19 = 0 |
| 1114 | hash_bit_20 = 0 |
| 1115 | hash_bit_21 = 0 |
| 1116 | hash_bit_22 = 0 |
| 1117 | hash_bit_23 = 0 |
| 1118 | hash_bit_24 = 0 |
| 1119 | hash_bit_25 = 0 |
| 1120 | hash_bit_26 = 0 |
| 1121 | hash_bit_27 = 0 |
| 1122 | hash_bit_28 = 0 |
| 1123 | hash_bit_29 = 0 |
| 1124 | hash_bit_30 = 0 |
| 1125 | hash_bit_31 = 0 |
| 1126 | hash_bit_32 = 0 |
| 1127 | hash_bit_33 = 0 |
| 1128 | hash_bit_34 = 0 |
| 1129 | hash_bit_35 = 0 |
| 1130 | hash_bit_36 = 0 |
| 1131 | hash_bit_37 = 0 |
| 1132 | hash_bit_38 = 0 |
| 1133 | hash_bit_39 = 0 |
| 1134 | hash_bit_40 = 0 |
| 1135 | hash_bit_41 = 0 |
| 1136 | hash_bit_42 = 0 |
| 1137 | hash_bit_43 = 0 |
| 1138 | hash_bit_44 = 0 |
| 1139 | hash_bit_45 = 0 |
| 1140 | hash_bit_46 = 0 |
| 1141 | hash_bit_47 = 0 |
| 1142 | hash_bit_48 = 0 |
| 1143 | hash_bit_49 = 0 |
| 1144 | hash_bit_50 = 0 |
| 1145 | hash_bit_51 = 0 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1146 | |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 1147 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}. |
| 1148 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1149 | Match Table Resource Request is: |
| 1150 | SRAM Resource Request for table ingress_port_count_table (of type match), with 0 ways wants 0 rams. |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 1151 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}. |
| 1152 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1153 | No micro instructions needed for action count_ingress executed from table ingress_port_count_table. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1154 | Allocating Action ALU 0 (32 bits) in stage 2 for match table ingress_port_count_table's action count_ingress |
| 1155 | Allocating VLIW Instruction : 0 in stage 2 for match table ingress_port_count_table's action count_ingress |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 1156 | My hash-action stage table is |
| 1157 | StageHashActionTable |
| 1158 | stage_number: 2 |
| 1159 | number_entries 1024 |
| 1160 | pack_format: |
| 1161 | Pack Format: |
| 1162 | table_word_width: 0 |
| 1163 | memory_word_width: 0 |
| 1164 | entries_per_table_word: 0 |
| 1165 | number_memory_units_per_table_word: 0 |
| 1166 | entry_list: [ |
| 1167 | ] |
| 1168 | |
| 1169 | p4_table: 'ingress_port_count_table' |
| 1170 | stage_table_handle: 0 |
| 1171 | stage_table_type_handle: 0 |
| 1172 | stage_gateway_table: StageGatewayTable |
| 1173 | stage_number: 2 |
| 1174 | number_entries 0 |
| 1175 | memory_resource_allocation GatewayMemoryResourceAllocation: |
| 1176 | memory_type: gateway |
| 1177 | memory_units: [[15]] |
| 1178 | home_row: -1 |
| 1179 | stateful_action_bus_output: None |
| 1180 | |
| 1181 | p4_table: '_condition_2' |
| 1182 | |
| 1183 | match_group_resource_allocation: |
| 1184 | vliw_resource_allocation: |
| 1185 | action handle 536870914 maps to: |
| 1186 | VliwResourceAllocation: |
| 1187 | match_table_name: ingress_port_count_table |
| 1188 | p4_action: count_ingress |
| 1189 | address_to_use: 1 |
| 1190 | full_address: 64 |
| 1191 | vliw_instruction_number: 0 |
| 1192 | color: 0 |
| 1193 | direction: ingress |
| 1194 | micro_instructions: |
| 1195 | |
| 1196 | action_to_vliw_mapping: |
| 1197 | action handle 536870914 maps to vliw instruction 0, color 0, and direction ingress and is found in instruction address 1 |
| 1198 | hash_distribution_usages: |
| 1199 | MAU Hash Distribution Resource Usage for P4 table ingress_port_count_table |
| 1200 | exact_match_group_resource_allocation : HashMatchGroupResourceAllocation: |
| 1201 | match_groups: [(0, 16)] |
| 1202 | match_group_key_bit_width: 9 |
| 1203 | match_group_phv_bit_scrambling: OrderedDict([(('ig_intr_md.ingress_port', 0), 0), (('ig_intr_md.ingress_port', 1), 1), (('ig_intr_md.ingress_port', 2), 2), (('ig_intr_md.ingress_port', 3), 3), (('ig_intr_md.ingress_port', 4), 4), (('ig_intr_md.ingress_port', 5), 5), (('ig_intr_md.ingress_port', 6), 6), (('ig_intr_md.ingress_port', 7), 7), (('ig_intr_md.ingress_port', 8), 8)]) |
| 1204 | ('ig_intr_md.ingress_port', 0) -> 0 |
| 1205 | ('ig_intr_md.ingress_port', 1) -> 1 |
| 1206 | ('ig_intr_md.ingress_port', 2) -> 2 |
| 1207 | ('ig_intr_md.ingress_port', 3) -> 3 |
| 1208 | ('ig_intr_md.ingress_port', 4) -> 4 |
| 1209 | ('ig_intr_md.ingress_port', 5) -> 5 |
| 1210 | ('ig_intr_md.ingress_port', 6) -> 6 |
| 1211 | ('ig_intr_md.ingress_port', 7) -> 7 |
| 1212 | ('ig_intr_md.ingress_port', 8) -> 8 |
| 1213 | hash_function_dictionary: OrderedDict([(0, <p4c_tofino.target.tofino.llir.mau.stage.resources.hash_function.HashFunction object at 0x7f1960def790>)]) |
| 1214 | hash_group_id: 0 |
| 1215 | seed: [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] |
| 1216 | table_direction: ingress |
| 1217 | |
| 1218 | hash_distribution_resource_allocations : |
| 1219 | Hash Distribution: |
| 1220 | source_hash_group : 0 |
| 1221 | hash_distribution_hash_id : 0 |
| 1222 | hash_distribution_group_id : 0 |
| 1223 | hash_distribution_used_for : Statistics Address |
| 1224 | table_direction : ingress |
| 1225 | bits_to_use : [0, 1, 2, 3, 4, 5, 6, 7, 8, 9] |
| 1226 | left_shift : 1 |
| 1227 | expanded_lo : False |
| 1228 | expanded_hi : False |
| 1229 | expanded_bit_width : 0 |
| 1230 | immediate_position : unused |
| 1231 | |
| 1232 | |
| 1233 | |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1234 | |
| 1235 | ---------------------------------------------- |
| 1236 | Call to Allocate P4 Table with table egress_port_count_table__action__, number_entries = 1024, table id = None, and match type = exact |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1237 | Allocating in stage 2 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1238 | ---------------------------------------------- |
| 1239 | |
| 1240 | ram_size_matrix = |
| 1241 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 1242 | 0 0 0 0 0 0 0 0 # 0 |
| 1243 | |
| 1244 | immediate_size_matrix = |
| 1245 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 1246 | 0 0 0 0 0 0 0 0 # 0 |
| 1247 | |
| 1248 | hash_to_phv_matrix = |
| 1249 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 1250 | 0 0 0 0 0 0 0 0 # 0 |
| 1251 | |
| 1252 | total action ram packing size = [0, 0, 0] |
| 1253 | action_ram_packing: |
| 1254 | action count_egress has [] |
| 1255 | total action ram packing size = [0, 0, 0] |
| 1256 | action_ram_packing: |
| 1257 | action count_egress has [] |
| 1258 | total action ram packing size = [0, 0, 0] |
| 1259 | action_ram_packing: |
| 1260 | action count_egress has [] |
| 1261 | byte_enables = [] |
| 1262 | After allocation of 32s, available_slots is [] |
| 1263 | final packing is [] |
| 1264 | byte_enables = [] |
| 1265 | After allocation of 32s, available_slots is [] |
| 1266 | final packing is [] |
| 1267 | byte_enables = [] |
| 1268 | After allocation of 32s, available_slots is [] |
| 1269 | final packing is [] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1270 | Allocating Action Logical Table ID 1 in stage 2 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1271 | |
| 1272 | ---------------------------------------------- |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 1273 | Call to Allocate P4 Table with table egress_port_counter, number_entries = 512, table id = None, and match type = exact |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1274 | Allocating in stage 2 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1275 | ---------------------------------------------- |
| 1276 | |
| 1277 | stat_stage_table referenced: indirect |
| 1278 | stat Table Resource Request is: |
| 1279 | SRAM Resource Request for table egress_port_counter (of type statistics), with 1 ways wants 2 rams. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1280 | Sram Resource Request for P4 table egress_port_counter with handle 67108866 of type statistics in stage 2 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1281 | table_type : statistics |
| 1282 | rams_for_width : 1 |
| 1283 | use_stash : False |
| 1284 | number_ways : 1 |
| 1285 | way #0 |
| 1286 | SRAM Request Group 0 |
| 1287 | rams_for_depth : 2 |
| 1288 | map_rams : 0 |
| 1289 | way_number : 0 |
| 1290 | ram_word_select_bits : 0 |
| 1291 | ram_enable_select_bits : 0 |
| 1292 | |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 1293 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}. |
| 1294 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1295 | |
| 1296 | ---------------------------------------------- |
| 1297 | Call to Allocate P4 Table with table egress_port_count_table, number_entries = 1024, table id = None, and match type = exact |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1298 | Allocating in stage 2 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1299 | ---------------------------------------------- |
| 1300 | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1301 | Logical Table ID in stage 2 was not supplied by table placement for table egress_port_count_table. |
| 1302 | Allocating Logical Table ID 1 in stage 2 |
| 1303 | Allocating Table Type ID 1 of type exact in stage 2 |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 1304 | Too few bits (9) specified to address egress_port_counter from table egress_port_count_table. 10 are needed. |
| 1305 | The most significant 1 bit will be padded with zeros. |
| 1306 | ---------------------------------------------- |
| 1307 | Call to allocate_hash_distribution_units with |
| 1308 | hash_algorithm = identity |
| 1309 | hash_output_width = 10 |
| 1310 | hash_bits_need = 10 |
| 1311 | output_hash_bit_start = 0 |
| 1312 | immediate_bit_positions = None |
| 1313 | used_for = Statistics Address |
| 1314 | ---------------------------------------------- |
| 1315 | available_tuples_sorted_by_parity_bytes_available = [(1, 3, 0), (0, 2, 4)] |
| 1316 | available_tuples_split_sorted_by_parity_bytes_available = [] |
| 1317 | Allocate fresh exact match group / hash group |
| 1318 | Allocating: Byte 8 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}. |
| 1319 | Allocating: Byte 9 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}. |
| 1320 | ------------------- |
| 1321 | Call to _allocate_hash_distribution_and_hash_bits |
| 1322 | p4_table = egress_port_count_table |
| 1323 | used_for = Statistics Address |
| 1324 | hash_distribution_hash_id = 1 |
| 1325 | hash_group_id = 1 |
| 1326 | hash_bits_in_units = OrderedDict([(0, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9])]) |
| 1327 | address_left_shift = 1 |
| 1328 | ------------------- |
| 1329 | Allocating Hash Distribution Group 1/0 for table egress_port_count_table in stage 2. |
| 1330 | Allocating Hash Bit 0 in hash match group 1 for table egress_port_count_table in stage 2. |
| 1331 | Allocating Hash Bit 1 in hash match group 1 for table egress_port_count_table in stage 2. |
| 1332 | Allocating Hash Bit 2 in hash match group 1 for table egress_port_count_table in stage 2. |
| 1333 | Allocating Hash Bit 3 in hash match group 1 for table egress_port_count_table in stage 2. |
| 1334 | Allocating Hash Bit 4 in hash match group 1 for table egress_port_count_table in stage 2. |
| 1335 | Allocating Hash Bit 5 in hash match group 1 for table egress_port_count_table in stage 2. |
| 1336 | Allocating Hash Bit 6 in hash match group 1 for table egress_port_count_table in stage 2. |
| 1337 | Allocating Hash Bit 7 in hash match group 1 for table egress_port_count_table in stage 2. |
| 1338 | Allocating Hash Bit 8 in hash match group 1 for table egress_port_count_table in stage 2. |
| 1339 | Allocating Hash Bit 9 in hash match group 1 for table egress_port_count_table in stage 2. |
| 1340 | seed = 0x0 |
| 1341 | set the seed to be [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] |
| 1342 | Hash Function 0 |
| 1343 | hash_bit_0 = ig_intr_md_for_tm.ucast_egress_port[0] ^ 0 |
| 1344 | hash_bit_1 = ig_intr_md_for_tm.ucast_egress_port[1] ^ 0 |
| 1345 | hash_bit_2 = ig_intr_md_for_tm.ucast_egress_port[2] ^ 0 |
| 1346 | hash_bit_3 = ig_intr_md_for_tm.ucast_egress_port[3] ^ 0 |
| 1347 | hash_bit_4 = ig_intr_md_for_tm.ucast_egress_port[4] ^ 0 |
| 1348 | hash_bit_5 = ig_intr_md_for_tm.ucast_egress_port[5] ^ 0 |
| 1349 | hash_bit_6 = ig_intr_md_for_tm.ucast_egress_port[6] ^ 0 |
| 1350 | hash_bit_7 = ig_intr_md_for_tm.ucast_egress_port[7] ^ 0 |
| 1351 | hash_bit_8 = ig_intr_md_for_tm.ucast_egress_port[8] ^ 0 |
| 1352 | hash_bit_9 = 0 |
| 1353 | hash_bit_10 = 0 |
| 1354 | hash_bit_11 = 0 |
| 1355 | hash_bit_12 = 0 |
| 1356 | hash_bit_13 = 0 |
| 1357 | hash_bit_14 = 0 |
| 1358 | hash_bit_15 = 0 |
| 1359 | hash_bit_16 = 0 |
| 1360 | hash_bit_17 = 0 |
| 1361 | hash_bit_18 = 0 |
| 1362 | hash_bit_19 = 0 |
| 1363 | hash_bit_20 = 0 |
| 1364 | hash_bit_21 = 0 |
| 1365 | hash_bit_22 = 0 |
| 1366 | hash_bit_23 = 0 |
| 1367 | hash_bit_24 = 0 |
| 1368 | hash_bit_25 = 0 |
| 1369 | hash_bit_26 = 0 |
| 1370 | hash_bit_27 = 0 |
| 1371 | hash_bit_28 = 0 |
| 1372 | hash_bit_29 = 0 |
| 1373 | hash_bit_30 = 0 |
| 1374 | hash_bit_31 = 0 |
| 1375 | hash_bit_32 = 0 |
| 1376 | hash_bit_33 = 0 |
| 1377 | hash_bit_34 = 0 |
| 1378 | hash_bit_35 = 0 |
| 1379 | hash_bit_36 = 0 |
| 1380 | hash_bit_37 = 0 |
| 1381 | hash_bit_38 = 0 |
| 1382 | hash_bit_39 = 0 |
| 1383 | hash_bit_40 = 0 |
| 1384 | hash_bit_41 = 0 |
| 1385 | hash_bit_42 = 0 |
| 1386 | hash_bit_43 = 0 |
| 1387 | hash_bit_44 = 0 |
| 1388 | hash_bit_45 = 0 |
| 1389 | hash_bit_46 = 0 |
| 1390 | hash_bit_47 = 0 |
| 1391 | hash_bit_48 = 0 |
| 1392 | hash_bit_49 = 0 |
| 1393 | hash_bit_50 = 0 |
| 1394 | hash_bit_51 = 0 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1395 | |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 1396 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}. |
| 1397 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1398 | Match Table Resource Request is: |
| 1399 | SRAM Resource Request for table egress_port_count_table (of type match), with 0 ways wants 0 rams. |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 1400 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}. |
| 1401 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1402 | No micro instructions needed for action count_egress executed from table egress_port_count_table. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1403 | Allocating Action ALU 0 (32 bits) in stage 2 for match table egress_port_count_table's action count_egress |
| 1404 | Allocating VLIW Instruction : 0 in stage 2 for match table egress_port_count_table's action count_egress |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame^] | 1405 | My hash-action stage table is |
| 1406 | StageHashActionTable |
| 1407 | stage_number: 2 |
| 1408 | number_entries 1024 |
| 1409 | pack_format: |
| 1410 | Pack Format: |
| 1411 | table_word_width: 0 |
| 1412 | memory_word_width: 0 |
| 1413 | entries_per_table_word: 0 |
| 1414 | number_memory_units_per_table_word: 0 |
| 1415 | entry_list: [ |
| 1416 | ] |
| 1417 | |
| 1418 | p4_table: 'egress_port_count_table' |
| 1419 | stage_table_handle: 1 |
| 1420 | stage_table_type_handle: 1 |
| 1421 | stage_gateway_table: StageGatewayTable |
| 1422 | stage_number: 2 |
| 1423 | number_entries 0 |
| 1424 | memory_resource_allocation GatewayMemoryResourceAllocation: |
| 1425 | memory_type: gateway |
| 1426 | memory_units: [[14]] |
| 1427 | home_row: -1 |
| 1428 | stateful_action_bus_output: None |
| 1429 | |
| 1430 | p4_table: 'egress_port_count_table_always_true_condition' |
| 1431 | |
| 1432 | match_group_resource_allocation: |
| 1433 | vliw_resource_allocation: |
| 1434 | action handle 536870916 maps to: |
| 1435 | VliwResourceAllocation: |
| 1436 | match_table_name: egress_port_count_table |
| 1437 | p4_action: count_egress |
| 1438 | address_to_use: 0 |
| 1439 | full_address: 64 |
| 1440 | vliw_instruction_number: 0 |
| 1441 | color: 0 |
| 1442 | direction: ingress |
| 1443 | micro_instructions: |
| 1444 | |
| 1445 | action_to_vliw_mapping: |
| 1446 | action handle 536870916 maps to vliw instruction 0, color 0, and direction ingress and is found in instruction address 0 |
| 1447 | hash_distribution_usages: |
| 1448 | MAU Hash Distribution Resource Usage for P4 table egress_port_count_table |
| 1449 | exact_match_group_resource_allocation : HashMatchGroupResourceAllocation: |
| 1450 | match_groups: [(0, 16)] |
| 1451 | match_group_key_bit_width: 73 |
| 1452 | match_group_phv_bit_scrambling: OrderedDict([(('ig_intr_md_for_tm.ucast_egress_port', 0), 64), (('ig_intr_md_for_tm.ucast_egress_port', 1), 65), (('ig_intr_md_for_tm.ucast_egress_port', 2), 66), (('ig_intr_md_for_tm.ucast_egress_port', 3), 67), (('ig_intr_md_for_tm.ucast_egress_port', 4), 68), (('ig_intr_md_for_tm.ucast_egress_port', 5), 69), (('ig_intr_md_for_tm.ucast_egress_port', 6), 70), (('ig_intr_md_for_tm.ucast_egress_port', 7), 71), (('ig_intr_md_for_tm.ucast_egress_port', 8), 72)]) |
| 1453 | ('ig_intr_md_for_tm.ucast_egress_port', 0) -> 64 |
| 1454 | ('ig_intr_md_for_tm.ucast_egress_port', 1) -> 65 |
| 1455 | ('ig_intr_md_for_tm.ucast_egress_port', 2) -> 66 |
| 1456 | ('ig_intr_md_for_tm.ucast_egress_port', 3) -> 67 |
| 1457 | ('ig_intr_md_for_tm.ucast_egress_port', 4) -> 68 |
| 1458 | ('ig_intr_md_for_tm.ucast_egress_port', 5) -> 69 |
| 1459 | ('ig_intr_md_for_tm.ucast_egress_port', 6) -> 70 |
| 1460 | ('ig_intr_md_for_tm.ucast_egress_port', 7) -> 71 |
| 1461 | ('ig_intr_md_for_tm.ucast_egress_port', 8) -> 72 |
| 1462 | hash_function_dictionary: OrderedDict([(0, <p4c_tofino.target.tofino.llir.mau.stage.resources.hash_function.HashFunction object at 0x7f1960df4450>)]) |
| 1463 | hash_group_id: 1 |
| 1464 | seed: [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] |
| 1465 | table_direction: ingress |
| 1466 | |
| 1467 | hash_distribution_resource_allocations : |
| 1468 | Hash Distribution: |
| 1469 | source_hash_group : 1 |
| 1470 | hash_distribution_hash_id : 1 |
| 1471 | hash_distribution_group_id : 0 |
| 1472 | hash_distribution_used_for : Statistics Address |
| 1473 | table_direction : ingress |
| 1474 | bits_to_use : [0, 1, 2, 3, 4, 5, 6, 7, 8, 9] |
| 1475 | left_shift : 1 |
| 1476 | expanded_lo : False |
| 1477 | expanded_hi : False |
| 1478 | expanded_bit_width : 0 |
| 1479 | immediate_position : unused |
| 1480 | |
| 1481 | |
| 1482 | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1483 | Cannot find table object for 'process_packet_out_table_always_true_condition'. |
| 1484 | Cannot find table object for 'process_packet_out_table_always_true_condition'. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1485 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1486 | Cannot find table object for 'process_packet_out_table_always_true_condition'. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1487 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1488 | Cannot find table object for 'process_packet_out_table_always_true_condition'. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1489 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1490 | Cannot find table object for 'process_packet_out_table_always_true_condition'. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1491 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1492 | Cannot find table object for 'process_packet_out_table_always_true_condition'. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1493 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1494 | Cannot find table object for 'process_packet_out_table_always_true_condition'. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1495 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1496 | Cannot find table object for 'process_packet_out_table_always_true_condition'. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1497 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1498 | Cannot find table object for 'process_packet_out_table_always_true_condition'. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1499 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1500 | Cannot find table object for 'process_packet_out_table_always_true_condition'. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1501 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1502 | Cannot find table object for 'process_packet_out_table_always_true_condition'. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1503 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 1504 | Cannot find table object for 'process_packet_out_table_always_true_condition'. |
| 1505 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
| 1506 | Cannot find table object for 'process_packet_out_table_always_true_condition'. |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1507 | Skipping p4_primitive StageModifyFieldFromHashBitsPrimitive from overhead calculation. |
| 1508 | Action ecmp_group for table table0 cannot be used as a default action (table miss action). The action requires the use of hash distribution, which is not available when a table misses. |
| 1509 | Field ig_intr_md_for_tm.ucast_egress_port not contiguous on gateway input |
| 1510 | Field ig_intr_md_for_tm.ucast_egress_port not contiguous on gateway input |
| 1511 | Writing configuration registers: regs.match_action_stage.00 |
| 1512 | Writing configuration registers: regs.match_action_stage.01 |
| 1513 | Writing configuration registers: regs.match_action_stage.02 |
| 1514 | Writing configuration registers: regs.match_action_stage.03 |
| 1515 | Writing configuration registers: regs.match_action_stage.04 |
| 1516 | Writing configuration registers: regs.match_action_stage.05 |
| 1517 | Writing configuration registers: regs.match_action_stage.06 |
| 1518 | Writing configuration registers: regs.match_action_stage.07 |
| 1519 | Writing configuration registers: regs.match_action_stage.08 |
| 1520 | Writing configuration registers: regs.match_action_stage.09 |
| 1521 | Writing configuration registers: regs.match_action_stage.0a |
| 1522 | Writing configuration registers: regs.match_action_stage.0b |