Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame^] | 1 | +---------------------------------------------------------------------+ |
| 2 | | Log file: mau.log | |
| 3 | | Compiler version: 5.1.0 (fca32d1) | |
| 4 | | Created on: Thu Sep 7 14:49:38 2017 | |
| 5 | +---------------------------------------------------------------------+ |
| 6 | |
| 7 | Match Table table0 did not specify the number of entries required. A default value (512) will be used. |
| 8 | Match Table ecmp_group_table did not specify the number of entries required. A default value (1024) will be used. |
| 9 | Match Entry Table table0 has already been associated with stat Table table0_counter. |
| 10 | Match Entry Table ecmp_group_table has already been associated with stat Table ecmp_group_table_counter. |
| 11 | Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition |
| 12 | Match Table table0 did not specify the number of entries required. A default value (512) will be used. |
| 13 | Match Table ecmp_group_table did not specify the number of entries required. A default value (1024) will be used. |
| 14 | Match Entry Table table0 has already been associated with stat Table table0_counter. |
| 15 | Match Entry Table ecmp_group_table has already been associated with stat Table ecmp_group_table_counter. |
| 16 | Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition |
| 17 | Match Table table0 did not specify the number of entries required. A default value (512) will be used. |
| 18 | Match Table ecmp_group_table did not specify the number of entries required. A default value (1024) will be used. |
| 19 | POV/metadata bridge containers added between ingress/egress: [0, 64, 128] |
| 20 | Metadata bridge_ingress_intrinsic containers added between ingress/egress: [128] |
| 21 | Match Entry Table table0 has already been associated with stat Table table0_counter. |
| 22 | Match Entry Table ecmp_group_table has already been associated with stat Table ecmp_group_table_counter. |
| 23 | Match table ingress_port_count_table has no match key fields |
| 24 | Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 254. |
| 25 | |
| 26 | ########################################## |
| 27 | Call to decide_action_data_placement(stage=0, table=ingress_port_count_table) |
| 28 | ########################################## |
| 29 | |
| 30 | |
| 31 | Max immediate bits used in any action is 0 bits. |
| 32 | Overhead bit width for table ingress_port_count_table is 22 bits. |
| 33 | Bits available in overhead for non-essential immediate data is 32 bits. |
| 34 | ~~~~~~~~~~~~~~~~~~~~~ |
| 35 | Examining placing 0 bits in match overhead |
| 36 | Overhead bit width for table ingress_port_count_table is 22 bits. |
| 37 | Overhead SRAMs to use = 97 |
| 38 | Entries requested = 1024 and match entries get = 0 |
| 39 | ram_size_matrix = |
| 40 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 41 | 0 0 0 0 0 0 0 0 # 0 |
| 42 | |
| 43 | immediate_size_matrix = |
| 44 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 45 | 0 0 0 0 0 0 0 0 # 0 |
| 46 | |
| 47 | hash_to_phv_matrix = |
| 48 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 49 | 0 0 0 0 0 0 0 0 # 0 |
| 50 | |
| 51 | total action ram packing size = [0, 0, 0] |
| 52 | action_ram_packing: |
| 53 | action count_ingress has [] |
| 54 | total action ram packing size = [0, 0, 0] |
| 55 | action_ram_packing: |
| 56 | action count_ingress has [] |
| 57 | total action ram packing size = [0, 0, 0] |
| 58 | action_ram_packing: |
| 59 | action count_ingress has [] |
| 60 | byte_enables = [] |
| 61 | After allocation of 32s, available_slots is [] |
| 62 | final packing is [] |
| 63 | byte_enables = [] |
| 64 | After allocation of 32s, available_slots is [] |
| 65 | final packing is [] |
| 66 | byte_enables = [] |
| 67 | After allocation of 32s, available_slots is [] |
| 68 | final packing is [] |
| 69 | Action Data SRAMs to use = 0 |
| 70 | TODO: Total RAMs use when put 0 bits in match overhead: 97 |
| 71 | TODO: Total RAMs use when put 0 bits in match overhead: 97 |
| 72 | ~~~~~~~~~~~~~~~~~~~~~ |
| 73 | Examining placing 8 bits in match overhead |
| 74 | ~~~~~~~~~~~~~~~~~~~~~ |
| 75 | Examining placing 16 bits in match overhead |
| 76 | ~~~~~~~~~~~~~~~~~~~~~ |
| 77 | Examining placing 24 bits in match overhead |
| 78 | ~~~~~~~~~~~~~~~~~~~~~ |
| 79 | Examining placing 32 bits in match overhead |
| 80 | |
| 81 | ########################################## |
| 82 | |
| 83 | Best Ram Usage is 97 rams |
| 84 | Best Immediate placement is 0 bits |
| 85 | Match table egress_port_count_table has no match key fields |
| 86 | Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 254. |
| 87 | |
| 88 | ########################################## |
| 89 | Call to decide_action_data_placement(stage=0, table=egress_port_count_table) |
| 90 | ########################################## |
| 91 | |
| 92 | |
| 93 | Max immediate bits used in any action is 0 bits. |
| 94 | Overhead bit width for table egress_port_count_table is 20 bits. |
| 95 | Bits available in overhead for non-essential immediate data is 32 bits. |
| 96 | ~~~~~~~~~~~~~~~~~~~~~ |
| 97 | Examining placing 0 bits in match overhead |
| 98 | Overhead bit width for table egress_port_count_table is 20 bits. |
| 99 | Overhead SRAMs to use = 97 |
| 100 | Entries requested = 1024 and match entries get = 0 |
| 101 | ram_size_matrix = |
| 102 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 103 | 0 0 0 0 0 0 0 0 # 0 |
| 104 | |
| 105 | immediate_size_matrix = |
| 106 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 107 | 0 0 0 0 0 0 0 0 # 0 |
| 108 | |
| 109 | hash_to_phv_matrix = |
| 110 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 111 | 0 0 0 0 0 0 0 0 # 0 |
| 112 | |
| 113 | total action ram packing size = [0, 0, 0] |
| 114 | action_ram_packing: |
| 115 | action count_egress has [] |
| 116 | total action ram packing size = [0, 0, 0] |
| 117 | action_ram_packing: |
| 118 | action count_egress has [] |
| 119 | total action ram packing size = [0, 0, 0] |
| 120 | action_ram_packing: |
| 121 | action count_egress has [] |
| 122 | byte_enables = [] |
| 123 | After allocation of 32s, available_slots is [] |
| 124 | final packing is [] |
| 125 | byte_enables = [] |
| 126 | After allocation of 32s, available_slots is [] |
| 127 | final packing is [] |
| 128 | byte_enables = [] |
| 129 | After allocation of 32s, available_slots is [] |
| 130 | final packing is [] |
| 131 | Action Data SRAMs to use = 0 |
| 132 | TODO: Total RAMs use when put 0 bits in match overhead: 97 |
| 133 | TODO: Total RAMs use when put 0 bits in match overhead: 97 |
| 134 | ~~~~~~~~~~~~~~~~~~~~~ |
| 135 | Examining placing 8 bits in match overhead |
| 136 | ~~~~~~~~~~~~~~~~~~~~~ |
| 137 | Examining placing 16 bits in match overhead |
| 138 | ~~~~~~~~~~~~~~~~~~~~~ |
| 139 | Examining placing 24 bits in match overhead |
| 140 | ~~~~~~~~~~~~~~~~~~~~~ |
| 141 | Examining placing 32 bits in match overhead |
| 142 | |
| 143 | ########################################## |
| 144 | |
| 145 | Best Ram Usage is 97 rams |
| 146 | Best Immediate placement is 0 bits |
| 147 | |
| 148 | ########################################## |
| 149 | Call to decide_action_data_placement(stage=0, table=ingress_pkt) |
| 150 | ########################################## |
| 151 | |
| 152 | |
| 153 | Max immediate bits used in any action is 0 bits. |
| 154 | Overhead bit width for table ingress_pkt is 2 bits. |
| 155 | Bits available in overhead for non-essential immediate data is 32 bits. |
| 156 | ~~~~~~~~~~~~~~~~~~~~~ |
| 157 | Examining placing 0 bits in match overhead |
| 158 | Overhead bit width for table ingress_pkt is 2 bits. |
| 159 | Overhead SRAMs to use = 97 |
| 160 | Entries requested = 1024 and match entries get = 0 |
| 161 | ram_size_matrix = |
| 162 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 163 | 0 0 0 0 0 0 0 0 # 0 |
| 164 | |
| 165 | immediate_size_matrix = |
| 166 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 167 | 0 0 0 0 0 0 0 0 # 0 |
| 168 | |
| 169 | hash_to_phv_matrix = |
| 170 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 171 | 0 0 0 0 0 0 0 0 # 0 |
| 172 | |
| 173 | total action ram packing size = [0, 0, 0] |
| 174 | action_ram_packing: |
| 175 | action _packet_out has [] |
| 176 | total action ram packing size = [0, 0, 0] |
| 177 | action_ram_packing: |
| 178 | action _packet_out has [] |
| 179 | total action ram packing size = [0, 0, 0] |
| 180 | action_ram_packing: |
| 181 | action _packet_out has [] |
| 182 | byte_enables = [] |
| 183 | After allocation of 32s, available_slots is [] |
| 184 | final packing is [] |
| 185 | byte_enables = [] |
| 186 | After allocation of 32s, available_slots is [] |
| 187 | final packing is [] |
| 188 | byte_enables = [] |
| 189 | After allocation of 32s, available_slots is [] |
| 190 | final packing is [] |
| 191 | Action Data SRAMs to use = 0 |
| 192 | TODO: Total RAMs use when put 0 bits in match overhead: 97 |
| 193 | TODO: Total RAMs use when put 0 bits in match overhead: 97 |
| 194 | ~~~~~~~~~~~~~~~~~~~~~ |
| 195 | Examining placing 8 bits in match overhead |
| 196 | ~~~~~~~~~~~~~~~~~~~~~ |
| 197 | Examining placing 16 bits in match overhead |
| 198 | ~~~~~~~~~~~~~~~~~~~~~ |
| 199 | Examining placing 24 bits in match overhead |
| 200 | ~~~~~~~~~~~~~~~~~~~~~ |
| 201 | Examining placing 32 bits in match overhead |
| 202 | |
| 203 | ########################################## |
| 204 | |
| 205 | Best Ram Usage is 97 rams |
| 206 | Best Immediate placement is 0 bits |
| 207 | |
| 208 | ########################################## |
| 209 | Call to decide_action_data_placement(stage=0, table=egress_pkt) |
| 210 | ########################################## |
| 211 | |
| 212 | |
| 213 | Max immediate bits used in any action is 0 bits. |
| 214 | Overhead bit width for table egress_pkt is 2 bits. |
| 215 | Bits available in overhead for non-essential immediate data is 32 bits. |
| 216 | ~~~~~~~~~~~~~~~~~~~~~ |
| 217 | Examining placing 0 bits in match overhead |
| 218 | Overhead bit width for table egress_pkt is 2 bits. |
| 219 | Overhead SRAMs to use = 97 |
| 220 | Entries requested = 1024 and match entries get = 0 |
| 221 | ram_size_matrix = |
| 222 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 223 | 0 0 0 0 0 0 0 0 # 0 |
| 224 | |
| 225 | immediate_size_matrix = |
| 226 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 227 | 0 0 0 0 0 0 0 0 # 0 |
| 228 | |
| 229 | hash_to_phv_matrix = |
| 230 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 231 | 0 0 0 0 0 0 0 0 # 0 |
| 232 | |
| 233 | total action ram packing size = [0, 0, 0] |
| 234 | action_ram_packing: |
| 235 | action add_packet_in_hdr has [] |
| 236 | total action ram packing size = [0, 0, 0] |
| 237 | action_ram_packing: |
| 238 | action add_packet_in_hdr has [] |
| 239 | total action ram packing size = [0, 0, 0] |
| 240 | action_ram_packing: |
| 241 | action add_packet_in_hdr has [] |
| 242 | byte_enables = [] |
| 243 | After allocation of 32s, available_slots is [] |
| 244 | final packing is [] |
| 245 | byte_enables = [] |
| 246 | After allocation of 32s, available_slots is [] |
| 247 | final packing is [] |
| 248 | byte_enables = [] |
| 249 | After allocation of 32s, available_slots is [] |
| 250 | final packing is [] |
| 251 | Action Data SRAMs to use = 0 |
| 252 | TODO: Total RAMs use when put 0 bits in match overhead: 97 |
| 253 | TODO: Total RAMs use when put 0 bits in match overhead: 97 |
| 254 | ~~~~~~~~~~~~~~~~~~~~~ |
| 255 | Examining placing 8 bits in match overhead |
| 256 | ~~~~~~~~~~~~~~~~~~~~~ |
| 257 | Examining placing 16 bits in match overhead |
| 258 | ~~~~~~~~~~~~~~~~~~~~~ |
| 259 | Examining placing 24 bits in match overhead |
| 260 | ~~~~~~~~~~~~~~~~~~~~~ |
| 261 | Examining placing 32 bits in match overhead |
| 262 | |
| 263 | ########################################## |
| 264 | |
| 265 | Best Ram Usage is 97 rams |
| 266 | Best Immediate placement is 0 bits |
| 267 | Cannot use hash-action for table ecmp_group_table because it has more than one side-effect table |
| 268 | |
| 269 | ########################################## |
| 270 | Call to decide_action_data_placement(stage=0, table=ecmp_group_table) |
| 271 | ########################################## |
| 272 | |
| 273 | |
| 274 | Max immediate bits used in any action is 0 bits. |
| 275 | Overhead bit width for table ecmp_group_table is 0 bits. |
| 276 | Bits available in overhead for non-essential immediate data is 32 bits. |
| 277 | ~~~~~~~~~~~~~~~~~~~~~ |
| 278 | Examining placing 0 bits in match overhead |
| 279 | Overhead bit width for table ecmp_group_table is 0 bits. |
| 280 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 281 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
| 282 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[7:0]}. |
| 283 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[15:8]}. |
| 284 | |
| 285 | --------------------------------------------- |
| 286 | Call to can_any_match_key_fields_be_shared(stage=0, table=ecmp_group_table) |
| 287 | --------------------------------------------- |
| 288 | Decided way to allocate for table ecmp_group_table in stage 0 WAS non_shared |
| 289 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 290 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
| 291 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[7:0]}. |
| 292 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[15:8]}. |
| 293 | Overhead SRAMs to use = 3 |
| 294 | Entries requested = 1024 and match entries get = 3072 |
| 295 | ram_size_matrix = |
| 296 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 297 | 0 0 0 1 0 0 0 0 # 0 |
| 298 | |
| 299 | immediate_size_matrix = |
| 300 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 301 | 0 0 0 0 0 0 0 0 # 0 |
| 302 | |
| 303 | hash_to_phv_matrix = |
| 304 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 305 | 0 0 0 0 0 0 0 0 # 0 |
| 306 | |
| 307 | total action ram packing size = [16, 0, 0] |
| 308 | action_ram_packing: |
| 309 | action set_egress_port has [(16, 16, False)] |
| 310 | total action ram packing size = [16, 0, 0] |
| 311 | action_ram_packing: |
| 312 | action set_egress_port has [] |
| 313 | total action ram packing size = [16, 0, 0] |
| 314 | action_ram_packing: |
| 315 | action set_egress_port has [] |
| 316 | byte_enables = [1, 1] |
| 317 | Allocating Action Parameter Bus Byte 32 in stage 0 for Byte 0 of 16-bit constant |
| 318 | Allocating Action Parameter Bus Byte 33 in stage 0 for Byte 1 of 16-bit constant |
| 319 | Allocating Action Parameter Bus Byte 34 in stage 0 for Byte 0 of 16-bit constant |
| 320 | Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant |
| 321 | After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)] |
| 322 | final packing is [(16, 16, False)] |
| 323 | byte_enables = [] |
| 324 | After allocation of 32s, available_slots is [] |
| 325 | final packing is [] |
| 326 | byte_enables = [] |
| 327 | After allocation of 32s, available_slots is [] |
| 328 | final packing is [] |
| 329 | Action Data SRAMs to use = 1 |
| 330 | TODO: Total RAMs use when put 0 bits in match overhead: 4 |
| 331 | TODO: Total RAMs use when put 0 bits in match overhead: 4 |
| 332 | ~~~~~~~~~~~~~~~~~~~~~ |
| 333 | Examining placing 8 bits in match overhead |
| 334 | ~~~~~~~~~~~~~~~~~~~~~ |
| 335 | Examining placing 16 bits in match overhead |
| 336 | Overhead bit width for table ecmp_group_table is 0 bits. |
| 337 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 338 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
| 339 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[7:0]}. |
| 340 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[15:8]}. |
| 341 | |
| 342 | --------------------------------------------- |
| 343 | Call to can_any_match_key_fields_be_shared(stage=0, table=ecmp_group_table) |
| 344 | --------------------------------------------- |
| 345 | Decided way to allocate for table ecmp_group_table in stage 0 WAS non_shared |
| 346 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 347 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
| 348 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[7:0]}. |
| 349 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[15:8]}. |
| 350 | Overhead SRAMs to use = 3 |
| 351 | Entries requested = 1024 and match entries get = 3072 |
| 352 | ram_size_matrix = |
| 353 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 354 | 0 0 0 0 0 0 0 0 # 0 |
| 355 | |
| 356 | immediate_size_matrix = |
| 357 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 358 | 0 0 0 1 0 0 0 0 # 0 |
| 359 | |
| 360 | hash_to_phv_matrix = |
| 361 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 362 | 0 0 0 0 0 0 0 0 # 0 |
| 363 | |
| 364 | total action ram packing size = [0, 0, 0] |
| 365 | action_ram_packing: |
| 366 | action set_egress_port has [] |
| 367 | total action ram packing size = [0, 16, 0] |
| 368 | action_ram_packing: |
| 369 | action set_egress_port has [(16, 16, False)] |
| 370 | total action ram packing size = [0, 16, 0] |
| 371 | action_ram_packing: |
| 372 | action set_egress_port has [] |
| 373 | byte_enables = [] |
| 374 | After allocation of 32s, available_slots is [] |
| 375 | final packing is [] |
| 376 | byte_enables = [1, 1] |
| 377 | Allocating Action Parameter Bus Byte 32 in stage 0 for Byte 0 of 16-bit constant |
| 378 | Allocating Action Parameter Bus Byte 33 in stage 0 for Byte 1 of 16-bit constant |
| 379 | Allocating Action Parameter Bus Byte 34 in stage 0 for Byte 0 of 16-bit constant |
| 380 | Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant |
| 381 | After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)] |
| 382 | final packing is [(16, 16, False)] |
| 383 | byte_enables = [] |
| 384 | After allocation of 32s, available_slots is [] |
| 385 | final packing is [] |
| 386 | Action Data SRAMs to use = 0 |
| 387 | TODO: Total RAMs use when put 16 bits in match overhead: 3 |
| 388 | TODO: Total RAMs use when put 16 bits in match overhead: 3 |
| 389 | ~~~~~~~~~~~~~~~~~~~~~ |
| 390 | Examining placing 24 bits in match overhead |
| 391 | Overhead bit width for table ecmp_group_table is 0 bits. |
| 392 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 393 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
| 394 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[7:0]}. |
| 395 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[15:8]}. |
| 396 | |
| 397 | --------------------------------------------- |
| 398 | Call to can_any_match_key_fields_be_shared(stage=0, table=ecmp_group_table) |
| 399 | --------------------------------------------- |
| 400 | Decided way to allocate for table ecmp_group_table in stage 0 WAS non_shared |
| 401 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 402 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
| 403 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[7:0]}. |
| 404 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[15:8]}. |
| 405 | Overhead SRAMs to use = 3 |
| 406 | Entries requested = 1024 and match entries get = 3072 |
| 407 | ram_size_matrix = |
| 408 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 409 | 0 0 0 0 0 0 0 0 # 0 |
| 410 | |
| 411 | immediate_size_matrix = |
| 412 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 413 | 0 0 0 1 0 0 0 0 # 0 |
| 414 | |
| 415 | hash_to_phv_matrix = |
| 416 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 417 | 0 0 0 0 0 0 0 0 # 0 |
| 418 | |
| 419 | total action ram packing size = [0, 0, 0] |
| 420 | action_ram_packing: |
| 421 | action set_egress_port has [] |
| 422 | total action ram packing size = [0, 16, 0] |
| 423 | action_ram_packing: |
| 424 | action set_egress_port has [(16, 16, False)] |
| 425 | total action ram packing size = [0, 16, 0] |
| 426 | action_ram_packing: |
| 427 | action set_egress_port has [] |
| 428 | byte_enables = [] |
| 429 | After allocation of 32s, available_slots is [] |
| 430 | final packing is [] |
| 431 | byte_enables = [1, 1] |
| 432 | Allocating Action Parameter Bus Byte 32 in stage 0 for Byte 0 of 16-bit constant |
| 433 | Allocating Action Parameter Bus Byte 33 in stage 0 for Byte 1 of 16-bit constant |
| 434 | Allocating Action Parameter Bus Byte 34 in stage 0 for Byte 0 of 16-bit constant |
| 435 | Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant |
| 436 | After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)] |
| 437 | final packing is [(16, 16, False)] |
| 438 | byte_enables = [] |
| 439 | After allocation of 32s, available_slots is [] |
| 440 | final packing is [] |
| 441 | Action Data SRAMs to use = 0 |
| 442 | TODO: Total RAMs use when put 24 bits in match overhead: 3 |
| 443 | TODO: Total RAMs use when put 24 bits in match overhead: 3 |
| 444 | ~~~~~~~~~~~~~~~~~~~~~ |
| 445 | Examining placing 32 bits in match overhead |
| 446 | Overhead bit width for table ecmp_group_table is 0 bits. |
| 447 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 448 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
| 449 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[7:0]}. |
| 450 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[15:8]}. |
| 451 | |
| 452 | --------------------------------------------- |
| 453 | Call to can_any_match_key_fields_be_shared(stage=0, table=ecmp_group_table) |
| 454 | --------------------------------------------- |
| 455 | Decided way to allocate for table ecmp_group_table in stage 0 WAS non_shared |
| 456 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 457 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
| 458 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[7:0]}. |
| 459 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[15:8]}. |
| 460 | Overhead SRAMs to use = 3 |
| 461 | Entries requested = 1024 and match entries get = 3072 |
| 462 | ram_size_matrix = |
| 463 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 464 | 0 0 0 0 0 0 0 0 # 0 |
| 465 | |
| 466 | immediate_size_matrix = |
| 467 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 468 | 0 0 0 1 0 0 0 0 # 0 |
| 469 | |
| 470 | hash_to_phv_matrix = |
| 471 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 472 | 0 0 0 0 0 0 0 0 # 0 |
| 473 | |
| 474 | total action ram packing size = [0, 0, 0] |
| 475 | action_ram_packing: |
| 476 | action set_egress_port has [] |
| 477 | total action ram packing size = [0, 16, 0] |
| 478 | action_ram_packing: |
| 479 | action set_egress_port has [(16, 16, False)] |
| 480 | total action ram packing size = [0, 16, 0] |
| 481 | action_ram_packing: |
| 482 | action set_egress_port has [] |
| 483 | byte_enables = [] |
| 484 | After allocation of 32s, available_slots is [] |
| 485 | final packing is [] |
| 486 | byte_enables = [1, 1] |
| 487 | Allocating Action Parameter Bus Byte 32 in stage 0 for Byte 0 of 16-bit constant |
| 488 | Allocating Action Parameter Bus Byte 33 in stage 0 for Byte 1 of 16-bit constant |
| 489 | Allocating Action Parameter Bus Byte 34 in stage 0 for Byte 0 of 16-bit constant |
| 490 | Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant |
| 491 | After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)] |
| 492 | final packing is [(16, 16, False)] |
| 493 | byte_enables = [] |
| 494 | After allocation of 32s, available_slots is [] |
| 495 | final packing is [] |
| 496 | Action Data SRAMs to use = 0 |
| 497 | TODO: Total RAMs use when put 32 bits in match overhead: 3 |
| 498 | TODO: Total RAMs use when put 32 bits in match overhead: 3 |
| 499 | |
| 500 | ########################################## |
| 501 | |
| 502 | Best Ram Usage is 3 rams |
| 503 | Best Immediate placement is 16 bits |
| 504 | Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition |
| 505 | |
| 506 | ---------------------------------------------- |
| 507 | Call to Allocate P4 Table with table ingress_pkt__action__, number_entries = 1024, table id = None, and match type = exact |
| 508 | Allocating in stage 0 |
| 509 | ---------------------------------------------- |
| 510 | |
| 511 | ram_size_matrix = |
| 512 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 513 | 0 0 0 0 0 0 0 0 # 0 |
| 514 | |
| 515 | immediate_size_matrix = |
| 516 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 517 | 0 0 0 0 0 0 0 0 # 0 |
| 518 | |
| 519 | hash_to_phv_matrix = |
| 520 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 521 | 0 0 0 0 0 0 0 0 # 0 |
| 522 | |
| 523 | total action ram packing size = [0, 0, 0] |
| 524 | action_ram_packing: |
| 525 | action _packet_out has [] |
| 526 | total action ram packing size = [0, 0, 0] |
| 527 | action_ram_packing: |
| 528 | action _packet_out has [] |
| 529 | total action ram packing size = [0, 0, 0] |
| 530 | action_ram_packing: |
| 531 | action _packet_out has [] |
| 532 | byte_enables = [] |
| 533 | After allocation of 32s, available_slots is [] |
| 534 | final packing is [] |
| 535 | byte_enables = [] |
| 536 | After allocation of 32s, available_slots is [] |
| 537 | final packing is [] |
| 538 | byte_enables = [] |
| 539 | After allocation of 32s, available_slots is [] |
| 540 | final packing is [] |
| 541 | Allocating Action Logical Table ID 0 in stage 0 |
| 542 | |
| 543 | ---------------------------------------------- |
| 544 | Call to Allocate P4 Table with table ingress_pkt, number_entries = 1024, table id = None, and match type = exact |
| 545 | Allocating in stage 0 |
| 546 | ---------------------------------------------- |
| 547 | |
| 548 | Logical Table ID in stage 0 was not supplied by table placement for table ingress_pkt. |
| 549 | Allocating Logical Table ID 0 in stage 0 |
| 550 | Allocating Table Type ID 0 of type exact in stage 0 |
| 551 | Match Overhead: |
| 552 | Field --version_valid-- [3:0] (4 bits) |
| 553 | Field --instruction_address-- [1:0] (2 bits) |
| 554 | |
| 555 | Logical Table ID in stage 0 was not supplied by table placement for table ingress_pkt. |
| 556 | Allocating Logical Table ID 0 in stage 0 |
| 557 | Allocating Table Type ID 0 of type exact in stage 0 |
| 558 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}. |
| 559 | Match Table Resource Request is: |
| 560 | SRAM Resource Request for table ingress_pkt (of type match), with 0 ways wants 0 rams. |
| 561 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}. |
| 562 | For action _packet_out, formed micro_instruction: |
| 563 | Micro Instruction deposit-field for PHV Container 130 has bit width 23 |
| 564 | Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0]) |
| 565 | Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4]) |
| 566 | Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9]) |
| 567 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 568 | Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11]) |
| 569 | Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15]) |
| 570 | Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16]) |
| 571 | Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20]) |
| 572 | |
| 573 | For action _packet_out, formed micro_instruction: |
| 574 | Micro Instruction deposit-field for PHV Container 68 has bit width 20 |
| 575 | Field Src2 [3:0] : 0x4 (4 bits in instruction bits [3:0]) |
| 576 | Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4]) |
| 577 | Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9]) |
| 578 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 579 | Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11]) |
| 580 | Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14]) |
| 581 | Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16]) |
| 582 | Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19]) |
| 583 | |
| 584 | Allocating Action ALU 2 (16 bits) in stage 0 for match table ingress_pkt's action _packet_out |
| 585 | Allocating Action ALU 4 (8 bits) in stage 0 for match table ingress_pkt's action _packet_out |
| 586 | Allocating VLIW Instruction : 0 in stage 0 for match table ingress_pkt's action _packet_out |
| 587 | |
| 588 | ---------------------------------------------- |
| 589 | Call to Allocate P4 Table with table table0__action__, number_entries = 512, table id = None, and match type = exact |
| 590 | Allocating in stage 1 |
| 591 | ---------------------------------------------- |
| 592 | |
| 593 | ram_size_matrix = |
| 594 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 595 | 0 0 0 1 0 0 0 0 # 0 |
| 596 | 0 0 0 1 0 0 0 0 # 1 |
| 597 | 0 0 0 0 0 0 0 0 # 2 |
| 598 | 0 0 0 0 0 0 0 0 # 3 |
| 599 | |
| 600 | immediate_size_matrix = |
| 601 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 602 | 0 0 0 0 0 0 0 0 # 0 |
| 603 | 0 0 0 0 0 0 0 0 # 1 |
| 604 | 0 0 0 0 0 0 0 0 # 2 |
| 605 | 0 0 0 0 0 0 0 0 # 3 |
| 606 | |
| 607 | hash_to_phv_matrix = |
| 608 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 609 | 0 0 0 0 0 0 0 0 # 0 |
| 610 | 0 0 0 1 0 0 0 0 # 1 |
| 611 | 0 0 0 0 0 0 0 0 # 2 |
| 612 | 0 0 0 0 0 0 0 0 # 3 |
| 613 | |
| 614 | total action ram packing size = [16, 0, 0] |
| 615 | action_ram_packing: |
| 616 | action set_egress_port has [(16, 16, False)] |
| 617 | action ecmp_group has [(16, 16, False)] |
| 618 | action send_to_cpu has [] |
| 619 | action _drop has [] |
| 620 | total action ram packing size = [16, 0, 0] |
| 621 | action_ram_packing: |
| 622 | action set_egress_port has [] |
| 623 | action ecmp_group has [] |
| 624 | action send_to_cpu has [] |
| 625 | action _drop has [] |
| 626 | total action ram packing size = [16, 0, 16] |
| 627 | action_ram_packing: |
| 628 | action set_egress_port has [(16, 0, False)] |
| 629 | action ecmp_group has [(16, 16, False)] |
| 630 | action send_to_cpu has [(16, 0, False)] |
| 631 | action _drop has [(16, 0, False)] |
| 632 | byte_enables = [1, 1] |
| 633 | Allocating Action Parameter Bus Byte 32 in stage 1 for Byte 0 of 16-bit constant |
| 634 | Allocating Action Parameter Bus Byte 33 in stage 1 for Byte 1 of 16-bit constant |
| 635 | Allocating Action Parameter Bus Byte 34 in stage 1 for Byte 0 of 16-bit constant |
| 636 | Allocating Action Parameter Bus Byte 35 in stage 1 for Byte 1 of 16-bit constant |
| 637 | After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)] |
| 638 | final packing is [(16, 16, False)] |
| 639 | final packing is [(16, 16, False)] |
| 640 | final packing is [] |
| 641 | final packing is [] |
| 642 | byte_enables = [] |
| 643 | After allocation of 32s, available_slots is [] |
| 644 | final packing is [] |
| 645 | final packing is [] |
| 646 | final packing is [] |
| 647 | final packing is [] |
| 648 | byte_enables = [1, 1] |
| 649 | Allocating Action Parameter Bus Byte 36 in stage 1 for Byte 0 of 16-bit constant |
| 650 | Allocating Action Parameter Bus Byte 37 in stage 1 for Byte 1 of 16-bit constant |
| 651 | Allocating Action Parameter Bus Byte 38 in stage 1 for Byte 0 of 16-bit constant |
| 652 | Allocating Action Parameter Bus Byte 39 in stage 1 for Byte 1 of 16-bit constant |
| 653 | After allocation of 32s, available_slots is [(16, 2, 0), (32, 9, 0), (16, 3, 16)] |
| 654 | final packing is [(16, 0, False)] |
| 655 | final packing is [(16, 16, False)] |
| 656 | final packing is [(16, 0, False)] |
| 657 | final packing is [(16, 0, False)] |
| 658 | ---------------------------------------------- |
| 659 | Call to allocate_hash_distribution_units with |
| 660 | hash_algorithm = crc32 |
| 661 | hash_output_width = 32 |
| 662 | hash_bits_need = 1 |
| 663 | output_hash_bit_start = 0 |
| 664 | immediate_bit_positions = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] |
| 665 | used_for = Immediate |
| 666 | ---------------------------------------------- |
| 667 | available_tuples_sorted_by_parity_bytes_available = [(0, 3, 0), (1, 3, 0)] |
| 668 | available_tuples_split_sorted_by_parity_bytes_available = [] |
| 669 | Allocate fresh exact match group / hash group |
| 670 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {udp.dstPort[7:0]}. |
| 671 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {udp.dstPort[15:8]}. |
| 672 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {udp.srcPort[7:0]}. |
| 673 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {udp.srcPort[15:8]}. |
| 674 | Allocating: Byte 4 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ipv4.dstAddr[7:0]}. |
| 675 | Allocating: Byte 5 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ipv4.dstAddr[15:8]}. |
| 676 | Allocating: Byte 6 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ipv4.dstAddr[23:16]}. |
| 677 | Allocating: Byte 7 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ipv4.dstAddr[31:24]}. |
| 678 | Allocating: Byte 8 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {ipv4.srcAddr[31:24]}. |
| 679 | Allocating: Byte 9 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {ipv4.srcAddr[15:8]}. |
| 680 | Allocating: Byte 10 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {ipv4.srcAddr[7:0]}. |
| 681 | Allocating: Byte 11 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {ipv4.srcAddr[23:16]}. |
| 682 | ------------------- |
| 683 | Call to _allocate_hash_distribution_and_hash_bits |
| 684 | p4_table = table0__action__ |
| 685 | used_for = Immediate |
| 686 | hash_distribution_hash_id = 0 |
| 687 | hash_group_id = 0 |
| 688 | hash_bits_in_units = OrderedDict([(0, [0])]) |
| 689 | address_left_shift = 0 |
| 690 | ------------------- |
| 691 | Allocating Hash Distribution Group 0/0 for table table0__action__ in stage 1. |
| 692 | Allocating Hash Bit 0 in hash match group 0 for table table0__action__ in stage 1. |
| 693 | seed = 0x7bd5c66f |
| 694 | set the seed to be [1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] |
| 695 | Hash Function 0 |
| 696 | hash_bit_0 = udp.dstPort[2] ^ udp.dstPort[8] ^ udp.dstPort[12] ^ udp.dstPort[14] ^ udp.dstPort[15] ^ udp.srcPort[0] ^ udp.srcPort[8] ^ udp.srcPort[9] ^ udp.srcPort[10] ^ udp.srcPort[11] ^ udp.srcPort[12] ^ udp.srcPort[14] ^ udp.srcPort[15] ^ ipv4.dstAddr[3] ^ ipv4.dstAddr[6] ^ ipv4.dstAddr[8] ^ ipv4.dstAddr[9] ^ ipv4.dstAddr[11] ^ ipv4.dstAddr[12] ^ ipv4.dstAddr[17] ^ ipv4.dstAddr[18] ^ ipv4.dstAddr[19] ^ ipv4.dstAddr[22] ^ ipv4.dstAddr[25] ^ ipv4.dstAddr[27] ^ ipv4.dstAddr[28] ^ ipv4.dstAddr[30] ^ ipv4.srcAddr[24] ^ ipv4.srcAddr[25] ^ ipv4.srcAddr[26] ^ ipv4.srcAddr[9] ^ ipv4.srcAddr[15] ^ ipv4.srcAddr[0] ^ ipv4.srcAddr[4] ^ ipv4.srcAddr[5] ^ ipv4.srcAddr[6] ^ ipv4.srcAddr[7] ^ ipv4.srcAddr[17] ^ ipv4.srcAddr[19] ^ ipv4.srcAddr[20] ^ ipv4.srcAddr[21] ^ ipv4.srcAddr[22] ^ ipv4.srcAddr[23] ^ 1 |
| 697 | hash_bit_1 = 0 |
| 698 | hash_bit_2 = 0 |
| 699 | hash_bit_3 = 0 |
| 700 | hash_bit_4 = 0 |
| 701 | hash_bit_5 = 0 |
| 702 | hash_bit_6 = 0 |
| 703 | hash_bit_7 = 0 |
| 704 | hash_bit_8 = 0 |
| 705 | hash_bit_9 = 0 |
| 706 | hash_bit_10 = 0 |
| 707 | hash_bit_11 = 0 |
| 708 | hash_bit_12 = 0 |
| 709 | hash_bit_13 = 0 |
| 710 | hash_bit_14 = 0 |
| 711 | hash_bit_15 = 0 |
| 712 | hash_bit_16 = 0 |
| 713 | hash_bit_17 = 0 |
| 714 | hash_bit_18 = 0 |
| 715 | hash_bit_19 = 0 |
| 716 | hash_bit_20 = 0 |
| 717 | hash_bit_21 = 0 |
| 718 | hash_bit_22 = 0 |
| 719 | hash_bit_23 = 0 |
| 720 | hash_bit_24 = 0 |
| 721 | hash_bit_25 = 0 |
| 722 | hash_bit_26 = 0 |
| 723 | hash_bit_27 = 0 |
| 724 | hash_bit_28 = 0 |
| 725 | hash_bit_29 = 0 |
| 726 | hash_bit_30 = 0 |
| 727 | hash_bit_31 = 0 |
| 728 | hash_bit_32 = 0 |
| 729 | hash_bit_33 = 0 |
| 730 | hash_bit_34 = 0 |
| 731 | hash_bit_35 = 0 |
| 732 | hash_bit_36 = 0 |
| 733 | hash_bit_37 = 0 |
| 734 | hash_bit_38 = 0 |
| 735 | hash_bit_39 = 0 |
| 736 | hash_bit_40 = 0 |
| 737 | hash_bit_41 = 0 |
| 738 | hash_bit_42 = 0 |
| 739 | hash_bit_43 = 0 |
| 740 | hash_bit_44 = 0 |
| 741 | hash_bit_45 = 0 |
| 742 | hash_bit_46 = 0 |
| 743 | hash_bit_47 = 0 |
| 744 | hash_bit_48 = 0 |
| 745 | hash_bit_49 = 0 |
| 746 | hash_bit_50 = 0 |
| 747 | hash_bit_51 = 0 |
| 748 | |
| 749 | Allocating Action Logical Table ID 0 in stage 1 |
| 750 | |
| 751 | ---------------------------------------------- |
| 752 | Call to Allocate P4 Table with table table0_counter, number_entries = 512, table id = None, and match type = exact |
| 753 | Allocating in stage 1 |
| 754 | ---------------------------------------------- |
| 755 | |
| 756 | stat_stage_table referenced: direct |
| 757 | stat Table Resource Request is: |
| 758 | SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams. |
| 759 | Sram Resource Request for P4 table table0_counter with handle 67108867 of type statistics in stage 1 |
| 760 | table_type : statistics |
| 761 | rams_for_width : 1 |
| 762 | use_stash : False |
| 763 | number_ways : 1 |
| 764 | way #0 |
| 765 | SRAM Request Group 0 |
| 766 | rams_for_depth : 2 |
| 767 | map_rams : 0 |
| 768 | way_number : 0 |
| 769 | ram_word_select_bits : 0 |
| 770 | ram_enable_select_bits : 0 |
| 771 | |
| 772 | |
| 773 | ---------------------------------------------- |
| 774 | Call to Allocate P4 Table with table table0, number_entries = 512, table id = None, and match type = ternary |
| 775 | Allocating in stage 1 |
| 776 | ---------------------------------------------- |
| 777 | |
| 778 | Logical Table ID in stage 1 was not supplied by table placement for table table0. |
| 779 | Allocating Logical Table ID 0 in stage 1 |
| 780 | Allocating Table Type ID 0 of type ternary in stage 1 |
| 781 | |
| 782 | ----------------------------------------- |
| 783 | Call to allocate_ternary_match_key_2 |
| 784 | ----------------------------------------- |
| 785 | Total crossbar bytes to allocate = 16 |
| 786 | Minimum key bytes required by this match key = 16 |
| 787 | Allocating: Byte 133 is of type ternary and member of group 0 with 1 bytes |
| 788 | version/valid in nibble 1 for table table0. for version/valid |
| 789 | {unused[6:0], ig_intr_md.ingress_port[8:8]}. |
| 790 | Allocating: Byte 128 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[7:0]}. |
| 791 | Allocating: Byte 129 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[15:8]}. |
| 792 | Allocating: Byte 130 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[23:16]}. |
| 793 | Allocating: Byte 131 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[31:24]}. |
| 794 | Allocating: Byte 132 is of type ternary and member of group 0 with 5 bytes. for {ethernet.dstAddr[15:8]}. |
| 795 | Allocating: Byte 134 is of type ternary and member of group 1 with 5 bytes. for {ethernet.dstAddr[31:24]}. |
| 796 | Allocating: Byte 135 is of type ternary and member of group 1 with 5 bytes. for {ethernet.dstAddr[39:32]}. |
| 797 | Allocating: Byte 136 is of type ternary and member of group 1 with 5 bytes. for {ethernet.etherType[7:0]}. |
| 798 | Allocating: Byte 137 is of type ternary and member of group 1 with 5 bytes. for {ethernet.dstAddr[23:16]}. |
| 799 | Allocating: Byte 138 is of type ternary and member of group 1 with 5 bytes. for {ethernet.srcAddr[47:40]}. |
| 800 | Allocating: Byte 139 is of type ternary and member of group 2 with 5 bytes. for {ethernet.etherType[15:8]}. |
| 801 | Allocating: Byte 140 is of type ternary and member of group 2 with 5 bytes. for {ig_intr_md.ingress_port[7:0]}. |
| 802 | Allocating: Byte 141 is of type ternary and member of group 2 with 5 bytes. for {ethernet.dstAddr[7:0]}. |
| 803 | Allocating: Byte 142 is of type ternary and member of group 2 with 5 bytes. for {ethernet.srcAddr[39:32]}. |
| 804 | Allocating: Byte 143 is of type ternary and member of group 2 with 5 bytes. for {ethernet.dstAddr[47:40]}. |
| 805 | Formed Ternary Match Key: |
| 806 | {--unused--[3:0], ethernet.dstAddr[47:40], ethernet.srcAddr[39:32], ethernet.dstAddr[7:0], ig_intr_md.ingress_port[7:0], ethernet.etherType[15:8], --version--[1:0], --unused--[1:0], ethernet.srcAddr[47:40], ethernet.dstAddr[23:16], ethernet.etherType[7:0], ethernet.dstAddr[39:24], --unused--[2:0], ig_intr_md.ingress_port[8:8], ethernet.dstAddr[15:8], ethernet.srcAddr[31:0]} |
| 807 | |
| 808 | --------------------------------------------- |
| 809 | Call to can_any_match_key_fields_be_shared(stage=1, table=table0) |
| 810 | --------------------------------------------- |
| 811 | Decided way to allocate for table table0 in stage 1 WAS non_shared |
| 812 | |
| 813 | ----------------------------------------- |
| 814 | Call to allocate_ternary_match_key_2 |
| 815 | ----------------------------------------- |
| 816 | Total crossbar bytes to allocate = 16 |
| 817 | Minimum key bytes required by this match key = 16 |
| 818 | Allocating: Byte 133 is of type ternary and member of group 0 with 1 bytes |
| 819 | version/valid in nibble 1 for table table0. for version/valid |
| 820 | {unused[6:0], ig_intr_md.ingress_port[8:8]}. |
| 821 | Allocating: Byte 128 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[7:0]}. |
| 822 | Allocating: Byte 129 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[15:8]}. |
| 823 | Allocating: Byte 130 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[23:16]}. |
| 824 | Allocating: Byte 131 is of type ternary and member of group 0 with 5 bytes. for {ethernet.srcAddr[31:24]}. |
| 825 | Allocating: Byte 132 is of type ternary and member of group 0 with 5 bytes. for {ethernet.dstAddr[15:8]}. |
| 826 | Allocating: Byte 134 is of type ternary and member of group 1 with 5 bytes. for {ethernet.dstAddr[31:24]}. |
| 827 | Allocating: Byte 135 is of type ternary and member of group 1 with 5 bytes. for {ethernet.dstAddr[39:32]}. |
| 828 | Allocating: Byte 136 is of type ternary and member of group 1 with 5 bytes. for {ethernet.etherType[7:0]}. |
| 829 | Allocating: Byte 137 is of type ternary and member of group 1 with 5 bytes. for {ethernet.dstAddr[23:16]}. |
| 830 | Allocating: Byte 138 is of type ternary and member of group 1 with 5 bytes. for {ethernet.srcAddr[47:40]}. |
| 831 | Allocating: Byte 139 is of type ternary and member of group 2 with 5 bytes. for {ethernet.etherType[15:8]}. |
| 832 | Allocating: Byte 140 is of type ternary and member of group 2 with 5 bytes. for {ig_intr_md.ingress_port[7:0]}. |
| 833 | Allocating: Byte 141 is of type ternary and member of group 2 with 5 bytes. for {ethernet.dstAddr[7:0]}. |
| 834 | Allocating: Byte 142 is of type ternary and member of group 2 with 5 bytes. for {ethernet.srcAddr[39:32]}. |
| 835 | Allocating: Byte 143 is of type ternary and member of group 2 with 5 bytes. for {ethernet.dstAddr[47:40]}. |
| 836 | Formed Ternary Match Key: |
| 837 | {--unused--[3:0], ethernet.dstAddr[47:40], ethernet.srcAddr[39:32], ethernet.dstAddr[7:0], ig_intr_md.ingress_port[7:0], ethernet.etherType[15:8], --version--[1:0], --unused--[1:0], ethernet.srcAddr[47:40], ethernet.dstAddr[23:16], ethernet.etherType[7:0], ethernet.dstAddr[39:24], --unused--[2:0], ig_intr_md.ingress_port[8:8], ethernet.dstAddr[15:8], ethernet.srcAddr[31:0]} |
| 838 | Skipping p4_primitive StageModifyFieldFromHashBitsPrimitive from overhead calculation. |
| 839 | Allocating: Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}. |
| 840 | Allocating: Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}. |
| 841 | For action set_egress_port, formed micro_instruction: |
| 842 | Micro Instruction deposit-field for PHV Container 130 has bit width 23 |
| 843 | Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0]) |
| 844 | Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4]) |
| 845 | Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9]) |
| 846 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 847 | Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11]) |
| 848 | Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15]) |
| 849 | Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16]) |
| 850 | Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20]) |
| 851 | |
| 852 | Allocating Action ALU 2 (16 bits) in stage 1 for match table table0's action set_egress_port |
| 853 | Allocating VLIW Instruction : 0 in stage 1 for match table table0's action set_egress_port |
| 854 | For action ecmp_group, formed micro_instruction: |
| 855 | Micro Instruction alu_a for PHV Container 134 has bit width 23 |
| 856 | Field Src2 [3:0] : 0x6 (4 bits in instruction bits [3:0]) |
| 857 | Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4]) |
| 858 | Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9]) |
| 859 | Field opcode [9:0] : 0x31e (10 bits in instruction bits [19:10]) |
| 860 | Field unused [2:0] : 0x0 (3 bits in instruction bits [22:20]) |
| 861 | |
| 862 | For action ecmp_group, formed micro_instruction: |
| 863 | Micro Instruction alu_a for PHV Container 135 has bit width 23 |
| 864 | Field Src2 [3:0] : 0x7 (4 bits in instruction bits [3:0]) |
| 865 | Field Src1 [4:0] : 0x2 (5 bits in instruction bits [8:4]) |
| 866 | Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9]) |
| 867 | Field opcode [9:0] : 0x31e (10 bits in instruction bits [19:10]) |
| 868 | Field unused [2:0] : 0x0 (3 bits in instruction bits [22:20]) |
| 869 | |
| 870 | Allocating Action ALU 6 (16 bits) in stage 1 for match table table0's action ecmp_group |
| 871 | Allocating Action ALU 7 (16 bits) in stage 1 for match table table0's action ecmp_group |
| 872 | Allocating VLIW Instruction : 1 in stage 1 for match table table0's action ecmp_group |
| 873 | For action send_to_cpu, formed micro_instruction: |
| 874 | Micro Instruction deposit-field for PHV Container 64 has bit width 20 |
| 875 | Field Src2 [3:0] : 0x0 (4 bits in instruction bits [3:0]) |
| 876 | Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4]) |
| 877 | Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9]) |
| 878 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 879 | Field high_bit [2:0] : 0x0 (3 bits in instruction bits [13:11]) |
| 880 | Field low_bit_lo [1:0] : 0x0 (2 bits in instruction bits [15:14]) |
| 881 | Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16]) |
| 882 | Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19]) |
| 883 | |
| 884 | Allocating Action ALU 0 (8 bits) in stage 1 for match table table0's action send_to_cpu |
| 885 | Allocating VLIW Instruction : 1 in stage 1 for match table table0's action send_to_cpu |
| 886 | For action _drop, formed micro_instruction: |
| 887 | Micro Instruction deposit-field for PHV Container 69 has bit width 20 |
| 888 | Field Src2 [3:0] : 0x5 (4 bits in instruction bits [3:0]) |
| 889 | Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4]) |
| 890 | Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9]) |
| 891 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 892 | Field high_bit [2:0] : 0x7 (3 bits in instruction bits [13:11]) |
| 893 | Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14]) |
| 894 | Field right_rotate [2:0] : 0x3 (3 bits in instruction bits [18:16]) |
| 895 | Field low_bit_hi [0:0] : 0x1 (1 bits in instruction bits [19:19]) |
| 896 | |
| 897 | Allocating Action ALU 5 (8 bits) in stage 1 for match table table0's action _drop |
| 898 | Allocating VLIW Instruction : 2 in stage 1 for match table table0's action _drop |
| 899 | Ternary table Pack Format = |
| 900 | Pack Format: |
| 901 | table_word_width: 141 |
| 902 | memory_word_width: 47 |
| 903 | entries_per_table_word: 1 |
| 904 | number_memory_units_per_table_word: 3 |
| 905 | entry_list: [ |
| 906 | entry_number : 0 |
| 907 | field_list : [ |
| 908 | ] |
| 909 | Field --tcam_parity_2-- [1:0] : in bits [140:139] |
| 910 | Field --unused-- [3:0] : in bits [138:135] |
| 911 | Field ethernet.dstAddr [47:40] : in bits [134:127] |
| 912 | Field ethernet.srcAddr [39:32] : in bits [126:119] |
| 913 | Field ethernet.dstAddr [7:0] : in bits [118:111] |
| 914 | Field ig_intr_md.ingress_port [7:0] : in bits [110:103] |
| 915 | Field ethernet.etherType [15:8] : in bits [102:95] |
| 916 | Field --tcam_payload_2-- [0:0] : in bits [94:94] |
| 917 | Field --tcam_parity_1-- [1:0] : in bits [93:92] |
| 918 | Field --version-- [1:0] : in bits [91:90] |
| 919 | Field --unused-- [1:0] : in bits [89:88] |
| 920 | Field ethernet.srcAddr [47:40] : in bits [87:80] |
| 921 | Field ethernet.dstAddr [23:16] : in bits [79:72] |
| 922 | Field ethernet.etherType [7:0] : in bits [71:64] |
| 923 | Field ethernet.dstAddr [39:24] : in bits [63:48] |
| 924 | Field --tcam_payload_1-- [0:0] : in bits [47:47] |
| 925 | Field --tcam_parity_0-- [1:0] : in bits [46:45] |
| 926 | Field --unused-- [2:0] : in bits [44:42] |
| 927 | Field ig_intr_md.ingress_port [8:8] : in bits [41:41] |
| 928 | Field ethernet.dstAddr [15:8] : in bits [40:33] |
| 929 | Field ethernet.srcAddr [31:0] : in bits [32:1] |
| 930 | Field --tcam_payload_0-- [0:0] : in bits [0:0] |
| 931 | ] |
| 932 | |
| 933 | |
| 934 | ---------------------------------------------- |
| 935 | Call to Allocate P4 Table with table ecmp_group_table__action__, number_entries = 1024, table id = None, and match type = exact |
| 936 | Allocating in stage 2 |
| 937 | ---------------------------------------------- |
| 938 | |
| 939 | ram_size_matrix = |
| 940 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 941 | 0 0 0 0 0 0 0 0 # 0 |
| 942 | |
| 943 | immediate_size_matrix = |
| 944 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 945 | 0 0 0 1 0 0 0 0 # 0 |
| 946 | |
| 947 | hash_to_phv_matrix = |
| 948 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 949 | 0 0 0 0 0 0 0 0 # 0 |
| 950 | |
| 951 | total action ram packing size = [0, 0, 0] |
| 952 | action_ram_packing: |
| 953 | action set_egress_port has [] |
| 954 | total action ram packing size = [0, 16, 0] |
| 955 | action_ram_packing: |
| 956 | action set_egress_port has [(16, 16, False)] |
| 957 | total action ram packing size = [0, 16, 0] |
| 958 | action_ram_packing: |
| 959 | action set_egress_port has [] |
| 960 | byte_enables = [] |
| 961 | After allocation of 32s, available_slots is [] |
| 962 | final packing is [] |
| 963 | byte_enables = [1, 1] |
| 964 | Allocating Action Parameter Bus Byte 32 in stage 2 for Byte 0 of 16-bit constant |
| 965 | Allocating Action Parameter Bus Byte 33 in stage 2 for Byte 1 of 16-bit constant |
| 966 | Allocating Action Parameter Bus Byte 34 in stage 2 for Byte 0 of 16-bit constant |
| 967 | Allocating Action Parameter Bus Byte 35 in stage 2 for Byte 1 of 16-bit constant |
| 968 | After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)] |
| 969 | final packing is [(16, 16, False)] |
| 970 | byte_enables = [] |
| 971 | After allocation of 32s, available_slots is [] |
| 972 | final packing is [] |
| 973 | Allocating Action Logical Table ID 0 in stage 2 |
| 974 | |
| 975 | ---------------------------------------------- |
| 976 | Call to Allocate P4 Table with table ecmp_group_table_counter, number_entries = 1024, table id = None, and match type = exact |
| 977 | Allocating in stage 2 |
| 978 | ---------------------------------------------- |
| 979 | |
| 980 | stat_stage_table referenced: direct |
| 981 | stat Table Resource Request is: |
| 982 | SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams. |
| 983 | Sram Resource Request for P4 table ecmp_group_table_counter with handle 67108868 of type statistics in stage 2 |
| 984 | table_type : statistics |
| 985 | rams_for_width : 1 |
| 986 | use_stash : False |
| 987 | number_ways : 1 |
| 988 | way #0 |
| 989 | SRAM Request Group 0 |
| 990 | rams_for_depth : 2 |
| 991 | map_rams : 0 |
| 992 | way_number : 0 |
| 993 | ram_word_select_bits : 0 |
| 994 | ram_enable_select_bits : 0 |
| 995 | |
| 996 | |
| 997 | ---------------------------------------------- |
| 998 | Call to Allocate P4 Table with table ecmp_group_table, number_entries = 1024, table id = None, and match type = exact |
| 999 | Allocating in stage 2 |
| 1000 | ---------------------------------------------- |
| 1001 | |
| 1002 | Logical Table ID in stage 2 was not supplied by table placement for table ecmp_group_table. |
| 1003 | Allocating Logical Table ID 0 in stage 2 |
| 1004 | Allocating Table Type ID 0 of type exact in stage 2 |
| 1005 | Match Overhead: |
| 1006 | Field --version_valid-- [3:0] (4 bits) |
| 1007 | Field --immediate-- [15:0] (16 bits) |
| 1008 | |
| 1009 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 1010 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
| 1011 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[7:0]}. |
| 1012 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[15:8]}. |
| 1013 | |
| 1014 | --------------------------------------------- |
| 1015 | Call to can_any_match_key_fields_be_shared(stage=2, table=ecmp_group_table) |
| 1016 | --------------------------------------------- |
| 1017 | Decided way to allocate for table ecmp_group_table in stage 2 WAS non_shared |
| 1018 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}. |
| 1019 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}. |
| 1020 | Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[7:0]}. |
| 1021 | Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[15:8]}. |
| 1022 | Packing choices are: |
| 1023 | Choice 0 |
| 1024 | entries_per_table_word : 1 |
| 1025 | rams_for_width : 1 |
| 1026 | total_rams_need : 1 |
| 1027 | utilization : 0.328125 |
| 1028 | total_logical_entries_get : 1024 |
| 1029 | total_logical_entries_want : 1024 |
| 1030 | Choice 1 |
| 1031 | entries_per_table_word : 2 |
| 1032 | rams_for_width : 1 |
| 1033 | total_rams_need : 1 |
| 1034 | utilization : 0.656250 |
| 1035 | total_logical_entries_get : 2048 |
| 1036 | total_logical_entries_want : 1024 |
| 1037 | Choice 2 |
| 1038 | entries_per_table_word : 3 |
| 1039 | rams_for_width : 2 |
| 1040 | total_rams_need : 2 |
| 1041 | utilization : 0.492188 |
| 1042 | total_logical_entries_get : 3072 |
| 1043 | total_logical_entries_want : 1024 |
| 1044 | Choice 3 |
| 1045 | entries_per_table_word : 4 |
| 1046 | rams_for_width : 2 |
| 1047 | total_rams_need : 2 |
| 1048 | utilization : 0.656250 |
| 1049 | total_logical_entries_get : 4096 |
| 1050 | total_logical_entries_want : 1024 |
| 1051 | Choice 4 |
| 1052 | entries_per_table_word : 5 |
| 1053 | rams_for_width : 2 |
| 1054 | total_rams_need : 2 |
| 1055 | utilization : 0.820312 |
| 1056 | total_logical_entries_get : 5120 |
| 1057 | total_logical_entries_want : 1024 |
| 1058 | Choice 5 |
| 1059 | entries_per_table_word : 6 |
| 1060 | rams_for_width : 3 |
| 1061 | total_rams_need : 3 |
| 1062 | utilization : 0.656250 |
| 1063 | total_logical_entries_get : 6144 |
| 1064 | total_logical_entries_want : 1024 |
| 1065 | Choice 6 |
| 1066 | entries_per_table_word : 7 |
| 1067 | rams_for_width : 3 |
| 1068 | total_rams_need : 3 |
| 1069 | utilization : 0.765625 |
| 1070 | total_logical_entries_get : 7168 |
| 1071 | total_logical_entries_want : 1024 |
| 1072 | Choice 7 |
| 1073 | entries_per_table_word : 8 |
| 1074 | rams_for_width : 3 |
| 1075 | total_rams_need : 3 |
| 1076 | utilization : 0.875000 |
| 1077 | total_logical_entries_get : 8192 |
| 1078 | total_logical_entries_want : 1024 |
| 1079 | Choice 8 |
| 1080 | entries_per_table_word : 9 |
| 1081 | rams_for_width : 4 |
| 1082 | total_rams_need : 4 |
| 1083 | utilization : 0.738281 |
| 1084 | total_logical_entries_get : 9216 |
| 1085 | total_logical_entries_want : 1024 |
| 1086 | First choice is to pack 1 entries per table word (1 rams) |
| 1087 | -------------------------------------- |
| 1088 | Attempting packing (attempt #1): |
| 1089 | -------------------------------------- |
| 1090 | number entries per table word: 1 |
| 1091 | rams_for_width: 1 |
| 1092 | total_rams: 1 |
| 1093 | utilization: 0.328125 |
| 1094 | total_ram_blocks_need_for_depth: 1 |
| 1095 | This will be split into a 3-way table distributed as [1, 1, 1]. |
| 1096 | Total number of hash functions need is 1. |
| 1097 | Allocating Hash Bit 0 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 1098 | Allocating Hash Bit 1 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 1099 | Allocating Hash Bit 2 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 1100 | Allocating Hash Bit 3 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 1101 | Allocating Hash Bit 4 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 1102 | Allocating Hash Bit 5 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 1103 | Allocating Hash Bit 6 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 1104 | Allocating Hash Bit 7 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 1105 | Allocating Hash Bit 8 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 1106 | Allocating Hash Bit 9 in hash match group 0 for match table ecmp_group_table's hash way 0. |
| 1107 | Allocating Hash Bit 10 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 1108 | Allocating Hash Bit 11 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 1109 | Allocating Hash Bit 12 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 1110 | Allocating Hash Bit 13 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 1111 | Allocating Hash Bit 14 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 1112 | Allocating Hash Bit 15 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 1113 | Allocating Hash Bit 16 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 1114 | Allocating Hash Bit 17 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 1115 | Allocating Hash Bit 18 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 1116 | Allocating Hash Bit 19 in hash match group 0 for match table ecmp_group_table's hash way 1. |
| 1117 | Allocating Hash Bit 20 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 1118 | Allocating Hash Bit 21 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 1119 | Allocating Hash Bit 22 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 1120 | Allocating Hash Bit 23 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 1121 | Allocating Hash Bit 24 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 1122 | Allocating Hash Bit 25 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 1123 | Allocating Hash Bit 26 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 1124 | Allocating Hash Bit 27 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 1125 | Allocating Hash Bit 28 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 1126 | Allocating Hash Bit 29 in hash match group 0 for match table ecmp_group_table's hash way 2. |
| 1127 | Match Table Resource Request is: |
| 1128 | SRAM Resource Request for table ecmp_group_table (of type match), with 3 ways wants 3 rams. |
| 1129 | -------- |
| 1130 | set the seed to be [0, 0, 1, 1, 0, 1, 0, 1, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 1, 1, 1, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] |
| 1131 | For action set_egress_port, formed micro_instruction: |
| 1132 | Micro Instruction deposit-field for PHV Container 130 has bit width 23 |
| 1133 | Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0]) |
| 1134 | Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4]) |
| 1135 | Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9]) |
| 1136 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 1137 | Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11]) |
| 1138 | Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15]) |
| 1139 | Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16]) |
| 1140 | Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20]) |
| 1141 | |
| 1142 | Allocating Action ALU 2 (16 bits) in stage 2 for match table ecmp_group_table's action set_egress_port |
| 1143 | Allocating VLIW Instruction : 0 in stage 2 for match table ecmp_group_table's action set_egress_port |
| 1144 | |
| 1145 | ---------------------------------------------- |
| 1146 | Call to Allocate P4 Table with table ingress_port_count_table__action__, number_entries = 1024, table id = None, and match type = exact |
| 1147 | Allocating in stage 3 |
| 1148 | ---------------------------------------------- |
| 1149 | |
| 1150 | ram_size_matrix = |
| 1151 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 1152 | 0 0 0 0 0 0 0 0 # 0 |
| 1153 | |
| 1154 | immediate_size_matrix = |
| 1155 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 1156 | 0 0 0 0 0 0 0 0 # 0 |
| 1157 | |
| 1158 | hash_to_phv_matrix = |
| 1159 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 1160 | 0 0 0 0 0 0 0 0 # 0 |
| 1161 | |
| 1162 | total action ram packing size = [0, 0, 0] |
| 1163 | action_ram_packing: |
| 1164 | action count_ingress has [] |
| 1165 | total action ram packing size = [0, 0, 0] |
| 1166 | action_ram_packing: |
| 1167 | action count_ingress has [] |
| 1168 | total action ram packing size = [0, 0, 0] |
| 1169 | action_ram_packing: |
| 1170 | action count_ingress has [] |
| 1171 | byte_enables = [] |
| 1172 | After allocation of 32s, available_slots is [] |
| 1173 | final packing is [] |
| 1174 | byte_enables = [] |
| 1175 | After allocation of 32s, available_slots is [] |
| 1176 | final packing is [] |
| 1177 | byte_enables = [] |
| 1178 | After allocation of 32s, available_slots is [] |
| 1179 | final packing is [] |
| 1180 | Allocating Action Logical Table ID 0 in stage 3 |
| 1181 | |
| 1182 | ---------------------------------------------- |
| 1183 | Call to Allocate P4 Table with table ingress_port_counter, number_entries = 254, table id = None, and match type = exact |
| 1184 | Allocating in stage 3 |
| 1185 | ---------------------------------------------- |
| 1186 | |
| 1187 | stat_stage_table referenced: indirect |
| 1188 | stat Table Resource Request is: |
| 1189 | SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams. |
| 1190 | Sram Resource Request for P4 table ingress_port_counter with handle 67108865 of type statistics in stage 3 |
| 1191 | table_type : statistics |
| 1192 | rams_for_width : 1 |
| 1193 | use_stash : False |
| 1194 | number_ways : 1 |
| 1195 | way #0 |
| 1196 | SRAM Request Group 0 |
| 1197 | rams_for_depth : 2 |
| 1198 | map_rams : 0 |
| 1199 | way_number : 0 |
| 1200 | ram_word_select_bits : 0 |
| 1201 | ram_enable_select_bits : 0 |
| 1202 | |
| 1203 | |
| 1204 | ---------------------------------------------- |
| 1205 | Call to Allocate P4 Table with table ingress_port_count_table, number_entries = 1024, table id = None, and match type = exact |
| 1206 | Allocating in stage 3 |
| 1207 | ---------------------------------------------- |
| 1208 | |
| 1209 | Logical Table ID in stage 3 was not supplied by table placement for table ingress_port_count_table. |
| 1210 | Allocating Logical Table ID 0 in stage 3 |
| 1211 | Allocating Table Type ID 0 of type exact in stage 3 |
| 1212 | Match Overhead: |
| 1213 | Field --version_valid-- [3:0] (4 bits) |
| 1214 | Field --instruction_address-- [1:0] (2 bits) |
| 1215 | Field --statistics_pointer-- [19:0] (20 bits) |
| 1216 | |
| 1217 | Logical Table ID in stage 3 was not supplied by table placement for table ingress_port_count_table. |
| 1218 | Allocating Logical Table ID 0 in stage 3 |
| 1219 | Allocating Table Type ID 0 of type exact in stage 3 |
| 1220 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}. |
| 1221 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}. |
| 1222 | Match Table Resource Request is: |
| 1223 | SRAM Resource Request for table ingress_port_count_table (of type match), with 0 ways wants 0 rams. |
| 1224 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}. |
| 1225 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}. |
| 1226 | No micro instructions needed for action count_ingress executed from table ingress_port_count_table. |
| 1227 | Allocating Action ALU 0 (32 bits) in stage 3 for match table ingress_port_count_table's action count_ingress |
| 1228 | Allocating VLIW Instruction : 0 in stage 3 for match table ingress_port_count_table's action count_ingress |
| 1229 | |
| 1230 | ---------------------------------------------- |
| 1231 | Call to Allocate P4 Table with table egress_port_count_table__action__, number_entries = 1024, table id = None, and match type = exact |
| 1232 | Allocating in stage 3 |
| 1233 | ---------------------------------------------- |
| 1234 | |
| 1235 | ram_size_matrix = |
| 1236 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 1237 | 0 0 0 0 0 0 0 0 # 0 |
| 1238 | |
| 1239 | immediate_size_matrix = |
| 1240 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 1241 | 0 0 0 0 0 0 0 0 # 0 |
| 1242 | |
| 1243 | hash_to_phv_matrix = |
| 1244 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 1245 | 0 0 0 0 0 0 0 0 # 0 |
| 1246 | |
| 1247 | total action ram packing size = [0, 0, 0] |
| 1248 | action_ram_packing: |
| 1249 | action count_egress has [] |
| 1250 | total action ram packing size = [0, 0, 0] |
| 1251 | action_ram_packing: |
| 1252 | action count_egress has [] |
| 1253 | total action ram packing size = [0, 0, 0] |
| 1254 | action_ram_packing: |
| 1255 | action count_egress has [] |
| 1256 | byte_enables = [] |
| 1257 | After allocation of 32s, available_slots is [] |
| 1258 | final packing is [] |
| 1259 | byte_enables = [] |
| 1260 | After allocation of 32s, available_slots is [] |
| 1261 | final packing is [] |
| 1262 | byte_enables = [] |
| 1263 | After allocation of 32s, available_slots is [] |
| 1264 | final packing is [] |
| 1265 | Allocating Action Logical Table ID 1 in stage 3 |
| 1266 | |
| 1267 | ---------------------------------------------- |
| 1268 | Call to Allocate P4 Table with table egress_port_counter, number_entries = 254, table id = None, and match type = exact |
| 1269 | Allocating in stage 3 |
| 1270 | ---------------------------------------------- |
| 1271 | |
| 1272 | stat_stage_table referenced: indirect |
| 1273 | stat Table Resource Request is: |
| 1274 | SRAM Resource Request for table egress_port_counter (of type statistics), with 1 ways wants 2 rams. |
| 1275 | Sram Resource Request for P4 table egress_port_counter with handle 67108866 of type statistics in stage 3 |
| 1276 | table_type : statistics |
| 1277 | rams_for_width : 1 |
| 1278 | use_stash : False |
| 1279 | number_ways : 1 |
| 1280 | way #0 |
| 1281 | SRAM Request Group 0 |
| 1282 | rams_for_depth : 2 |
| 1283 | map_rams : 0 |
| 1284 | way_number : 0 |
| 1285 | ram_word_select_bits : 0 |
| 1286 | ram_enable_select_bits : 0 |
| 1287 | |
| 1288 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}. |
| 1289 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}. |
| 1290 | |
| 1291 | ---------------------------------------------- |
| 1292 | Call to Allocate P4 Table with table egress_port_count_table, number_entries = 1024, table id = None, and match type = exact |
| 1293 | Allocating in stage 3 |
| 1294 | ---------------------------------------------- |
| 1295 | |
| 1296 | Logical Table ID in stage 3 was not supplied by table placement for table egress_port_count_table. |
| 1297 | Allocating Logical Table ID 1 in stage 3 |
| 1298 | Allocating Table Type ID 1 of type exact in stage 3 |
| 1299 | Match Overhead: |
| 1300 | Field --version_valid-- [3:0] (4 bits) |
| 1301 | Field --statistics_pointer-- [19:0] (20 bits) |
| 1302 | |
| 1303 | Logical Table ID in stage 3 was not supplied by table placement for table egress_port_count_table. |
| 1304 | Allocating Logical Table ID 1 in stage 3 |
| 1305 | Allocating Table Type ID 1 of type exact in stage 3 |
| 1306 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}. |
| 1307 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}. |
| 1308 | Match Table Resource Request is: |
| 1309 | SRAM Resource Request for table egress_port_count_table (of type match), with 0 ways wants 0 rams. |
| 1310 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}. |
| 1311 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}. |
| 1312 | No micro instructions needed for action count_egress executed from table egress_port_count_table. |
| 1313 | Allocating Action ALU 0 (32 bits) in stage 3 for match table egress_port_count_table's action count_egress |
| 1314 | Allocating VLIW Instruction : 0 in stage 3 for match table egress_port_count_table's action count_egress |
| 1315 | |
| 1316 | ---------------------------------------------- |
| 1317 | Call to Allocate P4 Table with table egress_pkt__action__, number_entries = 1024, table id = None, and match type = exact |
| 1318 | Allocating in stage 0 |
| 1319 | ---------------------------------------------- |
| 1320 | |
| 1321 | ram_size_matrix = |
| 1322 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 1323 | 0 0 0 0 0 0 0 0 # 0 |
| 1324 | |
| 1325 | immediate_size_matrix = |
| 1326 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 1327 | 0 0 0 0 0 0 0 0 # 0 |
| 1328 | |
| 1329 | hash_to_phv_matrix = |
| 1330 | (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True) |
| 1331 | 0 0 0 0 0 0 0 0 # 0 |
| 1332 | |
| 1333 | total action ram packing size = [0, 0, 0] |
| 1334 | action_ram_packing: |
| 1335 | action add_packet_in_hdr has [] |
| 1336 | total action ram packing size = [0, 0, 0] |
| 1337 | action_ram_packing: |
| 1338 | action add_packet_in_hdr has [] |
| 1339 | total action ram packing size = [0, 0, 0] |
| 1340 | action_ram_packing: |
| 1341 | action add_packet_in_hdr has [] |
| 1342 | byte_enables = [] |
| 1343 | After allocation of 32s, available_slots is [] |
| 1344 | final packing is [] |
| 1345 | byte_enables = [] |
| 1346 | After allocation of 32s, available_slots is [] |
| 1347 | final packing is [] |
| 1348 | byte_enables = [] |
| 1349 | After allocation of 32s, available_slots is [] |
| 1350 | final packing is [] |
| 1351 | Allocating Action Logical Table ID 1 in stage 0 |
| 1352 | |
| 1353 | ---------------------------------------------- |
| 1354 | Call to Allocate P4 Table with table egress_pkt, number_entries = 1024, table id = None, and match type = exact |
| 1355 | Allocating in stage 0 |
| 1356 | ---------------------------------------------- |
| 1357 | |
| 1358 | Logical Table ID in stage 0 was not supplied by table placement for table egress_pkt. |
| 1359 | Allocating Logical Table ID 1 in stage 0 |
| 1360 | Allocating Table Type ID 1 of type exact in stage 0 |
| 1361 | Match Overhead: |
| 1362 | Field --version_valid-- [3:0] (4 bits) |
| 1363 | Field --instruction_address-- [1:0] (2 bits) |
| 1364 | |
| 1365 | Logical Table ID in stage 0 was not supplied by table placement for table egress_pkt. |
| 1366 | Allocating Logical Table ID 1 in stage 0 |
| 1367 | Allocating Table Type ID 1 of type exact in stage 0 |
| 1368 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]}. |
| 1369 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}. |
| 1370 | Match Table Resource Request is: |
| 1371 | SRAM Resource Request for table egress_pkt (of type match), with 0 ways wants 0 rams. |
| 1372 | Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]}. |
| 1373 | Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}. |
| 1374 | For action add_packet_in_hdr, formed micro_instruction: |
| 1375 | Micro Instruction deposit-field for PHV Container 82 has bit width 20 |
| 1376 | Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0]) |
| 1377 | Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4]) |
| 1378 | Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9]) |
| 1379 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 1380 | Field high_bit [2:0] : 0x0 (3 bits in instruction bits [13:11]) |
| 1381 | Field low_bit_lo [1:0] : 0x0 (2 bits in instruction bits [15:14]) |
| 1382 | Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16]) |
| 1383 | Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19]) |
| 1384 | |
| 1385 | For action add_packet_in_hdr, formed micro_instruction: |
| 1386 | Micro Instruction deposit-field for PHV Container 145 has bit width 23 |
| 1387 | Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0]) |
| 1388 | Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4]) |
| 1389 | Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9]) |
| 1390 | Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10]) |
| 1391 | Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11]) |
| 1392 | Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15]) |
| 1393 | Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16]) |
| 1394 | Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20]) |
| 1395 | |
| 1396 | Allocating Action ALU 18 (8 bits) in stage 0 for match table egress_pkt's action add_packet_in_hdr |
| 1397 | Allocating Action ALU 17 (16 bits) in stage 0 for match table egress_pkt's action add_packet_in_hdr |
| 1398 | Allocating VLIW Instruction : 0 in stage 0 for match table egress_pkt's action add_packet_in_hdr |
| 1399 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
| 1400 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
| 1401 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
| 1402 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
| 1403 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
| 1404 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
| 1405 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
| 1406 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
| 1407 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
| 1408 | Cannot find table object for 'egress_port_count_table_always_true_condition'. |
| 1409 | Skipping p4_primitive StageModifyFieldFromHashBitsPrimitive from overhead calculation. |
| 1410 | Action ecmp_group for table table0 cannot be used as a default action (table miss action). The action requires the use of hash distribution, which is not available when a table misses. |
| 1411 | Field ig_intr_md_for_tm.ucast_egress_port not contiguous on gateway input |
| 1412 | Field ig_intr_md_for_tm.ucast_egress_port not contiguous on gateway input |
| 1413 | Writing configuration registers: regs.match_action_stage.00 |
| 1414 | Writing configuration registers: regs.match_action_stage.01 |
| 1415 | Writing configuration registers: regs.match_action_stage.02 |
| 1416 | Writing configuration registers: regs.match_action_stage.03 |
| 1417 | Writing configuration registers: regs.match_action_stage.04 |
| 1418 | Writing configuration registers: regs.match_action_stage.05 |
| 1419 | Writing configuration registers: regs.match_action_stage.06 |
| 1420 | Writing configuration registers: regs.match_action_stage.07 |
| 1421 | Writing configuration registers: regs.match_action_stage.08 |
| 1422 | Writing configuration registers: regs.match_action_stage.09 |
| 1423 | Writing configuration registers: regs.match_action_stage.0a |
| 1424 | Writing configuration registers: regs.match_action_stage.0b |