Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1 | // Copyright 2013, Big Switch Networks, Inc. |
| 2 | // |
| 3 | // LoxiGen is licensed under the Eclipse Public License, version 1.0 (EPL), with |
| 4 | // the following special exception: |
| 5 | // |
| 6 | // LOXI Exception |
| 7 | // |
| 8 | // As a special exception to the terms of the EPL, you may distribute libraries |
| 9 | // generated by LoxiGen (LoxiGen Libraries) under the terms of your choice, provided |
| 10 | // that copyright and licensing notices generated by LoxiGen are not altered or removed |
| 11 | // from the LoxiGen Libraries and the notice provided below is (i) included in |
| 12 | // the LoxiGen Libraries, if distributed in source code form and (ii) included in any |
| 13 | // documentation for the LoxiGen Libraries, if distributed in binary form. |
| 14 | // |
| 15 | // Notice: "Copyright 2013, Big Switch Networks, Inc. This library was generated by the LoxiGen Compiler." |
| 16 | // |
| 17 | // You may not use this file except in compliance with the EPL or LOXI Exception. You may obtain |
| 18 | // a copy of the EPL at: |
| 19 | // |
| 20 | // http://www.eclipse.org/legal/epl-v10.html |
| 21 | // |
| 22 | // Unless required by applicable law or agreed to in writing, software |
| 23 | // distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
| 24 | // WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the |
| 25 | // EPL for the specific language governing permissions and limitations |
| 26 | // under the EPL. |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 27 | // |
| 28 | // Also derived from the OpenFlow header files which have these copyrights: |
| 29 | // Copyright (c) 2008 The Board of Trustees of The Leland Stanford Junior University |
| 30 | // Copyright (c) 2011, 2012 Open Networking Foundation |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 31 | |
| 32 | #version 4 |
| 33 | |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 34 | enum macro_definitions { |
| 35 | OFP_MAX_TABLE_NAME_LEN = 32, |
| 36 | OFP_MAX_PORT_NAME_LEN = 16, |
| 37 | |
Wilson Ng | d72013d | 2013-09-29 10:21:48 -0700 | [diff] [blame] | 38 | OFP_TCP_PORT = 6653, |
| 39 | OFP_SSL_PORT = 6653, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 40 | |
| 41 | OFP_ETH_ALEN = 6, |
| 42 | |
| 43 | OFP_DEFAULT_MISS_SEND_LEN = 128, |
| 44 | |
| 45 | OFP_VLAN_NONE = 0, |
| 46 | |
| 47 | OFP_FLOW_PERMANENT = 0, |
| 48 | |
| 49 | OFP_DEFAULT_PRIORITY = 0x8000, |
| 50 | |
| 51 | OFP_NO_BUFFER = 0xffffffff, |
| 52 | |
| 53 | DESC_STR_LEN = 256, |
| 54 | SERIAL_NUM_LEN = 32, |
| 55 | |
| 56 | OFPQ_ALL = 0xffffffff, |
| 57 | OFPQ_MAX_RATE_UNCFG = 0xffff, |
| 58 | OFPQ_MIN_RATE_UNCFG = 0xffff, |
| 59 | }; |
| 60 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 61 | enum ofp_port(wire_type=uint32_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 62 | OFPP_MAX = 0xffffff00, |
| 63 | OFPP_IN_PORT = 0xfffffff8, |
| 64 | OFPP_TABLE = 0xfffffff9, |
| 65 | OFPP_NORMAL = 0xfffffffa, |
| 66 | OFPP_FLOOD = 0xfffffffb, |
| 67 | OFPP_ALL = 0xfffffffc, |
| 68 | OFPP_CONTROLLER = 0xfffffffd, |
| 69 | OFPP_LOCAL = 0xfffffffe, |
Tomasz | 949aa52 | 2013-10-23 16:12:27 -0700 | [diff] [blame] | 70 | OFPP_ANY = 0xffffffff, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 71 | }; |
| 72 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 73 | enum ofp_type(wire_type=uint8_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 74 | OFPT_HELLO = 0, |
| 75 | OFPT_ERROR = 1, |
| 76 | OFPT_ECHO_REQUEST = 2, |
| 77 | OFPT_ECHO_REPLY = 3, |
| 78 | OFPT_EXPERIMENTER = 4, |
| 79 | OFPT_FEATURES_REQUEST = 5, |
| 80 | OFPT_FEATURES_REPLY = 6, |
| 81 | OFPT_GET_CONFIG_REQUEST = 7, |
| 82 | OFPT_GET_CONFIG_REPLY = 8, |
| 83 | OFPT_SET_CONFIG = 9, |
| 84 | OFPT_PACKET_IN = 10, |
| 85 | OFPT_FLOW_REMOVED = 11, |
| 86 | OFPT_PORT_STATUS = 12, |
| 87 | OFPT_PACKET_OUT = 13, |
| 88 | OFPT_FLOW_MOD = 14, |
| 89 | OFPT_GROUP_MOD = 15, |
| 90 | OFPT_PORT_MOD = 16, |
| 91 | OFPT_TABLE_MOD = 17, |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 92 | OFPT_STATS_REQUEST = 18, |
| 93 | OFPT_STATS_REPLY = 19, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 94 | OFPT_BARRIER_REQUEST = 20, |
| 95 | OFPT_BARRIER_REPLY = 21, |
| 96 | OFPT_QUEUE_GET_CONFIG_REQUEST = 22, |
| 97 | OFPT_QUEUE_GET_CONFIG_REPLY = 23, |
| 98 | OFPT_ROLE_REQUEST = 24, |
| 99 | OFPT_ROLE_REPLY = 25, |
| 100 | OFPT_GET_ASYNC_REQUEST = 26, |
| 101 | OFPT_GET_ASYNC_REPLY = 27, |
| 102 | OFPT_SET_ASYNC = 28, |
| 103 | OFPT_METER_MOD = 29, |
| 104 | }; |
| 105 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 106 | enum ofp_config_flags(wire_type=uint16_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 107 | OFPC_FRAG_NORMAL = 0, |
| 108 | OFPC_FRAG_DROP = 1, |
| 109 | OFPC_FRAG_REASM = 2, |
| 110 | OFPC_FRAG_MASK = 3, |
| 111 | }; |
| 112 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 113 | enum ofp_table_config(wire_type=uint32_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 114 | OFPTC_DEPRECATED_MASK = 0x3, |
| 115 | }; |
| 116 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 117 | enum ofp_table(wire_type=uint8_t, complete=False) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 118 | OFPTT_MAX = 0xfe, |
| 119 | OFPTT_ALL = 0xff, |
| 120 | }; |
| 121 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 122 | enum ofp_capabilities(wire_type=uint32_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 123 | OFPC_FLOW_STATS = 0x1, |
| 124 | OFPC_TABLE_STATS = 0x2, |
| 125 | OFPC_PORT_STATS = 0x4, |
| 126 | OFPC_GROUP_STATS = 0x8, |
| 127 | OFPC_IP_REASM = 0x20, |
| 128 | OFPC_QUEUE_STATS = 0x40, |
| 129 | OFPC_PORT_BLOCKED = 0x100, |
| 130 | }; |
| 131 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 132 | enum ofp_port_config(wire_type=uint32_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 133 | OFPPC_PORT_DOWN = 0x1, |
| 134 | OFPPC_NO_RECV = 0x4, |
| 135 | OFPPC_NO_FWD = 0x20, |
| 136 | OFPPC_NO_PACKET_IN = 0x40, |
Rob Vaterlaus | 0a8ec14 | 2013-10-10 13:27:14 -0700 | [diff] [blame] | 137 | OFPPC_BSN_MIRROR_DEST = 0x80000000, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 138 | }; |
| 139 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 140 | enum ofp_port_state(wire_type=uint32_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 141 | OFPPS_LINK_DOWN = 0x1, |
| 142 | OFPPS_BLOCKED = 0x2, |
| 143 | OFPPS_LIVE = 0x4, |
| 144 | }; |
| 145 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 146 | enum ofp_port_features(wire_type=uint32_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 147 | OFPPF_10MB_HD = 0x1, |
| 148 | OFPPF_10MB_FD = 0x2, |
| 149 | OFPPF_100MB_HD = 0x4, |
| 150 | OFPPF_100MB_FD = 0x8, |
| 151 | OFPPF_1GB_HD = 0x10, |
| 152 | OFPPF_1GB_FD = 0x20, |
| 153 | OFPPF_10GB_FD = 0x40, |
| 154 | OFPPF_40GB_FD = 0x80, |
| 155 | OFPPF_100GB_FD = 0x100, |
| 156 | OFPPF_1TB_FD = 0x200, |
| 157 | OFPPF_OTHER = 0x400, |
| 158 | OFPPF_COPPER = 0x800, |
| 159 | OFPPF_FIBER = 0x1000, |
| 160 | OFPPF_AUTONEG = 0x2000, |
| 161 | OFPPF_PAUSE = 0x4000, |
| 162 | OFPPF_PAUSE_ASYM = 0x8000, |
| 163 | }; |
| 164 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 165 | enum ofp_port_reason(wire_type=uint8_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 166 | OFPPR_ADD = 0, |
| 167 | OFPPR_DELETE = 1, |
| 168 | OFPPR_MODIFY = 2, |
| 169 | }; |
| 170 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 171 | enum ofp_match_type(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 172 | OFPMT_STANDARD = 0, |
| 173 | OFPMT_OXM = 1, |
| 174 | }; |
| 175 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 176 | enum ofp_oxm_class(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 177 | OFPXMC_NXM_0 = 0, |
| 178 | OFPXMC_NXM_1 = 1, |
| 179 | OFPXMC_OPENFLOW_BASIC = 0x8000, |
| 180 | OFPXMC_EXPERIMENTER = 0xffff, |
| 181 | }; |
| 182 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 183 | enum ofp_vlan_id(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 184 | OFPVID_NONE = 0, |
| 185 | OFPVID_PRESENT = 0x1000, |
| 186 | }; |
| 187 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 188 | // FIXME: OF spec specified this as '9' bits, implicitly adding |
| 189 | // to full byte |
| 190 | enum ofp_ipv6exthdr_flags(wire_type=uint16_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 191 | OFPIEH_NONEXT = 0x1, |
| 192 | OFPIEH_ESP = 0x2, |
| 193 | OFPIEH_AUTH = 0x4, |
| 194 | OFPIEH_DEST = 0x8, |
| 195 | OFPIEH_FRAG = 0x10, |
| 196 | OFPIEH_ROUTER = 0x20, |
| 197 | OFPIEH_HOP = 0x40, |
| 198 | OFPIEH_UNREP = 0x80, |
| 199 | OFPIEH_UNSEQ = 0x100, |
| 200 | }; |
| 201 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 202 | enum ofp_action_type(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 203 | OFPAT_OUTPUT = 0, |
| 204 | OFPAT_COPY_TTL_OUT = 0xb, |
| 205 | OFPAT_COPY_TTL_IN = 0xc, |
| 206 | OFPAT_SET_MPLS_TTL = 0xf, |
| 207 | OFPAT_DEC_MPLS_TTL = 0x10, |
| 208 | OFPAT_PUSH_VLAN = 0x11, |
| 209 | OFPAT_POP_VLAN = 0x12, |
| 210 | OFPAT_PUSH_MPLS = 0x13, |
| 211 | OFPAT_POP_MPLS = 0x14, |
| 212 | OFPAT_SET_QUEUE = 0x15, |
| 213 | OFPAT_GROUP = 0x16, |
| 214 | OFPAT_SET_NW_TTL = 0x17, |
| 215 | OFPAT_DEC_NW_TTL = 0x18, |
| 216 | OFPAT_SET_FIELD = 0x19, |
| 217 | OFPAT_PUSH_PBB = 0x1a, |
| 218 | OFPAT_POP_PBB = 0x1b, |
| 219 | OFPAT_EXPERIMENTER = 0xffff, |
| 220 | }; |
| 221 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 222 | enum ofp_controller_max_len(wire_type=uint16_t, complete=False) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 223 | OFPCML_MAX = 0xffe5, |
| 224 | OFPCML_NO_BUFFER = 0xffff, |
| 225 | }; |
| 226 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 227 | enum ofp_instruction_type(wire_type=uint16_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 228 | OFPIT_GOTO_TABLE = 0x1, |
| 229 | OFPIT_WRITE_METADATA = 0x2, |
| 230 | OFPIT_WRITE_ACTIONS = 0x3, |
| 231 | OFPIT_APPLY_ACTIONS = 0x4, |
| 232 | OFPIT_CLEAR_ACTIONS = 0x5, |
| 233 | OFPIT_METER = 0x6, |
| 234 | OFPIT_EXPERIMENTER = 0xffff, |
| 235 | }; |
| 236 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 237 | enum ofp_flow_mod_command(wire_type=uint8_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 238 | OFPFC_ADD = 0, |
| 239 | OFPFC_MODIFY = 1, |
| 240 | OFPFC_MODIFY_STRICT = 2, |
| 241 | OFPFC_DELETE = 3, |
| 242 | OFPFC_DELETE_STRICT = 4, |
| 243 | }; |
| 244 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 245 | enum ofp_flow_mod_flags(wire_type=uint16_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 246 | OFPFF_SEND_FLOW_REM = 0x1, |
| 247 | OFPFF_CHECK_OVERLAP = 0x2, |
| 248 | OFPFF_RESET_COUNTS = 0x4, |
| 249 | OFPFF_NO_PKT_COUNTS = 0x8, |
| 250 | OFPFF_NO_BYT_COUNTS = 0x10, |
Rich Lane | f86f39a | 2013-10-07 18:04:11 -0700 | [diff] [blame] | 251 | |
| 252 | /* Non-standard, enabled by an experimenter message */ |
| 253 | /* See the bsn_flow_idle input file */ |
| 254 | OFPFF_BSN_SEND_IDLE = 0x80, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 255 | }; |
| 256 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 257 | enum ofp_group(wire_type=uint32_t, complete=False) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 258 | OFPG_MAX = 0xffffff00, |
| 259 | OFPG_ALL = 0xfffffffc, |
| 260 | OFPG_ANY = 0xffffffff, |
| 261 | }; |
| 262 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 263 | enum ofp_group_mod_command(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 264 | OFPGC_ADD = 0, |
| 265 | OFPGC_MODIFY = 1, |
| 266 | OFPGC_DELETE = 2, |
| 267 | }; |
| 268 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 269 | enum ofp_group_type(wire_type=uint8_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 270 | OFPGT_ALL = 0, |
| 271 | OFPGT_SELECT = 1, |
| 272 | OFPGT_INDIRECT = 2, |
| 273 | OFPGT_FF = 3, |
| 274 | }; |
| 275 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 276 | enum ofp_packet_in_reason(wire_type=uint8_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 277 | OFPR_NO_MATCH = 0, |
| 278 | OFPR_ACTION = 1, |
| 279 | OFPR_INVALID_TTL = 2, |
Andreas Wundsam | 7723c56 | 2013-10-23 16:27:40 -0700 | [diff] [blame] | 280 | |
| 281 | // non-standard BSN extensions. OF does not have a standard-conformant |
| 282 | // way to extend the set of packet_in reasons |
| 283 | OFPR_BSN_NEW_HOST = 128, |
| 284 | OFPR_BSN_STATION_MOVE = 129, |
| 285 | OFPR_BSN_BAD_VLAN = 130, |
| 286 | OFPR_BSN_DESTINATION_LOOKUP_FAILURE = 131, |
Rich Lane | e13d784 | 2013-12-21 14:39:25 -0800 | [diff] [blame] | 287 | OFPR_BSN_NO_ROUTE = 132, |
Harshmeet Singh | 192b1b0 | 2013-12-14 07:46:24 -0800 | [diff] [blame] | 288 | OFPR_BSN_ICMP_ECHO_REQUEST = 133, |
| 289 | OFPR_BSN_DEST_NETWORK_UNREACHABLE = 134, |
| 290 | OFPR_BSN_DEST_HOST_UNREACHABLE = 135, |
| 291 | OFPR_BSN_DEST_PORT_UNREACHABLE = 136, |
| 292 | OFPR_BSN_FRAGMENTATION_REQUIRED = 137, |
Rich Lane | c1c6df6 | 2014-01-24 17:18:00 -0800 | [diff] [blame] | 293 | OFPR_BSN_ARP = 139, |
Duc Pham | 9d29ed0 | 2014-01-30 16:23:16 -0800 | [diff] [blame] | 294 | OFPR_BSN_DHCP = 140, |
xinwu | d847c69 | 2014-02-20 18:37:34 -0800 | [diff] [blame] | 295 | OFPR_BSN_DEBUG = 141, |
Rich Lane | b2de005 | 2014-03-19 16:57:46 -0700 | [diff] [blame] | 296 | OFPR_BSN_PACKET_OF_DEATH = 142, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 297 | }; |
| 298 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 299 | enum ofp_flow_removed_reason(wire_type=uint8_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 300 | OFPRR_IDLE_TIMEOUT = 0, |
| 301 | OFPRR_HARD_TIMEOUT = 1, |
| 302 | OFPRR_DELETE = 2, |
| 303 | OFPRR_GROUP_DELETE = 3, |
| 304 | }; |
| 305 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 306 | enum ofp_meter(wire_type=uint32_t, complete=False) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 307 | OFPM_MAX = 0xffff0000, |
| 308 | OFPM_SLOWPATH = 0xfffffffd, |
| 309 | OFPM_CONTROLLER = 0xfffffffe, |
| 310 | OFPM_ALL = 0xffffffff, |
| 311 | }; |
| 312 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 313 | enum ofp_meter_band_type(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 314 | OFPMBT_DROP = 0x1, |
| 315 | OFPMBT_DSCP_REMARK = 0x2, |
| 316 | OFPMBT_EXPERIMENTER = 0xffff, |
| 317 | }; |
| 318 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 319 | enum ofp_meter_mod_command(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 320 | OFPMC_ADD = 0, |
| 321 | OFPMC_MODIFY = 1, |
| 322 | OFPMC_DELETE = 2, |
| 323 | }; |
| 324 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 325 | enum ofp_meter_flags(wire_type=uint16_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 326 | OFPMF_KBPS = 0x1, |
| 327 | OFPMF_PKTPS = 0x2, |
| 328 | OFPMF_BURST = 0x4, |
| 329 | OFPMF_STATS = 0x8, |
| 330 | }; |
| 331 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 332 | enum ofp_error_type(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 333 | OFPET_HELLO_FAILED = 0, |
| 334 | OFPET_BAD_REQUEST = 1, |
| 335 | OFPET_BAD_ACTION = 2, |
| 336 | OFPET_BAD_INSTRUCTION = 3, |
| 337 | OFPET_BAD_MATCH = 4, |
| 338 | OFPET_FLOW_MOD_FAILED = 5, |
| 339 | OFPET_GROUP_MOD_FAILED = 6, |
| 340 | OFPET_PORT_MOD_FAILED = 7, |
| 341 | OFPET_TABLE_MOD_FAILED = 8, |
| 342 | OFPET_QUEUE_OP_FAILED = 9, |
| 343 | OFPET_SWITCH_CONFIG_FAILED = 10, |
| 344 | OFPET_ROLE_REQUEST_FAILED = 11, |
| 345 | OFPET_METER_MOD_FAILED = 12, |
| 346 | OFPET_TABLE_FEATURES_FAILED = 13, |
| 347 | OFPET_EXPERIMENTER = 0xffff, |
| 348 | }; |
| 349 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 350 | enum ofp_hello_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 351 | OFPHFC_INCOMPATIBLE = 0, |
| 352 | OFPHFC_EPERM = 1, |
| 353 | }; |
| 354 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 355 | enum ofp_bad_request_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 356 | OFPBRC_BAD_VERSION = 0, |
| 357 | OFPBRC_BAD_TYPE = 1, |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 358 | OFPBRC_BAD_STAT = 2, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 359 | OFPBRC_BAD_EXPERIMENTER = 3, |
Rob Vaterlaus | b3f49d9 | 2013-10-01 17:57:31 -0700 | [diff] [blame] | 360 | OFPBRC_BAD_EXPERIMENTER_TYPE = 4, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 361 | OFPBRC_EPERM = 5, |
| 362 | OFPBRC_BAD_LEN = 6, |
| 363 | OFPBRC_BUFFER_EMPTY = 7, |
| 364 | OFPBRC_BUFFER_UNKNOWN = 8, |
| 365 | OFPBRC_BAD_TABLE_ID = 9, |
| 366 | OFPBRC_IS_SLAVE = 10, |
| 367 | OFPBRC_BAD_PORT = 11, |
| 368 | OFPBRC_BAD_PACKET = 12, |
| 369 | OFPBRC_MULTIPART_BUFFER_OVERFLOW = 13, |
| 370 | }; |
| 371 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 372 | enum ofp_bad_action_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 373 | OFPBAC_BAD_TYPE = 0, |
| 374 | OFPBAC_BAD_LEN = 1, |
| 375 | OFPBAC_BAD_EXPERIMENTER = 2, |
Rob Vaterlaus | b3f49d9 | 2013-10-01 17:57:31 -0700 | [diff] [blame] | 376 | OFPBAC_BAD_EXPERIMENTER_TYPE = 3, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 377 | OFPBAC_BAD_OUT_PORT = 4, |
| 378 | OFPBAC_BAD_ARGUMENT = 5, |
| 379 | OFPBAC_EPERM = 6, |
| 380 | OFPBAC_TOO_MANY = 7, |
| 381 | OFPBAC_BAD_QUEUE = 8, |
| 382 | OFPBAC_BAD_OUT_GROUP = 9, |
| 383 | OFPBAC_MATCH_INCONSISTENT = 10, |
| 384 | OFPBAC_UNSUPPORTED_ORDER = 11, |
| 385 | OFPBAC_BAD_TAG = 12, |
| 386 | OFPBAC_BAD_SET_TYPE = 13, |
| 387 | OFPBAC_BAD_SET_LEN = 14, |
| 388 | OFPBAC_BAD_SET_ARGUMENT = 15, |
| 389 | }; |
| 390 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 391 | enum ofp_bad_instruction_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 392 | OFPBIC_UNKNOWN_INST = 0, |
| 393 | OFPBIC_UNSUP_INST = 1, |
| 394 | OFPBIC_BAD_TABLE_ID = 2, |
| 395 | OFPBIC_UNSUP_METADATA = 3, |
| 396 | OFPBIC_UNSUP_METADATA_MASK = 4, |
| 397 | OFPBIC_BAD_EXPERIMENTER = 5, |
Rob Vaterlaus | b3f49d9 | 2013-10-01 17:57:31 -0700 | [diff] [blame] | 398 | OFPBIC_BAD_EXPERIMENTER_TYPE = 6, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 399 | OFPBIC_BAD_LEN = 7, |
| 400 | OFPBIC_EPERM = 8, |
| 401 | }; |
| 402 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 403 | enum ofp_bad_match_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 404 | OFPBMC_BAD_TYPE = 0, |
| 405 | OFPBMC_BAD_LEN = 1, |
| 406 | OFPBMC_BAD_TAG = 2, |
| 407 | OFPBMC_BAD_DL_ADDR_MASK = 3, |
| 408 | OFPBMC_BAD_NW_ADDR_MASK = 4, |
| 409 | OFPBMC_BAD_WILDCARDS = 5, |
| 410 | OFPBMC_BAD_FIELD = 6, |
| 411 | OFPBMC_BAD_VALUE = 7, |
| 412 | OFPBMC_BAD_MASK = 8, |
| 413 | OFPBMC_BAD_PREREQ = 9, |
| 414 | OFPBMC_DUP_FIELD = 10, |
| 415 | OFPBMC_EPERM = 11, |
| 416 | }; |
| 417 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 418 | enum ofp_flow_mod_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 419 | OFPFMFC_UNKNOWN = 0, |
| 420 | OFPFMFC_TABLE_FULL = 1, |
| 421 | OFPFMFC_BAD_TABLE_ID = 2, |
| 422 | OFPFMFC_OVERLAP = 3, |
| 423 | OFPFMFC_EPERM = 4, |
| 424 | OFPFMFC_BAD_TIMEOUT = 5, |
| 425 | OFPFMFC_BAD_COMMAND = 6, |
| 426 | OFPFMFC_BAD_FLAGS = 7, |
| 427 | }; |
| 428 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 429 | enum ofp_group_mod_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 430 | OFPGMFC_GROUP_EXISTS = 0, |
| 431 | OFPGMFC_INVALID_GROUP = 1, |
| 432 | OFPGMFC_WEIGHT_UNSUPPORTED = 2, |
| 433 | OFPGMFC_OUT_OF_GROUPS = 3, |
| 434 | OFPGMFC_OUT_OF_BUCKETS = 4, |
| 435 | OFPGMFC_CHAINING_UNSUPPORTED = 5, |
| 436 | OFPGMFC_WATCH_UNSUPPORTED = 6, |
| 437 | OFPGMFC_LOOP = 7, |
| 438 | OFPGMFC_UNKNOWN_GROUP = 8, |
| 439 | OFPGMFC_CHAINED_GROUP = 9, |
| 440 | OFPGMFC_BAD_TYPE = 10, |
| 441 | OFPGMFC_BAD_COMMAND = 11, |
| 442 | OFPGMFC_BAD_BUCKET = 12, |
| 443 | OFPGMFC_BAD_WATCH = 13, |
| 444 | OFPGMFC_EPERM = 14, |
| 445 | }; |
| 446 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 447 | enum ofp_port_mod_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 448 | OFPPMFC_BAD_PORT = 0, |
| 449 | OFPPMFC_BAD_HW_ADDR = 1, |
| 450 | OFPPMFC_BAD_CONFIG = 2, |
| 451 | OFPPMFC_BAD_ADVERTISE = 3, |
| 452 | OFPPMFC_EPERM = 4, |
| 453 | }; |
| 454 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 455 | enum ofp_table_mod_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 456 | OFPTMFC_BAD_TABLE = 0, |
| 457 | OFPTMFC_BAD_CONFIG = 1, |
| 458 | OFPTMFC_EPERM = 2, |
| 459 | }; |
| 460 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 461 | enum ofp_queue_op_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 462 | OFPQOFC_BAD_PORT = 0, |
| 463 | OFPQOFC_BAD_QUEUE = 1, |
| 464 | OFPQOFC_EPERM = 2, |
| 465 | }; |
| 466 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 467 | enum ofp_switch_config_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 468 | OFPSCFC_BAD_FLAGS = 0, |
| 469 | OFPSCFC_BAD_LEN = 1, |
| 470 | OFPSCFC_EPERM = 2, |
| 471 | }; |
| 472 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 473 | enum ofp_role_request_failed_code(wire_type=uint16_t){ |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 474 | OFPRRFC_STALE = 0, |
| 475 | OFPRRFC_UNSUP = 1, |
| 476 | OFPRRFC_BAD_ROLE = 2, |
| 477 | }; |
| 478 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 479 | enum ofp_meter_mod_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 480 | OFPMMFC_UNKNOWN = 0, |
| 481 | OFPMMFC_METER_EXISTS = 1, |
| 482 | OFPMMFC_INVALID_METER = 2, |
| 483 | OFPMMFC_UNKNOWN_METER = 3, |
| 484 | OFPMMFC_BAD_COMMAND = 4, |
| 485 | OFPMMFC_BAD_FLAGS = 5, |
| 486 | OFPMMFC_BAD_RATE = 6, |
| 487 | OFPMMFC_BAD_BURST = 7, |
| 488 | OFPMMFC_BAD_BAND = 8, |
| 489 | OFPMMFC_BAD_BAND_VALUE = 9, |
| 490 | OFPMMFC_OUT_OF_METERS = 10, |
| 491 | OFPMMFC_OUT_OF_BANDS = 11, |
| 492 | }; |
| 493 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 494 | enum ofp_table_features_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 495 | OFPTFFC_BAD_TABLE = 0, |
| 496 | OFPTFFC_BAD_METADATA = 1, |
| 497 | OFPTFFC_BAD_TYPE = 2, |
| 498 | OFPTFFC_BAD_LEN = 3, |
| 499 | OFPTFFC_BAD_ARGUMENT = 4, |
| 500 | OFPTFFC_EPERM = 5, |
| 501 | }; |
| 502 | |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 503 | enum ofp_stats_type(wire_type=uint16_t) { |
| 504 | OFPST_DESC = 0, |
| 505 | OFPST_FLOW = 1, |
| 506 | OFPST_AGGREGATE = 2, |
| 507 | OFPST_TABLE = 3, |
| 508 | OFPST_PORT = 4, |
| 509 | OFPST_QUEUE = 5, |
| 510 | OFPST_GROUP = 6, |
| 511 | OFPST_GROUP_DESC = 7, |
| 512 | OFPST_GROUP_FEATURES = 8, |
| 513 | OFPST_METER = 9, |
| 514 | OFPST_METER_CONFIG = 10, |
| 515 | OFPST_METER_FEATURES = 11, |
| 516 | OFPST_TABLE_FEATURES = 12, |
| 517 | OFPST_PORT_DESC = 13, |
| 518 | OFPST_EXPERIMENTER = 0xffff, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 519 | }; |
| 520 | |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 521 | enum ofp_stats_request_flags(wire_type=uint16_t, bitmask=True) { |
| 522 | OFPSF_REQ_MORE = 0x1, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 523 | }; |
| 524 | |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 525 | enum ofp_stats_reply_flags(wire_type=uint16_t, bitmask=True) { |
| 526 | OFPSF_REPLY_MORE = 0x1, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 527 | }; |
| 528 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 529 | enum ofp_table_feature_prop_type(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 530 | OFPTFPT_INSTRUCTIONS = 0, |
| 531 | OFPTFPT_INSTRUCTIONS_MISS = 1, |
| 532 | OFPTFPT_NEXT_TABLES = 2, |
| 533 | OFPTFPT_NEXT_TABLES_MISS = 3, |
| 534 | OFPTFPT_WRITE_ACTIONS = 4, |
| 535 | OFPTFPT_WRITE_ACTIONS_MISS = 5, |
| 536 | OFPTFPT_APPLY_ACTIONS = 6, |
| 537 | OFPTFPT_APPLY_ACTIONS_MISS = 7, |
| 538 | OFPTFPT_MATCH = 8, |
| 539 | OFPTFPT_WILDCARDS = 0xa, |
| 540 | OFPTFPT_WRITE_SETFIELD = 0xc, |
| 541 | OFPTFPT_WRITE_SETFIELD_MISS = 0xd, |
| 542 | OFPTFPT_APPLY_SETFIELD = 0xe, |
| 543 | OFPTFPT_APPLY_SETFIELD_MISS = 0xf, |
| 544 | OFPTFPT_EXPERIMENTER = 0xfffe, |
| 545 | OFPTFPT_EXPERIMENTER_MISS = 0xffff, |
| 546 | }; |
| 547 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 548 | enum ofp_group_capabilities(wire_type=uint32_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 549 | OFPGFC_SELECT_WEIGHT = 0x1, |
| 550 | OFPGFC_SELECT_LIVENESS = 0x2, |
| 551 | OFPGFC_CHAINING = 0x4, |
| 552 | OFPGFC_CHAINING_CHECKS = 0x8, |
| 553 | }; |
| 554 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 555 | enum ofp_queue_properties(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 556 | OFPQT_MIN_RATE = 0x1, |
| 557 | OFPQT_MAX_RATE = 0x2, |
| 558 | OFPQT_EXPERIMENTER = 0xffff, |
| 559 | }; |
| 560 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 561 | enum ofp_controller_role(wire_type=uint32_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 562 | OFPCR_ROLE_NOCHANGE = 0, |
| 563 | OFPCR_ROLE_EQUAL = 1, |
| 564 | OFPCR_ROLE_MASTER = 2, |
| 565 | OFPCR_ROLE_SLAVE = 3, |
| 566 | }; |
| 567 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 568 | enum ofp_hello_elem_type(wire_type=uint16_t) { |
Rich Lane | 0733cd6 | 2013-04-18 21:14:42 -0700 | [diff] [blame] | 569 | OFPHET_VERSIONBITMAP = 1, |
| 570 | }; |
| 571 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 572 | /* XXX rename to of_message */ |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 573 | struct of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 574 | uint8_t version; |
Andreas Wundsam | c37ba3d | 2013-08-02 17:51:51 -0700 | [diff] [blame] | 575 | uint8_t type == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 576 | uint16_t length; |
| 577 | uint32_t xid; |
| 578 | }; |
| 579 | |
xinwu | f08ef68 | 2013-12-05 18:29:20 -0800 | [diff] [blame] | 580 | struct of_uint64 { |
| 581 | uint64_t value; |
| 582 | }; |
| 583 | |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 584 | // Special structures used for managing scalar list elements |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 585 | struct of_uint32 { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 586 | uint32_t value; |
| 587 | }; |
| 588 | |
| 589 | // Special structures used for managing scalar list elements |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 590 | struct of_uint8 { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 591 | uint8_t value; |
| 592 | }; |
| 593 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 594 | struct of_hello_elem { |
Andreas Wundsam | 70411bf | 2013-08-02 22:26:38 -0700 | [diff] [blame] | 595 | uint16_t type == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 596 | uint16_t length; |
| 597 | }; |
| 598 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 599 | struct of_hello_elem_versionbitmap : of_hello_elem { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 600 | uint16_t type == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 601 | uint16_t length; |
| 602 | list(of_uint32_t) bitmaps; |
| 603 | }; |
| 604 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 605 | struct of_hello : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 606 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 607 | uint8_t type == 0; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 608 | uint16_t length; |
| 609 | uint32_t xid; |
| 610 | list(of_hello_elem_t) elements; |
| 611 | }; |
| 612 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 613 | struct of_echo_request : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 614 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 615 | uint8_t type == 2; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 616 | uint16_t length; |
| 617 | uint32_t xid; |
| 618 | of_octets_t data; |
| 619 | }; |
| 620 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 621 | struct of_echo_reply : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 622 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 623 | uint8_t type == 3; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 624 | uint16_t length; |
| 625 | uint32_t xid; |
| 626 | of_octets_t data; |
| 627 | }; |
| 628 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 629 | struct of_experimenter : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 630 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 631 | uint8_t type == 4; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 632 | uint16_t length; |
| 633 | uint32_t xid; |
Rich Lane | b25d07c | 2013-08-22 17:22:43 -0700 | [diff] [blame] | 634 | uint32_t experimenter == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 635 | uint32_t subtype; |
| 636 | of_octets_t data; |
| 637 | }; |
| 638 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 639 | struct of_barrier_request : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 640 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 641 | uint8_t type == 20; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 642 | uint16_t length; |
| 643 | uint32_t xid; |
| 644 | }; |
| 645 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 646 | struct of_barrier_reply : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 647 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 648 | uint8_t type == 21; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 649 | uint16_t length; |
| 650 | uint32_t xid; |
| 651 | }; |
| 652 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 653 | struct of_get_config_request : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 654 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 655 | uint8_t type == 7; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 656 | uint16_t length; |
| 657 | uint32_t xid; |
| 658 | }; |
| 659 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 660 | struct of_get_config_reply : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 661 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 662 | uint8_t type == 8; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 663 | uint16_t length; |
| 664 | uint32_t xid; |
Andreas Wundsam | 057540b | 2013-11-19 16:51:36 -0800 | [diff] [blame] | 665 | enum ofp_config_flags flags; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 666 | uint16_t miss_send_len; |
| 667 | }; |
| 668 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 669 | struct of_set_config : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 670 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 671 | uint8_t type == 9; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 672 | uint16_t length; |
| 673 | uint32_t xid; |
Andreas Wundsam | 057540b | 2013-11-19 16:51:36 -0800 | [diff] [blame] | 674 | enum ofp_config_flags flags; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 675 | uint16_t miss_send_len; |
| 676 | }; |
| 677 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 678 | struct of_table_mod : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 679 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 680 | uint8_t type == 17; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 681 | uint16_t length; |
| 682 | uint32_t xid; |
| 683 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 684 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 685 | uint32_t config; |
| 686 | }; |
| 687 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 688 | struct of_port_desc { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 689 | of_port_no_t port_no; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 690 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 691 | of_mac_addr_t hw_addr; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 692 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 693 | of_port_name_t name; |
Rob Vaterlaus | d9d72d2 | 2013-09-23 14:50:52 -0700 | [diff] [blame] | 694 | enum ofp_port_config config; |
| 695 | enum ofp_port_state state; |
| 696 | enum ofp_port_features curr; |
| 697 | enum ofp_port_features advertised; |
| 698 | enum ofp_port_features supported; |
| 699 | enum ofp_port_features peer; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 700 | uint32_t curr_speed; |
| 701 | uint32_t max_speed; |
| 702 | }; |
| 703 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 704 | struct of_features_request : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 705 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 706 | uint8_t type == 5; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 707 | uint16_t length; |
| 708 | uint32_t xid; |
| 709 | }; |
| 710 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 711 | struct of_features_reply : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 712 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 713 | uint8_t type == 6; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 714 | uint16_t length; |
| 715 | uint32_t xid; |
| 716 | uint64_t datapath_id; |
| 717 | uint32_t n_buffers; |
| 718 | uint8_t n_tables; |
| 719 | uint8_t auxiliary_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 720 | pad(2); |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 721 | enum ofp_capabilities capabilities; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 722 | uint32_t reserved; |
| 723 | }; |
| 724 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 725 | struct of_port_status : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 726 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 727 | uint8_t type == 12; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 728 | uint16_t length; |
| 729 | uint32_t xid; |
Rob Vaterlaus | d9d72d2 | 2013-09-23 14:50:52 -0700 | [diff] [blame] | 730 | enum ofp_port_reason reason; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 731 | pad(7); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 732 | of_port_desc_t desc; |
| 733 | }; |
| 734 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 735 | struct of_port_mod : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 736 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 737 | uint8_t type == 16; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 738 | uint16_t length; |
| 739 | uint32_t xid; |
| 740 | of_port_no_t port_no; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 741 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 742 | of_mac_addr_t hw_addr; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 743 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 744 | uint32_t config; |
| 745 | uint32_t mask; |
| 746 | uint32_t advertise; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 747 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 748 | }; |
| 749 | |
| 750 | // FIXME Does this need to be v4? |
Andreas Wundsam | 5da6851 | 2013-10-22 22:18:00 -0700 | [diff] [blame] | 751 | struct of_match_v3(align=8, length_includes_align=False) { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 752 | uint16_t type == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 753 | uint16_t length; |
| 754 | list(of_oxm_t) oxm_list; |
| 755 | }; |
| 756 | |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 757 | // This looks like an action header, but is standalone. See |
| 758 | // ofp_table_features_prop_actions |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 759 | struct of_action_id { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 760 | uint16_t type; |
| 761 | uint16_t len; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 762 | }; |
| 763 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 764 | struct of_action_output : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 765 | uint16_t type == 0; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 766 | uint16_t len; |
| 767 | of_port_no_t port; |
| 768 | uint16_t max_len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 769 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 770 | }; |
| 771 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 772 | struct of_action_copy_ttl_out : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 773 | uint16_t type == 11; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 774 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 775 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 776 | }; |
| 777 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 778 | struct of_action_copy_ttl_in : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 779 | uint16_t type == 12; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 780 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 781 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 782 | }; |
| 783 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 784 | struct of_action_set_mpls_ttl : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 785 | uint16_t type == 15; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 786 | uint16_t len; |
| 787 | uint8_t mpls_ttl; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 788 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 789 | }; |
| 790 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 791 | struct of_action_dec_mpls_ttl : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 792 | uint16_t type == 16; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 793 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 794 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 795 | }; |
| 796 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 797 | struct of_action_push_vlan : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 798 | uint16_t type == 17; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 799 | uint16_t len; |
| 800 | uint16_t ethertype; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 801 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 802 | }; |
| 803 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 804 | struct of_action_pop_vlan : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 805 | uint16_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 806 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 807 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 808 | }; |
| 809 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 810 | struct of_action_push_mpls : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 811 | uint16_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 812 | uint16_t len; |
| 813 | uint16_t ethertype; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 814 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 815 | }; |
| 816 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 817 | struct of_action_pop_mpls : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 818 | uint16_t type == 20; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 819 | uint16_t len; |
| 820 | uint16_t ethertype; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 821 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 822 | }; |
| 823 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 824 | struct of_action_set_queue : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 825 | uint16_t type == 21; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 826 | uint16_t len; |
| 827 | uint32_t queue_id; |
| 828 | }; |
| 829 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 830 | struct of_action_group : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 831 | uint16_t type == 22; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 832 | uint16_t len; |
| 833 | uint32_t group_id; |
| 834 | }; |
| 835 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 836 | struct of_action_set_nw_ttl : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 837 | uint16_t type == 23; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 838 | uint16_t len; |
| 839 | uint8_t nw_ttl; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 840 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 841 | }; |
| 842 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 843 | struct of_action_dec_nw_ttl : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 844 | uint16_t type == 24; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 845 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 846 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 847 | }; |
| 848 | |
Andreas Wundsam | 5da6851 | 2013-10-22 22:18:00 -0700 | [diff] [blame] | 849 | struct of_action_set_field(align=8, length_includes_align=True) : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 850 | uint16_t type == 25; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 851 | uint16_t len; |
Rich Lane | be90eae | 2013-07-22 16:44:26 -0700 | [diff] [blame] | 852 | of_oxm_t field; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 853 | }; |
| 854 | |
Andreas Wundsam | 5da6851 | 2013-10-22 22:18:00 -0700 | [diff] [blame] | 855 | struct of_action_experimenter(align=8, length_includes_align=True): of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 856 | uint16_t type == 65535; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 857 | uint16_t len; |
Rich Lane | b25d07c | 2013-08-22 17:22:43 -0700 | [diff] [blame] | 858 | uint32_t experimenter == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 859 | of_octets_t data; |
| 860 | }; |
| 861 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 862 | struct of_action_pop_pbb : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 863 | uint16_t type == 27; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 864 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 865 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 866 | }; |
| 867 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 868 | struct of_action_push_pbb : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 869 | uint16_t type == 26; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 870 | uint16_t len; |
| 871 | uint16_t ethertype; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 872 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 873 | }; |
| 874 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 875 | struct of_action { |
Andreas Wundsam | c37ba3d | 2013-08-02 17:51:51 -0700 | [diff] [blame] | 876 | uint16_t type == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 877 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 878 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 879 | }; |
| 880 | |
Jonathan Stout | 661c468 | 2014-03-03 12:35:31 -0500 | [diff] [blame] | 881 | struct of_instruction_id { |
| 882 | uint16_t type; |
| 883 | uint16_t len; |
| 884 | }; |
| 885 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 886 | struct of_instruction { |
Andreas Wundsam | c37ba3d | 2013-08-02 17:51:51 -0700 | [diff] [blame] | 887 | uint16_t type == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 888 | uint16_t len; |
| 889 | }; |
| 890 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 891 | struct of_instruction_goto_table : of_instruction { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 892 | uint16_t type == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 893 | uint16_t len; |
| 894 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 895 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 896 | }; |
| 897 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 898 | struct of_instruction_write_metadata : of_instruction { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 899 | uint16_t type == 2; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 900 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 901 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 902 | uint64_t metadata; |
| 903 | uint64_t metadata_mask; |
| 904 | }; |
| 905 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 906 | struct of_instruction_write_actions : of_instruction { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 907 | uint16_t type == 3; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 908 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 909 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 910 | list(of_action_t) actions; |
| 911 | }; |
| 912 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 913 | struct of_instruction_apply_actions : of_instruction { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 914 | uint16_t type == 4; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 915 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 916 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 917 | list(of_action_t) actions; |
| 918 | }; |
| 919 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 920 | struct of_instruction_clear_actions : of_instruction { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 921 | uint16_t type == 5; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 922 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 923 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 924 | }; |
| 925 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 926 | struct of_instruction_meter : of_instruction { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 927 | uint16_t type == 6; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 928 | uint16_t len; |
| 929 | uint32_t meter_id; |
| 930 | }; |
| 931 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 932 | struct of_instruction_experimenter : of_instruction { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 933 | uint16_t type == 65535; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 934 | uint16_t len; |
Rich Lane | b25d07c | 2013-08-22 17:22:43 -0700 | [diff] [blame] | 935 | uint32_t experimenter == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 936 | of_octets_t data; |
| 937 | }; |
| 938 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 939 | struct of_flow_mod : of_header { |
| 940 | uint8_t version; |
| 941 | uint8_t type == 14; |
| 942 | uint16_t length; |
| 943 | uint32_t xid; |
| 944 | uint64_t cookie; |
| 945 | uint64_t cookie_mask; |
| 946 | uint8_t table_id; |
Andreas Wundsam | c37ba3d | 2013-08-02 17:51:51 -0700 | [diff] [blame] | 947 | of_fm_cmd_t _command == ?; |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 948 | uint16_t idle_timeout; |
| 949 | uint16_t hard_timeout; |
| 950 | uint16_t priority; |
| 951 | uint32_t buffer_id; |
| 952 | of_port_no_t out_port; |
| 953 | uint32_t out_group; |
Andreas Wundsam | dfeb594 | 2013-09-19 13:07:49 -0700 | [diff] [blame] | 954 | enum ofp_flow_mod_flags flags; |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 955 | pad(2); |
| 956 | of_match_t match; |
| 957 | list(of_instruction_t) instructions; |
| 958 | }; |
| 959 | |
| 960 | struct of_flow_add : of_flow_mod { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 961 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 962 | uint8_t type == 14; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 963 | uint16_t length; |
| 964 | uint32_t xid; |
| 965 | uint64_t cookie; |
| 966 | uint64_t cookie_mask; |
| 967 | uint8_t table_id; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 968 | of_fm_cmd_t _command == 0; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 969 | uint16_t idle_timeout; |
| 970 | uint16_t hard_timeout; |
| 971 | uint16_t priority; |
| 972 | uint32_t buffer_id; |
| 973 | of_port_no_t out_port; |
| 974 | uint32_t out_group; |
Andreas Wundsam | dfeb594 | 2013-09-19 13:07:49 -0700 | [diff] [blame] | 975 | enum ofp_flow_mod_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 976 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 977 | of_match_t match; |
| 978 | list(of_instruction_t) instructions; |
| 979 | }; |
| 980 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 981 | struct of_flow_modify : of_flow_mod { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 982 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 983 | uint8_t type == 14; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 984 | uint16_t length; |
| 985 | uint32_t xid; |
| 986 | uint64_t cookie; |
| 987 | uint64_t cookie_mask; |
| 988 | uint8_t table_id; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 989 | of_fm_cmd_t _command == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 990 | uint16_t idle_timeout; |
| 991 | uint16_t hard_timeout; |
| 992 | uint16_t priority; |
| 993 | uint32_t buffer_id; |
| 994 | of_port_no_t out_port; |
| 995 | uint32_t out_group; |
Andreas Wundsam | dfeb594 | 2013-09-19 13:07:49 -0700 | [diff] [blame] | 996 | enum ofp_flow_mod_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 997 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 998 | of_match_t match; |
| 999 | list(of_instruction_t) instructions; |
| 1000 | }; |
| 1001 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1002 | struct of_flow_modify_strict : of_flow_mod { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1003 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1004 | uint8_t type == 14; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1005 | uint16_t length; |
| 1006 | uint32_t xid; |
| 1007 | uint64_t cookie; |
| 1008 | uint64_t cookie_mask; |
| 1009 | uint8_t table_id; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1010 | of_fm_cmd_t _command == 2; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1011 | uint16_t idle_timeout; |
| 1012 | uint16_t hard_timeout; |
| 1013 | uint16_t priority; |
| 1014 | uint32_t buffer_id; |
| 1015 | of_port_no_t out_port; |
| 1016 | uint32_t out_group; |
Andreas Wundsam | dfeb594 | 2013-09-19 13:07:49 -0700 | [diff] [blame] | 1017 | enum ofp_flow_mod_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1018 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1019 | of_match_t match; |
| 1020 | list(of_instruction_t) instructions; |
| 1021 | }; |
| 1022 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1023 | struct of_flow_delete : of_flow_mod { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1024 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1025 | uint8_t type == 14; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1026 | uint16_t length; |
| 1027 | uint32_t xid; |
| 1028 | uint64_t cookie; |
| 1029 | uint64_t cookie_mask; |
| 1030 | uint8_t table_id; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1031 | of_fm_cmd_t _command == 3; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1032 | uint16_t idle_timeout; |
| 1033 | uint16_t hard_timeout; |
| 1034 | uint16_t priority; |
| 1035 | uint32_t buffer_id; |
| 1036 | of_port_no_t out_port; |
| 1037 | uint32_t out_group; |
Andreas Wundsam | dfeb594 | 2013-09-19 13:07:49 -0700 | [diff] [blame] | 1038 | enum ofp_flow_mod_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1039 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1040 | of_match_t match; |
| 1041 | list(of_instruction_t) instructions; |
| 1042 | }; |
| 1043 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1044 | struct of_flow_delete_strict : of_flow_mod { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1045 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1046 | uint8_t type == 14; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1047 | uint16_t length; |
| 1048 | uint32_t xid; |
| 1049 | uint64_t cookie; |
| 1050 | uint64_t cookie_mask; |
| 1051 | uint8_t table_id; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1052 | of_fm_cmd_t _command == 4; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1053 | uint16_t idle_timeout; |
| 1054 | uint16_t hard_timeout; |
| 1055 | uint16_t priority; |
| 1056 | uint32_t buffer_id; |
| 1057 | of_port_no_t out_port; |
| 1058 | uint32_t out_group; |
Andreas Wundsam | dfeb594 | 2013-09-19 13:07:49 -0700 | [diff] [blame] | 1059 | enum ofp_flow_mod_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1060 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1061 | of_match_t match; |
| 1062 | list(of_instruction_t) instructions; |
| 1063 | }; |
| 1064 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1065 | struct of_bucket { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1066 | uint16_t len; |
| 1067 | uint16_t weight; |
| 1068 | of_port_no_t watch_port; |
| 1069 | uint32_t watch_group; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1070 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1071 | list(of_action_t) actions; |
| 1072 | }; |
| 1073 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1074 | struct of_group_mod : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1075 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1076 | uint8_t type == 15; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1077 | uint16_t length; |
| 1078 | uint32_t xid; |
Andreas Wundsam | 5812cf3 | 2013-11-15 13:51:24 -0800 | [diff] [blame] | 1079 | enum ofp_group_mod_command command == ?; |
| 1080 | enum ofp_group_type group_type; |
| 1081 | pad(1); |
| 1082 | uint32_t group_id; |
| 1083 | list(of_bucket_t) buckets; |
| 1084 | }; |
| 1085 | |
| 1086 | struct of_group_add : of_group_mod { |
| 1087 | uint8_t version; |
| 1088 | uint8_t type == 15; |
| 1089 | uint16_t length; |
| 1090 | uint32_t xid; |
| 1091 | enum ofp_group_mod_command command == 0; |
| 1092 | enum ofp_group_type group_type; |
| 1093 | pad(1); |
| 1094 | uint32_t group_id; |
| 1095 | list(of_bucket_t) buckets; |
| 1096 | }; |
| 1097 | |
| 1098 | struct of_group_modify : of_group_mod { |
| 1099 | uint8_t version; |
| 1100 | uint8_t type == 15; |
| 1101 | uint16_t length; |
| 1102 | uint32_t xid; |
| 1103 | enum ofp_group_mod_command command == 1; |
| 1104 | enum ofp_group_type group_type; |
| 1105 | pad(1); |
| 1106 | uint32_t group_id; |
| 1107 | list(of_bucket_t) buckets; |
| 1108 | }; |
| 1109 | |
| 1110 | struct of_group_delete : of_group_mod { |
| 1111 | uint8_t version; |
| 1112 | uint8_t type == 15; |
| 1113 | uint16_t length; |
| 1114 | uint32_t xid; |
| 1115 | enum ofp_group_mod_command command == 2; |
| 1116 | enum ofp_group_type group_type; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1117 | pad(1); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1118 | uint32_t group_id; |
| 1119 | list(of_bucket_t) buckets; |
| 1120 | }; |
| 1121 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1122 | struct of_packet_out : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1123 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1124 | uint8_t type == 13; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1125 | uint16_t length; |
| 1126 | uint32_t xid; |
| 1127 | uint32_t buffer_id; |
| 1128 | of_port_no_t in_port; |
| 1129 | uint16_t actions_len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1130 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1131 | list(of_action_t) actions; |
| 1132 | of_octets_t data; |
| 1133 | }; |
| 1134 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1135 | struct of_packet_in : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1136 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1137 | uint8_t type == 10; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1138 | uint16_t length; |
| 1139 | uint32_t xid; |
| 1140 | uint32_t buffer_id; |
| 1141 | uint16_t total_len; |
| 1142 | uint8_t reason; |
| 1143 | uint8_t table_id; |
| 1144 | uint64_t cookie; |
| 1145 | of_match_t match; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1146 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1147 | of_octets_t data; /* FIXME: Ensure total_len gets updated */ |
| 1148 | }; |
| 1149 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1150 | struct of_flow_removed : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1151 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1152 | uint8_t type == 11; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1153 | uint16_t length; |
| 1154 | uint32_t xid; |
| 1155 | uint64_t cookie; |
| 1156 | uint16_t priority; |
| 1157 | uint8_t reason; |
| 1158 | uint8_t table_id; |
| 1159 | uint32_t duration_sec; |
| 1160 | uint32_t duration_nsec; |
| 1161 | uint16_t idle_timeout; |
| 1162 | uint16_t hard_timeout; |
| 1163 | uint64_t packet_count; |
| 1164 | uint64_t byte_count; |
| 1165 | of_match_t match; |
| 1166 | }; |
| 1167 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1168 | struct of_meter_band { |
Andreas Wundsam | 9ba6536 | 2013-08-02 19:14:42 -0700 | [diff] [blame] | 1169 | uint16_t type == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1170 | uint16_t len; |
| 1171 | // uint32_t rate; // These are excluded b/c this is the header |
| 1172 | // uint32_t burst_size; // These are excluded b/c this is the header |
| 1173 | }; |
| 1174 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1175 | struct of_meter_band_drop : of_meter_band { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1176 | uint16_t type == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1177 | uint16_t len; |
| 1178 | uint32_t rate; |
| 1179 | uint32_t burst_size; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1180 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1181 | }; |
| 1182 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1183 | struct of_meter_band_dscp_remark : of_meter_band { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1184 | uint16_t type == 2; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1185 | uint16_t len; |
| 1186 | uint32_t rate; |
| 1187 | uint32_t burst_size; |
| 1188 | uint8_t prec_level; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1189 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1190 | }; |
| 1191 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1192 | struct of_meter_band_experimenter : of_meter_band { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1193 | uint16_t type == 65535; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1194 | uint16_t len; |
| 1195 | uint32_t rate; |
| 1196 | uint32_t burst_size; |
| 1197 | uint32_t experimenter; |
| 1198 | }; |
| 1199 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1200 | struct of_meter_mod : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1201 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1202 | uint8_t type == 29; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1203 | uint16_t length; |
| 1204 | uint32_t xid; |
| 1205 | uint16_t command; |
| 1206 | uint16_t flags; |
| 1207 | uint32_t meter_id; |
| 1208 | list(of_meter_band_t) meters; |
| 1209 | }; |
| 1210 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1211 | struct of_error_msg : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1212 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1213 | uint8_t type == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1214 | uint16_t length; |
| 1215 | uint32_t xid; |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 1216 | uint16_t err_type == ?; |
| 1217 | }; |
| 1218 | |
| 1219 | struct of_hello_failed_error_msg : of_error_msg { |
| 1220 | uint8_t version; |
| 1221 | uint8_t type == 1; |
| 1222 | uint16_t length; |
| 1223 | uint32_t xid; |
| 1224 | uint16_t err_type == 0; |
| 1225 | enum ofp_hello_failed_code code; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1226 | of_octets_t data; |
| 1227 | }; |
| 1228 | |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 1229 | struct of_bad_request_error_msg : of_error_msg { |
| 1230 | uint8_t version; |
| 1231 | uint8_t type == 1; |
| 1232 | uint16_t length; |
| 1233 | uint32_t xid; |
| 1234 | uint16_t err_type == 1; |
| 1235 | enum ofp_bad_request_code code; |
| 1236 | of_octets_t data; |
| 1237 | }; |
| 1238 | |
| 1239 | struct of_bad_action_error_msg : of_error_msg { |
| 1240 | uint8_t version; |
| 1241 | uint8_t type == 1; |
| 1242 | uint16_t length; |
| 1243 | uint32_t xid; |
| 1244 | uint16_t err_type == 2; |
| 1245 | enum ofp_bad_action_code code; |
| 1246 | of_octets_t data; |
| 1247 | }; |
| 1248 | |
| 1249 | struct of_bad_instruction_error_msg : of_error_msg { |
| 1250 | uint8_t version; |
| 1251 | uint8_t type == 1; |
| 1252 | uint16_t length; |
| 1253 | uint32_t xid; |
| 1254 | uint16_t err_type == 3; |
| 1255 | enum ofp_bad_instruction_code code; |
| 1256 | of_octets_t data; |
| 1257 | }; |
| 1258 | |
| 1259 | struct of_bad_match_error_msg : of_error_msg { |
| 1260 | uint8_t version; |
| 1261 | uint8_t type == 1; |
| 1262 | uint16_t length; |
| 1263 | uint32_t xid; |
| 1264 | uint16_t err_type == 4; |
| 1265 | enum ofp_bad_match_code code; |
| 1266 | of_octets_t data; |
| 1267 | }; |
| 1268 | |
| 1269 | struct of_flow_mod_failed_error_msg : of_error_msg { |
| 1270 | uint8_t version; |
| 1271 | uint8_t type == 1; |
| 1272 | uint16_t length; |
| 1273 | uint32_t xid; |
| 1274 | uint16_t err_type == 5; |
| 1275 | enum ofp_flow_mod_failed_code code; |
| 1276 | of_octets_t data; |
| 1277 | }; |
| 1278 | |
| 1279 | struct of_group_mod_failed_error_msg : of_error_msg { |
| 1280 | uint8_t version; |
| 1281 | uint8_t type == 1; |
| 1282 | uint16_t length; |
| 1283 | uint32_t xid; |
| 1284 | uint16_t err_type == 6; |
| 1285 | enum ofp_group_mod_failed_code code; |
| 1286 | of_octets_t data; |
| 1287 | }; |
| 1288 | |
| 1289 | struct of_port_mod_failed_error_msg : of_error_msg { |
| 1290 | uint8_t version; |
| 1291 | uint8_t type == 1; |
| 1292 | uint16_t length; |
| 1293 | uint32_t xid; |
| 1294 | uint16_t err_type == 7; |
| 1295 | enum ofp_port_mod_failed_code code; |
| 1296 | of_octets_t data; |
| 1297 | }; |
| 1298 | |
| 1299 | struct of_table_mod_failed_error_msg : of_error_msg { |
| 1300 | uint8_t version; |
| 1301 | uint8_t type == 1; |
| 1302 | uint16_t length; |
| 1303 | uint32_t xid; |
| 1304 | uint16_t err_type == 8; |
| 1305 | enum ofp_table_mod_failed_code code; |
| 1306 | of_octets_t data; |
| 1307 | }; |
| 1308 | |
| 1309 | struct of_queue_op_failed_error_msg : of_error_msg { |
| 1310 | uint8_t version; |
| 1311 | uint8_t type == 1; |
| 1312 | uint16_t length; |
| 1313 | uint32_t xid; |
| 1314 | uint16_t err_type == 9; |
| 1315 | enum ofp_queue_op_failed_code code; |
| 1316 | of_octets_t data; |
| 1317 | }; |
| 1318 | |
| 1319 | struct of_switch_config_failed_error_msg : of_error_msg { |
| 1320 | uint8_t version; |
| 1321 | uint8_t type == 1; |
| 1322 | uint16_t length; |
| 1323 | uint32_t xid; |
| 1324 | uint16_t err_type == 10; |
| 1325 | enum ofp_switch_config_failed_code code; |
| 1326 | of_octets_t data; |
| 1327 | }; |
| 1328 | |
| 1329 | struct of_role_request_failed_error_msg : of_error_msg { |
| 1330 | uint8_t version; |
| 1331 | uint8_t type == 1; |
| 1332 | uint16_t length; |
| 1333 | uint32_t xid; |
| 1334 | uint16_t err_type == 11; |
| 1335 | enum ofp_role_request_failed_code code; |
| 1336 | of_octets_t data; |
| 1337 | }; |
| 1338 | |
| 1339 | struct of_meter_mod_failed_error_msg : of_error_msg { |
| 1340 | uint8_t version; |
| 1341 | uint8_t type == 1; |
| 1342 | uint16_t length; |
| 1343 | uint32_t xid; |
| 1344 | uint16_t err_type == 12; |
| 1345 | enum ofp_meter_mod_failed_code code; |
| 1346 | of_octets_t data; |
| 1347 | }; |
| 1348 | |
| 1349 | struct of_table_features_failed_error_msg : of_error_msg { |
| 1350 | uint8_t version; |
| 1351 | uint8_t type == 1; |
| 1352 | uint16_t length; |
| 1353 | uint32_t xid; |
| 1354 | uint16_t err_type == 13; |
| 1355 | enum ofp_table_features_failed_code code; |
| 1356 | of_octets_t data; |
| 1357 | }; |
| 1358 | |
Andreas Wundsam | cc8cd66 | 2013-11-15 13:52:06 -0800 | [diff] [blame] | 1359 | struct of_experimenter_error_msg : of_error_msg { |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 1360 | uint8_t version; |
| 1361 | uint8_t type == 1; |
| 1362 | uint16_t length; |
| 1363 | uint32_t xid; |
| 1364 | uint16_t err_type == 0xffff; |
| 1365 | uint16_t subtype; |
| 1366 | uint32_t experimenter; |
| 1367 | of_octets_t data; |
| 1368 | }; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1369 | |
| 1370 | // STATS ENTRIES: flow, table, port, queue, group stats, group desc stats |
| 1371 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1372 | struct of_flow_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1373 | uint16_t length; |
| 1374 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1375 | pad(1); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1376 | uint32_t duration_sec; |
| 1377 | uint32_t duration_nsec; |
| 1378 | uint16_t priority; |
| 1379 | uint16_t idle_timeout; |
| 1380 | uint16_t hard_timeout; |
Andreas Wundsam | 078fcfd | 2014-06-25 15:49:01 -0700 | [diff] [blame] | 1381 | enum ofp_flow_mod_flags flags; |
Rich Lane | 1a47c1c | 2013-08-28 15:27:00 -0700 | [diff] [blame] | 1382 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1383 | uint64_t cookie; |
| 1384 | uint64_t packet_count; |
| 1385 | uint64_t byte_count; |
| 1386 | of_match_t match; |
| 1387 | list(of_instruction_t) instructions; |
| 1388 | }; |
| 1389 | |
| 1390 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1391 | struct of_table_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1392 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1393 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1394 | uint32_t active_count; |
| 1395 | uint64_t lookup_count; |
| 1396 | uint64_t matched_count; |
| 1397 | }; |
| 1398 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1399 | struct of_port_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1400 | of_port_no_t port_no; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1401 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1402 | uint64_t rx_packets; |
| 1403 | uint64_t tx_packets; |
| 1404 | uint64_t rx_bytes; |
| 1405 | uint64_t tx_bytes; |
| 1406 | uint64_t rx_dropped; |
| 1407 | uint64_t tx_dropped; |
| 1408 | uint64_t rx_errors; |
| 1409 | uint64_t tx_errors; |
| 1410 | uint64_t rx_frame_err; |
| 1411 | uint64_t rx_over_err; |
| 1412 | uint64_t rx_crc_err; |
| 1413 | uint64_t collisions; |
| 1414 | uint32_t duration_sec; |
| 1415 | uint32_t duration_nsec; |
| 1416 | }; |
| 1417 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1418 | struct of_queue_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1419 | of_port_no_t port_no; |
| 1420 | uint32_t queue_id; |
| 1421 | uint64_t tx_bytes; |
| 1422 | uint64_t tx_packets; |
| 1423 | uint64_t tx_errors; |
| 1424 | uint32_t duration_sec; |
| 1425 | uint32_t duration_nsec; |
| 1426 | }; |
| 1427 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1428 | struct of_bucket_counter { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1429 | uint64_t packet_count; |
| 1430 | uint64_t byte_count; |
| 1431 | }; |
| 1432 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1433 | struct of_group_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1434 | uint16_t length; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1435 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1436 | uint32_t group_id; |
| 1437 | uint32_t ref_count; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1438 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1439 | uint64_t packet_count; |
| 1440 | uint64_t byte_count; |
| 1441 | uint32_t duration_sec; |
| 1442 | uint32_t duration_nsec; |
| 1443 | list(of_bucket_counter_t) bucket_stats; |
| 1444 | }; |
| 1445 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1446 | struct of_group_desc_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1447 | uint16_t length; |
Andreas Wundsam | 84603f0 | 2013-11-18 18:45:30 -0800 | [diff] [blame] | 1448 | enum ofp_group_type group_type; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1449 | pad(1); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1450 | uint32_t group_id; |
| 1451 | list(of_bucket_t) buckets; |
| 1452 | }; |
| 1453 | |
| 1454 | // STATS: |
| 1455 | // Desc, flow, agg, table, port, queue, group, group_desc, group_feat, experi |
| 1456 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1457 | struct of_stats_request : of_header { |
| 1458 | uint8_t version; |
| 1459 | uint8_t type == 18; |
| 1460 | uint16_t length; |
| 1461 | uint32_t xid; |
Andreas Wundsam | c37ba3d | 2013-08-02 17:51:51 -0700 | [diff] [blame] | 1462 | uint16_t stats_type == ?; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1463 | enum ofp_stats_request_flags flags; |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1464 | pad(4); |
| 1465 | }; |
| 1466 | |
| 1467 | struct of_stats_reply : of_header { |
| 1468 | uint8_t version; |
| 1469 | uint8_t type == 19; |
| 1470 | uint16_t length; |
| 1471 | uint32_t xid; |
Andreas Wundsam | c37ba3d | 2013-08-02 17:51:51 -0700 | [diff] [blame] | 1472 | uint16_t stats_type == ?; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1473 | enum ofp_stats_reply_flags flags; |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1474 | pad(4); |
| 1475 | }; |
| 1476 | |
| 1477 | struct of_desc_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1478 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1479 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1480 | uint16_t length; |
| 1481 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1482 | uint16_t stats_type == 0; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1483 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1484 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1485 | }; |
| 1486 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1487 | struct of_desc_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1488 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1489 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1490 | uint16_t length; |
| 1491 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1492 | uint16_t stats_type == 0; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1493 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1494 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1495 | of_desc_str_t mfr_desc; |
| 1496 | of_desc_str_t hw_desc; |
| 1497 | of_desc_str_t sw_desc; |
| 1498 | of_serial_num_t serial_num; |
| 1499 | of_desc_str_t dp_desc; |
| 1500 | }; |
| 1501 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1502 | struct of_flow_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1503 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1504 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1505 | uint16_t length; |
| 1506 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1507 | uint16_t stats_type == 1; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1508 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1509 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1510 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1511 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1512 | of_port_no_t out_port; |
| 1513 | uint32_t out_group; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1514 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1515 | uint64_t cookie; |
| 1516 | uint64_t cookie_mask; |
| 1517 | of_match_t match; |
| 1518 | }; |
| 1519 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1520 | struct of_flow_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1521 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1522 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1523 | uint16_t length; |
| 1524 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1525 | uint16_t stats_type == 1; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1526 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1527 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1528 | list(of_flow_stats_entry_t) entries; |
| 1529 | }; |
| 1530 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1531 | struct of_aggregate_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1532 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1533 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1534 | uint16_t length; |
| 1535 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1536 | uint16_t stats_type == 2; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1537 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1538 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1539 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1540 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1541 | of_port_no_t out_port; |
| 1542 | uint32_t out_group; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1543 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1544 | uint64_t cookie; |
| 1545 | uint64_t cookie_mask; |
| 1546 | of_match_t match; |
| 1547 | }; |
| 1548 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1549 | struct of_aggregate_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1550 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1551 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1552 | uint16_t length; |
| 1553 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1554 | uint16_t stats_type == 2; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1555 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1556 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1557 | uint64_t packet_count; |
| 1558 | uint64_t byte_count; |
| 1559 | uint32_t flow_count; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1560 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1561 | }; |
| 1562 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1563 | struct of_table_stats_request : of_stats_request { |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1564 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1565 | uint8_t type == 18; |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1566 | uint16_t length; |
| 1567 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1568 | uint16_t stats_type == 3; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1569 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1570 | pad(4); |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1571 | }; |
| 1572 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1573 | struct of_table_stats_reply : of_stats_reply { |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1574 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1575 | uint8_t type == 19; |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1576 | uint16_t length; |
| 1577 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1578 | uint16_t stats_type == 3; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1579 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1580 | pad(4); |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1581 | list(of_table_stats_entry_t) entries; |
| 1582 | }; |
| 1583 | |
Rich Lane | 6d43433 | 2013-11-13 09:23:10 -0800 | [diff] [blame] | 1584 | struct of_experimenter_stats_request : of_stats_request { |
| 1585 | uint8_t version; |
| 1586 | uint8_t type == 18; |
| 1587 | uint16_t length; |
| 1588 | uint32_t xid; |
| 1589 | uint16_t stats_type == 0xffff; |
| 1590 | enum ofp_stats_request_flags flags; |
| 1591 | pad(4); |
| 1592 | uint32_t experimenter == ?; |
| 1593 | uint32_t subtype; |
| 1594 | }; |
| 1595 | |
| 1596 | struct of_experimenter_stats_reply : of_stats_reply { |
| 1597 | uint8_t version; |
| 1598 | uint8_t type == 19; |
| 1599 | uint16_t length; |
| 1600 | uint32_t xid; |
| 1601 | uint16_t stats_type == 0xffff; |
| 1602 | enum ofp_stats_reply_flags flags; |
| 1603 | pad(4); |
| 1604 | uint32_t experimenter == ?; |
| 1605 | uint32_t subtype; |
| 1606 | }; |
| 1607 | |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1608 | // FIXME: These are padded to 8 byte align beyond the length indicated |
| 1609 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1610 | struct of_table_feature_prop { |
Rich Lane | a1b8f44 | 2013-10-01 22:05:22 -0700 | [diff] [blame] | 1611 | uint16_t type == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1612 | uint16_t length; |
| 1613 | }; |
| 1614 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1615 | struct of_table_feature_prop_instructions : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1616 | uint16_t type == 0; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1617 | uint16_t length; |
| 1618 | // FIXME Check if instruction_t is right for ids here |
Jonathan Stout | 661c468 | 2014-03-03 12:35:31 -0500 | [diff] [blame] | 1619 | list(of_instruction_id_t) instruction_ids; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1620 | }; |
| 1621 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1622 | struct of_table_feature_prop_instructions_miss : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1623 | uint16_t type == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1624 | uint16_t length; |
Jonathan Stout | 661c468 | 2014-03-03 12:35:31 -0500 | [diff] [blame] | 1625 | list(of_instruction_id_t) instruction_ids; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1626 | }; |
| 1627 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1628 | struct of_table_feature_prop_next_tables : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1629 | uint16_t type == 2; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1630 | uint16_t length; |
| 1631 | list(of_uint8_t) next_table_ids; |
| 1632 | }; |
| 1633 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1634 | struct of_table_feature_prop_next_tables_miss : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1635 | uint16_t type == 3; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1636 | uint16_t length; |
| 1637 | list(of_uint8_t) next_table_ids; |
| 1638 | }; |
| 1639 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1640 | struct of_table_feature_prop_write_actions : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1641 | uint16_t type == 4; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1642 | uint16_t length; |
| 1643 | list(of_action_id_t) action_ids; |
| 1644 | }; |
| 1645 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1646 | struct of_table_feature_prop_write_actions_miss : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1647 | uint16_t type == 5; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1648 | uint16_t length; |
| 1649 | list(of_action_id_t) action_ids; |
| 1650 | }; |
| 1651 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1652 | struct of_table_feature_prop_apply_actions : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1653 | uint16_t type == 6; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1654 | uint16_t length; |
| 1655 | list(of_action_id_t) action_ids; |
| 1656 | }; |
| 1657 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1658 | struct of_table_feature_prop_apply_actions_miss : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1659 | uint16_t type == 7; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1660 | uint16_t length; |
| 1661 | list(of_action_id_t) action_ids; |
| 1662 | }; |
| 1663 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1664 | struct of_table_feature_prop_match : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1665 | uint16_t type == 8; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1666 | uint16_t length; |
| 1667 | list(of_uint32_t) oxm_ids; |
| 1668 | }; |
| 1669 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1670 | struct of_table_feature_prop_wildcards : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1671 | uint16_t type == 10; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1672 | uint16_t length; |
| 1673 | list(of_uint32_t) oxm_ids; |
| 1674 | }; |
| 1675 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1676 | struct of_table_feature_prop_write_setfield : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1677 | uint16_t type == 12; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1678 | uint16_t length; |
| 1679 | list(of_uint32_t) oxm_ids; |
| 1680 | }; |
| 1681 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1682 | struct of_table_feature_prop_write_setfield_miss : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1683 | uint16_t type == 13; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1684 | uint16_t length; |
| 1685 | list(of_uint32_t) oxm_ids; |
| 1686 | }; |
| 1687 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1688 | struct of_table_feature_prop_apply_setfield : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1689 | uint16_t type == 14; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1690 | uint16_t length; |
| 1691 | list(of_uint32_t) oxm_ids; |
| 1692 | }; |
| 1693 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1694 | struct of_table_feature_prop_apply_setfield_miss : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1695 | uint16_t type == 15; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1696 | uint16_t length; |
| 1697 | list(of_uint32_t) oxm_ids; |
| 1698 | }; |
| 1699 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1700 | struct of_table_feature_prop_experimenter : of_table_feature_prop { |
Jonathan Stout | acb3e32 | 2014-02-13 13:23:16 -0500 | [diff] [blame] | 1701 | uint16_t type == 65534; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1702 | uint16_t length; |
| 1703 | uint32_t experimenter; |
| 1704 | uint32_t subtype; |
| 1705 | of_octets_t experimenter_data; |
| 1706 | }; |
| 1707 | |
Jonathan Stout | af15dee | 2014-02-13 14:22:26 -0500 | [diff] [blame] | 1708 | struct of_table_feature_prop_experimenter_miss : of_table_feature_prop { |
| 1709 | uint16_t type == 65535; |
| 1710 | uint16_t length; |
| 1711 | uint32_t experimenter; |
| 1712 | uint32_t subtype; |
| 1713 | of_octets_t experimenter_data; |
| 1714 | }; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1715 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1716 | struct of_table_features { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1717 | uint16_t length; |
| 1718 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1719 | pad(5); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1720 | of_table_name_t name; |
| 1721 | uint64_t metadata_match; |
| 1722 | uint64_t metadata_write; |
| 1723 | uint32_t config; |
| 1724 | uint32_t max_entries; |
| 1725 | list(of_table_feature_prop_t) properties; |
| 1726 | }; |
| 1727 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1728 | struct of_meter_features { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1729 | uint32_t max_meter; |
| 1730 | uint32_t band_types; |
| 1731 | uint32_t capabilities; |
| 1732 | uint8_t max_bands; |
| 1733 | uint8_t max_color; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1734 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1735 | }; |
| 1736 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1737 | struct of_port_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1738 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1739 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1740 | uint16_t length; |
| 1741 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1742 | uint16_t stats_type == 4; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1743 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1744 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1745 | of_port_no_t port_no; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1746 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1747 | }; |
| 1748 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1749 | struct of_port_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1750 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1751 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1752 | uint16_t length; |
| 1753 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1754 | uint16_t stats_type == 4; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1755 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1756 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1757 | list(of_port_stats_entry_t) entries; |
| 1758 | }; |
| 1759 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1760 | struct of_queue_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1761 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1762 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1763 | uint16_t length; |
| 1764 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1765 | uint16_t stats_type == 5; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1766 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1767 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1768 | of_port_no_t port_no; |
| 1769 | uint32_t queue_id; |
| 1770 | }; |
| 1771 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1772 | struct of_queue_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1773 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1774 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1775 | uint16_t length; |
| 1776 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1777 | uint16_t stats_type == 5; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1778 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1779 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1780 | list(of_queue_stats_entry_t) entries; |
| 1781 | }; |
| 1782 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1783 | struct of_group_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1784 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1785 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1786 | uint16_t length; |
| 1787 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1788 | uint16_t stats_type == 6; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1789 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1790 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1791 | uint32_t group_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1792 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1793 | }; |
| 1794 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1795 | struct of_group_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1796 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1797 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1798 | uint16_t length; |
| 1799 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1800 | uint16_t stats_type == 6; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1801 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1802 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1803 | list(of_group_stats_entry_t) entries; |
| 1804 | }; |
| 1805 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1806 | struct of_group_desc_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1807 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1808 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1809 | uint16_t length; |
| 1810 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1811 | uint16_t stats_type == 7; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1812 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1813 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1814 | }; |
| 1815 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1816 | struct of_group_desc_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1817 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1818 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1819 | uint16_t length; |
| 1820 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1821 | uint16_t stats_type == 7; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1822 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1823 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1824 | list(of_group_desc_stats_entry_t) entries; |
| 1825 | }; |
| 1826 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1827 | struct of_group_features_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1828 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1829 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1830 | uint16_t length; |
| 1831 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1832 | uint16_t stats_type == 8; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1833 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1834 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1835 | }; |
| 1836 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1837 | struct of_group_features_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1838 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1839 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1840 | uint16_t length; |
| 1841 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1842 | uint16_t stats_type == 8; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1843 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1844 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1845 | uint32_t types; |
| 1846 | uint32_t capabilities; |
| 1847 | uint32_t max_groups_all; |
| 1848 | uint32_t max_groups_select; |
| 1849 | uint32_t max_groups_indirect; |
| 1850 | uint32_t max_groups_ff; |
| 1851 | uint32_t actions_all; |
| 1852 | uint32_t actions_select; |
| 1853 | uint32_t actions_indirect; |
| 1854 | uint32_t actions_ff; |
| 1855 | }; |
| 1856 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1857 | struct of_meter_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1858 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1859 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1860 | uint16_t length; |
| 1861 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1862 | uint16_t stats_type == 9; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1863 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1864 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1865 | uint32_t meter_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1866 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1867 | }; |
| 1868 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1869 | struct of_meter_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1870 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1871 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1872 | uint16_t length; |
| 1873 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1874 | uint16_t stats_type == 9; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1875 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1876 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1877 | list(of_meter_stats_t) entries; |
| 1878 | }; |
| 1879 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1880 | struct of_meter_config_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1881 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1882 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1883 | uint16_t length; |
| 1884 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1885 | uint16_t stats_type == 10; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1886 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1887 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1888 | uint32_t meter_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1889 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1890 | }; |
| 1891 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1892 | struct of_meter_config_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1893 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1894 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1895 | uint16_t length; |
| 1896 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1897 | uint16_t stats_type == 10; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1898 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1899 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1900 | list(of_meter_band_t) entries; |
| 1901 | }; |
| 1902 | |
| 1903 | // FIXME stats added to get things working |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1904 | struct of_meter_features_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1905 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1906 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1907 | uint16_t length; |
| 1908 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1909 | uint16_t stats_type == 11; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1910 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1911 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1912 | }; |
| 1913 | |
| 1914 | // FIXME stats added to get things working |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1915 | struct of_meter_features_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1916 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1917 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1918 | uint16_t length; |
| 1919 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1920 | uint16_t stats_type == 11; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1921 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1922 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1923 | of_meter_features_t features; |
| 1924 | }; |
| 1925 | |
| 1926 | // FIXME stats added to get things working |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1927 | struct of_table_features_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1928 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1929 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1930 | uint16_t length; |
| 1931 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1932 | uint16_t stats_type == 12; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1933 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1934 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1935 | list(of_table_features_t) entries; |
| 1936 | }; |
| 1937 | |
| 1938 | // FIXME stats added to get things working |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1939 | struct of_table_features_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1940 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1941 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1942 | uint16_t length; |
| 1943 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1944 | uint16_t stats_type == 12; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1945 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1946 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1947 | list(of_table_features_t) entries; |
| 1948 | }; |
| 1949 | |
| 1950 | // FIXME stats added to get things working |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1951 | struct of_port_desc_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1952 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1953 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1954 | uint16_t length; |
| 1955 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1956 | uint16_t stats_type == 13; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1957 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1958 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1959 | }; |
| 1960 | |
| 1961 | // FIXME stats added to get things working |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1962 | struct of_port_desc_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1963 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1964 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1965 | uint16_t length; |
| 1966 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1967 | uint16_t stats_type == 13; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1968 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1969 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1970 | list(of_port_desc_t) entries; |
| 1971 | }; |
| 1972 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1973 | struct of_meter_band_stats { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1974 | uint64_t packet_band_count; |
| 1975 | uint64_t byte_band_count; |
| 1976 | }; |
| 1977 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1978 | struct of_meter_stats { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1979 | uint32_t meter_id; |
| 1980 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1981 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1982 | uint32_t flow_count; |
| 1983 | uint64_t packet_in_count; |
| 1984 | uint64_t byte_in_count; |
| 1985 | uint32_t duration_sec; |
| 1986 | uint32_t duration_nsec; |
| 1987 | list(of_meter_band_stats_t) band_stats; |
| 1988 | }; |
| 1989 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1990 | struct of_meter_config { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1991 | uint16_t length; |
| 1992 | uint16_t flags; |
| 1993 | uint32_t meter_id; |
| 1994 | list(of_meter_band_t) entries; |
| 1995 | }; |
| 1996 | |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1997 | // END OF STATS OBJECTS |
| 1998 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1999 | struct of_queue_prop { |
Andreas Wundsam | c37ba3d | 2013-08-02 17:51:51 -0700 | [diff] [blame] | 2000 | uint16_t type == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2001 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 2002 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2003 | }; |
| 2004 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2005 | struct of_queue_prop_min_rate : of_queue_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2006 | uint16_t type == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2007 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 2008 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2009 | uint16_t rate; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 2010 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2011 | }; |
| 2012 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2013 | struct of_queue_prop_max_rate : of_queue_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2014 | uint16_t type == 2; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2015 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 2016 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2017 | uint16_t rate; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 2018 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2019 | }; |
| 2020 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2021 | struct of_queue_prop_experimenter : of_queue_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2022 | uint16_t type == 65535; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2023 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 2024 | pad(4); |
Rich Lane | b25d07c | 2013-08-22 17:22:43 -0700 | [diff] [blame] | 2025 | uint32_t experimenter == ?; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 2026 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2027 | of_octets_t data; |
| 2028 | }; |
| 2029 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 2030 | struct of_packet_queue { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2031 | uint32_t queue_id; |
| 2032 | of_port_no_t port; |
| 2033 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 2034 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2035 | list(of_queue_prop_t) properties; |
| 2036 | }; |
| 2037 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2038 | struct of_queue_get_config_request : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2039 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2040 | uint8_t type == 22; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2041 | uint16_t length; |
| 2042 | uint32_t xid; |
| 2043 | of_port_no_t port; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 2044 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2045 | }; |
| 2046 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2047 | struct of_queue_get_config_reply : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2048 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2049 | uint8_t type == 23; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2050 | uint16_t length; |
| 2051 | uint32_t xid; |
| 2052 | of_port_no_t port; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 2053 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2054 | list(of_packet_queue_t) queues; |
| 2055 | }; |
| 2056 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2057 | struct of_role_request : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2058 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2059 | uint8_t type == 24; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2060 | uint16_t length; |
| 2061 | uint32_t xid; |
Andreas Wundsam | 4f796b7 | 2013-10-18 17:33:23 -0700 | [diff] [blame] | 2062 | enum ofp_controller_role role; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 2063 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2064 | uint64_t generation_id; |
| 2065 | }; |
| 2066 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2067 | struct of_role_reply : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2068 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2069 | uint8_t type == 25; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2070 | uint16_t length; |
| 2071 | uint32_t xid; |
Andreas Wundsam | 4f796b7 | 2013-10-18 17:33:23 -0700 | [diff] [blame] | 2072 | enum ofp_controller_role role; |
| 2073 | pad(4); |
| 2074 | uint64_t generation_id; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2075 | }; |
| 2076 | |
| 2077 | //////////////////////////////////////////////////////////////// |
| 2078 | // FIXME understand async; where do bitmasks live? |
| 2079 | // Determine bitmap type for masks below. |
| 2080 | // DOCUMENT masks where uint32_t[0] is interest for equal/master |
| 2081 | // while uint32_t[1] is interest for slave |
| 2082 | //////////////////////////////////////////////////////////////// |
| 2083 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2084 | struct of_async_get_request : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2085 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2086 | uint8_t type == 26; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2087 | uint16_t length; |
| 2088 | uint32_t xid; |
| 2089 | uint32_t packet_in_mask_equal_master; |
| 2090 | uint32_t packet_in_mask_slave; |
| 2091 | uint32_t port_status_mask_equal_master; |
| 2092 | uint32_t port_status_mask_slave; |
| 2093 | uint32_t flow_removed_mask_equal_master; |
| 2094 | uint32_t flow_removed_mask_slave; |
| 2095 | }; |
| 2096 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2097 | struct of_async_get_reply : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2098 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2099 | uint8_t type == 27; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2100 | uint16_t length; |
| 2101 | uint32_t xid; |
| 2102 | uint32_t packet_in_mask_equal_master; |
| 2103 | uint32_t packet_in_mask_slave; |
| 2104 | uint32_t port_status_mask_equal_master; |
| 2105 | uint32_t port_status_mask_slave; |
| 2106 | uint32_t flow_removed_mask_equal_master; |
| 2107 | uint32_t flow_removed_mask_slave; |
| 2108 | }; |
| 2109 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2110 | struct of_async_set : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2111 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2112 | uint8_t type == 28; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2113 | uint16_t length; |
| 2114 | uint32_t xid; |
| 2115 | uint32_t packet_in_mask_equal_master; |
| 2116 | uint32_t packet_in_mask_slave; |
| 2117 | uint32_t port_status_mask_equal_master; |
| 2118 | uint32_t port_status_mask_slave; |
| 2119 | uint32_t flow_removed_mask_equal_master; |
| 2120 | uint32_t flow_removed_mask_slave; |
| 2121 | }; |