Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1 | // Copyright 2013, Big Switch Networks, Inc. |
| 2 | // |
| 3 | // LoxiGen is licensed under the Eclipse Public License, version 1.0 (EPL), with |
| 4 | // the following special exception: |
| 5 | // |
| 6 | // LOXI Exception |
| 7 | // |
| 8 | // As a special exception to the terms of the EPL, you may distribute libraries |
| 9 | // generated by LoxiGen (LoxiGen Libraries) under the terms of your choice, provided |
| 10 | // that copyright and licensing notices generated by LoxiGen are not altered or removed |
| 11 | // from the LoxiGen Libraries and the notice provided below is (i) included in |
| 12 | // the LoxiGen Libraries, if distributed in source code form and (ii) included in any |
| 13 | // documentation for the LoxiGen Libraries, if distributed in binary form. |
| 14 | // |
| 15 | // Notice: "Copyright 2013, Big Switch Networks, Inc. This library was generated by the LoxiGen Compiler." |
| 16 | // |
| 17 | // You may not use this file except in compliance with the EPL or LOXI Exception. You may obtain |
| 18 | // a copy of the EPL at: |
| 19 | // |
| 20 | // http://www.eclipse.org/legal/epl-v10.html |
| 21 | // |
| 22 | // Unless required by applicable law or agreed to in writing, software |
| 23 | // distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
| 24 | // WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the |
| 25 | // EPL for the specific language governing permissions and limitations |
| 26 | // under the EPL. |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 27 | // |
| 28 | // Also derived from the OpenFlow header files which have these copyrights: |
| 29 | // Copyright (c) 2008 The Board of Trustees of The Leland Stanford Junior University |
| 30 | // Copyright (c) 2011, 2012 Open Networking Foundation |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 31 | |
| 32 | #version 4 |
| 33 | |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 34 | enum macro_definitions { |
| 35 | OFP_MAX_TABLE_NAME_LEN = 32, |
| 36 | OFP_MAX_PORT_NAME_LEN = 16, |
| 37 | |
Wilson Ng | d72013d | 2013-09-29 10:21:48 -0700 | [diff] [blame] | 38 | OFP_TCP_PORT = 6653, |
| 39 | OFP_SSL_PORT = 6653, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 40 | |
| 41 | OFP_ETH_ALEN = 6, |
| 42 | |
| 43 | OFP_DEFAULT_MISS_SEND_LEN = 128, |
| 44 | |
| 45 | OFP_VLAN_NONE = 0, |
| 46 | |
| 47 | OFP_FLOW_PERMANENT = 0, |
| 48 | |
| 49 | OFP_DEFAULT_PRIORITY = 0x8000, |
| 50 | |
| 51 | OFP_NO_BUFFER = 0xffffffff, |
| 52 | |
| 53 | DESC_STR_LEN = 256, |
| 54 | SERIAL_NUM_LEN = 32, |
| 55 | |
| 56 | OFPQ_ALL = 0xffffffff, |
| 57 | OFPQ_MAX_RATE_UNCFG = 0xffff, |
| 58 | OFPQ_MIN_RATE_UNCFG = 0xffff, |
| 59 | }; |
| 60 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 61 | enum ofp_port(wire_type=uint32_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 62 | OFPP_MAX = 0xffffff00, |
| 63 | OFPP_IN_PORT = 0xfffffff8, |
| 64 | OFPP_TABLE = 0xfffffff9, |
| 65 | OFPP_NORMAL = 0xfffffffa, |
| 66 | OFPP_FLOOD = 0xfffffffb, |
| 67 | OFPP_ALL = 0xfffffffc, |
| 68 | OFPP_CONTROLLER = 0xfffffffd, |
| 69 | OFPP_LOCAL = 0xfffffffe, |
Tomasz | 949aa52 | 2013-10-23 16:12:27 -0700 | [diff] [blame] | 70 | OFPP_ANY = 0xffffffff, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 71 | }; |
| 72 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 73 | enum ofp_type(wire_type=uint8_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 74 | OFPT_HELLO = 0, |
| 75 | OFPT_ERROR = 1, |
| 76 | OFPT_ECHO_REQUEST = 2, |
| 77 | OFPT_ECHO_REPLY = 3, |
| 78 | OFPT_EXPERIMENTER = 4, |
| 79 | OFPT_FEATURES_REQUEST = 5, |
| 80 | OFPT_FEATURES_REPLY = 6, |
| 81 | OFPT_GET_CONFIG_REQUEST = 7, |
| 82 | OFPT_GET_CONFIG_REPLY = 8, |
| 83 | OFPT_SET_CONFIG = 9, |
| 84 | OFPT_PACKET_IN = 10, |
| 85 | OFPT_FLOW_REMOVED = 11, |
| 86 | OFPT_PORT_STATUS = 12, |
| 87 | OFPT_PACKET_OUT = 13, |
| 88 | OFPT_FLOW_MOD = 14, |
| 89 | OFPT_GROUP_MOD = 15, |
| 90 | OFPT_PORT_MOD = 16, |
| 91 | OFPT_TABLE_MOD = 17, |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 92 | OFPT_STATS_REQUEST = 18, |
| 93 | OFPT_STATS_REPLY = 19, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 94 | OFPT_BARRIER_REQUEST = 20, |
| 95 | OFPT_BARRIER_REPLY = 21, |
| 96 | OFPT_QUEUE_GET_CONFIG_REQUEST = 22, |
| 97 | OFPT_QUEUE_GET_CONFIG_REPLY = 23, |
| 98 | OFPT_ROLE_REQUEST = 24, |
| 99 | OFPT_ROLE_REPLY = 25, |
| 100 | OFPT_GET_ASYNC_REQUEST = 26, |
| 101 | OFPT_GET_ASYNC_REPLY = 27, |
| 102 | OFPT_SET_ASYNC = 28, |
| 103 | OFPT_METER_MOD = 29, |
| 104 | }; |
| 105 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 106 | enum ofp_config_flags(wire_type=uint16_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 107 | OFPC_FRAG_NORMAL = 0, |
| 108 | OFPC_FRAG_DROP = 1, |
| 109 | OFPC_FRAG_REASM = 2, |
| 110 | OFPC_FRAG_MASK = 3, |
| 111 | }; |
| 112 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 113 | enum ofp_table_config(wire_type=uint32_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 114 | OFPTC_DEPRECATED_MASK = 0x3, |
| 115 | }; |
| 116 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 117 | enum ofp_table(wire_type=uint8_t, complete=False) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 118 | OFPTT_MAX = 0xfe, |
| 119 | OFPTT_ALL = 0xff, |
| 120 | }; |
| 121 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 122 | enum ofp_capabilities(wire_type=uint32_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 123 | OFPC_FLOW_STATS = 0x1, |
| 124 | OFPC_TABLE_STATS = 0x2, |
| 125 | OFPC_PORT_STATS = 0x4, |
| 126 | OFPC_GROUP_STATS = 0x8, |
| 127 | OFPC_IP_REASM = 0x20, |
| 128 | OFPC_QUEUE_STATS = 0x40, |
| 129 | OFPC_PORT_BLOCKED = 0x100, |
| 130 | }; |
| 131 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 132 | enum ofp_port_config(wire_type=uint32_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 133 | OFPPC_PORT_DOWN = 0x1, |
| 134 | OFPPC_NO_RECV = 0x4, |
| 135 | OFPPC_NO_FWD = 0x20, |
| 136 | OFPPC_NO_PACKET_IN = 0x40, |
Rob Vaterlaus | 0a8ec14 | 2013-10-10 13:27:14 -0700 | [diff] [blame] | 137 | OFPPC_BSN_MIRROR_DEST = 0x80000000, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 138 | }; |
| 139 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 140 | enum ofp_port_state(wire_type=uint32_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 141 | OFPPS_LINK_DOWN = 0x1, |
| 142 | OFPPS_BLOCKED = 0x2, |
| 143 | OFPPS_LIVE = 0x4, |
| 144 | }; |
| 145 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 146 | enum ofp_port_features(wire_type=uint32_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 147 | OFPPF_10MB_HD = 0x1, |
| 148 | OFPPF_10MB_FD = 0x2, |
| 149 | OFPPF_100MB_HD = 0x4, |
| 150 | OFPPF_100MB_FD = 0x8, |
| 151 | OFPPF_1GB_HD = 0x10, |
| 152 | OFPPF_1GB_FD = 0x20, |
| 153 | OFPPF_10GB_FD = 0x40, |
| 154 | OFPPF_40GB_FD = 0x80, |
| 155 | OFPPF_100GB_FD = 0x100, |
| 156 | OFPPF_1TB_FD = 0x200, |
| 157 | OFPPF_OTHER = 0x400, |
| 158 | OFPPF_COPPER = 0x800, |
| 159 | OFPPF_FIBER = 0x1000, |
| 160 | OFPPF_AUTONEG = 0x2000, |
| 161 | OFPPF_PAUSE = 0x4000, |
| 162 | OFPPF_PAUSE_ASYM = 0x8000, |
| 163 | }; |
| 164 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 165 | enum ofp_port_reason(wire_type=uint8_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 166 | OFPPR_ADD = 0, |
| 167 | OFPPR_DELETE = 1, |
| 168 | OFPPR_MODIFY = 2, |
| 169 | }; |
| 170 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 171 | enum ofp_match_type(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 172 | OFPMT_STANDARD = 0, |
| 173 | OFPMT_OXM = 1, |
| 174 | }; |
| 175 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 176 | enum ofp_oxm_class(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 177 | OFPXMC_NXM_0 = 0, |
| 178 | OFPXMC_NXM_1 = 1, |
| 179 | OFPXMC_OPENFLOW_BASIC = 0x8000, |
| 180 | OFPXMC_EXPERIMENTER = 0xffff, |
| 181 | }; |
| 182 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 183 | enum ofp_vlan_id(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 184 | OFPVID_NONE = 0, |
| 185 | OFPVID_PRESENT = 0x1000, |
| 186 | }; |
| 187 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 188 | // FIXME: OF spec specified this as '9' bits, implicitly adding |
| 189 | // to full byte |
| 190 | enum ofp_ipv6exthdr_flags(wire_type=uint16_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 191 | OFPIEH_NONEXT = 0x1, |
| 192 | OFPIEH_ESP = 0x2, |
| 193 | OFPIEH_AUTH = 0x4, |
| 194 | OFPIEH_DEST = 0x8, |
| 195 | OFPIEH_FRAG = 0x10, |
| 196 | OFPIEH_ROUTER = 0x20, |
| 197 | OFPIEH_HOP = 0x40, |
| 198 | OFPIEH_UNREP = 0x80, |
| 199 | OFPIEH_UNSEQ = 0x100, |
| 200 | }; |
| 201 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 202 | enum ofp_action_type(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 203 | OFPAT_OUTPUT = 0, |
| 204 | OFPAT_COPY_TTL_OUT = 0xb, |
| 205 | OFPAT_COPY_TTL_IN = 0xc, |
| 206 | OFPAT_SET_MPLS_TTL = 0xf, |
| 207 | OFPAT_DEC_MPLS_TTL = 0x10, |
| 208 | OFPAT_PUSH_VLAN = 0x11, |
| 209 | OFPAT_POP_VLAN = 0x12, |
| 210 | OFPAT_PUSH_MPLS = 0x13, |
| 211 | OFPAT_POP_MPLS = 0x14, |
| 212 | OFPAT_SET_QUEUE = 0x15, |
| 213 | OFPAT_GROUP = 0x16, |
| 214 | OFPAT_SET_NW_TTL = 0x17, |
| 215 | OFPAT_DEC_NW_TTL = 0x18, |
| 216 | OFPAT_SET_FIELD = 0x19, |
| 217 | OFPAT_PUSH_PBB = 0x1a, |
| 218 | OFPAT_POP_PBB = 0x1b, |
| 219 | OFPAT_EXPERIMENTER = 0xffff, |
| 220 | }; |
| 221 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 222 | enum ofp_controller_max_len(wire_type=uint16_t, complete=False) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 223 | OFPCML_MAX = 0xffe5, |
| 224 | OFPCML_NO_BUFFER = 0xffff, |
| 225 | }; |
| 226 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 227 | enum ofp_instruction_type(wire_type=uint16_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 228 | OFPIT_GOTO_TABLE = 0x1, |
| 229 | OFPIT_WRITE_METADATA = 0x2, |
| 230 | OFPIT_WRITE_ACTIONS = 0x3, |
| 231 | OFPIT_APPLY_ACTIONS = 0x4, |
| 232 | OFPIT_CLEAR_ACTIONS = 0x5, |
| 233 | OFPIT_METER = 0x6, |
| 234 | OFPIT_EXPERIMENTER = 0xffff, |
| 235 | }; |
| 236 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 237 | enum ofp_flow_mod_command(wire_type=uint8_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 238 | OFPFC_ADD = 0, |
| 239 | OFPFC_MODIFY = 1, |
| 240 | OFPFC_MODIFY_STRICT = 2, |
| 241 | OFPFC_DELETE = 3, |
| 242 | OFPFC_DELETE_STRICT = 4, |
| 243 | }; |
| 244 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 245 | enum ofp_flow_mod_flags(wire_type=uint16_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 246 | OFPFF_SEND_FLOW_REM = 0x1, |
| 247 | OFPFF_CHECK_OVERLAP = 0x2, |
| 248 | OFPFF_RESET_COUNTS = 0x4, |
| 249 | OFPFF_NO_PKT_COUNTS = 0x8, |
| 250 | OFPFF_NO_BYT_COUNTS = 0x10, |
Rich Lane | f86f39a | 2013-10-07 18:04:11 -0700 | [diff] [blame] | 251 | |
| 252 | /* Non-standard, enabled by an experimenter message */ |
| 253 | /* See the bsn_flow_idle input file */ |
| 254 | OFPFF_BSN_SEND_IDLE = 0x80, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 255 | }; |
| 256 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 257 | enum ofp_group(wire_type=uint32_t, complete=False) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 258 | OFPG_MAX = 0xffffff00, |
| 259 | OFPG_ALL = 0xfffffffc, |
| 260 | OFPG_ANY = 0xffffffff, |
| 261 | }; |
| 262 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 263 | enum ofp_group_mod_command(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 264 | OFPGC_ADD = 0, |
| 265 | OFPGC_MODIFY = 1, |
| 266 | OFPGC_DELETE = 2, |
| 267 | }; |
| 268 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 269 | enum ofp_group_type(wire_type=uint8_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 270 | OFPGT_ALL = 0, |
| 271 | OFPGT_SELECT = 1, |
| 272 | OFPGT_INDIRECT = 2, |
| 273 | OFPGT_FF = 3, |
| 274 | }; |
| 275 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 276 | enum ofp_packet_in_reason(wire_type=uint8_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 277 | OFPR_NO_MATCH = 0, |
| 278 | OFPR_ACTION = 1, |
| 279 | OFPR_INVALID_TTL = 2, |
Andreas Wundsam | 7723c56 | 2013-10-23 16:27:40 -0700 | [diff] [blame] | 280 | |
| 281 | // non-standard BSN extensions. OF does not have a standard-conformant |
| 282 | // way to extend the set of packet_in reasons |
| 283 | OFPR_BSN_NEW_HOST = 128, |
| 284 | OFPR_BSN_STATION_MOVE = 129, |
| 285 | OFPR_BSN_BAD_VLAN = 130, |
| 286 | OFPR_BSN_DESTINATION_LOOKUP_FAILURE = 131, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 287 | }; |
| 288 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 289 | enum ofp_flow_removed_reason(wire_type=uint8_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 290 | OFPRR_IDLE_TIMEOUT = 0, |
| 291 | OFPRR_HARD_TIMEOUT = 1, |
| 292 | OFPRR_DELETE = 2, |
| 293 | OFPRR_GROUP_DELETE = 3, |
| 294 | }; |
| 295 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 296 | enum ofp_meter(wire_type=uint32_t, complete=False) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 297 | OFPM_MAX = 0xffff0000, |
| 298 | OFPM_SLOWPATH = 0xfffffffd, |
| 299 | OFPM_CONTROLLER = 0xfffffffe, |
| 300 | OFPM_ALL = 0xffffffff, |
| 301 | }; |
| 302 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 303 | enum ofp_meter_band_type(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 304 | OFPMBT_DROP = 0x1, |
| 305 | OFPMBT_DSCP_REMARK = 0x2, |
| 306 | OFPMBT_EXPERIMENTER = 0xffff, |
| 307 | }; |
| 308 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 309 | enum ofp_meter_mod_command(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 310 | OFPMC_ADD = 0, |
| 311 | OFPMC_MODIFY = 1, |
| 312 | OFPMC_DELETE = 2, |
| 313 | }; |
| 314 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 315 | enum ofp_meter_flags(wire_type=uint16_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 316 | OFPMF_KBPS = 0x1, |
| 317 | OFPMF_PKTPS = 0x2, |
| 318 | OFPMF_BURST = 0x4, |
| 319 | OFPMF_STATS = 0x8, |
| 320 | }; |
| 321 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 322 | enum ofp_error_type(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 323 | OFPET_HELLO_FAILED = 0, |
| 324 | OFPET_BAD_REQUEST = 1, |
| 325 | OFPET_BAD_ACTION = 2, |
| 326 | OFPET_BAD_INSTRUCTION = 3, |
| 327 | OFPET_BAD_MATCH = 4, |
| 328 | OFPET_FLOW_MOD_FAILED = 5, |
| 329 | OFPET_GROUP_MOD_FAILED = 6, |
| 330 | OFPET_PORT_MOD_FAILED = 7, |
| 331 | OFPET_TABLE_MOD_FAILED = 8, |
| 332 | OFPET_QUEUE_OP_FAILED = 9, |
| 333 | OFPET_SWITCH_CONFIG_FAILED = 10, |
| 334 | OFPET_ROLE_REQUEST_FAILED = 11, |
| 335 | OFPET_METER_MOD_FAILED = 12, |
| 336 | OFPET_TABLE_FEATURES_FAILED = 13, |
| 337 | OFPET_EXPERIMENTER = 0xffff, |
| 338 | }; |
| 339 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 340 | enum ofp_hello_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 341 | OFPHFC_INCOMPATIBLE = 0, |
| 342 | OFPHFC_EPERM = 1, |
| 343 | }; |
| 344 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 345 | enum ofp_bad_request_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 346 | OFPBRC_BAD_VERSION = 0, |
| 347 | OFPBRC_BAD_TYPE = 1, |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 348 | OFPBRC_BAD_STAT = 2, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 349 | OFPBRC_BAD_EXPERIMENTER = 3, |
Rob Vaterlaus | b3f49d9 | 2013-10-01 17:57:31 -0700 | [diff] [blame] | 350 | OFPBRC_BAD_EXPERIMENTER_TYPE = 4, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 351 | OFPBRC_EPERM = 5, |
| 352 | OFPBRC_BAD_LEN = 6, |
| 353 | OFPBRC_BUFFER_EMPTY = 7, |
| 354 | OFPBRC_BUFFER_UNKNOWN = 8, |
| 355 | OFPBRC_BAD_TABLE_ID = 9, |
| 356 | OFPBRC_IS_SLAVE = 10, |
| 357 | OFPBRC_BAD_PORT = 11, |
| 358 | OFPBRC_BAD_PACKET = 12, |
| 359 | OFPBRC_MULTIPART_BUFFER_OVERFLOW = 13, |
| 360 | }; |
| 361 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 362 | enum ofp_bad_action_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 363 | OFPBAC_BAD_TYPE = 0, |
| 364 | OFPBAC_BAD_LEN = 1, |
| 365 | OFPBAC_BAD_EXPERIMENTER = 2, |
Rob Vaterlaus | b3f49d9 | 2013-10-01 17:57:31 -0700 | [diff] [blame] | 366 | OFPBAC_BAD_EXPERIMENTER_TYPE = 3, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 367 | OFPBAC_BAD_OUT_PORT = 4, |
| 368 | OFPBAC_BAD_ARGUMENT = 5, |
| 369 | OFPBAC_EPERM = 6, |
| 370 | OFPBAC_TOO_MANY = 7, |
| 371 | OFPBAC_BAD_QUEUE = 8, |
| 372 | OFPBAC_BAD_OUT_GROUP = 9, |
| 373 | OFPBAC_MATCH_INCONSISTENT = 10, |
| 374 | OFPBAC_UNSUPPORTED_ORDER = 11, |
| 375 | OFPBAC_BAD_TAG = 12, |
| 376 | OFPBAC_BAD_SET_TYPE = 13, |
| 377 | OFPBAC_BAD_SET_LEN = 14, |
| 378 | OFPBAC_BAD_SET_ARGUMENT = 15, |
| 379 | }; |
| 380 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 381 | enum ofp_bad_instruction_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 382 | OFPBIC_UNKNOWN_INST = 0, |
| 383 | OFPBIC_UNSUP_INST = 1, |
| 384 | OFPBIC_BAD_TABLE_ID = 2, |
| 385 | OFPBIC_UNSUP_METADATA = 3, |
| 386 | OFPBIC_UNSUP_METADATA_MASK = 4, |
| 387 | OFPBIC_BAD_EXPERIMENTER = 5, |
Rob Vaterlaus | b3f49d9 | 2013-10-01 17:57:31 -0700 | [diff] [blame] | 388 | OFPBIC_BAD_EXPERIMENTER_TYPE = 6, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 389 | OFPBIC_BAD_LEN = 7, |
| 390 | OFPBIC_EPERM = 8, |
| 391 | }; |
| 392 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 393 | enum ofp_bad_match_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 394 | OFPBMC_BAD_TYPE = 0, |
| 395 | OFPBMC_BAD_LEN = 1, |
| 396 | OFPBMC_BAD_TAG = 2, |
| 397 | OFPBMC_BAD_DL_ADDR_MASK = 3, |
| 398 | OFPBMC_BAD_NW_ADDR_MASK = 4, |
| 399 | OFPBMC_BAD_WILDCARDS = 5, |
| 400 | OFPBMC_BAD_FIELD = 6, |
| 401 | OFPBMC_BAD_VALUE = 7, |
| 402 | OFPBMC_BAD_MASK = 8, |
| 403 | OFPBMC_BAD_PREREQ = 9, |
| 404 | OFPBMC_DUP_FIELD = 10, |
| 405 | OFPBMC_EPERM = 11, |
| 406 | }; |
| 407 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 408 | enum ofp_flow_mod_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 409 | OFPFMFC_UNKNOWN = 0, |
| 410 | OFPFMFC_TABLE_FULL = 1, |
| 411 | OFPFMFC_BAD_TABLE_ID = 2, |
| 412 | OFPFMFC_OVERLAP = 3, |
| 413 | OFPFMFC_EPERM = 4, |
| 414 | OFPFMFC_BAD_TIMEOUT = 5, |
| 415 | OFPFMFC_BAD_COMMAND = 6, |
| 416 | OFPFMFC_BAD_FLAGS = 7, |
| 417 | }; |
| 418 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 419 | enum ofp_group_mod_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 420 | OFPGMFC_GROUP_EXISTS = 0, |
| 421 | OFPGMFC_INVALID_GROUP = 1, |
| 422 | OFPGMFC_WEIGHT_UNSUPPORTED = 2, |
| 423 | OFPGMFC_OUT_OF_GROUPS = 3, |
| 424 | OFPGMFC_OUT_OF_BUCKETS = 4, |
| 425 | OFPGMFC_CHAINING_UNSUPPORTED = 5, |
| 426 | OFPGMFC_WATCH_UNSUPPORTED = 6, |
| 427 | OFPGMFC_LOOP = 7, |
| 428 | OFPGMFC_UNKNOWN_GROUP = 8, |
| 429 | OFPGMFC_CHAINED_GROUP = 9, |
| 430 | OFPGMFC_BAD_TYPE = 10, |
| 431 | OFPGMFC_BAD_COMMAND = 11, |
| 432 | OFPGMFC_BAD_BUCKET = 12, |
| 433 | OFPGMFC_BAD_WATCH = 13, |
| 434 | OFPGMFC_EPERM = 14, |
| 435 | }; |
| 436 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 437 | enum ofp_port_mod_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 438 | OFPPMFC_BAD_PORT = 0, |
| 439 | OFPPMFC_BAD_HW_ADDR = 1, |
| 440 | OFPPMFC_BAD_CONFIG = 2, |
| 441 | OFPPMFC_BAD_ADVERTISE = 3, |
| 442 | OFPPMFC_EPERM = 4, |
| 443 | }; |
| 444 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 445 | enum ofp_table_mod_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 446 | OFPTMFC_BAD_TABLE = 0, |
| 447 | OFPTMFC_BAD_CONFIG = 1, |
| 448 | OFPTMFC_EPERM = 2, |
| 449 | }; |
| 450 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 451 | enum ofp_queue_op_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 452 | OFPQOFC_BAD_PORT = 0, |
| 453 | OFPQOFC_BAD_QUEUE = 1, |
| 454 | OFPQOFC_EPERM = 2, |
| 455 | }; |
| 456 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 457 | enum ofp_switch_config_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 458 | OFPSCFC_BAD_FLAGS = 0, |
| 459 | OFPSCFC_BAD_LEN = 1, |
| 460 | OFPSCFC_EPERM = 2, |
| 461 | }; |
| 462 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 463 | enum ofp_role_request_failed_code(wire_type=uint16_t){ |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 464 | OFPRRFC_STALE = 0, |
| 465 | OFPRRFC_UNSUP = 1, |
| 466 | OFPRRFC_BAD_ROLE = 2, |
| 467 | }; |
| 468 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 469 | enum ofp_meter_mod_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 470 | OFPMMFC_UNKNOWN = 0, |
| 471 | OFPMMFC_METER_EXISTS = 1, |
| 472 | OFPMMFC_INVALID_METER = 2, |
| 473 | OFPMMFC_UNKNOWN_METER = 3, |
| 474 | OFPMMFC_BAD_COMMAND = 4, |
| 475 | OFPMMFC_BAD_FLAGS = 5, |
| 476 | OFPMMFC_BAD_RATE = 6, |
| 477 | OFPMMFC_BAD_BURST = 7, |
| 478 | OFPMMFC_BAD_BAND = 8, |
| 479 | OFPMMFC_BAD_BAND_VALUE = 9, |
| 480 | OFPMMFC_OUT_OF_METERS = 10, |
| 481 | OFPMMFC_OUT_OF_BANDS = 11, |
| 482 | }; |
| 483 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 484 | enum ofp_table_features_failed_code(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 485 | OFPTFFC_BAD_TABLE = 0, |
| 486 | OFPTFFC_BAD_METADATA = 1, |
| 487 | OFPTFFC_BAD_TYPE = 2, |
| 488 | OFPTFFC_BAD_LEN = 3, |
| 489 | OFPTFFC_BAD_ARGUMENT = 4, |
| 490 | OFPTFFC_EPERM = 5, |
| 491 | }; |
| 492 | |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 493 | enum ofp_stats_type(wire_type=uint16_t) { |
| 494 | OFPST_DESC = 0, |
| 495 | OFPST_FLOW = 1, |
| 496 | OFPST_AGGREGATE = 2, |
| 497 | OFPST_TABLE = 3, |
| 498 | OFPST_PORT = 4, |
| 499 | OFPST_QUEUE = 5, |
| 500 | OFPST_GROUP = 6, |
| 501 | OFPST_GROUP_DESC = 7, |
| 502 | OFPST_GROUP_FEATURES = 8, |
| 503 | OFPST_METER = 9, |
| 504 | OFPST_METER_CONFIG = 10, |
| 505 | OFPST_METER_FEATURES = 11, |
| 506 | OFPST_TABLE_FEATURES = 12, |
| 507 | OFPST_PORT_DESC = 13, |
| 508 | OFPST_EXPERIMENTER = 0xffff, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 509 | }; |
| 510 | |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 511 | enum ofp_stats_request_flags(wire_type=uint16_t, bitmask=True) { |
| 512 | OFPSF_REQ_MORE = 0x1, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 513 | }; |
| 514 | |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 515 | enum ofp_stats_reply_flags(wire_type=uint16_t, bitmask=True) { |
| 516 | OFPSF_REPLY_MORE = 0x1, |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 517 | }; |
| 518 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 519 | enum ofp_table_feature_prop_type(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 520 | OFPTFPT_INSTRUCTIONS = 0, |
| 521 | OFPTFPT_INSTRUCTIONS_MISS = 1, |
| 522 | OFPTFPT_NEXT_TABLES = 2, |
| 523 | OFPTFPT_NEXT_TABLES_MISS = 3, |
| 524 | OFPTFPT_WRITE_ACTIONS = 4, |
| 525 | OFPTFPT_WRITE_ACTIONS_MISS = 5, |
| 526 | OFPTFPT_APPLY_ACTIONS = 6, |
| 527 | OFPTFPT_APPLY_ACTIONS_MISS = 7, |
| 528 | OFPTFPT_MATCH = 8, |
| 529 | OFPTFPT_WILDCARDS = 0xa, |
| 530 | OFPTFPT_WRITE_SETFIELD = 0xc, |
| 531 | OFPTFPT_WRITE_SETFIELD_MISS = 0xd, |
| 532 | OFPTFPT_APPLY_SETFIELD = 0xe, |
| 533 | OFPTFPT_APPLY_SETFIELD_MISS = 0xf, |
| 534 | OFPTFPT_EXPERIMENTER = 0xfffe, |
| 535 | OFPTFPT_EXPERIMENTER_MISS = 0xffff, |
| 536 | }; |
| 537 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 538 | enum ofp_group_capabilities(wire_type=uint32_t, bitmask=True) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 539 | OFPGFC_SELECT_WEIGHT = 0x1, |
| 540 | OFPGFC_SELECT_LIVENESS = 0x2, |
| 541 | OFPGFC_CHAINING = 0x4, |
| 542 | OFPGFC_CHAINING_CHECKS = 0x8, |
| 543 | }; |
| 544 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 545 | enum ofp_queue_properties(wire_type=uint16_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 546 | OFPQT_MIN_RATE = 0x1, |
| 547 | OFPQT_MAX_RATE = 0x2, |
| 548 | OFPQT_EXPERIMENTER = 0xffff, |
| 549 | }; |
| 550 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 551 | enum ofp_controller_role(wire_type=uint32_t) { |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 552 | OFPCR_ROLE_NOCHANGE = 0, |
| 553 | OFPCR_ROLE_EQUAL = 1, |
| 554 | OFPCR_ROLE_MASTER = 2, |
| 555 | OFPCR_ROLE_SLAVE = 3, |
| 556 | }; |
| 557 | |
Andreas Wundsam | 4ee5146 | 2013-07-30 11:00:37 -0700 | [diff] [blame] | 558 | enum ofp_hello_elem_type(wire_type=uint16_t) { |
Rich Lane | 0733cd6 | 2013-04-18 21:14:42 -0700 | [diff] [blame] | 559 | OFPHET_VERSIONBITMAP = 1, |
| 560 | }; |
| 561 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 562 | /* XXX rename to of_message */ |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 563 | struct of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 564 | uint8_t version; |
Andreas Wundsam | c37ba3d | 2013-08-02 17:51:51 -0700 | [diff] [blame] | 565 | uint8_t type == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 566 | uint16_t length; |
| 567 | uint32_t xid; |
| 568 | }; |
| 569 | |
| 570 | // Special structures used for managing scalar list elements |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 571 | struct of_uint32 { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 572 | uint32_t value; |
| 573 | }; |
| 574 | |
| 575 | // Special structures used for managing scalar list elements |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 576 | struct of_uint8 { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 577 | uint8_t value; |
| 578 | }; |
| 579 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 580 | struct of_hello_elem { |
Andreas Wundsam | 70411bf | 2013-08-02 22:26:38 -0700 | [diff] [blame] | 581 | uint16_t type == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 582 | uint16_t length; |
| 583 | }; |
| 584 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 585 | struct of_hello_elem_versionbitmap : of_hello_elem { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 586 | uint16_t type == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 587 | uint16_t length; |
| 588 | list(of_uint32_t) bitmaps; |
| 589 | }; |
| 590 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 591 | struct of_hello : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 592 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 593 | uint8_t type == 0; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 594 | uint16_t length; |
| 595 | uint32_t xid; |
| 596 | list(of_hello_elem_t) elements; |
| 597 | }; |
| 598 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 599 | struct of_echo_request : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 600 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 601 | uint8_t type == 2; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 602 | uint16_t length; |
| 603 | uint32_t xid; |
| 604 | of_octets_t data; |
| 605 | }; |
| 606 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 607 | struct of_echo_reply : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 608 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 609 | uint8_t type == 3; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 610 | uint16_t length; |
| 611 | uint32_t xid; |
| 612 | of_octets_t data; |
| 613 | }; |
| 614 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 615 | struct of_experimenter : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 616 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 617 | uint8_t type == 4; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 618 | uint16_t length; |
| 619 | uint32_t xid; |
Rich Lane | b25d07c | 2013-08-22 17:22:43 -0700 | [diff] [blame] | 620 | uint32_t experimenter == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 621 | uint32_t subtype; |
| 622 | of_octets_t data; |
| 623 | }; |
| 624 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 625 | struct of_barrier_request : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 626 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 627 | uint8_t type == 20; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 628 | uint16_t length; |
| 629 | uint32_t xid; |
| 630 | }; |
| 631 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 632 | struct of_barrier_reply : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 633 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 634 | uint8_t type == 21; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 635 | uint16_t length; |
| 636 | uint32_t xid; |
| 637 | }; |
| 638 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 639 | struct of_get_config_request : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 640 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 641 | uint8_t type == 7; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 642 | uint16_t length; |
| 643 | uint32_t xid; |
| 644 | }; |
| 645 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 646 | struct of_get_config_reply : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 647 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 648 | uint8_t type == 8; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 649 | uint16_t length; |
| 650 | uint32_t xid; |
| 651 | uint16_t flags; |
| 652 | uint16_t miss_send_len; |
| 653 | }; |
| 654 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 655 | struct of_set_config : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 656 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 657 | uint8_t type == 9; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 658 | uint16_t length; |
| 659 | uint32_t xid; |
| 660 | uint16_t flags; |
| 661 | uint16_t miss_send_len; |
| 662 | }; |
| 663 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 664 | struct of_table_mod : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 665 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 666 | uint8_t type == 17; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 667 | uint16_t length; |
| 668 | uint32_t xid; |
| 669 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 670 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 671 | uint32_t config; |
| 672 | }; |
| 673 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 674 | struct of_port_desc { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 675 | of_port_no_t port_no; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 676 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 677 | of_mac_addr_t hw_addr; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 678 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 679 | of_port_name_t name; |
Rob Vaterlaus | d9d72d2 | 2013-09-23 14:50:52 -0700 | [diff] [blame] | 680 | enum ofp_port_config config; |
| 681 | enum ofp_port_state state; |
| 682 | enum ofp_port_features curr; |
| 683 | enum ofp_port_features advertised; |
| 684 | enum ofp_port_features supported; |
| 685 | enum ofp_port_features peer; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 686 | uint32_t curr_speed; |
| 687 | uint32_t max_speed; |
| 688 | }; |
| 689 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 690 | struct of_features_request : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 691 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 692 | uint8_t type == 5; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 693 | uint16_t length; |
| 694 | uint32_t xid; |
| 695 | }; |
| 696 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 697 | struct of_features_reply : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 698 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 699 | uint8_t type == 6; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 700 | uint16_t length; |
| 701 | uint32_t xid; |
| 702 | uint64_t datapath_id; |
| 703 | uint32_t n_buffers; |
| 704 | uint8_t n_tables; |
| 705 | uint8_t auxiliary_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 706 | pad(2); |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 707 | enum ofp_capabilities capabilities; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 708 | uint32_t reserved; |
| 709 | }; |
| 710 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 711 | struct of_port_status : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 712 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 713 | uint8_t type == 12; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 714 | uint16_t length; |
| 715 | uint32_t xid; |
Rob Vaterlaus | d9d72d2 | 2013-09-23 14:50:52 -0700 | [diff] [blame] | 716 | enum ofp_port_reason reason; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 717 | pad(7); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 718 | of_port_desc_t desc; |
| 719 | }; |
| 720 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 721 | struct of_port_mod : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 722 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 723 | uint8_t type == 16; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 724 | uint16_t length; |
| 725 | uint32_t xid; |
| 726 | of_port_no_t port_no; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 727 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 728 | of_mac_addr_t hw_addr; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 729 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 730 | uint32_t config; |
| 731 | uint32_t mask; |
| 732 | uint32_t advertise; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 733 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 734 | }; |
| 735 | |
| 736 | // FIXME Does this need to be v4? |
Andreas Wundsam | 5da6851 | 2013-10-22 22:18:00 -0700 | [diff] [blame] | 737 | struct of_match_v3(align=8, length_includes_align=False) { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 738 | uint16_t type == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 739 | uint16_t length; |
| 740 | list(of_oxm_t) oxm_list; |
| 741 | }; |
| 742 | |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 743 | // This looks like an action header, but is standalone. See |
| 744 | // ofp_table_features_prop_actions |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 745 | struct of_action_id { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 746 | uint16_t type; |
| 747 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 748 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 749 | }; |
| 750 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 751 | struct of_action_output : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 752 | uint16_t type == 0; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 753 | uint16_t len; |
| 754 | of_port_no_t port; |
| 755 | uint16_t max_len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 756 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 757 | }; |
| 758 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 759 | struct of_action_copy_ttl_out : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 760 | uint16_t type == 11; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 761 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 762 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 763 | }; |
| 764 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 765 | struct of_action_copy_ttl_in : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 766 | uint16_t type == 12; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 767 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 768 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 769 | }; |
| 770 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 771 | struct of_action_set_mpls_ttl : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 772 | uint16_t type == 15; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 773 | uint16_t len; |
| 774 | uint8_t mpls_ttl; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 775 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 776 | }; |
| 777 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 778 | struct of_action_dec_mpls_ttl : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 779 | uint16_t type == 16; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 780 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 781 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 782 | }; |
| 783 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 784 | struct of_action_push_vlan : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 785 | uint16_t type == 17; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 786 | uint16_t len; |
| 787 | uint16_t ethertype; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 788 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 789 | }; |
| 790 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 791 | struct of_action_pop_vlan : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 792 | uint16_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 793 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 794 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 795 | }; |
| 796 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 797 | struct of_action_push_mpls : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 798 | uint16_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 799 | uint16_t len; |
| 800 | uint16_t ethertype; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 801 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 802 | }; |
| 803 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 804 | struct of_action_pop_mpls : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 805 | uint16_t type == 20; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 806 | uint16_t len; |
| 807 | uint16_t ethertype; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 808 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 809 | }; |
| 810 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 811 | struct of_action_set_queue : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 812 | uint16_t type == 21; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 813 | uint16_t len; |
| 814 | uint32_t queue_id; |
| 815 | }; |
| 816 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 817 | struct of_action_group : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 818 | uint16_t type == 22; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 819 | uint16_t len; |
| 820 | uint32_t group_id; |
| 821 | }; |
| 822 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 823 | struct of_action_set_nw_ttl : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 824 | uint16_t type == 23; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 825 | uint16_t len; |
| 826 | uint8_t nw_ttl; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 827 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 828 | }; |
| 829 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 830 | struct of_action_dec_nw_ttl : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 831 | uint16_t type == 24; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 832 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 833 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 834 | }; |
| 835 | |
Andreas Wundsam | 5da6851 | 2013-10-22 22:18:00 -0700 | [diff] [blame] | 836 | struct of_action_set_field(align=8, length_includes_align=True) : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 837 | uint16_t type == 25; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 838 | uint16_t len; |
Rich Lane | be90eae | 2013-07-22 16:44:26 -0700 | [diff] [blame] | 839 | of_oxm_t field; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 840 | }; |
| 841 | |
Andreas Wundsam | 5da6851 | 2013-10-22 22:18:00 -0700 | [diff] [blame] | 842 | struct of_action_experimenter(align=8, length_includes_align=True): of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 843 | uint16_t type == 65535; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 844 | uint16_t len; |
Rich Lane | b25d07c | 2013-08-22 17:22:43 -0700 | [diff] [blame] | 845 | uint32_t experimenter == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 846 | of_octets_t data; |
| 847 | }; |
| 848 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 849 | struct of_action_pop_pbb : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 850 | uint16_t type == 27; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 851 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 852 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 853 | }; |
| 854 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 855 | struct of_action_push_pbb : of_action { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 856 | uint16_t type == 26; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 857 | uint16_t len; |
| 858 | uint16_t ethertype; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 859 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 860 | }; |
| 861 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 862 | struct of_action { |
Andreas Wundsam | c37ba3d | 2013-08-02 17:51:51 -0700 | [diff] [blame] | 863 | uint16_t type == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 864 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 865 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 866 | }; |
| 867 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 868 | struct of_instruction { |
Andreas Wundsam | c37ba3d | 2013-08-02 17:51:51 -0700 | [diff] [blame] | 869 | uint16_t type == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 870 | uint16_t len; |
| 871 | }; |
| 872 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 873 | struct of_instruction_goto_table : of_instruction { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 874 | uint16_t type == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 875 | uint16_t len; |
| 876 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 877 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 878 | }; |
| 879 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 880 | struct of_instruction_write_metadata : of_instruction { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 881 | uint16_t type == 2; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 882 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 883 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 884 | uint64_t metadata; |
| 885 | uint64_t metadata_mask; |
| 886 | }; |
| 887 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 888 | struct of_instruction_write_actions : of_instruction { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 889 | uint16_t type == 3; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 890 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 891 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 892 | list(of_action_t) actions; |
| 893 | }; |
| 894 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 895 | struct of_instruction_apply_actions : of_instruction { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 896 | uint16_t type == 4; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 897 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 898 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 899 | list(of_action_t) actions; |
| 900 | }; |
| 901 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 902 | struct of_instruction_clear_actions : of_instruction { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 903 | uint16_t type == 5; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 904 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 905 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 906 | }; |
| 907 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 908 | struct of_instruction_meter : of_instruction { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 909 | uint16_t type == 6; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 910 | uint16_t len; |
| 911 | uint32_t meter_id; |
| 912 | }; |
| 913 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 914 | struct of_instruction_experimenter : of_instruction { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 915 | uint16_t type == 65535; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 916 | uint16_t len; |
Rich Lane | b25d07c | 2013-08-22 17:22:43 -0700 | [diff] [blame] | 917 | uint32_t experimenter == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 918 | of_octets_t data; |
| 919 | }; |
| 920 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 921 | struct of_flow_mod : of_header { |
| 922 | uint8_t version; |
| 923 | uint8_t type == 14; |
| 924 | uint16_t length; |
| 925 | uint32_t xid; |
| 926 | uint64_t cookie; |
| 927 | uint64_t cookie_mask; |
| 928 | uint8_t table_id; |
Andreas Wundsam | c37ba3d | 2013-08-02 17:51:51 -0700 | [diff] [blame] | 929 | of_fm_cmd_t _command == ?; |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 930 | uint16_t idle_timeout; |
| 931 | uint16_t hard_timeout; |
| 932 | uint16_t priority; |
| 933 | uint32_t buffer_id; |
| 934 | of_port_no_t out_port; |
| 935 | uint32_t out_group; |
Andreas Wundsam | dfeb594 | 2013-09-19 13:07:49 -0700 | [diff] [blame] | 936 | enum ofp_flow_mod_flags flags; |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 937 | pad(2); |
| 938 | of_match_t match; |
| 939 | list(of_instruction_t) instructions; |
| 940 | }; |
| 941 | |
| 942 | struct of_flow_add : of_flow_mod { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 943 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 944 | uint8_t type == 14; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 945 | uint16_t length; |
| 946 | uint32_t xid; |
| 947 | uint64_t cookie; |
| 948 | uint64_t cookie_mask; |
| 949 | uint8_t table_id; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 950 | of_fm_cmd_t _command == 0; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 951 | uint16_t idle_timeout; |
| 952 | uint16_t hard_timeout; |
| 953 | uint16_t priority; |
| 954 | uint32_t buffer_id; |
| 955 | of_port_no_t out_port; |
| 956 | uint32_t out_group; |
Andreas Wundsam | dfeb594 | 2013-09-19 13:07:49 -0700 | [diff] [blame] | 957 | enum ofp_flow_mod_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 958 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 959 | of_match_t match; |
| 960 | list(of_instruction_t) instructions; |
| 961 | }; |
| 962 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 963 | struct of_flow_modify : of_flow_mod { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 964 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 965 | uint8_t type == 14; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 966 | uint16_t length; |
| 967 | uint32_t xid; |
| 968 | uint64_t cookie; |
| 969 | uint64_t cookie_mask; |
| 970 | uint8_t table_id; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 971 | of_fm_cmd_t _command == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 972 | uint16_t idle_timeout; |
| 973 | uint16_t hard_timeout; |
| 974 | uint16_t priority; |
| 975 | uint32_t buffer_id; |
| 976 | of_port_no_t out_port; |
| 977 | uint32_t out_group; |
Andreas Wundsam | dfeb594 | 2013-09-19 13:07:49 -0700 | [diff] [blame] | 978 | enum ofp_flow_mod_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 979 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 980 | of_match_t match; |
| 981 | list(of_instruction_t) instructions; |
| 982 | }; |
| 983 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 984 | struct of_flow_modify_strict : of_flow_mod { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 985 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 986 | uint8_t type == 14; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 987 | uint16_t length; |
| 988 | uint32_t xid; |
| 989 | uint64_t cookie; |
| 990 | uint64_t cookie_mask; |
| 991 | uint8_t table_id; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 992 | of_fm_cmd_t _command == 2; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 993 | uint16_t idle_timeout; |
| 994 | uint16_t hard_timeout; |
| 995 | uint16_t priority; |
| 996 | uint32_t buffer_id; |
| 997 | of_port_no_t out_port; |
| 998 | uint32_t out_group; |
Andreas Wundsam | dfeb594 | 2013-09-19 13:07:49 -0700 | [diff] [blame] | 999 | enum ofp_flow_mod_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1000 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1001 | of_match_t match; |
| 1002 | list(of_instruction_t) instructions; |
| 1003 | }; |
| 1004 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1005 | struct of_flow_delete : of_flow_mod { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1006 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1007 | uint8_t type == 14; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1008 | uint16_t length; |
| 1009 | uint32_t xid; |
| 1010 | uint64_t cookie; |
| 1011 | uint64_t cookie_mask; |
| 1012 | uint8_t table_id; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1013 | of_fm_cmd_t _command == 3; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1014 | uint16_t idle_timeout; |
| 1015 | uint16_t hard_timeout; |
| 1016 | uint16_t priority; |
| 1017 | uint32_t buffer_id; |
| 1018 | of_port_no_t out_port; |
| 1019 | uint32_t out_group; |
Andreas Wundsam | dfeb594 | 2013-09-19 13:07:49 -0700 | [diff] [blame] | 1020 | enum ofp_flow_mod_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1021 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1022 | of_match_t match; |
| 1023 | list(of_instruction_t) instructions; |
| 1024 | }; |
| 1025 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1026 | struct of_flow_delete_strict : of_flow_mod { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1027 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1028 | uint8_t type == 14; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1029 | uint16_t length; |
| 1030 | uint32_t xid; |
| 1031 | uint64_t cookie; |
| 1032 | uint64_t cookie_mask; |
| 1033 | uint8_t table_id; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1034 | of_fm_cmd_t _command == 4; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1035 | uint16_t idle_timeout; |
| 1036 | uint16_t hard_timeout; |
| 1037 | uint16_t priority; |
| 1038 | uint32_t buffer_id; |
| 1039 | of_port_no_t out_port; |
| 1040 | uint32_t out_group; |
Andreas Wundsam | dfeb594 | 2013-09-19 13:07:49 -0700 | [diff] [blame] | 1041 | enum ofp_flow_mod_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1042 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1043 | of_match_t match; |
| 1044 | list(of_instruction_t) instructions; |
| 1045 | }; |
| 1046 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1047 | struct of_bucket { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1048 | uint16_t len; |
| 1049 | uint16_t weight; |
| 1050 | of_port_no_t watch_port; |
| 1051 | uint32_t watch_group; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1052 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1053 | list(of_action_t) actions; |
| 1054 | }; |
| 1055 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1056 | struct of_group_mod : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1057 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1058 | uint8_t type == 15; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1059 | uint16_t length; |
| 1060 | uint32_t xid; |
Andreas Wundsam | 5812cf3 | 2013-11-15 13:51:24 -0800 | [diff] [blame] | 1061 | enum ofp_group_mod_command command == ?; |
| 1062 | enum ofp_group_type group_type; |
| 1063 | pad(1); |
| 1064 | uint32_t group_id; |
| 1065 | list(of_bucket_t) buckets; |
| 1066 | }; |
| 1067 | |
| 1068 | struct of_group_add : of_group_mod { |
| 1069 | uint8_t version; |
| 1070 | uint8_t type == 15; |
| 1071 | uint16_t length; |
| 1072 | uint32_t xid; |
| 1073 | enum ofp_group_mod_command command == 0; |
| 1074 | enum ofp_group_type group_type; |
| 1075 | pad(1); |
| 1076 | uint32_t group_id; |
| 1077 | list(of_bucket_t) buckets; |
| 1078 | }; |
| 1079 | |
| 1080 | struct of_group_modify : of_group_mod { |
| 1081 | uint8_t version; |
| 1082 | uint8_t type == 15; |
| 1083 | uint16_t length; |
| 1084 | uint32_t xid; |
| 1085 | enum ofp_group_mod_command command == 1; |
| 1086 | enum ofp_group_type group_type; |
| 1087 | pad(1); |
| 1088 | uint32_t group_id; |
| 1089 | list(of_bucket_t) buckets; |
| 1090 | }; |
| 1091 | |
| 1092 | struct of_group_delete : of_group_mod { |
| 1093 | uint8_t version; |
| 1094 | uint8_t type == 15; |
| 1095 | uint16_t length; |
| 1096 | uint32_t xid; |
| 1097 | enum ofp_group_mod_command command == 2; |
| 1098 | enum ofp_group_type group_type; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1099 | pad(1); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1100 | uint32_t group_id; |
| 1101 | list(of_bucket_t) buckets; |
| 1102 | }; |
| 1103 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1104 | struct of_packet_out : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1105 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1106 | uint8_t type == 13; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1107 | uint16_t length; |
| 1108 | uint32_t xid; |
| 1109 | uint32_t buffer_id; |
| 1110 | of_port_no_t in_port; |
| 1111 | uint16_t actions_len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1112 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1113 | list(of_action_t) actions; |
| 1114 | of_octets_t data; |
| 1115 | }; |
| 1116 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1117 | struct of_packet_in : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1118 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1119 | uint8_t type == 10; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1120 | uint16_t length; |
| 1121 | uint32_t xid; |
| 1122 | uint32_t buffer_id; |
| 1123 | uint16_t total_len; |
| 1124 | uint8_t reason; |
| 1125 | uint8_t table_id; |
| 1126 | uint64_t cookie; |
| 1127 | of_match_t match; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1128 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1129 | of_octets_t data; /* FIXME: Ensure total_len gets updated */ |
| 1130 | }; |
| 1131 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1132 | struct of_flow_removed : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1133 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1134 | uint8_t type == 11; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1135 | uint16_t length; |
| 1136 | uint32_t xid; |
| 1137 | uint64_t cookie; |
| 1138 | uint16_t priority; |
| 1139 | uint8_t reason; |
| 1140 | uint8_t table_id; |
| 1141 | uint32_t duration_sec; |
| 1142 | uint32_t duration_nsec; |
| 1143 | uint16_t idle_timeout; |
| 1144 | uint16_t hard_timeout; |
| 1145 | uint64_t packet_count; |
| 1146 | uint64_t byte_count; |
| 1147 | of_match_t match; |
| 1148 | }; |
| 1149 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1150 | struct of_meter_band { |
Andreas Wundsam | 9ba6536 | 2013-08-02 19:14:42 -0700 | [diff] [blame] | 1151 | uint16_t type == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1152 | uint16_t len; |
| 1153 | // uint32_t rate; // These are excluded b/c this is the header |
| 1154 | // uint32_t burst_size; // These are excluded b/c this is the header |
| 1155 | }; |
| 1156 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1157 | struct of_meter_band_drop : of_meter_band { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1158 | uint16_t type == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1159 | uint16_t len; |
| 1160 | uint32_t rate; |
| 1161 | uint32_t burst_size; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1162 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1163 | }; |
| 1164 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1165 | struct of_meter_band_dscp_remark : of_meter_band { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1166 | uint16_t type == 2; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1167 | uint16_t len; |
| 1168 | uint32_t rate; |
| 1169 | uint32_t burst_size; |
| 1170 | uint8_t prec_level; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1171 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1172 | }; |
| 1173 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1174 | struct of_meter_band_experimenter : of_meter_band { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1175 | uint16_t type == 65535; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1176 | uint16_t len; |
| 1177 | uint32_t rate; |
| 1178 | uint32_t burst_size; |
| 1179 | uint32_t experimenter; |
| 1180 | }; |
| 1181 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1182 | struct of_meter_mod : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1183 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1184 | uint8_t type == 29; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1185 | uint16_t length; |
| 1186 | uint32_t xid; |
| 1187 | uint16_t command; |
| 1188 | uint16_t flags; |
| 1189 | uint32_t meter_id; |
| 1190 | list(of_meter_band_t) meters; |
| 1191 | }; |
| 1192 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1193 | struct of_error_msg : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1194 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1195 | uint8_t type == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1196 | uint16_t length; |
| 1197 | uint32_t xid; |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 1198 | uint16_t err_type == ?; |
| 1199 | }; |
| 1200 | |
| 1201 | struct of_hello_failed_error_msg : of_error_msg { |
| 1202 | uint8_t version; |
| 1203 | uint8_t type == 1; |
| 1204 | uint16_t length; |
| 1205 | uint32_t xid; |
| 1206 | uint16_t err_type == 0; |
| 1207 | enum ofp_hello_failed_code code; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1208 | of_octets_t data; |
| 1209 | }; |
| 1210 | |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 1211 | struct of_bad_request_error_msg : of_error_msg { |
| 1212 | uint8_t version; |
| 1213 | uint8_t type == 1; |
| 1214 | uint16_t length; |
| 1215 | uint32_t xid; |
| 1216 | uint16_t err_type == 1; |
| 1217 | enum ofp_bad_request_code code; |
| 1218 | of_octets_t data; |
| 1219 | }; |
| 1220 | |
| 1221 | struct of_bad_action_error_msg : of_error_msg { |
| 1222 | uint8_t version; |
| 1223 | uint8_t type == 1; |
| 1224 | uint16_t length; |
| 1225 | uint32_t xid; |
| 1226 | uint16_t err_type == 2; |
| 1227 | enum ofp_bad_action_code code; |
| 1228 | of_octets_t data; |
| 1229 | }; |
| 1230 | |
| 1231 | struct of_bad_instruction_error_msg : of_error_msg { |
| 1232 | uint8_t version; |
| 1233 | uint8_t type == 1; |
| 1234 | uint16_t length; |
| 1235 | uint32_t xid; |
| 1236 | uint16_t err_type == 3; |
| 1237 | enum ofp_bad_instruction_code code; |
| 1238 | of_octets_t data; |
| 1239 | }; |
| 1240 | |
| 1241 | struct of_bad_match_error_msg : of_error_msg { |
| 1242 | uint8_t version; |
| 1243 | uint8_t type == 1; |
| 1244 | uint16_t length; |
| 1245 | uint32_t xid; |
| 1246 | uint16_t err_type == 4; |
| 1247 | enum ofp_bad_match_code code; |
| 1248 | of_octets_t data; |
| 1249 | }; |
| 1250 | |
| 1251 | struct of_flow_mod_failed_error_msg : of_error_msg { |
| 1252 | uint8_t version; |
| 1253 | uint8_t type == 1; |
| 1254 | uint16_t length; |
| 1255 | uint32_t xid; |
| 1256 | uint16_t err_type == 5; |
| 1257 | enum ofp_flow_mod_failed_code code; |
| 1258 | of_octets_t data; |
| 1259 | }; |
| 1260 | |
| 1261 | struct of_group_mod_failed_error_msg : of_error_msg { |
| 1262 | uint8_t version; |
| 1263 | uint8_t type == 1; |
| 1264 | uint16_t length; |
| 1265 | uint32_t xid; |
| 1266 | uint16_t err_type == 6; |
| 1267 | enum ofp_group_mod_failed_code code; |
| 1268 | of_octets_t data; |
| 1269 | }; |
| 1270 | |
| 1271 | struct of_port_mod_failed_error_msg : of_error_msg { |
| 1272 | uint8_t version; |
| 1273 | uint8_t type == 1; |
| 1274 | uint16_t length; |
| 1275 | uint32_t xid; |
| 1276 | uint16_t err_type == 7; |
| 1277 | enum ofp_port_mod_failed_code code; |
| 1278 | of_octets_t data; |
| 1279 | }; |
| 1280 | |
| 1281 | struct of_table_mod_failed_error_msg : of_error_msg { |
| 1282 | uint8_t version; |
| 1283 | uint8_t type == 1; |
| 1284 | uint16_t length; |
| 1285 | uint32_t xid; |
| 1286 | uint16_t err_type == 8; |
| 1287 | enum ofp_table_mod_failed_code code; |
| 1288 | of_octets_t data; |
| 1289 | }; |
| 1290 | |
| 1291 | struct of_queue_op_failed_error_msg : of_error_msg { |
| 1292 | uint8_t version; |
| 1293 | uint8_t type == 1; |
| 1294 | uint16_t length; |
| 1295 | uint32_t xid; |
| 1296 | uint16_t err_type == 9; |
| 1297 | enum ofp_queue_op_failed_code code; |
| 1298 | of_octets_t data; |
| 1299 | }; |
| 1300 | |
| 1301 | struct of_switch_config_failed_error_msg : of_error_msg { |
| 1302 | uint8_t version; |
| 1303 | uint8_t type == 1; |
| 1304 | uint16_t length; |
| 1305 | uint32_t xid; |
| 1306 | uint16_t err_type == 10; |
| 1307 | enum ofp_switch_config_failed_code code; |
| 1308 | of_octets_t data; |
| 1309 | }; |
| 1310 | |
| 1311 | struct of_role_request_failed_error_msg : of_error_msg { |
| 1312 | uint8_t version; |
| 1313 | uint8_t type == 1; |
| 1314 | uint16_t length; |
| 1315 | uint32_t xid; |
| 1316 | uint16_t err_type == 11; |
| 1317 | enum ofp_role_request_failed_code code; |
| 1318 | of_octets_t data; |
| 1319 | }; |
| 1320 | |
| 1321 | struct of_meter_mod_failed_error_msg : of_error_msg { |
| 1322 | uint8_t version; |
| 1323 | uint8_t type == 1; |
| 1324 | uint16_t length; |
| 1325 | uint32_t xid; |
| 1326 | uint16_t err_type == 12; |
| 1327 | enum ofp_meter_mod_failed_code code; |
| 1328 | of_octets_t data; |
| 1329 | }; |
| 1330 | |
| 1331 | struct of_table_features_failed_error_msg : of_error_msg { |
| 1332 | uint8_t version; |
| 1333 | uint8_t type == 1; |
| 1334 | uint16_t length; |
| 1335 | uint32_t xid; |
| 1336 | uint16_t err_type == 13; |
| 1337 | enum ofp_table_features_failed_code code; |
| 1338 | of_octets_t data; |
| 1339 | }; |
| 1340 | |
Andreas Wundsam | cc8cd66 | 2013-11-15 13:52:06 -0800 | [diff] [blame] | 1341 | struct of_experimenter_error_msg : of_error_msg { |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 1342 | uint8_t version; |
| 1343 | uint8_t type == 1; |
| 1344 | uint16_t length; |
| 1345 | uint32_t xid; |
| 1346 | uint16_t err_type == 0xffff; |
| 1347 | uint16_t subtype; |
| 1348 | uint32_t experimenter; |
| 1349 | of_octets_t data; |
| 1350 | }; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1351 | |
| 1352 | // STATS ENTRIES: flow, table, port, queue, group stats, group desc stats |
| 1353 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1354 | struct of_flow_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1355 | uint16_t length; |
| 1356 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1357 | pad(1); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1358 | uint32_t duration_sec; |
| 1359 | uint32_t duration_nsec; |
| 1360 | uint16_t priority; |
| 1361 | uint16_t idle_timeout; |
| 1362 | uint16_t hard_timeout; |
Rich Lane | 1a47c1c | 2013-08-28 15:27:00 -0700 | [diff] [blame] | 1363 | uint16_t flags; |
| 1364 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1365 | uint64_t cookie; |
| 1366 | uint64_t packet_count; |
| 1367 | uint64_t byte_count; |
| 1368 | of_match_t match; |
| 1369 | list(of_instruction_t) instructions; |
| 1370 | }; |
| 1371 | |
| 1372 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1373 | struct of_table_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1374 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1375 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1376 | uint32_t active_count; |
| 1377 | uint64_t lookup_count; |
| 1378 | uint64_t matched_count; |
| 1379 | }; |
| 1380 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1381 | struct of_port_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1382 | of_port_no_t port_no; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1383 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1384 | uint64_t rx_packets; |
| 1385 | uint64_t tx_packets; |
| 1386 | uint64_t rx_bytes; |
| 1387 | uint64_t tx_bytes; |
| 1388 | uint64_t rx_dropped; |
| 1389 | uint64_t tx_dropped; |
| 1390 | uint64_t rx_errors; |
| 1391 | uint64_t tx_errors; |
| 1392 | uint64_t rx_frame_err; |
| 1393 | uint64_t rx_over_err; |
| 1394 | uint64_t rx_crc_err; |
| 1395 | uint64_t collisions; |
| 1396 | uint32_t duration_sec; |
| 1397 | uint32_t duration_nsec; |
| 1398 | }; |
| 1399 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1400 | struct of_queue_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1401 | of_port_no_t port_no; |
| 1402 | uint32_t queue_id; |
| 1403 | uint64_t tx_bytes; |
| 1404 | uint64_t tx_packets; |
| 1405 | uint64_t tx_errors; |
| 1406 | uint32_t duration_sec; |
| 1407 | uint32_t duration_nsec; |
| 1408 | }; |
| 1409 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1410 | struct of_bucket_counter { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1411 | uint64_t packet_count; |
| 1412 | uint64_t byte_count; |
| 1413 | }; |
| 1414 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1415 | struct of_group_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1416 | uint16_t length; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1417 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1418 | uint32_t group_id; |
| 1419 | uint32_t ref_count; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1420 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1421 | uint64_t packet_count; |
| 1422 | uint64_t byte_count; |
| 1423 | uint32_t duration_sec; |
| 1424 | uint32_t duration_nsec; |
| 1425 | list(of_bucket_counter_t) bucket_stats; |
| 1426 | }; |
| 1427 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1428 | struct of_group_desc_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1429 | uint16_t length; |
Rich Lane | 35e7ac7 | 2013-10-15 10:36:10 -0700 | [diff] [blame] | 1430 | uint8_t group_type; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1431 | pad(1); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1432 | uint32_t group_id; |
| 1433 | list(of_bucket_t) buckets; |
| 1434 | }; |
| 1435 | |
| 1436 | // STATS: |
| 1437 | // Desc, flow, agg, table, port, queue, group, group_desc, group_feat, experi |
| 1438 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1439 | struct of_stats_request : of_header { |
| 1440 | uint8_t version; |
| 1441 | uint8_t type == 18; |
| 1442 | uint16_t length; |
| 1443 | uint32_t xid; |
Andreas Wundsam | c37ba3d | 2013-08-02 17:51:51 -0700 | [diff] [blame] | 1444 | uint16_t stats_type == ?; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1445 | enum ofp_stats_request_flags flags; |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1446 | pad(4); |
| 1447 | }; |
| 1448 | |
| 1449 | struct of_stats_reply : of_header { |
| 1450 | uint8_t version; |
| 1451 | uint8_t type == 19; |
| 1452 | uint16_t length; |
| 1453 | uint32_t xid; |
Andreas Wundsam | c37ba3d | 2013-08-02 17:51:51 -0700 | [diff] [blame] | 1454 | uint16_t stats_type == ?; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1455 | enum ofp_stats_reply_flags flags; |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1456 | pad(4); |
| 1457 | }; |
| 1458 | |
| 1459 | struct of_desc_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1460 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1461 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1462 | uint16_t length; |
| 1463 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1464 | uint16_t stats_type == 0; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1465 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1466 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1467 | }; |
| 1468 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1469 | struct of_desc_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1470 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1471 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1472 | uint16_t length; |
| 1473 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1474 | uint16_t stats_type == 0; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1475 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1476 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1477 | of_desc_str_t mfr_desc; |
| 1478 | of_desc_str_t hw_desc; |
| 1479 | of_desc_str_t sw_desc; |
| 1480 | of_serial_num_t serial_num; |
| 1481 | of_desc_str_t dp_desc; |
| 1482 | }; |
| 1483 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1484 | struct of_flow_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1485 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1486 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1487 | uint16_t length; |
| 1488 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1489 | uint16_t stats_type == 1; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1490 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1491 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1492 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1493 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1494 | of_port_no_t out_port; |
| 1495 | uint32_t out_group; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1496 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1497 | uint64_t cookie; |
| 1498 | uint64_t cookie_mask; |
| 1499 | of_match_t match; |
| 1500 | }; |
| 1501 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1502 | struct of_flow_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1503 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1504 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1505 | uint16_t length; |
| 1506 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1507 | uint16_t stats_type == 1; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1508 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1509 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1510 | list(of_flow_stats_entry_t) entries; |
| 1511 | }; |
| 1512 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1513 | struct of_aggregate_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1514 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1515 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1516 | uint16_t length; |
| 1517 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1518 | uint16_t stats_type == 2; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1519 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1520 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1521 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1522 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1523 | of_port_no_t out_port; |
| 1524 | uint32_t out_group; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1525 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1526 | uint64_t cookie; |
| 1527 | uint64_t cookie_mask; |
| 1528 | of_match_t match; |
| 1529 | }; |
| 1530 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1531 | struct of_aggregate_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1532 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1533 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1534 | uint16_t length; |
| 1535 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1536 | uint16_t stats_type == 2; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1537 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1538 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1539 | uint64_t packet_count; |
| 1540 | uint64_t byte_count; |
| 1541 | uint32_t flow_count; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1542 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1543 | }; |
| 1544 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1545 | struct of_table_stats_request : of_stats_request { |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1546 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1547 | uint8_t type == 18; |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1548 | uint16_t length; |
| 1549 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1550 | uint16_t stats_type == 3; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1551 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1552 | pad(4); |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1553 | }; |
| 1554 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1555 | struct of_table_stats_reply : of_stats_reply { |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1556 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1557 | uint8_t type == 19; |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1558 | uint16_t length; |
| 1559 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1560 | uint16_t stats_type == 3; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1561 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1562 | pad(4); |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1563 | list(of_table_stats_entry_t) entries; |
| 1564 | }; |
| 1565 | |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1566 | // FIXME: These are padded to 8 byte align beyond the length indicated |
| 1567 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1568 | struct of_table_feature_prop { |
Rich Lane | a1b8f44 | 2013-10-01 22:05:22 -0700 | [diff] [blame] | 1569 | uint16_t type == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1570 | uint16_t length; |
| 1571 | }; |
| 1572 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1573 | struct of_table_feature_prop_instructions : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1574 | uint16_t type == 0; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1575 | uint16_t length; |
| 1576 | // FIXME Check if instruction_t is right for ids here |
| 1577 | list(of_instruction_t) instruction_ids; |
| 1578 | }; |
| 1579 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1580 | struct of_table_feature_prop_instructions_miss : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1581 | uint16_t type == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1582 | uint16_t length; |
| 1583 | list(of_instruction_t) instruction_ids; |
| 1584 | }; |
| 1585 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1586 | struct of_table_feature_prop_next_tables : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1587 | uint16_t type == 2; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1588 | uint16_t length; |
| 1589 | list(of_uint8_t) next_table_ids; |
| 1590 | }; |
| 1591 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1592 | struct of_table_feature_prop_next_tables_miss : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1593 | uint16_t type == 3; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1594 | uint16_t length; |
| 1595 | list(of_uint8_t) next_table_ids; |
| 1596 | }; |
| 1597 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1598 | struct of_table_feature_prop_write_actions : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1599 | uint16_t type == 4; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1600 | uint16_t length; |
| 1601 | list(of_action_id_t) action_ids; |
| 1602 | }; |
| 1603 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1604 | struct of_table_feature_prop_write_actions_miss : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1605 | uint16_t type == 5; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1606 | uint16_t length; |
| 1607 | list(of_action_id_t) action_ids; |
| 1608 | }; |
| 1609 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1610 | struct of_table_feature_prop_apply_actions : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1611 | uint16_t type == 6; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1612 | uint16_t length; |
| 1613 | list(of_action_id_t) action_ids; |
| 1614 | }; |
| 1615 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1616 | struct of_table_feature_prop_apply_actions_miss : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1617 | uint16_t type == 7; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1618 | uint16_t length; |
| 1619 | list(of_action_id_t) action_ids; |
| 1620 | }; |
| 1621 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1622 | struct of_table_feature_prop_match : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1623 | uint16_t type == 8; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1624 | uint16_t length; |
| 1625 | list(of_uint32_t) oxm_ids; |
| 1626 | }; |
| 1627 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1628 | struct of_table_feature_prop_wildcards : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1629 | uint16_t type == 10; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1630 | uint16_t length; |
| 1631 | list(of_uint32_t) oxm_ids; |
| 1632 | }; |
| 1633 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1634 | struct of_table_feature_prop_write_setfield : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1635 | uint16_t type == 12; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1636 | uint16_t length; |
| 1637 | list(of_uint32_t) oxm_ids; |
| 1638 | }; |
| 1639 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1640 | struct of_table_feature_prop_write_setfield_miss : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1641 | uint16_t type == 13; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1642 | uint16_t length; |
| 1643 | list(of_uint32_t) oxm_ids; |
| 1644 | }; |
| 1645 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1646 | struct of_table_feature_prop_apply_setfield : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1647 | uint16_t type == 14; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1648 | uint16_t length; |
| 1649 | list(of_uint32_t) oxm_ids; |
| 1650 | }; |
| 1651 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1652 | struct of_table_feature_prop_apply_setfield_miss : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1653 | uint16_t type == 15; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1654 | uint16_t length; |
| 1655 | list(of_uint32_t) oxm_ids; |
| 1656 | }; |
| 1657 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1658 | struct of_table_feature_prop_experimenter : of_table_feature_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1659 | uint16_t type == 65535; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1660 | uint16_t length; |
| 1661 | uint32_t experimenter; |
| 1662 | uint32_t subtype; |
| 1663 | of_octets_t experimenter_data; |
| 1664 | }; |
| 1665 | |
| 1666 | // Not yet supported |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1667 | // struct of_table_feature_prop_experimenter_miss : of_table_feature_prop { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1668 | // uint16_t type; |
| 1669 | // uint16_t length; |
| 1670 | // uint32_t experimenter; |
| 1671 | // uint32_t subtype; |
| 1672 | // of_octets_t experimenter_data; |
| 1673 | // }; |
| 1674 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1675 | struct of_table_features { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1676 | uint16_t length; |
| 1677 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1678 | pad(5); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1679 | of_table_name_t name; |
| 1680 | uint64_t metadata_match; |
| 1681 | uint64_t metadata_write; |
| 1682 | uint32_t config; |
| 1683 | uint32_t max_entries; |
| 1684 | list(of_table_feature_prop_t) properties; |
| 1685 | }; |
| 1686 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1687 | struct of_meter_features { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1688 | uint32_t max_meter; |
| 1689 | uint32_t band_types; |
| 1690 | uint32_t capabilities; |
| 1691 | uint8_t max_bands; |
| 1692 | uint8_t max_color; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1693 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1694 | }; |
| 1695 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1696 | struct of_port_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1697 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1698 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1699 | uint16_t length; |
| 1700 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1701 | uint16_t stats_type == 4; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1702 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1703 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1704 | of_port_no_t port_no; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1705 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1706 | }; |
| 1707 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1708 | struct of_port_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1709 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1710 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1711 | uint16_t length; |
| 1712 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1713 | uint16_t stats_type == 4; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1714 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1715 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1716 | list(of_port_stats_entry_t) entries; |
| 1717 | }; |
| 1718 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1719 | struct of_queue_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1720 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1721 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1722 | uint16_t length; |
| 1723 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1724 | uint16_t stats_type == 5; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1725 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1726 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1727 | of_port_no_t port_no; |
| 1728 | uint32_t queue_id; |
| 1729 | }; |
| 1730 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1731 | struct of_queue_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1732 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1733 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1734 | uint16_t length; |
| 1735 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1736 | uint16_t stats_type == 5; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1737 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1738 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1739 | list(of_queue_stats_entry_t) entries; |
| 1740 | }; |
| 1741 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1742 | struct of_group_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1743 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1744 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1745 | uint16_t length; |
| 1746 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1747 | uint16_t stats_type == 6; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1748 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1749 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1750 | uint32_t group_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1751 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1752 | }; |
| 1753 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1754 | struct of_group_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1755 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1756 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1757 | uint16_t length; |
| 1758 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1759 | uint16_t stats_type == 6; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1760 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1761 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1762 | list(of_group_stats_entry_t) entries; |
| 1763 | }; |
| 1764 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1765 | struct of_group_desc_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1766 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1767 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1768 | uint16_t length; |
| 1769 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1770 | uint16_t stats_type == 7; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1771 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1772 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1773 | }; |
| 1774 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1775 | struct of_group_desc_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1776 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1777 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1778 | uint16_t length; |
| 1779 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1780 | uint16_t stats_type == 7; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1781 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1782 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1783 | list(of_group_desc_stats_entry_t) entries; |
| 1784 | }; |
| 1785 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1786 | struct of_group_features_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1787 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1788 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1789 | uint16_t length; |
| 1790 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1791 | uint16_t stats_type == 8; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1792 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1793 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1794 | }; |
| 1795 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1796 | struct of_group_features_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1797 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1798 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1799 | uint16_t length; |
| 1800 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1801 | uint16_t stats_type == 8; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1802 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1803 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1804 | uint32_t types; |
| 1805 | uint32_t capabilities; |
| 1806 | uint32_t max_groups_all; |
| 1807 | uint32_t max_groups_select; |
| 1808 | uint32_t max_groups_indirect; |
| 1809 | uint32_t max_groups_ff; |
| 1810 | uint32_t actions_all; |
| 1811 | uint32_t actions_select; |
| 1812 | uint32_t actions_indirect; |
| 1813 | uint32_t actions_ff; |
| 1814 | }; |
| 1815 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1816 | struct of_meter_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1817 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1818 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1819 | uint16_t length; |
| 1820 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1821 | uint16_t stats_type == 9; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1822 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1823 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1824 | uint32_t meter_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1825 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1826 | }; |
| 1827 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1828 | struct of_meter_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1829 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1830 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1831 | uint16_t length; |
| 1832 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1833 | uint16_t stats_type == 9; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1834 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1835 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1836 | list(of_meter_stats_t) entries; |
| 1837 | }; |
| 1838 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1839 | struct of_meter_config_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1840 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1841 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1842 | uint16_t length; |
| 1843 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1844 | uint16_t stats_type == 10; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1845 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1846 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1847 | uint32_t meter_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1848 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1849 | }; |
| 1850 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1851 | struct of_meter_config_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1852 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1853 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1854 | uint16_t length; |
| 1855 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1856 | uint16_t stats_type == 10; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1857 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1858 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1859 | list(of_meter_band_t) entries; |
| 1860 | }; |
| 1861 | |
| 1862 | // FIXME stats added to get things working |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1863 | struct of_meter_features_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1864 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1865 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1866 | uint16_t length; |
| 1867 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1868 | uint16_t stats_type == 11; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1869 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1870 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1871 | }; |
| 1872 | |
| 1873 | // FIXME stats added to get things working |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1874 | struct of_meter_features_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1875 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1876 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1877 | uint16_t length; |
| 1878 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1879 | uint16_t stats_type == 11; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1880 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1881 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1882 | of_meter_features_t features; |
| 1883 | }; |
| 1884 | |
| 1885 | // FIXME stats added to get things working |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1886 | struct of_table_features_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1887 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1888 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1889 | uint16_t length; |
| 1890 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1891 | uint16_t stats_type == 12; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1892 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1893 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1894 | list(of_table_features_t) entries; |
| 1895 | }; |
| 1896 | |
| 1897 | // FIXME stats added to get things working |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1898 | struct of_table_features_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1899 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1900 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1901 | uint16_t length; |
| 1902 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1903 | uint16_t stats_type == 12; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1904 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1905 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1906 | list(of_table_features_t) entries; |
| 1907 | }; |
| 1908 | |
| 1909 | // FIXME stats added to get things working |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1910 | struct of_port_desc_stats_request : of_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1911 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1912 | uint8_t type == 18; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1913 | uint16_t length; |
| 1914 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1915 | uint16_t stats_type == 13; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1916 | enum ofp_stats_request_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1917 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1918 | }; |
| 1919 | |
| 1920 | // FIXME stats added to get things working |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1921 | struct of_port_desc_stats_reply : of_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1922 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1923 | uint8_t type == 19; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1924 | uint16_t length; |
| 1925 | uint32_t xid; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1926 | uint16_t stats_type == 13; |
Andreas Wundsam | b47d7e8 | 2013-10-18 17:43:00 -0700 | [diff] [blame] | 1927 | enum ofp_stats_reply_flags flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1928 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1929 | list(of_port_desc_t) entries; |
| 1930 | }; |
| 1931 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1932 | struct of_meter_band_stats { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1933 | uint64_t packet_band_count; |
| 1934 | uint64_t byte_band_count; |
| 1935 | }; |
| 1936 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1937 | struct of_meter_stats { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1938 | uint32_t meter_id; |
| 1939 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1940 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1941 | uint32_t flow_count; |
| 1942 | uint64_t packet_in_count; |
| 1943 | uint64_t byte_in_count; |
| 1944 | uint32_t duration_sec; |
| 1945 | uint32_t duration_nsec; |
| 1946 | list(of_meter_band_stats_t) band_stats; |
| 1947 | }; |
| 1948 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1949 | struct of_meter_config { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1950 | uint16_t length; |
| 1951 | uint16_t flags; |
| 1952 | uint32_t meter_id; |
| 1953 | list(of_meter_band_t) entries; |
| 1954 | }; |
| 1955 | |
Rob Vaterlaus | feee371 | 2013-09-30 11:24:19 -0700 | [diff] [blame] | 1956 | struct of_experimenter_stats_header { |
Rich Lane | b25d07c | 2013-08-22 17:22:43 -0700 | [diff] [blame] | 1957 | uint32_t experimenter == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1958 | uint32_t subtype; |
| 1959 | }; |
| 1960 | |
| 1961 | // END OF STATS OBJECTS |
| 1962 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1963 | struct of_queue_prop { |
Andreas Wundsam | c37ba3d | 2013-08-02 17:51:51 -0700 | [diff] [blame] | 1964 | uint16_t type == ?; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1965 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1966 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1967 | }; |
| 1968 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1969 | struct of_queue_prop_min_rate : of_queue_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1970 | uint16_t type == 1; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1971 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1972 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1973 | uint16_t rate; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1974 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1975 | }; |
| 1976 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1977 | struct of_queue_prop_max_rate : of_queue_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1978 | uint16_t type == 2; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1979 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1980 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1981 | uint16_t rate; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1982 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1983 | }; |
| 1984 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 1985 | struct of_queue_prop_experimenter : of_queue_prop { |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 1986 | uint16_t type == 65535; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1987 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1988 | pad(4); |
Rich Lane | b25d07c | 2013-08-22 17:22:43 -0700 | [diff] [blame] | 1989 | uint32_t experimenter == ?; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1990 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1991 | of_octets_t data; |
| 1992 | }; |
| 1993 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1994 | struct of_packet_queue { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1995 | uint32_t queue_id; |
| 1996 | of_port_no_t port; |
| 1997 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1998 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1999 | list(of_queue_prop_t) properties; |
| 2000 | }; |
| 2001 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2002 | struct of_queue_get_config_request : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2003 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2004 | uint8_t type == 22; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2005 | uint16_t length; |
| 2006 | uint32_t xid; |
| 2007 | of_port_no_t port; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 2008 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2009 | }; |
| 2010 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2011 | struct of_queue_get_config_reply : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2012 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2013 | uint8_t type == 23; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2014 | uint16_t length; |
| 2015 | uint32_t xid; |
| 2016 | of_port_no_t port; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 2017 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2018 | list(of_packet_queue_t) queues; |
| 2019 | }; |
| 2020 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2021 | struct of_role_request : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2022 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2023 | uint8_t type == 24; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2024 | uint16_t length; |
| 2025 | uint32_t xid; |
Andreas Wundsam | 4f796b7 | 2013-10-18 17:33:23 -0700 | [diff] [blame] | 2026 | enum ofp_controller_role role; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 2027 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2028 | uint64_t generation_id; |
| 2029 | }; |
| 2030 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2031 | struct of_role_reply : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2032 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2033 | uint8_t type == 25; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2034 | uint16_t length; |
| 2035 | uint32_t xid; |
Andreas Wundsam | 4f796b7 | 2013-10-18 17:33:23 -0700 | [diff] [blame] | 2036 | enum ofp_controller_role role; |
| 2037 | pad(4); |
| 2038 | uint64_t generation_id; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2039 | }; |
| 2040 | |
| 2041 | //////////////////////////////////////////////////////////////// |
| 2042 | // FIXME understand async; where do bitmasks live? |
| 2043 | // Determine bitmap type for masks below. |
| 2044 | // DOCUMENT masks where uint32_t[0] is interest for equal/master |
| 2045 | // while uint32_t[1] is interest for slave |
| 2046 | //////////////////////////////////////////////////////////////// |
| 2047 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2048 | struct of_async_get_request : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2049 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2050 | uint8_t type == 26; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2051 | uint16_t length; |
| 2052 | uint32_t xid; |
| 2053 | uint32_t packet_in_mask_equal_master; |
| 2054 | uint32_t packet_in_mask_slave; |
| 2055 | uint32_t port_status_mask_equal_master; |
| 2056 | uint32_t port_status_mask_slave; |
| 2057 | uint32_t flow_removed_mask_equal_master; |
| 2058 | uint32_t flow_removed_mask_slave; |
| 2059 | }; |
| 2060 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2061 | struct of_async_get_reply : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2062 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2063 | uint8_t type == 27; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2064 | uint16_t length; |
| 2065 | uint32_t xid; |
| 2066 | uint32_t packet_in_mask_equal_master; |
| 2067 | uint32_t packet_in_mask_slave; |
| 2068 | uint32_t port_status_mask_equal_master; |
| 2069 | uint32_t port_status_mask_slave; |
| 2070 | uint32_t flow_removed_mask_equal_master; |
| 2071 | uint32_t flow_removed_mask_slave; |
| 2072 | }; |
| 2073 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame] | 2074 | struct of_async_set : of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2075 | uint8_t version; |
Rich Lane | 31b8714 | 2013-05-09 22:05:42 -0700 | [diff] [blame] | 2076 | uint8_t type == 28; |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 2077 | uint16_t length; |
| 2078 | uint32_t xid; |
| 2079 | uint32_t packet_in_mask_equal_master; |
| 2080 | uint32_t packet_in_mask_slave; |
| 2081 | uint32_t port_status_mask_equal_master; |
| 2082 | uint32_t port_status_mask_slave; |
| 2083 | uint32_t flow_removed_mask_equal_master; |
| 2084 | uint32_t flow_removed_mask_slave; |
| 2085 | }; |