Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1 | +---------------------------------------------------------------------+ |
| 2 | | Log file: pa.results.log | |
| 3 | | Compiler version: 5.1.0 (fca32d1) | |
Carmelo Cascone | 133c7b1 | 2017-09-13 15:36:08 +0200 | [diff] [blame] | 4 | | Created on: Wed Sep 13 12:57:41 2017 | |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 5 | +---------------------------------------------------------------------+ |
| 6 | |
| 7 | Program: ecmp |
| 8 | |
| 9 | Allocation state: Final Allocation |
| 10 | ------------------------------------------------------------------------------ |
| 11 | | PHV Group | Containers Used | Bits Used | Bits Available | |
| 12 | | (container bit widths) | (% used) | (% used) | | |
| 13 | ------------------------------------------------------------------------------ |
| 14 | | 0 (32) | 6 (37.50%) | 192 (37.50%) | 512 | |
| 15 | | 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 | |
| 16 | | 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 | |
| 17 | | 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 | |
| 18 | | Total for 32 bit | 6 (9.38%) | 192 (9.38%) | 2048 | |
| 19 | | | | | | |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 20 | | 4 (8) | 6 (37.50%) | 42 (32.81%) | 128 | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 21 | | 5 (8) | 2 (12.50%) | 14 (10.94%) | 128 | |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 22 | | 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 | |
| 23 | | 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 | |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 24 | | Total for 8 bit | 8 (12.50%) | 56 (10.94%) | 512 | |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 25 | | | | | | |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 26 | | 8 (16) | 9 (56.25%) | 137 (53.52%) | 256 | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 27 | | 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 | |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 28 | | 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 | |
| 29 | | 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 | |
| 30 | | 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 | |
| 31 | | 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 | |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 32 | | Total for 16 bit | 10 (10.42%) | 153 (9.96%) | 1536 | |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 33 | | | | | | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 34 | | 14 (32) T | 11 (68.75%) | 352 (68.75%) | 512 | |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 35 | | 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 36 | | Total for 32 bit | 11 (34.38%) | 352 (34.38%) | 1024 | |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 37 | | | | | | |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 38 | | 16 (8) T | 8 (50.00%) | 64 (50.00%) | 128 | |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 39 | | 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 | |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 40 | | Total for 8 bit | 8 (25.00%) | 64 (25.00%) | 256 | |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 41 | | | | | | |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 42 | | 18 (16) T | 13 (81.25%) | 208 (81.25%) | 256 | |
| 43 | | 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 | |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 44 | | 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 | |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 45 | | Total for 16 bit | 13 (27.08%) | 208 (27.08%) | 768 | |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 46 | | | | | | |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 47 | | MAU total | 24 (10.71%) | 401 (9.79%) | 4096 | |
| 48 | | Tagalong total | 32 (28.57%) | 624 (30.47%) | 2048 | |
| 49 | | Overall total | 56 (16.67%) | 1025 (16.68%) | 6144 | |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 50 | ------------------------------------------------------------------------------ |
| 51 | |
| 52 | -------------------------------------------- |
| 53 | PHV Allocation |
| 54 | -------------------------------------------- |
| 55 | |
| 56 | Allocations in Group 0 32 bits |
| 57 | 32-bit PHV 0 (ingress): phv0[31:0] = --pov_reserved--_0[31:0] (deparsed) |
| 58 | 32-bit PHV 1 (ingress): phv1[31:24] = ipv4.protocol[7:0] (tagalong capable) (deparsed) |
| 59 | 32-bit PHV 1 (ingress): phv1[23:8] = ipv4.hdrChecksum[15:0] (tagalong capable) (deparsed) |
| 60 | 32-bit PHV 1 (ingress): phv1[7:0] = ipv4.srcAddr[31:24] (deparsed) |
| 61 | 32-bit PHV 2 (ingress): phv2[31:0] = ipv4.dstAddr[31:0] (deparsed) |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 62 | 32-bit PHV 3 (ingress): phv3[31:24] = tcp.dstPort[7:0] (deparsed) |
| 63 | 32-bit PHV 3 (ingress): phv3[23:0] = tcp.seqNo[31:8] (tagalong capable) (deparsed) |
| 64 | 32-bit PHV 4 (ingress): phv4[31:0] = ethernet.dstAddr[39:8] (deparsed) |
| 65 | 32-bit PHV 5 (ingress): phv5[31:0] = ethernet.srcAddr[31:0] (deparsed) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 66 | >> 6 in ingress and 0 in egress |
| 67 | |
| 68 | Allocations in Group 4 8 bits |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 69 | 8-bit PHV 64 (ingress): phv64[7:0] = ipv4.srcAddr[23:16] (deparsed) |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 70 | 8-bit PHV 65 (ingress): phv65[7:0] = tcp.srcPort[15:8] (deparsed) |
| 71 | 8-bit PHV 65 (ingress): phv65[7:0] = udp.srcPort[7:0] (tagalong capable) (deparsed) |
| 72 | 8-bit PHV 66 (ingress): phv66[7:0] = ethernet.dstAddr[47:40] (deparsed) |
| 73 | 8-bit PHV 67 (ingress): phv67[7:0] = ethernet.srcAddr[39:32] (deparsed) |
| 74 | 8-bit PHV 68 (ingress): phv68[6:6] = --validity_check--metadata_bridge[0:0] (deparsed) |
| 75 | 8-bit PHV 68 (ingress): phv68[5:5] = --validity_check--udp[0:0] (deparsed) |
| 76 | 8-bit PHV 68 (ingress): phv68[4:4] = --validity_check--tcp[0:0] (deparsed) |
| 77 | 8-bit PHV 68 (ingress): phv68[3:3] = --validity_check--ipv4[0:0] (deparsed) |
| 78 | 8-bit PHV 68 (ingress): phv68[2:2] = --validity_check--ethernet[0:0] (deparsed) |
| 79 | 8-bit PHV 68 (ingress): phv68[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed) |
| 80 | 8-bit PHV 68 (ingress): phv68[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed) |
| 81 | 8-bit PHV 69 (ingress): phv69[7:5] = ig_intr_md_for_tm.drop_ctl[2:0] (deparsed) |
| 82 | >> 6 in ingress and 0 in egress |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 83 | |
| 84 | Allocations in Group 5 8 bits |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 85 | 8-bit PHV 80 (egress): phv80[7:3] = eg_intr_md._pad7[4:0] |
| 86 | 8-bit PHV 80 (egress): phv80[2:0] = eg_intr_md.egress_cos[2:0] (deparsed) |
| 87 | 8-bit PHV 81 (egress): phv81[5:5] = --validity_check--udp[0:0] (deparsed) |
| 88 | 8-bit PHV 81 (egress): phv81[4:4] = --validity_check--tcp[0:0] (deparsed) |
| 89 | 8-bit PHV 81 (egress): phv81[3:3] = --validity_check--ipv4[0:0] (deparsed) |
| 90 | 8-bit PHV 81 (egress): phv81[2:2] = --validity_check--ethernet[0:0] (deparsed) |
| 91 | 8-bit PHV 81 (egress): phv81[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed) |
| 92 | 8-bit PHV 81 (egress): phv81[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed) |
| 93 | >> 0 in ingress and 2 in egress |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 94 | |
| 95 | Allocations in Group 8 16 bits |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 96 | 16-bit PHV 128 (ingress): phv128[15:15] = ig_intr_md.resubmit_flag[0:0] |
| 97 | 16-bit PHV 128 (ingress): phv128[14:14] = ig_intr_md._pad1[0:0] |
| 98 | 16-bit PHV 128 (ingress): phv128[13:12] = ig_intr_md._pad2[1:0] |
| 99 | 16-bit PHV 128 (ingress): phv128[11:9] = ig_intr_md._pad3[2:0] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 100 | 16-bit PHV 128 (ingress): phv128[8:0] = ig_intr_md.ingress_port[8:0] (deparsed) |
| 101 | 16-bit PHV 129 (ingress): phv129[15:7] = packet_out_hdr.egress_port[8:0] (deparsed) |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 102 | 16-bit PHV 129 (ingress): phv129[15:7] = packet_in_hdr.ingress_port[8:0] (deparsed) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 103 | 16-bit PHV 129 (ingress): phv129[6:0] = packet_out_hdr._padding[6:0] (tagalong capable) (deparsed) |
| 104 | 16-bit PHV 129 (ingress): phv129[6:0] = packet_in_hdr._padding[6:0] (tagalong capable) (deparsed) |
| 105 | 16-bit PHV 130 (ingress): phv130[8:0] = ig_intr_md_for_tm.ucast_egress_port[8:0] (deparsed) |
| 106 | 16-bit PHV 131 (ingress): phv131[15:0] = ipv4.srcAddr[15:0] (deparsed) |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 107 | 16-bit PHV 132 (ingress): phv132[15:8] = tcp.srcPort[7:0] (deparsed) |
| 108 | 16-bit PHV 132 (ingress): phv132[7:0] = tcp.dstPort[15:8] (deparsed) |
| 109 | 16-bit PHV 133 (ingress): phv133[15:8] = ethernet.dstAddr[7:0] (deparsed) |
| 110 | 16-bit PHV 133 (ingress): phv133[7:0] = ethernet.srcAddr[47:40] (deparsed) |
| 111 | 16-bit PHV 134 (ingress): phv134[15:0] = ethernet.etherType[15:0] (deparsed) |
| 112 | 16-bit PHV 135 (ingress): phv135[15:0] = ecmp_metadata.group_id[15:0] |
| 113 | 16-bit PHV 136 (ingress): phv136[15:0] = ecmp_metadata.selector[15:0] |
| 114 | >> 9 in ingress and 0 in egress |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 115 | |
| 116 | Allocations in Group 9 16 bits |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 117 | 16-bit PHV 144 (egress): phv144[15:9] = eg_intr_md._pad0[6:0] |
| 118 | 16-bit PHV 144 (egress): phv144[8:0] = eg_intr_md.egress_port[8:0] (deparsed) |
| 119 | >> 0 in ingress and 1 in egress |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 120 | |
| 121 | Allocations in Group 14 32 bits (tagalong) |
| 122 | 32-bit PHV 256 (ingress): phv256[31:24] = ipv4.identification[7:0] (tagalong capable) (deparsed) |
| 123 | 32-bit PHV 256 (ingress): phv256[23:21] = ipv4.flags[2:0] (tagalong capable) (deparsed) |
| 124 | 32-bit PHV 256 (ingress): phv256[20:8] = ipv4.fragOffset[12:0] (tagalong capable) (deparsed) |
| 125 | 32-bit PHV 256 (ingress): phv256[7:0] = ipv4.ttl[7:0] (tagalong capable) (deparsed) |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 126 | 32-bit PHV 257 (ingress): phv257[31:28] = tcp.dataOffset[3:0] (tagalong capable) (deparsed) |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 127 | 32-bit PHV 257 (ingress): phv257[31:16] = udp.length_[15:0] (tagalong capable) (deparsed) |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 128 | 32-bit PHV 257 (ingress): phv257[27:25] = tcp.res[2:0] (tagalong capable) (deparsed) |
| 129 | 32-bit PHV 257 (ingress): phv257[24:22] = tcp.ecn[2:0] (tagalong capable) (deparsed) |
| 130 | 32-bit PHV 257 (ingress): phv257[21:16] = tcp.ctrl[5:0] (tagalong capable) (deparsed) |
| 131 | 32-bit PHV 257 (ingress): phv257[15:0] = tcp.window[15:0] (tagalong capable) (deparsed) |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 132 | 32-bit PHV 257 (ingress): phv257[15:0] = udp.checksum[15:0] (tagalong capable) (deparsed) |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 133 | 32-bit PHV 258 (ingress): phv258[31:16] = tcp.checksum[15:0] (tagalong capable) (deparsed) |
| 134 | 32-bit PHV 258 (ingress): phv258[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed) |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 135 | 32-bit PHV 260 (egress): phv260[31:24] = ipv4.ttl[7:0] (tagalong capable) (deparsed) |
| 136 | 32-bit PHV 260 (egress): phv260[23:16] = ipv4.protocol[7:0] (tagalong capable) (deparsed) |
| 137 | 32-bit PHV 260 (egress): phv260[15:0] = ipv4.hdrChecksum[15:0] (tagalong capable) (deparsed) |
| 138 | 32-bit PHV 261 (egress): phv261[31:0] = ipv4.srcAddr[31:0] (tagalong capable) (deparsed) |
| 139 | 32-bit PHV 262 (egress): phv262[31:0] = ipv4.dstAddr[31:0] (tagalong capable) (deparsed) |
| 140 | 32-bit PHV 263 (egress): phv263[31:0] = tcp.ackNo[31:0] (tagalong capable) (deparsed) |
| 141 | 32-bit PHV 263 (egress): phv263[31:16] = udp.length_[15:0] (tagalong capable) (deparsed) |
| 142 | 32-bit PHV 263 (egress): phv263[15:0] = udp.checksum[15:0] (tagalong capable) (deparsed) |
| 143 | 32-bit PHV 264 (egress): phv264[31:28] = tcp.dataOffset[3:0] (tagalong capable) (deparsed) |
| 144 | 32-bit PHV 264 (egress): phv264[27:25] = tcp.res[2:0] (tagalong capable) (deparsed) |
| 145 | 32-bit PHV 264 (egress): phv264[24:22] = tcp.ecn[2:0] (tagalong capable) (deparsed) |
| 146 | 32-bit PHV 264 (egress): phv264[21:16] = tcp.ctrl[5:0] (tagalong capable) (deparsed) |
| 147 | 32-bit PHV 264 (egress): phv264[15:0] = tcp.window[15:0] (tagalong capable) (deparsed) |
| 148 | 32-bit PHV 265 (egress): phv265[31:16] = tcp.checksum[15:0] (tagalong capable) (deparsed) |
| 149 | 32-bit PHV 265 (egress): phv265[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed) |
| 150 | 32-bit PHV 266 (egress): phv266[31:0] = ethernet.dstAddr[39:8] (tagalong capable) (deparsed) |
| 151 | 32-bit PHV 267 (egress): phv267[31:0] = ethernet.srcAddr[31:0] (tagalong capable) (deparsed) |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 152 | >> 3 in ingress and 8 in egress |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 153 | |
| 154 | Allocations in Group 16 8 bits (tagalong) |
| 155 | 8-bit PHV 288 (ingress): phv288[7:4] = ipv4.version[3:0] (tagalong capable) (deparsed) |
| 156 | 8-bit PHV 288 (ingress): phv288[3:0] = ipv4.ihl[3:0] (tagalong capable) (deparsed) |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 157 | 8-bit PHV 289 (ingress): phv289[7:0] = tcp.seqNo[7:0] (tagalong capable) (deparsed) |
| 158 | 8-bit PHV 289 (ingress): phv289[7:0] = udp.srcPort[15:8] (tagalong capable) (deparsed) |
| 159 | 8-bit PHV 292 (egress): phv292[7:4] = ipv4.version[3:0] (tagalong capable) (deparsed) |
| 160 | 8-bit PHV 292 (egress): phv292[3:0] = ipv4.ihl[3:0] (tagalong capable) (deparsed) |
| 161 | 8-bit PHV 293 (egress): phv293[7:0] = ipv4.diffserv[7:0] (tagalong capable) (deparsed) |
| 162 | 8-bit PHV 294 (egress): phv294[7:0] = tcp.srcPort[15:8] (tagalong capable) (deparsed) |
| 163 | 8-bit PHV 294 (egress): phv294[7:0] = udp.srcPort[15:8] (tagalong capable) (deparsed) |
| 164 | 8-bit PHV 295 (egress): phv295[7:0] = tcp.srcPort[7:0] (tagalong capable) (deparsed) |
| 165 | 8-bit PHV 295 (egress): phv295[7:0] = udp.srcPort[7:0] (tagalong capable) (deparsed) |
| 166 | 8-bit PHV 296 (egress): phv296[7:0] = ethernet.dstAddr[47:40] (tagalong capable) (deparsed) |
| 167 | 8-bit PHV 297 (egress): phv297[7:0] = ethernet.srcAddr[39:32] (tagalong capable) (deparsed) |
| 168 | >> 2 in ingress and 6 in egress |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 169 | |
| 170 | Allocations in Group 18 16 bits (tagalong) |
| 171 | 16-bit PHV 320 (ingress): phv320[15:8] = ipv4.diffserv[7:0] (tagalong capable) (deparsed) |
| 172 | 16-bit PHV 320 (ingress): phv320[7:0] = ipv4.totalLen[15:8] (tagalong capable) (deparsed) |
| 173 | 16-bit PHV 321 (ingress): phv321[15:8] = ipv4.totalLen[7:0] (tagalong capable) (deparsed) |
| 174 | 16-bit PHV 321 (ingress): phv321[7:0] = ipv4.identification[15:8] (tagalong capable) (deparsed) |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 175 | 16-bit PHV 322 (ingress): phv322[15:0] = tcp.ackNo[31:16] (tagalong capable) (deparsed) |
| 176 | 16-bit PHV 322 (ingress): phv322[15:0] = udp.dstPort[15:0] (tagalong capable) (deparsed) |
| 177 | 16-bit PHV 323 (ingress): phv323[15:0] = tcp.ackNo[15:0] (tagalong capable) (deparsed) |
| 178 | 16-bit PHV 326 (egress): phv326[15:0] = ipv4.totalLen[15:0] (tagalong capable) (deparsed) |
| 179 | 16-bit PHV 327 (egress): phv327[15:0] = ipv4.identification[15:0] (tagalong capable) (deparsed) |
| 180 | 16-bit PHV 328 (egress): phv328[15:13] = ipv4.flags[2:0] (tagalong capable) (deparsed) |
| 181 | 16-bit PHV 328 (egress): phv328[12:0] = ipv4.fragOffset[12:0] (tagalong capable) (deparsed) |
| 182 | 16-bit PHV 329 (egress): phv329[15:0] = tcp.dstPort[15:0] (tagalong capable) (deparsed) |
| 183 | 16-bit PHV 329 (egress): phv329[15:0] = udp.dstPort[15:0] (tagalong capable) (deparsed) |
| 184 | 16-bit PHV 330 (egress): phv330[15:0] = tcp.seqNo[31:16] (tagalong capable) (deparsed) |
| 185 | 16-bit PHV 331 (egress): phv331[15:0] = tcp.seqNo[15:0] (tagalong capable) (deparsed) |
| 186 | 16-bit PHV 332 (egress): phv332[15:8] = ethernet.dstAddr[7:0] (tagalong capable) (deparsed) |
| 187 | 16-bit PHV 332 (egress): phv332[7:0] = ethernet.srcAddr[47:40] (tagalong capable) (deparsed) |
| 188 | 16-bit PHV 333 (egress): phv333[15:0] = ethernet.etherType[15:0] (tagalong capable) (deparsed) |
| 189 | 16-bit PHV 334 (egress): phv334[15:7] = packet_out_hdr.egress_port[8:0] (tagalong capable) (deparsed) |
| 190 | 16-bit PHV 334 (egress): phv334[15:7] = packet_in_hdr.ingress_port[8:0] (tagalong capable) (deparsed) |
| 191 | 16-bit PHV 334 (egress): phv334[6:0] = packet_out_hdr._padding[6:0] (tagalong capable) (deparsed) |
| 192 | 16-bit PHV 334 (egress): phv334[6:0] = packet_in_hdr._padding[6:0] (tagalong capable) (deparsed) |
| 193 | >> 4 in ingress and 9 in egress |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 194 | |
| 195 | |
| 196 | Final POV layout (ingress): |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 197 | 32: --validity_check--packet_in_hdr (ingress) in container 68 |
| 198 | 33: --validity_check--packet_out_hdr (ingress) in container 68 |
| 199 | 34: --validity_check--ethernet (ingress) in container 68 |
| 200 | 35: --validity_check--ipv4 (ingress) in container 68 |
| 201 | 36: --validity_check--tcp (ingress) in container 68 |
| 202 | 37: --validity_check--udp (ingress) in container 68 |
| 203 | 38: --validity_check--metadata_bridge (ingress) in container 68 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 204 | |
| 205 | Final POV layout (egress): |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 206 | 0: --validity_check--packet_in_hdr (egress) in container 81 |
| 207 | 1: --validity_check--packet_out_hdr (egress) in container 81 |
| 208 | 2: --validity_check--ethernet (egress) in container 81 |
| 209 | 3: --validity_check--ipv4 (egress) in container 81 |
| 210 | 4: --validity_check--tcp (egress) in container 81 |
| 211 | 5: --validity_check--udp (egress) in container 81 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 212 | |
| 213 | -------------------------------------------- |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 214 | Bridged metadata layout (6 bytes) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 215 | -------------------------------------------- |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 216 | |