Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 1 | +---------------------------------------------------------------------+ |
| 2 | | Log file: parde.log | |
| 3 | | Compiler version: 5.1.0 (fca32d1) | |
Carmelo Cascone | 133c7b1 | 2017-09-13 15:36:08 +0200 | [diff] [blame] | 4 | | Created on: Wed Sep 13 12:57:41 2017 | |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 5 | +---------------------------------------------------------------------+ |
| 6 | |
| 7 | ># Begin digest init (pre-PHV) |
| 8 | >## Gress 0 |
| 9 | >## Gress 1 |
| 10 | >## Rewrite CLONE_I2E_DIGEST_RCVR ids |
| 11 | >## Rewrite CLONE_E2E_DIGEST_RCVR ids |
| 12 | ># End digest init (pre-PHV) |
| 13 | ># Begin digest PHV reservations |
| 14 | ># End digest PHV reservations |
| 15 | ># Begin digest init (post-PHV) |
| 16 | ># End digest init (post-PHV) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 17 | Found parser entry point: start |
| 18 | ># Begin unroll of HLIR parse graph |
| 19 | >## Create shadow parse graph and find loops |
| 20 | >## Entrypoint 'p4_parse_state.start' |
Carmelo Cascone | 133c7b1 | 2017-09-13 15:36:08 +0200 | [diff] [blame] | 21 | Creating shadow state: 'p4_parse_state.start' -> 'shadow_state (start, 140600561688144)' |
| 22 | Creating shadow state: 'p4_parse_state.parse_pkt_in' -> 'shadow_state (parse_pkt_in, 140600561687696)' |
| 23 | Creating shadow state: 'p4_parse_state.parse_ethernet' -> 'shadow_state (parse_ethernet, 140600552825616)' |
| 24 | Creating shadow state: 'p4_parse_state.parse_ipv4' -> 'shadow_state (parse_ipv4, 140600552825296)' |
| 25 | Creating shadow state: 'p4_parse_state.parse_tcp' -> 'shadow_state (parse_tcp, 140600552825680)' |
| 26 | Creating shadow state: 'p4_parse_state.parse_udp' -> 'shadow_state (parse_udp, 140600552824912)' |
| 27 | Creating shadow state: 'p4_parse_state.default_parser' -> 'shadow_state (default_parser, 140600552825744)' |
| 28 | Creating shadow state: 'p4_parse_state.parse_pkt_out' -> 'shadow_state (parse_pkt_out, 140600552825808)' |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 29 | ># End unroll of HLIR parse graph |
| 30 | ># Begin deparser init |
| 31 | >## Create records for gress 0 |
| 32 | Skipping metadata header 'p4_header_instance.standard_metadata' |
| 33 | Skipping intrinsic header 'p4_header_instance.ig_intr_md' |
| 34 | Skipping intrinsic header 'p4_header_instance.ig_intr_md_for_tm' |
| 35 | Skipping intrinsic header 'p4_header_instance.ig_intr_md_for_mb' |
| 36 | Skipping intrinsic header 'p4_header_instance.eg_intr_md' |
| 37 | Skipping intrinsic header 'p4_header_instance.eg_intr_md_for_mb' |
| 38 | Skipping intrinsic header 'p4_header_instance.eg_intr_md_for_oport' |
| 39 | Created record for 'p4_header_instance.packet_in_hdr' |
| 40 | Created record for 'p4_header_instance.packet_out_hdr' |
| 41 | Created record for 'p4_header_instance.ethernet' |
| 42 | Created record for 'p4_header_instance.ipv4' |
| 43 | Created record for 'p4_header_instance.tcp' |
| 44 | Created record for 'p4_header_instance.udp' |
| 45 | Skipping metadata header 'p4_header_instance.ecmp_metadata' |
| 46 | >## Build record ordering for gress 0 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 47 | >## Build field ordering for record 'packet_in_hdr' |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 48 | >## Build field ordering for record 'packet_out_hdr' |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 49 | >## Build field ordering for record 'ethernet' |
| 50 | >## Build field ordering for record 'ipv4' |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 51 | >## Build field ordering for record 'udp' |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 52 | >## Build field ordering for record 'tcp' |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 53 | >## Create records for gress 1 |
| 54 | Skipping metadata header 'p4_header_instance.standard_metadata' |
| 55 | Skipping intrinsic header 'p4_header_instance.ig_intr_md' |
| 56 | Skipping intrinsic header 'p4_header_instance.ig_intr_md_for_tm' |
| 57 | Skipping intrinsic header 'p4_header_instance.ig_intr_md_for_mb' |
| 58 | Skipping intrinsic header 'p4_header_instance.eg_intr_md' |
| 59 | Skipping intrinsic header 'p4_header_instance.eg_intr_md_for_mb' |
| 60 | Skipping intrinsic header 'p4_header_instance.eg_intr_md_for_oport' |
| 61 | Created record for 'p4_header_instance.packet_in_hdr' |
| 62 | Created record for 'p4_header_instance.packet_out_hdr' |
| 63 | Created record for 'p4_header_instance.ethernet' |
| 64 | Created record for 'p4_header_instance.ipv4' |
| 65 | Created record for 'p4_header_instance.tcp' |
| 66 | Created record for 'p4_header_instance.udp' |
| 67 | Skipping metadata header 'p4_header_instance.ecmp_metadata' |
| 68 | >## Build record ordering for gress 1 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 69 | >## Build field ordering for record 'packet_in_hdr' |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 70 | >## Build field ordering for record 'packet_out_hdr' |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 71 | >## Build field ordering for record 'ethernet' |
| 72 | >## Build field ordering for record 'ipv4' |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 73 | >## Build field ordering for record 'udp' |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 74 | >## Build field ordering for record 'tcp' |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 75 | Deparse bmeta_ig_intr_md header |
| 76 | >## Create deparser bridge_ig_intr_md record |
| 77 | Add container 128 for ig_intr_md.resubmit_flag to bmeta_ig_intr_md |
| 78 | Add container 128 for ig_intr_md._pad1 to bmeta_ig_intr_md |
| 79 | Add container 128 for ig_intr_md._pad2 to bmeta_ig_intr_md |
| 80 | Add container 128 for ig_intr_md._pad3 to bmeta_ig_intr_md |
| 81 | Add container 128 for ig_intr_md.ingress_port to bmeta_ig_intr_md |
| 82 | >## Create deparser bridge record |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 83 | ># End deparser init |
| 84 | Constructing parse graph for entry point start on ingress |
| 85 | Constructing parse graph for entry point start on egress |
| 86 | Adding special Egress state to access ingress intrisic metadata |
| 87 | Egress intrinsic metadata unconditional extraction plan: ExtractionPlan { shift 24, extractions ['eg_intr_md.egress_port', 'eg_intr_md.egress_cos'] } |
| 88 | Egress intrinsic metadata conditional extraction plan: ExtractionPlan { shift 0, extractions [] } |
| 89 | Stretch extraction of ingress_port to state <Ingress intrinsic metadata> offset 7 |
| 90 | Stretch extraction of ig_intr_md.ingress_port to state <_parse_bridged_ingress_intrinsic_metadata> offset 7 |
| 91 | ># Begin scraping deparser POV allocation from raw PHV allocation |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 92 | PHV layout: [0, 0, 0, 0, 68, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 93 | >## Scraping individual POV records |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 94 | POV 33 -> packet_out_hdr |
| 95 | POV 34 -> ethernet |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 96 | POV 35 -> ipv4 |
| 97 | POV 36 -> tcp |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 98 | POV 37 -> udp |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 99 | POV 38 -> pov_bmeta |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 100 | POV 32 -> packet_in_hdr |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 101 | >## Setting up array bits |
| 102 | ># End scraping deparser POV allocation from raw PHV allocation |
| 103 | ># Begin parser POV rewrite |
| 104 | >## Filling in POV init state |
| 105 | >## Rewriting parser POV extractions |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 106 | POV for metadata_bridge -> PHV 68 |= 0x40 |
| 107 | POV for packet_in_hdr -> PHV 68 |= 0x1 |
| 108 | POV for ethernet -> PHV 68 |= 0x4 |
| 109 | POV for ipv4 -> PHV 68 |= 0x8 |
| 110 | POV for tcp -> PHV 68 |= 0x10 |
| 111 | POV for udp -> PHV 68 |= 0x20 |
| 112 | POV for packet_out_hdr -> PHV 68 |= 0x2 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 113 | POV for ig_intr_md -> dropped (no deparser record) |
| 114 | POV for _bridged_intr_md_ -> PHV 0 |= 0x10000 |
| 115 | >## Sampling not detected, deparsing at least 1 POV byte |
| 116 | >## Adding POV containers to metadata bridge: [0] |
| 117 | >## Set POV skip state's shift amount to 32 |
| 118 | ># Begin scraping deparser POV allocation from raw PHV allocation |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 119 | PHV layout: [81, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 120 | >## Scraping individual POV records |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 121 | POV 1 -> packet_out_hdr |
| 122 | POV 2 -> ethernet |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 123 | POV 3 -> ipv4 |
| 124 | POV 4 -> tcp |
| 125 | POV 5 -> udp |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 126 | POV 0 -> packet_in_hdr |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 127 | >## Setting up array bits |
| 128 | ># End scraping deparser POV allocation from raw PHV allocation |
| 129 | ># Begin parser POV rewrite |
| 130 | >## Filling in POV init state |
| 131 | >## Rewriting parser POV extractions |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 132 | POV for packet_in_hdr -> PHV 81 |= 0x1 |
| 133 | POV for ethernet -> PHV 81 |= 0x4 |
| 134 | POV for ipv4 -> PHV 81 |= 0x8 |
| 135 | POV for tcp -> PHV 81 |= 0x10 |
| 136 | POV for udp -> PHV 81 |= 0x20 |
| 137 | POV for packet_out_hdr -> PHV 81 |= 0x2 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 138 | Linear Chain parse_pkt_in -> parse_ethernet |
| 139 | Try merge parse_pkt_in <- parse_ethernet |
| 140 | Multiple paths to state S2 : parse_ethernet <- 3 |
| 141 | Linear Chain <POV initialization> -> start |
| 142 | Try merge <POV initialization> <- <Ingress intrinsic metadata> |
| 143 | merge output at offset 0 |
| 144 | Merge s2 constant extraction v=1 phv=0 |
| 145 | merge_offset = 16, complete_merge = True |
| 146 | Before Merge ------ |
| 147 | S1: State : <POV initialization> |
| 148 | shift: 0B |
| 149 | match_reservations: [] |
| 150 | outputs[addr, width]: () |
| 151 | match_extractions: [] |
| 152 | next state <Ingress intrinsic metadata> val 0 mask [False] |
| 153 | parent state <Shim start state> |
| 154 | |
| 155 | |
| 156 | S2: State : <Ingress intrinsic metadata> |
| 157 | shift: 8B |
| 158 | match_reservations: [] |
| 159 | outputs[addr, width]: ([128, 16], [0, 32]) |
| 160 | branch on = None, offset = 0b, dst = <Ingress intrinsic metadata> |
| 161 | branch promise on = ingress_port, offset = 7b, dst = default_parser |
| 162 | match_extractions: [] |
| 163 | next state <Phase 0> val 0 mask [True] |
| 164 | parent state <POV initialization> |
| 165 | |
| 166 | |
| 167 | Full merge done <POV initialization> <- <Ingress intrinsic metadata> |
| 168 | Try merge <POV initialization>_<Ingress intrinsic metadata> <- <Phase 0> |
| 169 | merge_offset = 0, complete_merge = True |
| 170 | Before Merge ------ |
| 171 | S1: State : <POV initialization>_<Ingress intrinsic metadata> |
| 172 | shift: 8B |
| 173 | match_reservations: [] |
| 174 | outputs[addr, width]: ([128, 16], [0, 32]) |
| 175 | branch on = None, offset = 0b, dst = <POV initialization>_<Ingress intrinsic metadata> |
| 176 | branch promise on = ingress_port, offset = 7b, dst = default_parser |
| 177 | match_extractions: [] |
| 178 | next state <Phase 0> val 0 mask [True] |
| 179 | parent state <Shim start state> |
| 180 | |
| 181 | |
| 182 | S2: State : <Phase 0> |
| 183 | shift: 8B |
| 184 | match_reservations: [] |
| 185 | outputs[addr, width]: () |
| 186 | branch on = None, offset = 0b, dst = <Phase 0> |
| 187 | match_extractions: [] |
| 188 | next state start val 0 mask [False] |
| 189 | parent state <POV initialization>_<Ingress intrinsic metadata> |
| 190 | |
| 191 | |
| 192 | Full merge done <POV initialization>_<Ingress intrinsic metadata> <- <Phase 0> |
| 193 | Try merge <POV initialization>_<Ingress intrinsic metadata>_<Phase 0> <- start |
| 194 | Multiple paths to state S2 : start <- 2 |
| 195 | Remove state <Ingress intrinsic metadata> |
| 196 | Remove state <Phase 0> |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 197 | assign ids to 10 states, dir = 0 |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 198 | ------ |
| 199 | State : <Shim start state> |
| 200 | shift: 0B |
| 201 | match_reservations: [] |
| 202 | outputs[addr, width]: () |
| 203 | match_extractions: [] |
| 204 | next state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0> val 0 mask [False] |
| 205 | |
| 206 | ------ |
| 207 | State : parse_pkt_in |
| 208 | shift: 2B |
| 209 | match_reservations: [] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 210 | outputs[addr, width]: ([68, 8], [129, 16]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 211 | match_extractions: [] |
| 212 | next state parse_ethernet val 0 mask [False] |
| 213 | parent state start |
| 214 | |
| 215 | ------ |
| 216 | State : parse_ethernet |
| 217 | shift: 14B |
| 218 | match_reservations: [] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 219 | outputs[addr, width]: ([68, 8], [66, 8], [4, 32], [133, 16], [67, 8], [5, 32], [134, 16]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 220 | branch on = etherType, offset = 96b, dst = parse_ethernet |
| 221 | match_extractions: [match_window(hw_id=0, width=16)] |
| 222 | match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] |
| 223 | next state parse_ipv4 val 2048 mask [True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True] |
| 224 | parent state parse_pkt_in |
| 225 | parent state parse_pkt_out |
| 226 | parent state default_parser |
| 227 | |
| 228 | ------ |
| 229 | State : parse_ipv4 |
| 230 | shift: 20B |
| 231 | match_reservations: [] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 232 | outputs[addr, width]: ([68, 8], [288, 8], [320, 16], [321, 16], [256, 32], [1, 32], [64, 8], [131, 16], [2, 32]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 233 | branch on = fragOffset, offset = 51b, dst = parse_ipv4 |
| 234 | branch on = protocol, offset = 72b, dst = parse_ipv4 |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 235 | match_extractions: [match_window(hw_id=0, width=16), match_window(hw_id=2, width=8)] |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 236 | match key = [8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, None, None, None] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 237 | match key = [0, 1, 2, 3, 4, 5, 6, 7] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 238 | next state parse_tcp val 6 mask [True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True] |
| 239 | next state parse_udp val 17 mask [True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True] |
| 240 | parent state parse_ethernet |
| 241 | |
| 242 | ------ |
| 243 | State : parse_tcp |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 244 | shift: 20B |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 245 | match_reservations: [] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 246 | outputs[addr, width]: ([68, 8], [65, 8], [132, 16], [3, 32], [289, 8], [322, 16], [323, 16], [257, 32], [258, 32]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 247 | match_extractions: [] |
| 248 | parent state parse_ipv4 |
| 249 | |
| 250 | ------ |
| 251 | State : parse_udp |
| 252 | shift: 8B |
| 253 | match_reservations: [] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 254 | outputs[addr, width]: ([68, 8], [289, 8], [65, 8], [322, 16], [257, 32]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 255 | match_extractions: [] |
| 256 | parent state parse_ipv4 |
| 257 | |
| 258 | ------ |
| 259 | State : default_parser |
| 260 | shift: 0B |
| 261 | match_reservations: [match_window(hw_id=0, width=16)] |
| 262 | outputs[addr, width]: () |
| 263 | branch on = ingress_port, offset = 7b, dst = default_parser |
| 264 | match_extractions: [match_window(hw_id=0, width=16)] |
| 265 | match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, None, None, None, None, None, None, None] |
| 266 | next state parse_pkt_out val 320 mask [True, True, True, True, True, True, True, True, True] |
| 267 | next state parse_ethernet val 0 mask [False] |
| 268 | parent state start |
| 269 | |
| 270 | ------ |
| 271 | State : parse_pkt_out |
| 272 | shift: 2B |
| 273 | match_reservations: [] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 274 | outputs[addr, width]: ([68, 8], [129, 16]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 275 | match_extractions: [] |
| 276 | next state parse_ethernet val 0 mask [False] |
| 277 | parent state default_parser |
| 278 | |
| 279 | ------ |
| 280 | State : <POV initialization>_<Ingress intrinsic metadata>_<Phase 0> |
| 281 | shift: 16B |
| 282 | match_reservations: [] |
| 283 | outputs[addr, width]: ([128, 16], [0, 32]) |
| 284 | branch on = None, offset = 0b, dst = <POV initialization>_<Ingress intrinsic metadata>_<Phase 0> |
| 285 | branch on = None, offset = 64b, dst = <POV initialization>_<Ingress intrinsic metadata>_<Phase 0> |
| 286 | branch promise on = ingress_port, offset = 7b, dst = default_parser |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 287 | match_extractions: [match_window(hw_id=0, width=16), match_window(hw_id=2, width=8)] |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 288 | match key = [None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, 8] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 289 | match key = [0, 1, 2, 3, 4, 5, 6, 7] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 290 | next state start val 0 mask [False] |
| 291 | parent state <Shim start state> |
| 292 | |
| 293 | ------ |
| 294 | State : start |
| 295 | shift: 0B |
| 296 | match_reservations: [match_window(hw_id=0, width=16)] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 297 | outputs[addr, width]: ([68, 8],) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 298 | branch on = None, offset = 96b, dst = start |
| 299 | match_extractions: [match_window(hw_id=2, width=8)] |
| 300 | match key = [0, 1, 2, 3, 4, 5, 6, 7] |
| 301 | next state parse_pkt_in val 0 mask [True, True, True, True, True, True, True, True] |
| 302 | next state default_parser val 0 mask [False] |
| 303 | parent state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0> |
| 304 | |
| 305 | Linear Chain parse_pkt_in -> parse_ethernet |
| 306 | Try merge parse_pkt_in <- parse_ethernet |
| 307 | Multiple paths to state S2 : parse_ethernet <- 3 |
| 308 | Linear Chain <POV initialization> -> start |
| 309 | Try merge <POV initialization> <- <Egress intrinsic metadata> |
| 310 | merge output at offset 0 |
| 311 | merge output at offset 16 |
| 312 | merge_offset = 24, complete_merge = True |
| 313 | Before Merge ------ |
| 314 | S1: State : <POV initialization> |
| 315 | shift: 0B |
| 316 | match_reservations: [] |
| 317 | outputs[addr, width]: () |
| 318 | match_extractions: [] |
| 319 | next state <Egress intrinsic metadata> val 0 mask [False] |
| 320 | parent state <Shim start state> |
| 321 | |
| 322 | |
| 323 | S2: State : <Egress intrinsic metadata> |
| 324 | shift: 3B |
| 325 | match_reservations: [] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 326 | outputs[addr, width]: ([144, 16], [80, 8]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 327 | branch on = None, offset = 24b, dst = <Egress intrinsic metadata> |
| 328 | match_extractions: [] |
| 329 | next state <POV skip> val 0 mask [False] |
| 330 | parent state <POV initialization> |
| 331 | |
| 332 | |
| 333 | Full merge done <POV initialization> <- <Egress intrinsic metadata> |
| 334 | Try merge <POV initialization>_<Egress intrinsic metadata> <- <POV skip> |
| 335 | merge_offset = 0, complete_merge = True |
| 336 | Before Merge ------ |
| 337 | S1: State : <POV initialization>_<Egress intrinsic metadata> |
| 338 | shift: 3B |
| 339 | match_reservations: [] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 340 | outputs[addr, width]: ([144, 16], [80, 8]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 341 | branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata> |
| 342 | match_extractions: [] |
| 343 | next state <POV skip> val 0 mask [False] |
| 344 | parent state <Shim start state> |
| 345 | |
| 346 | |
| 347 | S2: State : <POV skip> |
| 348 | shift: 4B |
| 349 | match_reservations: [] |
| 350 | outputs[addr, width]: () |
| 351 | match_extractions: [] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 352 | next state <_parse_bridged_ingress_intrinsic_metadata> val 0 mask [False] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 353 | parent state <POV initialization>_<Egress intrinsic metadata> |
| 354 | |
| 355 | |
| 356 | Full merge done <POV initialization>_<Egress intrinsic metadata> <- <POV skip> |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 357 | Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <_parse_bridged_ingress_intrinsic_metadata> |
| 358 | merge_offset = 0, complete_merge = True |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 359 | Before Merge ------ |
| 360 | S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip> |
| 361 | shift: 7B |
| 362 | match_reservations: [] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 363 | outputs[addr, width]: ([144, 16], [80, 8]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 364 | branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip> |
| 365 | match_extractions: [] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 366 | next state <_parse_bridged_ingress_intrinsic_metadata> val 0 mask [False] |
| 367 | parent state <Shim start state> |
| 368 | |
| 369 | |
| 370 | S2: State : <_parse_bridged_ingress_intrinsic_metadata> |
| 371 | shift: 2B |
| 372 | match_reservations: [] |
| 373 | outputs[addr, width]: () |
| 374 | branch promise on = ingress_port, offset = 7b, dst = default_parser |
| 375 | match_extractions: [] |
| 376 | next state start val 0 mask [False] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 377 | parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip> |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 378 | |
| 379 | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 380 | Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <_parse_bridged_ingress_intrinsic_metadata> |
| 381 | Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata> <- start |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 382 | merge_offset = 0, complete_merge = True |
| 383 | Before Merge ------ |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 384 | S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata> |
| 385 | shift: 9B |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 386 | match_reservations: [] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 387 | outputs[addr, width]: ([144, 16], [80, 8]) |
| 388 | branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata> |
| 389 | branch promise on = ingress_port, offset = 63b, dst = default_parser |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 390 | match_extractions: [] |
| 391 | next state start val 0 mask [False] |
| 392 | parent state <Shim start state> |
| 393 | |
| 394 | |
| 395 | S2: State : start |
| 396 | shift: 0B |
| 397 | match_reservations: [] |
| 398 | outputs[addr, width]: () |
| 399 | branch on = None, offset = 96b, dst = start |
| 400 | match_extractions: [] |
| 401 | next state parse_pkt_in val 0 mask [True, True, True, True, True, True, True, True] |
| 402 | next state default_parser val 0 mask [False] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 403 | parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata> |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 404 | |
| 405 | |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 406 | Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata> <- start |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 407 | Remove state <Egress intrinsic metadata> |
| 408 | Remove state <POV skip> |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 409 | Remove state <_parse_bridged_ingress_intrinsic_metadata> |
| 410 | Remove state start |
| 411 | assign ids to 9 states, dir = 1 |
| 412 | ------ |
| 413 | State : <Shim start state> |
| 414 | shift: 0B |
| 415 | match_reservations: [] |
| 416 | outputs[addr, width]: () |
| 417 | match_extractions: [] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 418 | next state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start val 0 mask [False] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 419 | |
| 420 | ------ |
| 421 | State : parse_ethernet |
| 422 | shift: 14B |
| 423 | match_reservations: [] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 424 | outputs[addr, width]: ([81, 8], [296, 8], [266, 32], [332, 16], [297, 8], [267, 32], [333, 16]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 425 | branch on = etherType, offset = 96b, dst = parse_ethernet |
| 426 | match_extractions: [match_window(hw_id=0, width=16)] |
| 427 | match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] |
| 428 | next state parse_ipv4 val 2048 mask [True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True] |
| 429 | parent state parse_pkt_in |
| 430 | parent state parse_pkt_out |
| 431 | parent state default_parser |
| 432 | |
| 433 | ------ |
| 434 | State : parse_ipv4 |
| 435 | shift: 20B |
| 436 | match_reservations: [] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 437 | outputs[addr, width]: ([81, 8], [292, 8], [293, 8], [326, 16], [327, 16], [328, 16], [260, 32], [261, 32], [262, 32]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 438 | branch on = fragOffset, offset = 51b, dst = parse_ipv4 |
| 439 | branch on = protocol, offset = 72b, dst = parse_ipv4 |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 440 | match_extractions: [match_window(hw_id=0, width=16), match_window(hw_id=2, width=8)] |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 441 | match key = [8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, None, None, None] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 442 | match key = [0, 1, 2, 3, 4, 5, 6, 7] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 443 | next state parse_tcp val 6 mask [True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True] |
| 444 | next state parse_udp val 17 mask [True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True] |
| 445 | parent state parse_ethernet |
| 446 | |
| 447 | ------ |
| 448 | State : parse_tcp |
| 449 | shift: 20B |
| 450 | match_reservations: [] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 451 | outputs[addr, width]: ([81, 8], [294, 8], [295, 8], [329, 16], [330, 16], [331, 16], [263, 32], [264, 32], [265, 32]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 452 | match_extractions: [] |
| 453 | parent state parse_ipv4 |
| 454 | |
| 455 | ------ |
| 456 | State : parse_udp |
| 457 | shift: 8B |
| 458 | match_reservations: [] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 459 | outputs[addr, width]: ([81, 8], [294, 8], [295, 8], [329, 16], [263, 32]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 460 | match_extractions: [] |
| 461 | parent state parse_ipv4 |
| 462 | |
| 463 | ------ |
| 464 | State : default_parser |
| 465 | shift: 0B |
| 466 | match_reservations: [match_window(hw_id=0, width=16)] |
| 467 | outputs[addr, width]: () |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 468 | branch on = ingress_port, offset = 63b, dst = default_parser |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 469 | match_extractions: [match_window(hw_id=0, width=16)] |
| 470 | match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, None, None, None, None, None, None, None] |
| 471 | next state parse_pkt_out val 320 mask [True, True, True, True, True, True, True, True, True] |
| 472 | next state parse_ethernet val 0 mask [False] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 473 | parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 474 | |
| 475 | ------ |
| 476 | State : parse_pkt_out |
| 477 | shift: 2B |
| 478 | match_reservations: [] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 479 | outputs[addr, width]: ([81, 8], [334, 16]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 480 | match_extractions: [] |
| 481 | next state parse_ethernet val 0 mask [False] |
| 482 | parent state default_parser |
| 483 | |
| 484 | ------ |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 485 | State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start |
| 486 | shift: 9B |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 487 | match_reservations: [] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 488 | outputs[addr, width]: ([144, 16], [80, 8]) |
| 489 | branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start |
| 490 | branch on = None, offset = 168b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start |
| 491 | branch promise on = ingress_port, offset = 63b, dst = default_parser |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 492 | match_extractions: [match_window(hw_id=0, width=16), match_window(hw_id=2, width=8), match_window(hw_id=3, width=8)] |
Carmelo Cascone | 8aa0548 | 2017-09-12 13:21:59 +0200 | [diff] [blame] | 493 | match key = [None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 494 | match key = [8, 9, 10, 11, 12, 13, 14, 15] |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 495 | match key = [0, 1, 2, 3, 4, 5, 6, 7] |
| 496 | next state parse_pkt_in val 0 mask [True, True, True, True, True, True, True, True] |
| 497 | next state default_parser val 0 mask [False] |
| 498 | parent state <Shim start state> |
| 499 | |
| 500 | ------ |
| 501 | State : parse_pkt_in |
| 502 | shift: 2B |
| 503 | match_reservations: [] |
Carmelo Cascone | 6230a61 | 2017-09-13 03:25:41 +0200 | [diff] [blame] | 504 | outputs[addr, width]: ([81, 8], [334, 16]) |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 505 | match_extractions: [] |
| 506 | next state parse_ethernet val 0 mask [False] |
Brian O'Connor | a6862e0 | 2017-09-08 01:17:39 -0700 | [diff] [blame] | 507 | parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start |
Carmelo Cascone | f1d0a42 | 2017-09-07 17:21:46 +0200 | [diff] [blame] | 508 | |