Fixing packet_io and regenerating default.p4 for tofino
Change-Id: I5c2c6565f71a13b375a8ec8da864e9157b8e56ed
diff --git a/tools/test/p4src/p4-14/include/actions.p4 b/tools/test/p4src/p4-14/include/actions.p4
index 1e6d425..6d26f98 100644
--- a/tools/test/p4src/p4-14/include/actions.p4
+++ b/tools/test/p4src/p4-14/include/actions.p4
@@ -10,7 +10,7 @@
#ifdef __TOFINO_BUILD__
drop();
#else
- modify_field(standard_metadata.egress_spec, DROP_PORT);
+ modify_field(EGR_PORT_FIELD, DROP_PORT);
#endif
}
diff --git a/tools/test/p4src/p4-14/include/defines.p4 b/tools/test/p4src/p4-14/include/defines.p4
index e054493..dda4520 100644
--- a/tools/test/p4src/p4-14/include/defines.p4
+++ b/tools/test/p4src/p4-14/include/defines.p4
@@ -1,5 +1,4 @@
// Logic ports as defined in the simple_switch target
-#define MAX_PORTS 511
#define DROP_PORT 511
#define ETHERTYPE_IPV4 0x0800
@@ -17,8 +16,9 @@
#ifdef __TOFINO_BUILD__
#define EGR_PORT_FIELD ig_intr_md_for_tm.ucast_egress_port
#define IGR_PORT_FIELD ig_intr_md.ingress_port
-
+#define MAX_PORTS 510
#else
#define EGR_PORT_FIELD standard_metadata.egress_spec
#define IGR_PORT_FIELD standard_metadata.ingress_port
+#define MAX_PORTS 254
#endif
diff --git a/tools/test/p4src/p4-14/p4c-out/default.json b/tools/test/p4src/p4-14/p4c-out/default.json
index 4e7c999..8b6c72b 100644
--- a/tools/test/p4src/p4-14/p4c-out/default.json
+++ b/tools/test/p4src/p4-14/p4c-out/default.json
@@ -9,8 +9,8 @@
"name" : "scalars_0",
"id" : 0,
"fields" : [
- ["tmp_0", 112, false],
- ["tmp", 16, false],
+ ["tmp_0", 104, false],
+ ["tmp", 8, false],
["tmp_1", 32, false],
["tmp_2", 32, false]
]
@@ -390,7 +390,7 @@
},
{
"type" : "lookahead",
- "value" : [0, 112]
+ "value" : [0, 104]
}
],
"op" : "set"
@@ -413,7 +413,7 @@
},
"right" : {
"type" : "hexstr",
- "value" : "0xffff"
+ "value" : "0xff"
}
}
}
@@ -424,7 +424,7 @@
],
"transitions" : [
{
- "value" : "0x0000",
+ "value" : "0x00",
"mask" : null,
"next_state" : "parse_pkt_in"
},
@@ -462,13 +462,13 @@
{
"name" : "egress_port_counter",
"id" : 1,
- "size" : 511,
+ "size" : 254,
"is_direct" : false
},
{
"name" : "ingress_port_counter",
"id" : 2,
- "size" : 511,
+ "size" : 254,
"is_direct" : false
}
],
@@ -965,7 +965,7 @@
},
"right" : {
"type" : "hexstr",
- "value" : "0x01ff"
+ "value" : "0x00fe"
}
}
},
diff --git a/tools/test/p4src/p4-14/p4c-out/default.p4info b/tools/test/p4src/p4-14/p4c-out/default.p4info
index 89acacf..35d6c00 100644
--- a/tools/test/p4src/p4-14/p4c-out/default.p4info
+++ b/tools/test/p4src/p4-14/p4c-out/default.p4info
@@ -142,7 +142,7 @@
spec {
unit: PACKETS
}
- size: 511
+ size: 254
}
counters {
preamble {
@@ -154,7 +154,7 @@
spec {
unit: PACKETS
}
- size: 511
+ size: 254
}
direct_counters {
preamble {
diff --git a/tools/test/p4src/p4-14/p4c-out/ecmp.json b/tools/test/p4src/p4-14/p4c-out/ecmp.json
index 500bf47..fc98b9a 100644
--- a/tools/test/p4src/p4-14/p4c-out/ecmp.json
+++ b/tools/test/p4src/p4-14/p4c-out/ecmp.json
@@ -9,8 +9,8 @@
"name" : "scalars_0",
"id" : 0,
"fields" : [
- ["tmp_0", 112, false],
- ["tmp", 16, false],
+ ["tmp_0", 104, false],
+ ["tmp", 8, false],
["tmp_1", 32, false],
["tmp_2", 32, false]
]
@@ -405,7 +405,7 @@
},
{
"type" : "lookahead",
- "value" : [0, 112]
+ "value" : [0, 104]
}
],
"op" : "set"
@@ -428,7 +428,7 @@
},
"right" : {
"type" : "hexstr",
- "value" : "0xffff"
+ "value" : "0xff"
}
}
}
@@ -439,7 +439,7 @@
],
"transitions" : [
{
- "value" : "0x0000",
+ "value" : "0x00",
"mask" : null,
"next_state" : "parse_pkt_in"
},
@@ -483,13 +483,13 @@
{
"name" : "egress_port_counter",
"id" : 2,
- "size" : 511,
+ "size" : 254,
"is_direct" : false
},
{
"name" : "ingress_port_counter",
"id" : 3,
- "size" : 511,
+ "size" : 254,
"is_direct" : false
}
],
@@ -1147,7 +1147,7 @@
},
"right" : {
"type" : "hexstr",
- "value" : "0x01ff"
+ "value" : "0x00fe"
}
}
},
diff --git a/tools/test/p4src/p4-14/p4c-out/ecmp.p4info b/tools/test/p4src/p4-14/p4c-out/ecmp.p4info
index f6753d0..6a46ab9 100644
--- a/tools/test/p4src/p4-14/p4c-out/ecmp.p4info
+++ b/tools/test/p4src/p4-14/p4c-out/ecmp.p4info
@@ -185,7 +185,7 @@
spec {
unit: PACKETS
}
- size: 511
+ size: 254
}
counters {
preamble {
@@ -197,7 +197,7 @@
spec {
unit: PACKETS
}
- size: 511
+ size: 254
}
direct_counters {
preamble {
@@ -245,4 +245,4 @@
name: "egress_port"
bitwidth: 9
}
-}
+}
\ No newline at end of file
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/context.json b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/context.json
index c7db2b6..becdf93 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/context.json
@@ -1,5 +1,5 @@
{
- "build_date": "Thu Sep 7 13:56:24 2017",
+ "build_date": "Fri Sep 8 08:24:01 2017",
"phv_allocation": [
{
"ingress": [
@@ -26,7 +26,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -43,7 +43,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -60,15 +60,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -77,15 +77,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -94,692 +94,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -821,20 +135,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -848,11 +191,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -865,28 +220,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -898,7 +299,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -923,11 +324,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -944,7 +910,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -961,7 +927,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -973,7 +939,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -985,7 +951,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1002,7 +968,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -1014,7 +980,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -1026,7 +992,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -1038,7 +1004,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -1050,7 +1016,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1079,7 +1045,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1096,7 +1062,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -1113,7 +1079,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -1130,7 +1096,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -1142,7 +1108,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -1176,7 +1142,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1188,7 +1154,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1205,7 +1171,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -1217,7 +1183,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -1234,7 +1200,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -1251,7 +1217,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -1268,7 +1234,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1285,7 +1251,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1331,7 +1297,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1348,7 +1314,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -1360,7 +1326,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1377,7 +1343,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1394,7 +1360,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -1406,7 +1372,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -1423,7 +1389,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1449,6 +1415,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -1480,7 +1458,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -1497,7 +1475,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -1514,15 +1492,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -1531,15 +1509,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -1548,692 +1526,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -2275,20 +1567,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -2302,11 +1623,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -2319,28 +1652,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -2352,7 +1731,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -2377,11 +1756,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -2398,7 +2342,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -2415,7 +2359,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -2427,7 +2371,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -2439,7 +2383,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2456,7 +2400,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -2468,7 +2412,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -2480,7 +2424,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -2492,7 +2436,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -2504,7 +2448,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2533,7 +2477,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2550,7 +2494,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -2567,7 +2511,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -2584,7 +2528,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -2596,7 +2540,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -2630,7 +2574,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2642,7 +2586,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2659,7 +2603,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -2671,7 +2615,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -2688,7 +2632,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -2705,7 +2649,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -2722,7 +2666,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2739,7 +2683,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2785,7 +2729,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2802,7 +2746,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -2814,7 +2758,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2831,7 +2775,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2848,7 +2792,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -2860,7 +2804,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -2877,7 +2821,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2903,6 +2847,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -2934,7 +2890,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -2951,7 +2907,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -2968,15 +2924,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -2985,15 +2941,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -3002,692 +2958,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -3729,20 +2999,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -3756,11 +3055,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -3773,28 +3084,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -3806,7 +3163,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -3831,11 +3188,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -3852,7 +3774,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -3869,7 +3791,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -3881,7 +3803,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -3893,7 +3815,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3910,7 +3832,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -3922,7 +3844,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -3934,7 +3856,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -3946,7 +3868,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -3958,7 +3880,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3987,7 +3909,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4004,7 +3926,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -4021,7 +3943,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -4038,7 +3960,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -4050,7 +3972,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -4084,7 +4006,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4096,7 +4018,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4113,7 +4035,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -4125,7 +4047,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -4142,7 +4064,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -4159,7 +4081,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -4176,7 +4098,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4193,7 +4115,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4239,7 +4161,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4256,7 +4178,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -4268,7 +4190,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4285,7 +4207,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4302,7 +4224,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -4314,7 +4236,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -4331,7 +4253,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4357,6 +4279,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -4388,7 +4322,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -4405,7 +4339,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -4422,15 +4356,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -4439,15 +4373,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -4456,692 +4390,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -5183,20 +4431,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -5210,11 +4487,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -5227,28 +4516,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -5260,7 +4595,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -5285,11 +4620,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -5306,7 +5206,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -5323,7 +5223,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -5335,7 +5235,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -5347,7 +5247,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5364,7 +5264,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -5376,7 +5276,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -5388,7 +5288,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -5400,7 +5300,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -5412,7 +5312,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5441,7 +5341,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5458,7 +5358,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -5475,7 +5375,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -5492,7 +5392,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -5504,7 +5404,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -5538,7 +5438,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5550,7 +5450,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5567,7 +5467,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -5579,7 +5479,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -5596,7 +5496,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -5613,7 +5513,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -5630,7 +5530,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5647,7 +5547,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5693,7 +5593,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5710,7 +5610,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -5722,7 +5622,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5739,7 +5639,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5756,7 +5656,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -5768,7 +5668,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -5785,7 +5685,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5811,6 +5711,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -5842,7 +5754,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -5859,7 +5771,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -5876,15 +5788,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -5893,15 +5805,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -5910,692 +5822,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -6637,20 +5863,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -6664,11 +5919,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -6681,28 +5948,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -6714,7 +6027,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -6739,11 +6052,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -6760,7 +6638,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -6777,7 +6655,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -6789,7 +6667,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -6801,7 +6679,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6818,7 +6696,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -6830,7 +6708,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -6842,7 +6720,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -6854,7 +6732,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -6866,7 +6744,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6895,7 +6773,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6912,7 +6790,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -6929,7 +6807,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -6946,7 +6824,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -6958,7 +6836,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -6992,7 +6870,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7004,7 +6882,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7021,7 +6899,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -7033,7 +6911,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -7050,7 +6928,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -7067,7 +6945,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -7084,7 +6962,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7101,7 +6979,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7147,7 +7025,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7164,7 +7042,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -7176,7 +7054,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7193,7 +7071,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7210,7 +7088,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -7222,7 +7100,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -7239,7 +7117,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7265,6 +7143,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -7296,7 +7186,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -7313,7 +7203,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -7330,15 +7220,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -7347,15 +7237,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -7364,692 +7254,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -8091,20 +7295,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -8118,11 +7351,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -8135,28 +7380,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -8168,7 +7459,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -8193,11 +7484,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -8214,7 +8070,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -8231,7 +8087,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -8243,7 +8099,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -8255,7 +8111,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8272,7 +8128,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -8284,7 +8140,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -8296,7 +8152,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -8308,7 +8164,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -8320,7 +8176,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8349,7 +8205,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8366,7 +8222,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -8383,7 +8239,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -8400,7 +8256,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -8412,7 +8268,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -8446,7 +8302,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8458,7 +8314,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8475,7 +8331,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -8487,7 +8343,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -8504,7 +8360,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -8521,7 +8377,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -8538,7 +8394,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8555,7 +8411,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8601,7 +8457,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8618,7 +8474,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -8630,7 +8486,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8647,7 +8503,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8664,7 +8520,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -8676,7 +8532,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -8693,7 +8549,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8719,6 +8575,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -8750,7 +8618,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -8767,7 +8635,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -8784,15 +8652,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -8801,15 +8669,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -8818,692 +8686,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -9545,20 +8727,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -9572,11 +8783,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -9589,28 +8812,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -9622,7 +8891,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -9647,11 +8916,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -9668,7 +9502,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -9685,7 +9519,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -9697,7 +9531,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -9709,7 +9543,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9726,7 +9560,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -9738,7 +9572,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -9750,7 +9584,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -9762,7 +9596,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -9774,7 +9608,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9803,7 +9637,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9820,7 +9654,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -9837,7 +9671,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -9854,7 +9688,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -9866,7 +9700,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -9900,7 +9734,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9912,7 +9746,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9929,7 +9763,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -9941,7 +9775,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -9958,7 +9792,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -9975,7 +9809,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -9992,7 +9826,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10009,7 +9843,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10055,7 +9889,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10072,7 +9906,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -10084,7 +9918,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10101,7 +9935,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10118,7 +9952,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -10130,7 +9964,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -10147,7 +9981,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10173,6 +10007,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -10204,7 +10050,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -10221,7 +10067,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -10238,15 +10084,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -10255,15 +10101,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -10272,692 +10118,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -10999,20 +10159,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -11026,11 +10215,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -11043,28 +10244,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -11076,7 +10323,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -11101,11 +10348,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -11122,7 +10934,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -11139,7 +10951,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -11151,7 +10963,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -11163,7 +10975,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11180,7 +10992,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -11192,7 +11004,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -11204,7 +11016,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -11216,7 +11028,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -11228,7 +11040,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11257,7 +11069,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11274,7 +11086,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -11291,7 +11103,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -11308,7 +11120,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -11320,7 +11132,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -11354,7 +11166,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11366,7 +11178,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11383,7 +11195,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -11395,7 +11207,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -11412,7 +11224,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -11429,7 +11241,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -11446,7 +11258,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11463,7 +11275,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11509,7 +11321,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11526,7 +11338,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -11538,7 +11350,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11555,7 +11367,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11572,7 +11384,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -11584,7 +11396,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -11601,7 +11413,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11627,6 +11439,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -11658,7 +11482,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -11675,7 +11499,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -11692,15 +11516,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -11709,15 +11533,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -11726,692 +11550,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
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- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
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- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
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- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
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- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
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- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
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- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
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- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
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- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -12453,20 +11591,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -12480,11 +11647,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -12497,28 +11676,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -12530,7 +11755,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -12555,11 +11780,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12576,7 +12366,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12593,7 +12383,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12605,7 +12395,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -12617,7 +12407,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12634,7 +12424,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -12646,7 +12436,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -12658,7 +12448,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -12670,7 +12460,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -12682,7 +12472,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12711,7 +12501,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12728,7 +12518,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -12745,7 +12535,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12762,7 +12552,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -12774,7 +12564,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -12808,7 +12598,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12820,7 +12610,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12837,7 +12627,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -12849,7 +12639,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -12866,7 +12656,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -12883,7 +12673,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -12900,7 +12690,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12917,7 +12707,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12963,7 +12753,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12980,7 +12770,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12992,7 +12782,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13009,7 +12799,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13026,7 +12816,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -13038,7 +12828,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -13055,7 +12845,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13081,6 +12871,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -13112,7 +12914,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -13129,7 +12931,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -13146,15 +12948,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -13163,15 +12965,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -13180,692 +12982,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -13907,20 +13023,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -13934,11 +13079,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -13951,28 +13108,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -13984,7 +13187,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -14009,11 +13212,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -14030,7 +13798,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -14047,7 +13815,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -14059,7 +13827,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -14071,7 +13839,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14088,7 +13856,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -14100,7 +13868,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -14112,7 +13880,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -14124,7 +13892,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -14136,7 +13904,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14165,7 +13933,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14182,7 +13950,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -14199,7 +13967,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -14216,7 +13984,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -14228,7 +13996,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -14262,7 +14030,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14274,7 +14042,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14291,7 +14059,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -14303,7 +14071,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -14320,7 +14088,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -14337,7 +14105,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -14354,7 +14122,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14371,7 +14139,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14417,7 +14185,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14434,7 +14202,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -14446,7 +14214,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14463,7 +14231,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14480,7 +14248,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -14492,7 +14260,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -14509,7 +14277,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14535,6 +14303,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -14566,7 +14346,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -14583,7 +14363,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -14600,15 +14380,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -14617,15 +14397,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -14634,692 +14414,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
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- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
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- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
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- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
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- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
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- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
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- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -15361,20 +14455,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -15388,11 +14511,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -15405,28 +14540,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -15438,7 +14619,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -15463,11 +14644,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15484,7 +15230,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15501,7 +15247,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15513,7 +15259,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -15525,7 +15271,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15542,7 +15288,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -15554,7 +15300,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -15566,7 +15312,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -15578,7 +15324,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -15590,7 +15336,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15619,7 +15365,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15636,7 +15382,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -15653,7 +15399,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15670,7 +15416,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -15682,7 +15428,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -15716,7 +15462,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15728,7 +15474,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15745,7 +15491,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -15757,7 +15503,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -15774,7 +15520,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -15791,7 +15537,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -15808,7 +15554,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15825,7 +15571,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15871,7 +15617,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15888,7 +15634,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15900,7 +15646,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15917,7 +15663,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15934,7 +15680,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -15946,7 +15692,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -15963,7 +15709,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15989,6 +15735,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -16020,7 +15778,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -16037,7 +15795,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -16054,15 +15812,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -16071,15 +15829,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -16088,692 +15846,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
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- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
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- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
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- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
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- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -16815,20 +15887,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -16842,11 +15943,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -16859,28 +15972,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -16892,7 +16051,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -16917,11 +16076,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -16938,7 +16662,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -16955,7 +16679,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -16967,7 +16691,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -16979,7 +16703,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16996,7 +16720,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -17008,7 +16732,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -17020,7 +16744,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -17032,7 +16756,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -17044,7 +16768,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17073,7 +16797,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17090,7 +16814,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -17107,7 +16831,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -17124,7 +16848,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -17136,7 +16860,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -17170,7 +16894,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17182,7 +16906,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17199,7 +16923,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -17211,7 +16935,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -17228,7 +16952,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -17245,7 +16969,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -17262,7 +16986,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17279,7 +17003,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17325,7 +17049,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17342,7 +17066,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -17354,7 +17078,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17371,7 +17095,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17388,7 +17112,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -17400,7 +17124,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -17417,7 +17141,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17443,6 +17167,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -17485,7 +17221,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "action_data",
"size": 0
}
@@ -17549,12 +17285,12 @@
"match_attributes": {
"stage_tables": [
{
- "default_next_table": 33,
+ "default_next_table": 17,
"action_format": [
{
"vliw_instruction_full": 64,
"next_table": 0,
- "next_table_full": 33,
+ "next_table_full": 17,
"action_handle": 536870914,
"action_name": "count_ingress",
"table_name": "egress_port_count_table",
@@ -17575,7 +17311,7 @@
1
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "match_with_no_key",
"size": 1
}
@@ -17622,7 +17358,7 @@
}
],
"logical_table_id": 1,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "action_data",
"size": 0
}
@@ -17712,7 +17448,7 @@
0
],
"logical_table_id": 1,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "match_with_no_key",
"size": 1
}
@@ -17729,7 +17465,7 @@
{
"direction": "ingress",
"handle": 33554435,
- "name": "ingress_pkt__action__",
+ "name": "process_packet_out_table__action__",
"table_type": "action",
"stage_tables": [
{
@@ -17758,137 +17494,6 @@
"number_memory_units_per_table_word": 1
}
],
- "logical_table_id": 0,
- "stage_number": 0,
- "stage_table_type": "action_data",
- "size": 0
- }
- ],
- "actions": [
- {
- "p4_parameters": [],
- "handle": 536870919,
- "name": "_packet_out",
- "indirect_resources": [],
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "allowed_as_default_action": true,
- "override_stat_addr_pfe": false,
- "override_stateful_addr_pfe": false,
- "override_meter_full_addr": 0,
- "override_stat_addr": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "override_meter_addr": false
- }
- ],
- "how_referenced": "direct",
- "size": 1024
- },
- {
- "direction": "ingress",
- "handle": 16777219,
- "name": "ingress_pkt",
- "is_resource_controllable": true,
- "table_type": "match",
- "ap_bind_indirect_res_to_match": [],
- "statistics_table_refs": [],
- "actions": [
- {
- "p4_parameters": [],
- "handle": 536870919,
- "name": "_packet_out",
- "indirect_resources": [],
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "allowed_as_default_action": true,
- "override_stat_addr_pfe": false,
- "override_stateful_addr_pfe": false,
- "override_meter_full_addr": 0,
- "override_stat_addr": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "override_meter_addr": false
- }
- ],
- "meter_table_refs": [],
- "default_action_handle": 536870919,
- "uses_range": false,
- "match_attributes": {
- "stage_tables": [
- {
- "default_next_table": 16,
- "action_format": [
- {
- "vliw_instruction_full": 65,
- "next_table": 0,
- "next_table_full": 16,
- "action_handle": 536870919,
- "action_name": "_packet_out",
- "table_name": "_condition_1",
- "immediate_fields": [],
- "vliw_instruction": 1
- }
- ],
- "memory_resource_allocation": null,
- "pack_format": [
- {
- "memory_word_width": 0,
- "entries_per_table_word": 1,
- "table_word_width": 0,
- "number_memory_units_per_table_word": 0
- }
- ],
- "result_physical_buses": [
- 1
- ],
- "logical_table_id": 0,
- "stage_number": 0,
- "stage_table_type": "match_with_no_key",
- "size": 1
- }
- ],
- "match_type": "match_with_no_key"
- },
- "stateful_table_refs": [],
- "default_next_table_mask": 0,
- "selection_table_refs": [],
- "action_data_table_refs": [],
- "match_key_fields": [],
- "size": 1024
- },
- {
- "direction": "egress",
- "handle": 33554436,
- "name": "egress_pkt__action__",
- "table_type": "action",
- "stage_tables": [
- {
- "memory_resource_allocation": null,
- "pack_format": [
- {
- "entries_per_table_word": 1,
- "action_handle": 536870922,
- "memory_word_width": 128,
- "table_word_width": 128,
- "entries": [
- {
- "entry_number": 0,
- "fields": [
- {
- "start_bit": 0,
- "field_width": 0,
- "lsb_mem_word_idx": 1,
- "source": "zero",
- "lsb_mem_word_offset": 0,
- "field_name": "--padding--"
- }
- ]
- }
- ],
- "number_memory_units_per_table_word": 1
- }
- ],
"logical_table_id": 1,
"stage_number": 0,
"stage_table_type": "action_data",
@@ -17898,8 +17503,8 @@
"actions": [
{
"p4_parameters": [],
- "handle": 536870922,
- "name": "add_packet_in_hdr",
+ "handle": 536870919,
+ "name": "_process_packet_out",
"indirect_resources": [],
"override_stat_full_addr": 0,
"override_meter_addr_pfe": false,
@@ -17917,9 +17522,9 @@
"size": 1024
},
{
- "direction": "egress",
- "handle": 16777220,
- "name": "egress_pkt",
+ "direction": "ingress",
+ "handle": 16777219,
+ "name": "process_packet_out_table",
"is_resource_controllable": true,
"table_type": "match",
"ap_bind_indirect_res_to_match": [],
@@ -17927,8 +17532,8 @@
"actions": [
{
"p4_parameters": [],
- "handle": 536870922,
- "name": "add_packet_in_hdr",
+ "handle": 536870919,
+ "name": "_process_packet_out",
"indirect_resources": [],
"override_stat_full_addr": 0,
"override_meter_addr_pfe": false,
@@ -17943,22 +17548,22 @@
}
],
"meter_table_refs": [],
- "default_action_handle": 536870922,
+ "default_action_handle": 536870919,
"uses_range": false,
"match_attributes": {
"stage_tables": [
{
- "default_next_table": 255,
+ "default_next_table": 16,
"action_format": [
{
- "vliw_instruction_full": 65,
+ "vliw_instruction_full": 68,
"next_table": 0,
- "next_table_full": 255,
- "action_handle": 536870922,
- "action_name": "add_packet_in_hdr",
- "table_name": "--END_OF_PIPELINE--",
+ "next_table_full": 16,
+ "action_handle": 536870919,
+ "action_name": "_process_packet_out",
+ "table_name": "_condition_2",
"immediate_fields": [],
- "vliw_instruction": 1
+ "vliw_instruction": 0
}
],
"memory_resource_allocation": null,
@@ -17971,7 +17576,7 @@
}
],
"result_physical_buses": [
- 0
+ 1
],
"logical_table_id": 1,
"stage_number": 0,
@@ -17990,7 +17595,7 @@
},
{
"direction": "ingress",
- "handle": 33554437,
+ "handle": 33554436,
"name": "table0__action__",
"table_type": "action",
"stage_tables": [
@@ -17999,7 +17604,7 @@
"pack_format": [
{
"entries_per_table_word": 1,
- "action_handle": 536870924,
+ "action_handle": 536870921,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -18021,7 +17626,7 @@
},
{
"entries_per_table_word": 1,
- "action_handle": 536870926,
+ "action_handle": 536870925,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -18043,7 +17648,7 @@
},
{
"entries_per_table_word": 1,
- "action_handle": 536870928,
+ "action_handle": 536870927,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -18065,7 +17670,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "action_data",
"size": 0
}
@@ -18080,7 +17685,7 @@
"bit_width": 9
}
],
- "handle": 536870924,
+ "handle": 536870921,
"name": "set_egress_port",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -18096,7 +17701,7 @@
},
{
"p4_parameters": [],
- "handle": 536870926,
+ "handle": 536870925,
"name": "send_to_cpu",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -18112,7 +17717,7 @@
},
{
"p4_parameters": [],
- "handle": 536870928,
+ "handle": 536870927,
"name": "_drop",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -18132,7 +17737,7 @@
},
{
"direction": "ingress",
- "handle": 16777221,
+ "handle": 16777220,
"name": "table0",
"is_resource_controllable": true,
"table_type": "match",
@@ -18154,7 +17759,7 @@
"bit_width": 9
}
],
- "handle": 536870924,
+ "handle": 536870921,
"name": "set_egress_port",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -18170,7 +17775,7 @@
},
{
"p4_parameters": [],
- "handle": 536870926,
+ "handle": 536870925,
"name": "send_to_cpu",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -18186,7 +17791,7 @@
},
{
"p4_parameters": [],
- "handle": 536870928,
+ "handle": 536870927,
"name": "_drop",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -18206,7 +17811,7 @@
"match_attributes": {
"stage_tables": [
{
- "default_next_table": 32,
+ "default_next_table": 16,
"memory_resource_allocation": {
"memory_units_and_vpns": [
{
@@ -18463,7 +18068,7 @@
"two_way_notification": true,
"disable_notification": false,
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "idletime",
"size": 2048
},
@@ -18472,8 +18077,8 @@
{
"vliw_instruction_full": 65,
"next_table": 0,
- "next_table_full": 32,
- "action_handle": 536870924,
+ "next_table_full": 16,
+ "action_handle": 536870921,
"action_name": "set_egress_port",
"table_name": "_condition_2",
"immediate_fields": [
@@ -18490,18 +18095,26 @@
{
"vliw_instruction_full": 66,
"next_table": 0,
- "next_table_full": 32,
- "action_handle": 536870926,
+ "next_table_full": 16,
+ "action_handle": 536870925,
"action_name": "send_to_cpu",
"table_name": "_condition_2",
- "immediate_fields": [],
+ "immediate_fields": [
+ {
+ "param_name": "--constant-0--",
+ "const_value": 320,
+ "dest_start": 0,
+ "param_type": "constant",
+ "dest_width": 9
+ }
+ ],
"vliw_instruction": 6
},
{
"vliw_instruction_full": 67,
"next_table": 0,
- "next_table_full": 32,
- "action_handle": 536870928,
+ "next_table_full": 16,
+ "action_handle": 536870927,
"action_name": "_drop",
"table_name": "_condition_2",
"immediate_fields": [],
@@ -18677,7 +18290,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_indirection",
"size": 4096
},
@@ -18685,7 +18298,7 @@
0
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_match",
"size": 512
}
@@ -18764,7 +18377,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "statistics",
"size": 4096
}
@@ -18773,7 +18386,7 @@
"packet_counter_resolution": 32,
"pfe_bit_position": 19,
"how_referenced": "indirect",
- "size": 254
+ "size": 510
},
{
"direction": "ingress",
@@ -18807,7 +18420,7 @@
}
],
"logical_table_id": 1,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "statistics",
"size": 4096
}
@@ -18816,7 +18429,7 @@
"packet_counter_resolution": 32,
"pfe_bit_position": 19,
"how_referenced": "indirect",
- "size": 254
+ "size": 510
},
{
"direction": "ingress",
@@ -18850,7 +18463,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "statistics",
"size": 4096
}
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/mau.context.json b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/mau.context.json
index c29a162..8a5de37 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/mau.context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/mau.context.json
@@ -1,7 +1,7 @@
{
"ProgramInfo": {
"ProgramName": "default",
- "BuildDate": "Thu Sep 7 13:56:23 2017",
+ "BuildDate": "Fri Sep 8 08:24:01 2017",
"CompilerVersion": "5.1.0"
},
"HashJsonNode": {
@@ -13,7 +13,7 @@
"EntryFormatNode": {
"ExmEntryFormat": {
"AllExmTables": [],
- "TotalExmTables": 5
+ "TotalExmTables": 4
},
"Phase0EntryFormat": {
"Phase0Action": [],
@@ -28,7 +28,7 @@
"SPECFORMAT": []
},
{
- "TableHandle": 16777221,
+ "TableHandle": 16777220,
"SPECFORMAT": [
{
"MATCHTYPE": "ternary",
@@ -57,10 +57,6 @@
]
},
{
- "TableHandle": 16777220,
- "SPECFORMAT": []
- },
- {
"TableHandle": 16777219,
"SPECFORMAT": []
},
@@ -74,7 +70,7 @@
"AllTindTables": [
{
"TindTableName": "table0",
- "TindTableHandle": 16777221,
+ "TindTableHandle": 16777220,
"TindTableFormat": [
{
"TindMatchEntryFormat": [
@@ -297,7 +293,7 @@
],
"TindActionHandleCount": 3,
"TindMatchEntryFieldCount": 12,
- "TindActionImmediateCount": 1,
+ "TindActionImmediateCount": 2,
"TindMatchEntryCount": 4,
"TindActionHandles": [
{
@@ -305,28 +301,8 @@
"OVERRIDE_METER_ADDR_PFE": false,
"OVERRIDE_STAT_ADDR_PFE": false,
"IMMEDIATE": {
- "table_name": "_condition_2",
- "action_name": "_drop",
- "next_tbl": 0,
- "next_tbl_full": 32,
- "instr": 7
- },
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "ImmediateCount": 0,
- "OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870928,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR": false,
- "OVERRIDE_STATEFUL_ADDR": false
- },
- {
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "IMMEDIATE": {
"instr": 5,
- "next_tbl_full": 32,
+ "next_tbl_full": 16,
"action_name": "set_egress_port",
"table_name": "_condition_2",
"next_tbl": 0,
@@ -347,7 +323,39 @@
"OVERRIDE_METER_FULL_ADDR": 0,
"ImmediateCount": 1,
"OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870924,
+ "ACTION_HDL": 536870921,
+ "OVERRIDE_STATEFUL_FULL_ADDR": 0,
+ "OVERRIDE_METER_ADDR": false,
+ "OVERRIDE_STATEFUL_ADDR": false
+ },
+ {
+ "OVERRIDE_STAT_FULL_ADDR": 0,
+ "OVERRIDE_METER_ADDR_PFE": false,
+ "OVERRIDE_STAT_ADDR_PFE": false,
+ "IMMEDIATE": {
+ "instr": 6,
+ "next_tbl_full": 16,
+ "action_name": "send_to_cpu",
+ "table_name": "_condition_2",
+ "next_tbl": 0,
+ "--immediate--": [
+ {
+ "DSTSTART": 0,
+ "PARAMNAME": "--constant-0--",
+ "PARAMVAL": 320,
+ "PARAMTYPE": "constant",
+ "PARAMSTART": 0,
+ "PARAMWIDTH": 0,
+ "PARAMSHIFT": 0,
+ "DSTWIDTH": 9
+ }
+ ]
+ },
+ "OVERRIDE_STATEFUL_ADDR_PFE": false,
+ "OVERRIDE_METER_FULL_ADDR": 0,
+ "ImmediateCount": 1,
+ "OVERRIDE_STAT_ADDR": false,
+ "ACTION_HDL": 536870925,
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR": false,
"OVERRIDE_STATEFUL_ADDR": false
@@ -358,22 +366,22 @@
"OVERRIDE_STAT_ADDR_PFE": false,
"IMMEDIATE": {
"table_name": "_condition_2",
- "action_name": "send_to_cpu",
+ "action_name": "_drop",
"next_tbl": 0,
- "next_tbl_full": 32,
- "instr": 6
+ "next_tbl_full": 16,
+ "instr": 7
},
"OVERRIDE_STATEFUL_ADDR_PFE": false,
"OVERRIDE_METER_FULL_ADDR": 0,
"ImmediateCount": 0,
"OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870926,
+ "ACTION_HDL": 536870927,
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR": false,
"OVERRIDE_STATEFUL_ADDR": false
}
],
- "Stage": 1
+ "Stage": 0
}
]
}
@@ -392,16 +400,11 @@
},
{
"ActionHandle": 536870919,
- "action_function": "_packet_out",
+ "action_function": "_process_packet_out",
"ACTIONSPECFORMAT": []
},
{
- "ActionHandle": 536870922,
- "action_function": "add_packet_in_hdr",
- "ACTIONSPECFORMAT": []
- },
- {
- "ActionHandle": 536870924,
+ "ActionHandle": 536870921,
"action_function": "set_egress_port",
"ACTIONSPECFORMAT": [
{
@@ -412,12 +415,12 @@
]
},
{
- "ActionHandle": 536870926,
+ "ActionHandle": 536870925,
"action_function": "send_to_cpu",
"ACTIONSPECFORMAT": []
},
{
- "ActionHandle": 536870928,
+ "ActionHandle": 536870927,
"action_function": "_drop",
"ACTIONSPECFORMAT": []
}
@@ -425,7 +428,7 @@
"TernEntryFormat": {
"AllTernTables": [
{
- "TernTableHandle": 16777221,
+ "TernTableHandle": 16777220,
"TernTableName": "table0",
"TernTableFormat": [
{
@@ -815,12 +818,12 @@
}
],
"TernEntryFieldCount": 22,
- "Stage": 1
+ "Stage": 0
}
]
}
],
- "TotalTernTables": 5
+ "TotalTernTables": 4
},
"AdtEntryFormat": {
"AllActionDataTables": [
@@ -855,7 +858,7 @@
}
],
"ActFuncEntryCount": 1,
- "Stage": 2
+ "Stage": 1
}
]
}
@@ -896,7 +899,7 @@
}
],
"ActFuncEntryCount": 1,
- "Stage": 2
+ "Stage": 1
}
]
}
@@ -911,7 +914,7 @@
"ActFuncTotalEntries": 1,
"ActionDataTableFormat": [
{
- "ActFuncName": "_packet_out",
+ "ActFuncName": "_process_packet_out",
"ActFuncHandle": 536870919,
"ActFuncStageCount": 1,
"ActFuncFormat": [
@@ -948,12 +951,74 @@
"ActionDataTableHandle": 33554435
},
{
- "ActFuncTotalStageCount": 1,
- "ActFuncTotalEntries": 1,
+ "ActFuncTotalStageCount": 3,
+ "ActFuncTotalEntries": 3,
"ActionDataTableFormat": [
{
- "ActFuncName": "add_packet_in_hdr",
- "ActFuncHandle": 536870922,
+ "ActFuncName": "set_egress_port",
+ "ActFuncHandle": 536870921,
+ "ActFuncStageCount": 1,
+ "ActFuncFormat": [
+ {
+ "ActFuncEntryFormat": [
+ {
+ "Entry": 0,
+ "EntryFieldCount": 1,
+ "EntryConstTupCount": 0,
+ "EntryFormat": [
+ {
+ "FIELDWIDTH": 0,
+ "SOURCENAME": "ZERO",
+ "SHIFT": 0,
+ "WORDINDEX": 1,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--padding--",
+ "FIELDOFFSET": 0,
+ "SOURCEWIDTH": 0
+ }
+ ]
+ }
+ ],
+ "ActFuncEntryCount": 1,
+ "Stage": 0
+ }
+ ]
+ },
+ {
+ "ActFuncName": "send_to_cpu",
+ "ActFuncHandle": 536870925,
+ "ActFuncStageCount": 1,
+ "ActFuncFormat": [
+ {
+ "ActFuncEntryFormat": [
+ {
+ "Entry": 0,
+ "EntryFieldCount": 1,
+ "EntryConstTupCount": 0,
+ "EntryFormat": [
+ {
+ "FIELDWIDTH": 0,
+ "SOURCENAME": "ZERO",
+ "SHIFT": 0,
+ "WORDINDEX": 1,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--padding--",
+ "FIELDOFFSET": 0,
+ "SOURCEWIDTH": 0
+ }
+ ]
+ }
+ ],
+ "ActFuncEntryCount": 1,
+ "Stage": 0
+ }
+ ]
+ },
+ {
+ "ActFuncName": "_drop",
+ "ActFuncHandle": 536870927,
"ActFuncStageCount": 1,
"ActFuncFormat": [
{
@@ -983,123 +1048,20 @@
]
}
],
- "ActFuncHandleTotalCount": 1,
- "ActFuncTotalEntryFieldCount": 1,
- "ActFuncTotalConstTupleList": 0,
- "ActionDataTableHandle": 33554436
- },
- {
- "ActFuncTotalStageCount": 3,
- "ActFuncTotalEntries": 3,
- "ActionDataTableFormat": [
- {
- "ActFuncName": "_drop",
- "ActFuncHandle": 536870928,
- "ActFuncStageCount": 1,
- "ActFuncFormat": [
- {
- "ActFuncEntryFormat": [
- {
- "Entry": 0,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
- "EntryFormat": [
- {
- "FIELDWIDTH": 0,
- "SOURCENAME": "ZERO",
- "SHIFT": 0,
- "WORDINDEX": 1,
- "MASKBITOFFSET": "NULL",
- "SOURCEOFFSET": 0,
- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 0,
- "SOURCEWIDTH": 0
- }
- ]
- }
- ],
- "ActFuncEntryCount": 1,
- "Stage": 1
- }
- ]
- },
- {
- "ActFuncName": "set_egress_port",
- "ActFuncHandle": 536870924,
- "ActFuncStageCount": 1,
- "ActFuncFormat": [
- {
- "ActFuncEntryFormat": [
- {
- "Entry": 0,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
- "EntryFormat": [
- {
- "FIELDWIDTH": 0,
- "SOURCENAME": "ZERO",
- "SHIFT": 0,
- "WORDINDEX": 1,
- "MASKBITOFFSET": "NULL",
- "SOURCEOFFSET": 0,
- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 0,
- "SOURCEWIDTH": 0
- }
- ]
- }
- ],
- "ActFuncEntryCount": 1,
- "Stage": 1
- }
- ]
- },
- {
- "ActFuncName": "send_to_cpu",
- "ActFuncHandle": 536870926,
- "ActFuncStageCount": 1,
- "ActFuncFormat": [
- {
- "ActFuncEntryFormat": [
- {
- "Entry": 0,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
- "EntryFormat": [
- {
- "FIELDWIDTH": 0,
- "SOURCENAME": "ZERO",
- "SHIFT": 0,
- "WORDINDEX": 1,
- "MASKBITOFFSET": "NULL",
- "SOURCEOFFSET": 0,
- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 0,
- "SOURCEWIDTH": 0
- }
- ]
- }
- ],
- "ActFuncEntryCount": 1,
- "Stage": 1
- }
- ]
- }
- ],
"ActFuncHandleTotalCount": 3,
"ActFuncTotalEntryFieldCount": 3,
"ActFuncTotalConstTupleList": 0,
- "ActionDataTableHandle": 33554437
+ "ActionDataTableHandle": 33554436
}
],
- "TotalAdTables": 5
+ "TotalAdTables": 4
},
"SnapShot": {
"PhvDetails": [
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -1118,7 +1080,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -1135,7 +1097,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -1150,7 +1112,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -1165,7 +1127,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -1175,7 +1137,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -1200,31 +1162,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -1240,7 +1177,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -1248,21 +1185,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -1270,7 +1192,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -1295,7 +1217,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -1310,7 +1232,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -1320,7 +1242,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -1345,7 +1267,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -1353,41 +1275,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -1395,7 +1282,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -1405,7 +1292,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -1415,7 +1302,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -1425,7 +1312,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -1435,7 +1322,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -1450,7 +1382,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -1460,7 +1392,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -1490,7 +1422,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -1500,7 +1432,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -1515,7 +1447,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -1525,7 +1457,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -1533,6 +1465,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -1540,7 +1502,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -1555,7 +1517,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -1563,21 +1525,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -1585,10 +1532,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -1600,10 +1547,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -1619,42 +1566,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -1669,7 +1616,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -1681,7 +1628,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -1691,12 +1653,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -1721,7 +1698,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -1729,14 +1706,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -1746,13 +1723,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -1767,7 +1744,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -1777,7 +1754,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -1787,7 +1764,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -1802,7 +1779,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -1817,7 +1794,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -1832,7 +1809,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -1842,7 +1819,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -1852,7 +1829,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -1867,7 +1844,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -1877,7 +1854,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -1887,7 +1864,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -1897,7 +1874,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -1907,7 +1884,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -1932,7 +1909,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -1947,7 +1924,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -1962,7 +1939,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -1974,43 +1951,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -2022,7 +1969,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -2032,7 +1979,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -2062,7 +2009,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -2072,7 +2019,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -2087,7 +2034,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -2097,7 +2044,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -2112,7 +2059,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -2127,7 +2074,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -2142,7 +2089,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -2157,7 +2104,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -2197,7 +2144,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -2207,21 +2154,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -2230,7 +2162,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -2246,42 +2178,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -2293,7 +2250,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -2309,6 +2266,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -2323,7 +2290,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -2333,7 +2300,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -2348,46 +2315,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 0
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -2406,7 +2348,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -2423,7 +2365,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -2438,7 +2380,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -2453,7 +2395,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -2463,7 +2405,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -2488,31 +2430,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -2528,7 +2445,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -2536,21 +2453,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -2558,7 +2460,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -2583,7 +2485,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -2598,7 +2500,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -2608,7 +2510,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -2633,7 +2535,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -2641,41 +2543,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -2683,7 +2550,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -2693,7 +2560,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -2703,7 +2570,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -2713,7 +2580,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -2723,7 +2590,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -2738,7 +2650,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -2748,7 +2660,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -2778,7 +2690,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -2788,7 +2700,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -2803,7 +2715,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -2813,7 +2725,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -2821,6 +2733,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -2828,7 +2770,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -2843,7 +2785,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -2851,21 +2793,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -2873,10 +2800,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -2888,10 +2815,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -2907,42 +2834,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -2957,7 +2884,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -2969,7 +2896,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -2979,12 +2921,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -3009,7 +2966,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -3017,14 +2974,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -3034,13 +2991,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -3055,7 +3012,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -3065,7 +3022,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -3075,7 +3032,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -3090,7 +3047,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -3105,7 +3062,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -3120,7 +3077,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -3130,7 +3087,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -3140,7 +3097,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -3155,7 +3112,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -3165,7 +3122,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -3175,7 +3132,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -3185,7 +3142,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -3195,7 +3152,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -3220,7 +3177,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -3235,7 +3192,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -3250,7 +3207,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -3262,43 +3219,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -3310,7 +3237,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -3320,7 +3247,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -3350,7 +3277,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -3360,7 +3287,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -3375,7 +3302,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -3385,7 +3312,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -3400,7 +3327,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -3415,7 +3342,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -3430,7 +3357,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -3445,7 +3372,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -3485,7 +3412,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -3495,21 +3422,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -3518,7 +3430,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -3534,42 +3446,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -3581,7 +3518,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -3597,6 +3534,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -3611,7 +3558,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -3621,7 +3568,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -3636,46 +3583,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 1
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -3694,7 +3616,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -3711,7 +3633,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -3726,7 +3648,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -3741,7 +3663,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -3751,7 +3673,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -3776,31 +3698,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -3816,7 +3713,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -3824,21 +3721,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -3846,7 +3728,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -3871,7 +3753,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -3886,7 +3768,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -3896,7 +3778,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -3921,7 +3803,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -3929,41 +3811,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -3971,7 +3818,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -3981,7 +3828,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -3991,7 +3838,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -4001,7 +3848,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -4011,7 +3858,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -4026,7 +3918,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -4036,7 +3928,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -4066,7 +3958,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -4076,7 +3968,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -4091,7 +3983,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -4101,7 +3993,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -4109,6 +4001,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -4116,7 +4038,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -4131,7 +4053,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -4139,21 +4061,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -4161,10 +4068,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -4176,10 +4083,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -4195,42 +4102,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -4245,7 +4152,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -4257,7 +4164,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -4267,12 +4189,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -4297,7 +4234,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -4305,14 +4242,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -4322,13 +4259,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -4343,7 +4280,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -4353,7 +4290,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -4363,7 +4300,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -4378,7 +4315,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -4393,7 +4330,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -4408,7 +4345,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -4418,7 +4355,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -4428,7 +4365,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -4443,7 +4380,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -4453,7 +4390,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -4463,7 +4400,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -4473,7 +4410,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -4483,7 +4420,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -4508,7 +4445,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -4523,7 +4460,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -4538,7 +4475,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -4550,43 +4487,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -4598,7 +4505,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -4608,7 +4515,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -4638,7 +4545,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -4648,7 +4555,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -4663,7 +4570,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -4673,7 +4580,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -4688,7 +4595,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -4703,7 +4610,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -4718,7 +4625,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -4733,7 +4640,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -4773,7 +4680,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -4783,21 +4690,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -4806,7 +4698,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -4822,42 +4714,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -4869,7 +4786,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -4885,6 +4802,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -4899,7 +4826,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -4909,7 +4836,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -4924,46 +4851,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 2
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -4982,7 +4884,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -4999,7 +4901,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -5014,7 +4916,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -5029,7 +4931,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -5039,7 +4941,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -5064,31 +4966,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -5104,7 +4981,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -5112,21 +4989,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -5134,7 +4996,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -5159,7 +5021,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -5174,7 +5036,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -5184,7 +5046,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -5209,7 +5071,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -5217,41 +5079,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -5259,7 +5086,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -5269,7 +5096,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -5279,7 +5106,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -5289,7 +5116,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -5299,7 +5126,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -5314,7 +5186,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -5324,7 +5196,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -5354,7 +5226,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -5364,7 +5236,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -5379,7 +5251,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -5389,7 +5261,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -5397,6 +5269,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -5404,7 +5306,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -5419,7 +5321,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -5427,21 +5329,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -5449,10 +5336,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -5464,10 +5351,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -5483,42 +5370,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -5533,7 +5420,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -5545,7 +5432,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -5555,12 +5457,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -5585,7 +5502,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -5593,14 +5510,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -5610,13 +5527,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -5631,7 +5548,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -5641,7 +5558,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -5651,7 +5568,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -5666,7 +5583,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -5681,7 +5598,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -5696,7 +5613,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -5706,7 +5623,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -5716,7 +5633,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -5731,7 +5648,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -5741,7 +5658,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -5751,7 +5668,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -5761,7 +5678,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -5771,7 +5688,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -5796,7 +5713,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -5811,7 +5728,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -5826,7 +5743,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -5838,43 +5755,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -5886,7 +5773,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -5896,7 +5783,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -5926,7 +5813,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -5936,7 +5823,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -5951,7 +5838,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -5961,7 +5848,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -5976,7 +5863,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -5991,7 +5878,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -6006,7 +5893,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -6021,7 +5908,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -6061,7 +5948,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -6071,21 +5958,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -6094,7 +5966,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -6110,42 +5982,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -6157,7 +6054,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -6173,6 +6070,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -6187,7 +6094,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -6197,7 +6104,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -6212,46 +6119,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 3
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -6270,7 +6152,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -6287,7 +6169,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -6302,7 +6184,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -6317,7 +6199,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -6327,7 +6209,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -6352,31 +6234,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -6392,7 +6249,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -6400,21 +6257,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -6422,7 +6264,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -6447,7 +6289,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -6462,7 +6304,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -6472,7 +6314,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -6497,7 +6339,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -6505,41 +6347,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -6547,7 +6354,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -6557,7 +6364,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -6567,7 +6374,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -6577,7 +6384,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -6587,7 +6394,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -6602,7 +6454,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -6612,7 +6464,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -6642,7 +6494,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -6652,7 +6504,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -6667,7 +6519,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -6677,7 +6529,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -6685,6 +6537,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -6692,7 +6574,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -6707,7 +6589,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -6715,21 +6597,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -6737,10 +6604,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -6752,10 +6619,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -6771,42 +6638,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -6821,7 +6688,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -6833,7 +6700,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -6843,12 +6725,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -6873,7 +6770,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -6881,14 +6778,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -6898,13 +6795,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -6919,7 +6816,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -6929,7 +6826,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -6939,7 +6836,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -6954,7 +6851,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -6969,7 +6866,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -6984,7 +6881,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -6994,7 +6891,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -7004,7 +6901,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -7019,7 +6916,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -7029,7 +6926,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -7039,7 +6936,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -7049,7 +6946,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -7059,7 +6956,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -7084,7 +6981,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -7099,7 +6996,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -7114,7 +7011,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -7126,43 +7023,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -7174,7 +7041,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -7184,7 +7051,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -7214,7 +7081,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -7224,7 +7091,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -7239,7 +7106,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -7249,7 +7116,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -7264,7 +7131,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -7279,7 +7146,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -7294,7 +7161,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -7309,7 +7176,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -7349,7 +7216,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -7359,21 +7226,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -7382,7 +7234,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -7398,42 +7250,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -7445,7 +7322,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -7461,6 +7338,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -7475,7 +7362,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -7485,7 +7372,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -7500,46 +7387,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 4
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -7558,7 +7420,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -7575,7 +7437,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -7590,7 +7452,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -7605,7 +7467,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -7615,7 +7477,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -7640,31 +7502,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -7680,7 +7517,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -7688,21 +7525,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -7710,7 +7532,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -7735,7 +7557,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -7750,7 +7572,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -7760,7 +7582,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -7785,7 +7607,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -7793,41 +7615,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -7835,7 +7622,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -7845,7 +7632,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -7855,7 +7642,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -7865,7 +7652,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -7875,7 +7662,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -7890,7 +7722,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -7900,7 +7732,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -7930,7 +7762,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -7940,7 +7772,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -7955,7 +7787,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -7965,7 +7797,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -7973,6 +7805,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -7980,7 +7842,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -7995,7 +7857,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -8003,21 +7865,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -8025,10 +7872,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -8040,10 +7887,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -8059,42 +7906,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -8109,7 +7956,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -8121,7 +7968,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -8131,12 +7993,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -8161,7 +8038,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -8169,14 +8046,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -8186,13 +8063,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -8207,7 +8084,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -8217,7 +8094,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -8227,7 +8104,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -8242,7 +8119,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -8257,7 +8134,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -8272,7 +8149,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -8282,7 +8159,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -8292,7 +8169,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -8307,7 +8184,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -8317,7 +8194,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -8327,7 +8204,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -8337,7 +8214,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -8347,7 +8224,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -8372,7 +8249,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -8387,7 +8264,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -8402,7 +8279,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -8414,43 +8291,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -8462,7 +8309,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -8472,7 +8319,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -8502,7 +8349,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -8512,7 +8359,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -8527,7 +8374,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -8537,7 +8384,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -8552,7 +8399,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -8567,7 +8414,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -8582,7 +8429,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -8597,7 +8444,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -8637,7 +8484,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -8647,21 +8494,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -8670,7 +8502,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -8686,42 +8518,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -8733,7 +8590,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -8749,6 +8606,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -8763,7 +8630,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -8773,7 +8640,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -8788,46 +8655,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 5
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -8846,7 +8688,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -8863,7 +8705,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -8878,7 +8720,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -8893,7 +8735,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -8903,7 +8745,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -8928,31 +8770,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -8968,7 +8785,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -8976,21 +8793,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -8998,7 +8800,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -9023,7 +8825,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -9038,7 +8840,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -9048,7 +8850,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -9073,7 +8875,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -9081,41 +8883,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -9123,7 +8890,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -9133,7 +8900,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -9143,7 +8910,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -9153,7 +8920,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -9163,7 +8930,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -9178,7 +8990,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -9188,7 +9000,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -9218,7 +9030,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -9228,7 +9040,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -9243,7 +9055,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -9253,7 +9065,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -9261,6 +9073,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -9268,7 +9110,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -9283,7 +9125,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -9291,21 +9133,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -9313,10 +9140,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -9328,10 +9155,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -9347,42 +9174,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -9397,7 +9224,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -9409,7 +9236,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -9419,12 +9261,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -9449,7 +9306,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -9457,14 +9314,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -9474,13 +9331,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -9495,7 +9352,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -9505,7 +9362,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -9515,7 +9372,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -9530,7 +9387,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -9545,7 +9402,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -9560,7 +9417,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -9570,7 +9427,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -9580,7 +9437,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -9595,7 +9452,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -9605,7 +9462,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -9615,7 +9472,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -9625,7 +9482,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -9635,7 +9492,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -9660,7 +9517,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -9675,7 +9532,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -9690,7 +9547,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -9702,43 +9559,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -9750,7 +9577,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -9760,7 +9587,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -9790,7 +9617,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -9800,7 +9627,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -9815,7 +9642,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -9825,7 +9652,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -9840,7 +9667,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -9855,7 +9682,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -9870,7 +9697,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -9885,7 +9712,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -9925,7 +9752,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -9935,21 +9762,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -9958,7 +9770,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -9974,42 +9786,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -10021,7 +9858,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -10037,6 +9874,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -10051,7 +9898,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -10061,7 +9908,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -10076,46 +9923,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 6
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -10134,7 +9956,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -10151,7 +9973,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -10166,7 +9988,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -10181,7 +10003,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -10191,7 +10013,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -10216,31 +10038,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -10256,7 +10053,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -10264,21 +10061,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
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"FIELDLSB": 0,
"PHVMSB": 15,
@@ -10286,7 +10068,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -10311,7 +10093,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -10326,7 +10108,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -10336,7 +10118,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -10361,7 +10143,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -10369,41 +10151,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -10411,7 +10158,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -10421,7 +10168,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -10431,7 +10178,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -10441,7 +10188,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -10451,7 +10198,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -10466,7 +10258,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -10476,7 +10268,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -10506,7 +10298,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -10516,7 +10308,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -10531,7 +10323,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -10541,7 +10333,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -10549,6 +10341,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -10556,7 +10378,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -10571,7 +10393,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -10579,21 +10401,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
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"FIELDLSB": 40,
"PHVMSB": 7,
@@ -10601,10 +10408,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -10616,10 +10423,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -10635,42 +10442,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -10685,7 +10492,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -10697,7 +10504,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -10707,12 +10529,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -10737,7 +10574,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -10745,14 +10582,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -10762,13 +10599,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -10783,7 +10620,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -10793,7 +10630,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -10803,7 +10640,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -10818,7 +10655,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -10833,7 +10670,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -10848,7 +10685,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -10858,7 +10695,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -10868,7 +10705,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -10883,7 +10720,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -10893,7 +10730,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -10903,7 +10740,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -10913,7 +10750,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -10923,7 +10760,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -10948,7 +10785,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -10963,7 +10800,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -10978,7 +10815,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -10990,43 +10827,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -11038,7 +10845,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -11048,7 +10855,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -11078,7 +10885,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -11088,7 +10895,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -11103,7 +10910,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -11113,7 +10920,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -11128,7 +10935,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -11143,7 +10950,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -11158,7 +10965,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -11173,7 +10980,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -11213,7 +11020,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -11223,21 +11030,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -11246,7 +11038,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -11262,42 +11054,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -11309,7 +11126,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -11325,6 +11142,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -11339,7 +11166,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -11349,7 +11176,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -11364,46 +11191,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 7
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -11422,7 +11224,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -11439,7 +11241,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -11454,7 +11256,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -11469,7 +11271,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -11479,7 +11281,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -11504,31 +11306,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -11544,7 +11321,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -11552,21 +11329,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -11574,7 +11336,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -11599,7 +11361,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -11614,7 +11376,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -11624,7 +11386,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -11649,7 +11411,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -11657,41 +11419,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -11699,7 +11426,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -11709,7 +11436,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -11719,7 +11446,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -11729,7 +11456,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -11739,7 +11466,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -11754,7 +11526,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -11764,7 +11536,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -11794,7 +11566,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -11804,7 +11576,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -11819,7 +11591,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -11829,7 +11601,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -11837,6 +11609,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -11844,7 +11646,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -11859,7 +11661,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -11867,21 +11669,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -11889,10 +11676,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -11904,10 +11691,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -11923,42 +11710,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -11973,7 +11760,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -11985,7 +11772,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -11995,12 +11797,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -12025,7 +11842,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -12033,14 +11850,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -12050,13 +11867,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -12071,7 +11888,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -12081,7 +11898,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -12091,7 +11908,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -12106,7 +11923,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -12121,7 +11938,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -12136,7 +11953,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -12146,7 +11963,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -12156,7 +11973,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -12171,7 +11988,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -12181,7 +11998,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -12191,7 +12008,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -12201,7 +12018,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -12211,7 +12028,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -12236,7 +12053,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -12251,7 +12068,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -12266,7 +12083,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -12278,43 +12095,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -12326,7 +12113,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -12336,7 +12123,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -12366,7 +12153,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -12376,7 +12163,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -12391,7 +12178,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -12401,7 +12188,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -12416,7 +12203,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -12431,7 +12218,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -12446,7 +12233,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -12461,7 +12248,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -12501,7 +12288,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -12511,21 +12298,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -12534,7 +12306,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -12550,42 +12322,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -12597,7 +12394,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -12613,6 +12410,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -12627,7 +12434,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -12637,7 +12444,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -12652,46 +12459,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 8
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -12710,7 +12492,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -12727,7 +12509,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -12742,7 +12524,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -12757,7 +12539,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -12767,7 +12549,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -12792,31 +12574,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -12832,7 +12589,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -12840,21 +12597,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -12862,7 +12604,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -12887,7 +12629,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -12902,7 +12644,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -12912,7 +12654,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -12937,7 +12679,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -12945,41 +12687,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -12987,7 +12694,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -12997,7 +12704,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -13007,7 +12714,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -13017,7 +12724,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -13027,7 +12734,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -13042,7 +12794,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -13052,7 +12804,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -13082,7 +12834,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -13092,7 +12844,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -13107,7 +12859,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -13117,7 +12869,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -13125,6 +12877,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -13132,7 +12914,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -13147,7 +12929,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -13155,21 +12937,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -13177,10 +12944,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -13192,10 +12959,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -13211,42 +12978,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -13261,7 +13028,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -13273,7 +13040,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -13283,12 +13065,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -13313,7 +13110,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -13321,14 +13118,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -13338,13 +13135,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -13359,7 +13156,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -13369,7 +13166,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -13379,7 +13176,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -13394,7 +13191,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -13409,7 +13206,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -13424,7 +13221,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -13434,7 +13231,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -13444,7 +13241,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -13459,7 +13256,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -13469,7 +13266,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -13479,7 +13276,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -13489,7 +13286,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -13499,7 +13296,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -13524,7 +13321,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -13539,7 +13336,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -13554,7 +13351,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -13566,43 +13363,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -13614,7 +13381,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -13624,7 +13391,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -13654,7 +13421,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -13664,7 +13431,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -13679,7 +13446,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -13689,7 +13456,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -13704,7 +13471,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -13719,7 +13486,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -13734,7 +13501,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -13749,7 +13516,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -13789,7 +13556,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -13799,21 +13566,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -13822,7 +13574,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -13838,42 +13590,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -13885,7 +13662,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -13901,6 +13678,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -13915,7 +13702,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -13925,7 +13712,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -13940,46 +13727,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 9
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -13998,7 +13760,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -14015,7 +13777,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -14030,7 +13792,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -14045,7 +13807,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -14055,7 +13817,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -14080,31 +13842,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -14120,7 +13857,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -14128,21 +13865,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -14150,7 +13872,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -14175,7 +13897,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -14190,7 +13912,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -14200,7 +13922,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -14225,7 +13947,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -14233,41 +13955,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -14275,7 +13962,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -14285,7 +13972,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -14295,7 +13982,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -14305,7 +13992,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -14315,7 +14002,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -14330,7 +14062,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -14340,7 +14072,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -14370,7 +14102,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -14380,7 +14112,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -14395,7 +14127,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -14405,7 +14137,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -14413,6 +14145,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -14420,7 +14182,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -14435,7 +14197,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -14443,21 +14205,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -14465,10 +14212,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -14480,10 +14227,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -14499,42 +14246,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -14549,7 +14296,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -14561,7 +14308,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -14571,12 +14333,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -14601,7 +14378,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -14609,14 +14386,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -14626,13 +14403,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -14647,7 +14424,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -14657,7 +14434,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -14667,7 +14444,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -14682,7 +14459,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -14697,7 +14474,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -14712,7 +14489,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -14722,7 +14499,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -14732,7 +14509,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -14747,7 +14524,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -14757,7 +14534,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -14767,7 +14544,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -14777,7 +14554,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -14787,7 +14564,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -14812,7 +14589,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -14827,7 +14604,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -14842,7 +14619,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -14854,43 +14631,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -14902,7 +14649,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -14912,7 +14659,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -14942,7 +14689,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -14952,7 +14699,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -14967,7 +14714,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -14977,7 +14724,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -14992,7 +14739,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -15007,7 +14754,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -15022,7 +14769,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -15037,7 +14784,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -15077,7 +14824,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -15087,21 +14834,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -15110,7 +14842,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -15126,42 +14858,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -15173,7 +14930,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -15189,6 +14946,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -15203,7 +14970,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -15213,7 +14980,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -15228,46 +14995,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 10
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -15286,7 +15028,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -15303,7 +15045,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -15318,7 +15060,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -15333,7 +15075,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -15343,7 +15085,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -15368,31 +15110,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -15408,7 +15125,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -15416,21 +15133,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -15438,7 +15140,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -15463,7 +15165,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -15478,7 +15180,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -15488,7 +15190,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -15513,7 +15215,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -15521,41 +15223,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -15563,7 +15230,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -15573,7 +15240,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -15583,7 +15250,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -15593,7 +15260,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -15603,7 +15270,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -15618,7 +15330,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -15628,7 +15340,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -15658,7 +15370,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -15668,7 +15380,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -15683,7 +15395,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -15693,7 +15405,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -15701,6 +15413,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -15708,7 +15450,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -15723,7 +15465,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -15731,21 +15473,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -15753,10 +15480,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -15768,10 +15495,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -15787,42 +15514,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -15837,7 +15564,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -15849,7 +15576,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -15859,12 +15601,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -15889,7 +15646,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -15897,14 +15654,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -15914,13 +15671,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -15935,7 +15692,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -15945,7 +15702,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -15955,7 +15712,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -15970,7 +15727,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -15985,7 +15742,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -16000,7 +15757,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -16010,7 +15767,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -16020,7 +15777,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -16035,7 +15792,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -16045,7 +15802,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -16055,7 +15812,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -16065,7 +15822,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -16075,7 +15832,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -16100,7 +15857,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -16115,7 +15872,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -16130,7 +15887,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -16142,43 +15899,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -16190,7 +15917,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -16200,7 +15927,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -16230,7 +15957,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -16240,7 +15967,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -16255,7 +15982,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -16265,7 +15992,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -16280,7 +16007,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -16295,7 +16022,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -16310,7 +16037,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -16325,7 +16052,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -16365,7 +16092,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -16375,21 +16102,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -16398,7 +16110,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -16414,42 +16126,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -16461,7 +16198,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -16477,6 +16214,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -16491,7 +16238,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -16501,7 +16248,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -16516,38 +16263,13 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 11
@@ -16561,10 +16283,10 @@
1
],
"TABLENAME": "ingress_port_count_table",
- "ID": 32,
+ "ID": 16,
"TableHandle": 16777217,
"TCAMADDRSHIFT": 0,
- "Stage": 2
+ "Stage": 1
},
{
"DIRECTION": 0,
@@ -16573,10 +16295,10 @@
0
],
"TABLENAME": "egress_port_count_table",
- "ID": 33,
+ "ID": 17,
"TableHandle": 16777218,
"TCAMADDRSHIFT": 0,
- "Stage": 2
+ "Stage": 1
},
{
"DIRECTION": 0,
@@ -16585,10 +16307,10 @@
0
],
"TABLENAME": "table0",
- "ID": 16,
- "TableHandle": 16777221,
+ "ID": 0,
+ "TableHandle": 16777220,
"TCAMADDRSHIFT": 3,
- "Stage": 1
+ "Stage": 0
},
{
"DIRECTION": 0,
@@ -16596,21 +16318,9 @@
"PHYSICALBUSES": [
1
],
- "TABLENAME": "ingress_pkt",
- "ID": 0,
- "TableHandle": 16777219,
- "TCAMADDRSHIFT": 0,
- "Stage": 0
- },
- {
- "DIRECTION": 1,
- "TABLETYPE": "SRAM",
- "PHYSICALBUSES": [
- 0
- ],
- "TABLENAME": "egress_pkt",
+ "TABLENAME": "process_packet_out_table",
"ID": 1,
- "TableHandle": 16777220,
+ "TableHandle": 16777219,
"TCAMADDRSHIFT": 0,
"Stage": 0
}
@@ -16618,7 +16328,7 @@
},
"AlpmFormat": [],
"DefaultEntryFormat": {
- "TotalTables": 5,
+ "TotalTables": 4,
"DefaultEntries": [
{
"TotalActionFields": 0,
@@ -16638,7 +16348,7 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 33,
+ "next_tbl": 17,
"act_name": "reset_default_action"
}
},
@@ -16656,7 +16366,7 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 33,
+ "next_tbl": 17,
"act_name": "count_ingress"
}
}
@@ -16673,7 +16383,7 @@
"SelectorCount": 0,
"TableHandle": 16777217,
"LogicalId": 0,
- "Stage": 2
+ "Stage": 1
},
{
"TotalActionFields": 0,
@@ -16728,7 +16438,7 @@
"SelectorCount": 0,
"TableHandle": 16777218,
"LogicalId": 1,
- "Stage": 2
+ "Stage": 1
},
{
"TotalActionFields": 0,
@@ -16755,7 +16465,7 @@
{
"ActionHandle": 536870919,
"ActionFunction": {
- "instr": 65,
+ "instr": 68,
"OVERRIDE_STAT_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR_PFE": false,
"OVERRIDE_STAT_ADDR_PFE": false,
@@ -16767,7 +16477,7 @@
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
"next_tbl": 16,
- "act_name": "_packet_out"
+ "act_name": "_process_packet_out"
}
}
],
@@ -16782,86 +16492,13 @@
"TotalActionHandles": 2,
"SelectorCount": 0,
"TableHandle": 16777219,
- "LogicalId": 0,
- "Stage": 0
- },
- {
- "TotalActionFields": 0,
- "Actions": [
- {
- "ActionHandle": 0,
- "ActionFunction": {
- "instr": 0,
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "OVERRIDE_STAT_ADDR": false,
- "tbl_name": "None",
- "OVERRIDE_STATEFUL_ADDR": false,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "tbl_mask": 0,
- "OVERRIDE_METER_ADDR": false,
- "next_tbl": 255,
- "act_name": "reset_default_action"
- }
- },
- {
- "ActionHandle": 536870922,
- "ActionFunction": {
- "instr": 65,
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "OVERRIDE_STAT_ADDR": false,
- "OVERRIDE_STATEFUL_ADDR": false,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "tbl_mask": 0,
- "OVERRIDE_METER_ADDR": false,
- "next_tbl": 255,
- "act_name": "add_packet_in_hdr"
- }
- }
- ],
- "Immediate": [
- {
- "ActionHandle": 0
- },
- {
- "ActionHandle": 536870922
- }
- ],
- "TotalActionHandles": 2,
- "SelectorCount": 0,
- "TableHandle": 16777220,
"LogicalId": 1,
"Stage": 0
},
{
- "TotalActionFields": 1,
+ "TotalActionFields": 2,
"Actions": [
{
- "ActionHandle": 536870928,
- "ActionFunction": {
- "instr": 67,
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "OVERRIDE_STAT_ADDR": false,
- "OVERRIDE_STATEFUL_ADDR": false,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "tbl_mask": 0,
- "OVERRIDE_METER_ADDR": false,
- "next_tbl": 32,
- "act_name": "_drop"
- }
- },
- {
"ActionHandle": 0,
"ActionFunction": {
"instr": 0,
@@ -16876,12 +16513,12 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 32,
+ "next_tbl": 16,
"act_name": "reset_default_action"
}
},
{
- "ActionHandle": 536870924,
+ "ActionHandle": 536870921,
"ActionFunction": {
"instr": 65,
"OVERRIDE_STAT_FULL_ADDR": 0,
@@ -16894,12 +16531,12 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 32,
+ "next_tbl": 16,
"act_name": "set_egress_port"
}
},
{
- "ActionHandle": 536870926,
+ "ActionHandle": 536870925,
"ActionFunction": {
"instr": 66,
"OVERRIDE_STAT_FULL_ADDR": 0,
@@ -16912,20 +16549,35 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 32,
+ "next_tbl": 16,
"act_name": "send_to_cpu"
}
+ },
+ {
+ "ActionHandle": 536870927,
+ "ActionFunction": {
+ "instr": 67,
+ "OVERRIDE_STAT_FULL_ADDR": 0,
+ "OVERRIDE_METER_ADDR_PFE": false,
+ "OVERRIDE_STAT_ADDR_PFE": false,
+ "OVERRIDE_STATEFUL_ADDR_PFE": false,
+ "OVERRIDE_METER_FULL_ADDR": 0,
+ "OVERRIDE_STAT_ADDR": false,
+ "OVERRIDE_STATEFUL_ADDR": false,
+ "OVERRIDE_STATEFUL_FULL_ADDR": 0,
+ "tbl_mask": 0,
+ "OVERRIDE_METER_ADDR": false,
+ "next_tbl": 16,
+ "act_name": "_drop"
+ }
}
],
"Immediate": [
{
- "ActionHandle": 536870928
- },
- {
"ActionHandle": 0
},
{
- "ActionHandle": 536870924,
+ "ActionHandle": 536870921,
"ActionFunctionFields": [
{
"DSTSTART": 0,
@@ -16940,14 +16592,29 @@
]
},
{
- "ActionHandle": 536870926
+ "ActionHandle": 536870925,
+ "ActionFunctionFields": [
+ {
+ "DSTSTART": 0,
+ "PARAMNAME": "--constant-0--",
+ "PARAMVAL": 320,
+ "PARAMTYPE": "constant",
+ "PARAMSTART": 0,
+ "PARAMWIDTH": 9,
+ "PARAMSHIFT": 0,
+ "DSTWIDTH": 9
+ }
+ ]
+ },
+ {
+ "ActionHandle": 536870927
}
],
"TotalActionHandles": 4,
"SelectorCount": 0,
- "TableHandle": 16777221,
+ "TableHandle": 16777220,
"LogicalId": 0,
- "Stage": 1
+ "Stage": 0
}
]
}
@@ -16965,7 +16632,8 @@
"6": "default_parser",
"7": "parse_pkt_out",
"8": "<POV initialization>_<Ingress intrinsic metadata>_<Phase 0>",
- "9": "start"
+ "9": "start",
+ "10": "parse_tcp//spilled"
},
"parser_value_set": []
},
@@ -16979,7 +16647,7 @@
"4": "parse_udp",
"5": "default_parser",
"6": "parse_pkt_out",
- "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"8": "parse_pkt_in"
},
"parser_value_set": []
@@ -16995,7 +16663,7 @@
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "match_with_no_key",
"number_entries": 1,
"pack_format_length": 1,
@@ -17018,7 +16686,7 @@
"stage_table_type_handle": 0,
"stage_idletime_table": null,
"stage_gateway_table": {
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "gateway",
"number_entries": 0,
"pack_format_length": 0,
@@ -17131,12 +16799,12 @@
"536870914": {
"next_table_address_to_use": 0,
"action_name": "count_ingress",
- "next_table_full_address": 33,
+ "next_table_full_address": 17,
"next_table_name": "egress_port_count_table"
}
},
"default_next_table_modifiable": false,
- "default_next_table": 33,
+ "default_next_table": 17,
"action_to_immediate_mapping": {
"536870914": [
[]
@@ -17254,7 +16922,7 @@
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "match_with_no_key",
"number_entries": 1,
"pack_format_length": 1,
@@ -17277,7 +16945,7 @@
"stage_table_type_handle": 1,
"stage_idletime_table": null,
"stage_gateway_table": {
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "gateway",
"number_entries": 0,
"pack_format_length": 0,
@@ -17488,7 +17156,7 @@
"ap_bind_indirect_res_to_match": []
},
{
- "name": "ingress_pkt",
+ "name": "process_packet_out_table",
"handle": 16777219,
"direction": "ingress",
"number_entries": 1024,
@@ -17514,7 +17182,7 @@
}
],
"memory_resource_allocation": null,
- "stage_table_handle": 0,
+ "stage_table_handle": 1,
"stage_table_type_handle": 0,
"stage_idletime_table": null,
"stage_gateway_table": {
@@ -17545,10 +17213,8 @@
16
]
],
- "match_group_key_bit_width": 8,
- "match_group_phv_bit_scrambling": {
- "--validity_check--packet_out_hdr[0]": 9
- },
+ "match_group_key_bit_width": 0,
+ "match_group_phv_bit_scrambling": {},
"match_group_match_bit_scrambling": {},
"seed": [
0,
@@ -17607,24 +17273,24 @@
"hash_match_group_id_for_hash_bits": 0,
"hash_match_group_id_for_data_bits": 0
},
- "use_condition_from_program": true
+ "use_condition_from_program": false
},
"match_group_resource_allocation": [],
"vliw_resource_allocation": {
"536870919": {
- "address_to_use": 1,
- "full_address": 65,
- "vliw_instruction_number": 0,
- "color": 1,
+ "address_to_use": 0,
+ "full_address": 68,
+ "vliw_instruction_number": 2,
+ "color": 0,
"direction": "ingress"
}
},
"action_to_next_table_mapping": {
"536870919": {
"next_table_address_to_use": 0,
- "action_name": "_packet_out",
+ "action_name": "_process_packet_out",
"next_table_full_address": 16,
- "next_table_name": "_condition_1"
+ "next_table_name": "_condition_2"
}
},
"default_next_table_modifiable": false,
@@ -17639,19 +17305,11 @@
],
"match_key_fields": [],
"match_fields_type_dictionary": {},
- "gateway_fields": [
- {
- "name": "--validity_check--packet_out_hdr",
- "start_offset": 0,
- "start_bit": 0,
- "bit_width": 1,
- "range_field": false
- }
- ],
+ "gateway_fields": [],
"preferred_match_type": "exact",
"actions": [
{
- "name": "_packet_out",
+ "name": "_process_packet_out",
"handle": 536870919,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
@@ -17697,14 +17355,14 @@
"phv_word_address": 130
},
{
- "phv_word_address": 67
+ "phv_word_address": 66
}
],
"indirect_resources": []
}
],
"default_action": {
- "name": "_packet_out",
+ "name": "_process_packet_out",
"handle": 536870919,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
@@ -17750,294 +17408,7 @@
"phv_word_address": 130
},
{
- "phv_word_address": 67
- }
- ]
- },
- "default_action_parameters": {},
- "default_only_action": null,
- "p4_action_data_tables": [],
- "p4_statistics_tables": [],
- "p4_meter_tables": [],
- "p4_stateful_tables": [],
- "p4_selection_tables": [],
- "include_idletime": false,
- "performs_hash_action": false,
- "uses_range": false,
- "number_entries_with_ranges": 0,
- "uses_versioning": true,
- "tcam_error_detect": false,
- "dynamic_match_key_masks": false,
- "uses_static_entries": false,
- "match_type": "exact",
- "action_profile": null,
- "timeout": false,
- "ap_bind_indirect_res_to_match": []
- },
- {
- "name": "egress_pkt",
- "handle": 16777220,
- "direction": "egress",
- "number_entries": 1024,
- "stage_tables_length": 1,
- "stage_tables": [
- {
- "stage_number": 0,
- "stage_table_type": "match_with_no_key",
- "number_entries": 1,
- "pack_format_length": 1,
- "pack_format": [
- {
- "table_word_width": 0,
- "memory_word_width": 0,
- "entries_per_table_word": 1,
- "number_memory_units_per_table_word": 0,
- "entry_list": [
- {
- "entry_number": 0,
- "field_list": []
- }
- ]
- }
- ],
- "memory_resource_allocation": null,
- "stage_table_handle": 1,
- "stage_table_type_handle": 1,
- "stage_idletime_table": null,
- "stage_gateway_table": {
- "stage_number": 0,
- "stage_table_type": "gateway",
- "number_entries": 0,
- "pack_format_length": 0,
- "pack_format": [],
- "memory_resource_allocation": {
- "memory_type": "gateway",
- "memory_units_depth": 1,
- "memory_units_width": 1,
- "memory_units_and_vpns": [
- {
- "memory_units": [
- 15
- ],
- "vpns": [
- null
- ]
- }
- ]
- },
- "gateway_match_group_resource_allocation": {
- "match_groups": [
- [
- 0,
- 16
- ]
- ],
- "match_group_key_bit_width": 8,
- "match_group_phv_bit_scrambling": {
- "ig_intr_md_for_tm.copy_to_cpu[0]": 0
- },
- "match_group_match_bit_scrambling": {},
- "seed": [
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0
- ],
- "hash_match_group_id_for_hash_bits": 0,
- "hash_match_group_id_for_data_bits": 0
- },
- "use_condition_from_program": true
- },
- "match_group_resource_allocation": [],
- "vliw_resource_allocation": {
- "536870922": {
- "address_to_use": 1,
- "full_address": 65,
- "vliw_instruction_number": 0,
- "color": 1,
- "direction": "egress"
- }
- },
- "action_to_next_table_mapping": {
- "536870922": {
- "next_table_address_to_use": 0,
- "action_name": "add_packet_in_hdr",
- "next_table_full_address": 255,
- "next_table_name": "--END_OF_PIPELINE--"
- }
- },
- "default_next_table_modifiable": false,
- "default_next_table": 255,
- "action_to_immediate_mapping": {
- "536870922": [
- []
- ]
- },
- "stage_table_type_handle_type": "exact"
- }
- ],
- "match_key_fields": [],
- "match_fields_type_dictionary": {},
- "gateway_fields": [
- {
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "start_offset": 35,
- "start_bit": 0,
- "bit_width": 1,
- "range_field": false
- }
- ],
- "preferred_match_type": "exact",
- "actions": [
- {
- "name": "add_packet_in_hdr",
- "handle": 536870922,
- "allowed_to_be_default_action": true,
- "disallowed_as_default_action_reason": null,
- "override_stat_addr_pfe": false,
- "override_stat_addr": false,
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "override_meter_addr": false,
- "override_meter_full_addr": 0,
- "override_stateful_addr_pfe": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "p4_parameters": [],
- "p4_primitives": [
- {
- "handle": 536870920,
- "header_instance": "packet_in_hdr"
- },
- {
- "handle": 536870921,
- "destination_field": {
- "name": "packet_in_hdr.ingress_port",
- "start_offset": 0,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "source_value": {
- "name": "ig_intr_md.ingress_port",
- "start_offset": 7,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "mask": {
- "value": 511,
- "signed": false
- }
- }
- ],
- "stage_primitives": [
- {
- "phv_word_address": 82
- },
- {
- "phv_word_address": 145
- }
- ],
- "indirect_resources": []
- }
- ],
- "default_action": {
- "name": "add_packet_in_hdr",
- "handle": 536870922,
- "allowed_to_be_default_action": true,
- "disallowed_as_default_action_reason": null,
- "override_stat_addr_pfe": false,
- "override_stat_addr": false,
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "override_meter_addr": false,
- "override_meter_full_addr": 0,
- "override_stateful_addr_pfe": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "p4_parameters": [],
- "p4_primitives": [
- {
- "handle": 536870920,
- "header_instance": "packet_in_hdr"
- },
- {
- "handle": 536870921,
- "destination_field": {
- "name": "packet_in_hdr.ingress_port",
- "start_offset": 0,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "source_value": {
- "name": "ig_intr_md.ingress_port",
- "start_offset": 7,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "mask": {
- "value": 511,
- "signed": false
- }
- }
- ],
- "stage_primitives": [
- {
- "phv_word_address": 82
- },
- {
- "phv_word_address": 145
+ "phv_word_address": 66
}
]
},
@@ -18063,13 +17434,13 @@
},
{
"name": "table0",
- "handle": 16777221,
+ "handle": 16777220,
"direction": "ingress",
"number_entries": 512,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_match",
"number_entries": 512,
"pack_format_length": 0,
@@ -18262,7 +17633,7 @@
"stage_table_handle": 0,
"stage_table_type_handle": 0,
"stage_idletime_table": {
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "idletime",
"number_entries": 2048,
"pack_format_length": 1,
@@ -18343,7 +17714,7 @@
"idletime_per_flow_idletime": true
},
"stage_gateway_table": {
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "gateway",
"number_entries": 0,
"pack_format_length": 0,
@@ -18708,21 +18079,21 @@
}
],
"vliw_resource_allocation": {
- "536870924": {
+ "536870921": {
"address_to_use": 5,
"full_address": 65,
"vliw_instruction_number": 0,
"color": 1,
"direction": "ingress"
},
- "536870926": {
+ "536870925": {
"address_to_use": 6,
"full_address": 66,
"vliw_instruction_number": 1,
"color": 0,
"direction": "ingress"
},
- "536870928": {
+ "536870927": {
"address_to_use": 7,
"full_address": 67,
"vliw_instruction_number": 1,
@@ -18731,28 +18102,28 @@
}
},
"action_to_next_table_mapping": {
- "536870924": {
+ "536870921": {
"next_table_address_to_use": 0,
"action_name": "set_egress_port",
- "next_table_full_address": 32,
+ "next_table_full_address": 16,
"next_table_name": "_condition_2"
},
- "536870926": {
+ "536870925": {
"next_table_address_to_use": 0,
"action_name": "send_to_cpu",
- "next_table_full_address": 32,
+ "next_table_full_address": 16,
"next_table_name": "_condition_2"
},
- "536870928": {
+ "536870927": {
"next_table_address_to_use": 0,
"action_name": "_drop",
- "next_table_full_address": 32,
+ "next_table_full_address": 16,
"next_table_name": "_condition_2"
}
},
- "default_next_table": 32,
+ "default_next_table": 16,
"action_to_immediate_mapping": {
- "536870924": [
+ "536870921": [
[
{
"name": "port",
@@ -18768,15 +18139,27 @@
],
[]
],
- "536870926": [
- []
+ "536870925": [
+ [
+ {
+ "name": "--constant-0--",
+ "parameter_least_significant_bit": 0,
+ "parameter_most_significant_bit": 8,
+ "immediate_least_significant_bit": 0,
+ "immediate_most_significant_bit": 8,
+ "location": "match_entry",
+ "type": "constant",
+ "value": 320,
+ "field_called": "--immediate--"
+ }
+ ]
],
- "536870928": [
+ "536870927": [
[]
]
},
"ternary_indirection_table": {
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_indirection",
"number_entries": 4096,
"pack_format_length": 1,
@@ -18961,7 +18344,7 @@
"actions": [
{
"name": "set_egress_port",
- "handle": 536870924,
+ "handle": 536870921,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -18987,7 +18370,7 @@
],
"p4_primitives": [
{
- "handle": 536870923,
+ "handle": 536870920,
"destination_field": {
"name": "ig_intr_md_for_tm.ucast_egress_port",
"start_offset": 7,
@@ -19020,7 +18403,7 @@
},
{
"name": "send_to_cpu",
- "handle": 536870926,
+ "handle": 536870925,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -19035,34 +18418,65 @@
"p4_parameters": [],
"p4_primitives": [
{
- "handle": 536870925,
+ "handle": 536870922,
"destination_field": {
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "start_offset": 35,
+ "name": "ig_intr_md_for_tm.ucast_egress_port",
+ "start_offset": 7,
"start_bit": 0,
- "bit_width": 1,
+ "bit_width": 9,
"range_field": false
},
"source_value": {
- "value": 1,
+ "value": 320,
"signed": false
},
"mask": {
- "value": 1,
+ "value": 511,
+ "signed": false
+ }
+ },
+ {
+ "handle": 536870923,
+ "header_instance": "packet_in_hdr"
+ },
+ {
+ "handle": 536870924,
+ "destination_field": {
+ "name": "packet_in_hdr.ingress_port",
+ "start_offset": 0,
+ "start_bit": 0,
+ "bit_width": 9,
+ "range_field": false
+ },
+ "source_value": {
+ "name": "ig_intr_md.ingress_port",
+ "start_offset": 7,
+ "start_bit": 0,
+ "bit_width": 9,
+ "range_field": false
+ },
+ "mask": {
+ "value": 511,
"signed": false
}
}
],
"stage_primitives": [
{
- "phv_word_address": 64
+ "phv_word_address": 130
+ },
+ {
+ "phv_word_address": 66
+ },
+ {
+ "phv_word_address": 129
}
],
"indirect_resources": []
},
{
"name": "_drop",
- "handle": 536870928,
+ "handle": 536870927,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -19077,13 +18491,13 @@
"p4_parameters": [],
"p4_primitives": [
{
- "handle": 536870927,
+ "handle": 536870926,
"table_direction": "ingress"
}
],
"stage_primitives": [
{
- "phv_word_address": 68
+ "phv_word_address": 67
}
],
"indirect_resources": []
@@ -19120,11 +18534,11 @@
"name": "ingress_port_counter",
"handle": 67108865,
"direction": "ingress",
- "number_entries": 254,
+ "number_entries": 510,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "statistics",
"number_entries": 4096,
"pack_format_length": 1,
@@ -19228,11 +18642,11 @@
"name": "egress_port_counter",
"handle": 67108866,
"direction": "ingress",
- "number_entries": 254,
+ "number_entries": 510,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "statistics",
"number_entries": 4096,
"pack_format_length": 1,
@@ -19340,7 +18754,7 @@
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "statistics",
"number_entries": 4096,
"pack_format_length": 1,
@@ -19452,7 +18866,6 @@
"ipv4_flags": 1,
"ig_intr_md_ingress_port": 2,
"ipv4_hdrChecksum": 2,
- "ig_intr_md_for_tm_copy_to_cpu": 1,
"tcp_ecn": 1,
"ipv4_srcAddr": 4,
"udp_length_": 2,
@@ -19489,9 +18902,7 @@
"ipv4_fragOffset": 2,
"eg_intr_md_egress_cos": 1,
"ipv4_flags": 1,
- "ig_intr_md_ingress_port": 2,
"ipv4_hdrChecksum": 2,
- "ig_intr_md_for_tm_copy_to_cpu": 1,
"tcp_ecn": 1,
"ipv4_srcAddr": 4,
"udp_length_": 2,
@@ -19523,7 +18934,7 @@
},
{
"0": {
- "67": {
+ "66": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
@@ -19533,7 +18944,7 @@
}
},
"1": {
- "82": {
+ "81": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/p4_name_lookup.json b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/p4_name_lookup.json
index b507e45..3d9a377 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/p4_name_lookup.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/p4_name_lookup.json
@@ -11,13 +11,14 @@
"6": "default_parser",
"7": "parse_pkt_out",
"8": "<POV initialization>",
- "9": "start"
+ "9": "start",
+ "10": "parse_tcp"
},
"pov": {
"0": {
"0": "--pov_reserved--_0"
},
- "67": {
+ "66": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
@@ -40,7 +41,7 @@
"8": "parse_pkt_in"
},
"pov": {
- "82": {
+ "81": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
@@ -57,28 +58,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -91,6 +87,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -100,9 +98,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -111,12 +110,21 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {
"0": {
"actions": {
- "_packet_out": {
+ "_drop": {
+ "direction": 0,
+ "primitives": [
+ {
+ "name": "DropPrimitive"
+ }
+ ],
+ "table_name": "table0"
+ },
+ "send_to_cpu": {
"direction": 0,
"primitives": [
{
@@ -136,44 +144,13 @@
"name": "ModifyFieldPrimitive",
"src": [
{
- "name": "packet_out_hdr.egress_port",
- "phv_allocation": [
- {
- "field_instance_least_significant_bit": 0,
- "field_instance_most_significant_bit": 8,
- "phv_container_least_significant_bit": 7,
- "phv_container_most_significant_bit": 15,
- "word_address": 129
- }
- ],
- "type": "phv"
+ "name": 320,
+ "type": "immediate"
}
]
},
{
"dst": {
- "name": "packet_out_hdr",
- "type": "header"
- },
- "name": "RemoveHeaderPrimitive"
- }
- ],
- "table_name": "ingress_pkt"
- }
- },
- "instruction_addresses": {
- "65": "_packet_out"
- },
- "match_fields": {},
- "table_name": "ingress_pkt"
- },
- "1": {
- "actions": {
- "add_packet_in_hdr": {
- "direction": 1,
- "primitives": [
- {
- "dst": {
"name": "packet_in_hdr",
"type": "header"
},
@@ -188,7 +165,7 @@
"field_instance_most_significant_bit": 8,
"phv_container_least_significant_bit": 7,
"phv_container_most_significant_bit": 15,
- "word_address": 145
+ "word_address": 129
}
],
"type": "phv"
@@ -203,7 +180,7 @@
"field_instance_most_significant_bit": 8,
"phv_container_least_significant_bit": 0,
"phv_container_most_significant_bit": 8,
- "word_address": 144
+ "word_address": 128
}
],
"type": "phv"
@@ -211,117 +188,6 @@
]
}
],
- "table_name": "egress_pkt"
- }
- },
- "instruction_addresses": {
- "65": "add_packet_in_hdr"
- },
- "match_fields": {},
- "table_name": "egress_pkt"
- }
- },
- "stateful_tables": []
- },
- "1": {
- "containers": {
- "0": "I [POV[31:0]]",
- "1": "I [ethernet.dstAddr[39:8]]",
- "2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
- "128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
- "129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "130": "I [ig_intr_md_for_tm.ucast_egress_port]",
- "131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
- "256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "257": "I [ipv4.srcAddr]",
- "258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
- "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "265": "E [ipv4.srcAddr]",
- "266": "E [ipv4.dstAddr]",
- "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "269": "E [tcp.checksum, tcp.urgentPtr]",
- "270": "E [ethernet.dstAddr[39:8]]",
- "271": "E [ethernet.srcAddr[31:0]]",
- "288": "I [ipv4.version, ipv4.ihl]",
- "289": "I [ipv4.diffserv]",
- "290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ipv4.version, ipv4.ihl]",
- "297": "E [ipv4.diffserv]",
- "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "300": "E [ethernet.dstAddr[47:40]]",
- "301": "E [ethernet.srcAddr[39:32]]",
- "320": "I [ipv4.totalLen]",
- "321": "I [ipv4.identification]",
- "322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
- "332": "E [ipv4.totalLen]",
- "333": "E [ipv4.identification]",
- "334": "E [ipv4.flags, ipv4.fragOffset]",
- "335": "E [tcp.dstPort]",
- "336": "E [tcp.seqNo[31:16], udp.dstPort]",
- "337": "E [tcp.seqNo[15:0]]",
- "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
- },
- "logical_tables": {
- "0": {
- "actions": {
- "_drop": {
- "direction": 0,
- "primitives": [
- {
- "name": "DropPrimitive"
- }
- ],
- "table_name": "table0"
- },
- "send_to_cpu": {
- "direction": 0,
- "primitives": [
- {
- "dst": {
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "phv_allocation": [
- {
- "field_instance_least_significant_bit": 0,
- "field_instance_most_significant_bit": 0,
- "phv_container_least_significant_bit": 0,
- "phv_container_most_significant_bit": 0,
- "word_address": 64
- }
- ],
- "type": "phv"
- },
- "name": "ModifyFieldPrimitive",
- "src": [
- {
- "name": 1,
- "type": "immediate"
- }
- ]
- }
- ],
"table_name": "table0"
},
"set_egress_port": {
@@ -365,7 +231,7 @@
"field_instance_most_significant_bit": 47,
"phv_container_least_significant_bit": 0,
"phv_container_most_significant_bit": 7,
- "word_address": 65
+ "word_address": 64
},
{
"field_instance_least_significant_bit": 8,
@@ -404,7 +270,7 @@
"field_instance_most_significant_bit": 39,
"phv_container_least_significant_bit": 0,
"phv_container_most_significant_bit": 7,
- "word_address": 66
+ "word_address": 65
},
{
"field_instance_least_significant_bit": 0,
@@ -425,37 +291,85 @@
]
},
"table_name": "table0"
+ },
+ "1": {
+ "actions": {
+ "_process_packet_out": {
+ "direction": 0,
+ "primitives": [
+ {
+ "dst": {
+ "name": "ig_intr_md_for_tm.ucast_egress_port",
+ "phv_allocation": [
+ {
+ "field_instance_least_significant_bit": 0,
+ "field_instance_most_significant_bit": 8,
+ "phv_container_least_significant_bit": 0,
+ "phv_container_most_significant_bit": 8,
+ "word_address": 130
+ }
+ ],
+ "type": "phv"
+ },
+ "name": "ModifyFieldPrimitive",
+ "src": [
+ {
+ "name": "packet_out_hdr.egress_port",
+ "phv_allocation": [
+ {
+ "field_instance_least_significant_bit": 0,
+ "field_instance_most_significant_bit": 8,
+ "phv_container_least_significant_bit": 7,
+ "phv_container_most_significant_bit": 15,
+ "word_address": 129
+ }
+ ],
+ "type": "phv"
+ }
+ ]
+ },
+ {
+ "dst": {
+ "name": "packet_out_hdr",
+ "type": "header"
+ },
+ "name": "RemoveHeaderPrimitive"
+ }
+ ],
+ "table_name": "process_packet_out_table"
+ }
+ },
+ "instruction_addresses": {
+ "68": "_process_packet_out"
+ },
+ "match_fields": {},
+ "table_name": "process_packet_out_table"
}
},
"stateful_tables": []
},
- "2": {
+ "1": {
"containers": {
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -468,6 +382,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -477,9 +393,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -488,7 +405,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {
"0": {
@@ -538,33 +455,28 @@
},
"stateful_tables": []
},
- "3": {
+ "2": {
"containers": {
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -577,6 +489,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -586,9 +500,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -597,7 +512,69 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
+ },
+ "logical_tables": {},
+ "stateful_tables": []
+ },
+ "3": {
+ "containers": {
+ "0": "I [POV[31:0]]",
+ "1": "I [ethernet.dstAddr[39:8]]",
+ "2": "I [ethernet.srcAddr[31:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
+ "128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
+ "129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
+ "130": "I [ig_intr_md_for_tm.ucast_egress_port]",
+ "131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "132": "I [ethernet.etherType]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "257": "I [ipv4.srcAddr]",
+ "258": "I [ipv4.dstAddr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
+ "288": "I [ipv4.version, ipv4.ihl]",
+ "289": "I [ipv4.diffserv]",
+ "290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
+ "320": "I [ipv4.totalLen]",
+ "321": "I [ipv4.identification]",
+ "322": "I [ipv4.flags, ipv4.fragOffset]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -607,28 +584,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -641,6 +613,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -650,9 +624,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -661,7 +636,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -671,28 +646,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -705,6 +675,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -714,9 +686,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -725,7 +698,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -735,28 +708,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -769,6 +737,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -778,9 +748,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -789,7 +760,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -799,28 +770,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -833,6 +799,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -842,9 +810,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -853,7 +822,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -863,28 +832,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -897,6 +861,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -906,9 +872,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -917,7 +884,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -927,28 +894,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -961,6 +923,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -970,9 +934,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -981,7 +946,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -991,28 +956,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -1025,6 +985,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -1034,9 +996,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -1045,7 +1008,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -1055,28 +1018,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -1089,6 +1047,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -1098,9 +1058,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -1109,7 +1070,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/parser.context.json b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/parser.context.json
index 4027247..22409ec 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/parser.context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/parser.context.json
@@ -243,7 +243,6 @@
null,
null,
null,
- null,
{
"origin": "start",
"origin-case": 0,
@@ -281,6 +280,12 @@
"origin-mask": 511
},
{
+ "origin": "parse_tcp",
+ "origin-case": 0,
+ "state": "parse_tcp//spilled",
+ "origin-mask": 0
+ },
+ {
"origin": "parse_ipv4",
"origin-case": 0,
"state": "<leaf>",
@@ -334,7 +339,8 @@
"6": "default_parser",
"7": "parse_pkt_out",
"8": "<POV initialization>_<Ingress intrinsic metadata>_<Phase 0>",
- "9": "start"
+ "9": "start",
+ "10": "parse_tcp//spilled"
}
},
"egress": {
@@ -590,13 +596,13 @@
"origin-mask": 0
},
{
- "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"origin-case": 0,
"state": "default_parser",
"origin-mask": 0
},
{
- "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"origin-case": 0,
"state": "parse_pkt_in",
"origin-mask": 255
@@ -652,7 +658,7 @@
{
"origin": "<Shim start state>",
"origin-case": 0,
- "state": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "state": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"origin-mask": 0
}
],
@@ -665,7 +671,7 @@
"4": "parse_udp",
"5": "default_parser",
"6": "parse_pkt_out",
- "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"8": "parse_pkt_in"
}
}
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/phv.context.json b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/phv.context.json
index 8aebcde..c6938b6 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/phv.context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/context/phv.context.json
@@ -348,19 +348,6 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 0,
- "data_msb": 0,
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "container_lsb": 0,
- "container_msb": 0
- }
- ],
- "address": 64
- },
- {
- "pipeline": "ingress",
- "data": [
- {
"data_lsb": 40,
"data_msb": 47,
"name": "ethernet.dstAddr",
@@ -368,7 +355,7 @@
"container_msb": 7
}
],
- "address": 65
+ "address": 64
},
{
"pipeline": "ingress",
@@ -381,7 +368,7 @@
"container_msb": 7
}
],
- "address": 66
+ "address": 65
},
{
"pipeline": "ingress",
@@ -394,7 +381,7 @@
"container_msb": 7
}
],
- "address": 67
+ "address": 66
},
{
"pipeline": "ingress",
@@ -407,6 +394,11 @@
"container_msb": 7
}
],
+ "address": 67
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 68
},
{
@@ -469,19 +461,6 @@
"data": [
{
"data_lsb": 0,
- "data_msb": 0,
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "container_lsb": 0,
- "container_msb": 0
- }
- ],
- "address": 80
- },
- {
- "pipeline": "egress",
- "data": [
- {
- "data_lsb": 0,
"data_msb": 4,
"name": "eg_intr_md._pad7",
"container_lsb": 3,
@@ -495,7 +474,7 @@
"container_msb": 2
}
],
- "address": 81
+ "address": 80
},
{
"pipeline": "egress",
@@ -508,6 +487,11 @@
"container_msb": 7
}
],
+ "address": 81
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 82
},
{
@@ -916,39 +900,6 @@
"data": [
{
"data_lsb": 0,
- "data_msb": 8,
- "name": "ig_intr_md.ingress_port",
- "container_lsb": 0,
- "container_msb": 8
- }
- ],
- "address": 144
- },
- {
- "pipeline": "egress",
- "data": [
- {
- "data_lsb": 0,
- "data_msb": 8,
- "name": "packet_in_hdr.ingress_port",
- "container_lsb": 7,
- "container_msb": 15
- },
- {
- "data_lsb": 0,
- "data_msb": 6,
- "name": "packet_in_hdr._padding",
- "container_lsb": 0,
- "container_msb": 6
- }
- ],
- "address": 145
- },
- {
- "pipeline": "egress",
- "data": [
- {
- "data_lsb": 0,
"data_msb": 6,
"name": "eg_intr_md._pad0",
"container_lsb": 9,
@@ -962,6 +913,16 @@
"container_msb": 8
}
],
+ "address": 144
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 145
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 146
},
{
@@ -1439,33 +1400,6 @@
"data": [
{
"data_lsb": 0,
- "data_msb": 31,
- "name": "tcp.ackNo",
- "container_lsb": 0,
- "container_msb": 31
- },
- {
- "data_lsb": 0,
- "data_msb": 15,
- "name": "udp.length_",
- "container_lsb": 16,
- "container_msb": 31
- },
- {
- "data_lsb": 0,
- "data_msb": 15,
- "name": "udp.checksum",
- "container_lsb": 0,
- "container_msb": 15
- }
- ],
- "address": 259
- },
- {
- "pipeline": "ingress",
- "data": [
- {
- "data_lsb": 0,
"data_msb": 3,
"name": "tcp.dataOffset",
"container_lsb": 28,
@@ -1498,9 +1432,23 @@
"name": "tcp.window",
"container_lsb": 0,
"container_msb": 15
+ },
+ {
+ "data_lsb": 0,
+ "data_msb": 15,
+ "name": "udp.length_",
+ "container_lsb": 16,
+ "container_msb": 31
+ },
+ {
+ "data_lsb": 0,
+ "data_msb": 15,
+ "name": "udp.checksum",
+ "container_lsb": 0,
+ "container_msb": 15
}
],
- "address": 260
+ "address": 259
},
{
"pipeline": "ingress",
@@ -1520,6 +1468,11 @@
"container_msb": 15
}
],
+ "address": 260
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 261
},
{
@@ -1853,13 +1806,29 @@
"address": 291
},
{
- "pipeline": "unused",
- "data": [],
+ "pipeline": "ingress",
+ "data": [
+ {
+ "data_lsb": 8,
+ "data_msb": 15,
+ "name": "tcp.dstPort",
+ "container_lsb": 0,
+ "container_msb": 7
+ }
+ ],
"address": 292
},
{
- "pipeline": "unused",
- "data": [],
+ "pipeline": "ingress",
+ "data": [
+ {
+ "data_lsb": 0,
+ "data_msb": 7,
+ "name": "tcp.dstPort",
+ "container_lsb": 0,
+ "container_msb": 7
+ }
+ ],
"address": 293
},
{
@@ -2111,9 +2080,9 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 0,
- "data_msb": 15,
- "name": "tcp.dstPort",
+ "data_lsb": 16,
+ "data_msb": 31,
+ "name": "tcp.seqNo",
"container_lsb": 0,
"container_msb": 15
},
@@ -2131,8 +2100,8 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 16,
- "data_msb": 31,
+ "data_lsb": 0,
+ "data_msb": 15,
"name": "tcp.seqNo",
"container_lsb": 0,
"container_msb": 15
@@ -2144,9 +2113,9 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 0,
- "data_msb": 15,
- "name": "tcp.seqNo",
+ "data_lsb": 16,
+ "data_msb": 31,
+ "name": "tcp.ackNo",
"container_lsb": 0,
"container_msb": 15
}
@@ -2154,8 +2123,16 @@
"address": 325
},
{
- "pipeline": "unused",
- "data": [],
+ "pipeline": "ingress",
+ "data": [
+ {
+ "data_lsb": 0,
+ "data_msb": 15,
+ "name": "tcp.ackNo",
+ "container_lsb": 0,
+ "container_msb": 15
+ }
+ ],
"address": 326
},
{
@@ -2324,6 +2301,20 @@
"name": "packet_out_hdr._padding",
"container_lsb": 0,
"container_msb": 6
+ },
+ {
+ "data_lsb": 0,
+ "data_msb": 8,
+ "name": "packet_in_hdr.ingress_port",
+ "container_lsb": 7,
+ "container_msb": 15
+ },
+ {
+ "data_lsb": 0,
+ "data_msb": 6,
+ "name": "packet_in_hdr._padding",
+ "container_lsb": 0,
+ "container_msb": 6
}
],
"address": 340
@@ -2482,7 +2473,7 @@
"data_lsb": 0,
"data_msb": 5,
"container_lsb": 16,
- "address": 260
+ "address": 259
}
],
"udp.length_": [
@@ -2500,7 +2491,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 16,
- "address": 261
+ "address": 260
}
],
"tcp.srcPort": [
@@ -2519,13 +2510,20 @@
"address": 291
}
],
- "udp.dstPort": [
+ "tcp.ackNo": [
+ {
+ "container_msb": 15,
+ "data_lsb": 16,
+ "data_msb": 31,
+ "container_lsb": 0,
+ "address": 325
+ },
{
"container_msb": 15,
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 323
+ "address": 326
}
],
"ethernet.etherType": [
@@ -2566,11 +2564,18 @@
],
"tcp.dstPort": [
{
- "container_msb": 15,
- "data_lsb": 0,
+ "container_msb": 7,
+ "data_lsb": 8,
"data_msb": 15,
"container_lsb": 0,
- "address": 323
+ "address": 292
+ },
+ {
+ "container_msb": 7,
+ "data_lsb": 0,
+ "data_msb": 7,
+ "container_lsb": 0,
+ "address": 293
}
],
"ig_intr_md._pad1": [
@@ -2606,7 +2611,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 5,
- "address": 68
+ "address": 67
}
],
"POV": [
@@ -2622,7 +2627,7 @@
"data_lsb": 32,
"data_msb": 39,
"container_lsb": 0,
- "address": 67
+ "address": 66
}
],
"tcp.res": [
@@ -2631,7 +2636,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 25,
- "address": 260
+ "address": 259
}
],
"ethernet.dstAddr": [
@@ -2647,7 +2652,7 @@
"data_lsb": 40,
"data_msb": 47,
"container_lsb": 0,
- "address": 65
+ "address": 64
},
{
"container_msb": 15,
@@ -2684,15 +2689,6 @@
"address": 129
}
],
- "ipv4.version": [
- {
- "container_msb": 7,
- "data_lsb": 0,
- "data_msb": 3,
- "container_lsb": 4,
- "address": 288
- }
- ],
"ethernet.srcAddr": [
{
"container_msb": 31,
@@ -2706,7 +2702,7 @@
"data_lsb": 32,
"data_msb": 39,
"container_lsb": 0,
- "address": 66
+ "address": 65
},
{
"container_msb": 7,
@@ -2785,14 +2781,14 @@
"data_lsb": 16,
"data_msb": 31,
"container_lsb": 0,
- "address": 324
+ "address": 323
},
{
"container_msb": 15,
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 325
+ "address": 324
}
],
"ipv4.ttl": [
@@ -2820,22 +2816,22 @@
"address": 291
}
],
- "tcp.ackNo": [
+ "udp.dstPort": [
{
- "container_msb": 31,
+ "container_msb": 15,
"data_lsb": 0,
- "data_msb": 31,
+ "data_msb": 15,
"container_lsb": 0,
- "address": 259
+ "address": 323
}
],
- "ig_intr_md_for_tm.copy_to_cpu": [
+ "ipv4.version": [
{
- "container_msb": 0,
+ "container_msb": 7,
"data_lsb": 0,
- "data_msb": 0,
- "container_lsb": 0,
- "address": 64
+ "data_msb": 3,
+ "container_lsb": 4,
+ "address": 288
}
],
"ipv4.srcAddr": [
@@ -2853,7 +2849,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 22,
- "address": 260
+ "address": 259
}
],
"tcp.window": [
@@ -2862,7 +2858,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 260
+ "address": 259
}
],
"ig_intr_md.ingress_port": [
@@ -2880,7 +2876,7 @@
"data_lsb": 0,
"data_msb": 3,
"container_lsb": 28,
- "address": 260
+ "address": 259
}
],
"ipv4.fragOffset": [
@@ -2907,7 +2903,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 261
+ "address": 260
}
]
},
@@ -2927,16 +2923,7 @@
"data_lsb": 0,
"data_msb": 8,
"container_lsb": 7,
- "address": 145
- }
- ],
- "tcp.checksum": [
- {
- "container_msb": 31,
- "data_lsb": 0,
- "data_msb": 15,
- "container_lsb": 16,
- "address": 269
+ "address": 340
}
],
"tcp.srcPort": [
@@ -3006,7 +2993,7 @@
"data_lsb": 0,
"data_msb": 6,
"container_lsb": 9,
- "address": 146
+ "address": 144
}
],
"eg_intr_md.egress_cos": [
@@ -3015,7 +3002,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 0,
- "address": 81
+ "address": 80
}
],
"eg_intr_md._pad7": [
@@ -3024,7 +3011,7 @@
"data_lsb": 0,
"data_msb": 4,
"container_lsb": 3,
- "address": 81
+ "address": 80
}
],
"POV": [
@@ -3033,7 +3020,7 @@
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 0,
- "address": 82
+ "address": 81
}
],
"tcp.res": [
@@ -3086,13 +3073,13 @@
"address": 266
}
],
- "packet_in_hdr._padding": [
+ "ipv4.diffserv": [
{
- "container_msb": 6,
+ "container_msb": 7,
"data_lsb": 0,
- "data_msb": 6,
+ "data_msb": 7,
"container_lsb": 0,
- "address": 145
+ "address": 297
}
],
"ipv4.totalLen": [
@@ -3104,15 +3091,6 @@
"address": 332
}
],
- "ipv4.version": [
- {
- "container_msb": 7,
- "data_lsb": 0,
- "data_msb": 3,
- "container_lsb": 4,
- "address": 296
- }
- ],
"ethernet.srcAddr": [
{
"container_msb": 31,
@@ -3136,13 +3114,13 @@
"address": 338
}
],
- "ipv4.diffserv": [
+ "packet_in_hdr._padding": [
{
- "container_msb": 7,
+ "container_msb": 6,
"data_lsb": 0,
- "data_msb": 7,
+ "data_msb": 6,
"container_lsb": 0,
- "address": 297
+ "address": 340
}
],
"ipv4.flags": [
@@ -3169,7 +3147,7 @@
"data_lsb": 0,
"data_msb": 8,
"container_lsb": 0,
- "address": 146
+ "address": 144
}
],
"packet_out_hdr.egress_port": [
@@ -3249,13 +3227,13 @@
"address": 267
}
],
- "ig_intr_md_for_tm.copy_to_cpu": [
+ "ipv4.version": [
{
- "container_msb": 0,
+ "container_msb": 7,
"data_lsb": 0,
- "data_msb": 0,
- "container_lsb": 0,
- "address": 80
+ "data_msb": 3,
+ "container_lsb": 4,
+ "address": 296
}
],
"ipv4.srcAddr": [
@@ -3285,13 +3263,13 @@
"address": 268
}
],
- "ig_intr_md.ingress_port": [
+ "tcp.checksum": [
{
- "container_msb": 8,
+ "container_msb": 31,
"data_lsb": 0,
- "data_msb": 8,
- "container_lsb": 0,
- "address": 144
+ "data_msb": 15,
+ "container_lsb": 16,
+ "address": 269
}
],
"tcp.dataOffset": [
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/default.json b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/default.json
index 01ae0ac..d082348 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/default.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/default.json
@@ -194,7 +194,7 @@
"parser_ops" : [],
"transitions" : [
{
- "value" : "0x00ff",
+ "value" : "0xff",
"mask" : null,
"next_state" : "parse_pkt_out"
},
@@ -477,55 +477,14 @@
"learn_lists" : [],
"actions" : [
{
- "name" : "add_packet_in_hdr",
- "id" : 0,
- "runtime_data" : [],
- "primitives" : [
- {
- "op" : "add_header",
- "parameters" : [
- {
- "type" : "header",
- "value" : "packet_in_hdr"
- }
- ],
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 25,
- "column" : 4,
- "source_fragment" : "add_header(packet_in_hdr)"
- }
- },
- {
- "op" : "assign",
- "parameters" : [
- {
- "type" : "field",
- "value" : ["packet_in_hdr", "ingress_port"]
- },
- {
- "type" : "field",
- "value" : ["ig_intr_md", "ingress_port"]
- }
- ],
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 26,
- "column" : 4,
- "source_fragment" : "modify_field(packet_in_hdr.ingress_port, ig_intr_md.ingress_port)"
- }
- }
- ]
- },
- {
"name" : "NoAction",
- "id" : 1,
+ "id" : 0,
"runtime_data" : [],
"primitives" : []
},
{
"name" : "set_egress_port",
- "id" : 2,
+ "id" : 1,
"runtime_data" : [
{
"name" : "port",
@@ -556,7 +515,7 @@
},
{
"name" : "send_to_cpu",
- "id" : 3,
+ "id" : 2,
"runtime_data" : [],
"primitives" : [
{
@@ -573,16 +532,50 @@
],
"source_info" : {
"filename" : "include/actions.p4",
- "line" : 21,
+ "line" : 18,
"column" : 4,
"source_fragment" : "modify_field(ig_intr_md.egress_spec, 255)"
}
+ },
+ {
+ "op" : "add_header",
+ "parameters" : [
+ {
+ "type" : "header",
+ "value" : "packet_in_hdr"
+ }
+ ],
+ "source_info" : {
+ "filename" : "include/actions.p4",
+ "line" : 19,
+ "column" : 4,
+ "source_fragment" : "add_header(packet_in_hdr)"
+ }
+ },
+ {
+ "op" : "assign",
+ "parameters" : [
+ {
+ "type" : "field",
+ "value" : ["packet_in_hdr", "ingress_port"]
+ },
+ {
+ "type" : "field",
+ "value" : ["ig_intr_md", "ingress_port"]
+ }
+ ],
+ "source_info" : {
+ "filename" : "include/actions.p4",
+ "line" : 20,
+ "column" : 4,
+ "source_fragment" : "modify_field(packet_in_hdr.ingress_port, ig_intr_md.ingress_port)"
+ }
}
]
},
{
"name" : "_drop",
- "id" : 4,
+ "id" : 3,
"runtime_data" : [],
"primitives" : [
{
@@ -607,8 +600,8 @@
]
},
{
- "name" : "_packet_out",
- "id" : 5,
+ "name" : "_process_packet_out",
+ "id" : 4,
"runtime_data" : [],
"primitives" : [
{
@@ -649,7 +642,7 @@
},
{
"name" : "count_egress",
- "id" : 6,
+ "id" : 5,
"runtime_data" : [],
"primitives" : [
{
@@ -701,7 +694,7 @@
},
{
"name" : "count_ingress",
- "id" : 7,
+ "id" : 6,
"runtime_data" : [],
"primitives" : [
{
@@ -759,37 +752,8 @@
"init_table" : "node_2",
"tables" : [
{
- "name" : "ingress_pkt",
- "id" : 0,
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 11,
- "column" : 0,
- "source_fragment" : "table ingress_pkt { ..."
- },
- "key" : [],
- "match_type" : "exact",
- "type" : "simple",
- "max_size" : 1024,
- "with_counters" : false,
- "support_timeout" : false,
- "direct_meters" : null,
- "action_ids" : [5],
- "actions" : ["_packet_out"],
- "base_default_next" : "node_4",
- "next_tables" : {
- "_packet_out" : "node_4"
- },
- "default_entry" : {
- "action_id" : 5,
- "action_const" : false,
- "action_data" : [],
- "action_entry_const" : false
- }
- },
- {
"name" : "table0",
- "id" : 1,
+ "id" : 0,
"source_info" : {
"filename" : "default.p4",
"line" : 8,
@@ -824,17 +788,46 @@
"with_counters" : true,
"support_timeout" : false,
"direct_meters" : null,
- "action_ids" : [2, 3, 4, 1],
+ "action_ids" : [1, 2, 3, 0],
"actions" : ["set_egress_port", "send_to_cpu", "_drop", "NoAction"],
- "base_default_next" : "node_6",
+ "base_default_next" : "node_4",
"next_tables" : {
- "set_egress_port" : "node_6",
- "send_to_cpu" : "node_6",
- "_drop" : "node_6",
- "NoAction" : "node_6"
+ "set_egress_port" : "node_4",
+ "send_to_cpu" : "node_4",
+ "_drop" : "node_4",
+ "NoAction" : "node_4"
},
"default_entry" : {
- "action_id" : 1,
+ "action_id" : 0,
+ "action_const" : false,
+ "action_data" : [],
+ "action_entry_const" : false
+ }
+ },
+ {
+ "name" : "process_packet_out_table",
+ "id" : 1,
+ "source_info" : {
+ "filename" : "include/packet_io.p4",
+ "line" : 11,
+ "column" : 0,
+ "source_fragment" : "table process_packet_out_table { ..."
+ },
+ "key" : [],
+ "match_type" : "exact",
+ "type" : "simple",
+ "max_size" : 1024,
+ "with_counters" : false,
+ "support_timeout" : false,
+ "direct_meters" : null,
+ "action_ids" : [4],
+ "actions" : ["_process_packet_out"],
+ "base_default_next" : "node_6",
+ "next_tables" : {
+ "_process_packet_out" : "node_6"
+ },
+ "default_entry" : {
+ "action_id" : 4,
"action_const" : false,
"action_data" : [],
"action_entry_const" : false
@@ -856,14 +849,14 @@
"with_counters" : false,
"support_timeout" : false,
"direct_meters" : null,
- "action_ids" : [7],
+ "action_ids" : [6],
"actions" : ["count_ingress"],
"base_default_next" : "egress_port_count_table",
"next_tables" : {
"count_ingress" : "egress_port_count_table"
},
"default_entry" : {
- "action_id" : 7,
+ "action_id" : 6,
"action_const" : false,
"action_data" : [],
"action_entry_const" : false
@@ -885,14 +878,14 @@
"with_counters" : false,
"support_timeout" : false,
"direct_meters" : null,
- "action_ids" : [6],
+ "action_ids" : [5],
"actions" : ["count_egress"],
"base_default_next" : null,
"next_tables" : {
"count_egress" : null
},
"default_entry" : {
- "action_id" : 6,
+ "action_id" : 5,
"action_const" : false,
"action_data" : [],
"action_entry_const" : false
@@ -905,6 +898,32 @@
"name" : "node_2",
"id" : 0,
"source_info" : {
+ "filename" : "default.p4",
+ "line" : 30,
+ "column" : 12,
+ "source_fragment" : "valid(packet_out_hdr)"
+ },
+ "expression" : {
+ "type" : "expression",
+ "value" : {
+ "op" : "!=",
+ "left" : {
+ "type" : "field",
+ "value" : ["packet_out_hdr", "$valid$"]
+ },
+ "right" : {
+ "type" : "hexstr",
+ "value" : "0x01"
+ }
+ }
+ },
+ "true_next" : "table0",
+ "false_next" : "node_4"
+ },
+ {
+ "name" : "node_4",
+ "id" : 1,
+ "source_info" : {
"filename" : "include/packet_io.p4",
"line" : 19,
"column" : 8,
@@ -924,33 +943,7 @@
}
}
},
- "true_next" : "ingress_pkt",
- "false_next" : "node_4"
- },
- {
- "name" : "node_4",
- "id" : 1,
- "source_info" : {
- "filename" : "default.p4",
- "line" : 31,
- "column" : 12,
- "source_fragment" : "valid(packet_out_hdr)"
- },
- "expression" : {
- "type" : "expression",
- "value" : {
- "op" : "!=",
- "left" : {
- "type" : "field",
- "value" : ["packet_out_hdr", "$valid$"]
- },
- "right" : {
- "type" : "hexstr",
- "value" : "0x01"
- }
- }
- },
- "true_next" : "table0",
+ "true_next" : "process_packet_out_table",
"false_next" : "node_6"
},
{
@@ -984,67 +977,10 @@
{
"name" : "egress",
"id" : 1,
- "init_table" : "node_11",
- "tables" : [
- {
- "name" : "egress_pkt",
- "id" : 4,
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 29,
- "column" : 0,
- "source_fragment" : "table egress_pkt { ..."
- },
- "key" : [],
- "match_type" : "exact",
- "type" : "simple",
- "max_size" : 1024,
- "with_counters" : false,
- "support_timeout" : false,
- "direct_meters" : null,
- "action_ids" : [0],
- "actions" : ["add_packet_in_hdr"],
- "base_default_next" : null,
- "next_tables" : {
- "add_packet_in_hdr" : null
- },
- "default_entry" : {
- "action_id" : 0,
- "action_const" : false,
- "action_data" : [],
- "action_entry_const" : false
- }
- }
- ],
+ "init_table" : null,
+ "tables" : [],
"action_profiles" : [],
- "conditionals" : [
- {
- "name" : "node_11",
- "id" : 3,
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 40,
- "column" : 39,
- "source_fragment" : "=="
- },
- "expression" : {
- "type" : "expression",
- "value" : {
- "op" : "==",
- "left" : {
- "type" : "field",
- "value" : ["ig_intr_md", "ingress_port"]
- },
- "right" : {
- "type" : "hexstr",
- "value" : "0x00ff"
- }
- }
- },
- "false_next" : null,
- "true_next" : "egress_pkt"
- }
- ]
+ "conditionals" : []
}
],
"checksums" : [],
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/default.p4info b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/default.p4info
index f9b8654..168bd3b 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/default.p4info
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/default.p4info
@@ -47,12 +47,12 @@
}
tables {
preamble {
- id: 33560548
- name: "ingress_pkt"
- alias: "ingress_pkt"
+ id: 33607247
+ name: "process_packet_out_table"
+ alias: "process_packet_out_table"
}
action_refs {
- id: 16835928
+ id: 16798653
}
size: 1024
}
@@ -78,17 +78,6 @@
}
size: 1024
}
-tables {
- preamble {
- id: 33608529
- name: "egress_pkt"
- alias: "egress_pkt"
- }
- action_refs {
- id: 16835663
- }
- size: 1024
-}
actions {
preamble {
id: 16800567
@@ -124,9 +113,9 @@
}
actions {
preamble {
- id: 16835928
- name: "_packet_out"
- alias: "_packet_out"
+ id: 16798653
+ name: "_process_packet_out"
+ alias: "_process_packet_out"
}
}
actions {
@@ -143,13 +132,6 @@
alias: "count_ingress"
}
}
-actions {
- preamble {
- id: 16835663
- name: "add_packet_in_hdr"
- alias: "add_packet_in_hdr"
- }
-}
counters {
preamble {
id: 302008596
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/asm.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/asm.log
index b294de5..9328ce0 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/asm.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/asm.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: asm.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.characterize.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.characterize.log
index 1631bb2..8115d10 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.characterize.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.characterize.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: mau.characterize.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
Match+Action Resource Usage
@@ -16,16 +16,13 @@
| | | | | | | | | | ver/vld | | | | | | | | Units | Units | | | |
| | | | | | | | | | | | | | | | | | (bits) | (bits) | | | |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
-| ingress_pkt | ingress | 0 | | - | 0 (0/0/0/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| egress_pkt | egress | 0 | | - | 0 (0/0/0/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| stage 0 totals | - | - | - | - | 0 (0/0/0/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| table0 | ingress | 0 | ternary | tcam | 3 (0/0/2/0/1) | 3 | 512 / 512 (0) | 121 / 121 (0) | 4 | 19 | 0/3/0/0/0/0/0/16 | 9 / 16 (7) | 125 / 132 (7) | 19 / 32 (13) | 9 | 0 / 0 (0) | 1 in 3 (132) | 1 in 3 (132) | 91.7% / 91.7% | 98.4% / 28.1% | - / - |
+| process_packet_out_table | ingress | 0 | | - | 0 (0/0/0/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
+| stage 0 totals | - | - | - | - | 3 (0/0/2/0/1) | 3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| | | | | | | | | | | | | | | | | | | | | | |
-| table0 | ingress | 1 | ternary | tcam | 3 (0/0/2/0/1) | 3 | 512 / 512 (0) | 121 / 121 (0) | 4 | 19 | 0/3/0/0/0/0/0/16 | 9 / 16 (7) | 125 / 132 (7) | 19 / 32 (13) | 9 | 0 / 0 (0) | 1 in 3 (132) | 1 in 3 (132) | 91.7% / 91.7% | 98.4% / 28.1% | - / - |
-| stage 1 totals | - | - | - | - | 3 (0/0/2/0/1) | 3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
-| | | | | | | | | | | | | | | | | | | | | | |
-| ingress_port_count_table | ingress | 2 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| egress_port_count_table | ingress | 2 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| stage 2 totals | - | - | - | - | 4 (0/0/4/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| ingress_port_count_table | ingress | 1 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
+| egress_port_count_table | ingress | 1 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
+| stage 1 totals | - | - | - | - | 4 (0/0/4/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| | | | | | | | | | | | | | | | | | | | | | |
| overall totals | - | - | - | - | 7 (0/0/6/0/1) | 3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
@@ -74,19 +71,11 @@
Total bits: 20
+----------------------------------------------------------------+
- ingress_pkt
+ process_packet_out_table
+----------------------------------------------------------------+
Match Overhead:
- Field --instruction_address-- [1:0] (2 bits)
- Total bits: 2
-+----------------------------------------------------------------+
- egress_pkt
-+----------------------------------------------------------------+
-Match Overhead:
- Field --instruction_address-- [1:0] (2 bits)
-
- Total bits: 2
+ Total bits: 0
+----------------------------------------------------------------+
table0
+----------------------------------------------------------------+
@@ -137,28 +126,10 @@
]
+----------------------------------------------------------------+
- ingress_pkt__action__:
+ process_packet_out_table__action__:
+----------------------------------------------------------------+
-Action _packet_out:
----------------------------
-Pack Format:
- table_word_width: 128
- memory_word_width: 128
- entries_per_table_word: 1
- number_memory_units_per_table_word: 1
- entry_list: [
- entry_number : 0
- field_list : [
- ]
- Field --padding-- is 0 bits : in bits [127:0]
-]
-
-+----------------------------------------------------------------+
- egress_pkt__action__:
-+----------------------------------------------------------------+
-
-Action add_packet_in_hdr:
+Action _process_packet_out:
---------------------------
Pack Format:
table_word_width: 128
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.config.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.config.log
index 46ab806..b397f72 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.config.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.config.log
@@ -1,13 +1,13 @@
+---------------------------------------------------------------------+
| Log file: mau.config.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
Final Stage dependencies are:
(0, 'ingress') : match
(1, 'ingress') : match
- (2, 'ingress') : match
+ (2, 'ingress') : concurrent
(3, 'ingress') : concurrent
(4, 'ingress') : concurrent
(5, 'ingress') : concurrent
@@ -29,7 +29,7 @@
(9, 'egress') : concurrent
(10, 'egress') : concurrent
(11, 'egress') : concurrent
-Action/Concurrent chaining in ingress consists of [3, 4, 5]
+Action/Concurrent chaining in ingress consists of [2, 3, 4, 5]
Action/Concurrent chaining in ingress consists of [7, 8, 9, 10, 11]
Action/Concurrent chaining in egress consists of [1, 2, 3, 4, 5]
Action/Concurrent chaining in egress consists of [7, 8, 9, 10, 11]
@@ -50,320 +50,11 @@
Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=0].mau_match_input_xbar_exact_match_enable to be 0x1. (old value = 0x0 OR new value = 0x1)
Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=0].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=1].match_input_xbar_816b_ctl_address to be 3.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=1].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 1 to come from 8-bit PHV container 3.
- That PHV byte contains {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x8. (previous value = 0x0 OR new value = 0x8)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.hash.galois_field_matrix[byte_pair_index=0][hash_bit_index=41].byte1 to be 0x2.
-Configuring dp.hashout_ctl.hash_group_ingress_enable to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_logical_table to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_thread to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_matchdata_xor_en.gateway_table_matchdata_xor_en to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid0 to be 0x3
-Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid1 to be 0x3
-Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][0] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][1] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][0] to be 0xfffffd
-Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][1] to be 0xffffff
-Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0x8
-Configuring rams.match.merge.gateway_next_table_lut[0][3] to be 0x10
-Configuring rams.match.merge.gateway_en.gateway_en to be 0x1
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_select to be 0xe
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_enable to be 0x1
-allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_logical_select to be 0x0
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_inhibit_enable to be 0x1
-Configuring rams.match.merge.gateway_payload_exact_pbus[0].gateway_payload_exact_pbus to be 0x2
-Configuring rams.match.merge.gateway_payload_data[0][1][0][0].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][1][1][0].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_data[0][1][0][1].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][1][1][1].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_match_adr[0][1][0].gateway_payload_match_adr to be 0x7ffff
-Configuring rams.match.merge.gateway_payload_match_adr[0][1][1].gateway_payload_match_adr to be 0x7ffff
-
-+------------------------------------------------------------------------
-| Working on table _condition_3 in stage 0 ---
-+------------------------------------------------------------------------
---> Stage Gateway Table for condition _condition_3 in stage 0
-Configuring rams.match.merge.predication_ctl[direction_index=1].table_thread to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring dp.imem_table_addr_egress to be 0x2 (previous_value = 0x0 OR new_value = 0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=0].adr_dist_table_thread to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=1].adr_dist_table_thread to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_egress to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_egress to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_egress to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=1].mau_match_input_xbar_exact_match_enable to be 0x1. (old value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=1].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=2][output_byte=0].match_input_xbar_816b_ctl_address to be 0.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=2][output_byte=0].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 0 to come from 8-bit PHV container 16.
- That PHV byte contains {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]}.
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=6].match_input_xbar_din_power_ctl to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x1. (previous value = 0x1 OR new value = 0x1)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.hash.galois_field_matrix[byte_pair_index=0][hash_bit_index=40].byte0 to be 0x1.
-Configuring dp.hashout_ctl.hash_group_egress_enable to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring rams.array.row[row=7].vh_xbar[search_bus_index=0].exactmatch_row_vh_xbar_ctl.exactmatch_row_vh_xbar_select to be 0.
-Configuring rams.array.row[row=7].vh_xbar[search_bus_index=0].exactmatch_row_vh_xbar_ctl.exactmatch_row_vh_xbar_enable to be 1.
-Configuring rams.array.row[row=7].vh_adr_xbar.exactmatch_row_hashadr_xbar_ctl[search_bus_index=0].enabled_3bit_muxctl_select to be 0.
-Configuring rams.array.row[row=7].vh_adr_xbar.exactmatch_row_hashadr_xbar_ctl[search_bus_index=0].enabled_3bit_muxctl_enable to be 1.
-Configuring cfg_regs.mau_cfg_lt_thread.mau_cfg_lt_thread to be 0x2. (previous value = 0x0 OR new value = 0x2)
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_data0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_data1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_hash0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_hash1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_logical_table to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_thread to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_matchdata_xor_en.gateway_table_matchdata_xor_en to be 0x0
-Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[3].gateway_table_entry_versionvalid0 to be 0x3
-Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[3].gateway_table_entry_versionvalid1 to be 0x3
-Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[3][0] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[3][1] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][0] to be 0xfffffe
-Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][1] to be 0xffffff
-Configuring rams.match.merge.gateway_inhibit_lut[1] to be 0x8
-Configuring rams.match.merge.gateway_next_table_lut[1][3] to be 0xff
-Configuring rams.match.merge.gateway_en.gateway_en to be 0x3 (previous value 0x1 OR new value 0x2)
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_select to be 0xf
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_enable to be 0x1
-allocated_result_bus = Ram Data Bus MatchResult1R 0 left_and_right is 83 bits
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[0].exact_logical_select to be 0x1
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[0].exact_inhibit_enable to be 0x1
-Configuring rams.match.merge.gateway_payload_exact_pbus[0].gateway_payload_exact_pbus to be 0x3 (previous value 0x2 OR new value 0x1)
-Configuring rams.match.merge.gateway_payload_data[0][0][0][0].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][0][1][0].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_data[0][0][0][1].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][0][1][1].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_match_adr[0][0][0].gateway_payload_match_adr to be 0x7ffff
-Configuring rams.match.merge.gateway_payload_match_adr[0][0][1].gateway_payload_match_adr to be 0x7ffff
-
-+------------------------------------------------------------------------
-| Working on table ingress_pkt__action__ in stage 0 ---
-+------------------------------------------------------------------------
---> Action Data Table ingress_pkt__action__ with logical_table_id 0 that is reference type is 'direct'
-
-+------------------------------------------------------------------------
-| Working on table ingress_pkt in stage 0 ---
-+------------------------------------------------------------------------
---> Match Table with no key ingress_pkt with logical_table_id 0
-allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
-Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_select to be 0 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_select to be 0 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.mau_action_instruction_adr_default[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_default to be 0x0.
-Configuring rams.match.merge.mau_action_instruction_adr_mask[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_mask to be 0x1.
-Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x10.
-Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=0][entry_index=0].mau_action_instruction_adr_map_data to be 0x2080.
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=0][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
-Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=0].imem_subword16_instr to be 0x74412.
-Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=0].imem_subword16_color to be 1.
-Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=0].imem_subword16_parity to be 0.
-Micro instruction added in VLIW 0 for 16-bit position 2 for table ingress_pkt.
- Assembled as 0x74412 (or decimal 476178)
- Micro Instruction deposit-field for PHV Container 130 has bit width 23
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-
-Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=0].imem_subword8_instr to be 0x74d83.
-Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=0].imem_subword8_color to be 1.
-Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=0].imem_subword8_parity to be 1.
-Micro instruction added in VLIW 0 for 8-bit position 3 for table ingress_pkt.
- Assembled as 0x74d83 (or decimal 478595)
- Micro Instruction deposit-field for PHV Container 67 has bit width 20
- Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x8. (previous value = 0x0 OR new value = 0x8)
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x6. (previous value = 0x0 OR new value = 0x6)
-Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=1].action_instruction_adr_payload_shifter_en to be 1.
-
-+------------------------------------------------------------------------
-| Working on table egress_pkt__action__ in stage 0 ---
-+------------------------------------------------------------------------
---> Action Data Table egress_pkt__action__ with logical_table_id 1 that is reference type is 'direct'
-
-+------------------------------------------------------------------------
-| Working on table egress_pkt in stage 0 ---
-+------------------------------------------------------------------------
---> Match Table with no key egress_pkt with logical_table_id 1
-allocated_result_bus = Ram Data Bus MatchResult1R 0 left_and_right is 83 bits
-Configuring dp.imem_table_addr_egress to be 0x2 (previous_value = 0x2 OR new_value = 0x2).
-Configuring rams.match.merge.predication_ctl[direction_index=1].table_thread to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_egress to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_egress to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_egress to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=0].adr_dist_table_thread to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=1].adr_dist_table_thread to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=0].enabled_4bit_muxctl_select to be 1 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=0].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=0].enabled_4bit_muxctl_select to be 1 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=0].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.mau_action_instruction_adr_default[table_type_index=0][physical_result_bus=0].mau_action_instruction_adr_default to be 0x0.
-Configuring rams.match.merge.mau_action_instruction_adr_mask[table_type_index=0][physical_result_bus=0].mau_action_instruction_adr_mask to be 0x1.
-Configuring rams.match.merge.next_table_format_data[logical_table_id=1].match_next_table_adr_miss_value to be 0xff.
-Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x3 (previous_value=0x1 OR new_value=0x2).
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=0].mau_action_instruction_adr_map_data to be 0x2080.
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
-Configuring dp.imem.imem_subword8[unit_number=18][vliw_instruction_number=0].imem_subword8_instr to be 0x592.
-Configuring dp.imem.imem_subword8[unit_number=18][vliw_instruction_number=0].imem_subword8_color to be 1.
-Configuring dp.imem.imem_subword8[unit_number=18][vliw_instruction_number=0].imem_subword8_parity to be 0.
-Micro instruction added in VLIW 0 for 8-bit position 18 for table egress_pkt.
- Assembled as 0x592 (or decimal 1426)
- Micro Instruction deposit-field for PHV Container 82 has bit width 20
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x0 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x0 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-Configuring dp.imem.imem_subword16[unit_number=17][vliw_instruction_number=0].imem_subword16_instr to be 0x39fc01.
-Configuring dp.imem.imem_subword16[unit_number=17][vliw_instruction_number=0].imem_subword16_color to be 1.
-Configuring dp.imem.imem_subword16[unit_number=17][vliw_instruction_number=0].imem_subword16_parity to be 0.
-Micro instruction added in VLIW 0 for 16-bit position 17 for table egress_pkt.
- Assembled as 0x39fc01 (or decimal 3800065)
- Micro Instruction deposit-field for PHV Container 145 has bit width 23
- Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
-
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=6].actionmux_din_power_ctl to be 0x4. (previous value = 0x0 OR new value = 0x4)
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=10].actionmux_din_power_ctl to be 0x3. (previous value = 0x0 OR new value = 0x3)
-Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=0].action_instruction_adr_payload_shifter_en to be 1.
-+------------------------------------------------------------------------
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 10.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 0.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 1.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 10.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay1 to be 0.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 1.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=0].adr_dist_pipe_delay to be 0.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=1].adr_dist_pipe_delay to be 0.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=0].adr_dist_pipe_delay to be 0.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=1].adr_dist_pipe_delay to be 0.
-Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x3.
-Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=1].exact_match_phys_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x3.
-Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=1].exact_match_phys_result_en to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=0].exact_match_phys_result_thread to be 0x1.
-Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=1].exact_match_phys_result_thread to be 0x0.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_internal_delay_fifo to be 14.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_output_delay_fifo to be 19.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_delay_fifo_en to be 1.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_internal_delay_fifo to be 14.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_output_delay_fifo to be 0.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_delay_fifo_en to be 1.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_ingress to be 0x0.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_egress to be 0x0.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_ingress to be 0x0.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_egress to be 0x0.
---------------------------------------------
-Configuration for unused statistics ALUs.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=0].mau_cfg_stats_alu_lt to be 0xf.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=1].mau_cfg_stats_alu_lt to be 0xf.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=2].mau_cfg_stats_alu_lt to be 0xf.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=3].mau_cfg_stats_alu_lt to be 0xf.
-+------------------------------------------------------------------------
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
-Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_delay to be 0.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_delay to be 0.
-Configuring rams.match.merge.tcam_match_error_ctl[dir=1].tcam_match_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.tind_ecc_error_ctl[dir=1].tind_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_delay to be 0.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_delay to be 0.
-+------------------------------------------------------------------------
-Configuring dp.action_output_delay[direction_index=0].action_output_delay to be 17.
-Configuring dp.pipelength_added_stages[direction_index=0].pipelength_added_stages to be 0.
-Configuring dp.cur_stage_dependency_on_prev[direction_index=0].cur_stage_dependency_on_prev to be 0.
-Configuring dp.next_stage_dependency_on_cur[direction_index=0].next_stage_dependency_on_cur to be 0.
-Configuring dp.action_output_delay[direction_index=1].action_output_delay to be 17.
-Configuring dp.pipelength_added_stages[direction_index=1].pipelength_added_stages to be 0.
-Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 0.
-Configuring dp.next_stage_dependency_on_cur[direction_index=1].next_stage_dependency_on_cur to be 2.
-Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 0.
-Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 0.
-Configuring dp.phv_fifo_enable.phv_fifo_ingress_action_output_enable to be 1.
-Configuring dp.phv_fifo_enable.phv_fifo_ingress_final_output_enable to be 0.
-Configuring dp.phv_fifo_enable.phv_fifo_egress_action_output_enable to be 1.
-Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
-
-+------------------------------------------------------------------------
-| MAU Stage 1
-+------------------------------------------------------------------------
-
-+------------------------------------------------------------------------
-| Working on table _condition_1 in stage 1 ---
-+------------------------------------------------------------------------
---> Stage Gateway Table for condition _condition_1 in stage 1
-Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=0].mau_match_input_xbar_exact_match_enable to be 0x1. (old value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=0].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=0].match_input_xbar_816b_ctl_address to be 3.
+Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=0].match_input_xbar_816b_ctl_address to be 2.
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=0].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 0 to come from 8-bit PHV container 3.
+Configuring match input crossbar byte 0 to come from 8-bit PHV container 2.
That PHV byte contains {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x8. (previous value = 0x0 OR new value = 0x8)
+Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x4. (previous value = 0x0 OR new value = 0x4)
Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x1. (previous value = 0x0 OR new value = 0x1)
Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
Configuring dp.xbar_hash.hash.galois_field_matrix[byte_pair_index=0][hash_bit_index=40].byte0 to be 0x2.
@@ -386,7 +77,7 @@
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][0] to be 0xffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][1] to be 0xfffffe
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0x10
-Configuring rams.match.merge.gateway_next_table_lut[0][4] to be 0x20
+Configuring rams.match.merge.gateway_next_table_lut[0][4] to be 0x1
Configuring rams.match.merge.gateway_en.gateway_en to be 0x1
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_select to be 0xf
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_enable to be 0x1
@@ -396,22 +87,125 @@
Configuring rams.match.merge.gateway_payload_match_adr[0][0][1].gateway_payload_match_adr to be 0x7ffff
+------------------------------------------------------------------------
-| Working on table table0__action__ in stage 1 ---
+| Working on table process_packet_out_table__action__ in stage 0 ---
++------------------------------------------------------------------------
+--> Action Data Table process_packet_out_table__action__ with logical_table_id 1 that is reference type is 'direct'
+
++------------------------------------------------------------------------
+| Working on table process_packet_out_table in stage 0 ---
++------------------------------------------------------------------------
+--> Match Table with no key process_packet_out_table with logical_table_id 1
+allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
+Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_select to be 1 (logical table id).
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_select to be 1 (logical table id).
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
+Configuring rams.match.merge.mau_action_instruction_adr_default[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_default to be 0x40.
+Configuring rams.match.merge.mau_action_instruction_adr_mask[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_mask to be 0x0.
+Configuring rams.match.merge.next_table_format_data[logical_table_id=1].match_next_table_adr_miss_value to be 0x10.
+Configuring rams.match.merge.next_table_format_data[logical_table_id=1].match_next_table_adr_default to be 0x10.
+Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x2 (previous_value=0x0 OR new_value=0x2).
+Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=0].mau_action_instruction_adr_map_data to be 0x44.
+Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=2].imem_subword16_instr to be 0x74412.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=2].imem_subword16_color to be 0.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=2].imem_subword16_parity to be 1.
+Micro instruction added in VLIW 2 for 16-bit position 2 for table process_packet_out_table.
+ Assembled as 0x74412 (or decimal 476178)
+ Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+Configuring dp.imem.imem_subword8[unit_number=2][vliw_instruction_number=2].imem_subword8_instr to be 0x74d82.
+Configuring dp.imem.imem_subword8[unit_number=2][vliw_instruction_number=2].imem_subword8_color to be 0.
+Configuring dp.imem.imem_subword8[unit_number=2][vliw_instruction_number=2].imem_subword8_parity to be 1.
+Micro instruction added in VLIW 2 for 8-bit position 2 for table process_packet_out_table.
+ Assembled as 0x74d82 (or decimal 478594)
+ Micro Instruction deposit-field for PHV Container 66 has bit width 20
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
+ Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
+ Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
+ Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
+
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x4. (previous value = 0x0 OR new value = 0x4)
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x6. (previous value = 0x0 OR new value = 0x6)
+--> Stage Gateway Table for condition process_packet_out_table_always_true_condition in stage 0
+Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=0].mau_match_input_xbar_exact_match_enable to be 0x1. (old value = 0x1 OR new value = 0x0)
+Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=0].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
+Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x1. (previous value = 0x1 OR new value = 0x0)
+Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
+Configuring dp.hashout_ctl.hash_group_ingress_enable to be 0x1. (previous value = 0x1 OR new value = 0x1)
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data0_select to be 0x1
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data1_select to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash0_select to be 0x1
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash1_select to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_logical_table to be 0x1
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_thread to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_matchdata_xor_en.gateway_table_matchdata_xor_en to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid0 to be 0x3
+Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid1 to be 0x3
+Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][0] to be 0xffffffff
+Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][1] to be 0xffffffff
+Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][0] to be 0xffffff
+Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][1] to be 0xffffff
+Configuring rams.match.merge.gateway_inhibit_lut[1] to be 0x8
+Configuring rams.match.merge.gateway_next_table_lut[1][3] to be 0x10
+Configuring rams.match.merge.gateway_inhibit_lut[1] to be 0x18 (previous value 0x8 OR new value 0x10)
+Configuring rams.match.merge.gateway_next_table_lut[1][4] to be 0x10
+Configuring rams.match.merge.gateway_en.gateway_en to be 0x3 (previous value 0x1 OR new value 0x2)
+Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_select to be 0xe
+Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_enable to be 0x1
+allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
+Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_logical_select to be 0x1
+Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_inhibit_enable to be 0x1
+Configuring rams.match.merge.gateway_payload_exact_pbus[0].gateway_payload_exact_pbus to be 0x2
+Configuring rams.match.merge.gateway_payload_data[0][1][0][0].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_data[0][1][1][0].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_data[0][1][0][1].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_data[0][1][1][1].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_match_adr[0][1][0].gateway_payload_match_adr to be 0x7ffff
+Configuring rams.match.merge.gateway_payload_match_adr[0][1][1].gateway_payload_match_adr to be 0x7ffff
+Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=1].action_instruction_adr_payload_shifter_en to be 1.
+
++------------------------------------------------------------------------
+| Working on table table0__action__ in stage 0 ---
+------------------------------------------------------------------------
--> Action Data Table table0__action__ with logical_table_id 0 that is reference type is 'direct'
Configuring rams.match.adrdist.immediate_data_16b_ixbar_ctl[logical_table_concat_hi_lo_half=0].enabled_4bit_muxctl_select to be 4.
Configuring rams.match.adrdist.immediate_data_16b_ixbar_ctl[logical_table_concat_hi_lo_half=0].enabled_4bit_muxctl_enable to be 1.
+------------------------------------------------------------------------
-| Working on table table0 in stage 1 ---
+| Working on table table0 in stage 0 ---
+------------------------------------------------------------------------
--> Ternary Match Table table0 with logical_table_id 0
-Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
+Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x1).
Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=1][result_bus_number=0].enabled_4bit_muxctl_select to be 0 (logical table id).
Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=1][result_bus_number=0].enabled_4bit_muxctl_enable to be 1.
Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=3][result_bus_number=0].enabled_4bit_muxctl_select to be 0 (logical table id).
@@ -423,8 +217,8 @@
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=1][logical_table=0][entry_index=0].mau_action_instruction_adr_map_data to be 0x870a080.
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=1][logical_table=0][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
Configuring rams.match.merge.next_table_map_en to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data0 to be 0x20.
-Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x20.
+Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data0 to be 0x10.
+Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x10.
Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_mask to be 0x0.
Configuring rams.match.merge.mau_immediate_data_mask[table_type_index=1][result_bus_number=0].mau_immediate_data_mask to be 0xffff.
Configuring rams.match.merge.mau_stats_adr_mask[table_type_index=1][result_bus_number=0].mau_stats_adr_mask to be 0xffffe.
@@ -488,19 +282,19 @@
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=141].match_input_xbar_816b_ctl_enable to be 1.
Configuring match input crossbar byte 141 to come from 16-bit PHV container 3.
That PHV byte contains {ethernet.dstAddr[7:0]}.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=142].match_input_xbar_816b_ctl_address to be 2.
+Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=142].match_input_xbar_816b_ctl_address to be 1.
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=142].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 142 to come from 8-bit PHV container 2.
+Configuring match input crossbar byte 142 to come from 8-bit PHV container 1.
That PHV byte contains {ethernet.srcAddr[39:32]}.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=143].match_input_xbar_816b_ctl_address to be 1.
+Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=143].match_input_xbar_816b_ctl_address to be 0.
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=143].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 143 to come from 8-bit PHV container 1.
+Configuring match input crossbar byte 143 to come from 8-bit PHV container 0.
That PHV byte contains {ethernet.dstAddr[47:40]}.
Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=0].match_input_xbar_din_power_ctl to be 0x6. (previous value = 0x0 OR new value = 0x6)
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0xe. (previous value = 0x8 OR new value = 0x6)
+Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x7. (previous value = 0x4 OR new value = 0x3)
Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=8].match_input_xbar_din_power_ctl to be 0x19. (previous value = 0x0 OR new value = 0x19)
---> Idletime Table for match table table0 in stage 1
+--> Idletime Table for match table table0 in stage 0
Looking at Map RAM: Row 7 Unit 0
Configuring rams.map_alu.row[row=7].vh_xbars.adr_dist_idletime_adr_xbar_ctl[map_ram_index=0].enabled_4bit_muxctl_select to be select of 0.
Configuring rams.map_alu.row[row=7].vh_xbars.adr_dist_idletime_adr_xbar_ctl[map_ram_index=0].enabled_4bit_muxctl_select to be select of 1.
@@ -557,14 +351,29 @@
Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x4. (previous value = 0x0 OR new value = 0x4)
-Configuring dp.imem.imem_subword8[unit_number=0][vliw_instruction_number=1].imem_subword8_instr to be 0x590.
-Configuring dp.imem.imem_subword8[unit_number=0][vliw_instruction_number=1].imem_subword8_color to be 0.
-Configuring dp.imem.imem_subword8[unit_number=0][vliw_instruction_number=1].imem_subword8_parity to be 0.
-Micro instruction added in VLIW 1 for 8-bit position 0 for table table0.
- Assembled as 0x590 (or decimal 1424)
- Micro Instruction deposit-field for PHV Container 64 has bit width 20
- Field Src2 [3:0] : 0x0 (4 bits in instruction bits [3:0])
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x6. (previous value = 0x6 OR new value = 0x4)
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=1].imem_subword16_instr to be 0x4602.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=1].imem_subword16_color to be 0.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=1].imem_subword16_parity to be 0.
+Micro instruction added in VLIW 1 for 16-bit position 2 for table table0.
+ Assembled as 0x4602 (or decimal 17922)
+ Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+Configuring dp.imem.imem_subword8[unit_number=2][vliw_instruction_number=1].imem_subword8_instr to be 0x592.
+Configuring dp.imem.imem_subword8[unit_number=2][vliw_instruction_number=1].imem_subword8_color to be 0.
+Configuring dp.imem.imem_subword8[unit_number=2][vliw_instruction_number=1].imem_subword8_parity to be 1.
+Micro instruction added in VLIW 1 for 8-bit position 2 for table table0.
+ Assembled as 0x592 (or decimal 1426)
+ Micro Instruction deposit-field for PHV Container 66 has bit width 20
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -573,14 +382,30 @@
Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=1].imem_subword8_instr to be 0xb7d94.
-Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=1].imem_subword8_color to be 1.
-Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=1].imem_subword8_parity to be 1.
-Micro instruction added in VLIW 1 for 8-bit position 4 for table table0.
- Assembled as 0xb7d94 (or decimal 753044)
- Micro Instruction deposit-field for PHV Container 68 has bit width 20
- Field Src2 [3:0] : 0x4 (4 bits in instruction bits [3:0])
+Configuring dp.imem.imem_subword16[unit_number=1][vliw_instruction_number=1].imem_subword16_instr to be 0x39fc01.
+Configuring dp.imem.imem_subword16[unit_number=1][vliw_instruction_number=1].imem_subword16_color to be 0.
+Configuring dp.imem.imem_subword16[unit_number=1][vliw_instruction_number=1].imem_subword16_parity to be 1.
+Micro instruction added in VLIW 1 for 16-bit position 1 for table table0.
+ Assembled as 0x39fc01 (or decimal 3800065)
+ Micro Instruction deposit-field for PHV Container 129 has bit width 23
+ Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
+
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x4. (previous value = 0x4 OR new value = 0x4)
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x7. (previous value = 0x6 OR new value = 0x7)
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=1].imem_subword8_instr to be 0xb7d93.
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=1].imem_subword8_color to be 1.
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=1].imem_subword8_parity to be 0.
+Micro instruction added in VLIW 1 for 8-bit position 3 for table table0.
+ Assembled as 0xb7d93 (or decimal 753043)
+ Micro Instruction deposit-field for PHV Container 67 has bit width 20
+ Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -589,7 +414,7 @@
Field right_rotate [2:0] : 0x3 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x1 (1 bits in instruction bits [19:19])
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x11. (previous value = 0x1 OR new value = 0x10)
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0xc. (previous value = 0x4 OR new value = 0x8)
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=1][result_bus=0].idletime_adr_payload_shifter_en to be 1.
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=1][result_bus=0].stats_adr_payload_shifter_en to be 1.
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=1][result_bus=0].action_instruction_adr_payload_shifter_en to be 1.
@@ -702,7 +527,7 @@
Configuring cfg_regs.mau_cfg_movereg_tcam_only.mau_cfg_movereg_tcam_only to be 0x1. (previous value = 0x0 OR new value = 0x1)
+------------------------------------------------------------------------
-| Working on table table0_counter in stage 1 ---
+| Working on table table0_counter in stage 0 ---
+------------------------------------------------------------------------
Configuring rams.array.switchbox.row[row=6].ctl.r_stats_alu_o_mux_select.r_stats_alu_o_sel_stats_rd_r_i to be 1.
Configuring rams.array.row[row=6].ram[col=6].unit_ram_ctl.match_ram_write_data_mux_select to be select of 0.
@@ -788,24 +613,24 @@
Configuring rams.match.adrdist.movereg_ad_stats_alu_to_logical_xbar_ctl[logical_index=0].movereg_ad_stats_alu_to_logical_xbar_ctl be 0x7. ( previous value = 0x0 OR new value = 0x7)
Configuring rams.match.adrdist.mau_ad_stats_virt_lt[meter_alu_index=3].mau_ad_stats_virt_lt be 0x1.
+------------------------------------------------------------------------
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 21.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 9.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 3.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 12.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 1.
Configuring rams.match.merge.exact_match_delay_thread[copy_index=0].exact_match_delay_thread to be 0x1. (previous value = 0x0 OR new value = 0x1)
Configuring rams.match.merge.exact_match_delay_thread[copy_index=1].exact_match_delay_thread to be 0x1. (previous value = 0x0 OR new value = 0x1)
Configuring rams.match.merge.exact_match_delay_thread[copy_index=2].exact_match_delay_thread to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 10.
Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay1 to be 0.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 1.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=0].adr_dist_pipe_delay to be 0.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=1].adr_dist_pipe_delay to be 0.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=0].adr_dist_pipe_delay to be 0.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=1].adr_dist_pipe_delay to be 0.
-Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x1.
-Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x3.
+Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x2.
+Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x2.
Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=1].exact_match_phys_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x2.
Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=1].exact_match_phys_result_en to be 0x0.
Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=0].exact_match_phys_result_thread to be 0x0.
Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=1].exact_match_phys_result_thread to be 0x0.
@@ -828,18 +653,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -859,23 +684,23 @@
Configuring dp.next_stage_dependency_on_cur[direction_index=0].next_stage_dependency_on_cur to be 0.
Configuring dp.action_output_delay[direction_index=1].action_output_delay to be 17.
Configuring dp.pipelength_added_stages[direction_index=1].pipelength_added_stages to be 0.
-Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 2.
+Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 0.
Configuring dp.next_stage_dependency_on_cur[direction_index=1].next_stage_dependency_on_cur to be 2.
-Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 1.
-Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 2.
+Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 0.
+Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 0.
Configuring dp.phv_fifo_enable.phv_fifo_ingress_action_output_enable to be 1.
Configuring dp.phv_fifo_enable.phv_fifo_ingress_final_output_enable to be 0.
Configuring dp.phv_fifo_enable.phv_fifo_egress_action_output_enable to be 1.
Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+------------------------------------------------------------------------
-| MAU Stage 2
+| MAU Stage 1
+------------------------------------------------------------------------
+------------------------------------------------------------------------
-| Working on table _condition_2 in stage 2 ---
+| Working on table _condition_2 in stage 1 ---
+------------------------------------------------------------------------
---> Stage Gateway Table for condition _condition_2 in stage 2
+--> Stage Gateway Table for condition _condition_2 in stage 1
Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
@@ -924,7 +749,7 @@
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][0] to be 0xffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][1] to be 0xffff3f
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0x8
-Configuring rams.match.merge.gateway_next_table_lut[0][3] to be 0x21
+Configuring rams.match.merge.gateway_next_table_lut[0][3] to be 0x11
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[2].gateway_table_entry_versionvalid0 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[2].gateway_table_entry_versionvalid1 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[2][0] to be 0xffffffff
@@ -932,15 +757,15 @@
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[2][0] to be 0xffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[2][1] to be 0xff7fff
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0xc (previous value 0x8 OR new value 0x4)
-Configuring rams.match.merge.gateway_next_table_lut[0][2] to be 0x21
+Configuring rams.match.merge.gateway_next_table_lut[0][2] to be 0x11
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[1].gateway_table_entry_versionvalid0 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[1].gateway_table_entry_versionvalid1 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[1][0] to be 0xffffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[1][1] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[1][0] to be 0xffff
+Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[1][0] to be 0x1ffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[1][1] to be 0xffff
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0xe (previous value 0xc OR new value 0x2)
-Configuring rams.match.merge.gateway_next_table_lut[0][1] to be 0x21
+Configuring rams.match.merge.gateway_next_table_lut[0][1] to be 0x11
Configuring rams.match.merge.gateway_en.gateway_en to be 0x1
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_select to be 0xf
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_enable to be 0x1
@@ -956,12 +781,12 @@
Configuring rams.match.merge.gateway_payload_match_adr[0][1][1].gateway_payload_match_adr to be 0x7ffff
+------------------------------------------------------------------------
-| Working on table ingress_port_count_table__action__ in stage 2 ---
+| Working on table ingress_port_count_table__action__ in stage 1 ---
+------------------------------------------------------------------------
--> Action Data Table ingress_port_count_table__action__ with logical_table_id 0 that is reference type is 'direct'
+------------------------------------------------------------------------
-| Working on table ingress_port_count_table in stage 2 ---
+| Working on table ingress_port_count_table in stage 1 ---
+------------------------------------------------------------------------
--> Match Table with no key ingress_port_count_table with logical_table_id 0
allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
@@ -987,12 +812,12 @@
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=1].action_instruction_adr_payload_shifter_en to be 1.
+------------------------------------------------------------------------
-| Working on table egress_port_count_table__action__ in stage 2 ---
+| Working on table egress_port_count_table__action__ in stage 1 ---
+------------------------------------------------------------------------
--> Action Data Table egress_port_count_table__action__ with logical_table_id 1 that is reference type is 'direct'
+------------------------------------------------------------------------
-| Working on table egress_port_count_table in stage 2 ---
+| Working on table egress_port_count_table in stage 1 ---
+------------------------------------------------------------------------
--> Match Table with no key egress_port_count_table with logical_table_id 1
allocated_result_bus = Ram Data Bus MatchResult1R 0 left_and_right is 83 bits
@@ -1014,7 +839,7 @@
Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x3 (previous_value=0x1 OR new_value=0x2).
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=0].mau_action_instruction_adr_map_data to be 0x40.
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
---> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 2
+--> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 1
Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
@@ -1059,7 +884,7 @@
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=0].action_instruction_adr_payload_shifter_en to be 1.
+------------------------------------------------------------------------
-| Working on table ingress_port_counter in stage 2 ---
+| Working on table ingress_port_counter in stage 1 ---
+------------------------------------------------------------------------
Configuring rams.array.switchbox.row[row=4].ctl.r_stats_alu_o_mux_select.r_stats_alu_o_sel_stats_rd_r_i to be 1.
Configuring rams.array.row[row=4].ram[col=6].unit_ram_ctl.match_ram_write_data_mux_select to be select of 0.
@@ -1143,7 +968,7 @@
Configuring rams.match.adrdist.mau_ad_stats_virt_lt[meter_alu_index=2].mau_ad_stats_virt_lt be 0x1.
+------------------------------------------------------------------------
-| Working on table egress_port_counter in stage 2 ---
+| Working on table egress_port_counter in stage 1 ---
+------------------------------------------------------------------------
Configuring rams.array.switchbox.row[row=6].ctl.r_stats_alu_o_mux_select.r_stats_alu_o_sel_stats_rd_r_i to be 1.
Configuring rams.array.row[row=6].ram[col=6].unit_ram_ctl.match_ram_write_data_mux_select to be select of 0.
@@ -1262,18 +1087,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1303,6 +1128,88 @@
Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+------------------------------------------------------------------------
+| MAU Stage 2
++------------------------------------------------------------------------
++------------------------------------------------------------------------
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay1 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=0].adr_dist_pipe_delay to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=1].adr_dist_pipe_delay to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=0].adr_dist_pipe_delay to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=1].adr_dist_pipe_delay to be 0.
+Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=1].exact_match_phys_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=1].exact_match_phys_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=0].exact_match_phys_result_thread to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=1].exact_match_phys_result_thread to be 0x0.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_internal_delay_fifo to be 14.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_output_delay_fifo to be 0.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_delay_fifo_en to be 1.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_internal_delay_fifo to be 14.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_output_delay_fifo to be 0.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_delay_fifo_en to be 1.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_ingress to be 0x0.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_egress to be 0x0.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_ingress to be 0x0.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_egress to be 0x0.
+--------------------------------------------
+Configuration for unused statistics ALUs.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=0].mau_cfg_stats_alu_lt to be 0xf.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=1].mau_cfg_stats_alu_lt to be 0xf.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=2].mau_cfg_stats_alu_lt to be 0xf.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=3].mau_cfg_stats_alu_lt to be 0xf.
++------------------------------------------------------------------------
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
+Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_delay to be 0.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_delay to be 0.
+Configuring rams.match.merge.tcam_match_error_ctl[dir=1].tcam_match_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.tind_ecc_error_ctl[dir=1].tind_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_delay to be 0.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_delay to be 0.
++------------------------------------------------------------------------
+Configuring dp.action_output_delay[direction_index=0].action_output_delay to be 17.
+Configuring dp.pipelength_added_stages[direction_index=0].pipelength_added_stages to be 0.
+Configuring dp.cur_stage_dependency_on_prev[direction_index=0].cur_stage_dependency_on_prev to be 2.
+Configuring dp.next_stage_dependency_on_cur[direction_index=0].next_stage_dependency_on_cur to be 2.
+Configuring dp.action_output_delay[direction_index=1].action_output_delay to be 17.
+Configuring dp.pipelength_added_stages[direction_index=1].pipelength_added_stages to be 0.
+Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 2.
+Configuring dp.next_stage_dependency_on_cur[direction_index=1].next_stage_dependency_on_cur to be 2.
+Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 0.
+Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 3.
+Configuring dp.phv_fifo_enable.phv_fifo_ingress_action_output_enable to be 1.
+Configuring dp.phv_fifo_enable.phv_fifo_ingress_final_output_enable to be 0.
+Configuring dp.phv_fifo_enable.phv_fifo_egress_action_output_enable to be 1.
+Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+
++------------------------------------------------------------------------
| MAU Stage 3
+------------------------------------------------------------------------
+------------------------------------------------------------------------
@@ -1344,18 +1251,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1426,18 +1333,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1508,18 +1415,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1590,18 +1497,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1672,18 +1579,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1754,18 +1661,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1836,18 +1743,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1918,18 +1825,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2000,18 +1907,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2041,7 +1948,7 @@
Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+------------------------------------------------------------------------
-| Number of configuration field values set in Match-Action Stages: 1635
+| Number of configuration field values set in Match-Action Stages: 1567
+------------------------------------------------------------------------
+------------------------------------------------------------------------
@@ -2054,9 +1961,9 @@
| Stage Number | Exact | Ternary | Statistics | Meter | Selector | Stateful | Dependency |
| | | | | LPF | (max words) | | to Previous |
-----------------------------------------------------------------------------------------------
-| 0 | Yes | No | No | No | No (0) | No | match |
-| 1 | No | Yes | Yes | No | No (0) | No | match |
-| 2 | Yes | No | Yes | No | No (0) | No | match |
+| 0 | Yes | Yes | Yes | No | No (0) | No | match |
+| 1 | Yes | No | Yes | No | No (0) | No | match |
+| 2 | Yes* | No | Yes* | No | No (0) | No | concurrent |
| 3 | Yes* | No | Yes* | No | No (0) | No | concurrent |
| 4 | Yes* | No | Yes* | No | No (0) | No | concurrent |
| 5 | Yes* | No | Yes* | No | No (0) | No | concurrent |
@@ -2076,12 +1983,12 @@
| Stage Number | Exact | Ternary | Statistics | Meter | Selector | Stateful | Dependency |
| | | | | LPF | (max words) | | to Previous |
-----------------------------------------------------------------------------------------------
-| 0 | Yes | No | No | No | No (0) | No | match |
-| 1 | Yes* | No | No | No | No (0) | No | concurrent |
-| 2 | Yes* | No | No | No | No (0) | No | concurrent |
-| 3 | Yes* | No | No | No | No (0) | No | concurrent |
-| 4 | Yes* | No | No | No | No (0) | No | concurrent |
-| 5 | Yes* | No | No | No | No (0) | No | concurrent |
+| 0 | No | No | No | No | No (0) | No | match |
+| 1 | No | No | No | No | No (0) | No | concurrent |
+| 2 | No | No | No | No | No (0) | No | concurrent |
+| 3 | No | No | No | No | No (0) | No | concurrent |
+| 4 | No | No | No | No | No (0) | No | concurrent |
+| 5 | No | No | No | No | No (0) | No | concurrent |
| 6 | No | No | No | No | No (0) | No | match |
| 7 | No | No | No | No | No (0) | No | concurrent |
| 8 | No | No | No | No | No (0) | No | concurrent |
@@ -2101,9 +2008,9 @@
-----------------------------------------------------------------------------------------------------
| Stage Number | Clock Cycles | Predication Cycle | Dependency To Previous | Cycles Add To Latency |
-----------------------------------------------------------------------------------------------------
-| 0 | 20 | 11 | match | 20 |
-| 1 | 22 | 13 | match | 22 |
-| 2 | 20 | 11 | match | 20 |
+| 0 | 22 | 13 | match | 22 |
+| 1 | 20 | 11 | match | 20 |
+| 2 | 20 | 11 | concurrent | 1 |
| 3 | 20 | 11 | concurrent | 1 |
| 4 | 20 | 11 | concurrent | 1 |
| 5 | 20 | 11 | concurrent | 1 |
@@ -2115,7 +2022,7 @@
| 11 | 20 | 11 | concurrent | 1 |
-----------------------------------------------------------------------------------------------------
-Total latency for ingress: 94
+Total latency for ingress: 75
Clock Cycles Per Stage For egress:
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.gateway.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.gateway.log
index 301bc20..0a9fafe 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.gateway.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.gateway.log
@@ -1,9 +1,19 @@
+---------------------------------------------------------------------+
| Log file: mau.gateway.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
+
+========================================================
+ Run Gateway Placement on Request List of size 0
+========================================================
+
+
+========================================================
+ Run Gateway Placement on Request List of size 0
+========================================================
+
valid:
f = packet_out_hdr
const:
@@ -120,13 +130,13 @@
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (67, 0)
+ (66, 0)
Byte Position 1
- (67, 0)
+ (66, 0)
Byte Position 2
- (67, 0)
+ (66, 0)
Byte Position 3
- (67, 0)
+ (66, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -351,13 +361,13 @@
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (67, 0)
+ (66, 0)
Byte Position 1
- (67, 0)
+ (66, 0)
Byte Position 2
- (67, 0)
+ (66, 0)
Byte Position 3
- (67, 0)
+ (66, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -480,33 +490,22 @@
Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
Allocating: Gateway 15 in stage 0 for _condition_0.
-
-========================================================
- Run Gateway Placement on Request List of size 0
-========================================================
-
-
-========================================================
- Run Gateway Placement on Request List of size 0
-========================================================
-
valid:
- f = packet_out_hdr
const:
xor:
-Gateway Resource Request for P4 table _condition_1 with handle 117440514 in stage 1
+Gateway Resource Request for P4 table process_packet_out_table_always_true_condition with handle -1 in stage 0
Validity checks:
- Field --validity_check--packet_out_hdr [0:0]
+ <none>
Fields to check against constants:
<none>
Field pairs to compare to each other:
<none>
-Gateway Resource Request for table _condition_1 needs access to 1 input bits
+Gateway Resource Request for table process_packet_out_table_always_true_condition needs access to 0 input bits
========================================================
- Run Gateway Placement on Request List of size 1
+ Run Gateway Placement on Request List of size 2
========================================================
Available Gateways are: (16)
@@ -600,19 +599,19 @@
open_parity_group_ids = [0, 1]
----------------------------
- Trying to place Gateway Resource Request for table _condition_1 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
+ Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
----------------------------
--------------
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (67, 0)
+ (66, 0)
Byte Position 1
- (67, 0)
+ (66, 0)
Byte Position 2
- (67, 0)
+ (66, 0)
Byte Position 3
- (67, 0)
+ (66, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -733,11 +732,149 @@
Hash Bit Mapping:
(0, 1) --> 40
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
-Allocating: Gateway 15 in stage 1 for _condition_1.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
+Allocating: Gateway 15 in stage 0 for _condition_0.
+Available Gateways are: (15)
+Gateway 0
+Gateway 1
+Gateway 2
+Gateway 3
+Gateway 4
+Gateway 5
+Gateway 6
+Gateway 7
+Gateway 8
+Gateway 9
+Gateway 10
+Gateway 11
+Gateway 12
+Gateway 13
+Gateway 14
+------- Phase 0 -------------
+Looking at gateway table 14
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f84ff249450>, 0)])), (1, (None, [], None, [], []))])
+Search bus 0 on row 7
+----------------------------
+ Trying to place Gateway Resource Request for table process_packet_out_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
+----------------------------
+Gateway data search bus packing is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ [44] = None
+ [45] = None
+ [46] = None
+ [47] = None
+ [48] = None
+ [49] = None
+ [50] = None
+ [51] = None
+ [52] = None
+ [53] = None
+ [54] = None
+ [55] = None
+ [56] = None
+ [57] = None
+ [58] = None
+ [59] = None
+ [60] = None
+ [61] = None
+ [62] = None
+ [63] = None
+ Move Byte Mapping:
+
+Final Gateway Key is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ Hash Bit Mapping:
+
+Allocating: Gateway 14 in stage 0 for process_packet_out_table_always_true_condition.
========================================================
- Run Gateway Placement on Request List of size 1
+ Run Gateway Placement on Request List of size 2
========================================================
Available Gateways are: (16)
@@ -831,19 +968,19 @@
open_parity_group_ids = [0, 1]
----------------------------
- Trying to place Gateway Resource Request for table _condition_1 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
+ Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
----------------------------
--------------
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (67, 0)
+ (66, 0)
Byte Position 1
- (67, 0)
+ (66, 0)
Byte Position 2
- (67, 0)
+ (66, 0)
Byte Position 3
- (67, 0)
+ (66, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -964,8 +1101,146 @@
Hash Bit Mapping:
(0, 1) --> 40
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
-Allocating: Gateway 15 in stage 1 for _condition_1.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
+Allocating: Gateway 15 in stage 0 for _condition_0.
+Available Gateways are: (15)
+Gateway 0
+Gateway 1
+Gateway 2
+Gateway 3
+Gateway 4
+Gateway 5
+Gateway 6
+Gateway 7
+Gateway 8
+Gateway 9
+Gateway 10
+Gateway 11
+Gateway 12
+Gateway 13
+Gateway 14
+------- Phase 0 -------------
+Looking at gateway table 14
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f84ff27e810>, 0)])), (1, (None, [], None, [], []))])
+Search bus 0 on row 7
+----------------------------
+ Trying to place Gateway Resource Request for table process_packet_out_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
+----------------------------
+Gateway data search bus packing is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ [44] = None
+ [45] = None
+ [46] = None
+ [47] = None
+ [48] = None
+ [49] = None
+ [50] = None
+ [51] = None
+ [52] = None
+ [53] = None
+ [54] = None
+ [55] = None
+ [56] = None
+ [57] = None
+ [58] = None
+ [59] = None
+ [60] = None
+ [61] = None
+ [62] = None
+ [63] = None
+ Move Byte Mapping:
+
+Final Gateway Key is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ Hash Bit Mapping:
+
+Allocating: Gateway 14 in stage 0 for process_packet_out_table_always_true_condition.
========================================================
Run Gateway Placement on Request List of size 0
@@ -975,7 +1250,7 @@
const:
f = ig_intr_md_for_tm.ucast_egress_port
xor:
-Gateway Resource Request for P4 table _condition_2 with handle 117440515 in stage 2
+Gateway Resource Request for P4 table _condition_2 with handle 117440514 in stage 1
Validity checks:
<none>
Fields to check against constants:
@@ -1230,8 +1505,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
-Allocating: Gateway 15 in stage 2 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
+Allocating: Gateway 15 in stage 1 for _condition_2.
========================================================
Run Gateway Placement on Request List of size 1
@@ -1477,8 +1752,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
-Allocating: Gateway 15 in stage 2 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
+Allocating: Gateway 15 in stage 1 for _condition_2.
========================================================
Run Gateway Placement on Request List of size 1
@@ -1724,12 +1999,12 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
-Allocating: Gateway 15 in stage 2 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
+Allocating: Gateway 15 in stage 1 for _condition_2.
valid:
const:
xor:
-Gateway Resource Request for P4 table egress_port_count_table_always_true_condition with handle -1 in stage 2
+Gateway Resource Request for P4 table egress_port_count_table_always_true_condition with handle -1 in stage 1
Validity checks:
<none>
Fields to check against constants:
@@ -1984,8 +2259,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
-Allocating: Gateway 15 in stage 2 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
+Allocating: Gateway 15 in stage 1 for _condition_2.
Available Gateways are: (15)
Gateway 0
Gateway 1
@@ -2004,7 +2279,7 @@
Gateway 14
------- Phase 0 -------------
Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f5dd8c00750>, 0)])), (1, (None, [], None, [], []))])
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f8502ec6c90>, 0)])), (1, (None, [], None, [], []))])
Search bus 0 on row 7
----------------------------
Trying to place Gateway Resource Request for table egress_port_count_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
@@ -2123,7 +2398,7 @@
[43] = None
Hash Bit Mapping:
-Allocating: Gateway 14 in stage 2 for egress_port_count_table_always_true_condition.
+Allocating: Gateway 14 in stage 1 for egress_port_count_table_always_true_condition.
========================================================
Run Gateway Placement on Request List of size 2
@@ -2369,8 +2644,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
-Allocating: Gateway 15 in stage 2 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
+Allocating: Gateway 15 in stage 1 for _condition_2.
Available Gateways are: (15)
Gateway 0
Gateway 1
@@ -2389,7 +2664,7 @@
Gateway 14
------- Phase 0 -------------
Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f5dd4dbce50>, 0)])), (1, (None, [], None, [], []))])
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f84fec7fdd0>, 0)])), (1, (None, [], None, [], []))])
Search bus 0 on row 7
----------------------------
Trying to place Gateway Resource Request for table egress_port_count_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
@@ -2508,798 +2783,4 @@
[43] = None
Hash Bit Mapping:
-Allocating: Gateway 14 in stage 2 for egress_port_count_table_always_true_condition.
-valid:
-const:
- f = ig_intr_md_for_tm.copy_to_cpu
-xor:
-Gateway Resource Request for P4 table _condition_3 with handle 117440516 in stage 0
- Validity checks:
- <none>
- Fields to check against constants:
- Field ig_intr_md_for_tm.copy_to_cpu [0:0]
- Field pairs to compare to each other:
- <none>
-
-Gateway Resource Request for table _condition_3 needs access to 1 input bits
-
-
-========================================================
- Run Gateway Placement on Request List of size 2
-========================================================
-
-Available Gateways are: (16)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-Gateway 15
-------- Phase 0 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 13
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 12
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 11
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 10
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 9
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 8
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 7
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 6
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 5
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 4
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 3
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 2
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 1
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-Looking at gateway table 0
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-------- Phase 1 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-
- final_parity_group_ids = [(0, []), (1, [])]
-
- open_parity_group_ids = [0, 1]
-----------------------------
- Trying to place Gateway Resource Request for table _condition_3 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (80, 0)
-Byte Position 1
- (80, 0)
-Byte Position 2
- (80, 0)
-Byte Position 3
- (80, 0)
-
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 40 in hash match group 0 for ('ig_intr_md_for_tm.copy_to_cpu', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = (('ig_intr_md_for_tm.copy_to_cpu', 0), 'exact')
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (0, 0) --> 40
-
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
-Allocating: Gateway 15 in stage 0 for _condition_3.
-Available Gateways are: (15)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-------- Phase 0 -------------
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f5dd9350d50>, 0)])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-----------------------------
- Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (67, 0)
-Byte Position 1
- (67, 0)
-Byte Position 2
- (67, 0)
-Byte Position 3
- (67, 0)
-
-Removing available byte Byte 8 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 10 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 14 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 41 in hash match group 0 for ('--validity_check--packet_out_hdr', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = (('--validity_check--packet_out_hdr', 0), 'exact')
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (1, 1) --> 41
-
-Allocating: Gateway 14 in stage 0 for _condition_0.
-
-========================================================
- Run Gateway Placement on Request List of size 2
-========================================================
-
-Available Gateways are: (16)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-Gateway 15
-------- Phase 0 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 13
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 12
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 11
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 10
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 9
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 8
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 7
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 6
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 5
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 4
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 3
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 2
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 1
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-Looking at gateway table 0
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-------- Phase 1 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-
- final_parity_group_ids = [(0, []), (1, [])]
-
- open_parity_group_ids = [0, 1]
-----------------------------
- Trying to place Gateway Resource Request for table _condition_3 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (80, 0)
-Byte Position 1
- (80, 0)
-Byte Position 2
- (80, 0)
-Byte Position 3
- (80, 0)
-
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 40 in hash match group 0 for ('ig_intr_md_for_tm.copy_to_cpu', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = (('ig_intr_md_for_tm.copy_to_cpu', 0), 'exact')
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (0, 0) --> 40
-
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
-Allocating: Gateway 15 in stage 0 for _condition_3.
-Available Gateways are: (15)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-------- Phase 0 -------------
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f5dd5359d50>, 0)])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-----------------------------
- Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (67, 0)
-Byte Position 1
- (67, 0)
-Byte Position 2
- (67, 0)
-Byte Position 3
- (67, 0)
-
-Removing available byte Byte 8 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 10 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 14 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 41 in hash match group 0 for ('--validity_check--packet_out_hdr', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = (('--validity_check--packet_out_hdr', 0), 'exact')
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (1, 1) --> 41
-
-Allocating: Gateway 14 in stage 0 for _condition_0.
+Allocating: Gateway 14 in stage 1 for egress_port_count_table_always_true_condition.
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.gw.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.gw.log
index 3d1d976..d96caae 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.gw.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.gw.log
@@ -1,124 +1,79 @@
+---------------------------------------------------------------------+
| Log file: mau.gw.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
-cond _condition_0: valid packet_out_hdr
- valid packet_out_hdr
- ! not valid packet_out_hdr
-cond _condition_0 can be gateway (1+0)x1
-cond !_condition_0 can be gateway (1+0)x1
-_condition_0 is gateway for ingress_pkt
-cond _condition_1: not valid packet_out_hdr
+cond _condition_0: not valid packet_out_hdr
not valid packet_out_hdr
! not not valid packet_out_hdr
-cond _condition_1 can be gateway (1+0)x1
-cond !_condition_1 can be gateway (1+0)x1
-_condition_1 is gateway for table0
-cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 254
- ig_intr_md_for_tm.ucast_egress_port < 254
- ! ig_intr_md_for_tm.ucast_egress_port >= 254
+cond _condition_0 can be gateway (1+0)x1
+cond !_condition_0 can be gateway (1+0)x1
+_condition_0 is gateway for table0
+cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 510
+ ig_intr_md_for_tm.ucast_egress_port < 510
+ ! ig_intr_md_for_tm.ucast_egress_port >= 510
cond _condition_2 can be gateway (9+0)x1
cond !_condition_2 can be gateway (9+0)x1
_condition_2 is gateway for ingress_port_count_table
-cond _condition_3: ig_intr_md_for_tm.copy_to_cpu == 1
- ig_intr_md_for_tm.copy_to_cpu == 1
- ! ig_intr_md_for_tm.copy_to_cpu != 1
-cond _condition_3 can be gateway (0+1)x1
-cond !_condition_3 can be gateway (0+1)x2
-_condition_3 is gateway for egress_pkt
-fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f5dd974c1d0>]) and and xor_fields is OrderedSet()
+fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f85035d1d90>]) and and xor_fields is OrderedSet()
fields = OrderedSet() and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f5dd974c490>])
-fields = OrderedSet() and and xor_fields is OrderedSet()
-cond _condition_0: valid packet_out_hdr
- valid packet_out_hdr
- ! not valid packet_out_hdr
-cond _condition_0 can be gateway (1+0)x1
-cond !_condition_0 can be gateway (1+0)x1
-_condition_0 is gateway for ingress_pkt
-cond _condition_1: not valid packet_out_hdr
+cond _condition_0: not valid packet_out_hdr
not valid packet_out_hdr
! not not valid packet_out_hdr
-cond _condition_1 can be gateway (1+0)x1
-cond !_condition_1 can be gateway (1+0)x1
-_condition_1 is gateway for table0
-cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 254
- ig_intr_md_for_tm.ucast_egress_port < 254
- ! ig_intr_md_for_tm.ucast_egress_port >= 254
+cond _condition_0 can be gateway (1+0)x1
+cond !_condition_0 can be gateway (1+0)x1
+_condition_0 is gateway for table0
+cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 510
+ ig_intr_md_for_tm.ucast_egress_port < 510
+ ! ig_intr_md_for_tm.ucast_egress_port >= 510
cond _condition_2 can be gateway (9+0)x1
cond !_condition_2 can be gateway (9+0)x1
_condition_2 is gateway for ingress_port_count_table
-cond _condition_3: ig_intr_md_for_tm.copy_to_cpu == 1
- ig_intr_md_for_tm.copy_to_cpu == 1
- ! ig_intr_md_for_tm.copy_to_cpu != 1
-cond _condition_3 can be gateway (0+1)x1
-cond !_condition_3 can be gateway (0+1)x2
-_condition_3 is gateway for egress_pkt
-fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f5dd974c1d0>]) and and xor_fields is OrderedSet()
+fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f85035d1d90>]) and and xor_fields is OrderedSet()
fields = OrderedSet() and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f5dd974c490>])
-fields = OrderedSet() and and xor_fields is OrderedSet()
-cond _condition_0: valid packet_out_hdr
- valid packet_out_hdr
- ! not valid packet_out_hdr
-cond _condition_0 can be gateway (1+0)x1
-cond !_condition_0 can be gateway (1+0)x1
-_condition_0 is gateway for ingress_pkt
-cond _condition_1: not valid packet_out_hdr
+cond _condition_0: not valid packet_out_hdr
not valid packet_out_hdr
! not not valid packet_out_hdr
-cond _condition_1 can be gateway (1+0)x1
-cond !_condition_1 can be gateway (1+0)x1
-_condition_1 is gateway for table0
-cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 254
- ig_intr_md_for_tm.ucast_egress_port < 254
- ! ig_intr_md_for_tm.ucast_egress_port >= 254
+cond _condition_0 can be gateway (1+0)x1
+cond !_condition_0 can be gateway (1+0)x1
+_condition_0 is gateway for table0
+cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 510
+ ig_intr_md_for_tm.ucast_egress_port < 510
+ ! ig_intr_md_for_tm.ucast_egress_port >= 510
cond _condition_2 can be gateway (9+0)x1
cond !_condition_2 can be gateway (9+0)x1
_condition_2 is gateway for ingress_port_count_table
-cond _condition_3: ig_intr_md_for_tm.copy_to_cpu == 1
- ig_intr_md_for_tm.copy_to_cpu == 1
- ! ig_intr_md_for_tm.copy_to_cpu != 1
-cond _condition_3 can be gateway (0+1)x1
-cond !_condition_3 can be gateway (0+1)x2
-_condition_3 is gateway for egress_pkt
-fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f5dd974c1d0>]) and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f5dd974c490>])
+fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f85035d1d90>]) and and xor_fields is OrderedSet()
fields = OrderedSet() and and xor_fields is OrderedSet()
cond _always_true: True == True
True
! False
+cond _always_true: True == True
+ True
+ ! False
--> Stage Gateway Table for condition _condition_0 in stage 0
-T -> ingress_pkt(0), F -> _condition_1(16)
-building tcam for GatewayTest('valid packet_out_hdr')
- adding line (match=200000000 mask=200000000 T)
-tcam data: [(match=200000000 mask=200000000 T)]
-final.tcam: [(match=200000000 mask=200000000 T)], miss=False
---> Stage Gateway Table for condition _condition_3 in stage 0
-T -> egress_pkt(1), F -> None(255)
-building tcam for GatewayTest('ig_intr_md_for_tm.copy_to_cpu == 1')
- adding line (match=100000000 mask=100000000 T)
-tcam data: [(match=100000000 mask=100000000 T)]
-final.tcam: [(match=100000000 mask=100000000 T)], miss=False
---> Stage Gateway Table for condition _condition_1 in stage 1
-T -> table0(16), F -> _condition_2(32)
+T -> table0(0), F -> process_packet_out_table(1)
building tcam for GatewayTest('not valid packet_out_hdr')
adding line (match=0 mask=100000000 T)
tcam data: [(match=0 mask=100000000 T)]
final.tcam: [(match=0 mask=100000000 T)], miss=False
---> Stage Gateway Table for condition _condition_2 in stage 2
-T -> ingress_port_count_table(32), F -> None(255)
-building tcam for GatewayTest('ig_intr_md_for_tm.ucast_egress_port < 254')
+--> Stage Gateway Table for condition process_packet_out_table_always_true_condition in stage 0
+T -> process_packet_out_table(1), F -> process_packet_out_table(1)
+building tcam for GatewayTest('True')
+ adding line (match=0 mask=0 T)
+tcam data: [(match=0 mask=0 T)]
+final.tcam: [(match=0 mask=0 T)], miss=False
+--> Stage Gateway Table for condition _condition_2 in stage 1
+T -> ingress_port_count_table(16), F -> None(255)
+building tcam for GatewayTest('ig_intr_md_for_tm.ucast_egress_port < 510')
adding line (range=[ffff ffff 3fff] match=0 mask=0 T)
adding line (range=[ffff 7fff ffff] match=0 mask=0 T)
- adding line (range=[0 ffff ffff] match=0 mask=0 T)
-tcam data: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[0 ffff ffff] match=0 mask=0 T)]
-final.tcam: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[0 ffff ffff] match=0 mask=0 T)], miss=False
---> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 2
-T -> egress_port_count_table(33), F -> egress_port_count_table(33)
+ adding line (range=[1 ffff ffff] match=0 mask=0 T)
+tcam data: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[1 ffff ffff] match=0 mask=0 T)]
+final.tcam: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[1 ffff ffff] match=0 mask=0 T)], miss=False
+--> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 1
+T -> egress_port_count_table(17), F -> egress_port_count_table(17)
building tcam for GatewayTest('True')
adding line (match=0 mask=0 T)
tcam data: [(match=0 mask=0 T)]
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.log
index 32791d9..dbfc867 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.log
@@ -1,21 +1,21 @@
+---------------------------------------------------------------------+
| Log file: mau.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
Match Table table0 did not specify the number of entries required. A default value (512) will be used.
Match Entry Table table0 has already been associated with stat Table table0_counter.
-Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
+Cannot implement table0 in phase 0 resources because table uses side effect tables.
Match Table table0 did not specify the number of entries required. A default value (512) will be used.
Match Entry Table table0 has already been associated with stat Table table0_counter.
-Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
+Cannot implement table0 in phase 0 resources because table uses side effect tables.
Match Table table0 did not specify the number of entries required. A default value (512) will be used.
-POV/metadata bridge containers added between ingress/egress: [0, 64, 128]
+POV/metadata bridge containers added between ingress/egress: [0]
Metadata bridge_ingress_intrinsic containers added between ingress/egress: [128]
Match Entry Table table0 has already been associated with stat Table table0_counter.
Match table ingress_port_count_table has no match key fields
-Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 254.
+Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 510.
##########################################
Call to decide_action_data_placement(stage=0, table=ingress_port_count_table)
@@ -77,7 +77,7 @@
Best Ram Usage is 97 rams
Best Immediate placement is 0 bits
Match table egress_port_count_table has no match key fields
-Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 254.
+Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 510.
##########################################
Call to decide_action_data_placement(stage=0, table=egress_port_count_table)
@@ -140,16 +140,16 @@
Best Immediate placement is 0 bits
##########################################
- Call to decide_action_data_placement(stage=0, table=ingress_pkt)
+ Call to decide_action_data_placement(stage=0, table=process_packet_out_table)
##########################################
Max immediate bits used in any action is 0 bits.
-Overhead bit width for table ingress_pkt is 2 bits.
+Overhead bit width for table process_packet_out_table is 0 bits.
Bits available in overhead for non-essential immediate data is 32 bits.
~~~~~~~~~~~~~~~~~~~~~
Examining placing 0 bits in match overhead
-Overhead bit width for table ingress_pkt is 2 bits.
+Overhead bit width for table process_packet_out_table is 0 bits.
Overhead SRAMs to use = 97
Entries requested = 1024 and match entries get = 0
ram_size_matrix =
@@ -166,73 +166,13 @@
total action ram packing size = [0, 0, 0]
action_ram_packing:
- action _packet_out has []
+ action _process_packet_out has []
total action ram packing size = [0, 0, 0]
action_ram_packing:
- action _packet_out has []
+ action _process_packet_out has []
total action ram packing size = [0, 0, 0]
action_ram_packing:
- action _packet_out has []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-Action Data SRAMs to use = 0
-TODO: Total RAMs use when put 0 bits in match overhead: 97
-TODO: Total RAMs use when put 0 bits in match overhead: 97
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 8 bits in match overhead
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 16 bits in match overhead
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 24 bits in match overhead
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 32 bits in match overhead
-
-##########################################
-
-Best Ram Usage is 97 rams
-Best Immediate placement is 0 bits
-
-##########################################
- Call to decide_action_data_placement(stage=0, table=egress_pkt)
-##########################################
-
-
-Max immediate bits used in any action is 0 bits.
-Overhead bit width for table egress_pkt is 2 bits.
-Bits available in overhead for non-essential immediate data is 32 bits.
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 0 bits in match overhead
-Overhead bit width for table egress_pkt is 2 bits.
-Overhead SRAMs to use = 97
- Entries requested = 1024 and match entries get = 0
-ram_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-immediate_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-hash_to_phv_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
+ action _process_packet_out has []
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
@@ -275,7 +215,7 @@
ram_size_matrix =
(8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
0 0 0 1 0 0 0 0 # 0
- 0 0 0 0 0 0 0 0 # 1
+ 0 0 0 1 0 0 0 0 # 1
0 0 0 0 0 0 0 0 # 2
immediate_size_matrix =
@@ -293,7 +233,7 @@
total action ram packing size = [16, 0, 0]
action_ram_packing:
action set_egress_port has [(16, 16, False)]
- action send_to_cpu has []
+ action send_to_cpu has [(16, 16, False)]
action _drop has []
total action ram packing size = [16, 0, 0]
action_ram_packing:
@@ -312,7 +252,7 @@
Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)]
final packing is [(16, 16, False)]
-final packing is []
+final packing is [(16, 16, False)]
final packing is []
byte_enables = []
After allocation of 32s, available_slots is []
@@ -343,7 +283,7 @@
immediate_size_matrix =
(8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
0 0 0 1 0 0 0 0 # 0
- 0 0 0 0 0 0 0 0 # 1
+ 0 0 0 1 0 0 0 0 # 1
0 0 0 0 0 0 0 0 # 2
hash_to_phv_matrix =
@@ -360,7 +300,7 @@
total action ram packing size = [0, 16, 0]
action_ram_packing:
action set_egress_port has [(16, 16, False)]
- action send_to_cpu has []
+ action send_to_cpu has [(16, 16, False)]
action _drop has []
total action ram packing size = [0, 16, 0]
action_ram_packing:
@@ -379,7 +319,7 @@
Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)]
final packing is [(16, 16, False)]
-final packing is []
+final packing is [(16, 16, False)]
final packing is []
byte_enables = []
After allocation of 32s, available_slots is []
@@ -403,7 +343,7 @@
immediate_size_matrix =
(8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
0 0 0 1 0 0 0 0 # 0
- 0 0 0 0 0 0 0 0 # 1
+ 0 0 0 1 0 0 0 0 # 1
0 0 0 0 0 0 0 0 # 2
hash_to_phv_matrix =
@@ -420,7 +360,7 @@
total action ram packing size = [0, 16, 0]
action_ram_packing:
action set_egress_port has [(16, 16, False)]
- action send_to_cpu has []
+ action send_to_cpu has [(16, 16, False)]
action _drop has []
total action ram packing size = [0, 16, 0]
action_ram_packing:
@@ -439,7 +379,7 @@
Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)]
final packing is [(16, 16, False)]
-final packing is []
+final packing is [(16, 16, False)]
final packing is []
byte_enables = []
After allocation of 32s, available_slots is []
@@ -463,7 +403,7 @@
immediate_size_matrix =
(8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
0 0 0 1 0 0 0 0 # 0
- 0 0 0 0 0 0 0 0 # 1
+ 0 0 0 1 0 0 0 0 # 1
0 0 0 0 0 0 0 0 # 2
hash_to_phv_matrix =
@@ -480,7 +420,7 @@
total action ram packing size = [0, 16, 0]
action_ram_packing:
action set_egress_port has [(16, 16, False)]
- action send_to_cpu has []
+ action send_to_cpu has [(16, 16, False)]
action _drop has []
total action ram packing size = [0, 16, 0]
action_ram_packing:
@@ -499,7 +439,7 @@
Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)]
final packing is [(16, 16, False)]
-final packing is []
+final packing is [(16, 16, False)]
final packing is []
byte_enables = []
After allocation of 32s, available_slots is []
@@ -514,93 +454,11 @@
Best Ram Usage is 1 rams
Best Immediate placement is 16 bits
-Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
-
-----------------------------------------------
-Call to Allocate P4 Table with table ingress_pkt__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-ram_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-immediate_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-hash_to_phv_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action _packet_out has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action _packet_out has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action _packet_out has []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-Allocating Action Logical Table ID 0 in stage 0
-
-----------------------------------------------
-Call to Allocate P4 Table with table ingress_pkt, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-Logical Table ID in stage 0 was not supplied by table placement for table ingress_pkt.
-Allocating Logical Table ID 0 in stage 0
-Allocating Table Type ID 0 of type exact in stage 0
-Match Overhead:
- Field --version_valid-- [3:0] (4 bits)
- Field --instruction_address-- [1:0] (2 bits)
-
-Logical Table ID in stage 0 was not supplied by table placement for table ingress_pkt.
-Allocating Logical Table ID 0 in stage 0
-Allocating Table Type ID 0 of type exact in stage 0
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Match Table Resource Request is:
-SRAM Resource Request for table ingress_pkt (of type match), with 0 ways wants 0 rams.
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-For action _packet_out, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 130 has bit width 23
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-
-For action _packet_out, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 67 has bit width 20
- Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-Allocating Action ALU 2 (16 bits) in stage 0 for match table ingress_pkt's action _packet_out
-Allocating Action ALU 3 (8 bits) in stage 0 for match table ingress_pkt's action _packet_out
-Allocating VLIW Instruction : 0 in stage 0 for match table ingress_pkt's action _packet_out
+Cannot implement table0 in phase 0 resources because table uses side effect tables.
----------------------------------------------
Call to Allocate P4 Table with table table0__action__, number_entries = 512, table id = None, and match type = exact
- Allocating in stage 1
+ Allocating in stage 0
----------------------------------------------
ram_size_matrix =
@@ -612,7 +470,7 @@
immediate_size_matrix =
(8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
0 0 0 1 0 0 0 0 # 0
- 0 0 0 0 0 0 0 0 # 1
+ 0 0 0 1 0 0 0 0 # 1
0 0 0 0 0 0 0 0 # 2
hash_to_phv_matrix =
@@ -629,7 +487,7 @@
total action ram packing size = [0, 16, 0]
action_ram_packing:
action set_egress_port has [(16, 16, False)]
- action send_to_cpu has []
+ action send_to_cpu has [(16, 16, False)]
action _drop has []
total action ram packing size = [0, 16, 0]
action_ram_packing:
@@ -642,30 +500,30 @@
final packing is []
final packing is []
byte_enables = [1, 1]
-Allocating Action Parameter Bus Byte 32 in stage 1 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 33 in stage 1 for Byte 1 of 16-bit constant
-Allocating Action Parameter Bus Byte 34 in stage 1 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 35 in stage 1 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 32 in stage 0 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 33 in stage 0 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 34 in stage 0 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)]
final packing is [(16, 16, False)]
-final packing is []
+final packing is [(16, 16, False)]
final packing is []
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
final packing is []
final packing is []
-Allocating Action Logical Table ID 0 in stage 1
+Allocating Action Logical Table ID 0 in stage 0
----------------------------------------------
Call to Allocate P4 Table with table table0_counter, number_entries = 512, table id = None, and match type = exact
- Allocating in stage 1
+ Allocating in stage 0
----------------------------------------------
stat_stage_table referenced: direct
stat Table Resource Request is:
SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-Sram Resource Request for P4 table table0_counter with handle 67108867 of type statistics in stage 1
+Sram Resource Request for P4 table table0_counter with handle 67108867 of type statistics in stage 0
table_type : statistics
rams_for_width : 1
use_stash : False
@@ -681,12 +539,12 @@
----------------------------------------------
Call to Allocate P4 Table with table table0, number_entries = 512, table id = None, and match type = ternary
- Allocating in stage 1
+ Allocating in stage 0
----------------------------------------------
-Logical Table ID in stage 1 was not supplied by table placement for table table0.
-Allocating Logical Table ID 0 in stage 1
-Allocating Table Type ID 0 of type ternary in stage 1
+Logical Table ID in stage 0 was not supplied by table placement for table table0.
+Allocating Logical Table ID 0 in stage 0
+Allocating Table Type ID 0 of type ternary in stage 0
-----------------------------------------
Call to allocate_ternary_match_key_2
@@ -715,9 +573,9 @@
{--unused--[3:0], ethernet.dstAddr[47:40], ethernet.srcAddr[39:32], ethernet.dstAddr[7:0], ig_intr_md.ingress_port[7:0], ethernet.etherType[15:8], --version--[1:0], --unused--[1:0], ethernet.srcAddr[47:40], ethernet.dstAddr[23:16], ethernet.etherType[7:0], ethernet.dstAddr[39:24], --unused--[2:0], ig_intr_md.ingress_port[8:8], ethernet.dstAddr[15:8], ethernet.srcAddr[31:0]}
---------------------------------------------
-Call to can_any_match_key_fields_be_shared(stage=1, table=table0)
+Call to can_any_match_key_fields_be_shared(stage=0, table=table0)
---------------------------------------------
-Decided way to allocate for table table0 in stage 1 WAS non_shared
+Decided way to allocate for table table0 in stage 0 WAS non_shared
-----------------------------------------
Call to allocate_ternary_match_key_2
@@ -757,11 +615,22 @@
Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-Allocating Action ALU 2 (16 bits) in stage 1 for match table table0's action set_egress_port
-Allocating VLIW Instruction : 0 in stage 1 for match table table0's action set_egress_port
+Allocating Action ALU 2 (16 bits) in stage 0 for match table table0's action set_egress_port
+Allocating VLIW Instruction : 0 in stage 0 for match table table0's action set_egress_port
For action send_to_cpu, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 64 has bit width 20
- Field Src2 [3:0] : 0x0 (4 bits in instruction bits [3:0])
+Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+For action send_to_cpu, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 66 has bit width 20
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -770,11 +639,24 @@
Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-Allocating Action ALU 0 (8 bits) in stage 1 for match table table0's action send_to_cpu
-Allocating VLIW Instruction : 1 in stage 1 for match table table0's action send_to_cpu
+For action send_to_cpu, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 129 has bit width 23
+ Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
+
+Allocating Action ALU 2 (16 bits) in stage 0 for match table table0's action send_to_cpu
+Allocating Action ALU 2 (8 bits) in stage 0 for match table table0's action send_to_cpu
+Allocating Action ALU 1 (16 bits) in stage 0 for match table table0's action send_to_cpu
+Allocating VLIW Instruction : 1 in stage 0 for match table table0's action send_to_cpu
For action _drop, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 68 has bit width 20
- Field Src2 [3:0] : 0x4 (4 bits in instruction bits [3:0])
+Micro Instruction deposit-field for PHV Container 67 has bit width 20
+ Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -783,8 +665,8 @@
Field right_rotate [2:0] : 0x3 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x1 (1 bits in instruction bits [19:19])
-Allocating Action ALU 4 (8 bits) in stage 1 for match table table0's action _drop
-Allocating VLIW Instruction : 1 in stage 1 for match table table0's action _drop
+Allocating Action ALU 3 (8 bits) in stage 0 for match table table0's action _drop
+Allocating VLIW Instruction : 1 in stage 0 for match table table0's action _drop
Ternary table Pack Format =
Pack Format:
table_word_width: 141
@@ -821,8 +703,89 @@
----------------------------------------------
+Call to Allocate P4 Table with table process_packet_out_table__action__, number_entries = 1024, table id = None, and match type = exact
+ Allocating in stage 0
+----------------------------------------------
+
+ram_size_matrix =
+ (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
+ 0 0 0 0 0 0 0 0 # 0
+
+immediate_size_matrix =
+ (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
+ 0 0 0 0 0 0 0 0 # 0
+
+hash_to_phv_matrix =
+ (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
+ 0 0 0 0 0 0 0 0 # 0
+
+total action ram packing size = [0, 0, 0]
+action_ram_packing:
+ action _process_packet_out has []
+total action ram packing size = [0, 0, 0]
+action_ram_packing:
+ action _process_packet_out has []
+total action ram packing size = [0, 0, 0]
+action_ram_packing:
+ action _process_packet_out has []
+byte_enables = []
+After allocation of 32s, available_slots is []
+final packing is []
+byte_enables = []
+After allocation of 32s, available_slots is []
+final packing is []
+byte_enables = []
+After allocation of 32s, available_slots is []
+final packing is []
+Allocating Action Logical Table ID 1 in stage 0
+
+----------------------------------------------
+Call to Allocate P4 Table with table process_packet_out_table, number_entries = 1024, table id = None, and match type = exact
+ Allocating in stage 0
+----------------------------------------------
+
+Logical Table ID in stage 0 was not supplied by table placement for table process_packet_out_table.
+Allocating Logical Table ID 1 in stage 0
+Allocating Table Type ID 0 of type exact in stage 0
+Match Overhead:
+ Field --version_valid-- [3:0] (4 bits)
+
+Logical Table ID in stage 0 was not supplied by table placement for table process_packet_out_table.
+Allocating Logical Table ID 1 in stage 0
+Allocating Table Type ID 0 of type exact in stage 0
+Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
+Match Table Resource Request is:
+SRAM Resource Request for table process_packet_out_table (of type match), with 0 ways wants 0 rams.
+Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
+For action _process_packet_out, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+For action _process_packet_out, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 66 has bit width 20
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
+ Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
+ Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
+ Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
+
+Allocating Action ALU 2 (16 bits) in stage 0 for match table process_packet_out_table's action _process_packet_out
+Allocating Action ALU 2 (8 bits) in stage 0 for match table process_packet_out_table's action _process_packet_out
+Allocating VLIW Instruction : 2 in stage 0 for match table process_packet_out_table's action _process_packet_out
+
+----------------------------------------------
Call to Allocate P4 Table with table ingress_port_count_table__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 2
+ Allocating in stage 1
----------------------------------------------
ram_size_matrix =
@@ -855,17 +818,17 @@
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
-Allocating Action Logical Table ID 0 in stage 2
+Allocating Action Logical Table ID 0 in stage 1
----------------------------------------------
-Call to Allocate P4 Table with table ingress_port_counter, number_entries = 254, table id = None, and match type = exact
- Allocating in stage 2
+Call to Allocate P4 Table with table ingress_port_counter, number_entries = 510, table id = None, and match type = exact
+ Allocating in stage 1
----------------------------------------------
stat_stage_table referenced: indirect
stat Table Resource Request is:
SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
-Sram Resource Request for P4 table ingress_port_counter with handle 67108865 of type statistics in stage 2
+Sram Resource Request for P4 table ingress_port_counter with handle 67108865 of type statistics in stage 1
table_type : statistics
rams_for_width : 1
use_stash : False
@@ -881,20 +844,20 @@
----------------------------------------------
Call to Allocate P4 Table with table ingress_port_count_table, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 2
+ Allocating in stage 1
----------------------------------------------
-Logical Table ID in stage 2 was not supplied by table placement for table ingress_port_count_table.
-Allocating Logical Table ID 0 in stage 2
-Allocating Table Type ID 0 of type exact in stage 2
+Logical Table ID in stage 1 was not supplied by table placement for table ingress_port_count_table.
+Allocating Logical Table ID 0 in stage 1
+Allocating Table Type ID 0 of type exact in stage 1
Match Overhead:
Field --version_valid-- [3:0] (4 bits)
Field --instruction_address-- [1:0] (2 bits)
Field --statistics_pointer-- [19:0] (20 bits)
-Logical Table ID in stage 2 was not supplied by table placement for table ingress_port_count_table.
-Allocating Logical Table ID 0 in stage 2
-Allocating Table Type ID 0 of type exact in stage 2
+Logical Table ID in stage 1 was not supplied by table placement for table ingress_port_count_table.
+Allocating Logical Table ID 0 in stage 1
+Allocating Table Type ID 0 of type exact in stage 1
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
Match Table Resource Request is:
@@ -902,12 +865,12 @@
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
No micro instructions needed for action count_ingress executed from table ingress_port_count_table.
-Allocating Action ALU 0 (32 bits) in stage 2 for match table ingress_port_count_table's action count_ingress
-Allocating VLIW Instruction : 0 in stage 2 for match table ingress_port_count_table's action count_ingress
+Allocating Action ALU 0 (32 bits) in stage 1 for match table ingress_port_count_table's action count_ingress
+Allocating VLIW Instruction : 0 in stage 1 for match table ingress_port_count_table's action count_ingress
----------------------------------------------
Call to Allocate P4 Table with table egress_port_count_table__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 2
+ Allocating in stage 1
----------------------------------------------
ram_size_matrix =
@@ -940,17 +903,17 @@
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
-Allocating Action Logical Table ID 1 in stage 2
+Allocating Action Logical Table ID 1 in stage 1
----------------------------------------------
-Call to Allocate P4 Table with table egress_port_counter, number_entries = 254, table id = None, and match type = exact
- Allocating in stage 2
+Call to Allocate P4 Table with table egress_port_counter, number_entries = 510, table id = None, and match type = exact
+ Allocating in stage 1
----------------------------------------------
stat_stage_table referenced: indirect
stat Table Resource Request is:
SRAM Resource Request for table egress_port_counter (of type statistics), with 1 ways wants 2 rams.
-Sram Resource Request for P4 table egress_port_counter with handle 67108866 of type statistics in stage 2
+Sram Resource Request for P4 table egress_port_counter with handle 67108866 of type statistics in stage 1
table_type : statistics
rams_for_width : 1
use_stash : False
@@ -968,19 +931,19 @@
----------------------------------------------
Call to Allocate P4 Table with table egress_port_count_table, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 2
+ Allocating in stage 1
----------------------------------------------
-Logical Table ID in stage 2 was not supplied by table placement for table egress_port_count_table.
-Allocating Logical Table ID 1 in stage 2
-Allocating Table Type ID 1 of type exact in stage 2
+Logical Table ID in stage 1 was not supplied by table placement for table egress_port_count_table.
+Allocating Logical Table ID 1 in stage 1
+Allocating Table Type ID 1 of type exact in stage 1
Match Overhead:
Field --version_valid-- [3:0] (4 bits)
Field --statistics_pointer-- [19:0] (20 bits)
-Logical Table ID in stage 2 was not supplied by table placement for table egress_port_count_table.
-Allocating Logical Table ID 1 in stage 2
-Allocating Table Type ID 1 of type exact in stage 2
+Logical Table ID in stage 1 was not supplied by table placement for table egress_port_count_table.
+Allocating Logical Table ID 1 in stage 1
+Allocating Table Type ID 1 of type exact in stage 1
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
Match Table Resource Request is:
@@ -988,103 +951,33 @@
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
No micro instructions needed for action count_egress executed from table egress_port_count_table.
-Allocating Action ALU 0 (32 bits) in stage 2 for match table egress_port_count_table's action count_egress
-Allocating VLIW Instruction : 0 in stage 2 for match table egress_port_count_table's action count_egress
-
-----------------------------------------------
-Call to Allocate P4 Table with table egress_pkt__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-ram_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-immediate_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-hash_to_phv_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-Allocating Action Logical Table ID 1 in stage 0
-
-----------------------------------------------
-Call to Allocate P4 Table with table egress_pkt, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-Logical Table ID in stage 0 was not supplied by table placement for table egress_pkt.
-Allocating Logical Table ID 1 in stage 0
-Allocating Table Type ID 1 of type exact in stage 0
-Match Overhead:
- Field --version_valid-- [3:0] (4 bits)
- Field --instruction_address-- [1:0] (2 bits)
-
-Logical Table ID in stage 0 was not supplied by table placement for table egress_pkt.
-Allocating Logical Table ID 1 in stage 0
-Allocating Table Type ID 1 of type exact in stage 0
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]}.
-Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Match Table Resource Request is:
-SRAM Resource Request for table egress_pkt (of type match), with 0 ways wants 0 rams.
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]}.
-Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-For action add_packet_in_hdr, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 82 has bit width 20
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x0 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x0 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-For action add_packet_in_hdr, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 145 has bit width 23
- Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
-
-Allocating Action ALU 18 (8 bits) in stage 0 for match table egress_pkt's action add_packet_in_hdr
-Allocating Action ALU 17 (16 bits) in stage 0 for match table egress_pkt's action add_packet_in_hdr
-Allocating VLIW Instruction : 0 in stage 0 for match table egress_pkt's action add_packet_in_hdr
+Allocating Action ALU 0 (32 bits) in stage 1 for match table egress_port_count_table's action count_egress
+Allocating VLIW Instruction : 0 in stage 1 for match table egress_port_count_table's action count_egress
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
+Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Field ig_intr_md_for_tm.ucast_egress_port not contiguous on gateway input
Field ig_intr_md_for_tm.ucast_egress_port not contiguous on gateway input
Writing configuration registers: regs.match_action_stage.00
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.resources.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.resources.log
index 80ecadc..94aa4c1 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.resources.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.resources.log
@@ -1,16 +1,16 @@
+---------------------------------------------------------------------+
| Log file: mau.resources.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
| Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
-| 0 | 2 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 |
-| 1 | 1 | 16 | 1 | 0 | 1 | 3 | 3 | 3 | 2 | 0 | 1 | 0 | 4 | 0 | 2 | 1 | 1 |
-| 2 | 2 | 0 | 9 | 0 | 2 | 4 | 4 | 0 | 1 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2 |
+| 0 | 1 | 16 | 1 | 0 | 2 | 3 | 3 | 3 | 3 | 0 | 1 | 0 | 4 | 0 | 2 | 1 | 2 |
+| 1 | 2 | 0 | 9 | 0 | 2 | 4 | 4 | 0 | 1 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2 |
+| 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
@@ -21,16 +21,16 @@
| 10 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 11 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| | | | | | | | | | | | | | | | | | |
-| Totals | 5 | 16 | 12 | 0 | 5 | 7 | 7 | 3 | 4 | 0 | 3 | 0 | 4 | 0 | 2 | 1 | 5 |
+| Totals | 3 | 16 | 10 | 0 | 4 | 7 | 7 | 3 | 4 | 0 | 3 | 0 | 4 | 0 | 2 | 1 | 4 |
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
| Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
-| 0 | 1.56% | 0.00% | 0.48% | 0.00% | 12.50% | 0.00% | 0.00% | 0.00% | 3.12% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
-| 1 | 0.78% | 24.24% | 0.24% | 0.00% | 6.25% | 3.75% | 6.25% | 12.50% | 6.25% | 0.00% | 25.00% | 0.00% | 3.12% | 0.00% | 6.25% | 3.12% | 6.25% |
-| 2 | 1.56% | 0.00% | 2.16% | 0.00% | 12.50% | 5.00% | 8.33% | 0.00% | 3.12% | 0.00% | 50.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
+| 0 | 0.78% | 24.24% | 0.24% | 0.00% | 12.50% | 3.75% | 6.25% | 12.50% | 9.38% | 0.00% | 25.00% | 0.00% | 3.12% | 0.00% | 6.25% | 3.12% | 12.50% |
+| 1 | 1.56% | 0.00% | 2.16% | 0.00% | 12.50% | 5.00% | 8.33% | 0.00% | 3.12% | 0.00% | 50.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
+| 2 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 3 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 4 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 5 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
@@ -41,7 +41,7 @@
| 10 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 11 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| | | | | | | | | | | | | | | | | | |
-| Average | 0.33% | 2.02% | 0.24% | 0.00% | 2.60% | 0.73% | 1.22% | 1.04% | 1.04% | 0.00% | 6.25% | 0.00% | 0.26% | 0.00% | 0.52% | 0.26% | 2.60% |
+| Average | 0.20% | 2.02% | 0.20% | 0.00% | 2.08% | 0.73% | 1.22% | 1.04% | 1.04% | 0.00% | 6.25% | 0.00% | 0.26% | 0.00% | 0.52% | 0.26% | 2.08% |
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
@@ -53,21 +53,17 @@
| | | | | | | | | Bytes | |
--------------------------------------------------------------------------------------------------------------------
| _condition_0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
-| _condition_3 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
-| ingress_pkt__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| ingress_pkt | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
-| egress_pkt__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| egress_pkt | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
-| _condition_1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
-| table0__action__ | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
-| table0 | 1 | 16 | 0 | 0 | 1 | 3 | 1 | 0 | 3 |
-| table0_counter | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
-| _condition_2 | 2 | 2 | 9 | 1 | 0 | 0 | 0 | 0 | 0 |
-| ingress_port_count_table__action__ | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| ingress_port_count_table | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
-| egress_port_count_table__action__ | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| egress_port_count_table | 2 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
-| ingress_port_counter | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
-| egress_port_counter | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| process_packet_out_table__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| process_packet_out_table | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
+| table0__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
+| table0 | 0 | 16 | 0 | 0 | 1 | 3 | 1 | 0 | 3 |
+| table0_counter | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| _condition_2 | 1 | 2 | 9 | 1 | 0 | 0 | 0 | 0 | 0 |
+| ingress_port_count_table__action__ | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| ingress_port_count_table | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
+| egress_port_count_table__action__ | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| egress_port_count_table | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
+| ingress_port_counter | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| egress_port_counter | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
--------------------------------------------------------------------------------------------------------------------
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.rf.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.rf.log
index fd85fb8..69e271f 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.rf.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.rf.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: mau.rf.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.sram.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.sram.log
index 8240c0f..9d68a7c 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.sram.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.sram.log
@@ -1,17 +1,17 @@
+---------------------------------------------------------------------+
| Log file: mau.sram.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
=======================================================
- calling allocate and add with SRAM Resource Request for table ingress_pkt (of type match), with 0 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
+ calling allocate and add with SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams. (open-all=False, synth_two_port_first=False)
=======================================================
-Requesting to use 0 RAMs and have 80 available.
+Requesting to use 2 RAMs and have 80 available.
Requesting to use 0 Map RAMs and have 48 available.
========================================================
@@ -22,7 +22,7 @@
Match Rams Need is 0
Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 0
+Other Rams Need is 2
+=========================================
| Placing algorithmic tcam
@@ -34,28 +34,295 @@
-------------------------------------
Columns need for match is 0
columns for width is 0
-other columns is 0
-reserved columns is 10
+other columns is 1
+reserved columns is 9
reserved columns for tind 0
-reserved columns for stateful 0
+reserved columns for stateful 1
Ternary Indirection Rams Need is 0
Depth sorted requested
Requesting to use 0 RAMs and have 32 available.
-Result bus only needs (1):
- ingress_pkt
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 0
+Result bus only needs (0):
+=========================================
| Placing action/stats/meters/selection
+=========================================
-Requesting to use 0 RAMs and have 80 available.
+Requesting to use 2 RAMs and have 80 available.
+SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
Depth sorted idletime requests:
=======================================================
- calling allocate and add with SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams. (open-all=False, synth_two_port_first=False)
+ calling allocate and add with SRAM Resource Request for table table0 (of type ternary_indirection), with 1 ways wants 1 rams. (open-all=False, synth_two_port_first=False)
+=======================================================
+
+Requesting to use 1 RAMs and have 78 available.
+Requesting to use 0 Map RAMs and have 46 available.
+
+========================================================
+ Run Placement on Request List of size 2 in stage 0
+ open_up_all_for_match=False
+ synth_two_port_first=False
+========================================================
+
+Match Rams Need is 0
+Algorithmic TCAM Match RAMs Need is 0
+Other Rams Need is 3
+
++=========================================
+| Placing algorithmic tcam
++=========================================
+
+sorted algorithmic tcam requests: (0)
+
+
+-------------------------------------
+Columns need for match is 0
+columns for width is 0
+other columns is 1
+reserved columns is 9
+reserved columns for tind 1
+reserved columns for stateful 1
+Ternary Indirection Rams Need is 1
+Depth sorted requested
+Group 0
+Sram Resource Request for P4 table table0 with handle 16777220 of type ternary_indirection in stage 0
+ table_type : ternary_indirection
+ rams_for_width : 1
+ use_stash : False
+ number_ways : 1
+ way #0
+ SRAM Request Group 0
+ rams_for_depth : 1
+ map_rams : 0
+ way_number : 0
+ ram_word_select_bits : 0
+ ram_enable_select_bits : 0
+
+Requesting to use 1 RAMs and have 32 available.
+Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 0
+Allocating: SRAM: Row 0 Col 2 in stage 0 for table table0's ternary indirection word range Words 0 to 1023.
+Result bus only needs (0):
+
++=========================================
+| Placing action/stats/meters/selection
++=========================================
+
+Requesting to use 2 RAMs and have 79 available.
+SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
+Depth sorted idletime requests:
+
+
+=======================================================
+
+ calling allocate and add with SRAM Resource Request for table table0 (of type idletime), with 1 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
+=======================================================
+
+Requesting to use 0 RAMs and have 77 available.
+Requesting to use 1 Map RAMs and have 46 available.
+
+========================================================
+ Run Placement on Request List of size 3 in stage 0
+ open_up_all_for_match=False
+ synth_two_port_first=False
+========================================================
+
+Match Rams Need is 0
+Algorithmic TCAM Match RAMs Need is 0
+Other Rams Need is 3
+
++=========================================
+| Placing algorithmic tcam
++=========================================
+
+sorted algorithmic tcam requests: (0)
+
+
+-------------------------------------
+Columns need for match is 0
+columns for width is 0
+other columns is 1
+reserved columns is 9
+reserved columns for tind 1
+reserved columns for stateful 1
+Ternary Indirection Rams Need is 1
+Depth sorted requested
+Group 0
+Sram Resource Request for P4 table table0 with handle 16777220 of type ternary_indirection in stage 0
+ table_type : ternary_indirection
+ rams_for_width : 1
+ use_stash : False
+ number_ways : 1
+ way #0
+ SRAM Request Group 0
+ rams_for_depth : 1
+ map_rams : 0
+ way_number : 0
+ ram_word_select_bits : 0
+ ram_enable_select_bits : 0
+
+Requesting to use 1 RAMs and have 32 available.
+Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 0
+Allocating: SRAM: Row 0 Col 2 in stage 0 for table table0's ternary indirection word range Words 0 to 1023.
+Result bus only needs (0):
+
++=========================================
+| Placing action/stats/meters/selection
++=========================================
+
+Requesting to use 2 RAMs and have 79 available.
+SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
+Depth sorted idletime requests:
+Sram Resource Request for P4 table table0 with handle 16777220 of type idletime in stage 0
+ table_type : idletime
+ rams_for_width : 0
+ use_stash : False
+ number_ways : 1
+ way #0
+ SRAM Request Group 0
+ rams_for_depth : 0
+ map_rams : 1
+ way_number : 0
+ ram_word_select_bits : 0
+ ram_enable_select_bits : 0
+
+Requesting to use 1 RAMs and have 46 available.
+top_cnt = 1 and num requests = 1
+bottom_cnt = 0 and num requests = 0
+Working on idletime request SRAM Resource Request for table table0 (of type idletime), with 1 ways wants 0 rams.
+>> wants 1 map rams
+Allocating: Map RAM: Row 7 Unit 0 in stage 0 for table0.
+Allocating: Ram Data Bus IdletimeHalfLogicalRow 0 top is 19 bits in stage 0 for table0.
+
+
+=======================================================
+
+ calling allocate and add with SRAM Resource Request for table process_packet_out_table (of type match), with 0 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
+=======================================================
+
+Requesting to use 0 RAMs and have 77 available.
+Requesting to use 0 Map RAMs and have 45 available.
+
+========================================================
+ Run Placement on Request List of size 4 in stage 0
+ open_up_all_for_match=False
+ synth_two_port_first=False
+========================================================
+
+Match Rams Need is 0
+Algorithmic TCAM Match RAMs Need is 0
+Other Rams Need is 3
+
++=========================================
+| Placing algorithmic tcam
++=========================================
+
+sorted algorithmic tcam requests: (0)
+
+
+-------------------------------------
+Columns need for match is 0
+columns for width is 0
+other columns is 1
+reserved columns is 9
+reserved columns for tind 1
+reserved columns for stateful 1
+Ternary Indirection Rams Need is 1
+Depth sorted requested
+Group 0
+Sram Resource Request for P4 table table0 with handle 16777220 of type ternary_indirection in stage 0
+ table_type : ternary_indirection
+ rams_for_width : 1
+ use_stash : False
+ number_ways : 1
+ way #0
+ SRAM Request Group 0
+ rams_for_depth : 1
+ map_rams : 0
+ way_number : 0
+ ram_word_select_bits : 0
+ ram_enable_select_bits : 0
+
+Requesting to use 1 RAMs and have 32 available.
+Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 0
+Allocating: SRAM: Row 0 Col 2 in stage 0 for table table0's ternary indirection word range Words 0 to 1023.
+Result bus only needs (1):
+ process_packet_out_table
+Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 0
+
++=========================================
+| Placing action/stats/meters/selection
++=========================================
+
+Requesting to use 2 RAMs and have 79 available.
+SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
+Depth sorted idletime requests:
+Sram Resource Request for P4 table table0 with handle 16777220 of type idletime in stage 0
+ table_type : idletime
+ rams_for_width : 0
+ use_stash : False
+ number_ways : 1
+ way #0
+ SRAM Request Group 0
+ rams_for_depth : 0
+ map_rams : 1
+ way_number : 0
+ ram_word_select_bits : 0
+ ram_enable_select_bits : 0
+
+Requesting to use 1 RAMs and have 46 available.
+top_cnt = 1 and num requests = 1
+bottom_cnt = 0 and num requests = 0
+Working on idletime request SRAM Resource Request for table table0 (of type idletime), with 1 ways wants 0 rams.
+>> wants 1 map rams
+Allocating: Map RAM: Row 7 Unit 0 in stage 0 for table0.
+Allocating: Ram Data Bus IdletimeHalfLogicalRow 0 top is 19 bits in stage 0 for table0.
+
+
+=======================================================
+
+ calling allocate and add with SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams. (open-all=False, synth_two_port_first=False)
=======================================================
Requesting to use 2 RAMs and have 80 available.
@@ -95,237 +362,17 @@
+=========================================
Requesting to use 2 RAMs and have 80 available.
-SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-
-call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table table0_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 1 for table0_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for table0_counter.
-Depth sorted idletime requests:
-
-
-=======================================================
-
- calling allocate and add with SRAM Resource Request for table table0 (of type ternary_indirection), with 1 ways wants 1 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 1 RAMs and have 78 available.
-Requesting to use 0 Map RAMs and have 46 available.
-
-========================================================
- Run Placement on Request List of size 2 in stage 1
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 0
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 3
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 0
-columns for width is 0
-other columns is 1
-reserved columns is 9
-reserved columns for tind 1
-reserved columns for stateful 1
-Ternary Indirection Rams Need is 1
-Depth sorted requested
-Group 0
-Sram Resource Request for P4 table table0 with handle 16777221 of type ternary_indirection in stage 1
- table_type : ternary_indirection
- rams_for_width : 1
- use_stash : False
- number_ways : 1
- way #0
- SRAM Request Group 0
- rams_for_depth : 1
- map_rams : 0
- way_number : 0
- ram_word_select_bits : 0
- ram_enable_select_bits : 0
-
-Requesting to use 1 RAMs and have 32 available.
-Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 1
-Allocating: SRAM: Row 0 Col 2 in stage 1 for table table0's ternary indirection word range Words 0 to 1023.
-Result bus only needs (0):
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 2 RAMs and have 79 available.
-SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-
-call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table table0_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 1 for table0_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for table0_counter.
-Depth sorted idletime requests:
-
-
-=======================================================
-
- calling allocate and add with SRAM Resource Request for table table0 (of type idletime), with 1 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 0 RAMs and have 77 available.
-Requesting to use 1 Map RAMs and have 46 available.
-
-========================================================
- Run Placement on Request List of size 3 in stage 1
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 0
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 3
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 0
-columns for width is 0
-other columns is 1
-reserved columns is 9
-reserved columns for tind 1
-reserved columns for stateful 1
-Ternary Indirection Rams Need is 1
-Depth sorted requested
-Group 0
-Sram Resource Request for P4 table table0 with handle 16777221 of type ternary_indirection in stage 1
- table_type : ternary_indirection
- rams_for_width : 1
- use_stash : False
- number_ways : 1
- way #0
- SRAM Request Group 0
- rams_for_depth : 1
- map_rams : 0
- way_number : 0
- ram_word_select_bits : 0
- ram_enable_select_bits : 0
-
-Requesting to use 1 RAMs and have 32 available.
-Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 1
-Allocating: SRAM: Row 0 Col 2 in stage 1 for table table0's ternary indirection word range Words 0 to 1023.
-Result bus only needs (0):
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 2 RAMs and have 79 available.
-SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-
-call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table table0_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 1 for table0_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for table0_counter.
-Depth sorted idletime requests:
-Sram Resource Request for P4 table table0 with handle 16777221 of type idletime in stage 1
- table_type : idletime
- rams_for_width : 0
- use_stash : False
- number_ways : 1
- way #0
- SRAM Request Group 0
- rams_for_depth : 0
- map_rams : 1
- way_number : 0
- ram_word_select_bits : 0
- ram_enable_select_bits : 0
-
-Requesting to use 1 RAMs and have 46 available.
-top_cnt = 1 and num requests = 1
-bottom_cnt = 0 and num requests = 0
-Working on idletime request SRAM Resource Request for table table0 (of type idletime), with 1 ways wants 0 rams.
->> wants 1 map rams
-Allocating: Map RAM: Row 7 Unit 0 in stage 1 for table0.
-Allocating: Ram Data Bus IdletimeHalfLogicalRow 0 top is 19 bits in stage 1 for table0.
-
-
-=======================================================
-
- calling allocate and add with SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 2 RAMs and have 80 available.
-Requesting to use 0 Map RAMs and have 48 available.
-
-========================================================
- Run Placement on Request List of size 1 in stage 2
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 0
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 2
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 0
-columns for width is 0
-other columns is 1
-reserved columns is 9
-reserved columns for tind 0
-reserved columns for stateful 1
-Ternary Indirection Rams Need is 0
-Depth sorted requested
-Requesting to use 0 RAMs and have 32 available.
-Result bus only needs (0):
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 2 RAMs and have 80 available.
SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
NO Spill Required off of logical row 13 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table ingress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 2 for ingress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for ingress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table ingress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 1 for ingress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for ingress_port_counter.
Depth sorted idletime requests:
@@ -338,7 +385,7 @@
Requesting to use 0 Map RAMs and have 46 available.
========================================================
- Run Placement on Request List of size 2 in stage 2
+ Run Placement on Request List of size 2 in stage 1
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -366,7 +413,7 @@
Requesting to use 0 RAMs and have 32 available.
Result bus only needs (1):
ingress_port_count_table
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 2
+Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 1
+=========================================
| Placing action/stats/meters/selection
@@ -377,13 +424,13 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table ingress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 2 for ingress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for ingress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table ingress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 1 for ingress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for ingress_port_counter.
Depth sorted idletime requests:
@@ -396,7 +443,7 @@
Requesting to use 0 Map RAMs and have 46 available.
========================================================
- Run Placement on Request List of size 3 in stage 2
+ Run Placement on Request List of size 3 in stage 1
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -424,7 +471,7 @@
Requesting to use 0 RAMs and have 32 available.
Result bus only needs (1):
ingress_port_count_table
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 2
+Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 1
+=========================================
| Placing action/stats/meters/selection
@@ -436,23 +483,23 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table egress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table egress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 2 for egress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 2 for egress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for egress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for egress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table egress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 1 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 1 for egress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 1 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 1 for egress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for egress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for egress_port_counter.
NO Spill Required off of logical row 9 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 9 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 4 on right (128 bits) in stage 2 for table ingress_port_counter.
-Allocating: SRAM: Row 4 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 4 Unit 0 in stage 2 for ingress_port_counter.
-Allocating: SRAM: Row 4 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 4 Unit 1 in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 2 for ingress_port_counter.
+Allocating: Statistics ALU 4 on right (128 bits) in stage 1 for table ingress_port_counter.
+Allocating: SRAM: Row 4 Col 6 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 4 Unit 0 in stage 1 for ingress_port_counter.
+Allocating: SRAM: Row 4 Col 7 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 4 Unit 1 in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 1 for ingress_port_counter.
Depth sorted idletime requests:
@@ -465,7 +512,7 @@
Requesting to use 0 Map RAMs and have 44 available.
========================================================
- Run Placement on Request List of size 4 in stage 2
+ Run Placement on Request List of size 4 in stage 1
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -494,8 +541,8 @@
Result bus only needs (2):
egress_port_count_table
ingress_port_count_table
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 2
-Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 2
+Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 1
+Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 1
+=========================================
| Placing action/stats/meters/selection
@@ -507,70 +554,21 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table egress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table egress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 2 for egress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 2 for egress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for egress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for egress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table egress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 1 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 1 for egress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 1 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 1 for egress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for egress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for egress_port_counter.
NO Spill Required off of logical row 9 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 9 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 4 on right (128 bits) in stage 2 for table ingress_port_counter.
-Allocating: SRAM: Row 4 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 4 Unit 0 in stage 2 for ingress_port_counter.
-Allocating: SRAM: Row 4 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 4 Unit 1 in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 2 for ingress_port_counter.
-Depth sorted idletime requests:
-
-
-=======================================================
-
- calling allocate and add with SRAM Resource Request for table egress_pkt (of type match), with 0 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 0 RAMs and have 80 available.
-Requesting to use 0 Map RAMs and have 48 available.
-
-========================================================
- Run Placement on Request List of size 2 in stage 0
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 0
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 0
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 0
-columns for width is 0
-other columns is 0
-reserved columns is 10
-reserved columns for tind 0
-reserved columns for stateful 0
-Ternary Indirection Rams Need is 0
-Depth sorted requested
-Requesting to use 0 RAMs and have 32 available.
-Result bus only needs (2):
- egress_pkt
- ingress_pkt
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 0
-Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 0
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 0 RAMs and have 80 available.
+Allocating: Statistics ALU 4 on right (128 bits) in stage 1 for table ingress_port_counter.
+Allocating: SRAM: Row 4 Col 6 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 4 Unit 0 in stage 1 for ingress_port_counter.
+Allocating: SRAM: Row 4 Col 7 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 4 Unit 1 in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 1 for ingress_port_counter.
Depth sorted idletime requests:
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.tcam.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.tcam.log
index f1e6d64..601ac55 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.tcam.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.tcam.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: mau.tcam.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
@@ -17,9 +17,9 @@
Run Placement on Request List of size 1
========================================================
-Allocating: TCAM: Row 11 Col 1 in stage 1 for table table0 for entries Entry bits [43:0] and word range Words 0 to 511.
-Allocating: TCAM: Row 10 Col 1 in stage 1 for table table0 for entries Entry bits [87:44] and word range Words 0 to 511.
-Allocating: TCAM: Row 9 Col 1 in stage 1 for table table0 for entries Entry bits [131:88] and word range Words 0 to 511.
-Allocating: Ram Data Bus TcamMatchSearch2 11 left_and_right is 44 bits in stage 1
-Allocating: Ram Data Bus TcamMatchSearch2 10 left_and_right is 44 bits in stage 1
-Allocating: Ram Data Bus TcamMatchSearch2 9 left_and_right is 44 bits in stage 1
+Allocating: TCAM: Row 11 Col 1 in stage 0 for table table0 for entries Entry bits [43:0] and word range Words 0 to 511.
+Allocating: TCAM: Row 10 Col 1 in stage 0 for table table0 for entries Entry bits [87:44] and word range Words 0 to 511.
+Allocating: TCAM: Row 9 Col 1 in stage 0 for table table0 for entries Entry bits [131:88] and word range Words 0 to 511.
+Allocating: Ram Data Bus TcamMatchSearch2 11 left_and_right is 44 bits in stage 0
+Allocating: Ram Data Bus TcamMatchSearch2 10 left_and_right is 44 bits in stage 0
+Allocating: Ram Data Bus TcamMatchSearch2 9 left_and_right is 44 bits in stage 0
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.tp.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.tp.log
index 0e8372e..e3bcc21 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.tp.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.tp.log
@@ -1,86 +1,93 @@
+---------------------------------------------------------------------+
| Log file: mau.tp.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
----- Stage 0 ------
_condition_0
- ingress_pkt
------ Stage 1 ------
- _condition_1
+ process_packet_out_table
table0
------ Stage 2 ------
+----- Stage 1 ------
_condition_2
ingress_port_count_table
egress_port_count_table
----- Stage 0 ------
- _condition_3
- egress_pkt
+ _condition_0
+ process_packet_out_table
+ table0
+----- Stage 1 ------
+ _condition_2
+ ingress_port_count_table
+ egress_port_count_table
+----- Stage 0 ------
+ _condition_0
+ process_packet_out_table
+ table0
+----- Stage 1 ------
+ _condition_2
+ ingress_port_count_table
+ egress_port_count_table
------------------------------------------
Running Table Placement 4
------------------------------------------
Cannot use hash action for table ingress_port_count_table.
-Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 254.
+Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 510.
Cannot use hash action for table egress_port_count_table.
-Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 254.
-Cannot use hash action for table ingress_pkt.
-Table ingress_pkt has no side effect tables.
-Cannot use hash action for table egress_pkt.
-Table egress_pkt has no side effect tables.
+Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 510.
+Cannot use hash action for table process_packet_out_table.
+Table process_packet_out_table has no side effect tables.
Cannot use hash action for table table0.
Cannot use hash-action for table table0 because it requires a ternary-style match for field ig_intr_md.ingress_port.
------------------------------------------
Table Groups
------------------------------------------
-Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (254)]
-Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (254)]
-Table Grouping (ingress) with match table ingress_pkt (1024) [ingress_pkt__action__ (1024)]
-Table Grouping (egress) with match table egress_pkt (1024) [egress_pkt__action__ (1024)]
+Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (510)]
+Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (510)]
+Table Grouping (ingress) with match table process_packet_out_table (1024) [process_packet_out_table__action__ (1024)]
Table Grouping (ingress) with match table table0 (512) [table0__action__ (512), table0_counter (512)]
Table Grouping (ingress) with condition table _condition_0 (0) []
-Table Grouping (ingress) with condition table _condition_1 (0) []
Table Grouping (ingress) with condition table _condition_2 (0) []
-Table Grouping (egress) with condition table _condition_3 (0) []
-Phase 0 possible? False Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
+Phase 0 possible? False Cannot implement table0 in phase 0 resources because table uses side effect tables.
------------------------------------
Starting placement pass 0
------------------------------------
Nodes could place:
_condition_0 (2)
->> choose Table Grouping (ingress) with match table ingress_pkt (1024) [ingress_pkt__action__ (1024)]
-Earliest stage can place: 0
-Placing table: ingress_pkt__action__ with 1024 entries
-Table ingress_pkt__action__ with 0 entries is directly referenced
-Match Table ingress_pkt has a total of 1 entries in stage 0
- Direct mapped table ingress_pkt__action__ has 0 entries
->> set ingress_pkt (8) to placed
->> set _condition_0 (2) to placed
-
-Nodes could place:
- _condition_1 (3)
>> choose Table Grouping (ingress) with match table table0 (512) [table0__action__ (512), table0_counter (512)]
-Earliest stage can place: 1
+Earliest stage can place: 0
Placing table: table0__action__ with 512 entries
Placing table: table0_counter with 512 entries
Table table0__action__ with 0 entries is directly referenced
Table table0_counter with 4096 entries is directly referenced
-Match Table table0 has a total of 512 entries in stage 1
+Match Table table0 has a total of 512 entries in stage 0
Direct mapped table table0__action__ has 0 entries
Direct mapped table table0_counter has 4096 entries
>> set table0 (7) to placed
->> set _condition_1 (3) to placed
+>> set _condition_0 (2) to placed
+
+Nodes could place:
+ process_packet_out_table (3)
+process_packet_out_table and _condition_0 not mutually exclusive
+>> choose Table Grouping (ingress) with match table process_packet_out_table (1024) [process_packet_out_table__action__ (1024)]
+Earliest stage can place: 0
+process_packet_out_table and _condition_0 not mutually exclusive
+Placing table: process_packet_out_table__action__ with 1024 entries
+Table process_packet_out_table__action__ with 0 entries is directly referenced
+Match Table process_packet_out_table has a total of 1 entries in stage 0
+ Direct mapped table process_packet_out_table__action__ has 0 entries
+>> set process_packet_out_table (3) to placed
Nodes could place:
_condition_2 (4)
->> choose Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (254)]
-Earliest stage can place: 2
+>> choose Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (510)]
+Earliest stage can place: 1
Placing table: ingress_port_count_table__action__ with 1024 entries
-Placing table: ingress_port_counter with 254 entries
+Placing table: ingress_port_counter with 510 entries
Table ingress_port_count_table__action__ with 0 entries is directly referenced
Table ingress_port_counter with 4096 entries is indirectly referenced
-Match Table ingress_port_count_table has a total of 1 entries in stage 2
+Match Table ingress_port_count_table has a total of 1 entries in stage 1
Direct mapped table ingress_port_count_table__action__ has 0 entries
>> set ingress_port_count_table (5) to placed
>> set _condition_2 (4) to placed
@@ -89,41 +96,25 @@
egress_port_count_table (6)
egress_port_count_table and _condition_2 not mutually exclusive
egress_port_count_table and ingress_port_count_table not mutually exclusive
->> choose Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (254)]
-Earliest stage can place: 2
+>> choose Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (510)]
+Earliest stage can place: 1
egress_port_count_table and _condition_2 not mutually exclusive
egress_port_count_table and ingress_port_count_table not mutually exclusive
Placing table: egress_port_count_table__action__ with 1024 entries
-Placing table: egress_port_counter with 254 entries
+Placing table: egress_port_counter with 510 entries
Table egress_port_count_table__action__ with 0 entries is directly referenced
Table egress_port_counter with 4096 entries is indirectly referenced
-Match Table egress_port_count_table has a total of 1 entries in stage 2
+Match Table egress_port_count_table has a total of 1 entries in stage 1
Direct mapped table egress_port_count_table__action__ has 0 entries
>> set egress_port_count_table (6) to placed
-------------------------------------
- Starting placement pass 1
-------------------------------------
-
-Nodes could place:
- _condition_3 (2)
->> choose Table Grouping (egress) with match table egress_pkt (1024) [egress_pkt__action__ (1024)]
-Earliest stage can place: 0
-Placing table: egress_pkt__action__ with 1024 entries
-Table egress_pkt__action__ with 0 entries is directly referenced
-Match Table egress_pkt has a total of 1 entries in stage 0
- Direct mapped table egress_pkt__action__ has 0 entries
->> set egress_pkt (3) to placed
->> set _condition_3 (2) to placed
------------------------------------------
Logical Table IDs
------------------------------------------
Logical Table IDs in stage 0 are:
- 0 : ingress_pkt
- 1 : egress_pkt
-Logical Table IDs in stage 1 are:
0 : table0
-Logical Table IDs in stage 2 are:
+ 1 : process_packet_out_table
+Logical Table IDs in stage 1 are:
0 : ingress_port_count_table
1 : egress_port_count_table
@@ -133,23 +124,15 @@
count_ingress -> egress_port_count_table
action mapping for egress_port_count_table
count_egress -> --END_OF_PIPELINE--
-action mapping for ingress_pkt
- _packet_out -> _condition_1
-action mapping for egress_pkt
- add_packet_in_hdr -> --END_OF_PIPELINE--
+action mapping for process_packet_out_table
+ _process_packet_out -> _condition_2
action mapping for table0
set_egress_port -> _condition_2
send_to_cpu -> _condition_2
_drop -> _condition_2
true/false mapping for _condition_0
- False -> _condition_1
- True -> ingress_pkt
-true/false mapping for _condition_1
- False -> _condition_2
+ False -> process_packet_out_table
True -> table0
true/false mapping for _condition_2
False -> --END_OF_PIPELINE--
True -> ingress_port_count_table
-true/false mapping for _condition_3
- False -> --END_OF_PIPELINE--
- True -> egress_pkt
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.characterize.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.characterize.log
index 6027310..64f4f4d 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.characterize.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.characterize.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: pa.characterize.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
Program: default
@@ -12,9 +12,9 @@
| phv0 | ingress | | | | | | | | | | | | | | | | | |
| [31:0] | ingress | --pov_reserved--_0[31:0] | meta | | | | | | | | | | | | | | | R |
| phv1 | ingress | | | | | | | | | | | | | | | | | |
-| [31:0] | ingress | ethernet.dstAddr[39:8] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [31:0] | ingress | ethernet.dstAddr[39:8] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv2 | ingress | | | | | | | | | | | | | | | | | |
-| [31:0] | ingress | ethernet.srcAddr[31:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [31:0] | ingress | ethernet.srcAddr[31:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv3 | - | | | | | | | | | | | | | | | | | |
| phv4 | - | | | | | | | | | | | | | | | | | |
| phv5 | - | | | | | | | | | | | | | | | | | |
@@ -80,23 +80,21 @@
| phv62 | - | | | | | | | | | | | | | | | | | |
| phv63 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
-| phv64 | ingress | | SH | | | | | | | | | | | | | | | |
-| [7:1] | ingress | -pad-0-[6:0] | meta | | | | | | | | | | | | | | | |
-| [0:0] | ingress | ig_intr_md_for_tm.copy_to_cpu[0:0] | imeta | | | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv64 | ingress | | | | | | | | | | | | | | | | | |
+| [7:0] | ingress | ethernet.dstAddr[47:40] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv65 | ingress | | | | | | | | | | | | | | | | | |
-| [7:0] | ingress | ethernet.dstAddr[47:40] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv66 | ingress | | | | | | | | | | | | | | | | | |
-| [7:0] | ingress | ethernet.srcAddr[39:32] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv67 | ingress | | SH | | | | | | | | | | | | | | | |
+| [7:0] | ingress | ethernet.srcAddr[39:32] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv66 | ingress | | SH | | | | | | | | | | | | | | | |
| [6:6] | ingress | --validity_check--metadata_bridge[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [5:5] | ingress | --validity_check--udp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [4:4] | ingress | --validity_check--tcp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [3:3] | ingress | --validity_check--ipv4[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [2:2] | ingress | --validity_check--ethernet[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [1:1] | ingress | --validity_check--packet_out_hdr[0:0] | pov | | W | RW | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [0:0] | ingress | --validity_check--packet_in_hdr[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv68 | ingress | | | | | | | | | | | | | | | | | |
-| [7:5] | ingress | ig_intr_md_for_tm.drop_ctl[2:0] | imeta | | | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [1:1] | ingress | --validity_check--packet_out_hdr[0:0] | pov | | W | RW | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [0:0] | ingress | --validity_check--packet_in_hdr[0:0] | pov | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv67 | ingress | | | | | | | | | | | | | | | | | |
+| [7:5] | ingress | ig_intr_md_for_tm.drop_ctl[2:0] | imeta | | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv68 | - | | | | | | | | | | | | | | | | | |
| phv69 | - | | | | | | | | | | | | | | | | | |
| phv70 | - | | | | | | | | | | | | | | | | | |
| phv71 | - | | | | | | | | | | | | | | | | | |
@@ -110,18 +108,16 @@
| phv79 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| phv80 | egress | | SH | | | | | | | | | | | | | | | |
-| [7:1] | egress | -pad-0-[6:0] | meta | | | | | | | | | | | | | | | |
-| [0:0] | egress | ig_intr_md_for_tm.copy_to_cpu[0:0] | imeta | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv81 | egress | | SH | | | | | | | | | | | | | | | |
| [7:3] | egress | eg_intr_md._pad7[4:0] | imeta | | W | | | | | | | | | | | | | |
| [2:0] | egress | eg_intr_md.egress_cos[2:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv82 | egress | | SH | | | | | | | | | | | | | | | |
+| phv81 | egress | | SH | | | | | | | | | | | | | | | |
| [5:5] | egress | --validity_check--udp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [4:4] | egress | --validity_check--tcp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [3:3] | egress | --validity_check--ipv4[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [2:2] | egress | --validity_check--ethernet[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [1:1] | egress | --validity_check--packet_out_hdr[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [0:0] | egress | --validity_check--packet_in_hdr[0:0] | pov | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [0:0] | egress | --validity_check--packet_in_hdr[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv82 | - | | | | | | | | | | | | | | | | | |
| phv83 | - | | | | | | | | | | | | | | | | | |
| phv84 | - | | | | | | | | | | | | | | | | | |
| phv85 | - | | | | | | | | | | | | | | | | | |
@@ -171,23 +167,23 @@
| phv127 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| phv128 | ingress | | SH | | | | | | | | | | | | | | | |
-| [15:15] | ingress | ig_intr_md.resubmit_flag[0:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [14:14] | ingress | ig_intr_md._pad1[0:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [13:12] | ingress | ig_intr_md._pad2[1:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [11:9] | ingress | ig_intr_md._pad3[2:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [8:0] | ingress | ig_intr_md.ingress_port[8:0] | imeta | | W | ~ | R | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:15] | ingress | ig_intr_md.resubmit_flag[0:0] | imeta | | W | | | | | | | | | | | | | |
+| [14:14] | ingress | ig_intr_md._pad1[0:0] | imeta | | W | | | | | | | | | | | | | |
+| [13:12] | ingress | ig_intr_md._pad2[1:0] | imeta | | W | | | | | | | | | | | | | |
+| [11:9] | ingress | ig_intr_md._pad3[2:0] | imeta | | W | | | | | | | | | | | | | |
+| [8:0] | ingress | ig_intr_md.ingress_port[8:0] | imeta | | W | R | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv129 | ingress | | OL,SH | | | | | | | | | | | | | | | |
| [15:7] | ingress | packet_out_hdr.egress_port[8:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [15:7] | ingress | packet_in_hdr.ingress_port[8:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:7] | ingress | packet_in_hdr.ingress_port[8:0] | pkt | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [6:0] | ingress | packet_out_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [6:0] | ingress | packet_in_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv130 | ingress | | | | | | | | | | | | | | | | | |
-| [8:0] | ingress | ig_intr_md_for_tm.ucast_egress_port[8:0] | imeta | | | W | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [8:0] | ingress | ig_intr_md_for_tm.ucast_egress_port[8:0] | imeta | | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv131 | ingress | | SH | | | | | | | | | | | | | | | |
-| [15:8] | ingress | ethernet.dstAddr[7:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [7:0] | ingress | ethernet.srcAddr[47:40] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:8] | ingress | ethernet.dstAddr[7:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [7:0] | ingress | ethernet.srcAddr[47:40] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv132 | ingress | | | | | | | | | | | | | | | | | |
-| [15:0] | ingress | ethernet.etherType[15:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:0] | ingress | ethernet.etherType[15:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv133 | - | | | | | | | | | | | | | | | | | |
| phv134 | - | | | | | | | | | | | | | | | | | |
| phv135 | - | | | | | | | | | | | | | | | | | |
@@ -201,14 +197,10 @@
| phv143 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| phv144 | egress | | SH | | | | | | | | | | | | | | | |
-| [15:9] | egress | -pad-1-[6:0] | meta | | | | | | | | | | | | | | | |
-| [8:0] | egress | ig_intr_md.ingress_port[8:0] | imeta | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv145 | egress | | SH | | | | | | | | | | | | | | | |
-| [15:7] | egress | packet_in_hdr.ingress_port[8:0] | pkt | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [6:0] | egress | packet_in_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv146 | egress | | SH | | | | | | | | | | | | | | | |
| [15:9] | egress | eg_intr_md._pad0[6:0] | imeta | | W | | | | | | | | | | | | | |
| [8:0] | egress | eg_intr_md.egress_port[8:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv145 | - | | | | | | | | | | | | | | | | | |
+| phv146 | - | | | | | | | | | | | | | | | | | |
| phv147 | - | | | | | | | | | | | | | | | | | |
| phv148 | - | | | | | | | | | | | | | | | | | |
| phv149 | - | | | | | | | | | | | | | | | | | |
@@ -300,18 +292,17 @@
| phv258 | ingress | | | | | | | | | | | | | | | | | |
| [31:0] | ingress | ipv4.dstAddr[31:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv259 | ingress | | OL,SH | | | | | | | | | | | | | | | |
-| [31:16] | ingress | udp.length_[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [31:0] | ingress | tcp.ackNo[31:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [15:0] | ingress | udp.checksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv260 | ingress | | SH | | | | | | | | | | | | | | | |
| [31:28] | ingress | tcp.dataOffset[3:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [27:25] | ingress | tcp.res[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [24:22] | ingress | tcp.ecn[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [21:16] | ingress | tcp.ctrl[5:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [31:16] | ingress | udp.length_[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | ingress | tcp.window[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv261 | ingress | | SH | | | | | | | | | | | | | | | |
+| [15:0] | ingress | udp.checksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv260 | ingress | | SH | | | | | | | | | | | | | | | |
| [31:16] | ingress | tcp.checksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | ingress | tcp.urgentPtr[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv261 | - | | | | | | | | | | | | | | | | | |
| phv262 | - | | | | | | | | | | | | | | | | | |
| phv263 | - | | | | | | | | | | | | | | | | | |
| phv264 | egress | | SH | | | | | | | | | | | | | | | |
@@ -368,8 +359,10 @@
| phv291 | ingress | | OL,SH | | | | | | | | | | | | | | | |
| [7:0] | ingress | tcp.srcPort[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [7:0] | ingress | udp.srcPort[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv292 | - | | | | | | | | | | | | | | | | | |
-| phv293 | - | | | | | | | | | | | | | | | | | |
+| phv292 | ingress | | | | | | | | | | | | | | | | | |
+| [7:0] | ingress | tcp.dstPort[15:8] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv293 | ingress | | | | | | | | | | | | | | | | | |
+| [7:0] | ingress | tcp.dstPort[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv294 | - | | | | | | | | | | | | | | | | | |
| phv295 | - | | | | | | | | | | | | | | | | | |
| phv296 | egress | | SH | | | | | | | | | | | | | | | |
@@ -415,13 +408,14 @@
| [15:13] | ingress | ipv4.flags[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [12:0] | ingress | ipv4.fragOffset[12:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv323 | ingress | | OL,SH | | | | | | | | | | | | | | | |
-| [15:0] | ingress | tcp.dstPort[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:0] | ingress | tcp.seqNo[31:16] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | ingress | udp.dstPort[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv324 | ingress | | | | | | | | | | | | | | | | | |
-| [15:0] | ingress | tcp.seqNo[31:16] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv325 | ingress | | | | | | | | | | | | | | | | | |
| [15:0] | ingress | tcp.seqNo[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv326 | - | | | | | | | | | | | | | | | | | |
+| phv325 | ingress | | | | | | | | | | | | | | | | | |
+| [15:0] | ingress | tcp.ackNo[31:16] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv326 | ingress | | | | | | | | | | | | | | | | | |
+| [15:0] | ingress | tcp.ackNo[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv327 | - | | | | | | | | | | | | | | | | | |
| phv328 | - | | | | | | | | | | | | | | | | | |
| phv329 | - | | | | | | | | | | | | | | | | | |
@@ -447,9 +441,11 @@
| [7:0] | egress | ethernet.srcAddr[47:40] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv339 | egress | | | | | | | | | | | | | | | | | |
| [15:0] | egress | ethernet.etherType[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv340 | egress | | SH | | | | | | | | | | | | | | | |
+| phv340 | egress | | OL,SH | | | | | | | | | | | | | | | |
| [15:7] | egress | packet_out_hdr.egress_port[8:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:7] | egress | packet_in_hdr.ingress_port[8:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [6:0] | egress | packet_out_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [6:0] | egress | packet_in_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv341 | - | | | | | | | | | | | | | | | | | |
| phv342 | - | | | | | | | | | | | | | | | | | |
| phv343 | - | | | | | | | | | | | | | | | | | |
@@ -481,9 +477,9 @@
-----------------------------------------------------------------------------------------------------------------------------------------
-Containers used: 58
-Containers with data overlayed: 9 (15.52%)
-Containers shared: 31 (53.45%)
+Containers used: 56
+Containers with data overlayed: 10 (17.86%)
+Containers shared: 26 (46.43%)
------------------------
Legend:
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.constraints.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.constraints.log
index cf3f771..6a0cbe3 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.constraints.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.constraints.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: pa.constraints.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
To populate this log file, include --print-pa-constraints as a compiler argument.
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.liveness.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.liveness.log
index 43dde6f..0c96580 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.liveness.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.liveness.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: pa.liveness.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.log
index 6caf282..253cf9e 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: pa.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
HLIR Version: 0.10.5
@@ -60,7 +60,7 @@
-----------------------------------------------
-----------------------------------------------
- Eliminating unused metadata (98 instances)
+ Eliminating unused metadata (99 instances)
-----------------------------------------------
Removing standard_metadata.ingress_port in ingress
Removing standard_metadata.packet_length in ingress
@@ -80,6 +80,7 @@
Removing ig_intr_md_for_tm.qid in ingress
Removing ig_intr_md_for_tm.icos_for_copy_to_cpu in ingress
Removing ig_intr_md_for_tm._pad2 in ingress
+Removing ig_intr_md_for_tm.copy_to_cpu in ingress
Removing ig_intr_md_for_tm.packet_color in ingress
Removing ig_intr_md_for_tm.disable_ucast_cutthru in ingress
Removing ig_intr_md_for_tm.enable_mcast_cutthru in ingress
@@ -174,10 +175,10 @@
--------------------------------------------
ingress field instance bit width histogram
--------------------------------------------
- Total fields: 49
+ Total fields: 48
Max value: 13
- 1 : xxxxxxxxxx (10)
+ 1 : xxxxxxxxx (9)
2 : x (1)
3 : xxxxx (5)
4 : xxx (3)
@@ -193,17 +194,17 @@
--------------------------------------------
egress field instance bit width histogram
--------------------------------------------
- Total fields: 46
+ Total fields: 44
Max value: 13
- 1 : xxxxxxx (7)
+ 1 : xxxxxx (6)
3 : xxxx (4)
4 : xxx (3)
5 : x (1)
6 : x (1)
7 : xxx (3)
8 : xxx (3)
- 9 : xxxx (4)
+ 9 : xxx (3)
13 : x (1)
16 : xxxxxxxxxxxxx (13)
32 : xxxx (4)
@@ -265,7 +266,7 @@
-----------------------------------------------
-----------------------------------------------
- Eliminating unused metadata (98 instances)
+ Eliminating unused metadata (99 instances)
-----------------------------------------------
Removing standard_metadata.ingress_port in ingress
Removing standard_metadata.packet_length in ingress
@@ -285,6 +286,7 @@
Removing ig_intr_md_for_tm.qid in ingress
Removing ig_intr_md_for_tm.icos_for_copy_to_cpu in ingress
Removing ig_intr_md_for_tm._pad2 in ingress
+Removing ig_intr_md_for_tm.copy_to_cpu in ingress
Removing ig_intr_md_for_tm.packet_color in ingress
Removing ig_intr_md_for_tm.disable_ucast_cutthru in ingress
Removing ig_intr_md_for_tm.enable_mcast_cutthru in ingress
@@ -379,10 +381,10 @@
--------------------------------------------
ingress field instance bit width histogram
--------------------------------------------
- Total fields: 49
+ Total fields: 48
Max value: 13
- 1 : xxxxxxxxxx (10)
+ 1 : xxxxxxxxx (9)
2 : x (1)
3 : xxxxx (5)
4 : xxx (3)
@@ -398,17 +400,17 @@
--------------------------------------------
egress field instance bit width histogram
--------------------------------------------
- Total fields: 46
+ Total fields: 44
Max value: 13
- 1 : xxxxxxx (7)
+ 1 : xxxxxx (6)
3 : xxxx (4)
4 : xxx (3)
5 : x (1)
6 : x (1)
7 : xxx (3)
8 : xxx (3)
- 9 : xxxx (4)
+ 9 : xxx (3)
13 : x (1)
16 : xxxxxxxxxxxxx (13)
32 : xxxx (4)
@@ -419,7 +421,7 @@
---------------------------------------------------------------------------------------------------------------------------------
| --validity_check--ethernet | 1 | egress | x | x | | | |
| --validity_check--ipv4 | 1 | egress | x | x | | | |
-| --validity_check--packet_in_hdr | 1 | egress | x | x | | | x |
+| --validity_check--packet_in_hdr | 1 | egress | x | x | | | |
| --validity_check--packet_out_hdr | 1 | egress | x | x | | | |
| --validity_check--tcp | 1 | egress | x | x | | | |
| --validity_check--udp | 1 | egress | x | x | | | |
@@ -430,8 +432,6 @@
| ethernet.dstAddr | 48 | egress | x | x | | | |
| ethernet.etherType | 16 | egress | x | x | | | |
| ethernet.srcAddr | 48 | egress | x | x | | | |
-| ig_intr_md.ingress_port | 9 | egress | x | | x | x | |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | egress | x | | x | x | |
| ipv4.diffserv | 8 | egress | x | x | | | |
| ipv4.dstAddr | 32 | egress | x | x | | | |
| ipv4.flags | 3 | egress | x | x | | | |
@@ -445,7 +445,7 @@
| ipv4.ttl | 8 | egress | x | x | | | |
| ipv4.version | 4 | egress | x | x | | | |
| packet_in_hdr._padding | 7 | egress | x | x | | | |
-| packet_in_hdr.ingress_port | 9 | egress | x | x | | | x |
+| packet_in_hdr.ingress_port | 9 | egress | x | x | | | |
| packet_out_hdr._padding | 7 | egress | x | x | | | |
| packet_out_hdr.egress_port | 9 | egress | x | x | | | |
| tcp.ackNo | 32 | egress | x | x | | | |
@@ -466,7 +466,7 @@
| --validity_check--ethernet | 1 | ingress | x | x | | | |
| --validity_check--ipv4 | 1 | ingress | x | x | | | |
| --validity_check--metadata_bridge | 1 | ingress | x | x | | | |
-| --validity_check--packet_in_hdr | 1 | ingress | x | x | | | |
+| --validity_check--packet_in_hdr | 1 | ingress | x | x | | | x |
| --validity_check--packet_out_hdr | 1 | ingress | x | x | | x | x |
| --validity_check--tcp | 1 | ingress | x | x | | | |
| --validity_check--udp | 1 | ingress | x | x | | | |
@@ -478,7 +478,6 @@
| ig_intr_md._pad3 | 3 | ingress | x | | x | | |
| ig_intr_md.ingress_port | 9 | ingress | x | x | x | x | |
| ig_intr_md.resubmit_flag | 1 | ingress | x | | x | | |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | ingress | | x | x | | x |
| ig_intr_md_for_tm.drop_ctl | 3 | ingress | | x | x | | x |
| ig_intr_md_for_tm.ucast_egress_port | 9 | ingress | | x | x | x | x |
| ipv4.diffserv | 8 | ingress | x | x | | | |
@@ -494,7 +493,7 @@
| ipv4.ttl | 8 | ingress | x | x | | | |
| ipv4.version | 4 | ingress | x | x | | | |
| packet_in_hdr._padding | 7 | ingress | x | x | | | |
-| packet_in_hdr.ingress_port | 9 | ingress | x | x | | | |
+| packet_in_hdr.ingress_port | 9 | ingress | x | x | | | x |
| packet_out_hdr._padding | 7 | ingress | x | x | | | |
| packet_out_hdr.egress_port | 9 | ingress | x | x | | x | |
| tcp.ackNo | 32 | ingress | x | x | | | |
@@ -550,19 +549,19 @@
parse_pkt_in and parse_pkt_out are exclusive parse states
parse_tcp and parse_udp are exclusive parse states
->>Event 'pa_init' at time 1504792570.39
+>>Event 'pa_init' at time 1504859028.15
Took 0.01 seconds
--------------------------------------------
-PHV MAU Groups: 93
+PHV MAU Groups: 90
--------------------------------------------
Phv Mau Group (ingress) -- 2 instances for total bit width of 18.
+ ig_intr_md.ingress_port <9 bits ingress parsed imeta R>
+ packet_in_hdr.ingress_port <9 bits ingress parsed W>
+
+Phv Mau Group (ingress) -- 2 instances for total bit width of 18.
ig_intr_md_for_tm.ucast_egress_port <9 bits ingress imeta R W>
packet_out_hdr.egress_port <9 bits ingress parsed R>
-Phv Mau Group (egress) -- 2 instances for total bit width of 18.
- packet_in_hdr.ingress_port <9 bits egress parsed W>
- ig_intr_md.ingress_port <9 bits egress parsed imeta R>
-
Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
ig_intr_md.resubmit_flag <1 bits ingress parsed imeta>
@@ -575,20 +574,11 @@
Phv Mau Group (ingress) -- 1 instance for total bit width of 3.
ig_intr_md._pad3 <3 bits ingress parsed imeta>
-Phv Mau Group (ingress) -- 1 instance for total bit width of 9.
- ig_intr_md.ingress_port <9 bits ingress parsed imeta R>
-
Phv Mau Group (ingress) -- 1 instance for total bit width of 3.
ig_intr_md_for_tm.drop_ctl <3 bits ingress imeta W>
Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
- ig_intr_md_for_tm.copy_to_cpu <1 bits ingress imeta W>
-
-Phv Mau Group (ingress) -- 1 instance for total bit width of 9.
- packet_in_hdr.ingress_port <9 bits ingress parsed tagalong>
-
-Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
- --validity_check--packet_in_hdr <1 bits ingress parsed pov>
+ --validity_check--packet_in_hdr <1 bits ingress parsed pov W>
Phv Mau Group (ingress) -- 1 instance for total bit width of 7.
packet_in_hdr._padding <7 bits ingress parsed tagalong>
@@ -704,8 +694,11 @@
Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
--validity_check--metadata_bridge <1 bits ingress parsed pov>
+Phv Mau Group (egress) -- 1 instance for total bit width of 9.
+ packet_in_hdr.ingress_port <9 bits egress parsed tagalong>
+
Phv Mau Group (egress) -- 1 instance for total bit width of 1.
- --validity_check--packet_in_hdr <1 bits egress parsed pov W>
+ --validity_check--packet_in_hdr <1 bits egress parsed pov>
Phv Mau Group (egress) -- 1 instance for total bit width of 7.
packet_in_hdr._padding <7 bits egress parsed tagalong>
@@ -821,9 +814,6 @@
Phv Mau Group (egress) -- 1 instance for total bit width of 16.
udp.checksum <16 bits egress parsed tagalong>
-Phv Mau Group (egress) -- 1 instance for total bit width of 1.
- ig_intr_md_for_tm.copy_to_cpu <1 bits egress parsed imeta R>
-
Phv Mau Group (egress) -- 1 instance for total bit width of 7.
eg_intr_md._pad0 <7 bits egress parsed imeta>
@@ -837,7 +827,7 @@
eg_intr_md.egress_cos <3 bits egress parsed imeta>
->>Event 'pa_resv' at time 1504792570.39
+>>Event 'pa_resv' at time 1504859028.15
Took 0.00 seconds
-----------------------------------------------
@@ -879,239 +869,14 @@
Group 2 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv32
Group 3 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv48
Reserving 32-bit container for ingress: phv0
->>Event 'pa_bridge' at time 1504792570.43
+>>Event 'pa_bridge' at time 1504859028.19
Took 0.04 seconds
-----------------------------------------------
Allocating fields related to bridged metadata
-----------------------------------------------
Allocation Step
- ig_intr_md.ingress_port <9 bits ingress parsed imeta R> and ig_intr_md.ingress_port <9 bits egress parsed imeta R>
- ig_intr_md_for_tm.copy_to_cpu <1 bits ingress imeta W> and ig_intr_md_for_tm.copy_to_cpu <1 bits egress parsed imeta R>
-
-
-Allowed alignment for fields:
- ig_intr_md.ingress_port -> [0, 8, 16, 24]
- ig_intr_md_for_tm.copy_to_cpu -> [0, 1, 2, 3, 4, 5, 6, 7]
-
-Required packing for bridged metadata: 1
- ig_intr_md.ingress_port (ingress)
- phv[15:15] = ig_intr_md.resubmit_flag[0:0]
- phv[14:14] = ig_intr_md._pad1[0:0]
- phv[13:12] = ig_intr_md._pad2[1:0]
- phv[11:9] = ig_intr_md._pad3[2:0]
- phv[8:0] = ig_intr_md.ingress_port[8:0]
-ig_intr_md_for_tm.copy_to_cpu cannot share with any fields: total bits 1
-
-
-All combinations = 1
-Valid combinations = 1
-Choosing to pack non-byte multiple metadata as below, which wastes 0 bits
-
-Sharing capabilities of groups: (2)
-Group ['ig_intr_md.resubmit_flag', 'ig_intr_md._pad1', 'ig_intr_md._pad2', 'ig_intr_md._pad3', 'ig_intr_md.ingress_port'] can share with 0 other groups:
-Group ['ig_intr_md_for_tm.copy_to_cpu'] can share with 0 other groups:
-
-Merged sharing capabilities of groups: (2)
-Group ['ig_intr_md.resubmit_flag', 'ig_intr_md._pad1', 'ig_intr_md._pad2', 'ig_intr_md._pad3', 'ig_intr_md.ingress_port'] can share with 0 other groups (16 bits):
-Group ['ig_intr_md_for_tm.copy_to_cpu'] can share with 0 other groups (1 bits):
-
-Final group packing:
-Group 0:
- ['ig_intr_md_for_tm.copy_to_cpu']
-Group 1:
- ['ig_intr_md.resubmit_flag', 'ig_intr_md._pad1', 'ig_intr_md._pad2', 'ig_intr_md._pad3', 'ig_intr_md.ingress_port']
-Preferred packing is [8, 16]
-
-Final ingress bridged metadata packing: 24 bits (3 bytes)
- -pad-0- / 7 bits
- ig_intr_md_for_tm.copy_to_cpu / 1 bits
- ig_intr_md.resubmit_flag / 1 bits
- ig_intr_md._pad1 / 1 bits
- ig_intr_md._pad2 / 2 bits
- ig_intr_md._pad3 / 3 bits
- ig_intr_md.ingress_port / 9 bits
-
-Final egress bridged metadata packing: 24 bits (3 bytes)
- -pad-0- / 7 bits
- ig_intr_md_for_tm.copy_to_cpu / 1 bits
- -pad-1- / 7 bits
- ig_intr_md.ingress_port / 9 bits
-
--------------------------------------------
-Allocating parsed header: pkt fields (7) / meta fields (0) using extraction bandwidth 224
--------------------------------------------
-Extracted bits: 24
-Set metadata bits: 0
-Gress: ingress
-bits_will_need_to_parse = 24
-unused_metadata_container_bits = 0
-min_parse_states = 1
-bits_per_state = 24
-Parse state 0 (24 bits)
- -pad-0- [6:0]
- ig_intr_md_for_tm.copy_to_cpu [0:0]
- ig_intr_md.resubmit_flag [0:0]
- ig_intr_md._pad1 [0:0]
- ig_intr_md._pad2 [1:0]
- ig_intr_md._pad3 [2:0]
- ig_intr_md.ingress_port [8:0]
-----------------------------------------------------------------------------------------------------
-| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-----------------------------------------------------------------------------------------------------
-| -pad-0- | 7 | True | - | - | - | None | 1 |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | False | - | - | - | 1 | 1 |
-| ig_intr_md.resubmit_flag | 1 | False | - | - | - | 1 | 1 |
-| ig_intr_md._pad1 | 1 | False | - | - | - | 1 | 1 |
-| ig_intr_md._pad2 | 2 | False | - | - | - | 1 | 1 |
-| ig_intr_md._pad3 | 3 | False | - | - | - | 1 | 1 |
-| ig_intr_md.ingress_port | 9 | False | - | - | - | 2 | 1 |
-----------------------------------------------------------------------------------------------------
-
-Packing options: 5
-MAU containers available:
- 8-bit: 48
- 16-bit: 80
- 32-bit: 47
-Tagalong containers available:
- 8-bit: 32
- 16-bit: 48
- 32-bit: 32
-Initial packing options: 5
-
-Packing option 0: [8, 16]
-MAU containers after:
- 8-bit: 47
- 16-bit: 79
- 32-bit: 47
-+----------------------------------------+
-| -pad-0- [6:0] |
-| ig_intr_md_for_tm.copy_to_cpu [0:0] |
-+----------------------------------------+
-| ig_intr_md.resubmit_flag [0:0] |
-| ig_intr_md._pad1 [0:0] |
-| ig_intr_md._pad2 [1:0] |
-| ig_intr_md._pad3 [2:0] |
-| ig_intr_md.ingress_port [8:0] |
-+----------------------------------------+
-
-Looking at -pad-0- (ingress) [6:0], with test_alloc = False
-Looking at ig_intr_md_for_tm.copy_to_cpu (ingress) [0:0], with test_alloc = True
-----> ig_intr_md_for_tm.copy_to_cpu (ingress) is allocated? False
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 3
- Group 4 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv64
- Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
- Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
-***Allocating phv64[7:1] for -pad-0-[6:0]
-***Allocating phv64[0:0] for ig_intr_md_for_tm.copy_to_cpu[0:0]
-Looking at ig_intr_md.resubmit_flag (ingress) [0:0], with test_alloc = True
-----> ig_intr_md.resubmit_flag (ingress) is allocated? False
-Looking at ig_intr_md._pad1 (ingress) [0:0], with test_alloc = True
-Looking at ig_intr_md._pad2 (ingress) [1:0], with test_alloc = True
-Looking at ig_intr_md._pad3 (ingress) [2:0], with test_alloc = True
-Looking at ig_intr_md.ingress_port (ingress) [8:0], with test_alloc = True
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 5
- Group 8 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv128
- Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv160
- Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv176
- Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv192
- Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
-***Allocating phv128[15:15] for ig_intr_md.resubmit_flag[0:0]
-***Allocating phv128[14:14] for ig_intr_md._pad1[0:0]
-***Allocating phv128[13:12] for ig_intr_md._pad2[1:0]
-***Allocating phv128[11:9] for ig_intr_md._pad3[2:0]
-***Allocating phv128[8:0] for ig_intr_md.ingress_port[8:0]
-Packing options tried: 1
-Packing options skipped: 0
-
-
--------------------------------------------
-Allocating parsed header: pkt fields (4) / meta fields (0) using extraction bandwidth 224
--------------------------------------------
-Extracted bits: 24
-Set metadata bits: 0
-Gress: egress
-bits_will_need_to_parse = 24
-unused_metadata_container_bits = 0
-min_parse_states = 1
-bits_per_state = 24
-Parse state 0 (24 bits)
- -pad-0- [6:0]
- ig_intr_md_for_tm.copy_to_cpu [0:0]
- -pad-1- [6:0]
- ig_intr_md.ingress_port [8:0]
-----------------------------------------------------------------------------------------------------
-| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-----------------------------------------------------------------------------------------------------
-| -pad-0- | 7 | True | - | - | - | None | 1 |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | False | - | - | - | None | 1 |
-| -pad-1- | 7 | True | - | - | - | None | 1 |
-| ig_intr_md.ingress_port | 9 | False | - | - | [32] | None | 2 |
-----------------------------------------------------------------------------------------------------
-
-Packing options: 5
-MAU containers available:
- 8-bit: 48
- 16-bit: 80
- 32-bit: 48
-Tagalong containers available:
- 8-bit: 32
- 16-bit: 48
- 32-bit: 32
-Initial packing options: 5
-
-Packing option 0: [8, 16]
-MAU containers after:
- 8-bit: 47
- 16-bit: 78
- 32-bit: 48
-+----------------------------------------+
-| -pad-0- [6:0] |
-| ig_intr_md_for_tm.copy_to_cpu [0:0] |
-+----------------------------------------+
-| -pad-1- [6:0] |
-| ig_intr_md.ingress_port [8:0] |
-+----------------------------------------+
-
-Looking at -pad-0- (egress) [6:0], with test_alloc = False
-Looking at ig_intr_md_for_tm.copy_to_cpu (egress) [0:0], with test_alloc = True
-----> ig_intr_md_for_tm.copy_to_cpu (egress) is allocated? False
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 3
- Group 5 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv80
- Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv96
- Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv112
-***Allocating phv80[7:1] for -pad-0-[6:0]
-***Allocating phv80[0:0] for ig_intr_md_for_tm.copy_to_cpu[0:0]
-Looking at -pad-1- (egress) [6:0], with test_alloc = False
-Looking at ig_intr_md.ingress_port (egress) [8:0], with test_alloc = True
-----> ig_intr_md.ingress_port (egress) is allocated? False
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 5
- Group 9 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv144
- Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv160
- Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv176
- Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv192
- Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv208
-***Allocating phv144[15:9] for -pad-1-[6:0]
-***Allocating phv144[8:0] for ig_intr_md.ingress_port[8:0]
-Packing options tried: 1
-Packing options skipped: 0
-
+ No bridged metadata field instances required
After allocating bridged metadata:
Allocation state: Final Allocation
@@ -1125,19 +890,19 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 1 (1.56%) | 32 (1.56%) | 2048 |
| | | | |
-| 4 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
-| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 4 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 5 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 2 (3.12%) | 16 (3.12%) | 512 |
+| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 512 |
| | | | |
-| 8 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
-| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 8 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 9 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 2 (2.08%) | 32 (2.08%) | 1536 |
+| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 1536 |
| | | | |
| 14 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
@@ -1152,13 +917,13 @@
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 768 |
| | | | |
-| MAU total | 5 (2.23%) | 80 (1.95%) | 4096 |
+| MAU total | 1 (0.45%) | 32 (0.78%) | 4096 |
| Tagalong total | 0 (0.00%) | 0 (0.00%) | 2048 |
-| Overall total | 5 (1.49%) | 80 (1.30%) | 6144 |
+| Overall total | 1 (0.30%) | 32 (0.52%) | 6144 |
---------------------------------------------------------------------------
->>Event 'pa_phase0' at time 1504792570.84
- Took 0.41 seconds
+>>Event 'pa_phase0' at time 1504859028.19
+ Took 0.00 seconds
-----------------------------------------------
Allocating Phase 0-related metadata
@@ -1178,19 +943,19 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 1 (1.56%) | 32 (1.56%) | 2048 |
| | | | |
-| 4 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
-| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 4 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 5 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 2 (3.12%) | 16 (3.12%) | 512 |
+| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 512 |
| | | | |
-| 8 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
-| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 8 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 9 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 2 (2.08%) | 32 (2.08%) | 1536 |
+| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 1536 |
| | | | |
| 14 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
@@ -1205,12 +970,12 @@
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 768 |
| | | | |
-| MAU total | 5 (2.23%) | 80 (1.95%) | 4096 |
+| MAU total | 1 (0.45%) | 32 (0.78%) | 4096 |
| Tagalong total | 0 (0.00%) | 0 (0.00%) | 2048 |
-| Overall total | 5 (1.49%) | 80 (1.30%) | 6144 |
+| Overall total | 1 (0.30%) | 32 (0.52%) | 6144 |
---------------------------------------------------------------------------
->>Event 'pa_critical' at time 1504792570.84
+>>Event 'pa_critical' at time 1504859028.20
Took 0.00 seconds
-----------------------------------------------
@@ -1219,6 +984,7 @@
Allocation Step
All Sorted parse nodes:
+ ingress_intrinsic_metadata (ingress) with bits = 16 and max = 2
parse_pkt_out (ingress) with bits = 16 and max = 2
parse_ipv4 (ingress) with bits = 160 and max = 1
parse_tcp (ingress) with bits = 160 and max = 1
@@ -1227,7 +993,6 @@
parse_ethernet (ingress) with bits = 112 and max = 1
parse_ethernet (egress) with bits = 112 and max = 1
egress_intrinsic_metadata (egress) with bits = 24 and max = 1
- ingress_intrinsic_metadata (ingress) with bits = 16 and max = 1
parse_pkt_out (egress) with bits = 16 and max = 1
start () with bits = 0 and max = 0
default_parser () with bits = 0 and max = 0
@@ -1239,6 +1004,85 @@
Total packet bits: 936
Total meta bits: 0
Total bits: 936
+Working on parse node ingress_intrinsic_metadata (9) (ingress)
+
+-------------------------------------------
+Allocating parsed header: pkt fields (5) / meta fields (0) using extraction bandwidth 224
+-------------------------------------------
+Extracted bits: 16
+Set metadata bits: 0
+Gress: ingress
+bits_will_need_to_parse = 16
+unused_metadata_container_bits = 0
+min_parse_states = 1
+bits_per_state = 16
+Parse state 0 (16 bits)
+ ig_intr_md.resubmit_flag [0:0]
+ ig_intr_md._pad1 [0:0]
+ ig_intr_md._pad2 [1:0]
+ ig_intr_md._pad3 [2:0]
+ ig_intr_md.ingress_port [8:0]
+-----------------------------------------------------------------------------------------------
+| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
+-----------------------------------------------------------------------------------------------
+| ig_intr_md.resubmit_flag | 1 | False | - | - | - | 1 | 1 |
+| ig_intr_md._pad1 | 1 | False | - | - | - | 1 | 1 |
+| ig_intr_md._pad2 | 2 | False | - | - | - | 1 | 1 |
+| ig_intr_md._pad3 | 3 | False | - | - | - | 1 | 1 |
+| ig_intr_md.ingress_port | 9 | False | - | - | [32] | 2 | 2 |
+-----------------------------------------------------------------------------------------------
+
+min_extracts[8] = 1
+min_extracts[16] = 1
+min_extracts[32] = 1
+Packing options: 2
+MAU containers available:
+ 8-bit: 48
+ 16-bit: 80
+ 32-bit: 47
+Tagalong containers available:
+ 8-bit: 32
+ 16-bit: 48
+ 32-bit: 32
+Initial packing options: 2
+
+Packing option 0: [16]
+MAU containers after:
+ 8-bit: 48
+ 16-bit: 78
+ 32-bit: 47
++-----------------------------------+
+| ig_intr_md.resubmit_flag [0:0] |
+| ig_intr_md._pad1 [0:0] |
+| ig_intr_md._pad2 [1:0] |
+| ig_intr_md._pad3 [2:0] |
+| ig_intr_md.ingress_port [8:0] |
++-----------------------------------+
+
+Looking at ig_intr_md.resubmit_flag (ingress) [0:0], with test_alloc = True
+----> ig_intr_md.resubmit_flag (ingress) is allocated? False
+Looking at ig_intr_md._pad1 (ingress) [0:0], with test_alloc = True
+Looking at ig_intr_md._pad2 (ingress) [1:0], with test_alloc = True
+Looking at ig_intr_md._pad3 (ingress) [2:0], with test_alloc = True
+Looking at ig_intr_md.ingress_port (ingress) [8:0], with test_alloc = True
+Checking if can overlay metadata field.
+No required PHV group.
+Could not find container to overlay in.
+
+MAU groups: 5
+ Group 8 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv128
+ Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv160
+ Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv176
+ Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv192
+ Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
+***Allocating phv128[15:15] for ig_intr_md.resubmit_flag[0:0]
+***Allocating phv128[14:14] for ig_intr_md._pad1[0:0]
+***Allocating phv128[13:12] for ig_intr_md._pad2[1:0]
+***Allocating phv128[11:9] for ig_intr_md._pad3[2:0]
+***Allocating phv128[8:0] for ig_intr_md.ingress_port[8:0]
+Packing options tried: 1
+Packing options skipped: 0
+
Working on parse node parse_pkt_out (4) (ingress)
-------------------------------------------
@@ -1266,8 +1110,8 @@
min_extracts[32] = 1
Packing options: 2
MAU containers available:
- 8-bit: 47
- 16-bit: 79
+ 8-bit: 48
+ 16-bit: 78
32-bit: 47
Tagalong containers available:
8-bit: 32
@@ -1277,8 +1121,8 @@
Packing option 0: [16]
MAU containers after:
- 8-bit: 47
- 16-bit: 77
+ 8-bit: 48
+ 16-bit: 76
32-bit: 47
+-------------------------------------+
| packet_out_hdr.egress_port [8:0] |
@@ -1347,7 +1191,7 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 47
+ 8-bit: 48
16-bit: 77
32-bit: 47
Tagalong containers available:
@@ -1358,7 +1202,7 @@
Packing option 0: [8, 8, 16, 16, 16, 32, 32, 32]
MAU containers after:
- 8-bit: 47
+ 8-bit: 48
16-bit: 77
32-bit: 47
+------------------------------+
@@ -1463,7 +1307,7 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 47
+ 8-bit: 48
16-bit: 77
32-bit: 47
Tagalong containers available:
@@ -1472,9 +1316,9 @@
32-bit: 29
Initial packing options: 5196
-Packing option 0: [8, 8, 16, 16, 16, 32, 32, 32]
+Packing option 0: [8, 8, 8, 8, 16, 16, 16, 16, 32, 32]
MAU containers after:
- 8-bit: 47
+ 8-bit: 48
16-bit: 77
32-bit: 47
+-------------------------+
@@ -1482,13 +1326,17 @@
+-------------------------+
| tcp.srcPort [7:0] |
+-------------------------+
-| tcp.dstPort [15:0] |
+| tcp.dstPort [15:8] |
++-------------------------+
+| tcp.dstPort [7:0] |
+-------------------------+
| tcp.seqNo [31:16] |
+-------------------------+
| tcp.seqNo [15:0] |
+-------------------------+
-| tcp.ackNo [31:0] |
+| tcp.ackNo [31:16] |
++-------------------------+
+| tcp.ackNo [15:0] |
+-------------------------+
| tcp.dataOffset [3:0] |
| tcp.res [2:0] |
@@ -1506,34 +1354,40 @@
Looking at tcp.srcPort (ingress) [7:0], with test_alloc = True
----> tcp.srcPort (ingress) is allocated? False
***Allocating phv291[7:0] for tcp.srcPort[7:0]
-Looking at tcp.dstPort (ingress) [15:0], with test_alloc = True
+Looking at tcp.dstPort (ingress) [15:8], with test_alloc = True
----> tcp.dstPort (ingress) is allocated? False
-***Allocating phv323[15:0] for tcp.dstPort[15:0]
+***Allocating phv292[7:0] for tcp.dstPort[15:8]
+Looking at tcp.dstPort (ingress) [7:0], with test_alloc = True
+----> tcp.dstPort (ingress) is allocated? False
+***Allocating phv293[7:0] for tcp.dstPort[7:0]
Looking at tcp.seqNo (ingress) [31:16], with test_alloc = True
----> tcp.seqNo (ingress) is allocated? False
-***Allocating phv324[15:0] for tcp.seqNo[31:16]
+***Allocating phv323[15:0] for tcp.seqNo[31:16]
Looking at tcp.seqNo (ingress) [15:0], with test_alloc = True
----> tcp.seqNo (ingress) is allocated? False
-***Allocating phv325[15:0] for tcp.seqNo[15:0]
-Looking at tcp.ackNo (ingress) [31:0], with test_alloc = True
+***Allocating phv324[15:0] for tcp.seqNo[15:0]
+Looking at tcp.ackNo (ingress) [31:16], with test_alloc = True
----> tcp.ackNo (ingress) is allocated? False
-***Allocating phv259[31:0] for tcp.ackNo[31:0]
+***Allocating phv325[15:0] for tcp.ackNo[31:16]
+Looking at tcp.ackNo (ingress) [15:0], with test_alloc = True
+----> tcp.ackNo (ingress) is allocated? False
+***Allocating phv326[15:0] for tcp.ackNo[15:0]
Looking at tcp.dataOffset (ingress) [3:0], with test_alloc = True
----> tcp.dataOffset (ingress) is allocated? False
Looking at tcp.res (ingress) [2:0], with test_alloc = True
Looking at tcp.ecn (ingress) [2:0], with test_alloc = True
Looking at tcp.ctrl (ingress) [5:0], with test_alloc = True
Looking at tcp.window (ingress) [15:0], with test_alloc = True
-***Allocating phv260[31:28] for tcp.dataOffset[3:0]
-***Allocating phv260[27:25] for tcp.res[2:0]
-***Allocating phv260[24:22] for tcp.ecn[2:0]
-***Allocating phv260[21:16] for tcp.ctrl[5:0]
-***Allocating phv260[15:0] for tcp.window[15:0]
+***Allocating phv259[31:28] for tcp.dataOffset[3:0]
+***Allocating phv259[27:25] for tcp.res[2:0]
+***Allocating phv259[24:22] for tcp.ecn[2:0]
+***Allocating phv259[21:16] for tcp.ctrl[5:0]
+***Allocating phv259[15:0] for tcp.window[15:0]
Looking at tcp.checksum (ingress) [15:0], with test_alloc = True
----> tcp.checksum (ingress) is allocated? False
Looking at tcp.urgentPtr (ingress) [15:0], with test_alloc = True
-***Allocating phv261[31:16] for tcp.checksum[15:0]
-***Allocating phv261[15:0] for tcp.urgentPtr[15:0]
+***Allocating phv260[31:16] for tcp.checksum[15:0]
+***Allocating phv260[15:0] for tcp.urgentPtr[15:0]
Packing options tried: 1
Packing options skipped: 0
@@ -1584,8 +1438,8 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
8-bit: 24
@@ -1595,8 +1449,8 @@
Packing option 0: [8, 8, 16, 16, 16, 32, 32, 32]
MAU containers after:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
+------------------------------+
| ipv4.version [3:0] |
@@ -1700,8 +1554,8 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
8-bit: 22
@@ -1711,8 +1565,8 @@
Packing option 0: [8, 8, 16, 16, 16, 32, 32, 32]
MAU containers after:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
+-------------------------+
| tcp.srcPort [15:8] |
@@ -1803,18 +1657,18 @@
min_extracts[32] = 1
Packing options: 604
MAU containers available:
- 8-bit: 47
+ 8-bit: 48
16-bit: 77
32-bit: 47
Tagalong containers available:
- 8-bit: 20
- 16-bit: 30
- 32-bit: 18
+ 8-bit: 18
+ 16-bit: 29
+ 32-bit: 19
Initial packing options: 604
Packing option 0: [8, 32, 16, 8, 32, 16]
MAU containers after:
- 8-bit: 45
+ 8-bit: 46
16-bit: 75
32-bit: 45
+-----------------------------+
@@ -1836,10 +1690,10 @@
----> ethernet.dstAddr (ingress) is allocated? False
MAU groups: 3
- Group 4 8 bits -- avail 15 -- ingress avail 15 and remain 14 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv65
+ Group 4 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv64
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
-***Allocating phv65[7:0] for ethernet.dstAddr[47:40]
+***Allocating phv64[7:0] for ethernet.dstAddr[47:40]
Looking at ethernet.dstAddr (ingress) [39:8], with test_alloc = True
----> ethernet.dstAddr (ingress) is allocated? False
@@ -1864,10 +1718,10 @@
----> ethernet.srcAddr (ingress) is allocated? False
MAU groups: 3
- Group 4 8 bits -- avail 14 -- ingress avail 14 and remain 13 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv66
+ Group 4 8 bits -- avail 15 -- ingress avail 15 and remain 14 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv65
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
-***Allocating phv66[7:0] for ethernet.srcAddr[39:32]
+***Allocating phv65[7:0] for ethernet.srcAddr[39:32]
Looking at ethernet.srcAddr (ingress) [31:0], with test_alloc = True
----> ethernet.srcAddr (ingress) is allocated? False
@@ -1918,8 +1772,8 @@
min_extracts[32] = 1
Packing options: 604
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
8-bit: 20
@@ -1929,8 +1783,8 @@
Packing option 0: [8, 32, 16, 8, 32, 16]
MAU containers after:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
+-----------------------------+
| ethernet.dstAddr [47:40] |
@@ -2001,8 +1855,8 @@
min_extracts[32] = 1
Packing options: 3
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
8-bit: 18
@@ -2012,8 +1866,8 @@
Packing option 1: [16, 8]
MAU containers after:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
+---------------------------------+
| eg_intr_md._pad0 [6:0] |
@@ -2028,31 +1882,29 @@
Looking at eg_intr_md.egress_port (egress) [8:0], with test_alloc = True
Checking if can overlay metadata field.
No required PHV group.
- Group 9 16 bits -- deparsed True -- avail 15 and promised 2 -- ingress promised 0 and remain 0 and req 8 -- egress promised 2 and remain 13 and req 2 -- act like deparsed True -- container_to_use phv146 -- fails False
Could not find container to overlay in.
MAU groups: 5
- Group 9 16 bits -- avail 15 -- ingress avail 8 and remain 8 and promised 0 and req 0 -- egress avail 15 and remain 13 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv146
+ Group 9 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv144
Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv160
Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv176
Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv192
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv208
-***Allocating phv146[15:9] for eg_intr_md._pad0[6:0]
-***Allocating phv146[8:0] for eg_intr_md.egress_port[8:0]
+***Allocating phv144[15:9] for eg_intr_md._pad0[6:0]
+***Allocating phv144[8:0] for eg_intr_md.egress_port[8:0]
Looking at eg_intr_md._pad7 (egress) [4:0], with test_alloc = True
----> eg_intr_md._pad7 (egress) is allocated? False
Looking at eg_intr_md.egress_cos (egress) [2:0], with test_alloc = True
Checking if can overlay metadata field.
No required PHV group.
- Group 5 8 bits -- deparsed True -- avail 15 and promised 1 -- ingress promised 0 and remain 0 and req 8 -- egress promised 1 and remain 14 and req 1 -- act like deparsed True -- container_to_use phv81 -- fails False
Could not find container to overlay in.
MAU groups: 3
- Group 5 8 bits -- avail 15 -- ingress avail 8 and remain 8 and promised 0 and req 0 -- egress avail 15 and remain 14 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv81
+ Group 5 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv80
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv112
-***Allocating phv81[7:3] for eg_intr_md._pad7[4:0]
-***Allocating phv81[2:0] for eg_intr_md.egress_cos[2:0]
+***Allocating phv80[7:3] for eg_intr_md._pad7[4:0]
+***Allocating phv80[2:0] for eg_intr_md.egress_cos[2:0]
Packing options tried: 2
Packing options skipped: 0
Failure Reasons:
@@ -2065,86 +1917,6 @@
ContainerAlignment Constraint: eg_intr_md.egress_cos <3 bits egress parsed imeta> -- field_bit: 0 -- bits_list: [0, 1, 2, 3, 4, 5, 6, 7]
]
-Working on parse node ingress_intrinsic_metadata (9) (ingress)
-
--------------------------------------------
-Allocating parsed header: pkt fields (5) / meta fields (0) using extraction bandwidth 224
--------------------------------------------
-Extracted bits: 16
-Set metadata bits: 0
-Gress: ingress
-bits_will_need_to_parse = 16
-unused_metadata_container_bits = 0
-min_parse_states = 1
-bits_per_state = 16
-Already allocated? ig_intr_md.resubmit_flag (ingress)
-Already allocated? ig_intr_md._pad1 (ingress)
-Already allocated? ig_intr_md._pad2 (ingress)
-Already allocated? ig_intr_md._pad3 (ingress)
-Already allocated? ig_intr_md.ingress_port (ingress)
-Already allocated? ig_intr_md.ingress_port (ingress)
-Parse state 0 (16 bits)
- ig_intr_md.resubmit_flag [0:0]
- ig_intr_md._pad1 [0:0]
- ig_intr_md._pad2 [1:0]
- ig_intr_md._pad3 [2:0]
- ig_intr_md.ingress_port [8:0]
------------------------------------------------------------------------------------------------------
-| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
------------------------------------------------------------------------------------------------------
-| ig_intr_md.resubmit_flag | 1 | False | [(16, 1)] | - | - | 1 | 1 |
-| ig_intr_md._pad1 | 1 | False | [(16, 1)] | - | - | 1 | 1 |
-| ig_intr_md._pad2 | 2 | False | [(16, 2)] | - | - | 1 | 1 |
-| ig_intr_md._pad3 | 3 | False | [(16, 3)] | - | - | 1 | 1 |
-| ig_intr_md.ingress_port | 9 | False | [(16, 9)] | - | - | 2 | 1 |
------------------------------------------------------------------------------------------------------
-
-min_extracts[8] = 1
-min_extracts[16] = 6
-min_extracts[32] = 1
-Packing options: 2
-MAU containers available:
- 8-bit: 45
- 16-bit: 75
- 32-bit: 45
-Tagalong containers available:
- 8-bit: 20
- 16-bit: 30
- 32-bit: 18
-Initial packing options: 2
-
-Packing option 0: [16]
-MAU containers after:
- 8-bit: 45
- 16-bit: 75
- 32-bit: 45
-+-----------------------------------+
-| ig_intr_md.resubmit_flag [0:0] |
-| ig_intr_md._pad1 [0:0] |
-| ig_intr_md._pad2 [1:0] |
-| ig_intr_md._pad3 [2:0] |
-| ig_intr_md.ingress_port [8:0] |
-+-----------------------------------+
-
-Looking at ig_intr_md.resubmit_flag (ingress) [0:0], with test_alloc = True
-----> ig_intr_md.resubmit_flag (ingress) is allocated? True
-Looking at ig_intr_md._pad1 (ingress) [0:0], with test_alloc = True
-----> ig_intr_md._pad1 (ingress) is allocated? True
-Looking at ig_intr_md._pad2 (ingress) [1:0], with test_alloc = True
-----> ig_intr_md._pad2 (ingress) is allocated? True
-Looking at ig_intr_md._pad3 (ingress) [2:0], with test_alloc = True
-----> ig_intr_md._pad3 (ingress) is allocated? True
-Looking at ig_intr_md.ingress_port (ingress) [8:0], with test_alloc = True
-----> ig_intr_md.ingress_port (ingress) is allocated? True
-Fields for container 16 at index 0 already allocated. No need to overlay or allocate new.
- ig_intr_md.resubmit_flag[0:0]
- ig_intr_md._pad1[0:0]
- ig_intr_md._pad2[1:0]
- ig_intr_md._pad3[2:0]
- ig_intr_md.ingress_port[8:0]
-Packing options tried: 1
-Packing options skipped: 0
-
Working on parse node parse_pkt_out (4) (egress)
-------------------------------------------
@@ -2172,8 +1944,8 @@
min_extracts[32] = 1
Packing options: 2
MAU containers available:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
Tagalong containers available:
8-bit: 18
@@ -2183,8 +1955,8 @@
Packing option 0: [16]
MAU containers after:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
+-------------------------------------+
| packet_out_hdr.egress_port [8:0] |
@@ -2209,50 +1981,50 @@
After allocating critical parse paths:
Allocation state: Final Allocation
-------------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
-------------------------------------------------------------------------------
-| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
-| | | | |
-| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 5 (7.81%) | 40 (7.81%) | 512 |
-| | | | |
-| 8 (16) | 4 (25.00%) | 64 (25.00%) | 256 |
-| 9 (16) | 2 (12.50%) | 32 (12.50%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 6 (6.25%) | 96 (6.25%) | 1536 |
-| | | | |
-| 14 (32) T | 14 (87.50%) | 448 (87.50%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 14 (43.75%) | 448 (43.75%) | 1024 |
-| | | | |
-| 16 (8) T | 10 (62.50%) | 80 (62.50%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 10 (31.25%) | 80 (31.25%) | 256 |
-| | | | |
-| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
-| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
-| | | | |
-| MAU total | 14 (6.25%) | 232 (5.66%) | 4096 |
-| Tagalong total | 39 (34.82%) | 768 (37.50%) | 2048 |
-| Overall total | 53 (15.77%) | 1000 (16.28%) | 6144 |
-------------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+-----------------------------------------------------------------------------
+| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
+| | | | |
+| 4 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 3 (4.69%) | 24 (4.69%) | 512 |
+| | | | |
+| 8 (16) | 4 (25.00%) | 64 (25.00%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 5 (5.21%) | 80 (5.21%) | 1536 |
+| | | | |
+| 14 (32) T | 13 (81.25%) | 416 (81.25%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 13 (40.62%) | 416 (40.62%) | 1024 |
+| | | | |
+| 16 (8) T | 12 (75.00%) | 96 (75.00%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 12 (37.50%) | 96 (37.50%) | 256 |
+| | | | |
+| 18 (16) T | 11 (68.75%) | 176 (68.75%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 16 (33.33%) | 256 (33.33%) | 768 |
+| | | | |
+| MAU total | 11 (4.91%) | 200 (4.88%) | 4096 |
+| Tagalong total | 41 (36.61%) | 768 (37.50%) | 2048 |
+| Overall total | 52 (15.48%) | 968 (15.76%) | 6144 |
+-----------------------------------------------------------------------------
->>Event 'pa_overlay' at time 1504792579.77
- Took 8.93 seconds
+>>Event 'pa_overlay' at time 1504859037.24
+ Took 9.05 seconds
-----------------------------------------------
Allocating remaining parsed fields
@@ -2260,21 +2032,21 @@
Allocation Step
All Sorted parse nodes (non-critical):
- parse_pkt_in (egress) with bits = 16 and max = 2
+ parse_pkt_in (ingress) with bits = 16 and max = 2
parse_udp (ingress) with bits = 64 and max = 1
parse_udp (egress) with bits = 64 and max = 1
- parse_pkt_in (ingress) with bits = 16 and max = 1
+ parse_pkt_in (egress) with bits = 16 and max = 1
Total packet bits: 160
Total meta bits: 0
Total bits: 160
-Working on parse node parse_pkt_in (2) (egress)
+Working on parse node parse_pkt_in (2) (ingress)
-------------------------------------------
Overlaying parsed header: pkt fields (2) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 16
Set metadata bits: 0
-Gress: egress
+Gress: ingress
bits_will_need_to_parse = 16
unused_metadata_container_bits = 0
min_parse_states = 1
@@ -2291,18 +2063,18 @@
MAU containers available:
8-bit: 46
- 16-bit: 77
- 32-bit: 48
+ 16-bit: 75
+ 32-bit: 45
Packing options: 2
Initial packing options: 2
Packing option 0: [16]
->>Can pack using [16] if open up 1 new containers.
-Packing options tried: 2
+>>Can pack using [16] if open up 0 new containers.
+Packing options tried: 1
Packing options skipped: 0
Trying to place using best packing [16]
-***Allocating phv145[15:7] for packet_in_hdr.ingress_port[8:0]
-***Allocating phv145[6:0] for packet_in_hdr._padding[6:0]
+***Allocating phv129[15:7] for packet_in_hdr.ingress_port[8:0]
+***Allocating phv129[6:0] for packet_in_hdr._padding[6:0]
Working on parse node parse_udp (8) (ingress)
-------------------------------------------
@@ -2330,7 +2102,7 @@
-----------------------------------------------------------------------------------
MAU containers available:
- 8-bit: 45
+ 8-bit: 46
16-bit: 75
32-bit: 45
Packing options: 47
@@ -2373,8 +2145,8 @@
-----------------------------------------------------------------------------------
MAU containers available:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
Packing options: 47
Initial packing options: 47
@@ -2389,14 +2161,14 @@
***Allocating phv336[15:0] for udp.dstPort[15:0]
***Allocating phv267[31:16] for udp.length_[15:0]
***Allocating phv267[15:0] for udp.checksum[15:0]
-Working on parse node parse_pkt_in (2) (ingress)
+Working on parse node parse_pkt_in (2) (egress)
-------------------------------------------
Overlaying parsed header: pkt fields (2) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 16
Set metadata bits: 0
-Gress: ingress
+Gress: egress
bits_will_need_to_parse = 16
unused_metadata_container_bits = 0
min_parse_states = 1
@@ -2412,9 +2184,9 @@
-------------------------------------------------------------------------------------------------
MAU containers available:
- 8-bit: 45
- 16-bit: 75
- 32-bit: 45
+ 8-bit: 47
+ 16-bit: 79
+ 32-bit: 48
Packing options: 2
Initial packing options: 2
@@ -2423,109 +2195,113 @@
Packing options tried: 1
Packing options skipped: 0
Trying to place using best packing [16]
-***Allocating phv129[15:7] for packet_in_hdr.ingress_port[8:0]
-***Allocating phv129[6:0] for packet_in_hdr._padding[6:0]
+***Allocating phv340[15:7] for packet_in_hdr.ingress_port[8:0]
+***Allocating phv340[6:0] for packet_in_hdr._padding[6:0]
After allocating remaining parse nodes:
Allocation state: Final Allocation
-------------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
-------------------------------------------------------------------------------
-| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
-| | | | |
-| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 5 (7.81%) | 40 (7.81%) | 512 |
-| | | | |
-| 8 (16) | 4 (25.00%) | 64 (25.00%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 7 (7.29%) | 112 (7.29%) | 1536 |
-| | | | |
-| 14 (32) T | 14 (87.50%) | 448 (87.50%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 14 (43.75%) | 448 (43.75%) | 1024 |
-| | | | |
-| 16 (8) T | 10 (62.50%) | 80 (62.50%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 10 (31.25%) | 80 (31.25%) | 256 |
-| | | | |
-| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
-| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
-| | | | |
-| MAU total | 15 (6.70%) | 248 (6.05%) | 4096 |
-| Tagalong total | 39 (34.82%) | 768 (37.50%) | 2048 |
-| Overall total | 54 (16.07%) | 1016 (16.54%) | 6144 |
-------------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+-----------------------------------------------------------------------------
+| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
+| | | | |
+| 4 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 3 (4.69%) | 24 (4.69%) | 512 |
+| | | | |
+| 8 (16) | 4 (25.00%) | 64 (25.00%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 5 (5.21%) | 80 (5.21%) | 1536 |
+| | | | |
+| 14 (32) T | 13 (81.25%) | 416 (81.25%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 13 (40.62%) | 416 (40.62%) | 1024 |
+| | | | |
+| 16 (8) T | 12 (75.00%) | 96 (75.00%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 12 (37.50%) | 96 (37.50%) | 256 |
+| | | | |
+| 18 (16) T | 11 (68.75%) | 176 (68.75%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 16 (33.33%) | 256 (33.33%) | 768 |
+| | | | |
+| MAU total | 11 (4.91%) | 200 (4.88%) | 4096 |
+| Tagalong total | 41 (36.61%) | 768 (37.50%) | 2048 |
+| Overall total | 52 (15.48%) | 968 (15.76%) | 6144 |
+-----------------------------------------------------------------------------
Difference in allocation between critical parse path and overlaying headers:
Allocation state: Diff
----------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
----------------------------------------------------------------------------
-| 0 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 0 (0.00%) | 0 (0.00%) | 2048 |
-| | | | |
-| 4 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 5 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 512 |
-| | | | |
-| 8 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 1 (1.04%) | 16 (1.04%) | 1536 |
-| | | | |
-| 14 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 0 (0.00%) | 0 (0.00%) | 1024 |
-| | | | |
-| 16 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 256 |
-| | | | |
-| 18 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 768 |
-| | | | |
-| MAU total | 1 (0.45%) | 16 (0.39%) | 4096 |
-| Tagalong total | 0 (0.00%) | 0 (0.00%) | 2048 |
-| Overall total | 1 (0.30%) | 16 (0.26%) | 6144 |
----------------------------------------------------------------------------
+--------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+--------------------------------------------------------------------------
+| 0 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 0 (0.00%) | 0 (0.00%) | 2048 |
+| | | | |
+| 4 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 5 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 512 |
+| | | | |
+| 8 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 9 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 1536 |
+| | | | |
+| 14 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 0 (0.00%) | 0 (0.00%) | 1024 |
+| | | | |
+| 16 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 256 |
+| | | | |
+| 18 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 768 |
+| | | | |
+| MAU total | 0 (0.00%) | 0 (0.00%) | 4096 |
+| Tagalong total | 0 (0.00%) | 0 (0.00%) | 2048 |
+| Overall total | 0 (0.00%) | 0 (0.00%) | 6144 |
+--------------------------------------------------------------------------
->>Event 'pa_meta1' at time 1504792580.28
- Took 0.50 seconds
+>>Event 'pa_meta1' at time 1504859037.76
+ Took 0.51 seconds
-----------------------------------------------
Allocating metadata (pass 1)
-----------------------------------------------
Allocation Step
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md.resubmit_flag (ingress) will require table injection to initialize.
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md._pad1 (ingress) will require table injection to initialize.
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md._pad2 (ingress) will require table injection to initialize.
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md._pad3 (ingress) will require table injection to initialize.
Total metadata field instances to allocate: 2 / 12 bits (12 ingress bits and 0 egress bits)
Promised metadata field instances to allocate: 1 / 9 bits (9 ingress bits and 0 egress bits)
- 0: ig_intr_md_for_tm.ucast_egress_port (ingress) (highly=0, mau_group_size=2, max_overlay=0, max_share=0, max_split=1, bit_width=9, initial_usage_read=3, earliest_use=0, latest_use=12)
+ 0: ig_intr_md_for_tm.ucast_egress_port (ingress) (highly=0, mau_group_size=2, max_overlay=0, max_share=0, max_split=1, bit_width=9, initial_usage_read=2, earliest_use=0, latest_use=12)
--------------
Working on:
@@ -2570,47 +2346,47 @@
***Allocating phv130[8:0] for ig_intr_md_for_tm.ucast_egress_port[8:0]
Allocation state after promised meta allocated:
Allocation state: Final Allocation
-------------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
-------------------------------------------------------------------------------
-| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
-| | | | |
-| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 5 (7.81%) | 40 (7.81%) | 512 |
-| | | | |
-| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 8 (8.33%) | 121 (7.88%) | 1536 |
-| | | | |
-| 14 (32) T | 14 (87.50%) | 448 (87.50%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 14 (43.75%) | 448 (43.75%) | 1024 |
-| | | | |
-| 16 (8) T | 10 (62.50%) | 80 (62.50%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 10 (31.25%) | 80 (31.25%) | 256 |
-| | | | |
-| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
-| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
-| | | | |
-| MAU total | 16 (7.14%) | 257 (6.27%) | 4096 |
-| Tagalong total | 39 (34.82%) | 768 (37.50%) | 2048 |
-| Overall total | 55 (16.37%) | 1025 (16.68%) | 6144 |
-------------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+-----------------------------------------------------------------------------
+| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
+| | | | |
+| 4 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 3 (4.69%) | 24 (4.69%) | 512 |
+| | | | |
+| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 6 (6.25%) | 89 (5.79%) | 1536 |
+| | | | |
+| 14 (32) T | 13 (81.25%) | 416 (81.25%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 13 (40.62%) | 416 (40.62%) | 1024 |
+| | | | |
+| 16 (8) T | 12 (75.00%) | 96 (75.00%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 12 (37.50%) | 96 (37.50%) | 256 |
+| | | | |
+| 18 (16) T | 11 (68.75%) | 176 (68.75%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 16 (33.33%) | 256 (33.33%) | 768 |
+| | | | |
+| MAU total | 12 (5.36%) | 209 (5.10%) | 4096 |
+| Tagalong total | 41 (36.61%) | 768 (37.50%) | 2048 |
+| Overall total | 53 (15.77%) | 977 (15.90%) | 6144 |
+-----------------------------------------------------------------------------
Allocation state difference after promised meta allocated:
Allocation state: Diff
@@ -2657,55 +2433,55 @@
--------------------------------------------------------------------------
Sorted metadata field instances to allocate: 0 / 0 bits (0 ingress bits and 0 egress bits)
->>Event 'pa_pov' at time 1504792580.33
- Took 0.05 seconds
+>>Event 'pa_pov' at time 1504859037.83
+ Took 0.07 seconds
-----------------------------------------------
Allocating POV
-----------------------------------------------
Allocation Step
Allocation state: Final Allocation
-------------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
-------------------------------------------------------------------------------
-| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
-| | | | |
-| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 5 (7.81%) | 40 (7.81%) | 512 |
-| | | | |
-| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 8 (8.33%) | 121 (7.88%) | 1536 |
-| | | | |
-| 14 (32) T | 14 (87.50%) | 448 (87.50%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 14 (43.75%) | 448 (43.75%) | 1024 |
-| | | | |
-| 16 (8) T | 10 (62.50%) | 80 (62.50%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 10 (31.25%) | 80 (31.25%) | 256 |
-| | | | |
-| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
-| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
-| | | | |
-| MAU total | 16 (7.14%) | 257 (6.27%) | 4096 |
-| Tagalong total | 39 (34.82%) | 768 (37.50%) | 2048 |
-| Overall total | 55 (16.37%) | 1025 (16.68%) | 6144 |
-------------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+-----------------------------------------------------------------------------
+| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
+| | | | |
+| 4 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 3 (4.69%) | 24 (4.69%) | 512 |
+| | | | |
+| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 6 (6.25%) | 89 (5.79%) | 1536 |
+| | | | |
+| 14 (32) T | 13 (81.25%) | 416 (81.25%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 13 (40.62%) | 416 (40.62%) | 1024 |
+| | | | |
+| 16 (8) T | 12 (75.00%) | 96 (75.00%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 12 (37.50%) | 96 (37.50%) | 256 |
+| | | | |
+| 18 (16) T | 11 (68.75%) | 176 (68.75%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 16 (33.33%) | 256 (33.33%) | 768 |
+| | | | |
+| MAU total | 12 (5.36%) | 209 (5.10%) | 4096 |
+| Tagalong total | 41 (36.61%) | 768 (37.50%) | 2048 |
+| Overall total | 53 (15.77%) | 977 (15.90%) | 6144 |
+-----------------------------------------------------------------------------
Sorted POV field instances to allocate (with best pack): 13
0: --validity_check--packet_in_hdr (ingress) -- max pov share 6 / best pack 5
@@ -2723,25 +2499,25 @@
12: --validity_check--udp (egress) -- max pov share 5 / best pack 4
Working on
---validity_check--packet_in_hdr <1 bits ingress parsed pov>
+--validity_check--packet_in_hdr <1 bits ingress parsed pov W>
Call to _allocate_pov_helper for:
--validity_check--packet_in_hdr (ingress)
Best pack group: (6)
Looking for container to share POV bit in from already allocated containers for POV.
-Container availability (not used yet for POV): total 197 / partial 1
+Container availability (not used yet for POV): total 198 / partial 1
Looking for container to share POV bit in from already allocated containers that have not been used for POV.
->>Choose container phv67, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 7).
+>>Choose container phv66, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 7).
>> Decided to allocate new container
-Required container phv67
-***Allocating phv67[0:0] for --validity_check--packet_in_hdr[0:0]
-***Allocating phv67[1:1] for --validity_check--packet_out_hdr[0:0]
-***Allocating phv67[2:2] for --validity_check--ethernet[0:0]
-***Allocating phv67[3:3] for --validity_check--ipv4[0:0]
-***Allocating phv67[4:4] for --validity_check--tcp[0:0]
-***Allocating phv67[5:5] for --validity_check--udp[0:0]
-***Allocating phv67[6:6] for --validity_check--metadata_bridge[0:0]
+Required container phv66
+***Allocating phv66[0:0] for --validity_check--packet_in_hdr[0:0]
+***Allocating phv66[1:1] for --validity_check--packet_out_hdr[0:0]
+***Allocating phv66[2:2] for --validity_check--ethernet[0:0]
+***Allocating phv66[3:3] for --validity_check--ipv4[0:0]
+***Allocating phv66[4:4] for --validity_check--tcp[0:0]
+***Allocating phv66[5:5] for --validity_check--udp[0:0]
+***Allocating phv66[6:6] for --validity_check--metadata_bridge[0:0]
Working on
--validity_check--packet_out_hdr <1 bits ingress parsed pov R W>
@@ -2768,24 +2544,24 @@
Already allocated.
Working on
---validity_check--packet_in_hdr <1 bits egress parsed pov W>
+--validity_check--packet_in_hdr <1 bits egress parsed pov>
Call to _allocate_pov_helper for:
--validity_check--packet_in_hdr (egress)
Best pack group: (5)
Looking for container to share POV bit in from already allocated containers for POV.
-Container availability (not used yet for POV): total 199 / partial 0
+Container availability (not used yet for POV): total 202 / partial 0
Looking for container to share POV bit in from already allocated containers that have not been used for POV.
->>Choose container phv82, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 6).
+>>Choose container phv81, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 6).
>> Decided to allocate new container
-Required container phv82
-***Allocating phv82[0:0] for --validity_check--packet_in_hdr[0:0]
-***Allocating phv82[1:1] for --validity_check--packet_out_hdr[0:0]
-***Allocating phv82[2:2] for --validity_check--ethernet[0:0]
-***Allocating phv82[3:3] for --validity_check--ipv4[0:0]
-***Allocating phv82[4:4] for --validity_check--tcp[0:0]
-***Allocating phv82[5:5] for --validity_check--udp[0:0]
+Required container phv81
+***Allocating phv81[0:0] for --validity_check--packet_in_hdr[0:0]
+***Allocating phv81[1:1] for --validity_check--packet_out_hdr[0:0]
+***Allocating phv81[2:2] for --validity_check--ethernet[0:0]
+***Allocating phv81[3:3] for --validity_check--ipv4[0:0]
+***Allocating phv81[4:4] for --validity_check--tcp[0:0]
+***Allocating phv81[5:5] for --validity_check--udp[0:0]
Working on
--validity_check--packet_out_hdr <1 bits egress parsed pov>
@@ -2809,12 +2585,12 @@
Sum of container bit widths POVs found in: 16
ingress
- phv67 (8 bits)
+ phv66 (8 bits)
>> 8 total bits
egress
- phv82 (8 bits)
+ phv81 (8 bits)
>> 8 total bits
->>Event 'pa_meta2' at time 1504792580.45
+>>Event 'pa_meta2' at time 1504859037.95
Took 0.12 seconds
-----------------------------------------------
@@ -2825,47 +2601,47 @@
Promised metadata field instances to allocate: 0 / 0 bits (0 ingress bits and 0 egress bits)
Allocation state after promised meta allocated:
Allocation state: Final Allocation
-------------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
-------------------------------------------------------------------------------
-| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
-| | | | |
-| 4 (8) | 4 (25.00%) | 31 (24.22%) | 128 |
-| 5 (8) | 3 (18.75%) | 22 (17.19%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 7 (10.94%) | 53 (10.35%) | 512 |
-| | | | |
-| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 8 (8.33%) | 121 (7.88%) | 1536 |
-| | | | |
-| 14 (32) T | 14 (87.50%) | 448 (87.50%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 14 (43.75%) | 448 (43.75%) | 1024 |
-| | | | |
-| 16 (8) T | 10 (62.50%) | 80 (62.50%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 10 (31.25%) | 80 (31.25%) | 256 |
-| | | | |
-| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
-| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
-| | | | |
-| MAU total | 18 (8.04%) | 270 (6.59%) | 4096 |
-| Tagalong total | 39 (34.82%) | 768 (37.50%) | 2048 |
-| Overall total | 57 (16.96%) | 1038 (16.89%) | 6144 |
-------------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+-----------------------------------------------------------------------------
+| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
+| | | | |
+| 4 (8) | 3 (18.75%) | 23 (17.97%) | 128 |
+| 5 (8) | 2 (12.50%) | 14 (10.94%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 5 (7.81%) | 37 (7.23%) | 512 |
+| | | | |
+| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 6 (6.25%) | 89 (5.79%) | 1536 |
+| | | | |
+| 14 (32) T | 13 (81.25%) | 416 (81.25%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 13 (40.62%) | 416 (40.62%) | 1024 |
+| | | | |
+| 16 (8) T | 12 (75.00%) | 96 (75.00%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 12 (37.50%) | 96 (37.50%) | 256 |
+| | | | |
+| 18 (16) T | 11 (68.75%) | 176 (68.75%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 16 (33.33%) | 256 (33.33%) | 768 |
+| | | | |
+| MAU total | 14 (6.25%) | 222 (5.42%) | 4096 |
+| Tagalong total | 41 (36.61%) | 768 (37.50%) | 2048 |
+| Overall total | 55 (16.37%) | 990 (16.11%) | 6144 |
+-----------------------------------------------------------------------------
Allocation state difference after promised meta allocated:
Allocation state: Diff
@@ -2912,7 +2688,7 @@
--------------------------------------------------------------------------
Sorted metadata field instances to allocate: 1 / 3 bits (3 ingress bits and 0 egress bits)
- 0: ig_intr_md_for_tm.drop_ctl (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=0, best_share_pack=0, max_split=1, bit_width=3, initial_usage_read=2, earliest_use=1, latest_use=12)
+ 0: ig_intr_md_for_tm.drop_ctl (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=0, best_share_pack=0, max_split=1, bit_width=3, initial_usage_read=2, earliest_use=0, latest_use=12)
---------------------------------------
Working on:
@@ -2939,12 +2715,12 @@
Group 1 32 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 2 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 12 and req 0 -- as if deparsed True -- container_to_use phv32 -- fails False
Group 3 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 12 and req 0 -- as if deparsed True -- container_to_use phv48 -- fails False
- Group 4 8 bits -- avail 12 and promised 1 -- ingress promised 1 and remain 11 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv68 -- fails False
- Group 5 8 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 4 8 bits -- avail 13 and promised 1 -- ingress promised 1 and remain 12 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv67 -- fails False
+ Group 5 8 bits -- avail 14 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 6 8 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv96 -- fails False
Group 7 8 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv112 -- fails False
Group 8 16 bits -- avail 11 and promised 1 -- ingress promised 1 and remain 10 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv133 -- fails False
- Group 9 16 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 9 16 bits -- avail 15 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 10 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv160 -- fails False
Group 11 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv176 -- fails False
Group 12 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv192 -- fails False
@@ -2956,9 +2732,9 @@
case 2: looking at allowed start bits [0, 1, 2, 3, 4, 5, 6, 7]
final start_bit = 5
(1) msb_offset = 8
-***Allocating phv68[7:5] for ig_intr_md_for_tm.drop_ctl[2:0]
->>Event 'pa_meta_init' at time 1504792580.52
- Took 0.07 seconds
+***Allocating phv67[7:5] for ig_intr_md_for_tm.drop_ctl[2:0]
+>>Event 'pa_meta_init' at time 1504859038.01
+ Took 0.06 seconds
-----------------------------------------------
Adding metadata initialization
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.results.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.results.log
index a4add42..2176027 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.results.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/pa.results.log
@@ -1,53 +1,53 @@
+---------------------------------------------------------------------+
| Log file: pa.results.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
Program: default
Allocation state: Final Allocation
-------------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
-------------------------------------------------------------------------------
-| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
-| | | | |
-| 4 (8) | 5 (31.25%) | 34 (26.56%) | 128 |
-| 5 (8) | 3 (18.75%) | 22 (17.19%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 8 (12.50%) | 56 (10.94%) | 512 |
-| | | | |
-| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 8 (8.33%) | 121 (7.88%) | 1536 |
-| | | | |
-| 14 (32) T | 14 (87.50%) | 448 (87.50%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 14 (43.75%) | 448 (43.75%) | 1024 |
-| | | | |
-| 16 (8) T | 10 (62.50%) | 80 (62.50%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 10 (31.25%) | 80 (31.25%) | 256 |
-| | | | |
-| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
-| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
-| | | | |
-| MAU total | 19 (8.48%) | 273 (6.67%) | 4096 |
-| Tagalong total | 39 (34.82%) | 768 (37.50%) | 2048 |
-| Overall total | 58 (17.26%) | 1041 (16.94%) | 6144 |
-------------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+-----------------------------------------------------------------------------
+| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
+| | | | |
+| 4 (8) | 4 (25.00%) | 26 (20.31%) | 128 |
+| 5 (8) | 2 (12.50%) | 14 (10.94%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 6 (9.38%) | 40 (7.81%) | 512 |
+| | | | |
+| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 6 (6.25%) | 89 (5.79%) | 1536 |
+| | | | |
+| 14 (32) T | 13 (81.25%) | 416 (81.25%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 13 (40.62%) | 416 (40.62%) | 1024 |
+| | | | |
+| 16 (8) T | 12 (75.00%) | 96 (75.00%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 12 (37.50%) | 96 (37.50%) | 256 |
+| | | | |
+| 18 (16) T | 11 (68.75%) | 176 (68.75%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 16 (33.33%) | 256 (33.33%) | 768 |
+| | | | |
+| MAU total | 15 (6.70%) | 225 (5.49%) | 4096 |
+| Tagalong total | 41 (36.61%) | 768 (37.50%) | 2048 |
+| Overall total | 56 (16.67%) | 993 (16.16%) | 6144 |
+-----------------------------------------------------------------------------
--------------------------------------------
PHV Allocation
@@ -60,41 +60,37 @@
>> 3 in ingress and 0 in egress
Allocations in Group 4 8 bits
- 8-bit PHV 64 (ingress): phv64[7:1] = -pad-0-[6:0] (tagalong capable)
- 8-bit PHV 64 (ingress): phv64[0:0] = ig_intr_md_for_tm.copy_to_cpu[0:0] (deparsed)
- 8-bit PHV 65 (ingress): phv65[7:0] = ethernet.dstAddr[47:40] (deparsed)
- 8-bit PHV 66 (ingress): phv66[7:0] = ethernet.srcAddr[39:32] (deparsed)
- 8-bit PHV 67 (ingress): phv67[6:6] = --validity_check--metadata_bridge[0:0] (deparsed)
- 8-bit PHV 67 (ingress): phv67[5:5] = --validity_check--udp[0:0] (deparsed)
- 8-bit PHV 67 (ingress): phv67[4:4] = --validity_check--tcp[0:0] (deparsed)
- 8-bit PHV 67 (ingress): phv67[3:3] = --validity_check--ipv4[0:0] (deparsed)
- 8-bit PHV 67 (ingress): phv67[2:2] = --validity_check--ethernet[0:0] (deparsed)
- 8-bit PHV 67 (ingress): phv67[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
- 8-bit PHV 67 (ingress): phv67[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
- 8-bit PHV 68 (ingress): phv68[7:5] = ig_intr_md_for_tm.drop_ctl[2:0] (deparsed)
- >> 5 in ingress and 0 in egress
+ 8-bit PHV 64 (ingress): phv64[7:0] = ethernet.dstAddr[47:40] (deparsed)
+ 8-bit PHV 65 (ingress): phv65[7:0] = ethernet.srcAddr[39:32] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[6:6] = --validity_check--metadata_bridge[0:0] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[5:5] = --validity_check--udp[0:0] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[4:4] = --validity_check--tcp[0:0] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[3:3] = --validity_check--ipv4[0:0] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[2:2] = --validity_check--ethernet[0:0] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[7:5] = ig_intr_md_for_tm.drop_ctl[2:0] (deparsed)
+ >> 4 in ingress and 0 in egress
Allocations in Group 5 8 bits
- 8-bit PHV 80 (egress): phv80[7:1] = -pad-0-[6:0] (tagalong capable)
- 8-bit PHV 80 (egress): phv80[0:0] = ig_intr_md_for_tm.copy_to_cpu[0:0] (deparsed)
- 8-bit PHV 81 (egress): phv81[7:3] = eg_intr_md._pad7[4:0]
- 8-bit PHV 81 (egress): phv81[2:0] = eg_intr_md.egress_cos[2:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[5:5] = --validity_check--udp[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[4:4] = --validity_check--tcp[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[3:3] = --validity_check--ipv4[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[2:2] = --validity_check--ethernet[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
- >> 0 in ingress and 3 in egress
+ 8-bit PHV 80 (egress): phv80[7:3] = eg_intr_md._pad7[4:0]
+ 8-bit PHV 80 (egress): phv80[2:0] = eg_intr_md.egress_cos[2:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[5:5] = --validity_check--udp[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[4:4] = --validity_check--tcp[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[3:3] = --validity_check--ipv4[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[2:2] = --validity_check--ethernet[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
+ >> 0 in ingress and 2 in egress
Allocations in Group 8 16 bits
- 16-bit PHV 128 (ingress): phv128[15:15] = ig_intr_md.resubmit_flag[0:0] (deparsed)
- 16-bit PHV 128 (ingress): phv128[14:14] = ig_intr_md._pad1[0:0] (deparsed)
- 16-bit PHV 128 (ingress): phv128[13:12] = ig_intr_md._pad2[1:0] (deparsed)
- 16-bit PHV 128 (ingress): phv128[11:9] = ig_intr_md._pad3[2:0] (deparsed)
+ 16-bit PHV 128 (ingress): phv128[15:15] = ig_intr_md.resubmit_flag[0:0]
+ 16-bit PHV 128 (ingress): phv128[14:14] = ig_intr_md._pad1[0:0]
+ 16-bit PHV 128 (ingress): phv128[13:12] = ig_intr_md._pad2[1:0]
+ 16-bit PHV 128 (ingress): phv128[11:9] = ig_intr_md._pad3[2:0]
16-bit PHV 128 (ingress): phv128[8:0] = ig_intr_md.ingress_port[8:0] (deparsed)
16-bit PHV 129 (ingress): phv129[15:7] = packet_out_hdr.egress_port[8:0] (deparsed)
- 16-bit PHV 129 (ingress): phv129[15:7] = packet_in_hdr.ingress_port[8:0] (tagalong capable) (deparsed)
+ 16-bit PHV 129 (ingress): phv129[15:7] = packet_in_hdr.ingress_port[8:0] (deparsed)
16-bit PHV 129 (ingress): phv129[6:0] = packet_out_hdr._padding[6:0] (tagalong capable) (deparsed)
16-bit PHV 129 (ingress): phv129[6:0] = packet_in_hdr._padding[6:0] (tagalong capable) (deparsed)
16-bit PHV 130 (ingress): phv130[8:0] = ig_intr_md_for_tm.ucast_egress_port[8:0] (deparsed)
@@ -104,13 +100,9 @@
>> 5 in ingress and 0 in egress
Allocations in Group 9 16 bits
- 16-bit PHV 144 (egress): phv144[15:9] = -pad-1-[6:0] (tagalong capable)
- 16-bit PHV 144 (egress): phv144[8:0] = ig_intr_md.ingress_port[8:0] (deparsed)
- 16-bit PHV 145 (egress): phv145[15:7] = packet_in_hdr.ingress_port[8:0] (deparsed)
- 16-bit PHV 145 (egress): phv145[6:0] = packet_in_hdr._padding[6:0] (tagalong capable) (deparsed)
- 16-bit PHV 146 (egress): phv146[15:9] = eg_intr_md._pad0[6:0]
- 16-bit PHV 146 (egress): phv146[8:0] = eg_intr_md.egress_port[8:0] (deparsed)
- >> 0 in ingress and 3 in egress
+ 16-bit PHV 144 (egress): phv144[15:9] = eg_intr_md._pad0[6:0]
+ 16-bit PHV 144 (egress): phv144[8:0] = eg_intr_md.egress_port[8:0] (deparsed)
+ >> 0 in ingress and 1 in egress
Allocations in Group 14 32 bits (tagalong)
32-bit PHV 256 (ingress): phv256[31:24] = ipv4.ttl[7:0] (tagalong capable) (deparsed)
@@ -118,16 +110,15 @@
32-bit PHV 256 (ingress): phv256[15:0] = ipv4.hdrChecksum[15:0] (tagalong capable) (deparsed)
32-bit PHV 257 (ingress): phv257[31:0] = ipv4.srcAddr[31:0] (tagalong capable) (deparsed)
32-bit PHV 258 (ingress): phv258[31:0] = ipv4.dstAddr[31:0] (tagalong capable) (deparsed)
- 32-bit PHV 259 (ingress): phv259[31:0] = tcp.ackNo[31:0] (tagalong capable) (deparsed)
+ 32-bit PHV 259 (ingress): phv259[31:28] = tcp.dataOffset[3:0] (tagalong capable) (deparsed)
32-bit PHV 259 (ingress): phv259[31:16] = udp.length_[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 259 (ingress): phv259[27:25] = tcp.res[2:0] (tagalong capable) (deparsed)
+ 32-bit PHV 259 (ingress): phv259[24:22] = tcp.ecn[2:0] (tagalong capable) (deparsed)
+ 32-bit PHV 259 (ingress): phv259[21:16] = tcp.ctrl[5:0] (tagalong capable) (deparsed)
+ 32-bit PHV 259 (ingress): phv259[15:0] = tcp.window[15:0] (tagalong capable) (deparsed)
32-bit PHV 259 (ingress): phv259[15:0] = udp.checksum[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (ingress): phv260[31:28] = tcp.dataOffset[3:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (ingress): phv260[27:25] = tcp.res[2:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (ingress): phv260[24:22] = tcp.ecn[2:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (ingress): phv260[21:16] = tcp.ctrl[5:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (ingress): phv260[15:0] = tcp.window[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 261 (ingress): phv261[31:16] = tcp.checksum[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 261 (ingress): phv261[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 260 (ingress): phv260[31:16] = tcp.checksum[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 260 (ingress): phv260[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed)
32-bit PHV 264 (egress): phv264[31:24] = ipv4.ttl[7:0] (tagalong capable) (deparsed)
32-bit PHV 264 (egress): phv264[23:16] = ipv4.protocol[7:0] (tagalong capable) (deparsed)
32-bit PHV 264 (egress): phv264[15:0] = ipv4.hdrChecksum[15:0] (tagalong capable) (deparsed)
@@ -145,7 +136,7 @@
32-bit PHV 269 (egress): phv269[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed)
32-bit PHV 270 (egress): phv270[31:0] = ethernet.dstAddr[39:8] (tagalong capable) (deparsed)
32-bit PHV 271 (egress): phv271[31:0] = ethernet.srcAddr[31:0] (tagalong capable) (deparsed)
- >> 6 in ingress and 8 in egress
+ >> 5 in ingress and 8 in egress
Allocations in Group 16 8 bits (tagalong)
8-bit PHV 288 (ingress): phv288[7:4] = ipv4.version[3:0] (tagalong capable) (deparsed)
@@ -155,6 +146,8 @@
8-bit PHV 290 (ingress): phv290[7:0] = udp.srcPort[15:8] (tagalong capable) (deparsed)
8-bit PHV 291 (ingress): phv291[7:0] = tcp.srcPort[7:0] (tagalong capable) (deparsed)
8-bit PHV 291 (ingress): phv291[7:0] = udp.srcPort[7:0] (tagalong capable) (deparsed)
+ 8-bit PHV 292 (ingress): phv292[7:0] = tcp.dstPort[15:8] (tagalong capable) (deparsed)
+ 8-bit PHV 293 (ingress): phv293[7:0] = tcp.dstPort[7:0] (tagalong capable) (deparsed)
8-bit PHV 296 (egress): phv296[7:4] = ipv4.version[3:0] (tagalong capable) (deparsed)
8-bit PHV 296 (egress): phv296[3:0] = ipv4.ihl[3:0] (tagalong capable) (deparsed)
8-bit PHV 297 (egress): phv297[7:0] = ipv4.diffserv[7:0] (tagalong capable) (deparsed)
@@ -164,23 +157,24 @@
8-bit PHV 299 (egress): phv299[7:0] = udp.srcPort[7:0] (tagalong capable) (deparsed)
8-bit PHV 300 (egress): phv300[7:0] = ethernet.dstAddr[47:40] (tagalong capable) (deparsed)
8-bit PHV 301 (egress): phv301[7:0] = ethernet.srcAddr[39:32] (tagalong capable) (deparsed)
- >> 4 in ingress and 6 in egress
+ >> 6 in ingress and 6 in egress
Allocations in Group 18 16 bits (tagalong)
16-bit PHV 320 (ingress): phv320[15:0] = ipv4.totalLen[15:0] (tagalong capable) (deparsed)
16-bit PHV 321 (ingress): phv321[15:0] = ipv4.identification[15:0] (tagalong capable) (deparsed)
16-bit PHV 322 (ingress): phv322[15:13] = ipv4.flags[2:0] (tagalong capable) (deparsed)
16-bit PHV 322 (ingress): phv322[12:0] = ipv4.fragOffset[12:0] (tagalong capable) (deparsed)
- 16-bit PHV 323 (ingress): phv323[15:0] = tcp.dstPort[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 323 (ingress): phv323[15:0] = tcp.seqNo[31:16] (tagalong capable) (deparsed)
16-bit PHV 323 (ingress): phv323[15:0] = udp.dstPort[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 324 (ingress): phv324[15:0] = tcp.seqNo[31:16] (tagalong capable) (deparsed)
- 16-bit PHV 325 (ingress): phv325[15:0] = tcp.seqNo[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 324 (ingress): phv324[15:0] = tcp.seqNo[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 325 (ingress): phv325[15:0] = tcp.ackNo[31:16] (tagalong capable) (deparsed)
+ 16-bit PHV 326 (ingress): phv326[15:0] = tcp.ackNo[15:0] (tagalong capable) (deparsed)
16-bit PHV 332 (egress): phv332[15:0] = ipv4.totalLen[15:0] (tagalong capable) (deparsed)
16-bit PHV 333 (egress): phv333[15:0] = ipv4.identification[15:0] (tagalong capable) (deparsed)
16-bit PHV 334 (egress): phv334[15:13] = ipv4.flags[2:0] (tagalong capable) (deparsed)
16-bit PHV 334 (egress): phv334[12:0] = ipv4.fragOffset[12:0] (tagalong capable) (deparsed)
16-bit PHV 335 (egress): phv335[15:0] = tcp.dstPort[15:0] (tagalong capable) (deparsed)
- >> 6 in ingress and 4 in egress
+ >> 7 in ingress and 4 in egress
Allocations in Group 19 16 bits (tagalong)
16-bit PHV 336 (egress): phv336[15:0] = tcp.seqNo[31:16] (tagalong capable) (deparsed)
@@ -190,42 +184,30 @@
16-bit PHV 338 (egress): phv338[7:0] = ethernet.srcAddr[47:40] (tagalong capable) (deparsed)
16-bit PHV 339 (egress): phv339[15:0] = ethernet.etherType[15:0] (tagalong capable) (deparsed)
16-bit PHV 340 (egress): phv340[15:7] = packet_out_hdr.egress_port[8:0] (tagalong capable) (deparsed)
+ 16-bit PHV 340 (egress): phv340[15:7] = packet_in_hdr.ingress_port[8:0] (tagalong capable) (deparsed)
16-bit PHV 340 (egress): phv340[6:0] = packet_out_hdr._padding[6:0] (tagalong capable) (deparsed)
+ 16-bit PHV 340 (egress): phv340[6:0] = packet_in_hdr._padding[6:0] (tagalong capable) (deparsed)
>> 0 in ingress and 5 in egress
Final POV layout (ingress):
- 32: --validity_check--packet_in_hdr (ingress) in container 67
- 33: --validity_check--packet_out_hdr (ingress) in container 67
- 34: --validity_check--ethernet (ingress) in container 67
- 35: --validity_check--ipv4 (ingress) in container 67
- 36: --validity_check--tcp (ingress) in container 67
- 37: --validity_check--udp (ingress) in container 67
- 38: --validity_check--metadata_bridge (ingress) in container 67
+ 32: --validity_check--packet_in_hdr (ingress) in container 66
+ 33: --validity_check--packet_out_hdr (ingress) in container 66
+ 34: --validity_check--ethernet (ingress) in container 66
+ 35: --validity_check--ipv4 (ingress) in container 66
+ 36: --validity_check--tcp (ingress) in container 66
+ 37: --validity_check--udp (ingress) in container 66
+ 38: --validity_check--metadata_bridge (ingress) in container 66
Final POV layout (egress):
- 0: --validity_check--packet_in_hdr (egress) in container 82
- 1: --validity_check--packet_out_hdr (egress) in container 82
- 2: --validity_check--ethernet (egress) in container 82
- 3: --validity_check--ipv4 (egress) in container 82
- 4: --validity_check--tcp (egress) in container 82
- 5: --validity_check--udp (egress) in container 82
+ 0: --validity_check--packet_in_hdr (egress) in container 81
+ 1: --validity_check--packet_out_hdr (egress) in container 81
+ 2: --validity_check--ethernet (egress) in container 81
+ 3: --validity_check--ipv4 (egress) in container 81
+ 4: --validity_check--tcp (egress) in container 81
+ 5: --validity_check--udp (egress) in container 81
--------------------------------------------
- Bridged metadata layout (9 bytes)
+ Bridged metadata layout (6 bytes)
--------------------------------------------
-Final ingress layout:
- -pad-0-[6:0]
- ig_intr_md_for_tm.copy_to_cpu[0:0]
- ig_intr_md.resubmit_flag[0:0]
- ig_intr_md._pad1[0:0]
- ig_intr_md._pad2[1:0]
- ig_intr_md._pad3[2:0]
- ig_intr_md.ingress_port[8:0]
-
-Final egress layout:
- -pad-0-[6:0]
- ig_intr_md_for_tm.copy_to_cpu[0:0]
- -pad-1-[6:0]
- ig_intr_md.ingress_port[8:0]
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.calcfields.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.calcfields.log
index e10d66d..cb2febd 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.calcfields.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.calcfields.log
@@ -1,35 +1,37 @@
+---------------------------------------------------------------------+
| Log file: parde.calcfields.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
Reserving 0 16-bit ingress tphvs for residual checksums
Reserving 0 16-bit egress tphvs for residual checksums
Need 0 POV bits for checksum update control
-Number of reachable states from state parse_tcp : 1
+Number of reachable states from state parse_tcp//spilled : 1
+Number of reachable states from state parse_tcp : 2
Number of reachable states from state parse_udp : 1
-Number of reachable states from state parse_ipv4 : 3
-Number of reachable states from state parse_ethernet : 4
-Number of reachable states from state parse_pkt_in : 5
-Number of reachable states from state parse_pkt_out : 5
-Number of reachable states from state default_parser : 6
-Number of reachable states from state start : 8
-Number of reachable states from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0> : 9
-Number of reachable states from state <Shim start state> : 10
+Number of reachable states from state parse_ipv4 : 4
+Number of reachable states from state parse_ethernet : 5
+Number of reachable states from state parse_pkt_in : 6
+Number of reachable states from state parse_pkt_out : 6
+Number of reachable states from state default_parser : 7
+Number of reachable states from state start : 9
+Number of reachable states from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0> : 10
+Number of reachable states from state <Shim start state> : 11
parser_state_calculations:[
- parse_tcp_140040983739792
- parse_udp_140040983738960
- parse_ipv4_140040985455952
- parse_ethernet_140040985455120
- parse_pkt_in_140040985452880
- parse_pkt_out_140040985345104
- default_parser_140040985345296
- start_140040985453776
- <Phase 0>_140040983965456
- <Ingress intrinsic metadata>_140040983965136
- <POV initialization>_140040983863504
- <Shim start state>_140040983863824
+ parse_tcp_140209192795728
+ parse_tcp_140209191822416
+ parse_udp_140209191821456
+ parse_ipv4_140209191823248
+ parse_ethernet_140209182763984
+ parse_pkt_in_140209191823440
+ parse_pkt_out_140209191924688
+ default_parser_140209191924496
+ start_140209191824080
+ <Phase 0>_140209187540368
+ <Ingress intrinsic metadata>_140209187540048
+ <POV initialization>_140209187540752
+ <Shim start state>_140209187721360
]
parser_calculations: [
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.config.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.config.log
index 202b8aa..b9b8cae 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.config.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.config.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: parde.config.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
Configuring deparser.inp.iim.ii_phv_csum.csum_cfg[0].csum_cfg_entry[0].zero_m_s_b = 1
@@ -16059,11 +16059,11 @@
63 | g1w31:
|
8 bits
- 64 | I g2w0: [ig_intr_md_for_tm.copy_to_cpu]
- 65 | I g2w1: [ethernet.dstAddr[47:40]]
- 66 | I g2w2: [ethernet.srcAddr[39:32]]
- 67 | I g2w3: [POV[39:32]]
- 68 | I g2w4: [ig_intr_md_for_tm.drop_ctl]
+ 64 | I g2w0: [ethernet.dstAddr[47:40]]
+ 65 | I g2w1: [ethernet.srcAddr[39:32]]
+ 66 | I g2w2: [POV[39:32]]
+ 67 | I g2w3: [ig_intr_md_for_tm.drop_ctl]
+ 68 | g2w4:
69 | g2w5:
70 | g2w6:
71 | g2w7:
@@ -16075,9 +16075,9 @@
77 | g2w13:
78 | g2w14:
79 | g2w15:
- 80 | E g2w16: [ig_intr_md_for_tm.copy_to_cpu]
- 81 | E g2w17: [eg_intr_md._pad7, eg_intr_md.egress_cos]
- 82 | E g2w18: [POV[7:0]]
+ 80 | E g2w16: [eg_intr_md._pad7, eg_intr_md.egress_cos]
+ 81 | E g2w17: [POV[7:0]]
+ 82 | g2w18:
83 | g2w19:
84 | g2w20:
85 | g2w21:
@@ -16143,9 +16143,9 @@
141 | g4w13:
142 | g4w14:
143 | g4w15:
- 144 | E g4w16: [ig_intr_md.ingress_port]
- 145 | E g4w17: [packet_in_hdr.ingress_port, packet_in_hdr._padding]
- 146 | E g4w18: [eg_intr_md._pad0, eg_intr_md.egress_port]
+ 144 | E g4w16: [eg_intr_md._pad0, eg_intr_md.egress_port]
+ 145 | g4w17:
+ 146 | g4w18:
147 | g4w19:
148 | g4w20:
149 | g4w21:
@@ -16234,9 +16234,9 @@
256 | I g8w0: [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]
257 | I g8w1: [ipv4.srcAddr]
258 | I g8w2: [ipv4.dstAddr]
- 259 | I g8w3: [tcp.ackNo, udp.length_, udp.checksum]
- 260 | I g8w4: [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]
- 261 | I g8w5: [tcp.checksum, tcp.urgentPtr]
+ 259 | I g8w3: [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]
+ 260 | I g8w4: [tcp.checksum, tcp.urgentPtr]
+ 261 | g8w5:
262 | g8w6:
263 | g8w7:
264 | E g8w8: [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]
@@ -16269,8 +16269,8 @@
289 | I g9w1: [ipv4.diffserv]
290 | I g9w2: [tcp.srcPort[15:8], udp.srcPort[15:8]]
291 | I g9w3: [tcp.srcPort[7:0], udp.srcPort[7:0]]
- 292 | g9w4:
- 293 | g9w5:
+ 292 | I g9w4: [tcp.dstPort[15:8]]
+ 293 | I g9w5: [tcp.dstPort[7:0]]
294 | g9w6:
295 | g9w7:
296 | E g9w8: [ipv4.version, ipv4.ihl]
@@ -16302,10 +16302,10 @@
320 | I g10w0: [ipv4.totalLen]
321 | I g10w1: [ipv4.identification]
322 | I g10w2: [ipv4.flags, ipv4.fragOffset]
- 323 | I g10w3: [tcp.dstPort, udp.dstPort]
- 324 | I g10w4: [tcp.seqNo[31:16]]
- 325 | I g10w5: [tcp.seqNo[15:0]]
- 326 | g10w6:
+ 323 | I g10w3: [tcp.seqNo[31:16], udp.dstPort]
+ 324 | I g10w4: [tcp.seqNo[15:0]]
+ 325 | I g10w5: [tcp.ackNo[31:16]]
+ 326 | I g10w6: [tcp.ackNo[15:0]]
327 | g10w7:
328 | g10w8:
329 | g10w9:
@@ -16319,7 +16319,7 @@
337 | E g10w17: [tcp.seqNo[15:0]]
338 | E g10w18: [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]
339 | E g10w19: [ethernet.etherType]
- 340 | E g10w20: [packet_out_hdr.egress_port, packet_out_hdr._padding]
+ 340 | E g10w20: [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]
341 | g10w21:
342 | g10w22:
343 | g10w23:
@@ -16363,6 +16363,7 @@
7: parse_pkt_out
8: <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>
9: start
+ 10: parse_tcp//spilled
Egress:
0: <Shim start state>
1: parse_ethernet
@@ -16371,7 +16372,7 @@
4: parse_udp
5: default_parser
6: parse_pkt_out
- 7: <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
+ 7: <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
8: parse_pkt_in
---------------
POV layout:
@@ -16395,11 +16396,8 @@
6-254 | -
---------------
Bridged metadata:
-Ingress:
-[64, 128]
-Egress:
-[80, 144]
+[None]
---------------
Deparse order:
-Ingress: ['metadata_bridge', '_bridged_intr_md_', 'packet_out_hdr', 'packet_in_hdr', 'ethernet', 'ipv4', 'udp', 'tcp']
-Egress: ['packet_out_hdr', 'packet_in_hdr', 'ethernet', 'ipv4', 'udp', 'tcp']
+Ingress: ['metadata_bridge', '_bridged_intr_md_', 'packet_in_hdr', 'packet_out_hdr', 'ethernet', 'ipv4', 'udp', 'tcp']
+Egress: ['packet_in_hdr', 'packet_out_hdr', 'ethernet', 'ipv4', 'udp', 'tcp']
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.error.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.error.log
index 3e5a03a..f9967fa 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.error.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.error.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: parde.error.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.log
index eb6cc14..e1f680e 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parde.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: parde.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
># Begin digest init (pre-PHV)
@@ -14,20 +14,18 @@
># End digest PHV reservations
># Begin digest init (post-PHV)
># End digest init (post-PHV)
-Bridge-MF:ig_intr_md_for_tm.copy_to_cpu
-Bridge-MF:ig_intr_md.ingress_port
Found parser entry point: start
># Begin unroll of HLIR parse graph
>## Create shadow parse graph and find loops
>## Entrypoint 'p4_parse_state.start'
-Creating shadow state: 'p4_parse_state.start' -> 'shadow_state (start, 140040985456016)'
-Creating shadow state: 'p4_parse_state.parse_pkt_in' -> 'shadow_state (parse_pkt_in, 140040985455824)'
-Creating shadow state: 'p4_parse_state.parse_ethernet' -> 'shadow_state (parse_ethernet, 140040985455056)'
-Creating shadow state: 'p4_parse_state.parse_ipv4' -> 'shadow_state (parse_ipv4, 140040985455184)'
-Creating shadow state: 'p4_parse_state.parse_tcp' -> 'shadow_state (parse_tcp, 140040985454864)'
-Creating shadow state: 'p4_parse_state.parse_udp' -> 'shadow_state (parse_udp, 140040985454928)'
-Creating shadow state: 'p4_parse_state.default_parser' -> 'shadow_state (default_parser, 140040985454800)'
-Creating shadow state: 'p4_parse_state.parse_pkt_out' -> 'shadow_state (parse_pkt_out, 140040985454736)'
+Creating shadow state: 'p4_parse_state.start' -> 'shadow_state (start, 140209182764624)'
+Creating shadow state: 'p4_parse_state.parse_pkt_in' -> 'shadow_state (parse_pkt_in, 140209182764432)'
+Creating shadow state: 'p4_parse_state.parse_ethernet' -> 'shadow_state (parse_ethernet, 140209182763856)'
+Creating shadow state: 'p4_parse_state.parse_ipv4' -> 'shadow_state (parse_ipv4, 140209182763728)'
+Creating shadow state: 'p4_parse_state.parse_tcp' -> 'shadow_state (parse_tcp, 140209182763600)'
+Creating shadow state: 'p4_parse_state.parse_udp' -> 'shadow_state (parse_udp, 140209182763664)'
+Creating shadow state: 'p4_parse_state.default_parser' -> 'shadow_state (default_parser, 140209182763536)'
+Creating shadow state: 'p4_parse_state.parse_pkt_out' -> 'shadow_state (parse_pkt_out, 140209182763344)'
># End unroll of HLIR parse graph
># Begin deparser init
>## Create records for gress 0
@@ -45,8 +43,8 @@
Created record for 'p4_header_instance.tcp'
Created record for 'p4_header_instance.udp'
>## Build record ordering for gress 0
->## Build field ordering for record 'packet_out_hdr'
>## Build field ordering for record 'packet_in_hdr'
+>## Build field ordering for record 'packet_out_hdr'
>## Build field ordering for record 'ethernet'
>## Build field ordering for record 'ipv4'
>## Build field ordering for record 'udp'
@@ -66,8 +64,8 @@
Created record for 'p4_header_instance.tcp'
Created record for 'p4_header_instance.udp'
>## Build record ordering for gress 1
->## Build field ordering for record 'packet_out_hdr'
>## Build field ordering for record 'packet_in_hdr'
+>## Build field ordering for record 'packet_out_hdr'
>## Build field ordering for record 'ethernet'
>## Build field ordering for record 'ipv4'
>## Build field ordering for record 'udp'
@@ -80,7 +78,6 @@
Add container 128 for ig_intr_md._pad3 to bmeta_ig_intr_md
Add container 128 for ig_intr_md.ingress_port to bmeta_ig_intr_md
>## Create deparser bridge record
-Bridge contains user-provided data
># End deparser init
Constructing parse graph for entry point start on ingress
Constructing parse graph for entry point start on egress
@@ -90,52 +87,57 @@
Stretch extraction of ingress_port to state <Ingress intrinsic metadata> offset 7
Stretch extraction of ig_intr_md.ingress_port to state <_parse_bridged_ingress_intrinsic_metadata> offset 7
># Begin scraping deparser POV allocation from raw PHV allocation
-PHV layout: [0, 0, 0, 0, 67, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
+PHV layout: [0, 0, 0, 0, 66, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
>## Scraping individual POV records
-POV 32 -> packet_in_hdr
POV 33 -> packet_out_hdr
POV 34 -> ethernet
POV 35 -> ipv4
-POV 38 -> pov_bmeta
POV 36 -> tcp
POV 37 -> udp
+POV 38 -> pov_bmeta
+POV 32 -> packet_in_hdr
>## Setting up array bits
># End scraping deparser POV allocation from raw PHV allocation
># Begin parser POV rewrite
>## Filling in POV init state
>## Rewriting parser POV extractions
-POV for metadata_bridge -> PHV 67 |= 0x40
-POV for packet_in_hdr -> PHV 67 |= 0x1
-POV for ethernet -> PHV 67 |= 0x4
-POV for ipv4 -> PHV 67 |= 0x8
-POV for tcp -> PHV 67 |= 0x10
-POV for udp -> PHV 67 |= 0x20
-POV for packet_out_hdr -> PHV 67 |= 0x2
+POV for metadata_bridge -> PHV 66 |= 0x40
+POV for packet_in_hdr -> PHV 66 |= 0x1
+POV for ethernet -> PHV 66 |= 0x4
+POV for ipv4 -> PHV 66 |= 0x8
+POV for tcp -> PHV 66 |= 0x10
+POV for udp -> PHV 66 |= 0x20
+POV for packet_out_hdr -> PHV 66 |= 0x2
POV for ig_intr_md -> dropped (no deparser record)
POV for _bridged_intr_md_ -> PHV 0 |= 0x10000
>## Sampling not detected, deparsing at least 1 POV byte
>## Adding POV containers to metadata bridge: [0]
>## Set POV skip state's shift amount to 32
># Begin scraping deparser POV allocation from raw PHV allocation
-PHV layout: [82, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
+PHV layout: [81, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
>## Scraping individual POV records
-POV 0 -> packet_in_hdr
POV 1 -> packet_out_hdr
POV 2 -> ethernet
POV 3 -> ipv4
POV 4 -> tcp
POV 5 -> udp
+POV 0 -> packet_in_hdr
>## Setting up array bits
># End scraping deparser POV allocation from raw PHV allocation
># Begin parser POV rewrite
>## Filling in POV init state
>## Rewriting parser POV extractions
-POV for packet_in_hdr -> PHV 82 |= 0x1
-POV for ethernet -> PHV 82 |= 0x4
-POV for ipv4 -> PHV 82 |= 0x8
-POV for tcp -> PHV 82 |= 0x10
-POV for udp -> PHV 82 |= 0x20
-POV for packet_out_hdr -> PHV 82 |= 0x2
+POV for packet_in_hdr -> PHV 81 |= 0x1
+POV for ethernet -> PHV 81 |= 0x4
+POV for ipv4 -> PHV 81 |= 0x8
+POV for tcp -> PHV 81 |= 0x10
+POV for udp -> PHV 81 |= 0x20
+POV for packet_out_hdr -> PHV 81 |= 0x2
+Linear Chain parse_tcp -> parse_tcp//spilled
+Try merge parse_tcp <- parse_tcp//spilled
+merge output at offset 24
+Ran out of 8b extractors
+states will not be partially merged since S2 is end of chain
Linear Chain parse_pkt_in -> parse_ethernet
Try merge parse_pkt_in <- parse_ethernet
Multiple paths to state S2 : parse_ethernet <- 3
@@ -195,7 +197,7 @@
Multiple paths to state S2 : start <- 2
Remove state <Ingress intrinsic metadata>
Remove state <Phase 0>
-assign ids to 10 states, dir = 0
+assign ids to 11 states, dir = 0
------
State : <Shim start state>
shift: 0B
@@ -208,7 +210,7 @@
State : parse_pkt_in
shift: 2B
match_reservations: []
-outputs[addr, width]: ([67, 8], [129, 16])
+outputs[addr, width]: ([66, 8], [129, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
parent state start
@@ -217,7 +219,7 @@
State : parse_ethernet
shift: 14B
match_reservations: []
-outputs[addr, width]: ([67, 8], [65, 8], [1, 32], [131, 16], [66, 8], [2, 32], [132, 16])
+outputs[addr, width]: ([66, 8], [64, 8], [1, 32], [131, 16], [65, 8], [2, 32], [132, 16])
branch on = etherType, offset = 96b, dst = parse_ethernet
match_extractions: [match_window(hw_id=0, width=16)]
match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
@@ -230,29 +232,30 @@
State : parse_ipv4
shift: 20B
match_reservations: []
-outputs[addr, width]: ([67, 8], [288, 8], [289, 8], [320, 16], [321, 16], [322, 16], [256, 32], [257, 32], [258, 32])
+outputs[addr, width]: ([66, 8], [288, 8], [289, 8], [320, 16], [321, 16], [322, 16], [256, 32], [257, 32], [258, 32])
branch on = fragOffset, offset = 51b, dst = parse_ipv4
branch on = protocol, offset = 72b, dst = parse_ipv4
-match_extractions: [match_window(hw_id=2, width=8), match_window(hw_id=0, width=16)]
-match key = [0, 1, 2, 3, 4, 5, 6, 7]
+match_extractions: [match_window(hw_id=0, width=16), match_window(hw_id=2, width=8)]
match key = [8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, None, None, None]
+match key = [0, 1, 2, 3, 4, 5, 6, 7]
next state parse_tcp val 6 mask [True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True]
next state parse_udp val 17 mask [True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True]
parent state parse_ethernet
------
State : parse_tcp
-shift: 20B
+shift: 0B
match_reservations: []
-outputs[addr, width]: ([67, 8], [290, 8], [291, 8], [323, 16], [324, 16], [325, 16], [259, 32], [260, 32], [261, 32])
+outputs[addr, width]: ([66, 8], [290, 8], [291, 8], [292, 8], [323, 16], [324, 16], [325, 16], [326, 16], [259, 32], [260, 32])
match_extractions: []
+next state parse_tcp//spilled val 0 mask [False]
parent state parse_ipv4
------
State : parse_udp
shift: 8B
match_reservations: []
-outputs[addr, width]: ([67, 8], [290, 8], [291, 8], [323, 16], [259, 32])
+outputs[addr, width]: ([66, 8], [290, 8], [291, 8], [323, 16], [259, 32])
match_extractions: []
parent state parse_ipv4
@@ -272,7 +275,7 @@
State : parse_pkt_out
shift: 2B
match_reservations: []
-outputs[addr, width]: ([67, 8], [129, 16])
+outputs[addr, width]: ([66, 8], [129, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
parent state default_parser
@@ -285,9 +288,9 @@
branch on = None, offset = 0b, dst = <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>
branch on = None, offset = 64b, dst = <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>
branch promise on = ingress_port, offset = 7b, dst = default_parser
-match_extractions: [match_window(hw_id=2, width=8), match_window(hw_id=0, width=16)]
-match key = [0, 1, 2, 3, 4, 5, 6, 7]
+match_extractions: [match_window(hw_id=0, width=16), match_window(hw_id=2, width=8)]
match key = [None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, 8]
+match key = [0, 1, 2, 3, 4, 5, 6, 7]
next state start val 0 mask [False]
parent state <Shim start state>
@@ -295,7 +298,7 @@
State : start
shift: 0B
match_reservations: [match_window(hw_id=0, width=16)]
-outputs[addr, width]: ([67, 8],)
+outputs[addr, width]: ([66, 8],)
branch on = None, offset = 96b, dst = start
match_extractions: [match_window(hw_id=2, width=8)]
match key = [0, 1, 2, 3, 4, 5, 6, 7]
@@ -303,6 +306,14 @@
next state default_parser val 0 mask [False]
parent state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>
+------
+State : parse_tcp//spilled
+shift: 20B
+match_reservations: []
+outputs[addr, width]: ([293, 8],)
+match_extractions: []
+parent state parse_tcp
+
Linear Chain parse_pkt_in -> parse_ethernet
Try merge parse_pkt_in <- parse_ethernet
Multiple paths to state S2 : parse_ethernet <- 3
@@ -324,7 +335,7 @@
S2: State : <Egress intrinsic metadata>
shift: 3B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8])
+outputs[addr, width]: ([144, 16], [80, 8])
branch on = None, offset = 24b, dst = <Egress intrinsic metadata>
match_extractions: []
next state <POV skip> val 0 mask [False]
@@ -338,7 +349,7 @@
S1: State : <POV initialization>_<Egress intrinsic metadata>
shift: 3B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8])
+outputs[addr, width]: ([144, 16], [80, 8])
branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>
match_extractions: []
next state <POV skip> val 0 mask [False]
@@ -350,45 +361,20 @@
match_reservations: []
outputs[addr, width]: ()
match_extractions: []
-next state <Metadata bridge> val 0 mask [False]
+next state <_parse_bridged_ingress_intrinsic_metadata> val 0 mask [False]
parent state <POV initialization>_<Egress intrinsic metadata>
Full merge done <POV initialization>_<Egress intrinsic metadata> <- <POV skip>
-Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <Metadata bridge>
-merge output at offset 0
-merge output at offset 8
-merge_offset = 24, complete_merge = True
+Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <_parse_bridged_ingress_intrinsic_metadata>
+merge_offset = 0, complete_merge = True
Before Merge ------
S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>
shift: 7B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8])
+outputs[addr, width]: ([144, 16], [80, 8])
branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>
match_extractions: []
-next state <Metadata bridge> val 0 mask [False]
-parent state <Shim start state>
-
-
-S2: State : <Metadata bridge>
-shift: 3B
-match_reservations: []
-outputs[addr, width]: ([80, 8], [144, 16])
-match_extractions: []
-next state <_parse_bridged_ingress_intrinsic_metadata> val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>
-
-
-Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <Metadata bridge>
-Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge> <- <_parse_bridged_ingress_intrinsic_metadata>
-merge_offset = 0, complete_merge = True
-Before Merge ------
-S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>
-shift: 10B
-match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8], [80, 8], [144, 16])
-branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>
-match_extractions: []
next state <_parse_bridged_ingress_intrinsic_metadata> val 0 mask [False]
parent state <Shim start state>
@@ -400,19 +386,19 @@
branch promise on = ingress_port, offset = 7b, dst = default_parser
match_extractions: []
next state start val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>
-Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge> <- <_parse_bridged_ingress_intrinsic_metadata>
-Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata> <- start
+Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <_parse_bridged_ingress_intrinsic_metadata>
+Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata> <- start
merge_offset = 0, complete_merge = True
Before Merge ------
-S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>
-shift: 12B
+S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>
+shift: 9B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8], [80, 8], [144, 16])
-branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>
-branch promise on = ingress_port, offset = 87b, dst = default_parser
+outputs[addr, width]: ([144, 16], [80, 8])
+branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>
+branch promise on = ingress_port, offset = 63b, dst = default_parser
match_extractions: []
next state start val 0 mask [False]
parent state <Shim start state>
@@ -426,13 +412,12 @@
match_extractions: []
next state parse_pkt_in val 0 mask [True, True, True, True, True, True, True, True]
next state default_parser val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>
-Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata> <- start
+Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata> <- start
Remove state <Egress intrinsic metadata>
Remove state <POV skip>
-Remove state <Metadata bridge>
Remove state <_parse_bridged_ingress_intrinsic_metadata>
Remove state start
assign ids to 9 states, dir = 1
@@ -442,13 +427,13 @@
match_reservations: []
outputs[addr, width]: ()
match_extractions: []
-next state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start val 0 mask [False]
+next state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start val 0 mask [False]
------
State : parse_ethernet
shift: 14B
match_reservations: []
-outputs[addr, width]: ([82, 8], [300, 8], [270, 32], [338, 16], [301, 8], [271, 32], [339, 16])
+outputs[addr, width]: ([81, 8], [300, 8], [270, 32], [338, 16], [301, 8], [271, 32], [339, 16])
branch on = etherType, offset = 96b, dst = parse_ethernet
match_extractions: [match_window(hw_id=0, width=16)]
match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
@@ -461,12 +446,12 @@
State : parse_ipv4
shift: 20B
match_reservations: []
-outputs[addr, width]: ([82, 8], [296, 8], [297, 8], [332, 16], [333, 16], [334, 16], [264, 32], [265, 32], [266, 32])
+outputs[addr, width]: ([81, 8], [296, 8], [297, 8], [332, 16], [333, 16], [334, 16], [264, 32], [265, 32], [266, 32])
branch on = fragOffset, offset = 51b, dst = parse_ipv4
branch on = protocol, offset = 72b, dst = parse_ipv4
-match_extractions: [match_window(hw_id=2, width=8), match_window(hw_id=0, width=16)]
-match key = [0, 1, 2, 3, 4, 5, 6, 7]
+match_extractions: [match_window(hw_id=0, width=16), match_window(hw_id=2, width=8)]
match key = [8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, None, None, None]
+match key = [0, 1, 2, 3, 4, 5, 6, 7]
next state parse_tcp val 6 mask [True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True]
next state parse_udp val 17 mask [True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True]
parent state parse_ethernet
@@ -475,7 +460,7 @@
State : parse_tcp
shift: 20B
match_reservations: []
-outputs[addr, width]: ([82, 8], [298, 8], [299, 8], [335, 16], [336, 16], [337, 16], [267, 32], [268, 32], [269, 32])
+outputs[addr, width]: ([81, 8], [298, 8], [299, 8], [335, 16], [336, 16], [337, 16], [267, 32], [268, 32], [269, 32])
match_extractions: []
parent state parse_ipv4
@@ -483,7 +468,7 @@
State : parse_udp
shift: 8B
match_reservations: []
-outputs[addr, width]: ([82, 8], [298, 8], [299, 8], [336, 16], [267, 32])
+outputs[addr, width]: ([81, 8], [298, 8], [299, 8], [336, 16], [267, 32])
match_extractions: []
parent state parse_ipv4
@@ -492,33 +477,33 @@
shift: 0B
match_reservations: [match_window(hw_id=0, width=16)]
outputs[addr, width]: ()
-branch on = ingress_port, offset = 87b, dst = default_parser
+branch on = ingress_port, offset = 63b, dst = default_parser
match_extractions: [match_window(hw_id=0, width=16)]
match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, None, None, None, None, None, None, None]
next state parse_pkt_out val 320 mask [True, True, True, True, True, True, True, True, True]
next state parse_ethernet val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
------
State : parse_pkt_out
shift: 2B
match_reservations: []
-outputs[addr, width]: ([82, 8], [340, 16])
+outputs[addr, width]: ([81, 8], [340, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
parent state default_parser
------
-State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
-shift: 12B
+State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
+shift: 9B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8], [80, 8], [144, 16])
-branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
-branch on = None, offset = 192b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
-branch promise on = ingress_port, offset = 87b, dst = default_parser
-match_extractions: [match_window(hw_id=2, width=8), match_window(hw_id=0, width=16), match_window(hw_id=3, width=8)]
-match key = [8, 9, 10, 11, 12, 13, 14, 15]
+outputs[addr, width]: ([144, 16], [80, 8])
+branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
+branch on = None, offset = 168b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
+branch promise on = ingress_port, offset = 63b, dst = default_parser
+match_extractions: [match_window(hw_id=0, width=16), match_window(hw_id=2, width=8), match_window(hw_id=3, width=8)]
match key = [None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
+match key = [8, 9, 10, 11, 12, 13, 14, 15]
match key = [0, 1, 2, 3, 4, 5, 6, 7]
next state parse_pkt_in val 0 mask [True, True, True, True, True, True, True, True]
next state default_parser val 0 mask [False]
@@ -528,8 +513,8 @@
State : parse_pkt_in
shift: 2B
match_reservations: []
-outputs[addr, width]: ([82, 8], [145, 16])
+outputs[addr, width]: ([81, 8], [340, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parser.characterize.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parser.characterize.log
index a90f13f..e48226f 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parser.characterize.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/parser.characterize.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: parser.characterize.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/transform.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/transform.log
index c103a09..9c7e0a4 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/transform.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/transform.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: transform.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:08 2017 |
+| Created on: Fri Sep 8 08:23:45 2017 |
+---------------------------------------------------------------------+
-------------------------------
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/name_lookup.c b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/name_lookup.c
index ff238fe..c2d2570 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/name_lookup.c
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/name_lookup.c
@@ -5,7 +5,7 @@
const char * p4_table_name_lookup(int pipe, int stage, int table_index)
{
switch(stage) {
- case 2:
+ case 1:
{
switch(table_index) {
case 0:
@@ -24,22 +24,11 @@
case 0:
{
switch(table_index) {
- case 0:
- {
- return "ingress_pkt";
- }
- break;
case 1:
{
- return "egress_pkt";
+ return "process_packet_out_table";
}
break;
- }
- }
- break;
- case 1:
- {
- switch(table_index) {
case 0:
{
return "table0";
@@ -77,40 +66,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -142,16 +121,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -172,16 +141,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -245,6 +209,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -292,17 +266,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -347,7 +326,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -373,40 +352,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -438,16 +407,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -468,16 +427,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -541,6 +495,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -588,17 +552,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -643,7 +612,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -669,40 +638,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -734,16 +693,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -764,16 +713,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -837,6 +781,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -884,17 +838,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -939,7 +898,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -965,40 +924,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -1030,16 +979,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -1060,16 +999,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -1133,6 +1067,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -1180,17 +1124,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -1235,7 +1184,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -1261,40 +1210,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -1326,16 +1265,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -1356,16 +1285,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -1429,6 +1353,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -1476,17 +1410,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -1531,7 +1470,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -1557,40 +1496,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -1622,16 +1551,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -1652,16 +1571,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -1725,6 +1639,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -1772,17 +1696,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -1827,7 +1756,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -1853,40 +1782,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -1918,16 +1837,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -1948,16 +1857,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -2021,6 +1925,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -2068,17 +1982,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -2123,7 +2042,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -2149,40 +2068,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -2214,16 +2123,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -2244,16 +2143,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -2317,6 +2211,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -2364,17 +2268,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -2419,7 +2328,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -2445,40 +2354,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -2510,16 +2409,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -2540,16 +2429,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -2613,6 +2497,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -2660,17 +2554,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -2715,7 +2614,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -2741,40 +2640,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -2806,16 +2695,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -2836,16 +2715,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -2909,6 +2783,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -2956,17 +2840,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -3011,7 +2900,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -3037,40 +2926,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -3102,16 +2981,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -3132,16 +3001,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -3205,6 +3069,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -3252,17 +3126,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -3307,7 +3186,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -3333,40 +3212,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -3398,16 +3267,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -3428,16 +3287,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -3501,6 +3355,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -3548,17 +3412,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -3603,7 +3472,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/tofino.bin b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/tofino.bin
index 29292c8..cdb2e28 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/tofino.bin
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/tofino.bin
Binary files differ
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/deparser.html b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/deparser.html
index 9eb0488..806ee84 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/deparser.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/deparser.html
@@ -102,7 +102,7 @@
<td width=50 style="border: 1px solid black" align=center>120-127</td>
</tr><tr><td width=50 align=right>PHV </td>
<td height=50 colspan=4 align=center bgcolor=#DDDDDD>0</td>
-<td height=50 colspan=1 align=center bgcolor=#DDDDDD>67</td>
+<td height=50 colspan=1 align=center bgcolor=#DDDDDD>66</td>
<td height=50 colspan=11 align=center bgcolor=#FFFFFF>----</td>
</tr></table><br />
<table border=0 style="border: 1px solid black;"><tr><td width=50 align=right>POV </td>
@@ -129,13 +129,13 @@
<tr class=fde_row_0><td height=50 width=50>0-15</td><td>----</td><td> </td><td> </td></tr>
<tr class=fde_row_0><td height=50 width=50>16</td><td>_bridged_intr_md_</td><td>PHV 0 bit 16</td><td>(phv[0] & 0x10000)</td></tr>
<tr class=fde_row_0><td height=50 width=50>17-31</td><td>----</td><td> </td><td> </td></tr>
-<tr class=fde_row_0><td height=50 width=50>32</td><td>packet_in_hdr</td><td>PHV 67 bit 0</td><td>(phv[67] & 0x1)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>33</td><td>packet_out_hdr</td><td>PHV 67 bit 1</td><td>(phv[67] & 0x2)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>34</td><td>ethernet</td><td>PHV 67 bit 2</td><td>(phv[67] & 0x4)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>35</td><td>ipv4</td><td>PHV 67 bit 3</td><td>(phv[67] & 0x8)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>36</td><td>tcp</td><td>PHV 67 bit 4</td><td>(phv[67] & 0x10)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>37</td><td>udp</td><td>PHV 67 bit 5</td><td>(phv[67] & 0x20)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>38</td><td>metadata_bridge</td><td>PHV 67 bit 6</td><td>(phv[67] & 0x40)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>32</td><td>packet_in_hdr</td><td>PHV 66 bit 0</td><td>(phv[66] & 0x1)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>33</td><td>packet_out_hdr</td><td>PHV 66 bit 1</td><td>(phv[66] & 0x2)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>34</td><td>ethernet</td><td>PHV 66 bit 2</td><td>(phv[66] & 0x4)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>35</td><td>ipv4</td><td>PHV 66 bit 3</td><td>(phv[66] & 0x8)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>36</td><td>tcp</td><td>PHV 66 bit 4</td><td>(phv[66] & 0x10)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>37</td><td>udp</td><td>PHV 66 bit 5</td><td>(phv[66] & 0x20)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>38</td><td>metadata_bridge</td><td>PHV 66 bit 6</td><td>(phv[66] & 0x40)</td></tr>
<tr class=fde_row_0><td height=50 width=50>39-254</td><td>----</td><td> </td><td> </td></tr>
</table>
</div></div><br><br>
@@ -154,15 +154,6 @@
<tr class="fde_row_1">
- <td style="border-right: 1px solid black">metadata_bridge (38)</td>
- <td>64</td>
- <td>128</td>
- <td>128</td>
- <td>-</td>
- </tr>
-
-
- <tr class="fde_row_0">
<td style="border-right: 1px solid black">_bridged_intr_md_ (16)</td>
<td>128</td>
<td>128</td>
@@ -171,15 +162,6 @@
</tr>
- <tr class="fde_row_1">
- <td style="border-right: 1px solid black">packet_out_hdr (33)</td>
- <td>129</td>
- <td>129</td>
- <td>-</td>
- <td>-</td>
- </tr>
-
-
<tr class="fde_row_0">
<td style="border-right: 1px solid black">packet_in_hdr (32)</td>
<td>129</td>
@@ -190,34 +172,43 @@
<tr class="fde_row_1">
+ <td style="border-right: 1px solid black">packet_out_hdr (33)</td>
+ <td>129</td>
+ <td>129</td>
+ <td>-</td>
+ <td>-</td>
+ </tr>
+
+
+ <tr class="fde_row_0">
<td style="border-right: 1px solid black">ethernet (34)</td>
+ <td>64</td>
+ <td>1</td>
+ <td>1</td>
+ <td>1</td>
+ </tr>
+
+
+ <tr class="fde_row_1">
+ <td style="border-right: 1px solid black">ethernet (34)</td>
+ <td>1</td>
+ <td>131</td>
+ <td>131</td>
<td>65</td>
- <td>1</td>
- <td>1</td>
- <td>1</td>
</tr>
<tr class="fde_row_0">
<td style="border-right: 1px solid black">ethernet (34)</td>
- <td>1</td>
- <td>131</td>
- <td>131</td>
- <td>66</td>
+ <td>2</td>
+ <td>2</td>
+ <td>2</td>
+ <td>2</td>
</tr>
<tr class="fde_row_1">
<td style="border-right: 1px solid black">ethernet (34)</td>
- <td>2</td>
- <td>2</td>
- <td>2</td>
- <td>2</td>
- </tr>
-
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">ethernet (34)</td>
<td>132</td>
<td>132</td>
<td>-</td>
@@ -225,7 +216,7 @@
</tr>
- <tr class="fde_row_1">
+ <tr class="fde_row_0">
<td style="border-right: 1px solid black">ipv4 (35)</td>
<td><font color=#333333><i>288</i></font></td>
<td><font color=#333333><i>289</i></font></td>
@@ -234,7 +225,7 @@
</tr>
- <tr class="fde_row_0">
+ <tr class="fde_row_1">
<td style="border-right: 1px solid black">ipv4 (35)</td>
<td><font color=#333333><i>321</i></font></td>
<td><font color=#333333><i>321</i></font></td>
@@ -243,26 +234,26 @@
</tr>
- <tr class="fde_row_1">
- <td style="border-right: 1px solid black">ipv4 (35)</td>
- <td><font color=#333333><i>256</i></font></td>
- <td><font color=#333333><i>256</i></font></td>
- <td><font color=#333333><i>256</i></font></td>
- <td><font color=#333333><i>256</i></font></td>
- </tr>
-
-
<tr class="fde_row_0">
<td style="border-right: 1px solid black">ipv4 (35)</td>
- <td><font color=#333333><i>257</i></font></td>
- <td><font color=#333333><i>257</i></font></td>
- <td><font color=#333333><i>257</i></font></td>
- <td><font color=#333333><i>257</i></font></td>
+ <td><font color=#333333><i>256</i></font></td>
+ <td><font color=#333333><i>256</i></font></td>
+ <td><font color=#333333><i>256</i></font></td>
+ <td><font color=#333333><i>256</i></font></td>
</tr>
<tr class="fde_row_1">
<td style="border-right: 1px solid black">ipv4 (35)</td>
+ <td><font color=#333333><i>257</i></font></td>
+ <td><font color=#333333><i>257</i></font></td>
+ <td><font color=#333333><i>257</i></font></td>
+ <td><font color=#333333><i>257</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">ipv4 (35)</td>
<td><font color=#333333><i>258</i></font></td>
<td><font color=#333333><i>258</i></font></td>
<td><font color=#333333><i>258</i></font></td>
@@ -270,7 +261,7 @@
</tr>
- <tr class="fde_row_0">
+ <tr class="fde_row_1">
<td style="border-right: 1px solid black">udp (37)</td>
<td><font color=#333333><i>290</i></font></td>
<td><font color=#333333><i>291</i></font></td>
@@ -279,7 +270,7 @@
</tr>
- <tr class="fde_row_1">
+ <tr class="fde_row_0">
<td style="border-right: 1px solid black">udp (37)</td>
<td><font color=#333333><i>259</i></font></td>
<td><font color=#333333><i>259</i></font></td>
@@ -288,21 +279,30 @@
</tr>
- <tr class="fde_row_0">
+ <tr class="fde_row_1">
<td style="border-right: 1px solid black">tcp (36)</td>
<td><font color=#333333><i>290</i></font></td>
<td><font color=#333333><i>291</i></font></td>
+ <td><font color=#333333><i>292</i></font></td>
+ <td><font color=#333333><i>293</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">tcp (36)</td>
<td><font color=#333333><i>323</i></font></td>
<td><font color=#333333><i>323</i></font></td>
+ <td><font color=#333333><i>324</i></font></td>
+ <td><font color=#333333><i>324</i></font></td>
</tr>
<tr class="fde_row_1">
<td style="border-right: 1px solid black">tcp (36)</td>
- <td><font color=#333333><i>324</i></font></td>
- <td><font color=#333333><i>324</i></font></td>
<td><font color=#333333><i>325</i></font></td>
<td><font color=#333333><i>325</i></font></td>
+ <td><font color=#333333><i>326</i></font></td>
+ <td><font color=#333333><i>326</i></font></td>
</tr>
@@ -323,17 +323,8 @@
<td><font color=#333333><i>260</i></font></td>
</tr>
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">tcp (36)</td>
- <td><font color=#333333><i>261</i></font></td>
- <td><font color=#333333><i>261</i></font></td>
- <td><font color=#333333><i>261</i></font></td>
- <td><font color=#333333><i>261</i></font></td>
- </tr>
-
</table>
-<br>21/192 entries populated<br>
+<br>20/192 entries populated<br>
</div></div><br><br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('resub_table');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#resub_table">Resubmit Table</a> <br><br><div id="resub_table" style="display: block;">
@@ -370,7 +361,7 @@
<td width=50 style="border: 1px solid black" align=center>112-119</td>
<td width=50 style="border: 1px solid black" align=center>120-127</td>
</tr><tr><td width=50 align=right>PHV </td>
-<td height=50 colspan=1 align=center bgcolor=#DDDDDD>82</td>
+<td height=50 colspan=1 align=center bgcolor=#DDDDDD>81</td>
<td height=50 colspan=15 align=center bgcolor=#FFFFFF>----</td>
</tr></table><br />
<table border=0 style="border: 1px solid black;"><tr><td width=50 align=right>POV </td>
@@ -394,12 +385,12 @@
<td height=50 colspan=16 align=center bgcolor=#FFFFFF>----</td>
</tr></table><br />
<table border=0 style="text-align: center; border: 1px solid black; border-bottom: 0px; border-spacing: 0px;"><tr><td>POV</td><td>Use</td><td>Location</td><td>Expression</td></tr>
-<tr class=fde_row_0><td height=50 width=50>0</td><td>packet_in_hdr</td><td>PHV 82 bit 0</td><td>(phv[82] & 0x1)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>1</td><td>packet_out_hdr</td><td>PHV 82 bit 1</td><td>(phv[82] & 0x2)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>2</td><td>ethernet</td><td>PHV 82 bit 2</td><td>(phv[82] & 0x4)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>3</td><td>ipv4</td><td>PHV 82 bit 3</td><td>(phv[82] & 0x8)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>4</td><td>tcp</td><td>PHV 82 bit 4</td><td>(phv[82] & 0x10)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>5</td><td>udp</td><td>PHV 82 bit 5</td><td>(phv[82] & 0x20)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>0</td><td>packet_in_hdr</td><td>PHV 81 bit 0</td><td>(phv[81] & 0x1)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>1</td><td>packet_out_hdr</td><td>PHV 81 bit 1</td><td>(phv[81] & 0x2)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>2</td><td>ethernet</td><td>PHV 81 bit 2</td><td>(phv[81] & 0x4)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>3</td><td>ipv4</td><td>PHV 81 bit 3</td><td>(phv[81] & 0x8)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>4</td><td>tcp</td><td>PHV 81 bit 4</td><td>(phv[81] & 0x10)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>5</td><td>udp</td><td>PHV 81 bit 5</td><td>(phv[81] & 0x20)</td></tr>
<tr class=fde_row_0><td height=50 width=50>6-254</td><td>----</td><td> </td><td> </td></tr>
</table>
</div></div><br><br>
@@ -409,7 +400,7 @@
<tr><td><center>POV</center></td><td colspan=4><center>PHV</center></td></tr>
<tr class="fde_row_0">
- <td style="border-right: 1px solid black">packet_out_hdr (1)</td>
+ <td style="border-right: 1px solid black">packet_in_hdr (0)</td>
<td><font color=#333333><i>340</i></font></td>
<td><font color=#333333><i>340</i></font></td>
<td>-</td>
@@ -418,9 +409,9 @@
<tr class="fde_row_1">
- <td style="border-right: 1px solid black">packet_in_hdr (0)</td>
- <td>145</td>
- <td>145</td>
+ <td style="border-right: 1px solid black">packet_out_hdr (1)</td>
+ <td><font color=#333333><i>340</i></font></td>
+ <td><font color=#333333><i>340</i></font></td>
<td>-</td>
<td>-</td>
</tr>
@@ -578,7 +569,7 @@
</div></div><br><br>
</td></tr>
</table>
-<br><i>Created on Thu Sep 7 13:56:24 2017</i>
+<br><i>Created on Fri Sep 8 08:24:02 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/mau.html b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/mau.html
index 9e28911..635ee23 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/mau.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/mau.html
@@ -4,7 +4,7 @@
<div id="content" style="width: 100%; height: 100%">
<h1>Pipeline 0 -- default</h1>
-<h3>Stages Occupied: 3</h3>
+<h3>Stages Occupied: 2</h3>
<h3>Resource Usage Summary</h3>
<table border="1">
<tr>
@@ -29,35 +29,15 @@
</tr>
<tr>
<td align="center">0</td>
-<td align="center">2</td>
-<td align="center">0</td>
-<td align="center">2</td>
-<td align="center">0</td>
-<td align="center">2</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">1</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">2</td>
-</tr>
-<tr>
-<td align="center">1</td>
<td align="center">1</td>
<td align="center">16</td>
<td align="center">1</td>
<td align="center">0</td>
-<td align="center">1</td>
-<td align="center">3</td>
-<td align="center">3</td>
-<td align="center">3</td>
<td align="center">2</td>
+<td align="center">3</td>
+<td align="center">3</td>
+<td align="center">3</td>
+<td align="center">3</td>
<td align="center">0</td>
<td align="center">1</td>
<td align="center">0</td>
@@ -65,10 +45,10 @@
<td align="center">0</td>
<td align="center">2</td>
<td align="center">1</td>
-<td align="center">1</td>
+<td align="center">2</td>
</tr>
<tr>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">2</td>
<td align="center">0</td>
<td align="center">9</td>
@@ -88,6 +68,26 @@
<td align="center">2</td>
</tr>
<tr>
+<td align="center">2</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+</tr>
+<tr>
<td align="center">3</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -289,11 +289,11 @@
</tr>
<tr>
<td align="center">Totals</td>
-<td align="center">5</td>
+<td align="center">3</td>
<td align="center">16</td>
-<td align="center">12</td>
+<td align="center">10</td>
<td align="center">0</td>
-<td align="center">5</td>
+<td align="center">4</td>
<td align="center">7</td>
<td align="center">7</td>
<td align="center">3</td>
@@ -305,7 +305,7 @@
<td align="center">0</td>
<td align="center">2</td>
<td align="center">1</td>
-<td align="center">5</td>
+<td align="center">4</td>
</tr>
</table>
<h3>Resource Percentage Summary</h3>
@@ -332,35 +332,15 @@
</tr>
<tr>
<td align="center">0</td>
-<td align="center" bgcolor="#07fe00" >1.56%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#02fe00" >0.48%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#3ffe00" >12.50%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#0ffe00" >3.12%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#3ffe00" >12.50%</td>
-</tr>
-<tr>
-<td align="center">1</td>
<td align="center" bgcolor="#03fe00" >0.78%</td>
<td align="center" bgcolor="#7bfe00" >24.24%</td>
<td align="center" bgcolor="#01fe00" >0.24%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#1ffe00" >6.25%</td>
+<td align="center" bgcolor="#3ffe00" >12.50%</td>
<td align="center" bgcolor="#13fe00" >3.75%</td>
<td align="center" bgcolor="#1ffe00" >6.25%</td>
<td align="center" bgcolor="#3ffe00" >12.50%</td>
-<td align="center" bgcolor="#1ffe00" >6.25%</td>
+<td align="center" bgcolor="#2ffe00" >9.38%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#7ffe00" >25.00%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
@@ -368,10 +348,10 @@
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#1ffe00" >6.25%</td>
<td align="center" bgcolor="#0ffe00" >3.12%</td>
-<td align="center" bgcolor="#1ffe00" >6.25%</td>
+<td align="center" bgcolor="#3ffe00" >12.50%</td>
</tr>
<tr>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center" bgcolor="#07fe00" >1.56%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#0bfe00" >2.16%</td>
@@ -391,6 +371,26 @@
<td align="center" bgcolor="#3ffe00" >12.50%</td>
</tr>
<tr>
+<td align="center">2</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+</tr>
+<tr>
<td align="center">3</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
@@ -592,11 +592,11 @@
</tr>
<tr>
<td align="center">Average</td>
-<td align="center" bgcolor="#01fe00" >0.33%</td>
+<td align="center" bgcolor="#01fe00" >0.20%</td>
<td align="center" bgcolor="#0afe00" >2.02%</td>
-<td align="center" bgcolor="#01fe00" >0.24%</td>
+<td align="center" bgcolor="#01fe00" >0.20%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#0dfe00" >2.60%</td>
+<td align="center" bgcolor="#0afe00" >2.08%</td>
<td align="center" bgcolor="#03fe00" >0.73%</td>
<td align="center" bgcolor="#06fe00" >1.22%</td>
<td align="center" bgcolor="#05fe00" >1.04%</td>
@@ -608,7 +608,7 @@
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#02fe00" >0.52%</td>
<td align="center" bgcolor="#01fe00" >0.26%</td>
-<td align="center" bgcolor="#0dfe00" >2.60%</td>
+<td align="center" bgcolor="#0afe00" >2.08%</td>
</tr>
</table>
<h2>Phase 0 is not in use.</h2>
@@ -618,2633 +618,8 @@
<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
<rect x="16" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 0 in exact Group 0 (parity group 0)
contains:
- {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]} for table _condition_3
-</title></rect>
-<rect x="16" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 1 in exact Group 0 (parity group 0)
-contains:
{unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]} for table _condition_0
</title></rect>
-<rect x="16" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 2 in exact Group 0 (parity group 0)</title></rect>
-<rect x="16" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 3 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 4 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 5 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 6 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 7 in exact Group 0 (parity group 0)</title></rect>
-<rect x="40" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 8 in exact Group 0 (parity group 1)</title></rect>
-<rect x="40" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 9 in exact Group 0 (parity group 1)</title></rect>
-<rect x="40" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 10 in exact Group 0 (parity group 1)</title></rect>
-<rect x="40" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 11 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 12 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 13 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 14 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 15 in exact Group 0 (parity group 1)</title></rect>
-<rect x="16" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 16 in exact Group 1 (parity group 2)</title></rect>
-<rect x="16" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 17 in exact Group 1 (parity group 2)</title></rect>
-<rect x="16" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 18 in exact Group 1 (parity group 2)</title></rect>
-<rect x="16" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 19 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 20 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 21 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 22 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 23 in exact Group 1 (parity group 2)</title></rect>
-<rect x="40" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 24 in exact Group 1 (parity group 3)</title></rect>
-<rect x="40" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 25 in exact Group 1 (parity group 3)</title></rect>
-<rect x="40" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 26 in exact Group 1 (parity group 3)</title></rect>
-<rect x="40" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 27 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 28 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 29 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 30 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 31 in exact Group 1 (parity group 3)</title></rect>
-<rect x="16" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 32 in exact Group 2 (parity group 4)</title></rect>
-<rect x="16" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 33 in exact Group 2 (parity group 4)</title></rect>
-<rect x="16" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 34 in exact Group 2 (parity group 4)</title></rect>
-<rect x="16" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 35 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 36 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 37 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 38 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 39 in exact Group 2 (parity group 4)</title></rect>
-<rect x="40" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 40 in exact Group 2 (parity group 5)</title></rect>
-<rect x="40" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 41 in exact Group 2 (parity group 5)</title></rect>
-<rect x="40" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 42 in exact Group 2 (parity group 5)</title></rect>
-<rect x="40" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 43 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 44 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 45 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 46 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 47 in exact Group 2 (parity group 5)</title></rect>
-<rect x="16" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 48 in exact Group 3 (parity group 6)</title></rect>
-<rect x="16" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 49 in exact Group 3 (parity group 6)</title></rect>
-<rect x="16" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 50 in exact Group 3 (parity group 6)</title></rect>
-<rect x="16" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 51 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 52 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 53 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 54 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 55 in exact Group 3 (parity group 6)</title></rect>
-<rect x="40" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 56 in exact Group 3 (parity group 7)</title></rect>
-<rect x="40" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 57 in exact Group 3 (parity group 7)</title></rect>
-<rect x="40" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 58 in exact Group 3 (parity group 7)</title></rect>
-<rect x="40" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 59 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 60 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 61 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 62 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 63 in exact Group 3 (parity group 7)</title></rect>
-<rect x="16" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 64 in exact Group 4 (parity group 8)</title></rect>
-<rect x="16" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 65 in exact Group 4 (parity group 8)</title></rect>
-<rect x="16" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 66 in exact Group 4 (parity group 8)</title></rect>
-<rect x="16" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 67 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 68 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 69 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 70 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 71 in exact Group 4 (parity group 8)</title></rect>
-<rect x="40" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 72 in exact Group 4 (parity group 9)</title></rect>
-<rect x="40" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 73 in exact Group 4 (parity group 9)</title></rect>
-<rect x="40" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 74 in exact Group 4 (parity group 9)</title></rect>
-<rect x="40" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 75 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 76 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 77 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 78 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 79 in exact Group 4 (parity group 9)</title></rect>
-<rect x="16" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 80 in exact Group 5 (parity group 10)</title></rect>
-<rect x="16" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 81 in exact Group 5 (parity group 10)</title></rect>
-<rect x="16" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 82 in exact Group 5 (parity group 10)</title></rect>
-<rect x="16" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 83 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 84 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 85 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 86 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 87 in exact Group 5 (parity group 10)</title></rect>
-<rect x="40" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 88 in exact Group 5 (parity group 11)</title></rect>
-<rect x="40" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 89 in exact Group 5 (parity group 11)</title></rect>
-<rect x="40" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 90 in exact Group 5 (parity group 11)</title></rect>
-<rect x="40" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 91 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 92 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 93 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 94 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 95 in exact Group 5 (parity group 11)</title></rect>
-<rect x="16" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 96 in exact Group 6 (parity group 12)</title></rect>
-<rect x="16" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 97 in exact Group 6 (parity group 12)</title></rect>
-<rect x="16" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 98 in exact Group 6 (parity group 12)</title></rect>
-<rect x="16" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 99 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 100 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 101 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 102 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 103 in exact Group 6 (parity group 12)</title></rect>
-<rect x="40" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 104 in exact Group 6 (parity group 13)</title></rect>
-<rect x="40" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 105 in exact Group 6 (parity group 13)</title></rect>
-<rect x="40" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 106 in exact Group 6 (parity group 13)</title></rect>
-<rect x="40" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 107 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 108 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 109 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 110 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 111 in exact Group 6 (parity group 13)</title></rect>
-<rect x="16" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 112 in exact Group 7 (parity group 14)</title></rect>
-<rect x="16" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 113 in exact Group 7 (parity group 14)</title></rect>
-<rect x="16" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 114 in exact Group 7 (parity group 14)</title></rect>
-<rect x="16" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 115 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 116 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 117 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 118 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 119 in exact Group 7 (parity group 14)</title></rect>
-<rect x="40" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 120 in exact Group 7 (parity group 15)</title></rect>
-<rect x="40" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 121 in exact Group 7 (parity group 15)</title></rect>
-<rect x="40" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 122 in exact Group 7 (parity group 15)</title></rect>
-<rect x="40" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 123 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 124 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 125 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 126 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 127 in exact Group 7 (parity group 15)</title></rect>
-<rect x="16" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 128 in ternary Group 0</title></rect>
-<rect x="16" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 129 in ternary Group 0</title></rect>
-<rect x="24" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 130 in ternary Group 0</title></rect>
-<rect x="24" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 131 in ternary Group 0</title></rect>
-<rect x="32" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 132 in ternary Group 0</title></rect>
-<rect x="48" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 133 in ternary Group 0</title></rect>
-<rect x="16" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 134 in ternary Group 1</title></rect>
-<rect x="16" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 135 in ternary Group 1</title></rect>
-<rect x="24" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 136 in ternary Group 1</title></rect>
-<rect x="24" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 137 in ternary Group 1</title></rect>
-<rect x="32" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 138 in ternary Group 1</title></rect>
-<rect x="16" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 139 in ternary Group 2</title></rect>
-<rect x="16" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 140 in ternary Group 2</title></rect>
-<rect x="24" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 141 in ternary Group 2</title></rect>
-<rect x="24" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 142 in ternary Group 2</title></rect>
-<rect x="32" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 143 in ternary Group 2</title></rect>
-<rect x="48" y="432" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 144 in ternary Group 1</title></rect>
-<rect x="16" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 145 in ternary Group 3</title></rect>
-<rect x="16" y="448" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 146 in ternary Group 3</title></rect>
-<rect x="24" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 147 in ternary Group 3</title></rect>
-<rect x="24" y="448" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 148 in ternary Group 3</title></rect>
-<rect x="32" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 149 in ternary Group 3</title></rect>
-<rect x="16" y="464" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 150 in ternary Group 4</title></rect>
-<rect x="16" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 151 in ternary Group 4</title></rect>
-<rect x="24" y="464" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 152 in ternary Group 4</title></rect>
-<rect x="24" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 153 in ternary Group 4</title></rect>
-<rect x="32" y="464" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 154 in ternary Group 4</title></rect>
-<rect x="48" y="480" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 155 in ternary Group 2</title></rect>
-<rect x="16" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 156 in ternary Group 5</title></rect>
-<rect x="16" y="496" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 157 in ternary Group 5</title></rect>
-<rect x="24" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 158 in ternary Group 5</title></rect>
-<rect x="24" y="496" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 159 in ternary Group 5</title></rect>
-<rect x="32" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 160 in ternary Group 5</title></rect>
-<rect x="16" y="512" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 161 in ternary Group 6</title></rect>
-<rect x="16" y="520" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 162 in ternary Group 6</title></rect>
-<rect x="24" y="512" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 163 in ternary Group 6</title></rect>
-<rect x="24" y="520" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 164 in ternary Group 6</title></rect>
-<rect x="32" y="512" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 165 in ternary Group 6</title></rect>
-<rect x="48" y="528" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 166 in ternary Group 3</title></rect>
-<rect x="16" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 167 in ternary Group 7</title></rect>
-<rect x="16" y="544" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 168 in ternary Group 7</title></rect>
-<rect x="24" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 169 in ternary Group 7</title></rect>
-<rect x="24" y="544" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 170 in ternary Group 7</title></rect>
-<rect x="32" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 171 in ternary Group 7</title></rect>
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Row: 4 Col: 0
- Unit Number: 4
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="496" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 5 Col: 0
- Unit Number: 5
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="472" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 6 Col: 0
- Unit Number: 6
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="448" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 7 Col: 0
- Unit Number: 7
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="424" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 8 Col: 0
- Unit Number: 8
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 9 Col: 0
- Unit Number: 9
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 10 Col: 0
- Unit Number: 10
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 11 Col: 0
- Unit Number: 11
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="616" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 0 Col: 1
- Unit Number: 12
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="592" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 1 Col: 1
- Unit Number: 13
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="568" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 2 Col: 1
- Unit Number: 14
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="544" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 3 Col: 1
- Unit Number: 15
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="520" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 4 Col: 1
- Unit Number: 16
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="496" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 5 Col: 1
- Unit Number: 17
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="472" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 6 Col: 1
- Unit Number: 18
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="448" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 7 Col: 1
- Unit Number: 19
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="424" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 8 Col: 1
- Unit Number: 20
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 9 Col: 1
- Unit Number: 21
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 10 Col: 1
- Unit Number: 22
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 11 Col: 1
- Unit Number: 23
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<text x="82" y="254" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Distr.</text>
-<rect x="80" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 0
- Group ID: 0
-</title></rect>
-<rect x="88" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 0
- Group ID: 1
-</title></rect>
-<rect x="96" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 0
- Group ID: 2
-</title></rect>
-<rect x="104" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 1
- Group ID: 0
-</title></rect>
-<rect x="112" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 1
- Group ID: 1
-</title></rect>
-<rect x="120" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 1
- Group ID: 2
-</title></rect>
-<text x="170" y="238" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Bits</text>
-<rect x="176" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 0</title></rect>
-<rect x="184" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 0</title></rect>
-<rect x="192" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 0</title></rect>
-<rect x="200" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 0</title></rect>
-<rect x="208" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 0</title></rect>
-<rect x="216" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 0</title></rect>
-<rect x="224" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 0</title></rect>
-<rect x="232" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 0</title></rect>
-<rect x="240" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 0</title></rect>
-<rect x="248" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 0</title></rect>
-<rect x="256" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 0</title></rect>
-<rect x="264" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 0</title></rect>
-<rect x="272" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 0</title></rect>
-<rect x="176" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 0</title></rect>
-<rect x="184" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 0</title></rect>
-<rect x="192" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 0</title></rect>
-<rect x="200" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 0</title></rect>
-<rect x="208" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 0</title></rect>
-<rect x="216" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 0</title></rect>
-<rect x="224" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 0</title></rect>
-<rect x="232" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 0</title></rect>
-<rect x="240" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 0</title></rect>
-<rect x="248" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 0</title></rect>
-<rect x="256" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 0</title></rect>
-<rect x="264" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 0</title></rect>
-<rect x="272" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 0</title></rect>
-<rect x="176" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 0</title></rect>
-<rect x="184" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 0</title></rect>
-<rect x="192" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 0</title></rect>
-<rect x="200" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 0</title></rect>
-<rect x="208" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 0</title></rect>
-<rect x="216" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 0</title></rect>
-<rect x="224" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 0</title></rect>
-<rect x="232" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 0</title></rect>
-<rect x="240" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 0</title></rect>
-<rect x="248" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 0</title></rect>
-<rect x="256" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 0</title></rect>
-<rect x="264" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 0</title></rect>
-<rect x="272" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 0</title></rect>
-<rect x="176" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 0</title></rect>
-<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Hash Bit 40 in hash match group 0
-Occupied by: _condition_3 for ('ig_intr_md_for_tm.copy_to_cpu', 0)</title></rect>
-<rect x="192" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Hash Bit 41 in hash match group 0
-Occupied by: _condition_0 for ('--validity_check--packet_out_hdr', 0)</title></rect>
-<rect x="200" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 0</title></rect>
-<rect x="208" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 0</title></rect>
-<rect x="216" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 0</title></rect>
-<rect x="224" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 0</title></rect>
-<rect x="232" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 0</title></rect>
-<rect x="240" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 0</title></rect>
-<rect x="248" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 0</title></rect>
-<rect x="256" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 0</title></rect>
-<rect x="264" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 0</title></rect>
-<rect x="272" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 0</title></rect>
-<rect x="296" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 1</title></rect>
-<rect x="304" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 1</title></rect>
-<rect x="312" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 1</title></rect>
-<rect x="320" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 1</title></rect>
-<rect x="328" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 1</title></rect>
-<rect x="336" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 1</title></rect>
-<rect x="344" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 1</title></rect>
-<rect x="352" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 1</title></rect>
-<rect x="360" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 1</title></rect>
-<rect x="368" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 1</title></rect>
-<rect x="376" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 1</title></rect>
-<rect x="384" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 1</title></rect>
-<rect x="392" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 1</title></rect>
-<rect x="296" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 1</title></rect>
-<rect x="304" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 1</title></rect>
-<rect x="312" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 1</title></rect>
-<rect x="320" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 1</title></rect>
-<rect x="328" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 1</title></rect>
-<rect x="336" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 1</title></rect>
-<rect x="344" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 1</title></rect>
-<rect x="352" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 1</title></rect>
-<rect x="360" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 1</title></rect>
-<rect x="368" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 1</title></rect>
-<rect x="376" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 1</title></rect>
-<rect x="384" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 1</title></rect>
-<rect x="392" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 1</title></rect>
-<rect x="296" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 1</title></rect>
-<rect x="304" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 1</title></rect>
-<rect x="312" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 1</title></rect>
-<rect x="320" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 1</title></rect>
-<rect x="328" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 1</title></rect>
-<rect x="336" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 1</title></rect>
-<rect x="344" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 1</title></rect>
-<rect x="352" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 1</title></rect>
-<rect x="360" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 1</title></rect>
-<rect x="368" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 1</title></rect>
-<rect x="376" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 1</title></rect>
-<rect x="384" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 1</title></rect>
-<rect x="392" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 1</title></rect>
-<rect x="296" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 1</title></rect>
-<rect x="304" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 1</title></rect>
-<rect x="312" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 1</title></rect>
-<rect x="320" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 1</title></rect>
-<rect x="328" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 1</title></rect>
-<rect x="336" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 1</title></rect>
-<rect x="344" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 1</title></rect>
-<rect x="352" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 1</title></rect>
-<rect x="360" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 1</title></rect>
-<rect x="368" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 1</title></rect>
-<rect x="376" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 1</title></rect>
-<rect x="384" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 1</title></rect>
-<rect x="392" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 1</title></rect>
-<rect x="176" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 2</title></rect>
-<rect x="184" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 2</title></rect>
-<rect x="192" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 2</title></rect>
-<rect x="200" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 2</title></rect>
-<rect x="208" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 2</title></rect>
-<rect x="216" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 2</title></rect>
-<rect x="224" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 2</title></rect>
-<rect x="232" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 2</title></rect>
-<rect x="240" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 2</title></rect>
-<rect x="248" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 2</title></rect>
-<rect x="256" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 2</title></rect>
-<rect x="264" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 2</title></rect>
-<rect x="272" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 2</title></rect>
-<rect x="176" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 2</title></rect>
-<rect x="184" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 2</title></rect>
-<rect x="192" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 2</title></rect>
-<rect x="200" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 2</title></rect>
-<rect x="208" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 2</title></rect>
-<rect x="216" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 2</title></rect>
-<rect x="224" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 2</title></rect>
-<rect x="232" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 2</title></rect>
-<rect x="240" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 2</title></rect>
-<rect x="248" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 2</title></rect>
-<rect x="256" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 2</title></rect>
-<rect x="264" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 2</title></rect>
-<rect x="272" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 2</title></rect>
-<rect x="176" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 2</title></rect>
-<rect x="184" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 2</title></rect>
-<rect x="192" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 2</title></rect>
-<rect x="200" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 2</title></rect>
-<rect x="208" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 2</title></rect>
-<rect x="216" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 2</title></rect>
-<rect x="224" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 2</title></rect>
-<rect x="232" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 2</title></rect>
-<rect x="240" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 2</title></rect>
-<rect x="248" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 2</title></rect>
-<rect x="256" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 2</title></rect>
-<rect x="264" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 2</title></rect>
-<rect x="272" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 2</title></rect>
-<rect x="176" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 2</title></rect>
-<rect x="184" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 2</title></rect>
-<rect x="192" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 2</title></rect>
-<rect x="200" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 2</title></rect>
-<rect x="208" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 2</title></rect>
-<rect x="216" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 2</title></rect>
-<rect x="224" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 2</title></rect>
-<rect x="232" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 2</title></rect>
-<rect x="240" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 2</title></rect>
-<rect x="248" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 2</title></rect>
-<rect x="256" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 2</title></rect>
-<rect x="264" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 2</title></rect>
-<rect x="272" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 2</title></rect>
-<rect x="296" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 3</title></rect>
-<rect x="304" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 3</title></rect>
-<rect x="312" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 3</title></rect>
-<rect x="320" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 3</title></rect>
-<rect x="328" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 3</title></rect>
-<rect x="336" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 3</title></rect>
-<rect x="344" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 3</title></rect>
-<rect x="352" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 3</title></rect>
-<rect x="360" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 3</title></rect>
-<rect x="368" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 3</title></rect>
-<rect x="376" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 3</title></rect>
-<rect x="384" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 3</title></rect>
-<rect x="392" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 3</title></rect>
-<rect x="296" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 3</title></rect>
-<rect x="304" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 3</title></rect>
-<rect x="312" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 3</title></rect>
-<rect x="320" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 3</title></rect>
-<rect x="328" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 3</title></rect>
-<rect x="336" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 3</title></rect>
-<rect x="344" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 3</title></rect>
-<rect x="352" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 3</title></rect>
-<rect x="360" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 3</title></rect>
-<rect x="368" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 3</title></rect>
-<rect x="376" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 3</title></rect>
-<rect x="384" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 3</title></rect>
-<rect x="392" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 3</title></rect>
-<rect x="296" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 3</title></rect>
-<rect x="304" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 3</title></rect>
-<rect x="312" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 3</title></rect>
-<rect x="320" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 3</title></rect>
-<rect x="328" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 3</title></rect>
-<rect x="336" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 3</title></rect>
-<rect x="344" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 3</title></rect>
-<rect x="352" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 3</title></rect>
-<rect x="360" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 3</title></rect>
-<rect x="368" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 3</title></rect>
-<rect x="376" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 3</title></rect>
-<rect x="384" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 3</title></rect>
-<rect x="392" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 3</title></rect>
-<rect x="296" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 3</title></rect>
-<rect x="304" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 3</title></rect>
-<rect x="312" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 3</title></rect>
-<rect x="320" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 3</title></rect>
-<rect x="328" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 3</title></rect>
-<rect x="336" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 3</title></rect>
-<rect x="344" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 3</title></rect>
-<rect x="352" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 3</title></rect>
-<rect x="360" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 3</title></rect>
-<rect x="368" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 3</title></rect>
-<rect x="376" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 3</title></rect>
-<rect x="384" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 3</title></rect>
-<rect x="392" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 3</title></rect>
-<rect x="176" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 4</title></rect>
-<rect x="184" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 4</title></rect>
-<rect x="192" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 4</title></rect>
-<rect x="200" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 4</title></rect>
-<rect x="208" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 4</title></rect>
-<rect x="216" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 4</title></rect>
-<rect x="224" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 4</title></rect>
-<rect x="232" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 4</title></rect>
-<rect x="240" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 4</title></rect>
-<rect x="248" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 4</title></rect>
-<rect x="256" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 4</title></rect>
-<rect x="264" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 4</title></rect>
-<rect x="272" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 4</title></rect>
-<rect x="176" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 4</title></rect>
-<rect x="184" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 4</title></rect>
-<rect x="192" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 4</title></rect>
-<rect x="200" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 4</title></rect>
-<rect x="208" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 4</title></rect>
-<rect x="216" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 4</title></rect>
-<rect x="224" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 4</title></rect>
-<rect x="232" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 4</title></rect>
-<rect x="240" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 4</title></rect>
-<rect x="248" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 4</title></rect>
-<rect x="256" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 4</title></rect>
-<rect x="264" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 4</title></rect>
-<rect x="272" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 4</title></rect>
-<rect x="176" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 4</title></rect>
-<rect x="184" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 4</title></rect>
-<rect x="192" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 4</title></rect>
-<rect x="200" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 4</title></rect>
-<rect x="208" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 4</title></rect>
-<rect x="216" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 4</title></rect>
-<rect x="224" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 4</title></rect>
-<rect x="232" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 4</title></rect>
-<rect x="240" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 4</title></rect>
-<rect x="248" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 4</title></rect>
-<rect x="256" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 4</title></rect>
-<rect x="264" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 4</title></rect>
-<rect x="272" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 4</title></rect>
-<rect x="176" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 4</title></rect>
-<rect x="184" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 4</title></rect>
-<rect x="192" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 4</title></rect>
-<rect x="200" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 4</title></rect>
-<rect x="208" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 4</title></rect>
-<rect x="216" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 4</title></rect>
-<rect x="224" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 4</title></rect>
-<rect x="232" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 4</title></rect>
-<rect x="240" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 4</title></rect>
-<rect x="248" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 4</title></rect>
-<rect x="256" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 4</title></rect>
-<rect x="264" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 4</title></rect>
-<rect x="272" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 4</title></rect>
-<rect x="296" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 5</title></rect>
-<rect x="304" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 5</title></rect>
-<rect x="312" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 5</title></rect>
-<rect x="320" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 5</title></rect>
-<rect x="328" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 5</title></rect>
-<rect x="336" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 5</title></rect>
-<rect x="344" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 5</title></rect>
-<rect x="352" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 5</title></rect>
-<rect x="360" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 5</title></rect>
-<rect x="368" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 5</title></rect>
-<rect x="376" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 5</title></rect>
-<rect x="384" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 5</title></rect>
-<rect x="392" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 5</title></rect>
-<rect x="296" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 5</title></rect>
-<rect x="304" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 5</title></rect>
-<rect x="312" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 5</title></rect>
-<rect x="320" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 5</title></rect>
-<rect x="328" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 5</title></rect>
-<rect x="336" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 5</title></rect>
-<rect x="344" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 5</title></rect>
-<rect x="352" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 5</title></rect>
-<rect x="360" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 5</title></rect>
-<rect x="368" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 5</title></rect>
-<rect x="376" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 5</title></rect>
-<rect x="384" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 5</title></rect>
-<rect x="392" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 5</title></rect>
-<rect x="296" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 5</title></rect>
-<rect x="304" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 5</title></rect>
-<rect x="312" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 5</title></rect>
-<rect x="320" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 5</title></rect>
-<rect x="328" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 5</title></rect>
-<rect x="336" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 5</title></rect>
-<rect x="344" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 5</title></rect>
-<rect x="352" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 5</title></rect>
-<rect x="360" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 5</title></rect>
-<rect x="368" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 5</title></rect>
-<rect x="376" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 5</title></rect>
-<rect x="384" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 5</title></rect>
-<rect x="392" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 5</title></rect>
-<rect x="296" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 5</title></rect>
-<rect x="304" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 5</title></rect>
-<rect x="312" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 5</title></rect>
-<rect x="320" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 5</title></rect>
-<rect x="328" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 5</title></rect>
-<rect x="336" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 5</title></rect>
-<rect x="344" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 5</title></rect>
-<rect x="352" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 5</title></rect>
-<rect x="360" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 5</title></rect>
-<rect x="368" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 5</title></rect>
-<rect x="376" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 5</title></rect>
-<rect x="384" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 5</title></rect>
-<rect x="392" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 5</title></rect>
-<rect x="176" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 6</title></rect>
-<rect x="184" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 6</title></rect>
-<rect x="192" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 6</title></rect>
-<rect x="200" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 6</title></rect>
-<rect x="208" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 6</title></rect>
-<rect x="216" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 6</title></rect>
-<rect x="224" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 6</title></rect>
-<rect x="232" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 6</title></rect>
-<rect x="240" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 6</title></rect>
-<rect x="248" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 6</title></rect>
-<rect x="256" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 6</title></rect>
-<rect x="264" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 6</title></rect>
-<rect x="272" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 6</title></rect>
-<rect x="176" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 6</title></rect>
-<rect x="184" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 6</title></rect>
-<rect x="192" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 6</title></rect>
-<rect x="200" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 6</title></rect>
-<rect x="208" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 6</title></rect>
-<rect x="216" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 6</title></rect>
-<rect x="224" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 6</title></rect>
-<rect x="232" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 6</title></rect>
-<rect x="240" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 6</title></rect>
-<rect x="248" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 6</title></rect>
-<rect x="256" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 6</title></rect>
-<rect x="264" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 6</title></rect>
-<rect x="272" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 6</title></rect>
-<rect x="176" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 6</title></rect>
-<rect x="184" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 6</title></rect>
-<rect x="192" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 6</title></rect>
-<rect x="200" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 6</title></rect>
-<rect x="208" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 6</title></rect>
-<rect x="216" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 6</title></rect>
-<rect x="224" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 6</title></rect>
-<rect x="232" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 6</title></rect>
-<rect x="240" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 6</title></rect>
-<rect x="248" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 6</title></rect>
-<rect x="256" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 6</title></rect>
-<rect x="264" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 6</title></rect>
-<rect x="272" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 6</title></rect>
-<rect x="176" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 6</title></rect>
-<rect x="184" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 6</title></rect>
-<rect x="192" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 6</title></rect>
-<rect x="200" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 6</title></rect>
-<rect x="208" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 6</title></rect>
-<rect x="216" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 6</title></rect>
-<rect x="224" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 6</title></rect>
-<rect x="232" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 6</title></rect>
-<rect x="240" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 6</title></rect>
-<rect x="248" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 6</title></rect>
-<rect x="256" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 6</title></rect>
-<rect x="264" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 6</title></rect>
-<rect x="272" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 6</title></rect>
-<rect x="296" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 7</title></rect>
-<rect x="304" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 7</title></rect>
-<rect x="312" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 7</title></rect>
-<rect x="320" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 7</title></rect>
-<rect x="328" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 7</title></rect>
-<rect x="336" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 7</title></rect>
-<rect x="344" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 7</title></rect>
-<rect x="352" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 7</title></rect>
-<rect x="360" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 7</title></rect>
-<rect x="368" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 7</title></rect>
-<rect x="376" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 7</title></rect>
-<rect x="384" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 7</title></rect>
-<rect x="392" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 7</title></rect>
-<rect x="296" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 7</title></rect>
-<rect x="304" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 7</title></rect>
-<rect x="312" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 7</title></rect>
-<rect x="320" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 7</title></rect>
-<rect x="328" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 7</title></rect>
-<rect x="336" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 7</title></rect>
-<rect x="344" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 7</title></rect>
-<rect x="352" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 7</title></rect>
-<rect x="360" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 7</title></rect>
-<rect x="368" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 7</title></rect>
-<rect x="376" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 7</title></rect>
-<rect x="384" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 7</title></rect>
-<rect x="392" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 7</title></rect>
-<rect x="296" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 7</title></rect>
-<rect x="304" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 7</title></rect>
-<rect x="312" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 7</title></rect>
-<rect x="320" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 7</title></rect>
-<rect x="328" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 7</title></rect>
-<rect x="336" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 7</title></rect>
-<rect x="344" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 7</title></rect>
-<rect x="352" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 7</title></rect>
-<rect x="360" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 7</title></rect>
-<rect x="368" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 7</title></rect>
-<rect x="376" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 7</title></rect>
-<rect x="384" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 7</title></rect>
-<rect x="392" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 7</title></rect>
-<rect x="296" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 7</title></rect>
-<rect x="304" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 7</title></rect>
-<rect x="312" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 7</title></rect>
-<rect x="320" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 7</title></rect>
-<rect x="328" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 7</title></rect>
-<rect x="336" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 7</title></rect>
-<rect x="344" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 7</title></rect>
-<rect x="352" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 7</title></rect>
-<rect x="360" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 7</title></rect>
-<rect x="368" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 7</title></rect>
-<rect x="376" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 7</title></rect>
-<rect x="384" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 7</title></rect>
-<rect x="392" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 7</title></rect>
-<text x="66" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Gateways</text>
-<rect x="72" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 0
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 1
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 2
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 3
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 4
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 5
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 6
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 7
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 8
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 9
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 10
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 11
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 12
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 13
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Gateway Table Gateway:
- Unit: 14
- Entry Bit Width: 44
- Depth: 4
- Occupied By: _condition_0</title></rect>
-<rect x="72" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Gateway Table Gateway:
- Unit: 15
- Entry Bit Width: 44
- Depth: 4
- Occupied By: _condition_3</title></rect>
-<text x="242" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Stashes</text>
-<rect x="248" y="208" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 0
- Unit ID: 0
- Global ID: 0
-</title></rect>
-<rect x="248" y="200" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 0
- Unit ID: 1
- Global ID: 1
-</title></rect>
-<rect x="248" y="184" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 1
- Unit ID: 0
- Global ID: 2
-</title></rect>
-<rect x="248" y="176" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 1
- Unit ID: 1
- Global ID: 3
-</title></rect>
-<rect x="248" y="160" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 2
- Unit ID: 0
- Global ID: 4
-</title></rect>
-<rect x="248" y="152" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 2
- Unit ID: 1
- Global ID: 5
-</title></rect>
-<rect x="248" y="136" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 3
- Unit ID: 0
- Global ID: 6
-</title></rect>
-<rect x="248" y="128" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 3
- Unit ID: 1
- Global ID: 7
-</title></rect>
-<rect x="248" y="112" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 4
- Unit ID: 0
- Global ID: 8
-</title></rect>
-<rect x="248" y="104" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 4
- Unit ID: 1
- Global ID: 9
-</title></rect>
-<rect x="248" y="88" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 5
- Unit ID: 0
- Global ID: 10
-</title></rect>
-<rect x="248" y="80" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 5
- Unit ID: 1
- Global ID: 11
-</title></rect>
-<rect x="248" y="64" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 6
- Unit ID: 0
- Global ID: 12
-</title></rect>
-<rect x="248" y="56" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 6
- Unit ID: 1
- Global ID: 13
-</title></rect>
-<rect x="248" y="40" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 7
- Unit ID: 0
- Global ID: 14
-</title></rect>
-<rect x="248" y="32" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 7
- Unit ID: 1
- Global ID: 15
-</title></rect>
-<text x="282" y="22" textLength="38" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Map RAMs</text>
-<rect x="280" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 0
- Unit Number: 0
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 1
- Unit Number: 1
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 2
- Unit Number: 2
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 3
- Unit Number: 3
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 4
- Unit Number: 4
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 5
- Unit Number: 5
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 0
- Unit Number: 6
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 1
- Unit Number: 7
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 2
- Unit Number: 8
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 3
- Unit Number: 9
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 4
- Unit Number: 10
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 5
- Unit Number: 11
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 0
- Unit Number: 12
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 1
- Unit Number: 13
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 2
- Unit Number: 14
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 3
- Unit Number: 15
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 4
- Unit Number: 16
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 5
- Unit Number: 17
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 0
- Unit Number: 18
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 1
- Unit Number: 19
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 2
- Unit Number: 20
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 3
- Unit Number: 21
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 4
- Unit Number: 22
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 5
- Unit Number: 23
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 0
- Unit Number: 24
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 1
- Unit Number: 25
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 2
- Unit Number: 26
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 3
- Unit Number: 27
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 4
- Unit Number: 28
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 5
- Unit Number: 29
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 5 Unit: 0
- Unit Number: 30
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 5 Unit: 1
- Unit Number: 31
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 5 Unit: 2
- Unit Number: 32
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 5 Unit: 3
- Unit Number: 33
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 5 Unit: 4
- Unit Number: 34
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 5 Unit: 5
- Unit Number: 35
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 6 Unit: 0
- Unit Number: 36
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 6 Unit: 1
- Unit Number: 37
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 6 Unit: 2
- Unit Number: 38
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 6 Unit: 3
- Unit Number: 39
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 6 Unit: 4
- Unit Number: 40
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 6 Unit: 5
- Unit Number: 41
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 7 Unit: 0
- Unit Number: 42
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 7 Unit: 1
- Unit Number: 43
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 7 Unit: 2
- Unit Number: 44
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 7 Unit: 3
- Unit Number: 45
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 7 Unit: 4
- Unit Number: 46
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 7 Unit: 5
- Unit Number: 47
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<text x="338" y="22" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">ALUs</text>
-<rect x="336" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
- Unit: 0 right</title></rect>
-<rect x="336" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
- Unit: 2 right</title></rect>
-<rect x="336" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
- Unit: 4 right</title></rect>
-<rect x="336" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
- Unit: 6 right</title></rect>
-<rect x="336" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
- Unit: 1 right</title></rect>
-<rect x="336" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
- Unit: 3 right</title></rect>
-<rect x="336" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
- Unit: 5 right</title></rect>
-<rect x="336" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
- Unit: 7 right</title></rect>
-<text x="514" y="222" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">VLIW</text>
-<rect x="512" y="232" width="16" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>VLIW Instruction:
- Number: 0
- Occupied By: Match Table ingress_pkt's action _packet_out
- with color 1 and direction ingress
-</title></rect>
-<rect x="528" y="232" width="16" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>VLIW Instruction:
- Number: 0
- Occupied By: Match Table egress_pkt's action add_packet_in_hdr
- with color 1 and direction egress
-</title></rect>
-<rect x="512" y="240" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 1</title></rect>
-<rect x="512" y="248" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 2</title></rect>
-<rect x="512" y="256" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 3</title></rect>
-<rect x="512" y="264" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 4</title></rect>
-<rect x="512" y="272" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 5</title></rect>
-<rect x="512" y="280" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 6</title></rect>
-<rect x="512" y="288" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 7</title></rect>
-<rect x="512" y="296" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 8</title></rect>
-<rect x="512" y="304" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 9</title></rect>
-<rect x="512" y="312" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 10</title></rect>
-<rect x="512" y="320" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 11</title></rect>
-<rect x="512" y="328" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 12</title></rect>
-<rect x="512" y="336" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 13</title></rect>
-<rect x="512" y="344" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 14</title></rect>
-<rect x="512" y="352" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 15</title></rect>
-<rect x="512" y="360" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 16</title></rect>
-<rect x="512" y="368" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 17</title></rect>
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- Byte Number: 122
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- Byte Number: 123
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- Byte Number: 124
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- Byte Number: 125
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- Byte Number: 126
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- Byte Number: 127
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- ID: 4
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- ID: 5
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- ID: 6
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- ID: 7
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- ID: 8
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-<rect x="256" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 9
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- ID: 10
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- ID: 11
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- ID: 12
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- ID: 13
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- ID: 14
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- ID: 15
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- Unit: 0</title></rect>
-<rect x="568" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 1</title></rect>
-<rect x="576" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 2</title></rect>
-<rect x="584" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 3</title></rect>
-<rect x="560" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 4</title></rect>
-<rect x="568" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 5</title></rect>
-<rect x="576" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 6</title></rect>
-<rect x="584" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 7</title></rect>
-<rect x="560" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 8</title></rect>
-<rect x="568" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 9</title></rect>
-<rect x="576" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 10</title></rect>
-<rect x="584" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 11</title></rect>
-<rect x="560" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 12</title></rect>
-<rect x="568" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 13</title></rect>
-<rect x="576" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 14</title></rect>
-<rect x="584" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 15</title></rect>
-<rect x="560" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 16</title></rect>
-<rect x="568" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 17</title></rect>
-<rect x="576" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 18</title></rect>
-<rect x="584" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 19</title></rect>
-<rect x="560" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 20</title></rect>
-<rect x="568" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 21</title></rect>
-<rect x="576" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 22</title></rect>
-<rect x="584" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 23</title></rect>
-<rect x="560" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 24</title></rect>
-<rect x="568" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 25</title></rect>
-<rect x="576" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 26</title></rect>
-<rect x="584" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 27</title></rect>
-<rect x="560" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 28</title></rect>
-<rect x="568" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 29</title></rect>
-<rect x="576" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 30</title></rect>
-<rect x="584" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 31</title></rect>
-<rect x="560" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 32</title></rect>
-<rect x="568" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 33</title></rect>
-<rect x="576" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 34</title></rect>
-<rect x="584" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 35</title></rect>
-<rect x="560" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 36</title></rect>
-<rect x="568" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 37</title></rect>
-<rect x="576" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 38</title></rect>
-<rect x="584" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 39</title></rect>
-<rect x="560" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 40</title></rect>
-<rect x="568" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 41</title></rect>
-<rect x="576" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 42</title></rect>
-<rect x="584" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 43</title></rect>
-<rect x="560" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 44</title></rect>
-<rect x="568" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 45</title></rect>
-<rect x="576" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 46</title></rect>
-<rect x="584" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 47</title></rect>
-<rect x="560" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 48</title></rect>
-<rect x="568" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 49</title></rect>
-<rect x="576" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 50</title></rect>
-<rect x="584" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 51</title></rect>
-<rect x="560" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 52</title></rect>
-<rect x="568" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 53</title></rect>
-<rect x="576" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 54</title></rect>
-<rect x="584" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 55</title></rect>
-<rect x="560" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 56</title></rect>
-<rect x="568" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 57</title></rect>
-<rect x="576" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 58</title></rect>
-<rect x="584" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 59</title></rect>
-<rect x="560" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 60</title></rect>
-<rect x="568" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 61</title></rect>
-<rect x="576" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 62</title></rect>
-<rect x="584" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 63</title></rect>
-<rect x="600" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 0</title></rect>
-<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 1</title></rect>
-<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>16-bit ALU:
- Unit: 2
- Occupied By:
-For Match Table ingress_pkt's action _packet_out:
- deposit-field Instruction at PHV Container Number: 130 has bit width 23
-</title></rect>
-<rect x="624" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 3</title></rect>
-<rect x="600" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 4</title></rect>
-<rect x="608" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 5</title></rect>
-<rect x="616" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 6</title></rect>
-<rect x="624" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 7</title></rect>
-<rect x="600" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 8</title></rect>
-<rect x="608" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 9</title></rect>
-<rect x="616" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 10</title></rect>
-<rect x="624" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 11</title></rect>
-<rect x="600" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 12</title></rect>
-<rect x="608" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 13</title></rect>
-<rect x="616" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 14</title></rect>
-<rect x="624" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 15</title></rect>
-<rect x="600" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 16</title></rect>
-<rect x="608" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>16-bit ALU:
- Unit: 17
- Occupied By:
-For Match Table egress_pkt's action add_packet_in_hdr:
- deposit-field Instruction at PHV Container Number: 145 has bit width 23
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- Unit: 18</title></rect>
-<rect x="624" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 19</title></rect>
-<rect x="600" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 20</title></rect>
-<rect x="608" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 21</title></rect>
-<rect x="616" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 22</title></rect>
-<rect x="624" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 23</title></rect>
-<rect x="600" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 24</title></rect>
-<rect x="608" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 25</title></rect>
-<rect x="616" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 26</title></rect>
-<rect x="624" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 27</title></rect>
-<rect x="600" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 28</title></rect>
-<rect x="608" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 29</title></rect>
-<rect x="616" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 30</title></rect>
-<rect x="624" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 31</title></rect>
-<rect x="600" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 32</title></rect>
-<rect x="608" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 33</title></rect>
-<rect x="616" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 34</title></rect>
-<rect x="624" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 35</title></rect>
-<rect x="600" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 36</title></rect>
-<rect x="608" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 37</title></rect>
-<rect x="616" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 38</title></rect>
-<rect x="624" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 39</title></rect>
-<rect x="600" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 40</title></rect>
-<rect x="608" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 41</title></rect>
-<rect x="616" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 42</title></rect>
-<rect x="624" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 43</title></rect>
-<rect x="600" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 44</title></rect>
-<rect x="608" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 45</title></rect>
-<rect x="616" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 46</title></rect>
-<rect x="624" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 47</title></rect>
-<rect x="600" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 48</title></rect>
-<rect x="608" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 49</title></rect>
-<rect x="616" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 50</title></rect>
-<rect x="624" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 51</title></rect>
-<rect x="600" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 52</title></rect>
-<rect x="608" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 53</title></rect>
-<rect x="616" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 54</title></rect>
-<rect x="624" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 55</title></rect>
-<rect x="600" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 56</title></rect>
-<rect x="608" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 57</title></rect>
-<rect x="616" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 58</title></rect>
-<rect x="624" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 59</title></rect>
-<rect x="600" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 60</title></rect>
-<rect x="608" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 61</title></rect>
-<rect x="616" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 62</title></rect>
-<rect x="624" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 63</title></rect>
-<rect x="600" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 64</title></rect>
-<rect x="608" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 65</title></rect>
-<rect x="616" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 66</title></rect>
-<rect x="624" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 67</title></rect>
-<rect x="600" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 68</title></rect>
-<rect x="608" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 69</title></rect>
-<rect x="616" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 70</title></rect>
-<rect x="624" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 71</title></rect>
-<rect x="600" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 72</title></rect>
-<rect x="608" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 73</title></rect>
-<rect x="616" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 74</title></rect>
-<rect x="624" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 75</title></rect>
-<rect x="600" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 76</title></rect>
-<rect x="608" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 77</title></rect>
-<rect x="616" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 78</title></rect>
-<rect x="624" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 79</title></rect>
-<rect x="600" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 80</title></rect>
-<rect x="608" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 81</title></rect>
-<rect x="616" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 82</title></rect>
-<rect x="624" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 83</title></rect>
-<rect x="600" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 84</title></rect>
-<rect x="608" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 85</title></rect>
-<rect x="616" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 86</title></rect>
-<rect x="624" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 87</title></rect>
-<rect x="600" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 88</title></rect>
-<rect x="608" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 89</title></rect>
-<rect x="616" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 90</title></rect>
-<rect x="624" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 91</title></rect>
-<rect x="600" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 92</title></rect>
-<rect x="608" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 93</title></rect>
-<rect x="616" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 94</title></rect>
-<rect x="624" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 95</title></rect>
-<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 0</title></rect>
-<rect x="648" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 1</title></rect>
-<rect x="656" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 2</title></rect>
-<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>8-bit ALU:
- Unit: 3
- Occupied By:
-For Match Table ingress_pkt's action _packet_out:
- deposit-field Instruction at PHV Container Number: 67 has bit width 20
-</title></rect>
-<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 4</title></rect>
-<rect x="648" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 5</title></rect>
-<rect x="656" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 6</title></rect>
-<rect x="664" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 7</title></rect>
-<rect x="640" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 8</title></rect>
-<rect x="648" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 9</title></rect>
-<rect x="656" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 10</title></rect>
-<rect x="664" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 11</title></rect>
-<rect x="640" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 12</title></rect>
-<rect x="648" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 13</title></rect>
-<rect x="656" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 14</title></rect>
-<rect x="664" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 15</title></rect>
-<rect x="640" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 16</title></rect>
-<rect x="648" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 17</title></rect>
-<rect x="656" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>8-bit ALU:
- Unit: 18
- Occupied By:
-For Match Table egress_pkt's action add_packet_in_hdr:
- deposit-field Instruction at PHV Container Number: 82 has bit width 20
-</title></rect>
-<rect x="664" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 19</title></rect>
-<rect x="640" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 20</title></rect>
-<rect x="648" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 21</title></rect>
-<rect x="656" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 22</title></rect>
-<rect x="664" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 23</title></rect>
-<rect x="640" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 24</title></rect>
-<rect x="648" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 25</title></rect>
-<rect x="656" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 26</title></rect>
-<rect x="664" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 27</title></rect>
-<rect x="640" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 28</title></rect>
-<rect x="648" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 29</title></rect>
-<rect x="656" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 30</title></rect>
-<rect x="664" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 31</title></rect>
-<rect x="640" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 32</title></rect>
-<rect x="648" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 33</title></rect>
-<rect x="656" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 34</title></rect>
-<rect x="664" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 35</title></rect>
-<rect x="640" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 36</title></rect>
-<rect x="648" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 37</title></rect>
-<rect x="656" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 38</title></rect>
-<rect x="664" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 39</title></rect>
-<rect x="640" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 40</title></rect>
-<rect x="648" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 41</title></rect>
-<rect x="656" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 42</title></rect>
-<rect x="664" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 43</title></rect>
-<rect x="640" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 44</title></rect>
-<rect x="648" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 45</title></rect>
-<rect x="656" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 46</title></rect>
-<rect x="664" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 47</title></rect>
-<rect x="640" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 48</title></rect>
-<rect x="648" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 49</title></rect>
-<rect x="656" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 50</title></rect>
-<rect x="664" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 51</title></rect>
-<rect x="640" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 52</title></rect>
-<rect x="648" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 53</title></rect>
-<rect x="656" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 54</title></rect>
-<rect x="664" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 55</title></rect>
-<rect x="640" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 56</title></rect>
-<rect x="648" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 57</title></rect>
-<rect x="656" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 58</title></rect>
-<rect x="664" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 59</title></rect>
-<rect x="640" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 60</title></rect>
-<rect x="648" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 61</title></rect>
-<rect x="656" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 62</title></rect>
-<rect x="664" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 63</title></rect>
-<text x="570" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
-<text x="738" y="78" style="fill:black; font-weight:bold;">Ingress Tables</text>
-<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>ingress_pkt</title></rect>
-<text x="738" y="102" style="fill:black;">ingress_pkt</text>
-<text x="738" y="126" style="fill:black; font-weight:bold;">Egress Tables</text>
-<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>egress_pkt</title></rect>
-<text x="738" y="150" style="fill:black;">egress_pkt</text>
-<rect x="720" y="168" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
-
-<line x1="720" y1="168" x2="736" y2="184" style="stroke:black; stroke-width:2" />
-<line x1="720" y1="184" x2="736" y2="168" style="stroke:black; stroke-width:2" />
-<text x="738" y="182" style="fill:black;">Unavailable</text>
-<rect x="704" y="24" width="240" height="184" style="stroke:black; stroke-width:1; fill:none""></rect>
-<rect x="712" y="32" width="224" height="168" style="stroke:black; stroke-width:1; fill:none""></rect>
-<text x="978" y="54" style="fill:black;">Totals</text>
-<text x="986" y="78" style="fill:black;">Exact Match Input xbar</text>
-<text x="994" y="102" style="fill:black;"> 2 of 128 (1.56%)</text>
-<text x="986" y="126" style="fill:black;">Ternary Match Input xbar</text>
-<text x="994" y="150" style="fill:black;"> 0 of 66 (0.00%)</text>
-<text x="986" y="174" style="fill:black;">Hash Bit</text>
-<text x="994" y="198" style="fill:black;"> 2 of 416 (0.48%)</text>
-<text x="986" y="222" style="fill:black;">Hash Dist Unit</text>
-<text x="994" y="246" style="fill:black;"> 0 of 6 (0.00%)</text>
-<text x="986" y="270" style="fill:black;">Gateway</text>
-<text x="994" y="294" style="fill:black;"> 2 of 16 (12.50%)</text>
-<text x="986" y="318" style="fill:black;">SRAM</text>
-<text x="994" y="342" style="fill:black;"> 0 of 80 (0.00%)</text>
-<text x="986" y="366" style="fill:black;">Map RAM</text>
-<text x="994" y="390" style="fill:black;"> 0 of 48 (0.00%)</text>
-<text x="986" y="414" style="fill:black;">TCAM</text>
-<text x="994" y="438" style="fill:black;"> 0 of 24 (0.00%)</text>
-<text x="986" y="462" style="fill:black;">VLIW Instr</text>
-<text x="994" y="486" style="fill:black;"> 1 of 32 (3.12%)</text>
-<text x="986" y="510" style="fill:black;">Meter ALU</text>
-<text x="994" y="534" style="fill:black;"> 0 of 4 (0.00%)</text>
-<text x="986" y="558" style="fill:black;">Stats ALU</text>
-<text x="994" y="582" style="fill:black;"> 0 of 4 (0.00%)</text>
-<text x="986" y="606" style="fill:black;">Stash</text>
-<text x="994" y="630" style="fill:black;"> 0 of 16 (0.00%)</text>
-<text x="986" y="654" style="fill:black;">Action Data Bus Bytes</text>
-<text x="994" y="678" style="fill:black;"> 0 of 128 (0.00%)</text>
-<text x="986" y="702" style="fill:black;">Logical TableID</text>
-<text x="994" y="726" style="fill:black;"> 2 of 16 (12.50%)</text>
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-<rect x="968" y="32" width="224" height="712" style="stroke:black; stroke-width:1; fill:none""></rect>
-<rect x="0" y="0" width="680" height="672" style="stroke:black; stroke-width:2; fill:none""></rect>
-</svg><br>
-
-<h2>MAU Stage 1</h2>
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-contains:
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-</title></rect>
<rect x="16" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 1 in exact Group 0 (parity group 0)</title></rect>
<rect x="16" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 2 in exact Group 0 (parity group 0)</title></rect>
<rect x="16" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 3 in exact Group 0 (parity group 0)</title></rect>
@@ -3372,68 +747,68 @@
<rect x="48" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 125 in exact Group 7 (parity group 15)</title></rect>
<rect x="48" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 126 in exact Group 7 (parity group 15)</title></rect>
<rect x="48" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 127 in exact Group 7 (parity group 15)</title></rect>
-<rect x="16" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 128 in ternary Group 0
+<rect x="16" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 128 in ternary Group 0
contains:
{ethernet.srcAddr[7:0]} for table table0
</title></rect>
-<rect x="16" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 129 in ternary Group 0
+<rect x="16" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 129 in ternary Group 0
contains:
{ethernet.srcAddr[15:8]} for table table0
</title></rect>
-<rect x="24" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 130 in ternary Group 0
+<rect x="24" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 130 in ternary Group 0
contains:
{ethernet.srcAddr[23:16]} for table table0
</title></rect>
-<rect x="24" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 131 in ternary Group 0
+<rect x="24" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 131 in ternary Group 0
contains:
{ethernet.srcAddr[31:24]} for table table0
</title></rect>
-<rect x="32" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 132 in ternary Group 0
+<rect x="32" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 132 in ternary Group 0
contains:
{ethernet.dstAddr[15:8]} for table table0
</title></rect>
-<rect x="48" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 133 in ternary Group 0
+<rect x="48" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 133 in ternary Group 0
contains:
version/valid
{unused[6:0], ig_intr_md.ingress_port[8:8]} for table table0
</title></rect>
-<rect x="16" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 134 in ternary Group 1
+<rect x="16" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 134 in ternary Group 1
contains:
{ethernet.dstAddr[31:24]} for table table0
</title></rect>
-<rect x="16" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 135 in ternary Group 1
+<rect x="16" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 135 in ternary Group 1
contains:
{ethernet.dstAddr[39:32]} for table table0
</title></rect>
-<rect x="24" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 136 in ternary Group 1
+<rect x="24" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 136 in ternary Group 1
contains:
{ethernet.etherType[7:0]} for table table0
</title></rect>
-<rect x="24" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 137 in ternary Group 1
+<rect x="24" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 137 in ternary Group 1
contains:
{ethernet.dstAddr[23:16]} for table table0
</title></rect>
-<rect x="32" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 138 in ternary Group 1
+<rect x="32" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 138 in ternary Group 1
contains:
{ethernet.srcAddr[47:40]} for table table0
</title></rect>
-<rect x="16" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 139 in ternary Group 2
+<rect x="16" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 139 in ternary Group 2
contains:
{ethernet.etherType[15:8]} for table table0
</title></rect>
-<rect x="16" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 140 in ternary Group 2
+<rect x="16" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 140 in ternary Group 2
contains:
{ig_intr_md.ingress_port[7:0]} for table table0
</title></rect>
-<rect x="24" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 141 in ternary Group 2
+<rect x="24" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 141 in ternary Group 2
contains:
{ethernet.dstAddr[7:0]} for table table0
</title></rect>
-<rect x="24" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 142 in ternary Group 2
+<rect x="24" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 142 in ternary Group 2
contains:
{ethernet.srcAddr[39:32]} for table table0
</title></rect>
-<rect x="32" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 143 in ternary Group 2
+<rect x="32" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 143 in ternary Group 2
contains:
{ethernet.dstAddr[47:40]} for table table0
</title></rect>
@@ -3489,7 +864,7 @@
<rect x="32" y="632" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 193 in ternary Group 11</title></rect>
<text x="146" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="14" heightAdjust="spacingAndGlyphs" style="fill:black;">SRAMs</text>
<text x="410" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="14" heightAdjust="spacingAndGlyphs" style="fill:black;">SRAMs</text>
-<rect x="144" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>SRAM:
+<rect x="144" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>SRAM:
Row: 0 Col: 2
Unit Number: 2
Entry Bit Width: 128
@@ -3700,7 +1075,7 @@
Unit Number: 66
Entry Bit Width: 128
Depth: 1024</title></rect>
-<rect x="360" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>SRAM:
+<rect x="360" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>SRAM:
Row: 6 Col: 6
Unit Number: 78
Entry Bit Width: 128
@@ -3763,7 +1138,7 @@
Unit Number: 67
Entry Bit Width: 128
Depth: 1024</title></rect>
-<rect x="384" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>SRAM:
+<rect x="384" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>SRAM:
Row: 6 Col: 7
Unit Number: 79
Entry Bit Width: 128
@@ -4083,7 +1458,7 @@
Entry Bit Width: 44
Result Bit width: 1
Depth: 512</title></rect>
-<rect x="120" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>TCAM:
+<rect x="120" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>TCAM:
Row: 9 Col: 1
Unit Number: 21
Entry Bit Width: 44
@@ -4096,7 +1471,7 @@
Entry bits [131:88]
Connected to buses:
Ram Data Bus TcamMatchSearch2 9 left_and_right is 44 bits</title></rect>
-<rect x="120" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>TCAM:
+<rect x="120" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>TCAM:
Row: 10 Col: 1
Unit Number: 22
Entry Bit Width: 44
@@ -4109,7 +1484,7 @@
Entry bits [87:44]
Connected to buses:
Ram Data Bus TcamMatchSearch2 10 left_and_right is 44 bits</title></rect>
-<rect x="120" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>TCAM:
+<rect x="120" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>TCAM:
Row: 11 Col: 1
Unit Number: 23
Entry Bit Width: 44
@@ -4188,8 +1563,8 @@
<rect x="264" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 0</title></rect>
<rect x="272" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 0</title></rect>
<rect x="176" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 0</title></rect>
-<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Hash Bit 40 in hash match group 0
-Occupied by: _condition_1 for ('--validity_check--packet_out_hdr', 0)</title></rect>
+<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Hash Bit 40 in hash match group 0
+Occupied by: _condition_0 for ('--validity_check--packet_out_hdr', 0)</title></rect>
<rect x="192" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 0</title></rect>
<rect x="200" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 0</title></rect>
<rect x="208" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 0</title></rect>
@@ -4622,15 +1997,16 @@
Unit: 13
Entry Bit Width: 44
Depth: 4</title></rect>
-<rect x="72" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+<rect x="72" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Gateway Table Gateway:
Unit: 14
Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Gateway Table Gateway:
+ Depth: 4
+ Occupied By: process_packet_out_table_always_true_condition</title></rect>
+<rect x="72" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Gateway Table Gateway:
Unit: 15
Entry Bit Width: 44
Depth: 4
- Occupied By: _condition_1</title></rect>
+ Occupied By: _condition_0</title></rect>
<text x="242" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Stashes</text>
<rect x="248" y="208" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
Row: 0
@@ -4893,7 +2269,7 @@
Unit Number: 35
Entry Bit Width: 11
Depth: 1024</title></rect>
-<rect x="280" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Map RAM:
+<rect x="280" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Map RAM:
Row: 6 Unit: 0
Unit Number: 36
Entry Bit Width: 11
@@ -4901,7 +2277,7 @@
Occupied By: table0_counter
Used For: synthetic two port
</title></rect>
-<rect x="288" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Map RAM:
+<rect x="288" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Map RAM:
Row: 6 Unit: 1
Unit Number: 37
Entry Bit Width: 11
@@ -4929,7 +2305,7 @@
Unit Number: 41
Entry Bit Width: 11
Depth: 1024</title></rect>
-<rect x="280" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Map RAM:
+<rect x="280" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Map RAM:
Row: 7 Unit: 0
Unit Number: 42
Entry Bit Width: 11
@@ -4971,7 +2347,7 @@
Unit: 2 right</title></rect>
<rect x="336" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
Unit: 4 right</title></rect>
-<rect x="336" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>128-bit Statistics ALU:
+<rect x="336" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>128-bit Statistics ALU:
Unit: 6 right
Occupied By: table0_counter</title></rect>
<rect x="336" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
@@ -4983,23 +2359,26 @@
<rect x="336" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
Unit: 7 right</title></rect>
<text x="514" y="222" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">VLIW</text>
-<rect x="512" y="232" width="32" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>VLIW Instruction:
+<rect x="512" y="232" width="32" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>VLIW Instruction:
Number: 0
Occupied By: Match Table table0's action set_egress_port
with color 1 and direction ingress
</title></rect>
-<rect x="512" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>VLIW Instruction:
+<rect x="512" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>VLIW Instruction:
Number: 1
Occupied By: Match Table table0's action send_to_cpu
with color 0 and direction ingress
</title></rect>
-<rect x="528" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>VLIW Instruction:
+<rect x="528" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>VLIW Instruction:
Number: 1
Occupied By: Match Table table0's action _drop
with color 1 and direction ingress
</title></rect>
-<rect x="512" y="248" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 2</title></rect>
+<rect x="512" y="248" width="32" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>VLIW Instruction:
+ Number: 2
+ Occupied By: Match Table process_packet_out_table's action _process_packet_out
+ with color 0 and direction ingress
+</title></rect>
<rect x="512" y="256" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
Number: 3</title></rect>
<rect x="512" y="264" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
@@ -5448,13 +2827,14 @@
Byte Number: 127
</title></rect>
<text x="202" y="590" textLength="78" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Logical Table IDs</text>
-<rect x="184" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Logical Table ID:
+<rect x="184" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Logical Table ID:
ID: 0
Occupied By: table0</title></rect>
-<rect x="192" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+<rect x="192" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Logical Table ID:
ID: 1
-</title></rect>
+
+ Occupied By: process_packet_out_table</title></rect>
<rect x="200" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
ID: 2
</title></rect>
@@ -5628,13 +3008,23 @@
Unit: 63</title></rect>
<rect x="600" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
Unit: 0</title></rect>
-<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 1</title></rect>
-<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>16-bit ALU:
+<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>16-bit ALU:
+ Unit: 1
+ Occupied By:
+For Match Table table0's action send_to_cpu:
+ deposit-field Instruction at PHV Container Number: 129 has bit width 23
+</title></rect>
+<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>16-bit ALU:
Unit: 2
Occupied By:
For Match Table table0's action set_egress_port:
deposit-field Instruction at PHV Container Number: 130 has bit width 23
+
+For Match Table table0's action send_to_cpu:
+ deposit-field Instruction at PHV Container Number: 130 has bit width 23
+
+For Match Table process_packet_out_table's action _process_packet_out:
+ deposit-field Instruction at PHV Container Number: 130 has bit width 23
</title></rect>
<rect x="624" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
Unit: 3</title></rect>
@@ -5822,24 +3212,27 @@
Unit: 94</title></rect>
<rect x="624" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
Unit: 95</title></rect>
-<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>8-bit ALU:
- Unit: 0
- Occupied By:
-For Match Table table0's action send_to_cpu:
- deposit-field Instruction at PHV Container Number: 64 has bit width 20
-</title></rect>
+<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 0</title></rect>
<rect x="648" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
Unit: 1</title></rect>
-<rect x="656" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 2</title></rect>
-<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 3</title></rect>
-<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>8-bit ALU:
- Unit: 4
+<rect x="656" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>8-bit ALU:
+ Unit: 2
+ Occupied By:
+For Match Table table0's action send_to_cpu:
+ deposit-field Instruction at PHV Container Number: 66 has bit width 20
+
+For Match Table process_packet_out_table's action _process_packet_out:
+ deposit-field Instruction at PHV Container Number: 66 has bit width 20
+</title></rect>
+<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>8-bit ALU:
+ Unit: 3
Occupied By:
For Match Table table0's action _drop:
- deposit-field Instruction at PHV Container Number: 68 has bit width 20
+ deposit-field Instruction at PHV Container Number: 67 has bit width 20
</title></rect>
+<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 4</title></rect>
<rect x="648" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
Unit: 5</title></rect>
<rect x="656" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
@@ -5962,12 +3355,13 @@
<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
-<text x="738" y="78" style="fill:black; font-weight:bold;">Ingress Tables</text>
-<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>table0</title></rect>
+<rect x="720" y="64" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>process_packet_out_table</title></rect>
+<text x="738" y="78" style="fill:black;">process_packet_out_table</text>
+<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>table0</title></rect>
<text x="738" y="102" style="fill:black;">table0</text>
<rect x="720" y="112" width="16" height="16" style="stroke:black; stroke-width:1; fill:burlywood""><title>table0__action__</title></rect>
<text x="738" y="126" style="fill:black;">table0__action__</text>
-<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>table0_counter</title></rect>
+<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>table0_counter</title></rect>
<text x="738" y="150" style="fill:black;">table0_counter</text>
<rect x="720" y="168" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
@@ -5986,7 +3380,7 @@
<text x="986" y="222" style="fill:black;">Hash Dist Unit</text>
<text x="994" y="246" style="fill:black;"> 0 of 6 (0.00%)</text>
<text x="986" y="270" style="fill:black;">Gateway</text>
-<text x="994" y="294" style="fill:black;"> 1 of 16 (6.25%)</text>
+<text x="994" y="294" style="fill:black;"> 2 of 16 (12.50%)</text>
<text x="986" y="318" style="fill:black;">SRAM</text>
<text x="994" y="342" style="fill:black;"> 3 of 80 (3.75%)</text>
<text x="986" y="366" style="fill:black;">Map RAM</text>
@@ -5994,7 +3388,7 @@
<text x="986" y="414" style="fill:black;">TCAM</text>
<text x="994" y="438" style="fill:black;"> 3 of 24 (12.50%)</text>
<text x="986" y="462" style="fill:black;">VLIW Instr</text>
-<text x="994" y="486" style="fill:black;"> 2 of 32 (6.25%)</text>
+<text x="994" y="486" style="fill:black;"> 3 of 32 (9.38%)</text>
<text x="986" y="510" style="fill:black;">Meter ALU</text>
<text x="994" y="534" style="fill:black;"> 0 of 4 (0.00%)</text>
<text x="986" y="558" style="fill:black;">Stats ALU</text>
@@ -6004,13 +3398,13 @@
<text x="986" y="654" style="fill:black;">Action Data Bus Bytes</text>
<text x="994" y="678" style="fill:black;"> 4 of 128 (3.12%)</text>
<text x="986" y="702" style="fill:black;">Logical TableID</text>
-<text x="994" y="726" style="fill:black;"> 1 of 16 (6.25%)</text>
+<text x="994" y="726" style="fill:black;"> 2 of 16 (12.50%)</text>
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<rect x="968" y="32" width="224" height="712" style="stroke:black; stroke-width:1; fill:none""></rect>
<rect x="0" y="0" width="680" height="672" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
-<h2>MAU Stage 2</h2>
+<h2>MAU Stage 1</h2>
<svg width="95%" height="95%" viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
<rect x="16" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:chartreuse""><title>Crossbar Byte 0 in exact Group 0 (parity group 0)
@@ -8690,22 +6084,21 @@
<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
-<text x="738" y="78" style="fill:black; font-weight:bold;">Ingress Tables</text>
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-<text x="738" y="102" style="fill:black;">egress_port_count_table</text>
-<rect x="720" y="112" width="16" height="16" style="stroke:black; stroke-width:1; fill:coral""><title>egress_port_counter</title></rect>
-<text x="738" y="126" style="fill:black;">egress_port_counter</text>
-<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:chartreuse""><title>ingress_port_count_table</title></rect>
-<text x="738" y="150" style="fill:black;">ingress_port_count_table</text>
-<rect x="720" y="160" width="16" height="16" style="stroke:black; stroke-width:1; fill:chocolate""><title>ingress_port_counter</title></rect>
-<text x="738" y="174" style="fill:black;">ingress_port_counter</text>
-<rect x="720" y="192" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
+<rect x="720" y="64" width="16" height="16" style="stroke:black; stroke-width:1; fill:crimson""><title>egress_port_count_table</title></rect>
+<text x="738" y="78" style="fill:black;">egress_port_count_table</text>
+<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:coral""><title>egress_port_counter</title></rect>
+<text x="738" y="102" style="fill:black;">egress_port_counter</text>
+<rect x="720" y="112" width="16" height="16" style="stroke:black; stroke-width:1; fill:chartreuse""><title>ingress_port_count_table</title></rect>
+<text x="738" y="126" style="fill:black;">ingress_port_count_table</text>
+<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:chocolate""><title>ingress_port_counter</title></rect>
+<text x="738" y="150" style="fill:black;">ingress_port_counter</text>
+<rect x="720" y="168" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
-<line x1="720" y1="192" x2="736" y2="208" style="stroke:black; stroke-width:2" />
-<line x1="720" y1="208" x2="736" y2="192" style="stroke:black; stroke-width:2" />
-<text x="738" y="206" style="fill:black;">Unavailable</text>
-<rect x="704" y="24" width="240" height="208" style="stroke:black; stroke-width:1; fill:none""></rect>
-<rect x="712" y="32" width="224" height="192" style="stroke:black; stroke-width:1; fill:none""></rect>
+<line x1="720" y1="168" x2="736" y2="184" style="stroke:black; stroke-width:2" />
+<line x1="720" y1="184" x2="736" y2="168" style="stroke:black; stroke-width:2" />
+<text x="738" y="182" style="fill:black;">Unavailable</text>
+<rect x="704" y="24" width="240" height="184" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="712" y="32" width="224" height="168" style="stroke:black; stroke-width:1; fill:none""></rect>
<text x="978" y="54" style="fill:black;">Totals</text>
<text x="986" y="78" style="fill:black;">Exact Match Input xbar</text>
<text x="994" y="102" style="fill:black;"> 2 of 128 (1.56%)</text>
@@ -8740,6 +6133,2589 @@
<rect x="0" y="0" width="680" height="672" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
+<h2>MAU Stage 2</h2>
+<svg width="95%" height="95%" viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
+<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
+<rect x="16" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 0 in exact Group 0 (parity group 0)</title></rect>
+<rect x="16" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 1 in exact Group 0 (parity group 0)</title></rect>
+<rect x="16" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 2 in exact Group 0 (parity group 0)</title></rect>
+<rect x="16" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 3 in exact Group 0 (parity group 0)</title></rect>
+<rect x="24" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 4 in exact Group 0 (parity group 0)</title></rect>
+<rect x="24" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 5 in exact Group 0 (parity group 0)</title></rect>
+<rect x="24" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 6 in exact Group 0 (parity group 0)</title></rect>
+<rect x="24" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 7 in exact Group 0 (parity group 0)</title></rect>
+<rect x="40" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 8 in exact Group 0 (parity group 1)</title></rect>
+<rect x="40" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 9 in exact Group 0 (parity group 1)</title></rect>
+<rect x="40" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 10 in exact Group 0 (parity group 1)</title></rect>
+<rect x="40" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 11 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 12 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 13 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 14 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 15 in exact Group 0 (parity group 1)</title></rect>
+<rect x="16" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 16 in exact Group 1 (parity group 2)</title></rect>
+<rect x="16" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 17 in exact Group 1 (parity group 2)</title></rect>
+<rect x="16" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 18 in exact Group 1 (parity group 2)</title></rect>
+<rect x="16" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 19 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 20 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 21 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 22 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 23 in exact Group 1 (parity group 2)</title></rect>
+<rect x="40" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 24 in exact Group 1 (parity group 3)</title></rect>
+<rect x="40" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 25 in exact Group 1 (parity group 3)</title></rect>
+<rect x="40" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 26 in exact Group 1 (parity group 3)</title></rect>
+<rect x="40" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 27 in exact Group 1 (parity group 3)</title></rect>
+<rect x="48" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 28 in exact Group 1 (parity group 3)</title></rect>
+<rect x="48" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 29 in exact Group 1 (parity group 3)</title></rect>
+<rect x="48" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 30 in exact Group 1 (parity group 3)</title></rect>
+<rect x="48" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 31 in exact Group 1 (parity group 3)</title></rect>
+<rect x="16" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 32 in exact Group 2 (parity group 4)</title></rect>
+<rect x="16" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 33 in exact Group 2 (parity group 4)</title></rect>
+<rect x="16" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 34 in exact Group 2 (parity group 4)</title></rect>
+<rect x="16" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 35 in exact Group 2 (parity group 4)</title></rect>
+<rect x="24" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 36 in exact Group 2 (parity group 4)</title></rect>
+<rect x="24" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 37 in exact Group 2 (parity group 4)</title></rect>
+<rect x="24" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 38 in exact Group 2 (parity group 4)</title></rect>
+<rect x="24" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 39 in exact Group 2 (parity group 4)</title></rect>
+<rect x="40" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 40 in exact Group 2 (parity group 5)</title></rect>
+<rect x="40" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 41 in exact Group 2 (parity group 5)</title></rect>
+<rect x="40" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 42 in exact Group 2 (parity group 5)</title></rect>
+<rect x="40" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 43 in exact Group 2 (parity group 5)</title></rect>
+<rect x="48" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 44 in exact Group 2 (parity group 5)</title></rect>
+<rect x="48" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 45 in exact Group 2 (parity group 5)</title></rect>
+<rect x="48" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 46 in exact Group 2 (parity group 5)</title></rect>
+<rect x="48" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 47 in exact Group 2 (parity group 5)</title></rect>
+<rect x="16" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 48 in exact Group 3 (parity group 6)</title></rect>
+<rect x="16" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 49 in exact Group 3 (parity group 6)</title></rect>
+<rect x="16" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 50 in exact Group 3 (parity group 6)</title></rect>
+<rect x="16" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 51 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 52 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 53 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 54 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 55 in exact Group 3 (parity group 6)</title></rect>
+<rect x="40" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 56 in exact Group 3 (parity group 7)</title></rect>
+<rect x="40" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 57 in exact Group 3 (parity group 7)</title></rect>
+<rect x="40" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 58 in exact Group 3 (parity group 7)</title></rect>
+<rect x="40" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 59 in exact Group 3 (parity group 7)</title></rect>
+<rect x="48" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 60 in exact Group 3 (parity group 7)</title></rect>
+<rect x="48" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 61 in exact Group 3 (parity group 7)</title></rect>
+<rect x="48" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 62 in exact Group 3 (parity group 7)</title></rect>
+<rect x="48" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 63 in exact Group 3 (parity group 7)</title></rect>
+<rect x="16" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 64 in exact Group 4 (parity group 8)</title></rect>
+<rect x="16" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 65 in exact Group 4 (parity group 8)</title></rect>
+<rect x="16" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 66 in exact Group 4 (parity group 8)</title></rect>
+<rect x="16" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 67 in exact Group 4 (parity group 8)</title></rect>
+<rect x="24" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 68 in exact Group 4 (parity group 8)</title></rect>
+<rect x="24" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 69 in exact Group 4 (parity group 8)</title></rect>
+<rect x="24" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 70 in exact Group 4 (parity group 8)</title></rect>
+<rect x="24" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 71 in exact Group 4 (parity group 8)</title></rect>
+<rect x="40" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 72 in exact Group 4 (parity group 9)</title></rect>
+<rect x="40" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 73 in exact Group 4 (parity group 9)</title></rect>
+<rect x="40" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 74 in exact Group 4 (parity group 9)</title></rect>
+<rect x="40" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 75 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 76 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 77 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 78 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 79 in exact Group 4 (parity group 9)</title></rect>
+<rect x="16" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 80 in exact Group 5 (parity group 10)</title></rect>
+<rect x="16" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 81 in exact Group 5 (parity group 10)</title></rect>
+<rect x="16" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 82 in exact Group 5 (parity group 10)</title></rect>
+<rect x="16" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 83 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 84 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 85 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 86 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 87 in exact Group 5 (parity group 10)</title></rect>
+<rect x="40" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 88 in exact Group 5 (parity group 11)</title></rect>
+<rect x="40" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 89 in exact Group 5 (parity group 11)</title></rect>
+<rect x="40" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 90 in exact Group 5 (parity group 11)</title></rect>
+<rect x="40" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 91 in exact Group 5 (parity group 11)</title></rect>
+<rect x="48" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 92 in exact Group 5 (parity group 11)</title></rect>
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+<rect x="48" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 94 in exact Group 5 (parity group 11)</title></rect>
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+ Unit Number: 2
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+ Group ID: 0
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+ Group ID: 0
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+ Group ID: 1
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+ Group ID: 2
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+<text x="170" y="238" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Bits</text>
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+<rect x="184" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 0</title></rect>
+<rect x="192" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 0</title></rect>
+<rect x="200" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 0</title></rect>
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+<rect x="216" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 0</title></rect>
+<rect x="224" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 0</title></rect>
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+<rect x="240" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 0</title></rect>
+<rect x="248" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 0</title></rect>
+<rect x="256" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 0</title></rect>
+<rect x="264" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 0</title></rect>
+<rect x="272" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 0</title></rect>
+<rect x="176" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 0</title></rect>
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+<rect x="192" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 0</title></rect>
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+<rect x="216" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 0</title></rect>
+<rect x="224" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 0</title></rect>
+<rect x="232" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 0</title></rect>
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+<rect x="248" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 0</title></rect>
+<rect x="256" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 0</title></rect>
+<rect x="264" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 0</title></rect>
+<rect x="272" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 0</title></rect>
+<rect x="176" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 0</title></rect>
+<rect x="184" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 0</title></rect>
+<rect x="192" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 0</title></rect>
+<rect x="200" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 0</title></rect>
+<rect x="208" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 0</title></rect>
+<rect x="216" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 0</title></rect>
+<rect x="224" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 0</title></rect>
+<rect x="232" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 0</title></rect>
+<rect x="240" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 0</title></rect>
+<rect x="248" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 0</title></rect>
+<rect x="256" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 0</title></rect>
+<rect x="264" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 0</title></rect>
+<rect x="272" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 0</title></rect>
+<rect x="176" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 0</title></rect>
+<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 0</title></rect>
+<rect x="192" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 0</title></rect>
+<rect x="200" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 0</title></rect>
+<rect x="208" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 0</title></rect>
+<rect x="216" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 0</title></rect>
+<rect x="224" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 0</title></rect>
+<rect x="232" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 0</title></rect>
+<rect x="240" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 0</title></rect>
+<rect x="248" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 0</title></rect>
+<rect x="256" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 0</title></rect>
+<rect x="264" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 0</title></rect>
+<rect x="272" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 0</title></rect>
+<rect x="296" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 1</title></rect>
+<rect x="304" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 1</title></rect>
+<rect x="312" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 1</title></rect>
+<rect x="320" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 1</title></rect>
+<rect x="328" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 1</title></rect>
+<rect x="336" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 1</title></rect>
+<rect x="344" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 1</title></rect>
+<rect x="352" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 1</title></rect>
+<rect x="360" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 1</title></rect>
+<rect x="368" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 1</title></rect>
+<rect x="376" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 1</title></rect>
+<rect x="384" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 1</title></rect>
+<rect x="392" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 1</title></rect>
+<rect x="296" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 1</title></rect>
+<rect x="304" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 1</title></rect>
+<rect x="312" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 1</title></rect>
+<rect x="320" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 1</title></rect>
+<rect x="328" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 1</title></rect>
+<rect x="336" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 1</title></rect>
+<rect x="344" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 1</title></rect>
+<rect x="352" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 1</title></rect>
+<rect x="360" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 1</title></rect>
+<rect x="368" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 1</title></rect>
+<rect x="376" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 1</title></rect>
+<rect x="384" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 1</title></rect>
+<rect x="392" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 1</title></rect>
+<rect x="296" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 1</title></rect>
+<rect x="304" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 1</title></rect>
+<rect x="312" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 1</title></rect>
+<rect x="320" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 1</title></rect>
+<rect x="328" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 1</title></rect>
+<rect x="336" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 1</title></rect>
+<rect x="344" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 1</title></rect>
+<rect x="352" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 1</title></rect>
+<rect x="360" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 1</title></rect>
+<rect x="368" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 1</title></rect>
+<rect x="376" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 1</title></rect>
+<rect x="384" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 1</title></rect>
+<rect x="392" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 1</title></rect>
+<rect x="296" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 1</title></rect>
+<rect x="304" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 1</title></rect>
+<rect x="312" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 1</title></rect>
+<rect x="320" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 1</title></rect>
+<rect x="328" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 1</title></rect>
+<rect x="336" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 1</title></rect>
+<rect x="344" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 1</title></rect>
+<rect x="352" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 1</title></rect>
+<rect x="360" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 1</title></rect>
+<rect x="368" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 1</title></rect>
+<rect x="376" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 1</title></rect>
+<rect x="384" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 1</title></rect>
+<rect x="392" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 1</title></rect>
+<rect x="176" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 2</title></rect>
+<rect x="184" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 2</title></rect>
+<rect x="192" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 2</title></rect>
+<rect x="200" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 2</title></rect>
+<rect x="208" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 2</title></rect>
+<rect x="216" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 2</title></rect>
+<rect x="224" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 2</title></rect>
+<rect x="232" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 2</title></rect>
+<rect x="240" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 2</title></rect>
+<rect x="248" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 2</title></rect>
+<rect x="256" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 2</title></rect>
+<rect x="264" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 2</title></rect>
+<rect x="272" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 2</title></rect>
+<rect x="176" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 2</title></rect>
+<rect x="184" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 2</title></rect>
+<rect x="192" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 2</title></rect>
+<rect x="200" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 2</title></rect>
+<rect x="208" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 2</title></rect>
+<rect x="216" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 2</title></rect>
+<rect x="224" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 2</title></rect>
+<rect x="232" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 2</title></rect>
+<rect x="240" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 2</title></rect>
+<rect x="248" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 2</title></rect>
+<rect x="256" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 2</title></rect>
+<rect x="264" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 2</title></rect>
+<rect x="272" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 2</title></rect>
+<rect x="176" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 2</title></rect>
+<rect x="184" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 2</title></rect>
+<rect x="192" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 2</title></rect>
+<rect x="200" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 2</title></rect>
+<rect x="208" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 2</title></rect>
+<rect x="216" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 2</title></rect>
+<rect x="224" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 2</title></rect>
+<rect x="232" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 2</title></rect>
+<rect x="240" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 2</title></rect>
+<rect x="248" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 2</title></rect>
+<rect x="256" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 2</title></rect>
+<rect x="264" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 2</title></rect>
+<rect x="272" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 2</title></rect>
+<rect x="176" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 2</title></rect>
+<rect x="184" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 2</title></rect>
+<rect x="192" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 2</title></rect>
+<rect x="200" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 2</title></rect>
+<rect x="208" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 2</title></rect>
+<rect x="216" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 2</title></rect>
+<rect x="224" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 2</title></rect>
+<rect x="232" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 2</title></rect>
+<rect x="240" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 2</title></rect>
+<rect x="248" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 2</title></rect>
+<rect x="256" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 2</title></rect>
+<rect x="264" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 2</title></rect>
+<rect x="272" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 2</title></rect>
+<rect x="296" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 3</title></rect>
+<rect x="304" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 3</title></rect>
+<rect x="312" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 3</title></rect>
+<rect x="320" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 3</title></rect>
+<rect x="328" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 3</title></rect>
+<rect x="336" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 3</title></rect>
+<rect x="344" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 3</title></rect>
+<rect x="352" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 3</title></rect>
+<rect x="360" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 3</title></rect>
+<rect x="368" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 3</title></rect>
+<rect x="376" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 3</title></rect>
+<rect x="384" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 3</title></rect>
+<rect x="392" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 3</title></rect>
+<rect x="296" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 3</title></rect>
+<rect x="304" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 3</title></rect>
+<rect x="312" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 3</title></rect>
+<rect x="320" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 3</title></rect>
+<rect x="328" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 3</title></rect>
+<rect x="336" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 3</title></rect>
+<rect x="344" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 3</title></rect>
+<rect x="352" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 3</title></rect>
+<rect x="360" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 3</title></rect>
+<rect x="368" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 3</title></rect>
+<rect x="376" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 3</title></rect>
+<rect x="384" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 3</title></rect>
+<rect x="392" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 3</title></rect>
+<rect x="296" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 3</title></rect>
+<rect x="304" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 3</title></rect>
+<rect x="312" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 3</title></rect>
+<rect x="320" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 3</title></rect>
+<rect x="328" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 3</title></rect>
+<rect x="336" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 3</title></rect>
+<rect x="344" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 3</title></rect>
+<rect x="352" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 3</title></rect>
+<rect x="360" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 3</title></rect>
+<rect x="368" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 3</title></rect>
+<rect x="376" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 3</title></rect>
+<rect x="384" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 3</title></rect>
+<rect x="392" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 3</title></rect>
+<rect x="296" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 3</title></rect>
+<rect x="304" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 3</title></rect>
+<rect x="312" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 3</title></rect>
+<rect x="320" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 3</title></rect>
+<rect x="328" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 3</title></rect>
+<rect x="336" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 3</title></rect>
+<rect x="344" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 3</title></rect>
+<rect x="352" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 3</title></rect>
+<rect x="360" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 3</title></rect>
+<rect x="368" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 3</title></rect>
+<rect x="376" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 3</title></rect>
+<rect x="384" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 3</title></rect>
+<rect x="392" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 3</title></rect>
+<rect x="176" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 4</title></rect>
+<rect x="184" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 4</title></rect>
+<rect x="192" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 4</title></rect>
+<rect x="200" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 4</title></rect>
+<rect x="208" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 4</title></rect>
+<rect x="216" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 4</title></rect>
+<rect x="224" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 4</title></rect>
+<rect x="232" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 4</title></rect>
+<rect x="240" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 4</title></rect>
+<rect x="248" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 4</title></rect>
+<rect x="256" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 4</title></rect>
+<rect x="264" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 4</title></rect>
+<rect x="272" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 4</title></rect>
+<rect x="176" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 4</title></rect>
+<rect x="184" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 4</title></rect>
+<rect x="192" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 4</title></rect>
+<rect x="200" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 4</title></rect>
+<rect x="208" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 4</title></rect>
+<rect x="216" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 4</title></rect>
+<rect x="224" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 4</title></rect>
+<rect x="232" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 4</title></rect>
+<rect x="240" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 4</title></rect>
+<rect x="248" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 4</title></rect>
+<rect x="256" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 4</title></rect>
+<rect x="264" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 4</title></rect>
+<rect x="272" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 4</title></rect>
+<rect x="176" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 4</title></rect>
+<rect x="184" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 4</title></rect>
+<rect x="192" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 4</title></rect>
+<rect x="200" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 4</title></rect>
+<rect x="208" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 4</title></rect>
+<rect x="216" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 4</title></rect>
+<rect x="224" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 4</title></rect>
+<rect x="232" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 4</title></rect>
+<rect x="240" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 4</title></rect>
+<rect x="248" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 4</title></rect>
+<rect x="256" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 4</title></rect>
+<rect x="264" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 4</title></rect>
+<rect x="272" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 4</title></rect>
+<rect x="176" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 4</title></rect>
+<rect x="184" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 4</title></rect>
+<rect x="192" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 4</title></rect>
+<rect x="200" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 4</title></rect>
+<rect x="208" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 4</title></rect>
+<rect x="216" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 4</title></rect>
+<rect x="224" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 4</title></rect>
+<rect x="232" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 4</title></rect>
+<rect x="240" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 4</title></rect>
+<rect x="248" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 4</title></rect>
+<rect x="256" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 4</title></rect>
+<rect x="264" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 4</title></rect>
+<rect x="272" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 4</title></rect>
+<rect x="296" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 5</title></rect>
+<rect x="304" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 5</title></rect>
+<rect x="312" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 5</title></rect>
+<rect x="320" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 5</title></rect>
+<rect x="328" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 5</title></rect>
+<rect x="336" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 5</title></rect>
+<rect x="344" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 5</title></rect>
+<rect x="352" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 5</title></rect>
+<rect x="360" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 5</title></rect>
+<rect x="368" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 5</title></rect>
+<rect x="376" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 5</title></rect>
+<rect x="384" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 5</title></rect>
+<rect x="392" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 5</title></rect>
+<rect x="296" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 5</title></rect>
+<rect x="304" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 5</title></rect>
+<rect x="312" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 5</title></rect>
+<rect x="320" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 5</title></rect>
+<rect x="328" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 5</title></rect>
+<rect x="336" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 5</title></rect>
+<rect x="344" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 5</title></rect>
+<rect x="352" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 5</title></rect>
+<rect x="360" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 5</title></rect>
+<rect x="368" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 5</title></rect>
+<rect x="376" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 5</title></rect>
+<rect x="384" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 5</title></rect>
+<rect x="392" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 5</title></rect>
+<rect x="296" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 5</title></rect>
+<rect x="304" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 5</title></rect>
+<rect x="312" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 5</title></rect>
+<rect x="320" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 5</title></rect>
+<rect x="328" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 5</title></rect>
+<rect x="336" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 5</title></rect>
+<rect x="344" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 5</title></rect>
+<rect x="352" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 5</title></rect>
+<rect x="360" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 5</title></rect>
+<rect x="368" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 5</title></rect>
+<rect x="376" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 5</title></rect>
+<rect x="384" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 5</title></rect>
+<rect x="392" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 5</title></rect>
+<rect x="296" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 5</title></rect>
+<rect x="304" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 5</title></rect>
+<rect x="312" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 5</title></rect>
+<rect x="320" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 5</title></rect>
+<rect x="328" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 5</title></rect>
+<rect x="336" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 5</title></rect>
+<rect x="344" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 5</title></rect>
+<rect x="352" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 5</title></rect>
+<rect x="360" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 5</title></rect>
+<rect x="368" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 5</title></rect>
+<rect x="376" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 5</title></rect>
+<rect x="384" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 5</title></rect>
+<rect x="392" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 5</title></rect>
+<rect x="176" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 6</title></rect>
+<rect x="184" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 6</title></rect>
+<rect x="192" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 6</title></rect>
+<rect x="200" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 6</title></rect>
+<rect x="208" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 6</title></rect>
+<rect x="216" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 6</title></rect>
+<rect x="224" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 6</title></rect>
+<rect x="232" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 6</title></rect>
+<rect x="240" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 6</title></rect>
+<rect x="248" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 6</title></rect>
+<rect x="256" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 6</title></rect>
+<rect x="264" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 6</title></rect>
+<rect x="272" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 6</title></rect>
+<rect x="176" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 6</title></rect>
+<rect x="184" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 6</title></rect>
+<rect x="192" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 6</title></rect>
+<rect x="200" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 6</title></rect>
+<rect x="208" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 6</title></rect>
+<rect x="216" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 6</title></rect>
+<rect x="224" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 6</title></rect>
+<rect x="232" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 6</title></rect>
+<rect x="240" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 6</title></rect>
+<rect x="248" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 6</title></rect>
+<rect x="256" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 6</title></rect>
+<rect x="264" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 6</title></rect>
+<rect x="272" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 6</title></rect>
+<rect x="176" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 6</title></rect>
+<rect x="184" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 6</title></rect>
+<rect x="192" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 6</title></rect>
+<rect x="200" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 6</title></rect>
+<rect x="208" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 6</title></rect>
+<rect x="216" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 6</title></rect>
+<rect x="224" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 6</title></rect>
+<rect x="232" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 6</title></rect>
+<rect x="240" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 6</title></rect>
+<rect x="248" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 6</title></rect>
+<rect x="256" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 6</title></rect>
+<rect x="264" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 6</title></rect>
+<rect x="272" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 6</title></rect>
+<rect x="176" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 6</title></rect>
+<rect x="184" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 6</title></rect>
+<rect x="192" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 6</title></rect>
+<rect x="200" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 6</title></rect>
+<rect x="208" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 6</title></rect>
+<rect x="216" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 6</title></rect>
+<rect x="224" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 6</title></rect>
+<rect x="232" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 6</title></rect>
+<rect x="240" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 6</title></rect>
+<rect x="248" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 6</title></rect>
+<rect x="256" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 6</title></rect>
+<rect x="264" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 6</title></rect>
+<rect x="272" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 6</title></rect>
+<rect x="296" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 7</title></rect>
+<rect x="304" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 7</title></rect>
+<rect x="312" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 7</title></rect>
+<rect x="320" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 7</title></rect>
+<rect x="328" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 7</title></rect>
+<rect x="336" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 7</title></rect>
+<rect x="344" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 7</title></rect>
+<rect x="352" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 7</title></rect>
+<rect x="360" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 7</title></rect>
+<rect x="368" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 7</title></rect>
+<rect x="376" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 7</title></rect>
+<rect x="384" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 7</title></rect>
+<rect x="392" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 7</title></rect>
+<rect x="296" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 7</title></rect>
+<rect x="304" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 7</title></rect>
+<rect x="312" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 7</title></rect>
+<rect x="320" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 7</title></rect>
+<rect x="328" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 7</title></rect>
+<rect x="336" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 7</title></rect>
+<rect x="344" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 7</title></rect>
+<rect x="352" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 7</title></rect>
+<rect x="360" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 7</title></rect>
+<rect x="368" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 7</title></rect>
+<rect x="376" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 7</title></rect>
+<rect x="384" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 7</title></rect>
+<rect x="392" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 7</title></rect>
+<rect x="296" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 7</title></rect>
+<rect x="304" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 7</title></rect>
+<rect x="312" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 7</title></rect>
+<rect x="320" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 7</title></rect>
+<rect x="328" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 7</title></rect>
+<rect x="336" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 7</title></rect>
+<rect x="344" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 7</title></rect>
+<rect x="352" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 7</title></rect>
+<rect x="360" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 7</title></rect>
+<rect x="368" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 7</title></rect>
+<rect x="376" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 7</title></rect>
+<rect x="384" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 7</title></rect>
+<rect x="392" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 7</title></rect>
+<rect x="296" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 7</title></rect>
+<rect x="304" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 7</title></rect>
+<rect x="312" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 7</title></rect>
+<rect x="320" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 7</title></rect>
+<rect x="328" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 7</title></rect>
+<rect x="336" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 7</title></rect>
+<rect x="344" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 7</title></rect>
+<rect x="352" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 7</title></rect>
+<rect x="360" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 7</title></rect>
+<rect x="368" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 7</title></rect>
+<rect x="376" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 7</title></rect>
+<rect x="384" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 7</title></rect>
+<rect x="392" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 7</title></rect>
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+<rect x="72" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 0
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 1
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 2
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 3
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 4
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 5
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 6
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 7
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 8
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 9
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 10
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 11
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 12
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 13
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 14
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 15
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
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+ Row: 0
+ Unit ID: 0
+ Global ID: 0
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+<rect x="248" y="200" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
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+ Global ID: 1
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+<rect x="248" y="184" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
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+ Unit ID: 0
+ Global ID: 2
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+<rect x="248" y="176" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
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+ Unit ID: 1
+ Global ID: 3
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+<rect x="248" y="160" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
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+ Unit ID: 0
+ Global ID: 4
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+ Unit ID: 1
+ Global ID: 5
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+<rect x="248" y="136" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
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+ Unit ID: 0
+ Global ID: 6
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+ Unit ID: 1
+ Global ID: 7
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+<rect x="248" y="112" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
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+ Unit ID: 0
+ Global ID: 8
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+<rect x="248" y="104" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
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+ Global ID: 9
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+<rect x="248" y="88" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
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+ Global ID: 10
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+ Unit ID: 1
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+ Global ID: 15
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+ Row: 0 Unit: 0
+ Unit Number: 0
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 1
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 2
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 3
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 4
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 5
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 0
+ Unit Number: 6
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 1
+ Unit Number: 7
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 2
+ Unit Number: 8
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 3
+ Unit Number: 9
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 4
+ Unit Number: 10
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 5
+ Unit Number: 11
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 0
+ Unit Number: 12
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 1
+ Unit Number: 13
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 2
+ Unit Number: 14
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 3
+ Unit Number: 15
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 4
+ Unit Number: 16
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+ Byte Number: 19
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+ Byte Number: 20
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+ Byte Number: 21
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+ Byte Number: 22
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+ Byte Number: 23
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+ Byte Number: 24
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+ Byte Number: 25
+</title></rect>
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+ Byte Number: 26
+</title></rect>
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+ Byte Number: 27
+</title></rect>
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+ Byte Number: 28
+</title></rect>
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+ Byte Number: 29
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+ Byte Number: 30
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+ Byte Number: 31
+</title></rect>
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+ Byte Number: 32
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+ Byte Number: 33
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+ Byte Number: 34
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+ Byte Number: 35
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+ Byte Number: 36
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+ Byte Number: 37
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+ Byte Number: 38
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+ Byte Number: 39
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+ Byte Number: 40
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+ Byte Number: 41
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+ Byte Number: 42
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+ Byte Number: 43
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+ Byte Number: 44
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+ Byte Number: 45
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+ Byte Number: 46
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+ Byte Number: 47
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+ Byte Number: 48
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+ Byte Number: 49
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+ Byte Number: 50
+</title></rect>
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+ Byte Number: 51
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+ Byte Number: 52
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+ Byte Number: 53
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+ Byte Number: 54
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+ Byte Number: 60
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+ Byte Number: 61
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+ Byte Number: 62
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+ Byte Number: 63
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+ Byte Number: 64
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+ Byte Number: 65
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+ Byte Number: 66
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+ Byte Number: 67
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+ Byte Number: 68
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+ Byte Number: 69
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+ Byte Number: 70
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+ Byte Number: 71
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+ Byte Number: 72
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+ Byte Number: 73
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+ Byte Number: 74
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+ Byte Number: 75
+</title></rect>
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+ Byte Number: 76
+</title></rect>
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+ Byte Number: 77
+</title></rect>
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+ Byte Number: 78
+</title></rect>
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+ Byte Number: 79
+</title></rect>
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+ Byte Number: 80
+</title></rect>
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+ Byte Number: 81
+</title></rect>
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+ Byte Number: 82
+</title></rect>
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+ Byte Number: 83
+</title></rect>
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+ Byte Number: 84
+</title></rect>
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+ Byte Number: 85
+</title></rect>
+<rect x="360" y="520" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 86
+</title></rect>
+<rect x="368" y="520" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 87
+</title></rect>
+<rect x="376" y="520" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 88
+</title></rect>
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+ Byte Number: 89
+</title></rect>
+<rect x="392" y="520" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 90
+</title></rect>
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+ Byte Number: 91
+</title></rect>
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+ Byte Number: 92
+</title></rect>
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+ Byte Number: 93
+</title></rect>
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+ Byte Number: 94
+</title></rect>
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+ Byte Number: 95
+</title></rect>
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+ Byte Number: 96
+</title></rect>
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+ Byte Number: 97
+</title></rect>
+<rect x="200" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 98
+</title></rect>
+<rect x="208" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 99
+</title></rect>
+<rect x="216" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 100
+</title></rect>
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+ Byte Number: 101
+</title></rect>
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+ Byte Number: 102
+</title></rect>
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+ Byte Number: 103
+</title></rect>
+<rect x="248" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 104
+</title></rect>
+<rect x="256" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 105
+</title></rect>
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+ Byte Number: 106
+</title></rect>
+<rect x="272" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 107
+</title></rect>
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+ Byte Number: 108
+</title></rect>
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+ Byte Number: 109
+</title></rect>
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+ Byte Number: 110
+</title></rect>
+<rect x="304" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 111
+</title></rect>
+<rect x="312" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 112
+</title></rect>
+<rect x="320" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 113
+</title></rect>
+<rect x="328" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 114
+</title></rect>
+<rect x="336" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 115
+</title></rect>
+<rect x="344" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 116
+</title></rect>
+<rect x="352" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 117
+</title></rect>
+<rect x="360" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 118
+</title></rect>
+<rect x="368" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 119
+</title></rect>
+<rect x="376" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 120
+</title></rect>
+<rect x="384" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 121
+</title></rect>
+<rect x="392" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 122
+</title></rect>
+<rect x="400" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 123
+</title></rect>
+<rect x="408" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 124
+</title></rect>
+<rect x="416" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 125
+</title></rect>
+<rect x="424" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 126
+</title></rect>
+<rect x="432" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 127
+</title></rect>
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+</title></rect>
+<rect x="192" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 1
+</title></rect>
+<rect x="200" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 2
+</title></rect>
+<rect x="208" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 3
+</title></rect>
+<rect x="216" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 4
+</title></rect>
+<rect x="224" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 5
+</title></rect>
+<rect x="232" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 6
+</title></rect>
+<rect x="240" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 7
+</title></rect>
+<rect x="248" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 8
+</title></rect>
+<rect x="256" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 9
+</title></rect>
+<rect x="264" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 10
+</title></rect>
+<rect x="272" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 11
+</title></rect>
+<rect x="280" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 12
+</title></rect>
+<rect x="288" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 13
+</title></rect>
+<rect x="296" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 14
+</title></rect>
+<rect x="304" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 15
+</title></rect>
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+<rect x="560" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 0</title></rect>
+<rect x="568" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 1</title></rect>
+<rect x="576" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 2</title></rect>
+<rect x="584" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 3</title></rect>
+<rect x="560" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 4</title></rect>
+<rect x="568" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 5</title></rect>
+<rect x="576" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 6</title></rect>
+<rect x="584" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 7</title></rect>
+<rect x="560" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 8</title></rect>
+<rect x="568" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 9</title></rect>
+<rect x="576" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 10</title></rect>
+<rect x="584" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 11</title></rect>
+<rect x="560" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 12</title></rect>
+<rect x="568" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 13</title></rect>
+<rect x="576" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 14</title></rect>
+<rect x="584" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 15</title></rect>
+<rect x="560" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 16</title></rect>
+<rect x="568" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 17</title></rect>
+<rect x="576" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 18</title></rect>
+<rect x="584" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 19</title></rect>
+<rect x="560" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 20</title></rect>
+<rect x="568" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 21</title></rect>
+<rect x="576" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 22</title></rect>
+<rect x="584" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 23</title></rect>
+<rect x="560" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 24</title></rect>
+<rect x="568" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 25</title></rect>
+<rect x="576" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 26</title></rect>
+<rect x="584" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 27</title></rect>
+<rect x="560" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 28</title></rect>
+<rect x="568" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 29</title></rect>
+<rect x="576" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 30</title></rect>
+<rect x="584" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 31</title></rect>
+<rect x="560" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 32</title></rect>
+<rect x="568" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 33</title></rect>
+<rect x="576" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 34</title></rect>
+<rect x="584" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 35</title></rect>
+<rect x="560" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 36</title></rect>
+<rect x="568" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 37</title></rect>
+<rect x="576" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 38</title></rect>
+<rect x="584" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 39</title></rect>
+<rect x="560" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 40</title></rect>
+<rect x="568" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 41</title></rect>
+<rect x="576" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 42</title></rect>
+<rect x="584" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 43</title></rect>
+<rect x="560" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 44</title></rect>
+<rect x="568" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 45</title></rect>
+<rect x="576" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 46</title></rect>
+<rect x="584" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 47</title></rect>
+<rect x="560" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 48</title></rect>
+<rect x="568" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 49</title></rect>
+<rect x="576" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 50</title></rect>
+<rect x="584" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 51</title></rect>
+<rect x="560" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 52</title></rect>
+<rect x="568" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 53</title></rect>
+<rect x="576" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 54</title></rect>
+<rect x="584" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 55</title></rect>
+<rect x="560" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 56</title></rect>
+<rect x="568" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 57</title></rect>
+<rect x="576" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 58</title></rect>
+<rect x="584" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 59</title></rect>
+<rect x="560" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 60</title></rect>
+<rect x="568" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 61</title></rect>
+<rect x="576" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 62</title></rect>
+<rect x="584" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 63</title></rect>
+<rect x="600" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 0</title></rect>
+<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 1</title></rect>
+<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 2</title></rect>
+<rect x="624" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 3</title></rect>
+<rect x="600" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 4</title></rect>
+<rect x="608" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 5</title></rect>
+<rect x="616" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 6</title></rect>
+<rect x="624" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 7</title></rect>
+<rect x="600" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 8</title></rect>
+<rect x="608" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 9</title></rect>
+<rect x="616" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 10</title></rect>
+<rect x="624" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 11</title></rect>
+<rect x="600" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 12</title></rect>
+<rect x="608" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 13</title></rect>
+<rect x="616" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 14</title></rect>
+<rect x="624" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 15</title></rect>
+<rect x="600" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 16</title></rect>
+<rect x="608" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 17</title></rect>
+<rect x="616" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 18</title></rect>
+<rect x="624" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 19</title></rect>
+<rect x="600" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 20</title></rect>
+<rect x="608" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 21</title></rect>
+<rect x="616" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 22</title></rect>
+<rect x="624" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 23</title></rect>
+<rect x="600" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 24</title></rect>
+<rect x="608" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 25</title></rect>
+<rect x="616" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 26</title></rect>
+<rect x="624" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 27</title></rect>
+<rect x="600" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 28</title></rect>
+<rect x="608" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 29</title></rect>
+<rect x="616" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 30</title></rect>
+<rect x="624" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 31</title></rect>
+<rect x="600" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 32</title></rect>
+<rect x="608" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 33</title></rect>
+<rect x="616" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 34</title></rect>
+<rect x="624" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 35</title></rect>
+<rect x="600" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 36</title></rect>
+<rect x="608" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 37</title></rect>
+<rect x="616" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 38</title></rect>
+<rect x="624" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 39</title></rect>
+<rect x="600" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 40</title></rect>
+<rect x="608" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 41</title></rect>
+<rect x="616" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 42</title></rect>
+<rect x="624" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 43</title></rect>
+<rect x="600" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 44</title></rect>
+<rect x="608" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 45</title></rect>
+<rect x="616" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 46</title></rect>
+<rect x="624" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 47</title></rect>
+<rect x="600" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 48</title></rect>
+<rect x="608" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 49</title></rect>
+<rect x="616" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 50</title></rect>
+<rect x="624" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 51</title></rect>
+<rect x="600" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 52</title></rect>
+<rect x="608" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 53</title></rect>
+<rect x="616" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 54</title></rect>
+<rect x="624" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 55</title></rect>
+<rect x="600" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 56</title></rect>
+<rect x="608" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 57</title></rect>
+<rect x="616" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 58</title></rect>
+<rect x="624" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 59</title></rect>
+<rect x="600" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 60</title></rect>
+<rect x="608" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 61</title></rect>
+<rect x="616" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 62</title></rect>
+<rect x="624" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 63</title></rect>
+<rect x="600" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 64</title></rect>
+<rect x="608" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 65</title></rect>
+<rect x="616" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 66</title></rect>
+<rect x="624" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 67</title></rect>
+<rect x="600" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 68</title></rect>
+<rect x="608" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 69</title></rect>
+<rect x="616" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 70</title></rect>
+<rect x="624" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 71</title></rect>
+<rect x="600" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 72</title></rect>
+<rect x="608" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 73</title></rect>
+<rect x="616" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 74</title></rect>
+<rect x="624" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 75</title></rect>
+<rect x="600" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 76</title></rect>
+<rect x="608" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 77</title></rect>
+<rect x="616" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 78</title></rect>
+<rect x="624" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 79</title></rect>
+<rect x="600" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 80</title></rect>
+<rect x="608" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 81</title></rect>
+<rect x="616" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 82</title></rect>
+<rect x="624" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 83</title></rect>
+<rect x="600" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 84</title></rect>
+<rect x="608" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 85</title></rect>
+<rect x="616" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 86</title></rect>
+<rect x="624" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 87</title></rect>
+<rect x="600" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 88</title></rect>
+<rect x="608" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 89</title></rect>
+<rect x="616" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 90</title></rect>
+<rect x="624" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 91</title></rect>
+<rect x="600" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 92</title></rect>
+<rect x="608" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 93</title></rect>
+<rect x="616" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 94</title></rect>
+<rect x="624" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 95</title></rect>
+<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 0</title></rect>
+<rect x="648" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 1</title></rect>
+<rect x="656" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 2</title></rect>
+<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 3</title></rect>
+<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 4</title></rect>
+<rect x="648" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 5</title></rect>
+<rect x="656" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 6</title></rect>
+<rect x="664" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 7</title></rect>
+<rect x="640" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 8</title></rect>
+<rect x="648" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 9</title></rect>
+<rect x="656" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 10</title></rect>
+<rect x="664" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 11</title></rect>
+<rect x="640" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 12</title></rect>
+<rect x="648" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 13</title></rect>
+<rect x="656" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 14</title></rect>
+<rect x="664" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 15</title></rect>
+<rect x="640" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 16</title></rect>
+<rect x="648" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 17</title></rect>
+<rect x="656" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 18</title></rect>
+<rect x="664" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 19</title></rect>
+<rect x="640" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 20</title></rect>
+<rect x="648" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 21</title></rect>
+<rect x="656" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 22</title></rect>
+<rect x="664" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 23</title></rect>
+<rect x="640" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 24</title></rect>
+<rect x="648" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 25</title></rect>
+<rect x="656" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 26</title></rect>
+<rect x="664" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 27</title></rect>
+<rect x="640" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 28</title></rect>
+<rect x="648" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 29</title></rect>
+<rect x="656" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 30</title></rect>
+<rect x="664" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 31</title></rect>
+<rect x="640" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 32</title></rect>
+<rect x="648" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 33</title></rect>
+<rect x="656" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 34</title></rect>
+<rect x="664" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 35</title></rect>
+<rect x="640" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 36</title></rect>
+<rect x="648" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 37</title></rect>
+<rect x="656" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 38</title></rect>
+<rect x="664" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 39</title></rect>
+<rect x="640" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 40</title></rect>
+<rect x="648" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 41</title></rect>
+<rect x="656" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 42</title></rect>
+<rect x="664" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 43</title></rect>
+<rect x="640" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 44</title></rect>
+<rect x="648" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 45</title></rect>
+<rect x="656" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 46</title></rect>
+<rect x="664" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 47</title></rect>
+<rect x="640" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 48</title></rect>
+<rect x="648" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 49</title></rect>
+<rect x="656" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 50</title></rect>
+<rect x="664" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 51</title></rect>
+<rect x="640" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 52</title></rect>
+<rect x="648" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 53</title></rect>
+<rect x="656" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 54</title></rect>
+<rect x="664" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 55</title></rect>
+<rect x="640" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 56</title></rect>
+<rect x="648" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 57</title></rect>
+<rect x="656" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 58</title></rect>
+<rect x="664" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 59</title></rect>
+<rect x="640" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 60</title></rect>
+<rect x="648" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 61</title></rect>
+<rect x="656" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 62</title></rect>
+<rect x="664" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 63</title></rect>
+<text x="570" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
+<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
+<rect x="720" y="72" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
+
+<line x1="720" y1="72" x2="736" y2="88" style="stroke:black; stroke-width:2" />
+<line x1="720" y1="88" x2="736" y2="72" style="stroke:black; stroke-width:2" />
+<text x="738" y="86" style="fill:black;">Unavailable</text>
+<rect x="704" y="24" width="240" height="88" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="712" y="32" width="224" height="72" style="stroke:black; stroke-width:1; fill:none""></rect>
+<text x="978" y="54" style="fill:black;">Totals</text>
+<text x="986" y="78" style="fill:black;">Exact Match Input xbar</text>
+<text x="994" y="102" style="fill:black;"> 0 of 128 (0.00%)</text>
+<text x="986" y="126" style="fill:black;">Ternary Match Input xbar</text>
+<text x="994" y="150" style="fill:black;"> 0 of 66 (0.00%)</text>
+<text x="986" y="174" style="fill:black;">Hash Bit</text>
+<text x="994" y="198" style="fill:black;"> 0 of 416 (0.00%)</text>
+<text x="986" y="222" style="fill:black;">Hash Dist Unit</text>
+<text x="994" y="246" style="fill:black;"> 0 of 6 (0.00%)</text>
+<text x="986" y="270" style="fill:black;">Gateway</text>
+<text x="994" y="294" style="fill:black;"> 0 of 16 (0.00%)</text>
+<text x="986" y="318" style="fill:black;">SRAM</text>
+<text x="994" y="342" style="fill:black;"> 0 of 80 (0.00%)</text>
+<text x="986" y="366" style="fill:black;">Map RAM</text>
+<text x="994" y="390" style="fill:black;"> 0 of 48 (0.00%)</text>
+<text x="986" y="414" style="fill:black;">TCAM</text>
+<text x="994" y="438" style="fill:black;"> 0 of 24 (0.00%)</text>
+<text x="986" y="462" style="fill:black;">VLIW Instr</text>
+<text x="994" y="486" style="fill:black;"> 0 of 32 (0.00%)</text>
+<text x="986" y="510" style="fill:black;">Meter ALU</text>
+<text x="994" y="534" style="fill:black;"> 0 of 4 (0.00%)</text>
+<text x="986" y="558" style="fill:black;">Stats ALU</text>
+<text x="994" y="582" style="fill:black;"> 0 of 4 (0.00%)</text>
+<text x="986" y="606" style="fill:black;">Stash</text>
+<text x="994" y="630" style="fill:black;"> 0 of 16 (0.00%)</text>
+<text x="986" y="654" style="fill:black;">Action Data Bus Bytes</text>
+<text x="994" y="678" style="fill:black;"> 0 of 128 (0.00%)</text>
+<text x="986" y="702" style="fill:black;">Logical TableID</text>
+<text x="994" y="726" style="fill:black;"> 0 of 16 (0.00%)</text>
+<rect x="960" y="24" width="240" height="728" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="968" y="32" width="224" height="712" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="0" y="0" width="680" height="672" style="stroke:black; stroke-width:2; fill:none""></rect>
+</svg><br>
+
<h2>MAU Stage 3</h2>
<svg width="95%" height="95%" viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
@@ -31988,7 +31964,7 @@
</svg><br>
-<br><i>Created on Thu Sep 7 13:56:21 2017</i>
+<br><i>Created on Fri Sep 8 08:23:58 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
</div>
</body>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/parser.egress.html b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/parser.egress.html
index b1dd85e..fbcf3a8 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/parser.egress.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/parser.egress.html
@@ -625,7 +625,7 @@
<tr><td id="row255" class="row_cell">
<a href="#row255">Row 255</a> <br><br>
-State <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start (from state <Shim start state>)<br />
+State <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start (from state <Shim start state>)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_255');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_255">Raw register data</a> <br><br><div id="reg_data_255" style="display: none;">
@@ -684,18 +684,18 @@
<tr>
<td><center>0</center></td>
<td><center>ff</center></td>
-<td><center>c</center></td>
+<td><center>9</center></td>
<td><center>7</center></td>
-<td><center>18</center></td>
+<td><center>15</center></td>
<td><center>0</center></td>
<td><center>3</center></td>
<td><center>1</center></td>
<td><center>1</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
-<td><center>a</center></td>
+<td><center>7</center></td>
<td><center>0</center></td>
-<td><center>19</center></td>
+<td><center>16</center></td>
</tr>
</table> <br>
Action: <table border=1>
@@ -772,7 +772,7 @@
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>90</center></td>
-<td><center>92</center></td>
+<td><center>1ff</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -781,13 +781,13 @@
<td><center>1ff</center></td>
<td><center>1ff</center></td>
<td><center>50</center></td>
-<td><center>51</center></td>
+<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>8</center></td>
+<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1ff</center></td>
@@ -822,8 +822,8 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
+<td><center>0</center></td>
<td><center>2</center></td>
-<td><center>7</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
</tr>
@@ -851,12 +851,6 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
<div class="tcam_arrow" style="width:54px; bottom: 0px;">16</div>
</td>
<td height=1 style="position: relative">
@@ -902,6 +896,12 @@
</td>
<td height=1 style="position: relative">
</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
<td height=40></td></tr><tr>
<td align=right><font size=-3>Bytes </font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
@@ -912,10 +912,10 @@
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>8</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>11</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>13</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>14</center></font></td>
@@ -926,9 +926,9 @@
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>19</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>20</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>21</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>22</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>23</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>24</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
@@ -939,18 +939,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">146</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">81</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">144</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -958,7 +947,16 @@
<div class="extr_arrow" style="width:27px; top: 0px;">80</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">144</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
</td>
@@ -1182,7 +1180,7 @@
<td><center>0</center></td>
<td><center>129</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>128</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -1413,7 +1411,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x8<br>
+PHV 81 <font size=+1>|=</font> 0x8<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -1984,7 +1982,7 @@
<td><center>0</center></td>
<td><center>12b</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>12a</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2213,7 +2211,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x10<br>
+PHV 81 <font size=+1>|=</font> 0x10<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -2381,7 +2379,7 @@
<td><center>0</center></td>
<td><center>12b</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>12a</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2606,7 +2604,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x20<br>
+PHV 81 <font size=+1>|=</font> 0x20<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3161,7 +3159,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -3383,7 +3381,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x2<br>
+PHV 81 <font size=+1>|=</font> 0x2<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3557,7 +3555,7 @@
<td><center>0</center></td>
<td><center>12d</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>12c</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -3785,7 +3783,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x4<br>
+PHV 81 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3963,7 +3961,7 @@
<td><center>0</center></td>
<td><center>12d</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>12c</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -4191,7 +4189,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x4<br>
+PHV 81 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -4214,7 +4212,7 @@
<tr><td id="row246" class="row_cell">
<a href="#row246">Row 246</a> <br><br>
-State parse_pkt_in (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
+State parse_pkt_in (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_246');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_246">Raw register data</a> <br><br><div id="reg_data_246" style="display: none;">
@@ -4360,7 +4358,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
-<td><center>91</center></td>
+<td><center>154</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
@@ -4369,7 +4367,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -4525,7 +4523,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">145</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">340</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -4591,7 +4589,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x1<br>
+PHV 81 <font size=+1>|=</font> 0x1<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -4610,7 +4608,7 @@
<tr><td id="row245" class="row_cell">
<a href="#row245">Row 245</a> <br><br>
-State default_parser (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
+State default_parser (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_245">Raw register data</a> <br><br><div id="reg_data_245" style="display: none;">
@@ -5167,7 +5165,7 @@
<td><center>0</center></td>
<td><center>12d</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>12c</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -5395,7 +5393,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x4<br>
+PHV 81 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -6641,7 +6639,7 @@
<br></td></tr>
</table>
-<br><i>Created on Thu Sep 7 13:56:24 2017</i>
+<br><i>Created on Fri Sep 8 08:24:02 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/parser.ingress.html b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/parser.ingress.html
index c9c993a..4da6209 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/parser.ingress.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/parser.ingress.html
@@ -1013,7 +1013,7 @@
<tr>
<th> </th></tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row245">Row 245 (state start)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row244">Row 244 (state start)</a></td>
</tr>
</table>
</div></div><br><br>
@@ -1174,10 +1174,10 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>42</center></td>
-<td><center>1ff</center></td>
-<td><center>43</center></td>
<td><center>41</center></td>
+<td><center>1ff</center></td>
+<td><center>42</center></td>
+<td><center>40</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -1333,7 +1333,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">64</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">1</div>
@@ -1350,7 +1350,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">2</div>
@@ -1404,7 +1404,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x4<br>
+PHV 66 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -1421,7 +1421,7 @@
</tr>
</table>
<br>Previous states:
-<a href="#row244">Row 244</a><br>
+<a href="#row243">Row 243</a><br>
</div></div><br><br>
</td></tr>
@@ -1582,7 +1582,7 @@
<td><center>0</center></td>
<td><center>121</center></td>
<td><center>1ff</center></td>
-<td><center>43</center></td>
+<td><center>42</center></td>
<td><center>120</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -1813,7 +1813,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x8<br>
+PHV 66 <font size=+1>|=</font> 0x8<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -1836,7 +1836,7 @@
</tr>
</table>
<br>Previous states:
-<a href="#row254">Row 254</a>, <a href="#row246">Row 246</a>, <a href="#row247">Row 247</a><br>
+<a href="#row254">Row 254</a>, <a href="#row245">Row 245</a>, <a href="#row246">Row 246</a><br>
</div></div><br><br>
</td></tr>
@@ -2223,7 +2223,7 @@
[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_252');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_252">Transitions</a> <br><br><div id="transitions_252" style="display: block;">
End<br>
<br>Previous states:
-<a href="#row254">Row 254</a>, <a href="#row246">Row 246</a>, <a href="#row247">Row 247</a><br>
+<a href="#row254">Row 254</a>, <a href="#row245">Row 245</a>, <a href="#row246">Row 246</a><br>
</div></div><br><br>
</td></tr>
@@ -2287,8 +2287,9 @@
</tr>
<tr>
<td><center>0</center></td>
+<td><center>ff</center></td>
<td><center>0</center></td>
-<td><center>14</center></td>
+<td><center>4</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2296,7 +2297,6 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>1</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>14</center></td>
@@ -2383,19 +2383,19 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>123</center></td>
-<td><center>1ff</center></td>
-<td><center>43</center></td>
+<td><center>124</center></td>
+<td><center>42</center></td>
<td><center>122</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
-<td><center>4</center></td>
-<td><center>2</center></td>
-<td><center>0</center></td>
<td><center>6</center></td>
-<td><center>1ff</center></td>
-<td><center>10</center></td>
+<td><center>4</center></td>
+<td><center>a</center></td>
+<td><center>8</center></td>
+<td><center>146</center></td>
+<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2408,9 +2408,9 @@
<td><center>0</center></td>
<td><center>104</center></td>
<td><center>0</center></td>
-<td><center>105</center></td>
+<td><center>1ff</center></td>
+<td><center>10</center></td>
<td><center>c</center></td>
-<td><center>8</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2420,7 +2420,7 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>0</center></td>
+<td><center>2</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2524,7 +2524,7 @@
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>16</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>17</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>18</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>19</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>19</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
@@ -2546,6 +2546,11 @@
<div class="extr_arrow" style="width:27px; top: 0px;">291</div>
</td>
<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">292</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
<div class="extr_arrow" style="width:54px; top: 0px;">323</div>
</td>
<td height=1 style="position: relative">
@@ -2561,6 +2566,11 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">326</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">259</div>
</td>
<td height=1 style="position: relative">
@@ -2579,15 +2589,6 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">261</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
</td>
@@ -2613,12 +2614,18 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x10<br>
+PHV 66 <font size=+1>|=</font> 0x10<br>
<br>
</div></div><br><br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_251');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_251">Transitions</a> <br><br><div id="transitions_251" style="display: block;">
-End<br>
+<table border=0 id="transitions_table_251" class="draggable transitions_table">
+<tr>
+<th> </th></tr>
+<td>Default</td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row248">Row 248 (state parse_tcp//spilled)</a></td>
+</tr>
+</table>
<br>Previous states:
<a href="#row253">Row 253</a><br>
</div></div><br><br>
@@ -2781,7 +2788,7 @@
<td><center>0</center></td>
<td><center>123</center></td>
<td><center>1ff</center></td>
-<td><center>43</center></td>
+<td><center>42</center></td>
<td><center>122</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -3006,7 +3013,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x20<br>
+PHV 66 <font size=+1>|=</font> 0x20<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3406,7 +3413,7 @@
<tr><td id="row248" class="row_cell">
<a href="#row248">Row 248</a> <br><br>
-State parse_pkt_out (from state default_parser)<br />
+State parse_tcp//spilled (from state parse_tcp)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_248">Raw register data</a> <br><br><div id="reg_data_248" style="display: none;">
@@ -3424,6 +3431,394 @@
</tr>
<tr>
<td><center>value</center></td>
+<td><center>4</center></td>
+<td><center>ffff</center></td>
+<td><center>ff</center></td>
+<td><center>ff</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+</tr>
+<tr>
+<td><center>mask</center></td>
+<td><center>ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+</tr>
+</table> <br>
+Early action: <table border=1>
+<tr>
+<td><center><font size=-3>ctr_amt_idx</font></center></td>
+<td><center><font size=-3>nxt_state_mask</font></center></td>
+<td><center><font size=-3>shift_amt</font></center></td>
+<td><center><font size=-3>nxt_state</font></center></td>
+<td><center><font size=-3>lookup_offset_8[1]</font></center></td>
+<td><center><font size=-3>ctr_ld_src</font></center></td>
+<td><center><font size=-3>lookup_offset_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_16</font></center></td>
+<td><center><font size=-3>ld_lookup_8[1]</font></center></td>
+<td><center><font size=-3>done</font></center></td>
+<td><center><font size=-3>lookup_offset_16</font></center></td>
+<td><center><font size=-3>ctr_load</font></center></td>
+<td><center><font size=-3>buf_req</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>14</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>14</center></td>
+</tr>
+</table> <br>
+Action: <table border=1>
+<tr>
+<td><center><font size=-3>phv_8b_src_type_3</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_2</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_0</font></center></td>
+<td><center><font size=-3>csum_addr[1]</font></center></td>
+<td><center><font size=-3>phv_16b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_dst_1</font></center></td>
+<td><center><font size=-3>pri_upd_en_shr</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_1</font></center></td>
+<td><center><font size=-3>dst_offset_rst</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_3</font></center></td>
+<td><center><font size=-3>phv_16b_src_2</font></center></td>
+<td><center><font size=-3>phv_16b_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_src_2</font></center></td>
+<td><center><font size=-3>pri_upd_src</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>csum_en[1]</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>dst_offset_inc</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>csum_addr[0]</font></center></td>
+<td><center><font size=-3>pri_upd_type</font></center></td>
+<td><center><font size=-3>phv_32b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_3</font></center></td>
+<td><center><font size=-3>phv_32b_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_src_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_0</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_2</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_32b_dst_3</font></center></td>
+<td><center><font size=-3>pri_upd_val_mask</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_3</font></center></td>
+<td><center><font size=-3>csum_en[0]</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_2</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>1ff</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>1ff</center></td>
+<td><center>125</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>3</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+</tr>
+</table> <br>
+</div></div><br><br>
+
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_248">Input buffer</a> <br><br><div id="input_buffer_248" style="display: block;">
+<div style="min-width: 1060;"></div>
+<table border=0><tr>
+<td valign=bottom align=right><font size=-3>Matches </font></td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=20></td></tr><tr>
+<td align=right><font size=-3>Bytes </font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>1</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>2</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>3</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>4</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>13</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>14</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>15</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>16</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>17</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>18</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>19</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>28</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>29</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>30</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>31</center></font></td>
+</tr><tr>
+<td valign=top align=right><font size=-3>Extractions </font></td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">293</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+</tr></table>
+<div style="height:40px;"> </div>
+</div></div><br><br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_248">Transitions</a> <br><br><div id="transitions_248" style="display: block;">
+End<br>
+<br>Previous states:
+<a href="#row251">Row 251</a><br>
+</div></div><br><br>
+</td></tr>
+
+<tr><td id="row247" class="row_cell">
+<a href="#row247">Row 247</a> <br><br>
+State parse_pkt_out (from state default_parser)<br />
+<br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_247">Raw register data</a> <br><br><div id="reg_data_247" style="display: none;">
+TCAM word: <table border=1>
+<tr>
+<td><center><font size=-3></font></center></td>
+<td><center><font size=-3>curr_state</font></center></td>
+<td><center><font size=-3>lookup_16</font></center></td>
+<td><center><font size=-3>lookup_8[1]</font></center></td>
+<td><center><font size=-3>lookup_8[0]</font></center></td>
+<td><center><font size=-3>ver_1</font></center></td>
+<td><center><font size=-3>ver_0</font></center></td>
+<td><center><font size=-3>ctr_zero</font></center></td>
+<td><center><font size=-3>ctr_neg</font></center></td>
+</tr>
+<tr>
+<td><center>value</center></td>
<td><center>6</center></td>
<td><center>ff40</center></td>
<td><center>ff</center></td>
@@ -3561,7 +3956,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>43</center></td>
+<td><center>42</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -3612,7 +4007,7 @@
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_248">Input buffer</a> <br><br><div id="input_buffer_248" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_247">Input buffer</a> <br><br><div id="input_buffer_247" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -3783,29 +4178,29 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x2<br>
+PHV 66 <font size=+1>|=</font> 0x2<br>
<br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_248">Transitions</a> <br><br><div id="transitions_248" style="display: block;">
-<table border=0 id="transitions_table_248" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_247">Transitions</a> <br><br><div id="transitions_247" style="display: block;">
+<table border=0 id="transitions_table_247" class="draggable transitions_table">
<tr>
<th> </th></tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row246">Row 246 (state parse_ethernet)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row245">Row 245 (state parse_ethernet)</a></td>
</tr>
</table>
<br>Previous states:
-<a href="#row243">Row 243</a><br>
+<a href="#row242">Row 242</a><br>
</div></div><br><br>
</td></tr>
-<tr><td id="row247" class="row_cell">
-<a href="#row247">Row 247</a> <br><br>
+<tr><td id="row246" class="row_cell">
+<a href="#row246">Row 246</a> <br><br>
State parse_ethernet (from state default_parser)<br />
<br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_247">Raw register data</a> <br><br><div id="reg_data_247" style="display: none;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_246');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_246">Raw register data</a> <br><br><div id="reg_data_246" style="display: none;">
TCAM word: <table border=1>
<tr>
<td><center><font size=-3></font></center></td>
@@ -3955,416 +4350,10 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>42</center></td>
-<td><center>1ff</center></td>
-<td><center>43</center></td>
<td><center>41</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>c</center></td>
-<td><center>5</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
<td><center>1ff</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>2</center></td>
-<td><center>0</center></td>
-<td><center>1ff</center></td>
-<td><center>8</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1ff</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>4</center></td>
-<td><center>0</center></td>
-<td><center>7</center></td>
-</tr>
-</table> <br>
-</div></div><br><br>
-
-<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_247">Input buffer</a> <br><br><div id="input_buffer_247" style="display: block;">
-<div style="min-width: 1060;"></div>
-<table border=0><tr>
-<td valign=bottom align=right><font size=-3>Matches </font></td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="tcam_arrow" style="width:54px; bottom: 0px;">16</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=40></td></tr><tr>
-<td align=right><font size=-3>Bytes </font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>1</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>2</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>3</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>4</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>13</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>14</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>15</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>16</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>17</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>18</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>19</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>28</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>29</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>30</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>31</center></font></td>
-</tr><tr>
-<td valign=top align=right><font size=-3>Extractions </font></td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">1</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">131</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">2</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">132</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-</tr></table>
-<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x4<br>
-<br>
-</div></div><br><br>
-<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_247">Transitions</a> <br><br><div id="transitions_247" style="display: block;">
-<table border=0 id="transitions_table_247" class="draggable transitions_table">
-<tr>
-<th>16b</th>
-<th> </th></tr>
-<td>0800</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row253">Row 253 (state parse_ipv4)</a></td>
-</tr>
-<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row252">Row 252 (state <leaf>)</a></td>
-</tr>
-</table>
-<br>Previous states:
-<a href="#row243">Row 243</a><br>
-</div></div><br><br>
-</td></tr>
-
-<tr><td id="row246" class="row_cell">
-<a href="#row246">Row 246</a> <br><br>
-State parse_ethernet (from state parse_pkt_out)<br />
-<br>
-<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_246');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_246">Raw register data</a> <br><br><div id="reg_data_246" style="display: none;">
-TCAM word: <table border=1>
-<tr>
-<td><center><font size=-3></font></center></td>
-<td><center><font size=-3>curr_state</font></center></td>
-<td><center><font size=-3>lookup_16</font></center></td>
-<td><center><font size=-3>lookup_8[1]</font></center></td>
-<td><center><font size=-3>lookup_8[0]</font></center></td>
-<td><center><font size=-3>ver_1</font></center></td>
-<td><center><font size=-3>ver_0</font></center></td>
-<td><center><font size=-3>ctr_zero</font></center></td>
-<td><center><font size=-3>ctr_neg</font></center></td>
-</tr>
-<tr>
-<td><center>value</center></td>
-<td><center>7</center></td>
-<td><center>ffff</center></td>
-<td><center>ff</center></td>
-<td><center>ff</center></td>
-<td><center>1</center></td>
-<td><center>1</center></td>
-<td><center>1</center></td>
-<td><center>1</center></td>
-</tr>
-<tr>
-<td><center>mask</center></td>
-<td><center>ff</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-</tr>
-</table> <br>
-Early action: <table border=1>
-<tr>
-<td><center><font size=-3>ctr_amt_idx</font></center></td>
-<td><center><font size=-3>nxt_state_mask</font></center></td>
-<td><center><font size=-3>shift_amt</font></center></td>
-<td><center><font size=-3>nxt_state</font></center></td>
-<td><center><font size=-3>lookup_offset_8[1]</font></center></td>
-<td><center><font size=-3>ctr_ld_src</font></center></td>
-<td><center><font size=-3>lookup_offset_8[0]</font></center></td>
-<td><center><font size=-3>ld_lookup_8[0]</font></center></td>
-<td><center><font size=-3>ld_lookup_16</font></center></td>
-<td><center><font size=-3>ld_lookup_8[1]</font></center></td>
-<td><center><font size=-3>done</font></center></td>
-<td><center><font size=-3>lookup_offset_16</font></center></td>
-<td><center><font size=-3>ctr_load</font></center></td>
-<td><center><font size=-3>buf_req</font></center></td>
-</tr>
-<tr>
-<td><center>0</center></td>
-<td><center>ff</center></td>
-<td><center>e</center></td>
-<td><center>2</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>c</center></td>
-<td><center>0</center></td>
-<td><center>e</center></td>
-</tr>
-</table> <br>
-Action: <table border=1>
-<tr>
-<td><center><font size=-3>phv_8b_src_type_3</font></center></td>
-<td><center><font size=-3>phv_8b_src_type_2</font></center></td>
-<td><center><font size=-3>phv_8b_src_type_1</font></center></td>
-<td><center><font size=-3>phv_8b_src_type_0</font></center></td>
-<td><center><font size=-3>csum_addr[1]</font></center></td>
-<td><center><font size=-3>phv_16b_dst_2</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_0</font></center></td>
-<td><center><font size=-3>phv_16b_dst_0</font></center></td>
-<td><center><font size=-3>phv_16b_dst_1</font></center></td>
-<td><center><font size=-3>phv_32b_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_1</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_3</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_2</font></center></td>
-<td><center><font size=-3>phv_8b_dst_2</font></center></td>
-<td><center><font size=-3>phv_8b_dst_3</font></center></td>
-<td><center><font size=-3>phv_8b_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_dst_1</font></center></td>
-<td><center><font size=-3>pri_upd_en_shr</font></center></td>
-<td><center><font size=-3>phv_32b_src_type_1</font></center></td>
-<td><center><font size=-3>dst_offset_rst</font></center></td>
-<td><center><font size=-3>phv_32b_src_type_0</font></center></td>
-<td><center><font size=-3>phv_16b_src_1</font></center></td>
-<td><center><font size=-3>phv_16b_src_0</font></center></td>
-<td><center><font size=-3>phv_16b_src_3</font></center></td>
-<td><center><font size=-3>phv_16b_src_2</font></center></td>
-<td><center><font size=-3>phv_16b_dst_3</font></center></td>
-<td><center><font size=-3>phv_32b_src_2</font></center></td>
-<td><center><font size=-3>pri_upd_src</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_3</font></center></td>
-<td><center><font size=-3>phv_16b_offset_rot_imm_1</font></center></td>
-<td><center><font size=-3>csum_en[1]</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_1</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_0</font></center></td>
-<td><center><font size=-3>dst_offset_inc</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_2</font></center></td>
-<td><center><font size=-3>csum_addr[0]</font></center></td>
-<td><center><font size=-3>pri_upd_type</font></center></td>
-<td><center><font size=-3>phv_32b_dst_1</font></center></td>
-<td><center><font size=-3>phv_32b_src_3</font></center></td>
-<td><center><font size=-3>phv_32b_dst_2</font></center></td>
-<td><center><font size=-3>phv_32b_src_1</font></center></td>
-<td><center><font size=-3>phv_32b_src_0</font></center></td>
-<td><center><font size=-3>phv_32b_offset_rot_imm_1</font></center></td>
-<td><center><font size=-3>phv_32b_offset_rot_imm_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_3</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_2</font></center></td>
-<td><center><font size=-3>phv_16b_offset_rot_imm_0</font></center></td>
-<td><center><font size=-3>phv_32b_dst_3</font></center></td>
-<td><center><font size=-3>pri_upd_val_mask</font></center></td>
-<td><center><font size=-3>phv_16b_src_type_1</font></center></td>
-<td><center><font size=-3>phv_16b_src_type_0</font></center></td>
-<td><center><font size=-3>phv_8b_src_3</font></center></td>
-<td><center><font size=-3>csum_en[0]</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_3</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_2</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_1</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_src_1</font></center></td>
-<td><center><font size=-3>phv_8b_src_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_1</font></center></td>
-<td><center><font size=-3>phv_8b_src_2</font></center></td>
-</tr>
-<tr>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>1ff</center></td>
-<td><center>0</center></td>
-<td><center>83</center></td>
-<td><center>84</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
<td><center>42</center></td>
-<td><center>1ff</center></td>
-<td><center>43</center></td>
-<td><center>41</center></td>
+<td><center>40</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -4520,7 +4509,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">64</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">1</div>
@@ -4537,7 +4526,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">2</div>
@@ -4591,7 +4580,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x4<br>
+PHV 66 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -4608,13 +4597,13 @@
</tr>
</table>
<br>Previous states:
-<a href="#row248">Row 248</a><br>
+<a href="#row242">Row 242</a><br>
</div></div><br><br>
</td></tr>
<tr><td id="row245" class="row_cell">
<a href="#row245">Row 245</a> <br><br>
-State start (from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>)<br />
+State parse_ethernet (from state parse_pkt_out)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_245">Raw register data</a> <br><br><div id="reg_data_245" style="display: none;">
@@ -4632,6 +4621,412 @@
</tr>
<tr>
<td><center>value</center></td>
+<td><center>7</center></td>
+<td><center>ffff</center></td>
+<td><center>ff</center></td>
+<td><center>ff</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+</tr>
+<tr>
+<td><center>mask</center></td>
+<td><center>ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+</tr>
+</table> <br>
+Early action: <table border=1>
+<tr>
+<td><center><font size=-3>ctr_amt_idx</font></center></td>
+<td><center><font size=-3>nxt_state_mask</font></center></td>
+<td><center><font size=-3>shift_amt</font></center></td>
+<td><center><font size=-3>nxt_state</font></center></td>
+<td><center><font size=-3>lookup_offset_8[1]</font></center></td>
+<td><center><font size=-3>ctr_ld_src</font></center></td>
+<td><center><font size=-3>lookup_offset_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_16</font></center></td>
+<td><center><font size=-3>ld_lookup_8[1]</font></center></td>
+<td><center><font size=-3>done</font></center></td>
+<td><center><font size=-3>lookup_offset_16</font></center></td>
+<td><center><font size=-3>ctr_load</font></center></td>
+<td><center><font size=-3>buf_req</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>ff</center></td>
+<td><center>e</center></td>
+<td><center>2</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>c</center></td>
+<td><center>0</center></td>
+<td><center>e</center></td>
+</tr>
+</table> <br>
+Action: <table border=1>
+<tr>
+<td><center><font size=-3>phv_8b_src_type_3</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_2</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_0</font></center></td>
+<td><center><font size=-3>csum_addr[1]</font></center></td>
+<td><center><font size=-3>phv_16b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_dst_1</font></center></td>
+<td><center><font size=-3>pri_upd_en_shr</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_1</font></center></td>
+<td><center><font size=-3>dst_offset_rst</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_3</font></center></td>
+<td><center><font size=-3>phv_16b_src_2</font></center></td>
+<td><center><font size=-3>phv_16b_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_src_2</font></center></td>
+<td><center><font size=-3>pri_upd_src</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>csum_en[1]</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>dst_offset_inc</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>csum_addr[0]</font></center></td>
+<td><center><font size=-3>pri_upd_type</font></center></td>
+<td><center><font size=-3>phv_32b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_3</font></center></td>
+<td><center><font size=-3>phv_32b_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_src_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_0</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_2</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_32b_dst_3</font></center></td>
+<td><center><font size=-3>pri_upd_val_mask</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_3</font></center></td>
+<td><center><font size=-3>csum_en[0]</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_2</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>83</center></td>
+<td><center>84</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>41</center></td>
+<td><center>1ff</center></td>
+<td><center>42</center></td>
+<td><center>40</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>c</center></td>
+<td><center>5</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>2</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>8</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>4</center></td>
+<td><center>0</center></td>
+<td><center>7</center></td>
+</tr>
+</table> <br>
+</div></div><br><br>
+
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_245">Input buffer</a> <br><br><div id="input_buffer_245" style="display: block;">
+<div style="min-width: 1060;"></div>
+<table border=0><tr>
+<td valign=bottom align=right><font size=-3>Matches </font></td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="tcam_arrow" style="width:54px; bottom: 0px;">16</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=40></td></tr><tr>
+<td align=right><font size=-3>Bytes </font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>1</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>2</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>3</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>4</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>13</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>14</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>15</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>16</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>17</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>18</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>19</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>28</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>29</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>30</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>31</center></font></td>
+</tr><tr>
+<td valign=top align=right><font size=-3>Extractions </font></td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">64</div>
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:108px; top: 0px;">1</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">131</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:108px; top: 0px;">2</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">132</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+</tr></table>
+<div style="height:40px;"> </div>
+PHV 66 <font size=+1>|=</font> 0x4<br>
+<br>
+</div></div><br><br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_245">Transitions</a> <br><br><div id="transitions_245" style="display: block;">
+<table border=0 id="transitions_table_245" class="draggable transitions_table">
+<tr>
+<th>16b</th>
+<th> </th></tr>
+<td>0800</td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row253">Row 253 (state parse_ipv4)</a></td>
+</tr>
+<td>Default</td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row252">Row 252 (state <leaf>)</a></td>
+</tr>
+</table>
+<br>Previous states:
+<a href="#row247">Row 247</a><br>
+</div></div><br><br>
+</td></tr>
+
+<tr><td id="row244" class="row_cell">
+<a href="#row244">Row 244</a> <br><br>
+State start (from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>)<br />
+<br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_244">Raw register data</a> <br><br><div id="reg_data_244" style="display: none;">
+TCAM word: <table border=1>
+<tr>
+<td><center><font size=-3></font></center></td>
+<td><center><font size=-3>curr_state</font></center></td>
+<td><center><font size=-3>lookup_16</font></center></td>
+<td><center><font size=-3>lookup_8[1]</font></center></td>
+<td><center><font size=-3>lookup_8[0]</font></center></td>
+<td><center><font size=-3>ver_1</font></center></td>
+<td><center><font size=-3>ver_0</font></center></td>
+<td><center><font size=-3>ctr_zero</font></center></td>
+<td><center><font size=-3>ctr_neg</font></center></td>
+</tr>
+<tr>
+<td><center>value</center></td>
<td><center>8</center></td>
<td><center>ffff</center></td>
<td><center>ff</center></td>
@@ -4769,7 +5164,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>43</center></td>
+<td><center>42</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -4820,7 +5215,7 @@
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_245">Input buffer</a> <br><br><div id="input_buffer_245" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_244">Input buffer</a> <br><br><div id="input_buffer_244" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -4991,20 +5386,20 @@
</td>
</tr></table>
<div style="height:20px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x40<br>
+PHV 66 <font size=+1>|=</font> 0x40<br>
<br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_245">Transitions</a> <br><br><div id="transitions_245" style="display: block;">
-<table border=0 id="transitions_table_245" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_244">Transitions</a> <br><br><div id="transitions_244" style="display: block;">
+<table border=0 id="transitions_table_244" class="draggable transitions_table">
<tr>
<th>8b[0]</th>
<th> </th></tr>
<td>00</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row244">Row 244 (state parse_pkt_in)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row243">Row 243 (state parse_pkt_in)</a></td>
</tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row243">Row 243 (state default_parser)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row242">Row 242 (state default_parser)</a></td>
</tr>
</table>
<br>Previous states:
@@ -5012,12 +5407,12 @@
</div></div><br><br>
</td></tr>
-<tr><td id="row244" class="row_cell">
-<a href="#row244">Row 244</a> <br><br>
+<tr><td id="row243" class="row_cell">
+<a href="#row243">Row 243</a> <br><br>
State parse_pkt_in (from state start)<br />
<br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_244">Raw register data</a> <br><br><div id="reg_data_244" style="display: none;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_243">Raw register data</a> <br><br><div id="reg_data_243" style="display: none;">
TCAM word: <table border=1>
<tr>
<td><center><font size=-3></font></center></td>
@@ -5169,7 +5564,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>43</center></td>
+<td><center>42</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -5220,7 +5615,7 @@
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_244">Input buffer</a> <br><br><div id="input_buffer_244" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_243">Input buffer</a> <br><br><div id="input_buffer_243" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -5391,12 +5786,12 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x1<br>
+PHV 66 <font size=+1>|=</font> 0x1<br>
<br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_244">Transitions</a> <br><br><div id="transitions_244" style="display: block;">
-<table border=0 id="transitions_table_244" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_243">Transitions</a> <br><br><div id="transitions_243" style="display: block;">
+<table border=0 id="transitions_table_243" class="draggable transitions_table">
<tr>
<th> </th></tr>
<td>Default</td>
@@ -5404,16 +5799,16 @@
</tr>
</table>
<br>Previous states:
-<a href="#row245">Row 245</a><br>
+<a href="#row244">Row 244</a><br>
</div></div><br><br>
</td></tr>
-<tr><td id="row243" class="row_cell">
-<a href="#row243">Row 243</a> <br><br>
+<tr><td id="row242" class="row_cell">
+<a href="#row242">Row 242</a> <br><br>
State default_parser (from state start)<br />
<br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_243">Raw register data</a> <br><br><div id="reg_data_243" style="display: none;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_242">Raw register data</a> <br><br><div id="reg_data_242" style="display: none;">
TCAM word: <table border=1>
<tr>
<td><center><font size=-3></font></center></td>
@@ -5615,13 +6010,13 @@
</table> <br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('saved_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#saved_243">Saved matches</a> <br><br><div id="saved_243" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('saved_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#saved_242">Saved matches</a> <br><br><div id="saved_242" style="display: block;">
16b
<font size=+1><-</font>
<a href="#row255">Row 255</a><br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_243">Input buffer</a> <br><br><div id="input_buffer_243" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_242">Input buffer</a> <br><br><div id="input_buffer_242" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -5793,28 +6188,23 @@
<div style="height:20px;"> </div>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_243">Transitions</a> <br><br><div id="transitions_243" style="display: block;">
-<table border=0 id="transitions_table_243" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_242">Transitions</a> <br><br><div id="transitions_242" style="display: block;">
+<table border=0 id="transitions_table_242" class="draggable transitions_table">
<tr>
<th>16b</th>
<th> </th></tr>
<td>0140 && 01ff</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row248">Row 248 (state parse_pkt_out)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row247">Row 247 (state parse_pkt_out)</a></td>
</tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row247">Row 247 (state parse_ethernet)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row246">Row 246 (state parse_ethernet)</a></td>
</tr>
</table>
<br>Previous states:
-<a href="#row245">Row 245</a><br>
+<a href="#row244">Row 244</a><br>
</div></div><br><br>
</td></tr>
-<tr><td id="row242" class="row_cell">
-<a href="#row242">Row 242</a> <br><br>
-Unmatchable
-</td></tr>
-
<tr><td id="row241" class="row_cell">
<a href="#row241">Row 241</a> <br><br>
Unmatchable
@@ -7026,11 +7416,11 @@
</td></tr>
<tr><td class="row_cell">
-Matchable row occupancy: 13/256 (5.08%)
+Matchable row occupancy: 14/256 (5.47%)
<br></td></tr>
</table>
-<br><i>Created on Thu Sep 7 13:56:24 2017</i>
+<br><i>Created on Fri Sep 8 08:24:02 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/phv_allocation.html b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/phv_allocation.html
index 1dfff69..ec8e80c 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/phv_allocation.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/phv_allocation.html
@@ -19,2670 +19,6 @@
ethernet.dstAddr[39:8] in container bits [31:0]
-</title></rect>
-<rect x="9" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 2
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="9" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 3
-
-
-</title></rect>
-<rect x="9" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 4
-
-
-</title></rect>
-<rect x="9" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 5
-
-
-</title></rect>
-<rect x="9" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 6
-
-
-</title></rect>
-<rect x="9" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 7
-
-
-</title></rect>
-<rect x="27" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 8
-
-
-</title></rect>
-<rect x="27" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 9
-
-
-</title></rect>
-<rect x="27" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 10
-
-
-</title></rect>
-<rect x="27" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 11
-
-
-</title></rect>
-<rect x="27" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 12
-
-
-</title></rect>
-<rect x="27" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 13
-
-
-</title></rect>
-<rect x="27" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 14
-
-
-</title></rect>
-<rect x="27" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 15
-
-
-</title></rect>
-<text x="20" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="54" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 16
-
-
-</title></rect>
-<rect x="54" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 17
-
-
-</title></rect>
-<rect x="54" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 18
-
-
-</title></rect>
-<rect x="54" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 19
-
-
-</title></rect>
-<rect x="54" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 20
-
-
-</title></rect>
-<rect x="54" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 21
-
-
-</title></rect>
-<rect x="54" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 22
-
-
-</title></rect>
-<rect x="54" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 23
-
-
-</title></rect>
-<rect x="72" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 24
-
-
-</title></rect>
-<rect x="72" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 25
-
-
-</title></rect>
-<rect x="72" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 26
-
-
-</title></rect>
-<rect x="72" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 27
-
-
-</title></rect>
-<rect x="72" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 28
-
-
-</title></rect>
-<rect x="72" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 29
-
-
-</title></rect>
-<rect x="72" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 30
-
-
-</title></rect>
-<rect x="72" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 31
-
-
-</title></rect>
-<text x="65" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="99" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 32
-
-
-</title></rect>
-<rect x="99" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 33
-
-
-</title></rect>
-<rect x="99" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 34
-
-
-</title></rect>
-<rect x="99" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 35
-
-
-</title></rect>
-<rect x="99" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 36
-
-
-</title></rect>
-<rect x="99" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 37
-
-
-</title></rect>
-<rect x="99" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 38
-
-
-</title></rect>
-<rect x="99" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 39
-
-
-</title></rect>
-<rect x="117" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 40
-
-
-</title></rect>
-<rect x="117" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 41
-
-
-</title></rect>
-<rect x="117" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 42
-
-
-</title></rect>
-<rect x="117" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 43
-
-
-</title></rect>
-<rect x="117" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 44
-
-
-</title></rect>
-<rect x="117" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 45
-
-
-</title></rect>
-<rect x="117" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 46
-
-
-</title></rect>
-<rect x="117" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 47
-
-
-</title></rect>
-<text x="110" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="144" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 48
-
-
-</title></rect>
-<rect x="144" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 49
-
-
-</title></rect>
-<rect x="144" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 50
-
-
-</title></rect>
-<rect x="144" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 51
-
-
-</title></rect>
-<rect x="144" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 52
-
-
-</title></rect>
-<rect x="144" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 53
-
-
-</title></rect>
-<rect x="144" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 54
-
-
-</title></rect>
-<rect x="144" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 55
-
-
-</title></rect>
-<rect x="162" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 56
-
-
-</title></rect>
-<rect x="162" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 57
-
-
-</title></rect>
-<rect x="162" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 58
-
-
-</title></rect>
-<rect x="162" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 59
-
-
-</title></rect>
-<rect x="162" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 60
-
-
-</title></rect>
-<rect x="162" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 61
-
-
-</title></rect>
-<rect x="162" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 62
-
-
-</title></rect>
-<rect x="162" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 63
-
-
-</title></rect>
-<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 64
-
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 65
-
-ethernet.dstAddr[47:40] in container bits [7:0]
-
-</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 66
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 67
-
-POV.POV[39:32] in container bits [7:0]
-
-Field --validity_check--packet_out_hdr read by table ingress_pkt for a gateway expression
-Field --validity_check--packet_out_hdr written by table ingress_pkt's action _packet_out
-</title></rect>
-<text x="191" y="79" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">RW<title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 67
-
-POV.POV[39:32] in container bits [7:0]
-
-Field --validity_check--packet_out_hdr read by table ingress_pkt for a gateway expression
-Field --validity_check--packet_out_hdr written by table ingress_pkt's action _packet_out
-</title></text>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 68
-
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
-
-</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 69
-
-
-</title></rect>
-<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 70
-
-
-</title></rect>
-<rect x="189" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 71
-
-
-</title></rect>
-<rect x="207" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 72
-
-
-</title></rect>
-<rect x="207" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 73
-
-
-</title></rect>
-<rect x="207" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 74
-
-
-</title></rect>
-<rect x="207" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 75
-
-
-</title></rect>
-<rect x="207" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 76
-
-
-</title></rect>
-<rect x="207" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 77
-
-
-</title></rect>
-<rect x="207" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 78
-
-
-</title></rect>
-<rect x="207" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 79
-
-
-</title></rect>
-<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 80
-
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-Field ig_intr_md_for_tm.copy_to_cpu read by table egress_pkt for a gateway expression
-</title></rect>
-<text x="236" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 80
-
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-Field ig_intr_md_for_tm.copy_to_cpu read by table egress_pkt for a gateway expression
-</title></text>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
-eg_intr_md._pad7[4:0] in container bits [7:3]
-eg_intr_md.egress_cos[2:0] in container bits [2:0]
-
-</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 82
-
-POV.POV[7:0] in container bits [7:0]
-
-Field --validity_check--packet_in_hdr written by table egress_pkt's action add_packet_in_hdr
-</title></rect>
-<text x="236" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 82
-
-POV.POV[7:0] in container bits [7:0]
-
-Field --validity_check--packet_in_hdr written by table egress_pkt's action add_packet_in_hdr
-</title></text>
-<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 83
-
-
-</title></rect>
-<rect x="234" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 84
-
-
-</title></rect>
-<rect x="234" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 85
-
-
-</title></rect>
-<rect x="234" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 86
-
-
-</title></rect>
-<rect x="234" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 87
-
-
-</title></rect>
-<rect x="252" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 88
-
-
-</title></rect>
-<rect x="252" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 89
-
-
-</title></rect>
-<rect x="252" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 90
-
-
-</title></rect>
-<rect x="252" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 91
-
-
-</title></rect>
-<rect x="252" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 92
-
-
-</title></rect>
-<rect x="252" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 93
-
-
-</title></rect>
-<rect x="252" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 94
-
-
-</title></rect>
-<rect x="252" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 95
-
-
-</title></rect>
-<text x="245" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="279" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 96
-
-
-</title></rect>
-<rect x="279" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 97
-
-
-</title></rect>
-<rect x="279" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 98
-
-
-</title></rect>
-<rect x="279" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 99
-
-
-</title></rect>
-<rect x="279" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 100
-
-
-</title></rect>
-<rect x="279" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 101
-
-
-</title></rect>
-<rect x="279" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 102
-
-
-</title></rect>
-<rect x="279" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 103
-
-
-</title></rect>
-<rect x="297" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 104
-
-
-</title></rect>
-<rect x="297" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 105
-
-
-</title></rect>
-<rect x="297" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 106
-
-
-</title></rect>
-<rect x="297" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 107
-
-
-</title></rect>
-<rect x="297" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 108
-
-
-</title></rect>
-<rect x="297" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 109
-
-
-</title></rect>
-<rect x="297" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 110
-
-
-</title></rect>
-<rect x="297" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 111
-
-
-</title></rect>
-<text x="290" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="324" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 112
-
-
-</title></rect>
-<rect x="324" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 113
-
-
-</title></rect>
-<rect x="324" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 114
-
-
-</title></rect>
-<rect x="324" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 115
-
-
-</title></rect>
-<rect x="324" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 116
-
-
-</title></rect>
-<rect x="324" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 117
-
-
-</title></rect>
-<rect x="324" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 118
-
-
-</title></rect>
-<rect x="324" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 119
-
-
-</title></rect>
-<rect x="342" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 120
-
-
-</title></rect>
-<rect x="342" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 121
-
-
-</title></rect>
-<rect x="342" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 122
-
-
-</title></rect>
-<rect x="342" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 123
-
-
-</title></rect>
-<rect x="342" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 124
-
-
-</title></rect>
-<rect x="342" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 125
-
-
-</title></rect>
-<rect x="342" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 126
-
-
-</title></rect>
-<rect x="342" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 127
-
-
-</title></rect>
-<text x="335" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="369" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 128
-
-ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
-ig_intr_md._pad1[0:0] in container bits [14:14]
-ig_intr_md._pad2[1:0] in container bits [13:12]
-ig_intr_md._pad3[2:0] in container bits [11:9]
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-</title></rect>
-<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 129
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_out_hdr.egress_port read by table ingress_pkt's action _packet_out
-</title></rect>
-<text x="371" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 129
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_out_hdr.egress_port read by table ingress_pkt's action _packet_out
-</title></text>
-<rect x="369" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 130
-
-ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md_for_tm.ucast_egress_port written by table ingress_pkt's action _packet_out
-</title></rect>
-<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 130
-
-ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md_for_tm.ucast_egress_port written by table ingress_pkt's action _packet_out
-</title></text>
-<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 131
-
-ethernet.dstAddr[7:0] in container bits [15:8]
-ethernet.srcAddr[47:40] in container bits [7:0]
-
-</title></rect>
-<rect x="369" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 132
-
-ethernet.etherType[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="369" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 133
-
-
-</title></rect>
-<rect x="369" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 134
-
-
-</title></rect>
-<rect x="369" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 135
-
-
-</title></rect>
-<rect x="387" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 136
-
-
-</title></rect>
-<rect x="387" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 137
-
-
-</title></rect>
-<rect x="387" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 138
-
-
-</title></rect>
-<rect x="387" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 139
-
-
-</title></rect>
-<rect x="387" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 140
-
-
-</title></rect>
-<rect x="387" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 141
-
-
-</title></rect>
-<rect x="387" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 142
-
-
-</title></rect>
-<rect x="387" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 143
-
-
-</title></rect>
-<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 144
-
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md.ingress_port read by table egress_pkt's action add_packet_in_hdr
-</title></rect>
-<text x="416" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 144
-
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md.ingress_port read by table egress_pkt's action add_packet_in_hdr
-</title></text>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 145
-
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_in_hdr.ingress_port written by table egress_pkt's action add_packet_in_hdr
-</title></rect>
-<text x="416" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 145
-
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_in_hdr.ingress_port written by table egress_pkt's action add_packet_in_hdr
-</title></text>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 146
-
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
-
-</title></rect>
-<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 147
-
-
-</title></rect>
-<rect x="414" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 148
-
-
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- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 256
- Tag-Along Space
-
-ipv4.ttl[7:0] in container bits [31:24]
-ipv4.protocol[7:0] in container bits [23:16]
-ipv4.hdrChecksum[15:0] in container bits [15:0]
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- Tag-Along Space
-
-ipv4.srcAddr[31:0] in container bits [31:0]
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- Tag-Along Space
-
-ipv4.dstAddr[31:0] in container bits [31:0]
-
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- Assigned to Ingress
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- Container Address: 259
- Tag-Along Space
-
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
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- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
-tcp.dataOffset[3:0] in container bits [31:28]
-tcp.res[2:0] in container bits [27:25]
-tcp.ecn[2:0] in container bits [24:22]
-tcp.ctrl[5:0] in container bits [21:16]
-tcp.window[15:0] in container bits [15:0]
-
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- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 261
- Tag-Along Space
-
-tcp.checksum[15:0] in container bits [31:16]
-tcp.urgentPtr[15:0] in container bits [15:0]
-
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- Unassigned
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- Tag-Along Space
-
-
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- Unassigned
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- Tag-Along Space
-
-
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- Assigned to Egress
- Container Bit Width: 32
- Container Address: 264
- Tag-Along Space
-
-ipv4.ttl[7:0] in container bits [31:24]
-ipv4.protocol[7:0] in container bits [23:16]
-ipv4.hdrChecksum[15:0] in container bits [15:0]
-
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- Assigned to Egress
- Container Bit Width: 32
- Container Address: 265
- Tag-Along Space
-
-ipv4.srcAddr[31:0] in container bits [31:0]
-
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- Assigned to Egress
- Container Bit Width: 32
- Container Address: 266
- Tag-Along Space
-
-ipv4.dstAddr[31:0] in container bits [31:0]
-
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- Assigned to Egress
- Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
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- Assigned to Egress
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-tcp.dataOffset[3:0] in container bits [31:28]
-tcp.res[2:0] in container bits [27:25]
-tcp.ecn[2:0] in container bits [24:22]
-tcp.ctrl[5:0] in container bits [21:16]
-tcp.window[15:0] in container bits [15:0]
-
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- Assigned to Egress
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-tcp.checksum[15:0] in container bits [31:16]
-tcp.urgentPtr[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-ethernet.dstAddr[39:8] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 271
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="774" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 272
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 273
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 274
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 275
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 276
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 277
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 278
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 279
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 280
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 281
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 282
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 283
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 284
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 285
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 286
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 287
- Tag-Along Space
-
-
-</title></rect>
-<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 288
- Tag-Along Space
-
-ipv4.version[3:0] in container bits [7:4]
-ipv4.ihl[3:0] in container bits [3:0]
-
-</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 289
- Tag-Along Space
-
-ipv4.diffserv[7:0] in container bits [7:0]
-
-</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 290
- Tag-Along Space
-
-tcp.srcPort[15:8] in container bits [7:0]
-udp.srcPort[15:8] in container bits [7:0]
-
-</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 291
- Tag-Along Space
-
-tcp.srcPort[7:0] in container bits [7:0]
-udp.srcPort[7:0] in container bits [7:0]
-
-</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 292
- Tag-Along Space
-
-
-</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 293
- Tag-Along Space
-
-
-</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 294
- Tag-Along Space
-
-
-</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 295
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 296
- Tag-Along Space
-
-ipv4.version[3:0] in container bits [7:4]
-ipv4.ihl[3:0] in container bits [3:0]
-
-</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ipv4.diffserv[7:0] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-tcp.srcPort[15:8] in container bits [7:0]
-udp.srcPort[15:8] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-tcp.srcPort[7:0] in container bits [7:0]
-udp.srcPort[7:0] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-ethernet.dstAddr[47:40] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 301
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 302
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 303
- Tag-Along Space
-
-
-</title></rect>
-<text x="830" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="864" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 304
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 305
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 306
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 307
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 308
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 309
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 310
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 311
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 312
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 313
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 314
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 315
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 316
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 317
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 318
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 319
- Tag-Along Space
-
-
-</title></rect>
-<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 320
- Tag-Along Space
-
-ipv4.totalLen[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 321
- Tag-Along Space
-
-ipv4.identification[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 322
- Tag-Along Space
-
-ipv4.flags[2:0] in container bits [15:13]
-ipv4.fragOffset[12:0] in container bits [12:0]
-
-</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 323
- Tag-Along Space
-
-tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 324
- Tag-Along Space
-
-tcp.seqNo[31:16] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 325
- Tag-Along Space
-
-tcp.seqNo[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 326
- Tag-Along Space
-
-
-</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 327
- Tag-Along Space
-
-
-</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 328
- Tag-Along Space
-
-
-</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 329
- Tag-Along Space
-
-
-</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 330
- Tag-Along Space
-
-
-</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 331
- Tag-Along Space
-
-
-</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 332
- Tag-Along Space
-
-ipv4.totalLen[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 333
- Tag-Along Space
-
-ipv4.identification[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-ipv4.flags[2:0] in container bits [15:13]
-ipv4.fragOffset[12:0] in container bits [12:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-tcp.dstPort[15:0] in container bits [15:0]
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-tcp.seqNo[31:16] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-tcp.seqNo[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 21
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-ethernet.dstAddr[7:0] in container bits [15:8]
-ethernet.srcAddr[47:40] in container bits [7:0]
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 21
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-ethernet.etherType[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 340
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 341
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 342
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 343
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 344
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 345
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 346
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 347
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 348
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 349
- Tag-Along Space
-
-
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- Container Bit Width: 16
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- Tag-Along Space
-
-
-</title></rect>
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- Unassigned
- Container Bit Width: 16
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- Tag-Along Space
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-<text x="965" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
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- Unassigned
- Container Bit Width: 16
- Container Address: 352
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
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- Container Bit Width: 16
- Container Address: 353
- Tag-Along Space
-
-
-</title></rect>
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- Container Bit Width: 16
- Container Address: 354
- Tag-Along Space
-
-
-</title></rect>
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- Container Bit Width: 16
- Container Address: 355
- Tag-Along Space
-
-
-</title></rect>
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- Unassigned
- Container Bit Width: 16
- Container Address: 356
- Tag-Along Space
-
-
-</title></rect>
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- Unassigned
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- Tag-Along Space
-
-
-</title></rect>
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- Unassigned
- Container Bit Width: 16
- Container Address: 358
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 359
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 360
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 361
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 362
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 363
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 364
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 365
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 366
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 367
- Tag-Along Space
-
-
-</title></rect>
-<text x="1010" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="0" y="0" width="1053" height="198" style="stroke:black; stroke-width:2; fill:none""></rect>
-</svg><br>
-<h2>Stage 1</h2>
-<svg viewBox="0 0 1280 200" preserveAspectRatio="xmlMidYMid meet">
-<rect x="9" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 0
-
-POV.POV[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="9" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 1
-
-ethernet.dstAddr[39:8] in container bits [31:0]
-
Field ethernet.dstAddr read by table table0 for a match key
</title></rect>
<text x="11" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 0
@@ -3143,96 +479,89 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
-Field ig_intr_md_for_tm.copy_to_cpu written by table table0's action send_to_cpu
+Field ethernet.dstAddr read by table table0 for a match key
</title></rect>
-<text x="191" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 4
+<text x="191" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
-Field ig_intr_md_for_tm.copy_to_cpu written by table table0's action send_to_cpu
+Field ethernet.dstAddr read by table table0 for a match key
</title></text>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
-Field ethernet.dstAddr read by table table0 for a match key
+Field ethernet.srcAddr read by table table0 for a match key
</title></rect>
<text x="191" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
-
-Field ethernet.dstAddr read by table table0 for a match key
-</title></text>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 66
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-Field ethernet.srcAddr read by table table0 for a match key
-</title></rect>
-<text x="191" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 66
-
ethernet.srcAddr[39:32] in container bits [7:0]
Field ethernet.srcAddr read by table table0 for a match key
</title></text>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 67
+ Container Address: 66
POV.POV[39:32] in container bits [7:0]
Field --validity_check--packet_out_hdr read by table table0 for a gateway expression
+Field --validity_check--packet_out_hdr written by table process_packet_out_table's action _process_packet_out
+Field --validity_check--packet_in_hdr written by table table0's action send_to_cpu
</title></rect>
-<text x="191" y="79" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
+<text x="191" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">RW<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 67
+ Container Address: 66
POV.POV[39:32] in container bits [7:0]
Field --validity_check--packet_out_hdr read by table table0 for a gateway expression
+Field --validity_check--packet_out_hdr written by table process_packet_out_table's action _process_packet_out
+Field --validity_check--packet_in_hdr written by table table0's action send_to_cpu
</title></text>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 68
+ Container Address: 67
ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
Field ig_intr_md_for_tm.drop_ctl written by table table0's action _drop
</title></rect>
-<text x="191" y="97" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 4
+<text x="191" y="79" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 68
+ Container Address: 67
ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
Field ig_intr_md_for_tm.drop_ctl written by table table0's action _drop
</title></text>
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 68
+
+
+</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
Unassigned
Container Bit Width: 8
@@ -3311,29 +640,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -3666,6 +994,7 @@
ig_intr_md.ingress_port[8:0] in container bits [8:0]
Field ig_intr_md.ingress_port read by table table0 for a match key
+Field ig_intr_md.ingress_port read by table table0's action send_to_cpu
</title></rect>
<text x="371" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
Assigned to Ingress
@@ -3679,6 +1008,7 @@
ig_intr_md.ingress_port[8:0] in container bits [8:0]
Field ig_intr_md.ingress_port read by table table0 for a match key
+Field ig_intr_md.ingress_port read by table table0's action send_to_cpu
</title></text>
<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 8
Assigned to Ingress
@@ -3690,7 +1020,22 @@
packet_out_hdr._padding[6:0] in container bits [6:0]
packet_in_hdr._padding[6:0] in container bits [6:0]
+Field packet_out_hdr.egress_port read by table process_packet_out_table's action _process_packet_out
+Field packet_in_hdr.ingress_port written by table table0's action send_to_cpu
</title></rect>
+<text x="371" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">RW<title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 129
+
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
+
+Field packet_out_hdr.egress_port read by table process_packet_out_table's action _process_packet_out
+Field packet_in_hdr.ingress_port written by table table0's action send_to_cpu
+</title></text>
<rect x="369" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -3698,7 +1043,9 @@
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+Field ig_intr_md_for_tm.ucast_egress_port written by table process_packet_out_table's action _process_packet_out
Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action set_egress_port
+Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action send_to_cpu
</title></rect>
<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 8
Assigned to Ingress
@@ -3707,7 +1054,9 @@
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+Field ig_intr_md_for_tm.ucast_egress_port written by table process_packet_out_table's action _process_packet_out
Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action set_egress_port
+Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action send_to_cpu
</title></text>
<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 8
Assigned to Ingress
@@ -3827,30 +1176,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -4397,7 +1743,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -4408,7 +1754,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -4417,7 +1763,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -4426,40 +1772,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -4476,7 +1821,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -4487,7 +1832,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -4496,7 +1841,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -4516,7 +1861,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -4529,7 +1874,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -4687,7 +2032,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -4697,7 +2042,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -4706,7 +2051,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -4716,7 +2061,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -4726,20 +2071,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -4758,7 +2105,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -4768,7 +2115,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -4777,7 +2124,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -4787,7 +2134,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -4961,7 +2308,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -4970,7 +2317,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -4979,7 +2326,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -4989,40 +2336,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -5065,7 +2413,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -5074,7 +2422,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -5083,7 +2431,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -5093,7 +2441,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -5103,7 +2451,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -5113,7 +2461,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -5148,7 +2496,2622 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
+
+</title></rect>
+<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 341
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="954" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 342
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="954" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 343
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 344
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 345
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 346
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 347
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 348
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 349
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 350
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 351
+ Tag-Along Space
+
+
+</title></rect>
+<text x="965" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="999" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 352
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 353
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 354
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 355
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 356
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 357
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 358
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 359
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 360
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 361
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 362
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 363
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 364
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 365
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 366
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 367
+ Tag-Along Space
+
+
+</title></rect>
+<text x="1010" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="0" y="0" width="1053" height="198" style="stroke:black; stroke-width:2; fill:none""></rect>
+</svg><br>
+<h2>Stage 1</h2>
+<svg viewBox="0 0 1280 200" preserveAspectRatio="xmlMidYMid meet">
+<rect x="9" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 0
+ Assigned to Ingress
+ Container Bit Width: 32
+ Container Address: 0
+
+POV.POV[31:0] in container bits [31:0]
+
+</title></rect>
+<rect x="9" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 0
+ Assigned to Ingress
+ Container Bit Width: 32
+ Container Address: 1
+
+ethernet.dstAddr[39:8] in container bits [31:0]
+
+</title></rect>
+<rect x="9" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 0
+ Assigned to Ingress
+ Container Bit Width: 32
+ Container Address: 2
+
+ethernet.srcAddr[31:0] in container bits [31:0]
+
+</title></rect>
+<rect x="9" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 3
+
+
+</title></rect>
+<rect x="9" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 4
+
+
+</title></rect>
+<rect x="9" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 5
+
+
+</title></rect>
+<rect x="9" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 6
+
+
+</title></rect>
+<rect x="9" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 7
+
+
+</title></rect>
+<rect x="27" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 8
+
+
+</title></rect>
+<rect x="27" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 9
+
+
+</title></rect>
+<rect x="27" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 10
+
+
+</title></rect>
+<rect x="27" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 11
+
+
+</title></rect>
+<rect x="27" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 12
+
+
+</title></rect>
+<rect x="27" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
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+</title></rect>
+<rect x="297" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 110
+
+
+</title></rect>
+<rect x="297" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 111
+
+
+</title></rect>
+<text x="290" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="324" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 112
+
+
+</title></rect>
+<rect x="324" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 113
+
+
+</title></rect>
+<rect x="324" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 114
+
+
+</title></rect>
+<rect x="324" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 115
+
+
+</title></rect>
+<rect x="324" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 116
+
+
+</title></rect>
+<rect x="324" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 117
+
+
+</title></rect>
+<rect x="324" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 118
+
+
+</title></rect>
+<rect x="324" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 119
+
+
+</title></rect>
+<rect x="342" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 120
+
+
+</title></rect>
+<rect x="342" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 121
+
+
+</title></rect>
+<rect x="342" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 122
+
+
+</title></rect>
+<rect x="342" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 123
+
+
+</title></rect>
+<rect x="342" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 124
+
+
+</title></rect>
+<rect x="342" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 125
+
+
+</title></rect>
+<rect x="342" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 126
+
+
+</title></rect>
+<rect x="342" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 127
+
+
+</title></rect>
+<text x="335" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="369" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 128
+
+ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
+ig_intr_md._pad1[0:0] in container bits [14:14]
+ig_intr_md._pad2[1:0] in container bits [13:12]
+ig_intr_md._pad3[2:0] in container bits [11:9]
+ig_intr_md.ingress_port[8:0] in container bits [8:0]
+
+Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
+</title></rect>
+<text x="371" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 128
+
+ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
+ig_intr_md._pad1[0:0] in container bits [14:14]
+ig_intr_md._pad2[1:0] in container bits [13:12]
+ig_intr_md._pad3[2:0] in container bits [11:9]
+ig_intr_md.ingress_port[8:0] in container bits [8:0]
+
+Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
+</title></text>
+<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 129
+
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
+
+</title></rect>
+<rect x="369" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 130
+
+ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+
+Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
+Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
+</title></rect>
+<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 130
+
+ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+
+Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
+Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
+</title></text>
+<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 131
+
+ethernet.dstAddr[7:0] in container bits [15:8]
+ethernet.srcAddr[47:40] in container bits [7:0]
+
+</title></rect>
+<rect x="369" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 132
+
+ethernet.etherType[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="369" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 133
+
+
+</title></rect>
+<rect x="369" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 134
+
+
+</title></rect>
+<rect x="369" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 135
+
+
+</title></rect>
+<rect x="387" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 136
+
+
+</title></rect>
+<rect x="387" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 137
+
+
+</title></rect>
+<rect x="387" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 138
+
+
+</title></rect>
+<rect x="387" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 139
+
+
+</title></rect>
+<rect x="387" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 140
+
+
+</title></rect>
+<rect x="387" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 141
+
+
+</title></rect>
+<rect x="387" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 142
+
+
+</title></rect>
+<rect x="387" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 143
+
+
+</title></rect>
+<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 144
+
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
+
+</title></rect>
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 145
+
+
+</title></rect>
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 146
+
+
+</title></rect>
+<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 147
+
+
+</title></rect>
+<rect x="414" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 148
+
+
+</title></rect>
+<rect x="414" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 149
+
+
+</title></rect>
+<rect x="414" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 150
+
+
+</title></rect>
+<rect x="414" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 151
+
+
+</title></rect>
+<rect x="432" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 152
+
+
+</title></rect>
+<rect x="432" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 153
+
+
+</title></rect>
+<rect x="432" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 154
+
+
+</title></rect>
+<rect x="432" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 155
+
+
+</title></rect>
+<rect x="432" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 156
+
+
+</title></rect>
+<rect x="432" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 157
+
+
+</title></rect>
+<rect x="432" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 158
+
+
+</title></rect>
+<rect x="432" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 159
+
+
+</title></rect>
+<text x="425" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="459" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 160
+
+
+</title></rect>
+<rect x="459" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 161
+
+
+</title></rect>
+<rect x="459" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 162
+
+
+</title></rect>
+<rect x="459" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 163
+
+
+</title></rect>
+<rect x="459" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 164
+
+
+</title></rect>
+<rect x="459" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 165
+
+
+</title></rect>
+<rect x="459" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 166
+
+
+</title></rect>
+<rect x="459" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 167
+
+
+</title></rect>
+<rect x="477" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 168
+
+
+</title></rect>
+<rect x="477" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 169
+
+
+</title></rect>
+<rect x="477" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 170
+
+
+</title></rect>
+<rect x="477" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 171
+
+
+</title></rect>
+<rect x="477" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 172
+
+
+</title></rect>
+<rect x="477" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 173
+
+
+</title></rect>
+<rect x="477" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 174
+
+
+</title></rect>
+<rect x="477" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 175
+
+
+</title></rect>
+<text x="470" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="504" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 176
+
+
+</title></rect>
+<rect x="504" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 177
+
+
+</title></rect>
+<rect x="504" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 178
+
+
+</title></rect>
+<rect x="504" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 179
+
+
+</title></rect>
+<rect x="504" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 180
+
+
+</title></rect>
+<rect x="504" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 181
+
+
+</title></rect>
+<rect x="504" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 182
+
+
+</title></rect>
+<rect x="504" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 183
+
+
+</title></rect>
+<rect x="522" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 184
+
+
+</title></rect>
+<rect x="522" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 185
+
+
+</title></rect>
+<rect x="522" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 186
+
+
+</title></rect>
+<rect x="522" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 187
+
+
+</title></rect>
+<rect x="522" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 188
+
+
+</title></rect>
+<rect x="522" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 189
+
+
+</title></rect>
+<rect x="522" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 190
+
+
+</title></rect>
+<rect x="522" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 191
+
+
+</title></rect>
+<text x="515" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="549" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 192
+
+
+</title></rect>
+<rect x="549" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 193
+
+
+</title></rect>
+<rect x="549" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 194
+
+
+</title></rect>
+<rect x="549" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 195
+
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+ipv4.ttl[7:0] in container bits [31:24]
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+</title></rect>
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+ipv4.dstAddr[31:0] in container bits [31:0]
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+</title></rect>
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+tcp.dataOffset[3:0] in container bits [31:28]
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+udp.length_[15:0] in container bits [31:16]
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+udp.checksum[15:0] in container bits [15:0]
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+</title></rect>
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+tcp.checksum[15:0] in container bits [31:16]
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+</title></rect>
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+</title></rect>
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+ipv4.ttl[7:0] in container bits [31:24]
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+</title></rect>
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+ipv4.srcAddr[31:0] in container bits [31:0]
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+</title></rect>
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+ipv4.dstAddr[31:0] in container bits [31:0]
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+
+udp.length_[15:0] in container bits [31:16]
+tcp.ackNo[31:0] in container bits [31:0]
+udp.checksum[15:0] in container bits [15:0]
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+</title></rect>
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+</title></rect>
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+tcp.checksum[15:0] in container bits [31:16]
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+</title></rect>
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+ethernet.dstAddr[39:8] in container bits [31:0]
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+</title></rect>
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+ethernet.srcAddr[31:0] in container bits [31:0]
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+</title></rect>
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+ipv4.version[3:0] in container bits [7:4]
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+ipv4.diffserv[7:0] in container bits [7:0]
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+</title></rect>
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+tcp.srcPort[15:8] in container bits [7:0]
+udp.srcPort[15:8] in container bits [7:0]
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+</title></rect>
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+tcp.srcPort[7:0] in container bits [7:0]
+udp.srcPort[7:0] in container bits [7:0]
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+</title></rect>
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+ Container Address: 292
+ Tag-Along Space
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+tcp.dstPort[15:8] in container bits [7:0]
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+tcp.dstPort[7:0] in container bits [7:0]
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+</title></rect>
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+</title></rect>
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+ipv4.version[3:0] in container bits [7:4]
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+</title></rect>
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+ Container Bit Width: 8
+ Container Address: 297
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+ipv4.diffserv[7:0] in container bits [7:0]
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+tcp.srcPort[15:8] in container bits [7:0]
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+</title></rect>
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+tcp.srcPort[7:0] in container bits [7:0]
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+ethernet.dstAddr[47:40] in container bits [7:0]
+
+</title></rect>
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+ethernet.srcAddr[39:32] in container bits [7:0]
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+</title></rect>
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+</title></rect>
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+</title></rect>
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+</title></rect>
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+</title></rect>
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+
+</title></rect>
+<rect x="864" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 308
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 309
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 310
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 311
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 312
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 313
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 314
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 315
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 316
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 317
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 318
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 319
+ Tag-Along Space
+
+
+</title></rect>
+<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 320
+ Tag-Along Space
+
+ipv4.totalLen[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 321
+ Tag-Along Space
+
+ipv4.identification[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 322
+ Tag-Along Space
+
+ipv4.flags[2:0] in container bits [15:13]
+ipv4.fragOffset[12:0] in container bits [12:0]
+
+</title></rect>
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 323
+ Tag-Along Space
+
+tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 324
+ Tag-Along Space
+
+tcp.seqNo[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 325
+ Tag-Along Space
+
+tcp.ackNo[31:16] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 326
+ Tag-Along Space
+
+tcp.ackNo[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
+ipv4.totalLen[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 333
+ Tag-Along Space
+
+ipv4.identification[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 334
+ Tag-Along Space
+
+ipv4.flags[2:0] in container bits [15:13]
+ipv4.fragOffset[12:0] in container bits [12:0]
+
+</title></rect>
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 335
+ Tag-Along Space
+
+tcp.dstPort[15:0] in container bits [15:0]
+
+</title></rect>
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 336
+ Tag-Along Space
+
+tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 337
+ Tag-Along Space
+
+tcp.seqNo[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 21
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 338
+ Tag-Along Space
+
+ethernet.dstAddr[7:0] in container bits [15:8]
+ethernet.srcAddr[47:40] in container bits [7:0]
+
+</title></rect>
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 21
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 339
+ Tag-Along Space
+
+ethernet.etherType[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 340
+ Tag-Along Space
+
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -5828,12 +5791,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -5841,31 +5804,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -5946,29 +5908,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -6300,21 +6261,7 @@
ig_intr_md._pad3[2:0] in container bits [11:9]
ig_intr_md.ingress_port[8:0] in container bits [8:0]
-Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
</title></rect>
-<text x="371" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 128
-
-ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
-ig_intr_md._pad1[0:0] in container bits [14:14]
-ig_intr_md._pad2[1:0] in container bits [13:12]
-ig_intr_md._pad3[2:0] in container bits [11:9]
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
-</title></text>
<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -6333,19 +6280,7 @@
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
-Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
</title></rect>
-<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 130
-
-ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
-Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
-</title></text>
<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -6441,30 +6376,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -7011,7 +6943,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -7022,7 +6954,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -7031,7 +6963,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -7040,40 +6972,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -7090,7 +7021,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -7101,7 +7032,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -7110,7 +7041,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -7130,7 +7061,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -7143,7 +7074,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -7301,7 +7232,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -7311,7 +7242,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -7320,7 +7251,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -7330,7 +7261,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -7340,20 +7271,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -7372,7 +7305,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -7382,7 +7315,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -7391,7 +7324,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -7401,7 +7334,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -7575,7 +7508,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -7584,7 +7517,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -7593,7 +7526,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -7603,40 +7536,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -7679,7 +7613,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -7688,7 +7622,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -7697,7 +7631,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -7707,7 +7641,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -7717,7 +7651,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -7727,7 +7661,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -7762,7 +7696,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -8442,12 +8378,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -8455,31 +8391,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -8560,29 +8495,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -9029,30 +8963,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -9599,7 +9530,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -9610,7 +9541,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -9619,7 +9550,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -9628,40 +9559,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -9678,7 +9608,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -9689,7 +9619,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -9698,7 +9628,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -9718,7 +9648,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -9731,7 +9661,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -9889,7 +9819,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -9899,7 +9829,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -9908,7 +9838,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -9918,7 +9848,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -9928,20 +9858,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -9960,7 +9892,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -9970,7 +9902,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -9979,7 +9911,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -9989,7 +9921,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -10163,7 +10095,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -10172,7 +10104,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -10181,7 +10113,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -10191,40 +10123,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -10267,7 +10200,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -10276,7 +10209,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -10285,7 +10218,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -10295,7 +10228,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -10305,7 +10238,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -10315,7 +10248,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -10350,7 +10283,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -11030,12 +10965,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -11043,31 +10978,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -11148,29 +11082,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -11617,30 +11550,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -12187,7 +12117,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -12198,7 +12128,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -12207,7 +12137,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -12216,40 +12146,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -12266,7 +12195,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -12277,7 +12206,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -12286,7 +12215,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -12306,7 +12235,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -12319,7 +12248,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -12477,7 +12406,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -12487,7 +12416,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -12496,7 +12425,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -12506,7 +12435,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -12516,20 +12445,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -12548,7 +12479,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -12558,7 +12489,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -12567,7 +12498,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -12577,7 +12508,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -12751,7 +12682,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -12760,7 +12691,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -12769,7 +12700,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -12779,40 +12710,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -12855,7 +12787,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -12864,7 +12796,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -12873,7 +12805,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -12883,7 +12815,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -12893,7 +12825,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -12903,7 +12835,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -12938,7 +12870,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -13618,12 +13552,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -13631,31 +13565,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -13736,29 +13669,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -14205,30 +14137,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -14775,7 +14704,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -14786,7 +14715,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -14795,7 +14724,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -14804,40 +14733,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -14854,7 +14782,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -14865,7 +14793,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -14874,7 +14802,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -14894,7 +14822,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -14907,7 +14835,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -15065,7 +14993,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -15075,7 +15003,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -15084,7 +15012,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -15094,7 +15022,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -15104,20 +15032,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -15136,7 +15066,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -15146,7 +15076,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -15155,7 +15085,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -15165,7 +15095,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -15339,7 +15269,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -15348,7 +15278,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -15357,7 +15287,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -15367,40 +15297,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -15443,7 +15374,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -15452,7 +15383,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -15461,7 +15392,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -15471,7 +15402,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -15481,7 +15412,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -15491,7 +15422,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -15526,7 +15457,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -16206,12 +16139,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -16219,31 +16152,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -16324,29 +16256,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -16793,30 +16724,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -17363,7 +17291,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -17374,7 +17302,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -17383,7 +17311,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -17392,40 +17320,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -17442,7 +17369,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -17453,7 +17380,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -17462,7 +17389,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -17482,7 +17409,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -17495,7 +17422,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -17653,7 +17580,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -17663,7 +17590,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -17672,7 +17599,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -17682,7 +17609,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -17692,20 +17619,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -17724,7 +17653,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -17734,7 +17663,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -17743,7 +17672,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -17753,7 +17682,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -17927,7 +17856,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -17936,7 +17865,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -17945,7 +17874,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -17955,40 +17884,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -18031,7 +17961,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -18040,7 +17970,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -18049,7 +17979,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -18059,7 +17989,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -18069,7 +17999,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -18079,7 +18009,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -18114,7 +18044,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -18794,12 +18726,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -18807,31 +18739,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -18912,29 +18843,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -19381,30 +19311,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -19951,7 +19878,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -19962,7 +19889,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -19971,7 +19898,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -19980,40 +19907,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -20030,7 +19956,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -20041,7 +19967,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -20050,7 +19976,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -20070,7 +19996,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -20083,7 +20009,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -20241,7 +20167,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -20251,7 +20177,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -20260,7 +20186,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -20270,7 +20196,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -20280,20 +20206,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -20312,7 +20240,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -20322,7 +20250,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -20331,7 +20259,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -20341,7 +20269,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -20515,7 +20443,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -20524,7 +20452,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -20533,7 +20461,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -20543,40 +20471,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -20619,7 +20548,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -20628,7 +20557,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -20637,7 +20566,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -20647,7 +20576,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -20657,7 +20586,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -20667,7 +20596,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -20702,7 +20631,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -21382,12 +21313,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -21395,31 +21326,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -21500,29 +21430,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -21969,30 +21898,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -22539,7 +22465,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -22550,7 +22476,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -22559,7 +22485,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -22568,40 +22494,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -22618,7 +22543,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -22629,7 +22554,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -22638,7 +22563,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -22658,7 +22583,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -22671,7 +22596,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -22829,7 +22754,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -22839,7 +22764,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -22848,7 +22773,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -22858,7 +22783,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -22868,20 +22793,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -22900,7 +22827,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -22910,7 +22837,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -22919,7 +22846,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -22929,7 +22856,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -23103,7 +23030,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -23112,7 +23039,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -23121,7 +23048,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -23131,40 +23058,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -23207,7 +23135,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -23216,7 +23144,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -23225,7 +23153,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -23235,7 +23163,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -23245,7 +23173,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -23255,7 +23183,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -23290,7 +23218,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -23970,12 +23900,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -23983,31 +23913,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -24088,29 +24017,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -24557,30 +24485,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -25127,7 +25052,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -25138,7 +25063,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -25147,7 +25072,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -25156,40 +25081,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -25206,7 +25130,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -25217,7 +25141,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -25226,7 +25150,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -25246,7 +25170,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -25259,7 +25183,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -25417,7 +25341,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -25427,7 +25351,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -25436,7 +25360,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -25446,7 +25370,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -25456,20 +25380,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -25488,7 +25414,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -25498,7 +25424,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -25507,7 +25433,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -25517,7 +25443,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -25691,7 +25617,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -25700,7 +25626,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -25709,7 +25635,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -25719,40 +25645,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -25795,7 +25722,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -25804,7 +25731,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -25813,7 +25740,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -25823,7 +25750,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -25833,7 +25760,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -25843,7 +25770,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -25878,7 +25805,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -26558,12 +26487,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -26571,31 +26500,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -26676,29 +26604,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -27145,30 +27072,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -27715,7 +27639,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -27726,7 +27650,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -27735,7 +27659,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -27744,40 +27668,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -27794,7 +27717,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -27805,7 +27728,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -27814,7 +27737,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -27834,7 +27757,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -27847,7 +27770,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -28005,7 +27928,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -28015,7 +27938,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -28024,7 +27947,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -28034,7 +27957,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -28044,20 +27967,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -28076,7 +28001,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -28086,7 +28011,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -28095,7 +28020,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -28105,7 +28030,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -28279,7 +28204,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -28288,7 +28213,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -28297,7 +28222,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -28307,40 +28232,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -28383,7 +28309,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -28392,7 +28318,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -28401,7 +28327,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -28411,7 +28337,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -28421,7 +28347,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -28431,7 +28357,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -28466,7 +28392,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -29146,12 +29074,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -29159,31 +29087,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -29264,29 +29191,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -29733,30 +29659,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -30303,7 +30226,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -30314,7 +30237,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -30323,7 +30246,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -30332,40 +30255,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -30382,7 +30304,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -30393,7 +30315,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -30402,7 +30324,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -30422,7 +30344,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -30435,7 +30357,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -30593,7 +30515,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -30603,7 +30525,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -30612,7 +30534,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -30622,7 +30544,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -30632,20 +30554,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -30664,7 +30588,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -30674,7 +30598,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -30683,7 +30607,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -30693,7 +30617,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -30867,7 +30791,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -30876,7 +30800,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -30885,7 +30809,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -30895,40 +30819,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -30971,7 +30896,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -30980,7 +30905,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -30989,7 +30914,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -30999,7 +30924,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -31009,7 +30934,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -31019,7 +30944,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -31054,7 +30979,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -31277,7 +31204,7 @@
<text x="1010" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
<rect x="0" y="0" width="1053" height="198" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
-<br><i>Created on Thu Sep 7 13:56:21 2017</i>
+<br><i>Created on Fri Sep 8 08:23:59 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
</body>
</html>
\ No newline at end of file
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/table_placement.html b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/table_placement.html
index 3f145db..d157ab2 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/table_placement.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/visualization/table_placement.html
@@ -4,9 +4,12 @@
<h2>Pipeline 0</h2>
<svg viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
-<rect x="0" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
-<rect x="13" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
-<rect x="26" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="0" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:aquamarine""><title>TCAM for table0</title></rect>
+<rect x="13" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:aquamarine""><title>TCAM for table0</title></rect>
+<rect x="26" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:aquamarine""><title>TCAM for table0</title></rect>
+<rect x="0" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:aquamarine""><title>SRAM for table0</title></rect>
+<rect x="13" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:blue""><title>SRAM for table0_counter</title></rect>
+<rect x="26" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:blue""><title>SRAM for table0_counter</title></rect>
<rect x="39" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="52" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="65" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
@@ -84,9 +87,6 @@
<rect x="65" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="78" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="91" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
-<rect x="0" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
-<rect x="13" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
-<rect x="26" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="39" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="52" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="65" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
@@ -110,13 +110,10 @@
<rect x="91" y="195" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="0" y="26" width="104" height="182" style="stroke:black; stroke-width:2; fill:none""></rect>
<text x="41" y="245" textLength="24" lengthAdjust="spacingAndGlyphs" textHeight="24" heightAdjust="spacingAndGlyphs" style="fill:black;">0</text>
-<rect x="117" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:blueviolet""><title>TCAM for table0</title></rect>
-<rect x="130" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:blueviolet""><title>TCAM for table0</title></rect>
-<rect x="143" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:blueviolet""><title>TCAM for table0</title></rect>
-<rect x="117" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:blueviolet""><title>SRAM for table0</title></rect>
-<rect x="130" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:yellow""><title>SRAM for table0_counter</title></rect>
-<rect x="143" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:yellow""><title>SRAM for table0_counter</title></rect>
-<rect x="156" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="117" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chocolate""><title>SRAM for ingress_port_counter</title></rect>
+<rect x="130" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chocolate""><title>SRAM for ingress_port_counter</title></rect>
+<rect x="143" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:coral""><title>SRAM for egress_port_counter</title></rect>
+<rect x="156" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:coral""><title>SRAM for egress_port_counter</title></rect>
<rect x="169" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="182" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="195" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
@@ -193,6 +190,9 @@
<rect x="182" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="195" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="208" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="117" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
+<rect x="130" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
+<rect x="143" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="156" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="169" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="182" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
@@ -216,10 +216,10 @@
<rect x="208" y="195" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="117" y="26" width="104" height="182" style="stroke:black; stroke-width:2; fill:none""></rect>
<text x="158" y="245" textLength="24" lengthAdjust="spacingAndGlyphs" textHeight="24" heightAdjust="spacingAndGlyphs" style="fill:black;">1</text>
-<rect x="234" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chocolate""><title>SRAM for ingress_port_counter</title></rect>
-<rect x="247" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chocolate""><title>SRAM for ingress_port_counter</title></rect>
-<rect x="260" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:coral""><title>SRAM for egress_port_counter</title></rect>
-<rect x="273" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:coral""><title>SRAM for egress_port_counter</title></rect>
+<rect x="234" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="247" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="260" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="273" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="286" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="299" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="312" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
@@ -1277,17 +1277,16 @@
<rect x="585" y="260" width="104" height="182" style="stroke:black; stroke-width:2; fill:none""></rect>
<text x="626" y="479" textLength="24" lengthAdjust="spacingAndGlyphs" textHeight="24" heightAdjust="spacingAndGlyphs" style="fill:black;">11</text>
<text x="834" y="89" style="fill:black; font-weight:bold;">Legend</text>
-<text x="860" y="128" style="fill:black; font-weight:bold;">Ingress Tables</text>
-<rect x="832" y="143" width="26" height="26" style="stroke:black; stroke-width:1; fill:coral""><title>egress_port_counter</title></rect>
-<text x="860" y="167" style="fill:black;">egress_port_counter</text>
-<rect x="832" y="182" width="26" height="26" style="stroke:black; stroke-width:1; fill:chocolate""><title>ingress_port_counter</title></rect>
-<text x="860" y="206" style="fill:black;">ingress_port_counter</text>
-<rect x="832" y="221" width="26" height="26" style="stroke:black; stroke-width:1; fill:blueviolet""><title>table0</title></rect>
-<text x="860" y="245" style="fill:black;">table0</text>
-<rect x="832" y="260" width="26" height="26" style="stroke:black; stroke-width:1; fill:yellow""><title>table0_counter</title></rect>
-<text x="860" y="284" style="fill:black;">table0_counter</text>
-<rect x="806" y="39" width="390" height="286" style="stroke:black; stroke-width:1; fill:none""></rect>
-<rect x="819" y="52" width="364" height="260" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="832" y="104" width="26" height="26" style="stroke:black; stroke-width:1; fill:coral""><title>egress_port_counter</title></rect>
+<text x="860" y="128" style="fill:black;">egress_port_counter</text>
+<rect x="832" y="143" width="26" height="26" style="stroke:black; stroke-width:1; fill:chocolate""><title>ingress_port_counter</title></rect>
+<text x="860" y="167" style="fill:black;">ingress_port_counter</text>
+<rect x="832" y="182" width="26" height="26" style="stroke:black; stroke-width:1; fill:aquamarine""><title>table0</title></rect>
+<text x="860" y="206" style="fill:black;">table0</text>
+<rect x="832" y="221" width="26" height="26" style="stroke:black; stroke-width:1; fill:blue""><title>table0_counter</title></rect>
+<text x="860" y="245" style="fill:black;">table0_counter</text>
+<rect x="806" y="39" width="390" height="247" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="819" y="52" width="364" height="221" style="stroke:black; stroke-width:1; fill:none""></rect>
<rect x="0" y="0" width="754" height="728" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
<table border="1">
@@ -1316,19 +1315,7 @@
<td align="center">0</td>
</tr>
<tr>
-<td align="center">_condition_3</td>
-<td align="center">0</td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-</tr>
-<tr>
-<td align="center">ingress_pkt__action__</td>
+<td align="center">process_packet_out_table__action__</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1340,56 +1327,20 @@
<td align="center">0</td>
</tr>
<tr>
-<td align="center">ingress_pkt</td>
+<td align="center">process_packet_out_table</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">1</td>
-</tr>
-<tr>
-<td align="center">egress_pkt__action__</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-</tr>
-<tr>
-<td align="center">egress_pkt</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">1</td>
-</tr>
-<tr>
-<td align="center">_condition_1</td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center">1</td>
<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
-<td align="center">0</td>
+<td align="center">1</td>
</tr>
<tr>
<td align="center">table0__action__</td>
-<td align="center">1</td>
+<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1401,7 +1352,7 @@
</tr>
<tr>
<td align="center">table0</td>
-<td align="center">1</td>
+<td align="center">0</td>
<td align="center">16</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1413,7 +1364,7 @@
</tr>
<tr>
<td align="center">table0_counter</td>
-<td align="center">1</td>
+<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1425,7 +1376,7 @@
</tr>
<tr>
<td align="center">_condition_2</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">2</td>
<td align="center">9</td>
<td align="center">1</td>
@@ -1437,7 +1388,7 @@
</tr>
<tr>
<td align="center">ingress_port_count_table__action__</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1449,7 +1400,7 @@
</tr>
<tr>
<td align="center">ingress_port_count_table</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1461,7 +1412,7 @@
</tr>
<tr>
<td align="center">egress_port_count_table__action__</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1473,7 +1424,7 @@
</tr>
<tr>
<td align="center">egress_port_count_table</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">1</td>
@@ -1485,7 +1436,7 @@
</tr>
<tr>
<td align="center">ingress_port_counter</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1497,7 +1448,7 @@
</tr>
<tr>
<td align="center">egress_port_counter</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1508,7 +1459,7 @@
<td align="center">0</td>
</tr>
</table>
-<br><i>Created on Thu Sep 7 13:56:21 2017</i>
+<br><i>Created on Fri Sep 8 08:23:58 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
</body>
</html>
\ No newline at end of file
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/context.json b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/context.json
index 581d443..4c129d7 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/context.json
@@ -1,5 +1,5 @@
{
- "build_date": "Thu Sep 7 13:57:09 2017",
+ "build_date": "Fri Sep 8 08:24:46 2017",
"phv_allocation": [
{
"ingress": [
@@ -26,7 +26,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -43,7 +43,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -60,15 +60,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -77,15 +77,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -94,692 +94,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -821,20 +135,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -848,11 +191,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -865,28 +220,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -898,7 +299,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -923,11 +324,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -944,7 +910,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -961,7 +927,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -973,7 +939,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -985,7 +951,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1002,7 +968,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -1014,7 +980,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -1026,7 +992,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -1038,7 +1004,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -1050,7 +1016,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1079,7 +1045,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1096,7 +1062,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -1113,7 +1079,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -1130,7 +1096,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -1142,7 +1108,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -1176,7 +1142,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1188,7 +1154,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1205,7 +1171,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -1217,7 +1183,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -1234,7 +1200,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -1251,7 +1217,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -1268,7 +1234,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1285,7 +1251,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1331,7 +1297,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1348,7 +1314,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -1360,7 +1326,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1377,7 +1343,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1394,7 +1360,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -1406,7 +1372,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -1423,7 +1389,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1449,6 +1415,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -1480,7 +1458,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -1497,7 +1475,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -1514,15 +1492,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -1531,15 +1509,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -1548,692 +1526,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -2275,20 +1567,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -2302,11 +1623,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -2319,28 +1652,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -2352,7 +1731,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -2377,11 +1756,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -2398,7 +2342,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -2415,7 +2359,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -2427,7 +2371,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -2439,7 +2383,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2456,7 +2400,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -2468,7 +2412,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -2480,7 +2424,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -2492,7 +2436,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -2504,7 +2448,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2533,7 +2477,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2550,7 +2494,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -2567,7 +2511,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -2584,7 +2528,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -2596,7 +2540,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -2630,7 +2574,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2642,7 +2586,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2659,7 +2603,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -2671,7 +2615,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -2688,7 +2632,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -2705,7 +2649,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -2722,7 +2666,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2739,7 +2683,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2785,7 +2729,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2802,7 +2746,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -2814,7 +2758,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2831,7 +2775,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2848,7 +2792,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -2860,7 +2804,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -2877,7 +2821,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2903,6 +2847,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -2934,7 +2890,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -2951,7 +2907,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -2968,15 +2924,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -2985,15 +2941,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -3002,692 +2958,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -3729,20 +2999,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -3756,11 +3055,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -3773,28 +3084,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -3806,7 +3163,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -3831,11 +3188,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -3852,7 +3774,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -3869,7 +3791,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -3881,7 +3803,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -3893,7 +3815,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3910,7 +3832,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -3922,7 +3844,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -3934,7 +3856,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -3946,7 +3868,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -3958,7 +3880,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3987,7 +3909,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4004,7 +3926,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -4021,7 +3943,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -4038,7 +3960,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -4050,7 +3972,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -4084,7 +4006,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4096,7 +4018,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4113,7 +4035,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -4125,7 +4047,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -4142,7 +4064,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -4159,7 +4081,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -4176,7 +4098,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4193,7 +4115,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4239,7 +4161,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4256,7 +4178,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -4268,7 +4190,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4285,7 +4207,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4302,7 +4224,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -4314,7 +4236,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -4331,7 +4253,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4357,6 +4279,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -4388,7 +4322,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -4405,7 +4339,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -4422,15 +4356,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -4439,15 +4373,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -4456,692 +4390,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -5183,20 +4431,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -5210,11 +4487,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -5227,28 +4516,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -5260,7 +4595,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -5285,11 +4620,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -5306,7 +5206,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -5323,7 +5223,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -5335,7 +5235,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -5347,7 +5247,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5364,7 +5264,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -5376,7 +5276,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -5388,7 +5288,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -5400,7 +5300,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -5412,7 +5312,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5441,7 +5341,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5458,7 +5358,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -5475,7 +5375,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -5492,7 +5392,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -5504,7 +5404,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -5538,7 +5438,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5550,7 +5450,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5567,7 +5467,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -5579,7 +5479,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -5596,7 +5496,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -5613,7 +5513,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -5630,7 +5530,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5647,7 +5547,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5693,7 +5593,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5710,7 +5610,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -5722,7 +5622,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5739,7 +5639,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5756,7 +5656,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -5768,7 +5668,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -5785,7 +5685,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5811,6 +5711,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -5842,7 +5754,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -5859,7 +5771,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -5876,15 +5788,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -5893,15 +5805,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -5910,692 +5822,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
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- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -6637,20 +5863,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -6664,11 +5919,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -6681,28 +5948,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -6714,7 +6027,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -6739,11 +6052,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -6760,7 +6638,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -6777,7 +6655,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -6789,7 +6667,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -6801,7 +6679,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6818,7 +6696,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -6830,7 +6708,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -6842,7 +6720,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -6854,7 +6732,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -6866,7 +6744,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6895,7 +6773,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6912,7 +6790,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -6929,7 +6807,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -6946,7 +6824,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -6958,7 +6836,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -6992,7 +6870,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7004,7 +6882,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7021,7 +6899,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -7033,7 +6911,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -7050,7 +6928,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -7067,7 +6945,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -7084,7 +6962,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7101,7 +6979,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7147,7 +7025,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7164,7 +7042,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -7176,7 +7054,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7193,7 +7071,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7210,7 +7088,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -7222,7 +7100,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -7239,7 +7117,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7265,6 +7143,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -7296,7 +7186,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -7313,7 +7203,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -7330,15 +7220,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -7347,15 +7237,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -7364,692 +7254,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -8091,20 +7295,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -8118,11 +7351,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -8135,28 +7380,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -8168,7 +7459,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -8193,11 +7484,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -8214,7 +8070,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -8231,7 +8087,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -8243,7 +8099,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -8255,7 +8111,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8272,7 +8128,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -8284,7 +8140,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -8296,7 +8152,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -8308,7 +8164,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -8320,7 +8176,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8349,7 +8205,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8366,7 +8222,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -8383,7 +8239,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -8400,7 +8256,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -8412,7 +8268,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -8446,7 +8302,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8458,7 +8314,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8475,7 +8331,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -8487,7 +8343,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -8504,7 +8360,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -8521,7 +8377,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -8538,7 +8394,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8555,7 +8411,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8601,7 +8457,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8618,7 +8474,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -8630,7 +8486,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8647,7 +8503,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8664,7 +8520,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -8676,7 +8532,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -8693,7 +8549,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8719,6 +8575,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -8750,7 +8618,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -8767,7 +8635,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -8784,15 +8652,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -8801,15 +8669,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -8818,692 +8686,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -9545,20 +8727,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -9572,11 +8783,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -9589,28 +8812,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -9622,7 +8891,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -9647,11 +8916,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -9668,7 +9502,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -9685,7 +9519,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -9697,7 +9531,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -9709,7 +9543,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9726,7 +9560,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -9738,7 +9572,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -9750,7 +9584,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -9762,7 +9596,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -9774,7 +9608,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9803,7 +9637,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9820,7 +9654,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -9837,7 +9671,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -9854,7 +9688,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -9866,7 +9700,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -9900,7 +9734,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9912,7 +9746,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9929,7 +9763,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -9941,7 +9775,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -9958,7 +9792,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -9975,7 +9809,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -9992,7 +9826,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10009,7 +9843,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10055,7 +9889,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10072,7 +9906,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -10084,7 +9918,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10101,7 +9935,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10118,7 +9952,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -10130,7 +9964,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -10147,7 +9981,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10173,6 +10007,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -10204,7 +10050,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -10221,7 +10067,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -10238,15 +10084,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -10255,15 +10101,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -10272,692 +10118,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
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- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
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- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
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- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
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- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -10999,20 +10159,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -11026,11 +10215,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -11043,28 +10244,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -11076,7 +10323,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -11101,11 +10348,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -11122,7 +10934,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -11139,7 +10951,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -11151,7 +10963,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -11163,7 +10975,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11180,7 +10992,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -11192,7 +11004,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -11204,7 +11016,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -11216,7 +11028,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -11228,7 +11040,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11257,7 +11069,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11274,7 +11086,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -11291,7 +11103,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -11308,7 +11120,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -11320,7 +11132,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -11354,7 +11166,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11366,7 +11178,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11383,7 +11195,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -11395,7 +11207,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -11412,7 +11224,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -11429,7 +11241,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -11446,7 +11258,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11463,7 +11275,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11509,7 +11321,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11526,7 +11338,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -11538,7 +11350,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11555,7 +11367,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11572,7 +11384,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -11584,7 +11396,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -11601,7 +11413,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11627,6 +11439,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -11658,7 +11482,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -11675,7 +11499,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -11692,15 +11516,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -11709,15 +11533,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -11726,692 +11550,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
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- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
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- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
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- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -12453,20 +11591,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -12480,11 +11647,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -12497,28 +11676,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -12530,7 +11755,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -12555,11 +11780,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12576,7 +12366,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12593,7 +12383,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12605,7 +12395,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -12617,7 +12407,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12634,7 +12424,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -12646,7 +12436,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -12658,7 +12448,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -12670,7 +12460,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -12682,7 +12472,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12711,7 +12501,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12728,7 +12518,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -12745,7 +12535,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12762,7 +12552,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -12774,7 +12564,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -12808,7 +12598,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12820,7 +12610,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12837,7 +12627,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -12849,7 +12639,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -12866,7 +12656,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -12883,7 +12673,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -12900,7 +12690,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12917,7 +12707,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12963,7 +12753,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12980,7 +12770,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12992,7 +12782,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13009,7 +12799,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13026,7 +12816,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -13038,7 +12828,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -13055,7 +12845,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13081,6 +12871,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -13112,7 +12914,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -13129,7 +12931,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -13146,15 +12948,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -13163,15 +12965,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -13180,692 +12982,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -13907,20 +13023,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -13934,11 +13079,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -13951,28 +13108,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -13984,7 +13187,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -14009,11 +13212,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -14030,7 +13798,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -14047,7 +13815,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -14059,7 +13827,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -14071,7 +13839,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14088,7 +13856,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -14100,7 +13868,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -14112,7 +13880,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -14124,7 +13892,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -14136,7 +13904,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14165,7 +13933,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14182,7 +13950,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -14199,7 +13967,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -14216,7 +13984,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -14228,7 +13996,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -14262,7 +14030,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14274,7 +14042,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14291,7 +14059,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -14303,7 +14071,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -14320,7 +14088,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -14337,7 +14105,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -14354,7 +14122,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14371,7 +14139,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14417,7 +14185,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14434,7 +14202,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -14446,7 +14214,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14463,7 +14231,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14480,7 +14248,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -14492,7 +14260,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -14509,7 +14277,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14535,6 +14303,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -14566,7 +14346,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -14583,7 +14363,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -14600,15 +14380,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -14617,15 +14397,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -14634,692 +14414,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -15361,20 +14455,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -15388,11 +14511,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -15405,28 +14540,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -15438,7 +14619,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -15463,11 +14644,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
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+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
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+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
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+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
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+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
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+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15484,7 +15230,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15501,7 +15247,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15513,7 +15259,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -15525,7 +15271,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15542,7 +15288,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -15554,7 +15300,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -15566,7 +15312,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -15578,7 +15324,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -15590,7 +15336,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15619,7 +15365,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15636,7 +15382,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -15653,7 +15399,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15670,7 +15416,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -15682,7 +15428,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -15716,7 +15462,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15728,7 +15474,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15745,7 +15491,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -15757,7 +15503,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -15774,7 +15520,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -15791,7 +15537,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -15808,7 +15554,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15825,7 +15571,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15871,7 +15617,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15888,7 +15634,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15900,7 +15646,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15917,7 +15663,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15934,7 +15680,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -15946,7 +15692,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -15963,7 +15709,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15989,6 +15735,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -16020,7 +15778,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -16037,7 +15795,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -16054,15 +15812,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 13,
+ "position_offset": 21,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
+ "field_msb": 47,
+ "phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 40
}
]
},
@@ -16071,15 +15829,15 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 66,
"phv_lsb": 0,
"is_pov": false,
- "field_msb": 47,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
+ "field_name": "ethernet_srcAddr",
"field_width": 6,
- "field_lsb": 40
+ "field_lsb": 32
}
]
},
@@ -16088,692 +15846,6 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 67,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 77,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 78,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 79,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 80,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 81,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 82,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 39,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 32
- }
- ]
- },
- {
- "phv_number": 68,
- "records": [
- {
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- "position_offset": 7,
- "phv_lsb": 5,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_drop_ctl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 128,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 32,
- "phv_lsb": 15,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_resubmit_flag",
- "field_width": 1,
- "field_lsb": 0
- },
- {
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- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 129,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 0,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_out_hdr_egress_port",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 130,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_ucast_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 131,
- "records": [
- {
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- "position_offset": 22,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 67,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 47,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 40
- }
- ]
- },
- {
- "phv_number": 132,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 5,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ethernet_etherType",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 256,
- "records": [
- {
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- "position_offset": 53,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 257,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 56,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 65,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
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- "position_offset": 44,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 64,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 37,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 51,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 43,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 40,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 4,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 291,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 38,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 60,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 49,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 8,
- "phv_lsb": 13,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_flags",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 45,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 12,
- "phv_msb": 12,
- "is_compiler_generated": false,
- "field_name": "ipv4_fragOffset",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 35,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 54,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 325,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 73,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
"position_offset": 0,
"phv_lsb": 0,
"is_pov": true,
@@ -16815,20 +15887,49 @@
"hidden": false
}
],
- "field_msb": 7,
+ "field_msb": 39,
"phv_msb": 7,
"is_compiler_generated": false,
"field_name": "POV",
"field_width": 0,
+ "field_lsb": 32
+ }
+ ]
+ },
+ {
+ "phv_number": 67,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 5,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_for_tm_drop_ctl",
+ "field_width": 1,
"field_lsb": 0
}
]
},
{
- "phv_number": 144,
+ "phv_number": 128,
"records": [
{
"word_bit_width": 16,
+ "position_offset": 31,
+ "phv_lsb": 15,
+ "is_pov": false,
+ "field_msb": 0,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ig_intr_md_resubmit_flag",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
"position_offset": 9,
"phv_lsb": 0,
"is_pov": false,
@@ -16842,11 +15943,23 @@
]
},
{
- "phv_number": 145,
+ "phv_number": 129,
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 0,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_out_hdr_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 32,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -16859,28 +15972,74 @@
]
},
{
- "phv_number": 146,
+ "phv_number": 130,
"records": [
{
"word_bit_width": 16,
- "position_offset": 64,
+ "position_offset": 40,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
"phv_msb": 8,
"is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
+ "field_name": "ig_intr_md_for_tm_ucast_egress_port",
"field_width": 2,
"field_lsb": 0
}
]
},
{
- "phv_number": 264,
+ "phv_number": 131,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 21,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 66,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 47,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 40
+ }
+ ]
+ },
+ {
+ "phv_number": 132,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 5,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_etherType",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 256,
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 52,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -16892,7 +16051,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 7,
@@ -16917,11 +16076,576 @@
]
},
{
+ "phv_number": 257,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 14,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 258,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 55,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 259,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 43,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 13,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 36,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 46,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 64,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 260,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 288,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 42,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 39,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 4,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 293,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 34,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 48,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 8,
+ "phv_lsb": 13,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_flags",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 44,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 12,
+ "phv_msb": 12,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_fragOffset",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 53,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 72,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 326,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 27,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
"phv_number": 265,
"records": [
{
"word_bit_width": 32,
- "position_offset": 15,
+ "position_offset": 12,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -16938,7 +16662,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 53,
+ "position_offset": 50,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -16955,7 +16679,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 28,
+ "position_offset": 25,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -16967,7 +16691,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 19,
+ "position_offset": 16,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -16979,7 +16703,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 62,
+ "position_offset": 59,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16996,7 +16720,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 41,
+ "position_offset": 38,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -17008,7 +16732,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 61,
+ "position_offset": 58,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -17020,7 +16744,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 11,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -17032,7 +16756,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 37,
+ "position_offset": 34,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 5,
@@ -17044,7 +16768,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17073,7 +16797,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 45,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17090,7 +16814,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -17107,7 +16831,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -17124,7 +16848,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 29,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -17136,7 +16860,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 40,
+ "position_offset": 37,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 3,
@@ -17170,7 +16894,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17182,7 +16906,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17199,7 +16923,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -17211,7 +16935,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -17228,7 +16952,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -17245,7 +16969,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -17262,7 +16986,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17279,7 +17003,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17325,7 +17049,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17342,7 +17066,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -17354,7 +17078,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17371,7 +17095,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17388,7 +17112,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -17400,7 +17124,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -17417,7 +17141,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17443,6 +17167,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -17485,7 +17221,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "action_data",
"size": 0
}
@@ -17549,12 +17285,12 @@
"match_attributes": {
"stage_tables": [
{
- "default_next_table": 33,
+ "default_next_table": 17,
"action_format": [
{
"vliw_instruction_full": 64,
"next_table": 0,
- "next_table_full": 33,
+ "next_table_full": 17,
"action_handle": 536870914,
"action_name": "count_ingress",
"table_name": "egress_port_count_table",
@@ -17575,7 +17311,7 @@
1
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "match_with_no_key",
"size": 1
}
@@ -17622,7 +17358,7 @@
}
],
"logical_table_id": 1,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "action_data",
"size": 0
}
@@ -17712,7 +17448,7 @@
0
],
"logical_table_id": 1,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "match_with_no_key",
"size": 1
}
@@ -17729,7 +17465,7 @@
{
"direction": "ingress",
"handle": 33554435,
- "name": "ingress_pkt__action__",
+ "name": "process_packet_out_table__action__",
"table_type": "action",
"stage_tables": [
{
@@ -17758,137 +17494,6 @@
"number_memory_units_per_table_word": 1
}
],
- "logical_table_id": 0,
- "stage_number": 0,
- "stage_table_type": "action_data",
- "size": 0
- }
- ],
- "actions": [
- {
- "p4_parameters": [],
- "handle": 536870919,
- "name": "_packet_out",
- "indirect_resources": [],
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "allowed_as_default_action": true,
- "override_stat_addr_pfe": false,
- "override_stateful_addr_pfe": false,
- "override_meter_full_addr": 0,
- "override_stat_addr": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "override_meter_addr": false
- }
- ],
- "how_referenced": "direct",
- "size": 1024
- },
- {
- "direction": "ingress",
- "handle": 16777219,
- "name": "ingress_pkt",
- "is_resource_controllable": true,
- "table_type": "match",
- "ap_bind_indirect_res_to_match": [],
- "statistics_table_refs": [],
- "actions": [
- {
- "p4_parameters": [],
- "handle": 536870919,
- "name": "_packet_out",
- "indirect_resources": [],
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "allowed_as_default_action": true,
- "override_stat_addr_pfe": false,
- "override_stateful_addr_pfe": false,
- "override_meter_full_addr": 0,
- "override_stat_addr": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "override_meter_addr": false
- }
- ],
- "meter_table_refs": [],
- "default_action_handle": 536870919,
- "uses_range": false,
- "match_attributes": {
- "stage_tables": [
- {
- "default_next_table": 16,
- "action_format": [
- {
- "vliw_instruction_full": 65,
- "next_table": 0,
- "next_table_full": 16,
- "action_handle": 536870919,
- "action_name": "_packet_out",
- "table_name": "_condition_1",
- "immediate_fields": [],
- "vliw_instruction": 1
- }
- ],
- "memory_resource_allocation": null,
- "pack_format": [
- {
- "memory_word_width": 0,
- "entries_per_table_word": 1,
- "table_word_width": 0,
- "number_memory_units_per_table_word": 0
- }
- ],
- "result_physical_buses": [
- 1
- ],
- "logical_table_id": 0,
- "stage_number": 0,
- "stage_table_type": "match_with_no_key",
- "size": 1
- }
- ],
- "match_type": "match_with_no_key"
- },
- "stateful_table_refs": [],
- "default_next_table_mask": 0,
- "selection_table_refs": [],
- "action_data_table_refs": [],
- "match_key_fields": [],
- "size": 1024
- },
- {
- "direction": "egress",
- "handle": 33554436,
- "name": "egress_pkt__action__",
- "table_type": "action",
- "stage_tables": [
- {
- "memory_resource_allocation": null,
- "pack_format": [
- {
- "entries_per_table_word": 1,
- "action_handle": 536870922,
- "memory_word_width": 128,
- "table_word_width": 128,
- "entries": [
- {
- "entry_number": 0,
- "fields": [
- {
- "start_bit": 0,
- "field_width": 0,
- "lsb_mem_word_idx": 1,
- "source": "zero",
- "lsb_mem_word_offset": 0,
- "field_name": "--padding--"
- }
- ]
- }
- ],
- "number_memory_units_per_table_word": 1
- }
- ],
"logical_table_id": 1,
"stage_number": 0,
"stage_table_type": "action_data",
@@ -17898,8 +17503,8 @@
"actions": [
{
"p4_parameters": [],
- "handle": 536870922,
- "name": "add_packet_in_hdr",
+ "handle": 536870919,
+ "name": "_process_packet_out",
"indirect_resources": [],
"override_stat_full_addr": 0,
"override_meter_addr_pfe": false,
@@ -17917,9 +17522,9 @@
"size": 1024
},
{
- "direction": "egress",
- "handle": 16777220,
- "name": "egress_pkt",
+ "direction": "ingress",
+ "handle": 16777219,
+ "name": "process_packet_out_table",
"is_resource_controllable": true,
"table_type": "match",
"ap_bind_indirect_res_to_match": [],
@@ -17927,8 +17532,8 @@
"actions": [
{
"p4_parameters": [],
- "handle": 536870922,
- "name": "add_packet_in_hdr",
+ "handle": 536870919,
+ "name": "_process_packet_out",
"indirect_resources": [],
"override_stat_full_addr": 0,
"override_meter_addr_pfe": false,
@@ -17943,22 +17548,22 @@
}
],
"meter_table_refs": [],
- "default_action_handle": 536870922,
+ "default_action_handle": 536870919,
"uses_range": false,
"match_attributes": {
"stage_tables": [
{
- "default_next_table": 255,
+ "default_next_table": 16,
"action_format": [
{
- "vliw_instruction_full": 65,
+ "vliw_instruction_full": 68,
"next_table": 0,
- "next_table_full": 255,
- "action_handle": 536870922,
- "action_name": "add_packet_in_hdr",
- "table_name": "--END_OF_PIPELINE--",
+ "next_table_full": 16,
+ "action_handle": 536870919,
+ "action_name": "_process_packet_out",
+ "table_name": "_condition_2",
"immediate_fields": [],
- "vliw_instruction": 1
+ "vliw_instruction": 0
}
],
"memory_resource_allocation": null,
@@ -17971,7 +17576,7 @@
}
],
"result_physical_buses": [
- 0
+ 1
],
"logical_table_id": 1,
"stage_number": 0,
@@ -17990,7 +17595,7 @@
},
{
"direction": "ingress",
- "handle": 33554437,
+ "handle": 33554436,
"name": "table0__action__",
"table_type": "action",
"stage_tables": [
@@ -17999,7 +17604,7 @@
"pack_format": [
{
"entries_per_table_word": 1,
- "action_handle": 536870924,
+ "action_handle": 536870921,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -18021,7 +17626,7 @@
},
{
"entries_per_table_word": 1,
- "action_handle": 536870926,
+ "action_handle": 536870925,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -18043,7 +17648,7 @@
},
{
"entries_per_table_word": 1,
- "action_handle": 536870928,
+ "action_handle": 536870927,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -18065,7 +17670,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "action_data",
"size": 0
}
@@ -18080,7 +17685,7 @@
"bit_width": 9
}
],
- "handle": 536870924,
+ "handle": 536870921,
"name": "set_egress_port",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -18096,7 +17701,7 @@
},
{
"p4_parameters": [],
- "handle": 536870926,
+ "handle": 536870925,
"name": "send_to_cpu",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -18112,7 +17717,7 @@
},
{
"p4_parameters": [],
- "handle": 536870928,
+ "handle": 536870927,
"name": "_drop",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -18132,7 +17737,7 @@
},
{
"direction": "ingress",
- "handle": 16777221,
+ "handle": 16777220,
"name": "table0",
"is_resource_controllable": true,
"table_type": "match",
@@ -18154,7 +17759,7 @@
"bit_width": 9
}
],
- "handle": 536870924,
+ "handle": 536870921,
"name": "set_egress_port",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -18170,7 +17775,7 @@
},
{
"p4_parameters": [],
- "handle": 536870926,
+ "handle": 536870925,
"name": "send_to_cpu",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -18186,7 +17791,7 @@
},
{
"p4_parameters": [],
- "handle": 536870928,
+ "handle": 536870927,
"name": "_drop",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -18206,7 +17811,7 @@
"match_attributes": {
"stage_tables": [
{
- "default_next_table": 32,
+ "default_next_table": 16,
"memory_resource_allocation": {
"memory_units_and_vpns": [
{
@@ -18463,7 +18068,7 @@
"two_way_notification": true,
"disable_notification": false,
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "idletime",
"size": 2048
},
@@ -18472,8 +18077,8 @@
{
"vliw_instruction_full": 65,
"next_table": 0,
- "next_table_full": 32,
- "action_handle": 536870924,
+ "next_table_full": 16,
+ "action_handle": 536870921,
"action_name": "set_egress_port",
"table_name": "_condition_2",
"immediate_fields": [
@@ -18490,18 +18095,26 @@
{
"vliw_instruction_full": 66,
"next_table": 0,
- "next_table_full": 32,
- "action_handle": 536870926,
+ "next_table_full": 16,
+ "action_handle": 536870925,
"action_name": "send_to_cpu",
"table_name": "_condition_2",
- "immediate_fields": [],
+ "immediate_fields": [
+ {
+ "param_name": "--constant-0--",
+ "const_value": 192,
+ "dest_start": 0,
+ "param_type": "constant",
+ "dest_width": 9
+ }
+ ],
"vliw_instruction": 6
},
{
"vliw_instruction_full": 67,
"next_table": 0,
- "next_table_full": 32,
- "action_handle": 536870928,
+ "next_table_full": 16,
+ "action_handle": 536870927,
"action_name": "_drop",
"table_name": "_condition_2",
"immediate_fields": [],
@@ -18677,7 +18290,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_indirection",
"size": 4096
},
@@ -18685,7 +18298,7 @@
0
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_match",
"size": 512
}
@@ -18764,7 +18377,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "statistics",
"size": 4096
}
@@ -18773,7 +18386,7 @@
"packet_counter_resolution": 32,
"pfe_bit_position": 19,
"how_referenced": "indirect",
- "size": 254
+ "size": 510
},
{
"direction": "ingress",
@@ -18807,7 +18420,7 @@
}
],
"logical_table_id": 1,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "statistics",
"size": 4096
}
@@ -18816,7 +18429,7 @@
"packet_counter_resolution": 32,
"pfe_bit_position": 19,
"how_referenced": "indirect",
- "size": 254
+ "size": 510
},
{
"direction": "ingress",
@@ -18850,7 +18463,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "statistics",
"size": 4096
}
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/mau.context.json b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/mau.context.json
index bb1fa2d..df27a61 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/mau.context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/mau.context.json
@@ -1,7 +1,7 @@
{
"ProgramInfo": {
"ProgramName": "default",
- "BuildDate": "Thu Sep 7 13:57:09 2017",
+ "BuildDate": "Fri Sep 8 08:24:46 2017",
"CompilerVersion": "5.1.0"
},
"HashJsonNode": {
@@ -13,7 +13,7 @@
"EntryFormatNode": {
"ExmEntryFormat": {
"AllExmTables": [],
- "TotalExmTables": 5
+ "TotalExmTables": 4
},
"Phase0EntryFormat": {
"Phase0Action": [],
@@ -28,7 +28,7 @@
"SPECFORMAT": []
},
{
- "TableHandle": 16777221,
+ "TableHandle": 16777220,
"SPECFORMAT": [
{
"MATCHTYPE": "ternary",
@@ -57,10 +57,6 @@
]
},
{
- "TableHandle": 16777220,
- "SPECFORMAT": []
- },
- {
"TableHandle": 16777219,
"SPECFORMAT": []
},
@@ -74,7 +70,7 @@
"AllTindTables": [
{
"TindTableName": "table0",
- "TindTableHandle": 16777221,
+ "TindTableHandle": 16777220,
"TindTableFormat": [
{
"TindMatchEntryFormat": [
@@ -297,7 +293,7 @@
],
"TindActionHandleCount": 3,
"TindMatchEntryFieldCount": 12,
- "TindActionImmediateCount": 1,
+ "TindActionImmediateCount": 2,
"TindMatchEntryCount": 4,
"TindActionHandles": [
{
@@ -305,28 +301,8 @@
"OVERRIDE_METER_ADDR_PFE": false,
"OVERRIDE_STAT_ADDR_PFE": false,
"IMMEDIATE": {
- "table_name": "_condition_2",
- "action_name": "_drop",
- "next_tbl": 0,
- "next_tbl_full": 32,
- "instr": 7
- },
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "ImmediateCount": 0,
- "OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870928,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR": false,
- "OVERRIDE_STATEFUL_ADDR": false
- },
- {
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "IMMEDIATE": {
"instr": 5,
- "next_tbl_full": 32,
+ "next_tbl_full": 16,
"action_name": "set_egress_port",
"table_name": "_condition_2",
"next_tbl": 0,
@@ -347,7 +323,39 @@
"OVERRIDE_METER_FULL_ADDR": 0,
"ImmediateCount": 1,
"OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870924,
+ "ACTION_HDL": 536870921,
+ "OVERRIDE_STATEFUL_FULL_ADDR": 0,
+ "OVERRIDE_METER_ADDR": false,
+ "OVERRIDE_STATEFUL_ADDR": false
+ },
+ {
+ "OVERRIDE_STAT_FULL_ADDR": 0,
+ "OVERRIDE_METER_ADDR_PFE": false,
+ "OVERRIDE_STAT_ADDR_PFE": false,
+ "IMMEDIATE": {
+ "instr": 6,
+ "next_tbl_full": 16,
+ "action_name": "send_to_cpu",
+ "table_name": "_condition_2",
+ "next_tbl": 0,
+ "--immediate--": [
+ {
+ "DSTSTART": 0,
+ "PARAMNAME": "--constant-0--",
+ "PARAMVAL": 192,
+ "PARAMTYPE": "constant",
+ "PARAMSTART": 0,
+ "PARAMWIDTH": 0,
+ "PARAMSHIFT": 0,
+ "DSTWIDTH": 9
+ }
+ ]
+ },
+ "OVERRIDE_STATEFUL_ADDR_PFE": false,
+ "OVERRIDE_METER_FULL_ADDR": 0,
+ "ImmediateCount": 1,
+ "OVERRIDE_STAT_ADDR": false,
+ "ACTION_HDL": 536870925,
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR": false,
"OVERRIDE_STATEFUL_ADDR": false
@@ -358,22 +366,22 @@
"OVERRIDE_STAT_ADDR_PFE": false,
"IMMEDIATE": {
"table_name": "_condition_2",
- "action_name": "send_to_cpu",
+ "action_name": "_drop",
"next_tbl": 0,
- "next_tbl_full": 32,
- "instr": 6
+ "next_tbl_full": 16,
+ "instr": 7
},
"OVERRIDE_STATEFUL_ADDR_PFE": false,
"OVERRIDE_METER_FULL_ADDR": 0,
"ImmediateCount": 0,
"OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870926,
+ "ACTION_HDL": 536870927,
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR": false,
"OVERRIDE_STATEFUL_ADDR": false
}
],
- "Stage": 1
+ "Stage": 0
}
]
}
@@ -392,16 +400,11 @@
},
{
"ActionHandle": 536870919,
- "action_function": "_packet_out",
+ "action_function": "_process_packet_out",
"ACTIONSPECFORMAT": []
},
{
- "ActionHandle": 536870922,
- "action_function": "add_packet_in_hdr",
- "ACTIONSPECFORMAT": []
- },
- {
- "ActionHandle": 536870924,
+ "ActionHandle": 536870921,
"action_function": "set_egress_port",
"ACTIONSPECFORMAT": [
{
@@ -412,12 +415,12 @@
]
},
{
- "ActionHandle": 536870926,
+ "ActionHandle": 536870925,
"action_function": "send_to_cpu",
"ACTIONSPECFORMAT": []
},
{
- "ActionHandle": 536870928,
+ "ActionHandle": 536870927,
"action_function": "_drop",
"ACTIONSPECFORMAT": []
}
@@ -425,7 +428,7 @@
"TernEntryFormat": {
"AllTernTables": [
{
- "TernTableHandle": 16777221,
+ "TernTableHandle": 16777220,
"TernTableName": "table0",
"TernTableFormat": [
{
@@ -815,12 +818,12 @@
}
],
"TernEntryFieldCount": 22,
- "Stage": 1
+ "Stage": 0
}
]
}
],
- "TotalTernTables": 5
+ "TotalTernTables": 4
},
"AdtEntryFormat": {
"AllActionDataTables": [
@@ -855,7 +858,7 @@
}
],
"ActFuncEntryCount": 1,
- "Stage": 2
+ "Stage": 1
}
]
}
@@ -896,7 +899,7 @@
}
],
"ActFuncEntryCount": 1,
- "Stage": 2
+ "Stage": 1
}
]
}
@@ -911,7 +914,7 @@
"ActFuncTotalEntries": 1,
"ActionDataTableFormat": [
{
- "ActFuncName": "_packet_out",
+ "ActFuncName": "_process_packet_out",
"ActFuncHandle": 536870919,
"ActFuncStageCount": 1,
"ActFuncFormat": [
@@ -948,12 +951,74 @@
"ActionDataTableHandle": 33554435
},
{
- "ActFuncTotalStageCount": 1,
- "ActFuncTotalEntries": 1,
+ "ActFuncTotalStageCount": 3,
+ "ActFuncTotalEntries": 3,
"ActionDataTableFormat": [
{
- "ActFuncName": "add_packet_in_hdr",
- "ActFuncHandle": 536870922,
+ "ActFuncName": "set_egress_port",
+ "ActFuncHandle": 536870921,
+ "ActFuncStageCount": 1,
+ "ActFuncFormat": [
+ {
+ "ActFuncEntryFormat": [
+ {
+ "Entry": 0,
+ "EntryFieldCount": 1,
+ "EntryConstTupCount": 0,
+ "EntryFormat": [
+ {
+ "FIELDWIDTH": 0,
+ "SOURCENAME": "ZERO",
+ "SHIFT": 0,
+ "WORDINDEX": 1,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--padding--",
+ "FIELDOFFSET": 0,
+ "SOURCEWIDTH": 0
+ }
+ ]
+ }
+ ],
+ "ActFuncEntryCount": 1,
+ "Stage": 0
+ }
+ ]
+ },
+ {
+ "ActFuncName": "send_to_cpu",
+ "ActFuncHandle": 536870925,
+ "ActFuncStageCount": 1,
+ "ActFuncFormat": [
+ {
+ "ActFuncEntryFormat": [
+ {
+ "Entry": 0,
+ "EntryFieldCount": 1,
+ "EntryConstTupCount": 0,
+ "EntryFormat": [
+ {
+ "FIELDWIDTH": 0,
+ "SOURCENAME": "ZERO",
+ "SHIFT": 0,
+ "WORDINDEX": 1,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--padding--",
+ "FIELDOFFSET": 0,
+ "SOURCEWIDTH": 0
+ }
+ ]
+ }
+ ],
+ "ActFuncEntryCount": 1,
+ "Stage": 0
+ }
+ ]
+ },
+ {
+ "ActFuncName": "_drop",
+ "ActFuncHandle": 536870927,
"ActFuncStageCount": 1,
"ActFuncFormat": [
{
@@ -983,123 +1048,20 @@
]
}
],
- "ActFuncHandleTotalCount": 1,
- "ActFuncTotalEntryFieldCount": 1,
- "ActFuncTotalConstTupleList": 0,
- "ActionDataTableHandle": 33554436
- },
- {
- "ActFuncTotalStageCount": 3,
- "ActFuncTotalEntries": 3,
- "ActionDataTableFormat": [
- {
- "ActFuncName": "_drop",
- "ActFuncHandle": 536870928,
- "ActFuncStageCount": 1,
- "ActFuncFormat": [
- {
- "ActFuncEntryFormat": [
- {
- "Entry": 0,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
- "EntryFormat": [
- {
- "FIELDWIDTH": 0,
- "SOURCENAME": "ZERO",
- "SHIFT": 0,
- "WORDINDEX": 1,
- "MASKBITOFFSET": "NULL",
- "SOURCEOFFSET": 0,
- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 0,
- "SOURCEWIDTH": 0
- }
- ]
- }
- ],
- "ActFuncEntryCount": 1,
- "Stage": 1
- }
- ]
- },
- {
- "ActFuncName": "set_egress_port",
- "ActFuncHandle": 536870924,
- "ActFuncStageCount": 1,
- "ActFuncFormat": [
- {
- "ActFuncEntryFormat": [
- {
- "Entry": 0,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
- "EntryFormat": [
- {
- "FIELDWIDTH": 0,
- "SOURCENAME": "ZERO",
- "SHIFT": 0,
- "WORDINDEX": 1,
- "MASKBITOFFSET": "NULL",
- "SOURCEOFFSET": 0,
- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 0,
- "SOURCEWIDTH": 0
- }
- ]
- }
- ],
- "ActFuncEntryCount": 1,
- "Stage": 1
- }
- ]
- },
- {
- "ActFuncName": "send_to_cpu",
- "ActFuncHandle": 536870926,
- "ActFuncStageCount": 1,
- "ActFuncFormat": [
- {
- "ActFuncEntryFormat": [
- {
- "Entry": 0,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
- "EntryFormat": [
- {
- "FIELDWIDTH": 0,
- "SOURCENAME": "ZERO",
- "SHIFT": 0,
- "WORDINDEX": 1,
- "MASKBITOFFSET": "NULL",
- "SOURCEOFFSET": 0,
- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 0,
- "SOURCEWIDTH": 0
- }
- ]
- }
- ],
- "ActFuncEntryCount": 1,
- "Stage": 1
- }
- ]
- }
- ],
"ActFuncHandleTotalCount": 3,
"ActFuncTotalEntryFieldCount": 3,
"ActFuncTotalConstTupleList": 0,
- "ActionDataTableHandle": 33554437
+ "ActionDataTableHandle": 33554436
}
],
- "TotalAdTables": 5
+ "TotalAdTables": 4
},
"SnapShot": {
"PhvDetails": [
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -1118,7 +1080,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -1135,7 +1097,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -1150,7 +1112,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -1165,7 +1127,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -1175,7 +1137,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -1200,31 +1162,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -1240,7 +1177,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -1248,21 +1185,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -1270,7 +1192,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -1295,7 +1217,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -1310,7 +1232,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -1320,7 +1242,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -1345,7 +1267,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -1353,41 +1275,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -1395,7 +1282,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -1405,7 +1292,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -1415,7 +1302,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -1425,7 +1312,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -1435,7 +1322,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -1450,7 +1382,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -1460,7 +1392,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -1490,7 +1422,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -1500,7 +1432,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -1515,7 +1447,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -1525,7 +1457,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -1533,6 +1465,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -1540,7 +1502,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -1555,7 +1517,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -1563,21 +1525,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -1585,10 +1532,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -1600,10 +1547,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -1619,42 +1566,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -1669,7 +1616,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -1681,7 +1628,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -1691,12 +1653,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -1721,7 +1698,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -1729,14 +1706,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -1746,13 +1723,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -1767,7 +1744,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -1777,7 +1754,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -1787,7 +1764,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -1802,7 +1779,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -1817,7 +1794,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -1832,7 +1809,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -1842,7 +1819,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -1852,7 +1829,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -1867,7 +1844,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -1877,7 +1854,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -1887,7 +1864,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -1897,7 +1874,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -1907,7 +1884,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -1932,7 +1909,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -1947,7 +1924,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -1962,7 +1939,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -1974,43 +1951,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -2022,7 +1969,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -2032,7 +1979,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -2062,7 +2009,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -2072,7 +2019,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -2087,7 +2034,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -2097,7 +2044,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -2112,7 +2059,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -2127,7 +2074,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -2142,7 +2089,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -2157,7 +2104,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -2197,7 +2144,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -2207,21 +2154,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -2230,7 +2162,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -2246,42 +2178,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -2293,7 +2250,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -2309,6 +2266,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -2323,7 +2290,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -2333,7 +2300,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -2348,46 +2315,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 0
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -2406,7 +2348,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -2423,7 +2365,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -2438,7 +2380,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -2453,7 +2395,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -2463,7 +2405,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -2488,31 +2430,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -2528,7 +2445,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -2536,21 +2453,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -2558,7 +2460,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -2583,7 +2485,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -2598,7 +2500,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -2608,7 +2510,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -2633,7 +2535,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -2641,41 +2543,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -2683,7 +2550,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -2693,7 +2560,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -2703,7 +2570,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -2713,7 +2580,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -2723,7 +2590,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -2738,7 +2650,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -2748,7 +2660,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -2778,7 +2690,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -2788,7 +2700,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -2803,7 +2715,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -2813,7 +2725,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -2821,6 +2733,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -2828,7 +2770,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -2843,7 +2785,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -2851,21 +2793,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -2873,10 +2800,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -2888,10 +2815,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -2907,42 +2834,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -2957,7 +2884,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -2969,7 +2896,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -2979,12 +2921,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -3009,7 +2966,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -3017,14 +2974,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -3034,13 +2991,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -3055,7 +3012,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -3065,7 +3022,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -3075,7 +3032,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -3090,7 +3047,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -3105,7 +3062,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -3120,7 +3077,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -3130,7 +3087,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -3140,7 +3097,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -3155,7 +3112,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -3165,7 +3122,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -3175,7 +3132,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -3185,7 +3142,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -3195,7 +3152,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -3220,7 +3177,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -3235,7 +3192,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -3250,7 +3207,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -3262,43 +3219,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -3310,7 +3237,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -3320,7 +3247,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -3350,7 +3277,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -3360,7 +3287,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -3375,7 +3302,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -3385,7 +3312,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -3400,7 +3327,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -3415,7 +3342,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -3430,7 +3357,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -3445,7 +3372,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -3485,7 +3412,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -3495,21 +3422,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -3518,7 +3430,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -3534,42 +3446,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -3581,7 +3518,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -3597,6 +3534,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -3611,7 +3558,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -3621,7 +3568,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -3636,46 +3583,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 1
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -3694,7 +3616,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -3711,7 +3633,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -3726,7 +3648,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -3741,7 +3663,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -3751,7 +3673,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -3776,31 +3698,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -3816,7 +3713,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -3824,21 +3721,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -3846,7 +3728,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -3871,7 +3753,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -3886,7 +3768,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -3896,7 +3778,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -3921,7 +3803,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -3929,41 +3811,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -3971,7 +3818,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -3981,7 +3828,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -3991,7 +3838,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -4001,7 +3848,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -4011,7 +3858,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -4026,7 +3918,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -4036,7 +3928,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -4066,7 +3958,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -4076,7 +3968,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -4091,7 +3983,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -4101,7 +3993,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -4109,6 +4001,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -4116,7 +4038,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -4131,7 +4053,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -4139,21 +4061,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -4161,10 +4068,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -4176,10 +4083,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -4195,42 +4102,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -4245,7 +4152,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -4257,7 +4164,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -4267,12 +4189,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -4297,7 +4234,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -4305,14 +4242,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -4322,13 +4259,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -4343,7 +4280,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -4353,7 +4290,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -4363,7 +4300,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -4378,7 +4315,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -4393,7 +4330,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -4408,7 +4345,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -4418,7 +4355,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -4428,7 +4365,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -4443,7 +4380,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -4453,7 +4390,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -4463,7 +4400,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -4473,7 +4410,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -4483,7 +4420,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -4508,7 +4445,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -4523,7 +4460,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -4538,7 +4475,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -4550,43 +4487,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -4598,7 +4505,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -4608,7 +4515,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -4638,7 +4545,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -4648,7 +4555,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -4663,7 +4570,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -4673,7 +4580,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -4688,7 +4595,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -4703,7 +4610,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -4718,7 +4625,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -4733,7 +4640,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -4773,7 +4680,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -4783,21 +4690,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -4806,7 +4698,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -4822,42 +4714,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -4869,7 +4786,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -4885,6 +4802,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -4899,7 +4826,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -4909,7 +4836,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -4924,46 +4851,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 2
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -4982,7 +4884,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -4999,7 +4901,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -5014,7 +4916,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -5029,7 +4931,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -5039,7 +4941,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -5064,31 +4966,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -5104,7 +4981,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -5112,21 +4989,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -5134,7 +4996,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -5159,7 +5021,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -5174,7 +5036,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -5184,7 +5046,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -5209,7 +5071,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -5217,41 +5079,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -5259,7 +5086,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -5269,7 +5096,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -5279,7 +5106,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -5289,7 +5116,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -5299,7 +5126,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -5314,7 +5186,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -5324,7 +5196,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -5354,7 +5226,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -5364,7 +5236,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -5379,7 +5251,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -5389,7 +5261,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -5397,6 +5269,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -5404,7 +5306,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -5419,7 +5321,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -5427,21 +5329,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -5449,10 +5336,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -5464,10 +5351,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -5483,42 +5370,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -5533,7 +5420,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -5545,7 +5432,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -5555,12 +5457,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -5585,7 +5502,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -5593,14 +5510,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -5610,13 +5527,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -5631,7 +5548,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -5641,7 +5558,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -5651,7 +5568,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -5666,7 +5583,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -5681,7 +5598,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -5696,7 +5613,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -5706,7 +5623,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -5716,7 +5633,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -5731,7 +5648,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -5741,7 +5658,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -5751,7 +5668,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -5761,7 +5678,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -5771,7 +5688,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -5796,7 +5713,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -5811,7 +5728,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -5826,7 +5743,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -5838,43 +5755,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -5886,7 +5773,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -5896,7 +5783,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -5926,7 +5813,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -5936,7 +5823,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -5951,7 +5838,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -5961,7 +5848,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -5976,7 +5863,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -5991,7 +5878,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -6006,7 +5893,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -6021,7 +5908,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -6061,7 +5948,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -6071,21 +5958,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -6094,7 +5966,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -6110,42 +5982,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -6157,7 +6054,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -6173,6 +6070,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -6187,7 +6094,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -6197,7 +6104,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -6212,46 +6119,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 3
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -6270,7 +6152,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -6287,7 +6169,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -6302,7 +6184,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -6317,7 +6199,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -6327,7 +6209,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -6352,31 +6234,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -6392,7 +6249,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -6400,21 +6257,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -6422,7 +6264,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -6447,7 +6289,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -6462,7 +6304,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -6472,7 +6314,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -6497,7 +6339,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -6505,41 +6347,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -6547,7 +6354,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -6557,7 +6364,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -6567,7 +6374,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -6577,7 +6384,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -6587,7 +6394,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -6602,7 +6454,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -6612,7 +6464,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -6642,7 +6494,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -6652,7 +6504,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -6667,7 +6519,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -6677,7 +6529,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -6685,6 +6537,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -6692,7 +6574,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -6707,7 +6589,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -6715,21 +6597,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -6737,10 +6604,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -6752,10 +6619,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -6771,42 +6638,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -6821,7 +6688,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -6833,7 +6700,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -6843,12 +6725,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -6873,7 +6770,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -6881,14 +6778,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -6898,13 +6795,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -6919,7 +6816,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -6929,7 +6826,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -6939,7 +6836,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -6954,7 +6851,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -6969,7 +6866,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -6984,7 +6881,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -6994,7 +6891,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -7004,7 +6901,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -7019,7 +6916,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -7029,7 +6926,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -7039,7 +6936,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -7049,7 +6946,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -7059,7 +6956,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -7084,7 +6981,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -7099,7 +6996,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -7114,7 +7011,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -7126,43 +7023,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -7174,7 +7041,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -7184,7 +7051,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -7214,7 +7081,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -7224,7 +7091,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -7239,7 +7106,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -7249,7 +7116,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -7264,7 +7131,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -7279,7 +7146,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -7294,7 +7161,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -7309,7 +7176,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -7349,7 +7216,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -7359,21 +7226,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -7382,7 +7234,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -7398,42 +7250,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -7445,7 +7322,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -7461,6 +7338,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -7475,7 +7362,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -7485,7 +7372,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -7500,46 +7387,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 4
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -7558,7 +7420,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -7575,7 +7437,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -7590,7 +7452,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -7605,7 +7467,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -7615,7 +7477,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -7640,31 +7502,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -7680,7 +7517,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -7688,21 +7525,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -7710,7 +7532,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -7735,7 +7557,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -7750,7 +7572,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -7760,7 +7582,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -7785,7 +7607,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -7793,41 +7615,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -7835,7 +7622,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -7845,7 +7632,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -7855,7 +7642,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -7865,7 +7652,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -7875,7 +7662,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -7890,7 +7722,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -7900,7 +7732,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -7930,7 +7762,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -7940,7 +7772,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -7955,7 +7787,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -7965,7 +7797,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -7973,6 +7805,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -7980,7 +7842,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -7995,7 +7857,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -8003,21 +7865,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -8025,10 +7872,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -8040,10 +7887,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -8059,42 +7906,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -8109,7 +7956,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -8121,7 +7968,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -8131,12 +7993,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -8161,7 +8038,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -8169,14 +8046,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -8186,13 +8063,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -8207,7 +8084,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -8217,7 +8094,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -8227,7 +8104,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -8242,7 +8119,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -8257,7 +8134,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -8272,7 +8149,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -8282,7 +8159,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -8292,7 +8169,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -8307,7 +8184,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -8317,7 +8194,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -8327,7 +8204,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -8337,7 +8214,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -8347,7 +8224,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -8372,7 +8249,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -8387,7 +8264,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -8402,7 +8279,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -8414,43 +8291,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -8462,7 +8309,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -8472,7 +8319,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -8502,7 +8349,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -8512,7 +8359,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -8527,7 +8374,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -8537,7 +8384,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -8552,7 +8399,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -8567,7 +8414,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -8582,7 +8429,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -8597,7 +8444,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -8637,7 +8484,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -8647,21 +8494,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -8670,7 +8502,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -8686,42 +8518,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -8733,7 +8590,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -8749,6 +8606,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -8763,7 +8630,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -8773,7 +8640,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -8788,46 +8655,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 5
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -8846,7 +8688,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -8863,7 +8705,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -8878,7 +8720,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -8893,7 +8735,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -8903,7 +8745,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -8928,31 +8770,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -8968,7 +8785,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -8976,21 +8793,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -8998,7 +8800,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -9023,7 +8825,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -9038,7 +8840,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -9048,7 +8850,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -9073,7 +8875,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -9081,41 +8883,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -9123,7 +8890,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -9133,7 +8900,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -9143,7 +8910,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -9153,7 +8920,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -9163,7 +8930,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -9178,7 +8990,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -9188,7 +9000,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -9218,7 +9030,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -9228,7 +9040,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -9243,7 +9055,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -9253,7 +9065,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -9261,6 +9073,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -9268,7 +9110,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -9283,7 +9125,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -9291,21 +9133,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -9313,10 +9140,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -9328,10 +9155,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -9347,42 +9174,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -9397,7 +9224,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -9409,7 +9236,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -9419,12 +9261,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -9449,7 +9306,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -9457,14 +9314,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -9474,13 +9331,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -9495,7 +9352,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -9505,7 +9362,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -9515,7 +9372,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -9530,7 +9387,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -9545,7 +9402,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -9560,7 +9417,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -9570,7 +9427,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -9580,7 +9437,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -9595,7 +9452,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -9605,7 +9462,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -9615,7 +9472,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -9625,7 +9482,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -9635,7 +9492,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -9660,7 +9517,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -9675,7 +9532,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -9690,7 +9547,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -9702,43 +9559,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -9750,7 +9577,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -9760,7 +9587,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -9790,7 +9617,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -9800,7 +9627,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -9815,7 +9642,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -9825,7 +9652,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -9840,7 +9667,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -9855,7 +9682,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -9870,7 +9697,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -9885,7 +9712,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -9925,7 +9752,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -9935,21 +9762,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -9958,7 +9770,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -9974,42 +9786,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -10021,7 +9858,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -10037,6 +9874,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -10051,7 +9898,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -10061,7 +9908,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -10076,46 +9923,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 6
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -10134,7 +9956,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -10151,7 +9973,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -10166,7 +9988,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -10181,7 +10003,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -10191,7 +10013,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -10216,31 +10038,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -10256,7 +10053,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -10264,21 +10061,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -10286,7 +10068,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -10311,7 +10093,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -10326,7 +10108,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -10336,7 +10118,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -10361,7 +10143,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -10369,41 +10151,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -10411,7 +10158,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -10421,7 +10168,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -10431,7 +10178,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -10441,7 +10188,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -10451,7 +10198,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -10466,7 +10258,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -10476,7 +10268,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -10506,7 +10298,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -10516,7 +10308,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -10531,7 +10323,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -10541,7 +10333,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -10549,6 +10341,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -10556,7 +10378,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -10571,7 +10393,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -10579,21 +10401,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -10601,10 +10408,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -10616,10 +10423,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -10635,42 +10442,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -10685,7 +10492,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -10697,7 +10504,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -10707,12 +10529,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -10737,7 +10574,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -10745,14 +10582,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -10762,13 +10599,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -10783,7 +10620,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -10793,7 +10630,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -10803,7 +10640,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -10818,7 +10655,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -10833,7 +10670,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -10848,7 +10685,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -10858,7 +10695,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -10868,7 +10705,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -10883,7 +10720,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -10893,7 +10730,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -10903,7 +10740,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -10913,7 +10750,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -10923,7 +10760,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -10948,7 +10785,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -10963,7 +10800,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -10978,7 +10815,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -10990,43 +10827,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -11038,7 +10845,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -11048,7 +10855,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -11078,7 +10885,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -11088,7 +10895,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -11103,7 +10910,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -11113,7 +10920,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -11128,7 +10935,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -11143,7 +10950,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -11158,7 +10965,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -11173,7 +10980,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -11213,7 +11020,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -11223,21 +11030,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -11246,7 +11038,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -11262,42 +11054,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -11309,7 +11126,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -11325,6 +11142,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -11339,7 +11166,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -11349,7 +11176,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -11364,46 +11191,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 7
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -11422,7 +11224,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -11439,7 +11241,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -11454,7 +11256,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -11469,7 +11271,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -11479,7 +11281,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -11504,31 +11306,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -11544,7 +11321,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -11552,21 +11329,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -11574,7 +11336,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -11599,7 +11361,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -11614,7 +11376,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -11624,7 +11386,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -11649,7 +11411,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -11657,41 +11419,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -11699,7 +11426,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -11709,7 +11436,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -11719,7 +11446,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -11729,7 +11456,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -11739,7 +11466,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -11754,7 +11526,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -11764,7 +11536,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -11794,7 +11566,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -11804,7 +11576,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -11819,7 +11591,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -11829,7 +11601,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -11837,6 +11609,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -11844,7 +11646,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -11859,7 +11661,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -11867,21 +11669,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -11889,10 +11676,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -11904,10 +11691,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -11923,42 +11710,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -11973,7 +11760,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -11985,7 +11772,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -11995,12 +11797,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -12025,7 +11842,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -12033,14 +11850,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -12050,13 +11867,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -12071,7 +11888,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -12081,7 +11898,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -12091,7 +11908,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -12106,7 +11923,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -12121,7 +11938,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -12136,7 +11953,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -12146,7 +11963,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -12156,7 +11973,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -12171,7 +11988,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -12181,7 +11998,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -12191,7 +12008,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -12201,7 +12018,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -12211,7 +12028,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -12236,7 +12053,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -12251,7 +12068,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -12266,7 +12083,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -12278,43 +12095,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -12326,7 +12113,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -12336,7 +12123,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -12366,7 +12153,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -12376,7 +12163,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -12391,7 +12178,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -12401,7 +12188,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -12416,7 +12203,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -12431,7 +12218,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -12446,7 +12233,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -12461,7 +12248,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -12501,7 +12288,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -12511,21 +12298,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -12534,7 +12306,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -12550,42 +12322,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -12597,7 +12394,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -12613,6 +12410,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -12627,7 +12434,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -12637,7 +12444,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -12652,46 +12459,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 8
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -12710,7 +12492,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -12727,7 +12509,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -12742,7 +12524,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -12757,7 +12539,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -12767,7 +12549,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -12792,31 +12574,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -12832,7 +12589,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -12840,21 +12597,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -12862,7 +12604,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -12887,7 +12629,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -12902,7 +12644,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -12912,7 +12654,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -12937,7 +12679,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -12945,41 +12687,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -12987,7 +12694,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -12997,7 +12704,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -13007,7 +12714,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -13017,7 +12724,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -13027,7 +12734,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -13042,7 +12794,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -13052,7 +12804,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -13082,7 +12834,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -13092,7 +12844,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -13107,7 +12859,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -13117,7 +12869,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -13125,6 +12877,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -13132,7 +12914,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -13147,7 +12929,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -13155,21 +12937,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -13177,10 +12944,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -13192,10 +12959,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -13211,42 +12978,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -13261,7 +13028,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -13273,7 +13040,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -13283,12 +13065,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -13313,7 +13110,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -13321,14 +13118,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -13338,13 +13135,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -13359,7 +13156,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -13369,7 +13166,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -13379,7 +13176,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -13394,7 +13191,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -13409,7 +13206,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -13424,7 +13221,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -13434,7 +13231,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -13444,7 +13241,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -13459,7 +13256,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -13469,7 +13266,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -13479,7 +13276,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -13489,7 +13286,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -13499,7 +13296,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -13524,7 +13321,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -13539,7 +13336,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -13554,7 +13351,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -13566,43 +13363,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -13614,7 +13381,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -13624,7 +13391,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -13654,7 +13421,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -13664,7 +13431,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -13679,7 +13446,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -13689,7 +13456,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -13704,7 +13471,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -13719,7 +13486,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -13734,7 +13501,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -13749,7 +13516,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -13789,7 +13556,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -13799,21 +13566,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -13822,7 +13574,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -13838,42 +13590,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -13885,7 +13662,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -13901,6 +13678,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -13915,7 +13702,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -13925,7 +13712,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -13940,46 +13727,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 9
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -13998,7 +13760,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -14015,7 +13777,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -14030,7 +13792,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -14045,7 +13807,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -14055,7 +13817,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -14080,31 +13842,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -14120,7 +13857,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -14128,21 +13865,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -14150,7 +13872,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -14175,7 +13897,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -14190,7 +13912,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -14200,7 +13922,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -14225,7 +13947,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -14233,41 +13955,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -14275,7 +13962,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -14285,7 +13972,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -14295,7 +13982,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -14305,7 +13992,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -14315,7 +14002,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -14330,7 +14062,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -14340,7 +14072,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -14370,7 +14102,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -14380,7 +14112,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -14395,7 +14127,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -14405,7 +14137,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -14413,6 +14145,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -14420,7 +14182,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -14435,7 +14197,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -14443,21 +14205,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -14465,10 +14212,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -14480,10 +14227,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -14499,42 +14246,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -14549,7 +14296,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -14561,7 +14308,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -14571,12 +14333,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -14601,7 +14378,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -14609,14 +14386,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -14626,13 +14403,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -14647,7 +14424,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -14657,7 +14434,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -14667,7 +14444,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -14682,7 +14459,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -14697,7 +14474,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -14712,7 +14489,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -14722,7 +14499,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -14732,7 +14509,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -14747,7 +14524,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -14757,7 +14534,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -14767,7 +14544,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -14777,7 +14554,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -14787,7 +14564,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -14812,7 +14589,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -14827,7 +14604,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -14842,7 +14619,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -14854,43 +14631,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -14902,7 +14649,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -14912,7 +14659,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -14942,7 +14689,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -14952,7 +14699,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -14967,7 +14714,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -14977,7 +14724,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -14992,7 +14739,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -15007,7 +14754,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -15022,7 +14769,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -15037,7 +14784,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -15077,7 +14824,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -15087,21 +14834,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -15110,7 +14842,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -15126,42 +14858,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -15173,7 +14930,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -15189,6 +14946,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -15203,7 +14970,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -15213,7 +14980,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -15228,46 +14995,21 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 10
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 58,
- "TOTALPHVRECORDS": 90,
+ "TOTALSTAGEPHVS": 56,
+ "TOTALPHVRECORDS": 89,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -15286,7 +15028,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 76
}
]
}
@@ -15303,7 +15045,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
"PHVNUMBER": 1
@@ -15318,7 +15060,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 2
@@ -15333,7 +15075,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
},
{
"FIELDWIDTH": 6,
@@ -15343,7 +15085,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
"PHVNUMBER": 131
@@ -15368,31 +15110,6 @@
{
"FIELDWIDTH": 2,
"FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 8,
"PHVNAME": "packet_out_hdr_egress_port",
@@ -15408,7 +15125,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 129
@@ -15416,21 +15133,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 73
- }
- ],
- "PHVNUMBER": 324
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 15,
@@ -15438,7 +15140,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 31
},
{
"FIELDWIDTH": 2,
@@ -15463,7 +15165,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 130
@@ -15478,7 +15180,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 52
},
{
"FIELDWIDTH": 1,
@@ -15488,7 +15190,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
},
{
"FIELDWIDTH": 2,
@@ -15513,7 +15215,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 60
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 320
@@ -15521,41 +15223,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 65
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -15563,7 +15230,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 43
},
{
"FIELDWIDTH": 1,
@@ -15573,7 +15240,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
},
{
"FIELDWIDTH": 1,
@@ -15583,7 +15250,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
},
{
"FIELDWIDTH": 1,
@@ -15593,7 +15260,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 36
},
{
"FIELDWIDTH": 2,
@@ -15603,7 +15270,52 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 47
+ "POSITIONOFFSET": 46
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 64
+ }
+ ],
+ "PHVNUMBER": 259
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 260
@@ -15618,7 +15330,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 43
+ "POSITIONOFFSET": 42
},
{
"FIELDWIDTH": 1,
@@ -15628,7 +15340,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 288
@@ -15658,7 +15370,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -15668,7 +15380,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 290
@@ -15683,7 +15395,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 37
},
{
"FIELDWIDTH": 2,
@@ -15693,7 +15405,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 291
@@ -15701,6 +15413,36 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 34
+ }
+ ],
+ "PHVNUMBER": 293
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 4,
"FIELDLSB": 0,
"PHVMSB": 31,
@@ -15708,7 +15450,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 14
}
],
"PHVNUMBER": 257
@@ -15723,7 +15465,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 49
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 321
@@ -15731,21 +15473,6 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 6,
"FIELDLSB": 40,
"PHVMSB": 7,
@@ -15753,10 +15480,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 21
}
],
- "PHVNUMBER": 65
+ "PHVNUMBER": 64
},
{
"PHVRECORD": [
@@ -15768,10 +15495,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
}
],
- "PHVNUMBER": 66
+ "PHVNUMBER": 65
},
{
"PHVRECORD": [
@@ -15787,42 +15514,42 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 77
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 78
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 79
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 82
+ "POSITIONOFFSET": 81
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 83
+ "POSITIONOFFSET": 82
}
]
}
],
- "PHVNUMBER": 67
+ "PHVNUMBER": 66
},
{
"PHVRECORD": [
@@ -15837,7 +15564,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 68
+ "PHVNUMBER": 67
},
{
"PHVRECORD": [
@@ -15849,7 +15576,22 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 73
+ "POSITIONOFFSET": 72
+ }
+ ],
+ "PHVNUMBER": 324
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
}
],
"PHVNUMBER": 325
@@ -15859,12 +15601,27 @@
{
"FIELDWIDTH": 4,
"FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 27
+ }
+ ],
+ "PHVNUMBER": 326
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
"PHVMSB": 31,
"FIELDMSB": 31,
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 258
@@ -15889,7 +15646,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
}
],
"PHVNUMBER": 322
@@ -15897,14 +15654,14 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 72
},
{
"FIELDWIDTH": 2,
@@ -15914,13 +15671,13 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 54
+ "POSITIONOFFSET": 53
}
],
"PHVNUMBER": 323
}
],
- "TOTALINGRESSPHVS": 29
+ "TOTALINGRESSPHVS": 30
},
{
"PHVDIRECTION": 1,
@@ -15935,7 +15692,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 47
},
{
"FIELDWIDTH": 1,
@@ -15945,7 +15702,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 18
},
{
"FIELDWIDTH": 2,
@@ -15955,7 +15712,7 @@
"PHVNAME": "ipv4_hdrChecksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 11
+ "POSITIONOFFSET": 9
}
],
"PHVNUMBER": 264
@@ -15970,7 +15727,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 15
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -15985,7 +15742,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 53
+ "POSITIONOFFSET": 50
}
],
"PHVNUMBER": 266
@@ -16000,7 +15757,7 @@
"PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 28
+ "POSITIONOFFSET": 25
},
{
"FIELDWIDTH": 2,
@@ -16010,7 +15767,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 19
+ "POSITIONOFFSET": 16
},
{
"FIELDWIDTH": 2,
@@ -16020,7 +15777,7 @@
"PHVNAME": "udp_checksum",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 59
}
],
"PHVNUMBER": 267
@@ -16035,7 +15792,7 @@
"PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 28,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 1,
@@ -16045,7 +15802,7 @@
"PHVNAME": "tcp_res",
"CONTAINERWIDTH": 32,
"PHVLSB": 25,
- "POSITIONOFFSET": 61
+ "POSITIONOFFSET": 58
},
{
"FIELDWIDTH": 1,
@@ -16055,7 +15812,7 @@
"PHVNAME": "tcp_ecn",
"CONTAINERWIDTH": 32,
"PHVLSB": 22,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 11
},
{
"FIELDWIDTH": 1,
@@ -16065,7 +15822,7 @@
"PHVNAME": "tcp_ctrl",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 37
+ "POSITIONOFFSET": 34
},
{
"FIELDWIDTH": 2,
@@ -16075,7 +15832,7 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 268
@@ -16100,7 +15857,7 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 45
}
],
"PHVNUMBER": 269
@@ -16115,7 +15872,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 270
@@ -16130,7 +15887,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 271
@@ -16142,43 +15899,13 @@
"FIELDLSB": 0,
"PHVMSB": 8,
"FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -16190,7 +15917,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -16200,7 +15927,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
"PHVNUMBER": 296
@@ -16230,7 +15957,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -16240,7 +15967,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 298
@@ -16255,7 +15982,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -16265,7 +15992,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
"PHVNUMBER": 299
@@ -16280,7 +16007,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
"PHVNUMBER": 300
@@ -16295,7 +16022,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 301
@@ -16310,7 +16037,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 332
@@ -16325,7 +16052,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
"PHVNUMBER": 333
@@ -16365,7 +16092,7 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
+ "POSITIONOFFSET": 32
}
],
"PHVNUMBER": 335
@@ -16375,21 +16102,6 @@
{
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
"PHVMSB": 2,
"FIELDMSB": 2,
"PHVNAME": "eg_intr_md_egress_cos",
@@ -16398,7 +16110,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -16414,42 +16126,67 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
},
{
"PHVRECORD": [
@@ -16461,7 +16198,7 @@
"PHVNAME": "ethernet_etherType",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 39
}
],
"PHVNUMBER": 339
@@ -16477,6 +16214,16 @@
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
"POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
}
],
"PHVNUMBER": 340
@@ -16491,7 +16238,7 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
},
{
"FIELDWIDTH": 2,
@@ -16501,7 +16248,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 48
}
],
"PHVNUMBER": 336
@@ -16516,38 +16263,13 @@
"PHVNAME": "tcp_seqNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 72
+ "POSITIONOFFSET": 69
}
],
"PHVNUMBER": 337
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 338
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 11
@@ -16561,10 +16283,10 @@
1
],
"TABLENAME": "ingress_port_count_table",
- "ID": 32,
+ "ID": 16,
"TableHandle": 16777217,
"TCAMADDRSHIFT": 0,
- "Stage": 2
+ "Stage": 1
},
{
"DIRECTION": 0,
@@ -16573,10 +16295,10 @@
0
],
"TABLENAME": "egress_port_count_table",
- "ID": 33,
+ "ID": 17,
"TableHandle": 16777218,
"TCAMADDRSHIFT": 0,
- "Stage": 2
+ "Stage": 1
},
{
"DIRECTION": 0,
@@ -16585,10 +16307,10 @@
0
],
"TABLENAME": "table0",
- "ID": 16,
- "TableHandle": 16777221,
+ "ID": 0,
+ "TableHandle": 16777220,
"TCAMADDRSHIFT": 3,
- "Stage": 1
+ "Stage": 0
},
{
"DIRECTION": 0,
@@ -16596,21 +16318,9 @@
"PHYSICALBUSES": [
1
],
- "TABLENAME": "ingress_pkt",
- "ID": 0,
- "TableHandle": 16777219,
- "TCAMADDRSHIFT": 0,
- "Stage": 0
- },
- {
- "DIRECTION": 1,
- "TABLETYPE": "SRAM",
- "PHYSICALBUSES": [
- 0
- ],
- "TABLENAME": "egress_pkt",
+ "TABLENAME": "process_packet_out_table",
"ID": 1,
- "TableHandle": 16777220,
+ "TableHandle": 16777219,
"TCAMADDRSHIFT": 0,
"Stage": 0
}
@@ -16618,7 +16328,7 @@
},
"AlpmFormat": [],
"DefaultEntryFormat": {
- "TotalTables": 5,
+ "TotalTables": 4,
"DefaultEntries": [
{
"TotalActionFields": 0,
@@ -16638,7 +16348,7 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 33,
+ "next_tbl": 17,
"act_name": "reset_default_action"
}
},
@@ -16656,7 +16366,7 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 33,
+ "next_tbl": 17,
"act_name": "count_ingress"
}
}
@@ -16673,7 +16383,7 @@
"SelectorCount": 0,
"TableHandle": 16777217,
"LogicalId": 0,
- "Stage": 2
+ "Stage": 1
},
{
"TotalActionFields": 0,
@@ -16728,7 +16438,7 @@
"SelectorCount": 0,
"TableHandle": 16777218,
"LogicalId": 1,
- "Stage": 2
+ "Stage": 1
},
{
"TotalActionFields": 0,
@@ -16755,7 +16465,7 @@
{
"ActionHandle": 536870919,
"ActionFunction": {
- "instr": 65,
+ "instr": 68,
"OVERRIDE_STAT_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR_PFE": false,
"OVERRIDE_STAT_ADDR_PFE": false,
@@ -16767,7 +16477,7 @@
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
"next_tbl": 16,
- "act_name": "_packet_out"
+ "act_name": "_process_packet_out"
}
}
],
@@ -16782,86 +16492,13 @@
"TotalActionHandles": 2,
"SelectorCount": 0,
"TableHandle": 16777219,
- "LogicalId": 0,
- "Stage": 0
- },
- {
- "TotalActionFields": 0,
- "Actions": [
- {
- "ActionHandle": 0,
- "ActionFunction": {
- "instr": 0,
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "OVERRIDE_STAT_ADDR": false,
- "tbl_name": "None",
- "OVERRIDE_STATEFUL_ADDR": false,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "tbl_mask": 0,
- "OVERRIDE_METER_ADDR": false,
- "next_tbl": 255,
- "act_name": "reset_default_action"
- }
- },
- {
- "ActionHandle": 536870922,
- "ActionFunction": {
- "instr": 65,
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "OVERRIDE_STAT_ADDR": false,
- "OVERRIDE_STATEFUL_ADDR": false,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "tbl_mask": 0,
- "OVERRIDE_METER_ADDR": false,
- "next_tbl": 255,
- "act_name": "add_packet_in_hdr"
- }
- }
- ],
- "Immediate": [
- {
- "ActionHandle": 0
- },
- {
- "ActionHandle": 536870922
- }
- ],
- "TotalActionHandles": 2,
- "SelectorCount": 0,
- "TableHandle": 16777220,
"LogicalId": 1,
"Stage": 0
},
{
- "TotalActionFields": 1,
+ "TotalActionFields": 2,
"Actions": [
{
- "ActionHandle": 536870928,
- "ActionFunction": {
- "instr": 67,
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "OVERRIDE_STAT_ADDR": false,
- "OVERRIDE_STATEFUL_ADDR": false,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "tbl_mask": 0,
- "OVERRIDE_METER_ADDR": false,
- "next_tbl": 32,
- "act_name": "_drop"
- }
- },
- {
"ActionHandle": 0,
"ActionFunction": {
"instr": 0,
@@ -16876,12 +16513,12 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 32,
+ "next_tbl": 16,
"act_name": "reset_default_action"
}
},
{
- "ActionHandle": 536870924,
+ "ActionHandle": 536870921,
"ActionFunction": {
"instr": 65,
"OVERRIDE_STAT_FULL_ADDR": 0,
@@ -16894,12 +16531,12 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 32,
+ "next_tbl": 16,
"act_name": "set_egress_port"
}
},
{
- "ActionHandle": 536870926,
+ "ActionHandle": 536870925,
"ActionFunction": {
"instr": 66,
"OVERRIDE_STAT_FULL_ADDR": 0,
@@ -16912,20 +16549,35 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 32,
+ "next_tbl": 16,
"act_name": "send_to_cpu"
}
+ },
+ {
+ "ActionHandle": 536870927,
+ "ActionFunction": {
+ "instr": 67,
+ "OVERRIDE_STAT_FULL_ADDR": 0,
+ "OVERRIDE_METER_ADDR_PFE": false,
+ "OVERRIDE_STAT_ADDR_PFE": false,
+ "OVERRIDE_STATEFUL_ADDR_PFE": false,
+ "OVERRIDE_METER_FULL_ADDR": 0,
+ "OVERRIDE_STAT_ADDR": false,
+ "OVERRIDE_STATEFUL_ADDR": false,
+ "OVERRIDE_STATEFUL_FULL_ADDR": 0,
+ "tbl_mask": 0,
+ "OVERRIDE_METER_ADDR": false,
+ "next_tbl": 16,
+ "act_name": "_drop"
+ }
}
],
"Immediate": [
{
- "ActionHandle": 536870928
- },
- {
"ActionHandle": 0
},
{
- "ActionHandle": 536870924,
+ "ActionHandle": 536870921,
"ActionFunctionFields": [
{
"DSTSTART": 0,
@@ -16940,14 +16592,29 @@
]
},
{
- "ActionHandle": 536870926
+ "ActionHandle": 536870925,
+ "ActionFunctionFields": [
+ {
+ "DSTSTART": 0,
+ "PARAMNAME": "--constant-0--",
+ "PARAMVAL": 192,
+ "PARAMTYPE": "constant",
+ "PARAMSTART": 0,
+ "PARAMWIDTH": 9,
+ "PARAMSHIFT": 0,
+ "DSTWIDTH": 9
+ }
+ ]
+ },
+ {
+ "ActionHandle": 536870927
}
],
"TotalActionHandles": 4,
"SelectorCount": 0,
- "TableHandle": 16777221,
+ "TableHandle": 16777220,
"LogicalId": 0,
- "Stage": 1
+ "Stage": 0
}
]
}
@@ -16965,7 +16632,8 @@
"6": "default_parser",
"7": "parse_pkt_out",
"8": "<POV initialization>_<Ingress intrinsic metadata>_<Phase 0>",
- "9": "start"
+ "9": "start",
+ "10": "parse_tcp//spilled"
},
"parser_value_set": []
},
@@ -16979,7 +16647,7 @@
"4": "parse_udp",
"5": "default_parser",
"6": "parse_pkt_out",
- "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"8": "parse_pkt_in"
},
"parser_value_set": []
@@ -16995,7 +16663,7 @@
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "match_with_no_key",
"number_entries": 1,
"pack_format_length": 1,
@@ -17018,7 +16686,7 @@
"stage_table_type_handle": 0,
"stage_idletime_table": null,
"stage_gateway_table": {
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "gateway",
"number_entries": 0,
"pack_format_length": 0,
@@ -17131,12 +16799,12 @@
"536870914": {
"next_table_address_to_use": 0,
"action_name": "count_ingress",
- "next_table_full_address": 33,
+ "next_table_full_address": 17,
"next_table_name": "egress_port_count_table"
}
},
"default_next_table_modifiable": false,
- "default_next_table": 33,
+ "default_next_table": 17,
"action_to_immediate_mapping": {
"536870914": [
[]
@@ -17254,7 +16922,7 @@
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "match_with_no_key",
"number_entries": 1,
"pack_format_length": 1,
@@ -17277,7 +16945,7 @@
"stage_table_type_handle": 1,
"stage_idletime_table": null,
"stage_gateway_table": {
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "gateway",
"number_entries": 0,
"pack_format_length": 0,
@@ -17488,7 +17156,7 @@
"ap_bind_indirect_res_to_match": []
},
{
- "name": "ingress_pkt",
+ "name": "process_packet_out_table",
"handle": 16777219,
"direction": "ingress",
"number_entries": 1024,
@@ -17514,7 +17182,7 @@
}
],
"memory_resource_allocation": null,
- "stage_table_handle": 0,
+ "stage_table_handle": 1,
"stage_table_type_handle": 0,
"stage_idletime_table": null,
"stage_gateway_table": {
@@ -17545,10 +17213,8 @@
16
]
],
- "match_group_key_bit_width": 8,
- "match_group_phv_bit_scrambling": {
- "--validity_check--packet_out_hdr[0]": 9
- },
+ "match_group_key_bit_width": 0,
+ "match_group_phv_bit_scrambling": {},
"match_group_match_bit_scrambling": {},
"seed": [
0,
@@ -17607,24 +17273,24 @@
"hash_match_group_id_for_hash_bits": 0,
"hash_match_group_id_for_data_bits": 0
},
- "use_condition_from_program": true
+ "use_condition_from_program": false
},
"match_group_resource_allocation": [],
"vliw_resource_allocation": {
"536870919": {
- "address_to_use": 1,
- "full_address": 65,
- "vliw_instruction_number": 0,
- "color": 1,
+ "address_to_use": 0,
+ "full_address": 68,
+ "vliw_instruction_number": 2,
+ "color": 0,
"direction": "ingress"
}
},
"action_to_next_table_mapping": {
"536870919": {
"next_table_address_to_use": 0,
- "action_name": "_packet_out",
+ "action_name": "_process_packet_out",
"next_table_full_address": 16,
- "next_table_name": "_condition_1"
+ "next_table_name": "_condition_2"
}
},
"default_next_table_modifiable": false,
@@ -17639,19 +17305,11 @@
],
"match_key_fields": [],
"match_fields_type_dictionary": {},
- "gateway_fields": [
- {
- "name": "--validity_check--packet_out_hdr",
- "start_offset": 0,
- "start_bit": 0,
- "bit_width": 1,
- "range_field": false
- }
- ],
+ "gateway_fields": [],
"preferred_match_type": "exact",
"actions": [
{
- "name": "_packet_out",
+ "name": "_process_packet_out",
"handle": 536870919,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
@@ -17697,14 +17355,14 @@
"phv_word_address": 130
},
{
- "phv_word_address": 67
+ "phv_word_address": 66
}
],
"indirect_resources": []
}
],
"default_action": {
- "name": "_packet_out",
+ "name": "_process_packet_out",
"handle": 536870919,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
@@ -17750,294 +17408,7 @@
"phv_word_address": 130
},
{
- "phv_word_address": 67
- }
- ]
- },
- "default_action_parameters": {},
- "default_only_action": null,
- "p4_action_data_tables": [],
- "p4_statistics_tables": [],
- "p4_meter_tables": [],
- "p4_stateful_tables": [],
- "p4_selection_tables": [],
- "include_idletime": false,
- "performs_hash_action": false,
- "uses_range": false,
- "number_entries_with_ranges": 0,
- "uses_versioning": true,
- "tcam_error_detect": false,
- "dynamic_match_key_masks": false,
- "uses_static_entries": false,
- "match_type": "exact",
- "action_profile": null,
- "timeout": false,
- "ap_bind_indirect_res_to_match": []
- },
- {
- "name": "egress_pkt",
- "handle": 16777220,
- "direction": "egress",
- "number_entries": 1024,
- "stage_tables_length": 1,
- "stage_tables": [
- {
- "stage_number": 0,
- "stage_table_type": "match_with_no_key",
- "number_entries": 1,
- "pack_format_length": 1,
- "pack_format": [
- {
- "table_word_width": 0,
- "memory_word_width": 0,
- "entries_per_table_word": 1,
- "number_memory_units_per_table_word": 0,
- "entry_list": [
- {
- "entry_number": 0,
- "field_list": []
- }
- ]
- }
- ],
- "memory_resource_allocation": null,
- "stage_table_handle": 1,
- "stage_table_type_handle": 1,
- "stage_idletime_table": null,
- "stage_gateway_table": {
- "stage_number": 0,
- "stage_table_type": "gateway",
- "number_entries": 0,
- "pack_format_length": 0,
- "pack_format": [],
- "memory_resource_allocation": {
- "memory_type": "gateway",
- "memory_units_depth": 1,
- "memory_units_width": 1,
- "memory_units_and_vpns": [
- {
- "memory_units": [
- 15
- ],
- "vpns": [
- null
- ]
- }
- ]
- },
- "gateway_match_group_resource_allocation": {
- "match_groups": [
- [
- 0,
- 16
- ]
- ],
- "match_group_key_bit_width": 8,
- "match_group_phv_bit_scrambling": {
- "ig_intr_md_for_tm.copy_to_cpu[0]": 0
- },
- "match_group_match_bit_scrambling": {},
- "seed": [
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0
- ],
- "hash_match_group_id_for_hash_bits": 0,
- "hash_match_group_id_for_data_bits": 0
- },
- "use_condition_from_program": true
- },
- "match_group_resource_allocation": [],
- "vliw_resource_allocation": {
- "536870922": {
- "address_to_use": 1,
- "full_address": 65,
- "vliw_instruction_number": 0,
- "color": 1,
- "direction": "egress"
- }
- },
- "action_to_next_table_mapping": {
- "536870922": {
- "next_table_address_to_use": 0,
- "action_name": "add_packet_in_hdr",
- "next_table_full_address": 255,
- "next_table_name": "--END_OF_PIPELINE--"
- }
- },
- "default_next_table_modifiable": false,
- "default_next_table": 255,
- "action_to_immediate_mapping": {
- "536870922": [
- []
- ]
- },
- "stage_table_type_handle_type": "exact"
- }
- ],
- "match_key_fields": [],
- "match_fields_type_dictionary": {},
- "gateway_fields": [
- {
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "start_offset": 35,
- "start_bit": 0,
- "bit_width": 1,
- "range_field": false
- }
- ],
- "preferred_match_type": "exact",
- "actions": [
- {
- "name": "add_packet_in_hdr",
- "handle": 536870922,
- "allowed_to_be_default_action": true,
- "disallowed_as_default_action_reason": null,
- "override_stat_addr_pfe": false,
- "override_stat_addr": false,
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "override_meter_addr": false,
- "override_meter_full_addr": 0,
- "override_stateful_addr_pfe": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "p4_parameters": [],
- "p4_primitives": [
- {
- "handle": 536870920,
- "header_instance": "packet_in_hdr"
- },
- {
- "handle": 536870921,
- "destination_field": {
- "name": "packet_in_hdr.ingress_port",
- "start_offset": 0,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "source_value": {
- "name": "ig_intr_md.ingress_port",
- "start_offset": 7,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "mask": {
- "value": 511,
- "signed": false
- }
- }
- ],
- "stage_primitives": [
- {
- "phv_word_address": 82
- },
- {
- "phv_word_address": 145
- }
- ],
- "indirect_resources": []
- }
- ],
- "default_action": {
- "name": "add_packet_in_hdr",
- "handle": 536870922,
- "allowed_to_be_default_action": true,
- "disallowed_as_default_action_reason": null,
- "override_stat_addr_pfe": false,
- "override_stat_addr": false,
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "override_meter_addr": false,
- "override_meter_full_addr": 0,
- "override_stateful_addr_pfe": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "p4_parameters": [],
- "p4_primitives": [
- {
- "handle": 536870920,
- "header_instance": "packet_in_hdr"
- },
- {
- "handle": 536870921,
- "destination_field": {
- "name": "packet_in_hdr.ingress_port",
- "start_offset": 0,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "source_value": {
- "name": "ig_intr_md.ingress_port",
- "start_offset": 7,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "mask": {
- "value": 511,
- "signed": false
- }
- }
- ],
- "stage_primitives": [
- {
- "phv_word_address": 82
- },
- {
- "phv_word_address": 145
+ "phv_word_address": 66
}
]
},
@@ -18063,13 +17434,13 @@
},
{
"name": "table0",
- "handle": 16777221,
+ "handle": 16777220,
"direction": "ingress",
"number_entries": 512,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_match",
"number_entries": 512,
"pack_format_length": 0,
@@ -18262,7 +17633,7 @@
"stage_table_handle": 0,
"stage_table_type_handle": 0,
"stage_idletime_table": {
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "idletime",
"number_entries": 2048,
"pack_format_length": 1,
@@ -18343,7 +17714,7 @@
"idletime_per_flow_idletime": true
},
"stage_gateway_table": {
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "gateway",
"number_entries": 0,
"pack_format_length": 0,
@@ -18708,21 +18079,21 @@
}
],
"vliw_resource_allocation": {
- "536870924": {
+ "536870921": {
"address_to_use": 5,
"full_address": 65,
"vliw_instruction_number": 0,
"color": 1,
"direction": "ingress"
},
- "536870926": {
+ "536870925": {
"address_to_use": 6,
"full_address": 66,
"vliw_instruction_number": 1,
"color": 0,
"direction": "ingress"
},
- "536870928": {
+ "536870927": {
"address_to_use": 7,
"full_address": 67,
"vliw_instruction_number": 1,
@@ -18731,28 +18102,28 @@
}
},
"action_to_next_table_mapping": {
- "536870924": {
+ "536870921": {
"next_table_address_to_use": 0,
"action_name": "set_egress_port",
- "next_table_full_address": 32,
+ "next_table_full_address": 16,
"next_table_name": "_condition_2"
},
- "536870926": {
+ "536870925": {
"next_table_address_to_use": 0,
"action_name": "send_to_cpu",
- "next_table_full_address": 32,
+ "next_table_full_address": 16,
"next_table_name": "_condition_2"
},
- "536870928": {
+ "536870927": {
"next_table_address_to_use": 0,
"action_name": "_drop",
- "next_table_full_address": 32,
+ "next_table_full_address": 16,
"next_table_name": "_condition_2"
}
},
- "default_next_table": 32,
+ "default_next_table": 16,
"action_to_immediate_mapping": {
- "536870924": [
+ "536870921": [
[
{
"name": "port",
@@ -18768,15 +18139,27 @@
],
[]
],
- "536870926": [
- []
+ "536870925": [
+ [
+ {
+ "name": "--constant-0--",
+ "parameter_least_significant_bit": 0,
+ "parameter_most_significant_bit": 8,
+ "immediate_least_significant_bit": 0,
+ "immediate_most_significant_bit": 8,
+ "location": "match_entry",
+ "type": "constant",
+ "value": 192,
+ "field_called": "--immediate--"
+ }
+ ]
],
- "536870928": [
+ "536870927": [
[]
]
},
"ternary_indirection_table": {
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_indirection",
"number_entries": 4096,
"pack_format_length": 1,
@@ -18961,7 +18344,7 @@
"actions": [
{
"name": "set_egress_port",
- "handle": 536870924,
+ "handle": 536870921,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -18987,7 +18370,7 @@
],
"p4_primitives": [
{
- "handle": 536870923,
+ "handle": 536870920,
"destination_field": {
"name": "ig_intr_md_for_tm.ucast_egress_port",
"start_offset": 7,
@@ -19020,7 +18403,7 @@
},
{
"name": "send_to_cpu",
- "handle": 536870926,
+ "handle": 536870925,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -19035,34 +18418,65 @@
"p4_parameters": [],
"p4_primitives": [
{
- "handle": 536870925,
+ "handle": 536870922,
"destination_field": {
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "start_offset": 35,
+ "name": "ig_intr_md_for_tm.ucast_egress_port",
+ "start_offset": 7,
"start_bit": 0,
- "bit_width": 1,
+ "bit_width": 9,
"range_field": false
},
"source_value": {
- "value": 1,
+ "value": 192,
"signed": false
},
"mask": {
- "value": 1,
+ "value": 511,
+ "signed": false
+ }
+ },
+ {
+ "handle": 536870923,
+ "header_instance": "packet_in_hdr"
+ },
+ {
+ "handle": 536870924,
+ "destination_field": {
+ "name": "packet_in_hdr.ingress_port",
+ "start_offset": 0,
+ "start_bit": 0,
+ "bit_width": 9,
+ "range_field": false
+ },
+ "source_value": {
+ "name": "ig_intr_md.ingress_port",
+ "start_offset": 7,
+ "start_bit": 0,
+ "bit_width": 9,
+ "range_field": false
+ },
+ "mask": {
+ "value": 511,
"signed": false
}
}
],
"stage_primitives": [
{
- "phv_word_address": 64
+ "phv_word_address": 130
+ },
+ {
+ "phv_word_address": 66
+ },
+ {
+ "phv_word_address": 129
}
],
"indirect_resources": []
},
{
"name": "_drop",
- "handle": 536870928,
+ "handle": 536870927,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -19077,13 +18491,13 @@
"p4_parameters": [],
"p4_primitives": [
{
- "handle": 536870927,
+ "handle": 536870926,
"table_direction": "ingress"
}
],
"stage_primitives": [
{
- "phv_word_address": 68
+ "phv_word_address": 67
}
],
"indirect_resources": []
@@ -19120,11 +18534,11 @@
"name": "ingress_port_counter",
"handle": 67108865,
"direction": "ingress",
- "number_entries": 254,
+ "number_entries": 510,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "statistics",
"number_entries": 4096,
"pack_format_length": 1,
@@ -19228,11 +18642,11 @@
"name": "egress_port_counter",
"handle": 67108866,
"direction": "ingress",
- "number_entries": 254,
+ "number_entries": 510,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "statistics",
"number_entries": 4096,
"pack_format_length": 1,
@@ -19340,7 +18754,7 @@
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "statistics",
"number_entries": 4096,
"pack_format_length": 1,
@@ -19452,7 +18866,6 @@
"ipv4_flags": 1,
"ig_intr_md_ingress_port": 2,
"ipv4_hdrChecksum": 2,
- "ig_intr_md_for_tm_copy_to_cpu": 1,
"tcp_ecn": 1,
"ipv4_srcAddr": 4,
"udp_length_": 2,
@@ -19489,9 +18902,7 @@
"ipv4_fragOffset": 2,
"eg_intr_md_egress_cos": 1,
"ipv4_flags": 1,
- "ig_intr_md_ingress_port": 2,
"ipv4_hdrChecksum": 2,
- "ig_intr_md_for_tm_copy_to_cpu": 1,
"tcp_ecn": 1,
"ipv4_srcAddr": 4,
"udp_length_": 2,
@@ -19523,7 +18934,7 @@
},
{
"0": {
- "67": {
+ "66": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
@@ -19533,7 +18944,7 @@
}
},
"1": {
- "82": {
+ "81": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/p4_name_lookup.json b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/p4_name_lookup.json
index b507e45..329eff9 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/p4_name_lookup.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/p4_name_lookup.json
@@ -11,13 +11,14 @@
"6": "default_parser",
"7": "parse_pkt_out",
"8": "<POV initialization>",
- "9": "start"
+ "9": "start",
+ "10": "parse_tcp"
},
"pov": {
"0": {
"0": "--pov_reserved--_0"
},
- "67": {
+ "66": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
@@ -40,7 +41,7 @@
"8": "parse_pkt_in"
},
"pov": {
- "82": {
+ "81": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
@@ -57,28 +58,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -91,6 +87,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -100,9 +98,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -111,12 +110,21 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {
"0": {
"actions": {
- "_packet_out": {
+ "_drop": {
+ "direction": 0,
+ "primitives": [
+ {
+ "name": "DropPrimitive"
+ }
+ ],
+ "table_name": "table0"
+ },
+ "send_to_cpu": {
"direction": 0,
"primitives": [
{
@@ -136,44 +144,13 @@
"name": "ModifyFieldPrimitive",
"src": [
{
- "name": "packet_out_hdr.egress_port",
- "phv_allocation": [
- {
- "field_instance_least_significant_bit": 0,
- "field_instance_most_significant_bit": 8,
- "phv_container_least_significant_bit": 7,
- "phv_container_most_significant_bit": 15,
- "word_address": 129
- }
- ],
- "type": "phv"
+ "name": 192,
+ "type": "immediate"
}
]
},
{
"dst": {
- "name": "packet_out_hdr",
- "type": "header"
- },
- "name": "RemoveHeaderPrimitive"
- }
- ],
- "table_name": "ingress_pkt"
- }
- },
- "instruction_addresses": {
- "65": "_packet_out"
- },
- "match_fields": {},
- "table_name": "ingress_pkt"
- },
- "1": {
- "actions": {
- "add_packet_in_hdr": {
- "direction": 1,
- "primitives": [
- {
- "dst": {
"name": "packet_in_hdr",
"type": "header"
},
@@ -188,7 +165,7 @@
"field_instance_most_significant_bit": 8,
"phv_container_least_significant_bit": 7,
"phv_container_most_significant_bit": 15,
- "word_address": 145
+ "word_address": 129
}
],
"type": "phv"
@@ -203,7 +180,7 @@
"field_instance_most_significant_bit": 8,
"phv_container_least_significant_bit": 0,
"phv_container_most_significant_bit": 8,
- "word_address": 144
+ "word_address": 128
}
],
"type": "phv"
@@ -211,117 +188,6 @@
]
}
],
- "table_name": "egress_pkt"
- }
- },
- "instruction_addresses": {
- "65": "add_packet_in_hdr"
- },
- "match_fields": {},
- "table_name": "egress_pkt"
- }
- },
- "stateful_tables": []
- },
- "1": {
- "containers": {
- "0": "I [POV[31:0]]",
- "1": "I [ethernet.dstAddr[39:8]]",
- "2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
- "128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
- "129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "130": "I [ig_intr_md_for_tm.ucast_egress_port]",
- "131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
- "256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "257": "I [ipv4.srcAddr]",
- "258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
- "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "265": "E [ipv4.srcAddr]",
- "266": "E [ipv4.dstAddr]",
- "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "269": "E [tcp.checksum, tcp.urgentPtr]",
- "270": "E [ethernet.dstAddr[39:8]]",
- "271": "E [ethernet.srcAddr[31:0]]",
- "288": "I [ipv4.version, ipv4.ihl]",
- "289": "I [ipv4.diffserv]",
- "290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ipv4.version, ipv4.ihl]",
- "297": "E [ipv4.diffserv]",
- "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "300": "E [ethernet.dstAddr[47:40]]",
- "301": "E [ethernet.srcAddr[39:32]]",
- "320": "I [ipv4.totalLen]",
- "321": "I [ipv4.identification]",
- "322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
- "332": "E [ipv4.totalLen]",
- "333": "E [ipv4.identification]",
- "334": "E [ipv4.flags, ipv4.fragOffset]",
- "335": "E [tcp.dstPort]",
- "336": "E [tcp.seqNo[31:16], udp.dstPort]",
- "337": "E [tcp.seqNo[15:0]]",
- "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
- },
- "logical_tables": {
- "0": {
- "actions": {
- "_drop": {
- "direction": 0,
- "primitives": [
- {
- "name": "DropPrimitive"
- }
- ],
- "table_name": "table0"
- },
- "send_to_cpu": {
- "direction": 0,
- "primitives": [
- {
- "dst": {
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "phv_allocation": [
- {
- "field_instance_least_significant_bit": 0,
- "field_instance_most_significant_bit": 0,
- "phv_container_least_significant_bit": 0,
- "phv_container_most_significant_bit": 0,
- "word_address": 64
- }
- ],
- "type": "phv"
- },
- "name": "ModifyFieldPrimitive",
- "src": [
- {
- "name": 1,
- "type": "immediate"
- }
- ]
- }
- ],
"table_name": "table0"
},
"set_egress_port": {
@@ -365,7 +231,7 @@
"field_instance_most_significant_bit": 47,
"phv_container_least_significant_bit": 0,
"phv_container_most_significant_bit": 7,
- "word_address": 65
+ "word_address": 64
},
{
"field_instance_least_significant_bit": 8,
@@ -404,7 +270,7 @@
"field_instance_most_significant_bit": 39,
"phv_container_least_significant_bit": 0,
"phv_container_most_significant_bit": 7,
- "word_address": 66
+ "word_address": 65
},
{
"field_instance_least_significant_bit": 0,
@@ -425,37 +291,85 @@
]
},
"table_name": "table0"
+ },
+ "1": {
+ "actions": {
+ "_process_packet_out": {
+ "direction": 0,
+ "primitives": [
+ {
+ "dst": {
+ "name": "ig_intr_md_for_tm.ucast_egress_port",
+ "phv_allocation": [
+ {
+ "field_instance_least_significant_bit": 0,
+ "field_instance_most_significant_bit": 8,
+ "phv_container_least_significant_bit": 0,
+ "phv_container_most_significant_bit": 8,
+ "word_address": 130
+ }
+ ],
+ "type": "phv"
+ },
+ "name": "ModifyFieldPrimitive",
+ "src": [
+ {
+ "name": "packet_out_hdr.egress_port",
+ "phv_allocation": [
+ {
+ "field_instance_least_significant_bit": 0,
+ "field_instance_most_significant_bit": 8,
+ "phv_container_least_significant_bit": 7,
+ "phv_container_most_significant_bit": 15,
+ "word_address": 129
+ }
+ ],
+ "type": "phv"
+ }
+ ]
+ },
+ {
+ "dst": {
+ "name": "packet_out_hdr",
+ "type": "header"
+ },
+ "name": "RemoveHeaderPrimitive"
+ }
+ ],
+ "table_name": "process_packet_out_table"
+ }
+ },
+ "instruction_addresses": {
+ "68": "_process_packet_out"
+ },
+ "match_fields": {},
+ "table_name": "process_packet_out_table"
}
},
"stateful_tables": []
},
- "2": {
+ "1": {
"containers": {
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -468,6 +382,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -477,9 +393,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -488,7 +405,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {
"0": {
@@ -538,33 +455,28 @@
},
"stateful_tables": []
},
- "3": {
+ "2": {
"containers": {
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -577,6 +489,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -586,9 +500,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -597,7 +512,69 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
+ },
+ "logical_tables": {},
+ "stateful_tables": []
+ },
+ "3": {
+ "containers": {
+ "0": "I [POV[31:0]]",
+ "1": "I [ethernet.dstAddr[39:8]]",
+ "2": "I [ethernet.srcAddr[31:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
+ "128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
+ "129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
+ "130": "I [ig_intr_md_for_tm.ucast_egress_port]",
+ "131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "132": "I [ethernet.etherType]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "257": "I [ipv4.srcAddr]",
+ "258": "I [ipv4.dstAddr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
+ "288": "I [ipv4.version, ipv4.ihl]",
+ "289": "I [ipv4.diffserv]",
+ "290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
+ "320": "I [ipv4.totalLen]",
+ "321": "I [ipv4.identification]",
+ "322": "I [ipv4.flags, ipv4.fragOffset]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -607,28 +584,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -641,6 +613,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -650,9 +624,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -661,7 +636,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -671,28 +646,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -705,6 +675,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -714,9 +686,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -725,7 +698,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -735,28 +708,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -769,6 +737,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -778,9 +748,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -789,7 +760,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -799,28 +770,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -833,6 +799,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -842,9 +810,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -853,7 +822,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -863,28 +832,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -897,6 +861,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -906,9 +872,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -917,7 +884,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -927,28 +894,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -961,6 +923,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -970,9 +934,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -981,7 +946,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -991,28 +956,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -1025,6 +985,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -1034,9 +996,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -1045,7 +1008,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -1055,28 +1018,23 @@
"0": "I [POV[31:0]]",
"1": "I [ethernet.dstAddr[39:8]]",
"2": "I [ethernet.srcAddr[31:0]]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ethernet.dstAddr[47:40]]",
- "66": "I [ethernet.srcAddr[39:32]]",
- "67": "I [POV[39:32]]",
- "68": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ethernet.dstAddr[47:40]]",
+ "65": "I [ethernet.srcAddr[39:32]]",
+ "66": "I [POV[39:32]]",
+ "67": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
"131": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"132": "I [ethernet.etherType]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"257": "I [ipv4.srcAddr]",
"258": "I [ipv4.dstAddr]",
- "259": "I [tcp.ackNo, udp.length_, udp.checksum]",
- "260": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "261": "I [tcp.checksum, tcp.urgentPtr]",
+ "259": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]",
+ "260": "I [tcp.checksum, tcp.urgentPtr]",
"264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
"265": "E [ipv4.srcAddr]",
"266": "E [ipv4.dstAddr]",
@@ -1089,6 +1047,8 @@
"289": "I [ipv4.diffserv]",
"290": "I [tcp.srcPort[15:8], udp.srcPort[15:8]]",
"291": "I [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "292": "I [tcp.dstPort[15:8]]",
+ "293": "I [tcp.dstPort[7:0]]",
"296": "E [ipv4.version, ipv4.ihl]",
"297": "E [ipv4.diffserv]",
"298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
@@ -1098,9 +1058,10 @@
"320": "I [ipv4.totalLen]",
"321": "I [ipv4.identification]",
"322": "I [ipv4.flags, ipv4.fragOffset]",
- "323": "I [tcp.dstPort, udp.dstPort]",
- "324": "I [tcp.seqNo[31:16]]",
- "325": "I [tcp.seqNo[15:0]]",
+ "323": "I [tcp.seqNo[31:16], udp.dstPort]",
+ "324": "I [tcp.seqNo[15:0]]",
+ "325": "I [tcp.ackNo[31:16]]",
+ "326": "I [tcp.ackNo[15:0]]",
"332": "E [ipv4.totalLen]",
"333": "E [ipv4.identification]",
"334": "E [ipv4.flags, ipv4.fragOffset]",
@@ -1109,7 +1070,7 @@
"337": "E [tcp.seqNo[15:0]]",
"338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
"339": "E [ethernet.etherType]",
- "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/parser.context.json b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/parser.context.json
index b06a1fc..d35269e 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/parser.context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/parser.context.json
@@ -243,7 +243,6 @@
null,
null,
null,
- null,
{
"origin": "start",
"origin-case": 0,
@@ -281,6 +280,12 @@
"origin-mask": 511
},
{
+ "origin": "parse_tcp",
+ "origin-case": 0,
+ "state": "parse_tcp//spilled",
+ "origin-mask": 0
+ },
+ {
"origin": "parse_ipv4",
"origin-case": 0,
"state": "<leaf>",
@@ -334,7 +339,8 @@
"6": "default_parser",
"7": "parse_pkt_out",
"8": "<POV initialization>_<Ingress intrinsic metadata>_<Phase 0>",
- "9": "start"
+ "9": "start",
+ "10": "parse_tcp//spilled"
}
},
"egress": {
@@ -590,13 +596,13 @@
"origin-mask": 0
},
{
- "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"origin-case": 0,
"state": "default_parser",
"origin-mask": 0
},
{
- "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"origin-case": 0,
"state": "parse_pkt_in",
"origin-mask": 255
@@ -652,7 +658,7 @@
{
"origin": "<Shim start state>",
"origin-case": 0,
- "state": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "state": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"origin-mask": 0
}
],
@@ -665,7 +671,7 @@
"4": "parse_udp",
"5": "default_parser",
"6": "parse_pkt_out",
- "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"8": "parse_pkt_in"
}
}
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/phv.context.json b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/phv.context.json
index 8aebcde..c6938b6 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/phv.context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/context/phv.context.json
@@ -348,19 +348,6 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 0,
- "data_msb": 0,
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "container_lsb": 0,
- "container_msb": 0
- }
- ],
- "address": 64
- },
- {
- "pipeline": "ingress",
- "data": [
- {
"data_lsb": 40,
"data_msb": 47,
"name": "ethernet.dstAddr",
@@ -368,7 +355,7 @@
"container_msb": 7
}
],
- "address": 65
+ "address": 64
},
{
"pipeline": "ingress",
@@ -381,7 +368,7 @@
"container_msb": 7
}
],
- "address": 66
+ "address": 65
},
{
"pipeline": "ingress",
@@ -394,7 +381,7 @@
"container_msb": 7
}
],
- "address": 67
+ "address": 66
},
{
"pipeline": "ingress",
@@ -407,6 +394,11 @@
"container_msb": 7
}
],
+ "address": 67
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 68
},
{
@@ -469,19 +461,6 @@
"data": [
{
"data_lsb": 0,
- "data_msb": 0,
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "container_lsb": 0,
- "container_msb": 0
- }
- ],
- "address": 80
- },
- {
- "pipeline": "egress",
- "data": [
- {
- "data_lsb": 0,
"data_msb": 4,
"name": "eg_intr_md._pad7",
"container_lsb": 3,
@@ -495,7 +474,7 @@
"container_msb": 2
}
],
- "address": 81
+ "address": 80
},
{
"pipeline": "egress",
@@ -508,6 +487,11 @@
"container_msb": 7
}
],
+ "address": 81
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 82
},
{
@@ -916,39 +900,6 @@
"data": [
{
"data_lsb": 0,
- "data_msb": 8,
- "name": "ig_intr_md.ingress_port",
- "container_lsb": 0,
- "container_msb": 8
- }
- ],
- "address": 144
- },
- {
- "pipeline": "egress",
- "data": [
- {
- "data_lsb": 0,
- "data_msb": 8,
- "name": "packet_in_hdr.ingress_port",
- "container_lsb": 7,
- "container_msb": 15
- },
- {
- "data_lsb": 0,
- "data_msb": 6,
- "name": "packet_in_hdr._padding",
- "container_lsb": 0,
- "container_msb": 6
- }
- ],
- "address": 145
- },
- {
- "pipeline": "egress",
- "data": [
- {
- "data_lsb": 0,
"data_msb": 6,
"name": "eg_intr_md._pad0",
"container_lsb": 9,
@@ -962,6 +913,16 @@
"container_msb": 8
}
],
+ "address": 144
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 145
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 146
},
{
@@ -1439,33 +1400,6 @@
"data": [
{
"data_lsb": 0,
- "data_msb": 31,
- "name": "tcp.ackNo",
- "container_lsb": 0,
- "container_msb": 31
- },
- {
- "data_lsb": 0,
- "data_msb": 15,
- "name": "udp.length_",
- "container_lsb": 16,
- "container_msb": 31
- },
- {
- "data_lsb": 0,
- "data_msb": 15,
- "name": "udp.checksum",
- "container_lsb": 0,
- "container_msb": 15
- }
- ],
- "address": 259
- },
- {
- "pipeline": "ingress",
- "data": [
- {
- "data_lsb": 0,
"data_msb": 3,
"name": "tcp.dataOffset",
"container_lsb": 28,
@@ -1498,9 +1432,23 @@
"name": "tcp.window",
"container_lsb": 0,
"container_msb": 15
+ },
+ {
+ "data_lsb": 0,
+ "data_msb": 15,
+ "name": "udp.length_",
+ "container_lsb": 16,
+ "container_msb": 31
+ },
+ {
+ "data_lsb": 0,
+ "data_msb": 15,
+ "name": "udp.checksum",
+ "container_lsb": 0,
+ "container_msb": 15
}
],
- "address": 260
+ "address": 259
},
{
"pipeline": "ingress",
@@ -1520,6 +1468,11 @@
"container_msb": 15
}
],
+ "address": 260
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 261
},
{
@@ -1853,13 +1806,29 @@
"address": 291
},
{
- "pipeline": "unused",
- "data": [],
+ "pipeline": "ingress",
+ "data": [
+ {
+ "data_lsb": 8,
+ "data_msb": 15,
+ "name": "tcp.dstPort",
+ "container_lsb": 0,
+ "container_msb": 7
+ }
+ ],
"address": 292
},
{
- "pipeline": "unused",
- "data": [],
+ "pipeline": "ingress",
+ "data": [
+ {
+ "data_lsb": 0,
+ "data_msb": 7,
+ "name": "tcp.dstPort",
+ "container_lsb": 0,
+ "container_msb": 7
+ }
+ ],
"address": 293
},
{
@@ -2111,9 +2080,9 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 0,
- "data_msb": 15,
- "name": "tcp.dstPort",
+ "data_lsb": 16,
+ "data_msb": 31,
+ "name": "tcp.seqNo",
"container_lsb": 0,
"container_msb": 15
},
@@ -2131,8 +2100,8 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 16,
- "data_msb": 31,
+ "data_lsb": 0,
+ "data_msb": 15,
"name": "tcp.seqNo",
"container_lsb": 0,
"container_msb": 15
@@ -2144,9 +2113,9 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 0,
- "data_msb": 15,
- "name": "tcp.seqNo",
+ "data_lsb": 16,
+ "data_msb": 31,
+ "name": "tcp.ackNo",
"container_lsb": 0,
"container_msb": 15
}
@@ -2154,8 +2123,16 @@
"address": 325
},
{
- "pipeline": "unused",
- "data": [],
+ "pipeline": "ingress",
+ "data": [
+ {
+ "data_lsb": 0,
+ "data_msb": 15,
+ "name": "tcp.ackNo",
+ "container_lsb": 0,
+ "container_msb": 15
+ }
+ ],
"address": 326
},
{
@@ -2324,6 +2301,20 @@
"name": "packet_out_hdr._padding",
"container_lsb": 0,
"container_msb": 6
+ },
+ {
+ "data_lsb": 0,
+ "data_msb": 8,
+ "name": "packet_in_hdr.ingress_port",
+ "container_lsb": 7,
+ "container_msb": 15
+ },
+ {
+ "data_lsb": 0,
+ "data_msb": 6,
+ "name": "packet_in_hdr._padding",
+ "container_lsb": 0,
+ "container_msb": 6
}
],
"address": 340
@@ -2482,7 +2473,7 @@
"data_lsb": 0,
"data_msb": 5,
"container_lsb": 16,
- "address": 260
+ "address": 259
}
],
"udp.length_": [
@@ -2500,7 +2491,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 16,
- "address": 261
+ "address": 260
}
],
"tcp.srcPort": [
@@ -2519,13 +2510,20 @@
"address": 291
}
],
- "udp.dstPort": [
+ "tcp.ackNo": [
+ {
+ "container_msb": 15,
+ "data_lsb": 16,
+ "data_msb": 31,
+ "container_lsb": 0,
+ "address": 325
+ },
{
"container_msb": 15,
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 323
+ "address": 326
}
],
"ethernet.etherType": [
@@ -2566,11 +2564,18 @@
],
"tcp.dstPort": [
{
- "container_msb": 15,
- "data_lsb": 0,
+ "container_msb": 7,
+ "data_lsb": 8,
"data_msb": 15,
"container_lsb": 0,
- "address": 323
+ "address": 292
+ },
+ {
+ "container_msb": 7,
+ "data_lsb": 0,
+ "data_msb": 7,
+ "container_lsb": 0,
+ "address": 293
}
],
"ig_intr_md._pad1": [
@@ -2606,7 +2611,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 5,
- "address": 68
+ "address": 67
}
],
"POV": [
@@ -2622,7 +2627,7 @@
"data_lsb": 32,
"data_msb": 39,
"container_lsb": 0,
- "address": 67
+ "address": 66
}
],
"tcp.res": [
@@ -2631,7 +2636,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 25,
- "address": 260
+ "address": 259
}
],
"ethernet.dstAddr": [
@@ -2647,7 +2652,7 @@
"data_lsb": 40,
"data_msb": 47,
"container_lsb": 0,
- "address": 65
+ "address": 64
},
{
"container_msb": 15,
@@ -2684,15 +2689,6 @@
"address": 129
}
],
- "ipv4.version": [
- {
- "container_msb": 7,
- "data_lsb": 0,
- "data_msb": 3,
- "container_lsb": 4,
- "address": 288
- }
- ],
"ethernet.srcAddr": [
{
"container_msb": 31,
@@ -2706,7 +2702,7 @@
"data_lsb": 32,
"data_msb": 39,
"container_lsb": 0,
- "address": 66
+ "address": 65
},
{
"container_msb": 7,
@@ -2785,14 +2781,14 @@
"data_lsb": 16,
"data_msb": 31,
"container_lsb": 0,
- "address": 324
+ "address": 323
},
{
"container_msb": 15,
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 325
+ "address": 324
}
],
"ipv4.ttl": [
@@ -2820,22 +2816,22 @@
"address": 291
}
],
- "tcp.ackNo": [
+ "udp.dstPort": [
{
- "container_msb": 31,
+ "container_msb": 15,
"data_lsb": 0,
- "data_msb": 31,
+ "data_msb": 15,
"container_lsb": 0,
- "address": 259
+ "address": 323
}
],
- "ig_intr_md_for_tm.copy_to_cpu": [
+ "ipv4.version": [
{
- "container_msb": 0,
+ "container_msb": 7,
"data_lsb": 0,
- "data_msb": 0,
- "container_lsb": 0,
- "address": 64
+ "data_msb": 3,
+ "container_lsb": 4,
+ "address": 288
}
],
"ipv4.srcAddr": [
@@ -2853,7 +2849,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 22,
- "address": 260
+ "address": 259
}
],
"tcp.window": [
@@ -2862,7 +2858,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 260
+ "address": 259
}
],
"ig_intr_md.ingress_port": [
@@ -2880,7 +2876,7 @@
"data_lsb": 0,
"data_msb": 3,
"container_lsb": 28,
- "address": 260
+ "address": 259
}
],
"ipv4.fragOffset": [
@@ -2907,7 +2903,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 261
+ "address": 260
}
]
},
@@ -2927,16 +2923,7 @@
"data_lsb": 0,
"data_msb": 8,
"container_lsb": 7,
- "address": 145
- }
- ],
- "tcp.checksum": [
- {
- "container_msb": 31,
- "data_lsb": 0,
- "data_msb": 15,
- "container_lsb": 16,
- "address": 269
+ "address": 340
}
],
"tcp.srcPort": [
@@ -3006,7 +2993,7 @@
"data_lsb": 0,
"data_msb": 6,
"container_lsb": 9,
- "address": 146
+ "address": 144
}
],
"eg_intr_md.egress_cos": [
@@ -3015,7 +3002,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 0,
- "address": 81
+ "address": 80
}
],
"eg_intr_md._pad7": [
@@ -3024,7 +3011,7 @@
"data_lsb": 0,
"data_msb": 4,
"container_lsb": 3,
- "address": 81
+ "address": 80
}
],
"POV": [
@@ -3033,7 +3020,7 @@
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 0,
- "address": 82
+ "address": 81
}
],
"tcp.res": [
@@ -3086,13 +3073,13 @@
"address": 266
}
],
- "packet_in_hdr._padding": [
+ "ipv4.diffserv": [
{
- "container_msb": 6,
+ "container_msb": 7,
"data_lsb": 0,
- "data_msb": 6,
+ "data_msb": 7,
"container_lsb": 0,
- "address": 145
+ "address": 297
}
],
"ipv4.totalLen": [
@@ -3104,15 +3091,6 @@
"address": 332
}
],
- "ipv4.version": [
- {
- "container_msb": 7,
- "data_lsb": 0,
- "data_msb": 3,
- "container_lsb": 4,
- "address": 296
- }
- ],
"ethernet.srcAddr": [
{
"container_msb": 31,
@@ -3136,13 +3114,13 @@
"address": 338
}
],
- "ipv4.diffserv": [
+ "packet_in_hdr._padding": [
{
- "container_msb": 7,
+ "container_msb": 6,
"data_lsb": 0,
- "data_msb": 7,
+ "data_msb": 6,
"container_lsb": 0,
- "address": 297
+ "address": 340
}
],
"ipv4.flags": [
@@ -3169,7 +3147,7 @@
"data_lsb": 0,
"data_msb": 8,
"container_lsb": 0,
- "address": 146
+ "address": 144
}
],
"packet_out_hdr.egress_port": [
@@ -3249,13 +3227,13 @@
"address": 267
}
],
- "ig_intr_md_for_tm.copy_to_cpu": [
+ "ipv4.version": [
{
- "container_msb": 0,
+ "container_msb": 7,
"data_lsb": 0,
- "data_msb": 0,
- "container_lsb": 0,
- "address": 80
+ "data_msb": 3,
+ "container_lsb": 4,
+ "address": 296
}
],
"ipv4.srcAddr": [
@@ -3285,13 +3263,13 @@
"address": 268
}
],
- "ig_intr_md.ingress_port": [
+ "tcp.checksum": [
{
- "container_msb": 8,
+ "container_msb": 31,
"data_lsb": 0,
- "data_msb": 8,
- "container_lsb": 0,
- "address": 144
+ "data_msb": 15,
+ "container_lsb": 16,
+ "address": 269
}
],
"tcp.dataOffset": [
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/default.json b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/default.json
index 01ae0ac..d082348 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/default.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/default.json
@@ -194,7 +194,7 @@
"parser_ops" : [],
"transitions" : [
{
- "value" : "0x00ff",
+ "value" : "0xff",
"mask" : null,
"next_state" : "parse_pkt_out"
},
@@ -477,55 +477,14 @@
"learn_lists" : [],
"actions" : [
{
- "name" : "add_packet_in_hdr",
- "id" : 0,
- "runtime_data" : [],
- "primitives" : [
- {
- "op" : "add_header",
- "parameters" : [
- {
- "type" : "header",
- "value" : "packet_in_hdr"
- }
- ],
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 25,
- "column" : 4,
- "source_fragment" : "add_header(packet_in_hdr)"
- }
- },
- {
- "op" : "assign",
- "parameters" : [
- {
- "type" : "field",
- "value" : ["packet_in_hdr", "ingress_port"]
- },
- {
- "type" : "field",
- "value" : ["ig_intr_md", "ingress_port"]
- }
- ],
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 26,
- "column" : 4,
- "source_fragment" : "modify_field(packet_in_hdr.ingress_port, ig_intr_md.ingress_port)"
- }
- }
- ]
- },
- {
"name" : "NoAction",
- "id" : 1,
+ "id" : 0,
"runtime_data" : [],
"primitives" : []
},
{
"name" : "set_egress_port",
- "id" : 2,
+ "id" : 1,
"runtime_data" : [
{
"name" : "port",
@@ -556,7 +515,7 @@
},
{
"name" : "send_to_cpu",
- "id" : 3,
+ "id" : 2,
"runtime_data" : [],
"primitives" : [
{
@@ -573,16 +532,50 @@
],
"source_info" : {
"filename" : "include/actions.p4",
- "line" : 21,
+ "line" : 18,
"column" : 4,
"source_fragment" : "modify_field(ig_intr_md.egress_spec, 255)"
}
+ },
+ {
+ "op" : "add_header",
+ "parameters" : [
+ {
+ "type" : "header",
+ "value" : "packet_in_hdr"
+ }
+ ],
+ "source_info" : {
+ "filename" : "include/actions.p4",
+ "line" : 19,
+ "column" : 4,
+ "source_fragment" : "add_header(packet_in_hdr)"
+ }
+ },
+ {
+ "op" : "assign",
+ "parameters" : [
+ {
+ "type" : "field",
+ "value" : ["packet_in_hdr", "ingress_port"]
+ },
+ {
+ "type" : "field",
+ "value" : ["ig_intr_md", "ingress_port"]
+ }
+ ],
+ "source_info" : {
+ "filename" : "include/actions.p4",
+ "line" : 20,
+ "column" : 4,
+ "source_fragment" : "modify_field(packet_in_hdr.ingress_port, ig_intr_md.ingress_port)"
+ }
}
]
},
{
"name" : "_drop",
- "id" : 4,
+ "id" : 3,
"runtime_data" : [],
"primitives" : [
{
@@ -607,8 +600,8 @@
]
},
{
- "name" : "_packet_out",
- "id" : 5,
+ "name" : "_process_packet_out",
+ "id" : 4,
"runtime_data" : [],
"primitives" : [
{
@@ -649,7 +642,7 @@
},
{
"name" : "count_egress",
- "id" : 6,
+ "id" : 5,
"runtime_data" : [],
"primitives" : [
{
@@ -701,7 +694,7 @@
},
{
"name" : "count_ingress",
- "id" : 7,
+ "id" : 6,
"runtime_data" : [],
"primitives" : [
{
@@ -759,37 +752,8 @@
"init_table" : "node_2",
"tables" : [
{
- "name" : "ingress_pkt",
- "id" : 0,
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 11,
- "column" : 0,
- "source_fragment" : "table ingress_pkt { ..."
- },
- "key" : [],
- "match_type" : "exact",
- "type" : "simple",
- "max_size" : 1024,
- "with_counters" : false,
- "support_timeout" : false,
- "direct_meters" : null,
- "action_ids" : [5],
- "actions" : ["_packet_out"],
- "base_default_next" : "node_4",
- "next_tables" : {
- "_packet_out" : "node_4"
- },
- "default_entry" : {
- "action_id" : 5,
- "action_const" : false,
- "action_data" : [],
- "action_entry_const" : false
- }
- },
- {
"name" : "table0",
- "id" : 1,
+ "id" : 0,
"source_info" : {
"filename" : "default.p4",
"line" : 8,
@@ -824,17 +788,46 @@
"with_counters" : true,
"support_timeout" : false,
"direct_meters" : null,
- "action_ids" : [2, 3, 4, 1],
+ "action_ids" : [1, 2, 3, 0],
"actions" : ["set_egress_port", "send_to_cpu", "_drop", "NoAction"],
- "base_default_next" : "node_6",
+ "base_default_next" : "node_4",
"next_tables" : {
- "set_egress_port" : "node_6",
- "send_to_cpu" : "node_6",
- "_drop" : "node_6",
- "NoAction" : "node_6"
+ "set_egress_port" : "node_4",
+ "send_to_cpu" : "node_4",
+ "_drop" : "node_4",
+ "NoAction" : "node_4"
},
"default_entry" : {
- "action_id" : 1,
+ "action_id" : 0,
+ "action_const" : false,
+ "action_data" : [],
+ "action_entry_const" : false
+ }
+ },
+ {
+ "name" : "process_packet_out_table",
+ "id" : 1,
+ "source_info" : {
+ "filename" : "include/packet_io.p4",
+ "line" : 11,
+ "column" : 0,
+ "source_fragment" : "table process_packet_out_table { ..."
+ },
+ "key" : [],
+ "match_type" : "exact",
+ "type" : "simple",
+ "max_size" : 1024,
+ "with_counters" : false,
+ "support_timeout" : false,
+ "direct_meters" : null,
+ "action_ids" : [4],
+ "actions" : ["_process_packet_out"],
+ "base_default_next" : "node_6",
+ "next_tables" : {
+ "_process_packet_out" : "node_6"
+ },
+ "default_entry" : {
+ "action_id" : 4,
"action_const" : false,
"action_data" : [],
"action_entry_const" : false
@@ -856,14 +849,14 @@
"with_counters" : false,
"support_timeout" : false,
"direct_meters" : null,
- "action_ids" : [7],
+ "action_ids" : [6],
"actions" : ["count_ingress"],
"base_default_next" : "egress_port_count_table",
"next_tables" : {
"count_ingress" : "egress_port_count_table"
},
"default_entry" : {
- "action_id" : 7,
+ "action_id" : 6,
"action_const" : false,
"action_data" : [],
"action_entry_const" : false
@@ -885,14 +878,14 @@
"with_counters" : false,
"support_timeout" : false,
"direct_meters" : null,
- "action_ids" : [6],
+ "action_ids" : [5],
"actions" : ["count_egress"],
"base_default_next" : null,
"next_tables" : {
"count_egress" : null
},
"default_entry" : {
- "action_id" : 6,
+ "action_id" : 5,
"action_const" : false,
"action_data" : [],
"action_entry_const" : false
@@ -905,6 +898,32 @@
"name" : "node_2",
"id" : 0,
"source_info" : {
+ "filename" : "default.p4",
+ "line" : 30,
+ "column" : 12,
+ "source_fragment" : "valid(packet_out_hdr)"
+ },
+ "expression" : {
+ "type" : "expression",
+ "value" : {
+ "op" : "!=",
+ "left" : {
+ "type" : "field",
+ "value" : ["packet_out_hdr", "$valid$"]
+ },
+ "right" : {
+ "type" : "hexstr",
+ "value" : "0x01"
+ }
+ }
+ },
+ "true_next" : "table0",
+ "false_next" : "node_4"
+ },
+ {
+ "name" : "node_4",
+ "id" : 1,
+ "source_info" : {
"filename" : "include/packet_io.p4",
"line" : 19,
"column" : 8,
@@ -924,33 +943,7 @@
}
}
},
- "true_next" : "ingress_pkt",
- "false_next" : "node_4"
- },
- {
- "name" : "node_4",
- "id" : 1,
- "source_info" : {
- "filename" : "default.p4",
- "line" : 31,
- "column" : 12,
- "source_fragment" : "valid(packet_out_hdr)"
- },
- "expression" : {
- "type" : "expression",
- "value" : {
- "op" : "!=",
- "left" : {
- "type" : "field",
- "value" : ["packet_out_hdr", "$valid$"]
- },
- "right" : {
- "type" : "hexstr",
- "value" : "0x01"
- }
- }
- },
- "true_next" : "table0",
+ "true_next" : "process_packet_out_table",
"false_next" : "node_6"
},
{
@@ -984,67 +977,10 @@
{
"name" : "egress",
"id" : 1,
- "init_table" : "node_11",
- "tables" : [
- {
- "name" : "egress_pkt",
- "id" : 4,
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 29,
- "column" : 0,
- "source_fragment" : "table egress_pkt { ..."
- },
- "key" : [],
- "match_type" : "exact",
- "type" : "simple",
- "max_size" : 1024,
- "with_counters" : false,
- "support_timeout" : false,
- "direct_meters" : null,
- "action_ids" : [0],
- "actions" : ["add_packet_in_hdr"],
- "base_default_next" : null,
- "next_tables" : {
- "add_packet_in_hdr" : null
- },
- "default_entry" : {
- "action_id" : 0,
- "action_const" : false,
- "action_data" : [],
- "action_entry_const" : false
- }
- }
- ],
+ "init_table" : null,
+ "tables" : [],
"action_profiles" : [],
- "conditionals" : [
- {
- "name" : "node_11",
- "id" : 3,
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 40,
- "column" : 39,
- "source_fragment" : "=="
- },
- "expression" : {
- "type" : "expression",
- "value" : {
- "op" : "==",
- "left" : {
- "type" : "field",
- "value" : ["ig_intr_md", "ingress_port"]
- },
- "right" : {
- "type" : "hexstr",
- "value" : "0x00ff"
- }
- }
- },
- "false_next" : null,
- "true_next" : "egress_pkt"
- }
- ]
+ "conditionals" : []
}
],
"checksums" : [],
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/default.p4info b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/default.p4info
index f9b8654..168bd3b 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/default.p4info
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/default.p4info
@@ -47,12 +47,12 @@
}
tables {
preamble {
- id: 33560548
- name: "ingress_pkt"
- alias: "ingress_pkt"
+ id: 33607247
+ name: "process_packet_out_table"
+ alias: "process_packet_out_table"
}
action_refs {
- id: 16835928
+ id: 16798653
}
size: 1024
}
@@ -78,17 +78,6 @@
}
size: 1024
}
-tables {
- preamble {
- id: 33608529
- name: "egress_pkt"
- alias: "egress_pkt"
- }
- action_refs {
- id: 16835663
- }
- size: 1024
-}
actions {
preamble {
id: 16800567
@@ -124,9 +113,9 @@
}
actions {
preamble {
- id: 16835928
- name: "_packet_out"
- alias: "_packet_out"
+ id: 16798653
+ name: "_process_packet_out"
+ alias: "_process_packet_out"
}
}
actions {
@@ -143,13 +132,6 @@
alias: "count_ingress"
}
}
-actions {
- preamble {
- id: 16835663
- name: "add_packet_in_hdr"
- alias: "add_packet_in_hdr"
- }
-}
counters {
preamble {
id: 302008596
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/asm.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/asm.log
index fee7278..45374d2 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/asm.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/asm.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: asm.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.characterize.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.characterize.log
index cb0673b..891b532 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.characterize.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.characterize.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: mau.characterize.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
Match+Action Resource Usage
@@ -16,16 +16,13 @@
| | | | | | | | | | ver/vld | | | | | | | | Units | Units | | | |
| | | | | | | | | | | | | | | | | | (bits) | (bits) | | | |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
-| ingress_pkt | ingress | 0 | | - | 0 (0/0/0/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| egress_pkt | egress | 0 | | - | 0 (0/0/0/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| stage 0 totals | - | - | - | - | 0 (0/0/0/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| table0 | ingress | 0 | ternary | tcam | 3 (0/0/2/0/1) | 3 | 512 / 512 (0) | 121 / 121 (0) | 4 | 19 | 0/3/0/0/0/0/0/16 | 9 / 16 (7) | 125 / 132 (7) | 19 / 32 (13) | 9 | 0 / 0 (0) | 1 in 3 (132) | 1 in 3 (132) | 91.7% / 91.7% | 98.4% / 28.1% | - / - |
+| process_packet_out_table | ingress | 0 | | - | 0 (0/0/0/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
+| stage 0 totals | - | - | - | - | 3 (0/0/2/0/1) | 3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| | | | | | | | | | | | | | | | | | | | | | |
-| table0 | ingress | 1 | ternary | tcam | 3 (0/0/2/0/1) | 3 | 512 / 512 (0) | 121 / 121 (0) | 4 | 19 | 0/3/0/0/0/0/0/16 | 9 / 16 (7) | 125 / 132 (7) | 19 / 32 (13) | 9 | 0 / 0 (0) | 1 in 3 (132) | 1 in 3 (132) | 91.7% / 91.7% | 98.4% / 28.1% | - / - |
-| stage 1 totals | - | - | - | - | 3 (0/0/2/0/1) | 3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
-| | | | | | | | | | | | | | | | | | | | | | |
-| ingress_port_count_table | ingress | 2 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| egress_port_count_table | ingress | 2 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| stage 2 totals | - | - | - | - | 4 (0/0/4/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| ingress_port_count_table | ingress | 1 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
+| egress_port_count_table | ingress | 1 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
+| stage 1 totals | - | - | - | - | 4 (0/0/4/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| | | | | | | | | | | | | | | | | | | | | | |
| overall totals | - | - | - | - | 7 (0/0/6/0/1) | 3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
@@ -74,19 +71,11 @@
Total bits: 20
+----------------------------------------------------------------+
- ingress_pkt
+ process_packet_out_table
+----------------------------------------------------------------+
Match Overhead:
- Field --instruction_address-- [1:0] (2 bits)
- Total bits: 2
-+----------------------------------------------------------------+
- egress_pkt
-+----------------------------------------------------------------+
-Match Overhead:
- Field --instruction_address-- [1:0] (2 bits)
-
- Total bits: 2
+ Total bits: 0
+----------------------------------------------------------------+
table0
+----------------------------------------------------------------+
@@ -137,28 +126,10 @@
]
+----------------------------------------------------------------+
- ingress_pkt__action__:
+ process_packet_out_table__action__:
+----------------------------------------------------------------+
-Action _packet_out:
----------------------------
-Pack Format:
- table_word_width: 128
- memory_word_width: 128
- entries_per_table_word: 1
- number_memory_units_per_table_word: 1
- entry_list: [
- entry_number : 0
- field_list : [
- ]
- Field --padding-- is 0 bits : in bits [127:0]
-]
-
-+----------------------------------------------------------------+
- egress_pkt__action__:
-+----------------------------------------------------------------+
-
-Action add_packet_in_hdr:
+Action _process_packet_out:
---------------------------
Pack Format:
table_word_width: 128
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.config.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.config.log
index 12a4581..81dcf25 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.config.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.config.log
@@ -1,13 +1,13 @@
+---------------------------------------------------------------------+
| Log file: mau.config.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
Final Stage dependencies are:
(0, 'ingress') : match
(1, 'ingress') : match
- (2, 'ingress') : match
+ (2, 'ingress') : concurrent
(3, 'ingress') : concurrent
(4, 'ingress') : concurrent
(5, 'ingress') : concurrent
@@ -29,7 +29,7 @@
(9, 'egress') : concurrent
(10, 'egress') : concurrent
(11, 'egress') : concurrent
-Action/Concurrent chaining in ingress consists of [3, 4, 5]
+Action/Concurrent chaining in ingress consists of [2, 3, 4, 5]
Action/Concurrent chaining in ingress consists of [7, 8, 9, 10, 11]
Action/Concurrent chaining in egress consists of [1, 2, 3, 4, 5]
Action/Concurrent chaining in egress consists of [7, 8, 9, 10, 11]
@@ -50,320 +50,11 @@
Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=0].mau_match_input_xbar_exact_match_enable to be 0x1. (old value = 0x0 OR new value = 0x1)
Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=0].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=1].match_input_xbar_816b_ctl_address to be 3.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=1].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 1 to come from 8-bit PHV container 3.
- That PHV byte contains {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x8. (previous value = 0x0 OR new value = 0x8)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.hash.galois_field_matrix[byte_pair_index=0][hash_bit_index=41].byte1 to be 0x2.
-Configuring dp.hashout_ctl.hash_group_ingress_enable to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_logical_table to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_thread to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_matchdata_xor_en.gateway_table_matchdata_xor_en to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid0 to be 0x3
-Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid1 to be 0x3
-Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][0] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][1] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][0] to be 0xfffffd
-Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][1] to be 0xffffff
-Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0x8
-Configuring rams.match.merge.gateway_next_table_lut[0][3] to be 0x10
-Configuring rams.match.merge.gateway_en.gateway_en to be 0x1
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_select to be 0xe
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_enable to be 0x1
-allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_logical_select to be 0x0
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_inhibit_enable to be 0x1
-Configuring rams.match.merge.gateway_payload_exact_pbus[0].gateway_payload_exact_pbus to be 0x2
-Configuring rams.match.merge.gateway_payload_data[0][1][0][0].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][1][1][0].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_data[0][1][0][1].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][1][1][1].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_match_adr[0][1][0].gateway_payload_match_adr to be 0x7ffff
-Configuring rams.match.merge.gateway_payload_match_adr[0][1][1].gateway_payload_match_adr to be 0x7ffff
-
-+------------------------------------------------------------------------
-| Working on table _condition_3 in stage 0 ---
-+------------------------------------------------------------------------
---> Stage Gateway Table for condition _condition_3 in stage 0
-Configuring rams.match.merge.predication_ctl[direction_index=1].table_thread to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring dp.imem_table_addr_egress to be 0x2 (previous_value = 0x0 OR new_value = 0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=0].adr_dist_table_thread to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=1].adr_dist_table_thread to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_egress to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_egress to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_egress to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=1].mau_match_input_xbar_exact_match_enable to be 0x1. (old value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=1].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=2][output_byte=0].match_input_xbar_816b_ctl_address to be 0.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=2][output_byte=0].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 0 to come from 8-bit PHV container 16.
- That PHV byte contains {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]}.
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=6].match_input_xbar_din_power_ctl to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x1. (previous value = 0x1 OR new value = 0x1)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.hash.galois_field_matrix[byte_pair_index=0][hash_bit_index=40].byte0 to be 0x1.
-Configuring dp.hashout_ctl.hash_group_egress_enable to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring rams.array.row[row=7].vh_xbar[search_bus_index=0].exactmatch_row_vh_xbar_ctl.exactmatch_row_vh_xbar_select to be 0.
-Configuring rams.array.row[row=7].vh_xbar[search_bus_index=0].exactmatch_row_vh_xbar_ctl.exactmatch_row_vh_xbar_enable to be 1.
-Configuring rams.array.row[row=7].vh_adr_xbar.exactmatch_row_hashadr_xbar_ctl[search_bus_index=0].enabled_3bit_muxctl_select to be 0.
-Configuring rams.array.row[row=7].vh_adr_xbar.exactmatch_row_hashadr_xbar_ctl[search_bus_index=0].enabled_3bit_muxctl_enable to be 1.
-Configuring cfg_regs.mau_cfg_lt_thread.mau_cfg_lt_thread to be 0x2. (previous value = 0x0 OR new value = 0x2)
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_data0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_data1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_hash0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_hash1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_logical_table to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_thread to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_matchdata_xor_en.gateway_table_matchdata_xor_en to be 0x0
-Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[3].gateway_table_entry_versionvalid0 to be 0x3
-Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[3].gateway_table_entry_versionvalid1 to be 0x3
-Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[3][0] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[3][1] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][0] to be 0xfffffe
-Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][1] to be 0xffffff
-Configuring rams.match.merge.gateway_inhibit_lut[1] to be 0x8
-Configuring rams.match.merge.gateway_next_table_lut[1][3] to be 0xff
-Configuring rams.match.merge.gateway_en.gateway_en to be 0x3 (previous value 0x1 OR new value 0x2)
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_select to be 0xf
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_enable to be 0x1
-allocated_result_bus = Ram Data Bus MatchResult1R 0 left_and_right is 83 bits
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[0].exact_logical_select to be 0x1
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[0].exact_inhibit_enable to be 0x1
-Configuring rams.match.merge.gateway_payload_exact_pbus[0].gateway_payload_exact_pbus to be 0x3 (previous value 0x2 OR new value 0x1)
-Configuring rams.match.merge.gateway_payload_data[0][0][0][0].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][0][1][0].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_data[0][0][0][1].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][0][1][1].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_match_adr[0][0][0].gateway_payload_match_adr to be 0x7ffff
-Configuring rams.match.merge.gateway_payload_match_adr[0][0][1].gateway_payload_match_adr to be 0x7ffff
-
-+------------------------------------------------------------------------
-| Working on table ingress_pkt__action__ in stage 0 ---
-+------------------------------------------------------------------------
---> Action Data Table ingress_pkt__action__ with logical_table_id 0 that is reference type is 'direct'
-
-+------------------------------------------------------------------------
-| Working on table ingress_pkt in stage 0 ---
-+------------------------------------------------------------------------
---> Match Table with no key ingress_pkt with logical_table_id 0
-allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
-Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_select to be 0 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_select to be 0 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.mau_action_instruction_adr_default[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_default to be 0x0.
-Configuring rams.match.merge.mau_action_instruction_adr_mask[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_mask to be 0x1.
-Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x10.
-Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=0][entry_index=0].mau_action_instruction_adr_map_data to be 0x2080.
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=0][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
-Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=0].imem_subword16_instr to be 0x74412.
-Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=0].imem_subword16_color to be 1.
-Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=0].imem_subword16_parity to be 0.
-Micro instruction added in VLIW 0 for 16-bit position 2 for table ingress_pkt.
- Assembled as 0x74412 (or decimal 476178)
- Micro Instruction deposit-field for PHV Container 130 has bit width 23
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-
-Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=0].imem_subword8_instr to be 0x74d83.
-Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=0].imem_subword8_color to be 1.
-Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=0].imem_subword8_parity to be 1.
-Micro instruction added in VLIW 0 for 8-bit position 3 for table ingress_pkt.
- Assembled as 0x74d83 (or decimal 478595)
- Micro Instruction deposit-field for PHV Container 67 has bit width 20
- Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x8. (previous value = 0x0 OR new value = 0x8)
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x6. (previous value = 0x0 OR new value = 0x6)
-Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=1].action_instruction_adr_payload_shifter_en to be 1.
-
-+------------------------------------------------------------------------
-| Working on table egress_pkt__action__ in stage 0 ---
-+------------------------------------------------------------------------
---> Action Data Table egress_pkt__action__ with logical_table_id 1 that is reference type is 'direct'
-
-+------------------------------------------------------------------------
-| Working on table egress_pkt in stage 0 ---
-+------------------------------------------------------------------------
---> Match Table with no key egress_pkt with logical_table_id 1
-allocated_result_bus = Ram Data Bus MatchResult1R 0 left_and_right is 83 bits
-Configuring dp.imem_table_addr_egress to be 0x2 (previous_value = 0x2 OR new_value = 0x2).
-Configuring rams.match.merge.predication_ctl[direction_index=1].table_thread to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_egress to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_egress to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_egress to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=0].adr_dist_table_thread to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=1].adr_dist_table_thread to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=0].enabled_4bit_muxctl_select to be 1 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=0].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=0].enabled_4bit_muxctl_select to be 1 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=0].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.mau_action_instruction_adr_default[table_type_index=0][physical_result_bus=0].mau_action_instruction_adr_default to be 0x0.
-Configuring rams.match.merge.mau_action_instruction_adr_mask[table_type_index=0][physical_result_bus=0].mau_action_instruction_adr_mask to be 0x1.
-Configuring rams.match.merge.next_table_format_data[logical_table_id=1].match_next_table_adr_miss_value to be 0xff.
-Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x3 (previous_value=0x1 OR new_value=0x2).
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=0].mau_action_instruction_adr_map_data to be 0x2080.
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
-Configuring dp.imem.imem_subword8[unit_number=18][vliw_instruction_number=0].imem_subword8_instr to be 0x592.
-Configuring dp.imem.imem_subword8[unit_number=18][vliw_instruction_number=0].imem_subword8_color to be 1.
-Configuring dp.imem.imem_subword8[unit_number=18][vliw_instruction_number=0].imem_subword8_parity to be 0.
-Micro instruction added in VLIW 0 for 8-bit position 18 for table egress_pkt.
- Assembled as 0x592 (or decimal 1426)
- Micro Instruction deposit-field for PHV Container 82 has bit width 20
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x0 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x0 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-Configuring dp.imem.imem_subword16[unit_number=17][vliw_instruction_number=0].imem_subword16_instr to be 0x39fc01.
-Configuring dp.imem.imem_subword16[unit_number=17][vliw_instruction_number=0].imem_subword16_color to be 1.
-Configuring dp.imem.imem_subword16[unit_number=17][vliw_instruction_number=0].imem_subword16_parity to be 0.
-Micro instruction added in VLIW 0 for 16-bit position 17 for table egress_pkt.
- Assembled as 0x39fc01 (or decimal 3800065)
- Micro Instruction deposit-field for PHV Container 145 has bit width 23
- Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
-
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=6].actionmux_din_power_ctl to be 0x4. (previous value = 0x0 OR new value = 0x4)
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=10].actionmux_din_power_ctl to be 0x3. (previous value = 0x0 OR new value = 0x3)
-Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=0].action_instruction_adr_payload_shifter_en to be 1.
-+------------------------------------------------------------------------
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 10.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 0.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 1.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 10.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay1 to be 0.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 1.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=0].adr_dist_pipe_delay to be 0.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=1].adr_dist_pipe_delay to be 0.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=0].adr_dist_pipe_delay to be 0.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=1].adr_dist_pipe_delay to be 0.
-Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x3.
-Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=1].exact_match_phys_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x3.
-Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=1].exact_match_phys_result_en to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=0].exact_match_phys_result_thread to be 0x1.
-Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=1].exact_match_phys_result_thread to be 0x0.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_internal_delay_fifo to be 14.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_output_delay_fifo to be 19.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_delay_fifo_en to be 1.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_internal_delay_fifo to be 14.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_output_delay_fifo to be 0.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_delay_fifo_en to be 1.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_ingress to be 0x0.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_egress to be 0x0.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_ingress to be 0x0.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_egress to be 0x0.
---------------------------------------------
-Configuration for unused statistics ALUs.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=0].mau_cfg_stats_alu_lt to be 0xf.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=1].mau_cfg_stats_alu_lt to be 0xf.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=2].mau_cfg_stats_alu_lt to be 0xf.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=3].mau_cfg_stats_alu_lt to be 0xf.
-+------------------------------------------------------------------------
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
-Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_delay to be 0.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_delay to be 0.
-Configuring rams.match.merge.tcam_match_error_ctl[dir=1].tcam_match_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.tind_ecc_error_ctl[dir=1].tind_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_delay to be 0.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_delay to be 0.
-+------------------------------------------------------------------------
-Configuring dp.action_output_delay[direction_index=0].action_output_delay to be 17.
-Configuring dp.pipelength_added_stages[direction_index=0].pipelength_added_stages to be 0.
-Configuring dp.cur_stage_dependency_on_prev[direction_index=0].cur_stage_dependency_on_prev to be 0.
-Configuring dp.next_stage_dependency_on_cur[direction_index=0].next_stage_dependency_on_cur to be 0.
-Configuring dp.action_output_delay[direction_index=1].action_output_delay to be 17.
-Configuring dp.pipelength_added_stages[direction_index=1].pipelength_added_stages to be 0.
-Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 0.
-Configuring dp.next_stage_dependency_on_cur[direction_index=1].next_stage_dependency_on_cur to be 2.
-Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 0.
-Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 0.
-Configuring dp.phv_fifo_enable.phv_fifo_ingress_action_output_enable to be 1.
-Configuring dp.phv_fifo_enable.phv_fifo_ingress_final_output_enable to be 0.
-Configuring dp.phv_fifo_enable.phv_fifo_egress_action_output_enable to be 1.
-Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
-
-+------------------------------------------------------------------------
-| MAU Stage 1
-+------------------------------------------------------------------------
-
-+------------------------------------------------------------------------
-| Working on table _condition_1 in stage 1 ---
-+------------------------------------------------------------------------
---> Stage Gateway Table for condition _condition_1 in stage 1
-Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=0].mau_match_input_xbar_exact_match_enable to be 0x1. (old value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=0].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=0].match_input_xbar_816b_ctl_address to be 3.
+Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=0].match_input_xbar_816b_ctl_address to be 2.
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=0].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 0 to come from 8-bit PHV container 3.
+Configuring match input crossbar byte 0 to come from 8-bit PHV container 2.
That PHV byte contains {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x8. (previous value = 0x0 OR new value = 0x8)
+Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x4. (previous value = 0x0 OR new value = 0x4)
Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x1. (previous value = 0x0 OR new value = 0x1)
Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
Configuring dp.xbar_hash.hash.galois_field_matrix[byte_pair_index=0][hash_bit_index=40].byte0 to be 0x2.
@@ -386,7 +77,7 @@
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][0] to be 0xffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][1] to be 0xfffffe
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0x10
-Configuring rams.match.merge.gateway_next_table_lut[0][4] to be 0x20
+Configuring rams.match.merge.gateway_next_table_lut[0][4] to be 0x1
Configuring rams.match.merge.gateway_en.gateway_en to be 0x1
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_select to be 0xf
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_enable to be 0x1
@@ -396,22 +87,125 @@
Configuring rams.match.merge.gateway_payload_match_adr[0][0][1].gateway_payload_match_adr to be 0x7ffff
+------------------------------------------------------------------------
-| Working on table table0__action__ in stage 1 ---
+| Working on table process_packet_out_table__action__ in stage 0 ---
++------------------------------------------------------------------------
+--> Action Data Table process_packet_out_table__action__ with logical_table_id 1 that is reference type is 'direct'
+
++------------------------------------------------------------------------
+| Working on table process_packet_out_table in stage 0 ---
++------------------------------------------------------------------------
+--> Match Table with no key process_packet_out_table with logical_table_id 1
+allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
+Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_select to be 1 (logical table id).
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_select to be 1 (logical table id).
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
+Configuring rams.match.merge.mau_action_instruction_adr_default[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_default to be 0x40.
+Configuring rams.match.merge.mau_action_instruction_adr_mask[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_mask to be 0x0.
+Configuring rams.match.merge.next_table_format_data[logical_table_id=1].match_next_table_adr_miss_value to be 0x10.
+Configuring rams.match.merge.next_table_format_data[logical_table_id=1].match_next_table_adr_default to be 0x10.
+Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x2 (previous_value=0x0 OR new_value=0x2).
+Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=0].mau_action_instruction_adr_map_data to be 0x44.
+Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=2].imem_subword16_instr to be 0x74412.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=2].imem_subword16_color to be 0.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=2].imem_subword16_parity to be 1.
+Micro instruction added in VLIW 2 for 16-bit position 2 for table process_packet_out_table.
+ Assembled as 0x74412 (or decimal 476178)
+ Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+Configuring dp.imem.imem_subword8[unit_number=2][vliw_instruction_number=2].imem_subword8_instr to be 0x74d82.
+Configuring dp.imem.imem_subword8[unit_number=2][vliw_instruction_number=2].imem_subword8_color to be 0.
+Configuring dp.imem.imem_subword8[unit_number=2][vliw_instruction_number=2].imem_subword8_parity to be 1.
+Micro instruction added in VLIW 2 for 8-bit position 2 for table process_packet_out_table.
+ Assembled as 0x74d82 (or decimal 478594)
+ Micro Instruction deposit-field for PHV Container 66 has bit width 20
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
+ Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
+ Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
+ Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
+
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x4. (previous value = 0x0 OR new value = 0x4)
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x6. (previous value = 0x0 OR new value = 0x6)
+--> Stage Gateway Table for condition process_packet_out_table_always_true_condition in stage 0
+Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=0].mau_match_input_xbar_exact_match_enable to be 0x1. (old value = 0x1 OR new value = 0x0)
+Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=0].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
+Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x1. (previous value = 0x1 OR new value = 0x0)
+Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
+Configuring dp.hashout_ctl.hash_group_ingress_enable to be 0x1. (previous value = 0x1 OR new value = 0x1)
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data0_select to be 0x1
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data1_select to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash0_select to be 0x1
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash1_select to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_logical_table to be 0x1
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_thread to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_matchdata_xor_en.gateway_table_matchdata_xor_en to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid0 to be 0x3
+Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid1 to be 0x3
+Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][0] to be 0xffffffff
+Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][1] to be 0xffffffff
+Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][0] to be 0xffffff
+Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][1] to be 0xffffff
+Configuring rams.match.merge.gateway_inhibit_lut[1] to be 0x8
+Configuring rams.match.merge.gateway_next_table_lut[1][3] to be 0x10
+Configuring rams.match.merge.gateway_inhibit_lut[1] to be 0x18 (previous value 0x8 OR new value 0x10)
+Configuring rams.match.merge.gateway_next_table_lut[1][4] to be 0x10
+Configuring rams.match.merge.gateway_en.gateway_en to be 0x3 (previous value 0x1 OR new value 0x2)
+Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_select to be 0xe
+Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_enable to be 0x1
+allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
+Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_logical_select to be 0x1
+Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_inhibit_enable to be 0x1
+Configuring rams.match.merge.gateway_payload_exact_pbus[0].gateway_payload_exact_pbus to be 0x2
+Configuring rams.match.merge.gateway_payload_data[0][1][0][0].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_data[0][1][1][0].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_data[0][1][0][1].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_data[0][1][1][1].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_match_adr[0][1][0].gateway_payload_match_adr to be 0x7ffff
+Configuring rams.match.merge.gateway_payload_match_adr[0][1][1].gateway_payload_match_adr to be 0x7ffff
+Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=1].action_instruction_adr_payload_shifter_en to be 1.
+
++------------------------------------------------------------------------
+| Working on table table0__action__ in stage 0 ---
+------------------------------------------------------------------------
--> Action Data Table table0__action__ with logical_table_id 0 that is reference type is 'direct'
Configuring rams.match.adrdist.immediate_data_16b_ixbar_ctl[logical_table_concat_hi_lo_half=0].enabled_4bit_muxctl_select to be 4.
Configuring rams.match.adrdist.immediate_data_16b_ixbar_ctl[logical_table_concat_hi_lo_half=0].enabled_4bit_muxctl_enable to be 1.
+------------------------------------------------------------------------
-| Working on table table0 in stage 1 ---
+| Working on table table0 in stage 0 ---
+------------------------------------------------------------------------
--> Ternary Match Table table0 with logical_table_id 0
-Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
+Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x1).
Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=1][result_bus_number=0].enabled_4bit_muxctl_select to be 0 (logical table id).
Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=1][result_bus_number=0].enabled_4bit_muxctl_enable to be 1.
Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=3][result_bus_number=0].enabled_4bit_muxctl_select to be 0 (logical table id).
@@ -423,8 +217,8 @@
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=1][logical_table=0][entry_index=0].mau_action_instruction_adr_map_data to be 0x870a080.
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=1][logical_table=0][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
Configuring rams.match.merge.next_table_map_en to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data0 to be 0x20.
-Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x20.
+Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data0 to be 0x10.
+Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x10.
Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_mask to be 0x0.
Configuring rams.match.merge.mau_immediate_data_mask[table_type_index=1][result_bus_number=0].mau_immediate_data_mask to be 0xffff.
Configuring rams.match.merge.mau_stats_adr_mask[table_type_index=1][result_bus_number=0].mau_stats_adr_mask to be 0xffffe.
@@ -488,19 +282,19 @@
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=141].match_input_xbar_816b_ctl_enable to be 1.
Configuring match input crossbar byte 141 to come from 16-bit PHV container 3.
That PHV byte contains {ethernet.dstAddr[7:0]}.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=142].match_input_xbar_816b_ctl_address to be 2.
+Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=142].match_input_xbar_816b_ctl_address to be 1.
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=142].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 142 to come from 8-bit PHV container 2.
+Configuring match input crossbar byte 142 to come from 8-bit PHV container 1.
That PHV byte contains {ethernet.srcAddr[39:32]}.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=143].match_input_xbar_816b_ctl_address to be 1.
+Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=143].match_input_xbar_816b_ctl_address to be 0.
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=143].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 143 to come from 8-bit PHV container 1.
+Configuring match input crossbar byte 143 to come from 8-bit PHV container 0.
That PHV byte contains {ethernet.dstAddr[47:40]}.
Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=0].match_input_xbar_din_power_ctl to be 0x6. (previous value = 0x0 OR new value = 0x6)
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0xe. (previous value = 0x8 OR new value = 0x6)
+Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x7. (previous value = 0x4 OR new value = 0x3)
Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=8].match_input_xbar_din_power_ctl to be 0x19. (previous value = 0x0 OR new value = 0x19)
---> Idletime Table for match table table0 in stage 1
+--> Idletime Table for match table table0 in stage 0
Looking at Map RAM: Row 7 Unit 0
Configuring rams.map_alu.row[row=7].vh_xbars.adr_dist_idletime_adr_xbar_ctl[map_ram_index=0].enabled_4bit_muxctl_select to be select of 0.
Configuring rams.map_alu.row[row=7].vh_xbars.adr_dist_idletime_adr_xbar_ctl[map_ram_index=0].enabled_4bit_muxctl_select to be select of 1.
@@ -557,14 +351,29 @@
Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x4. (previous value = 0x0 OR new value = 0x4)
-Configuring dp.imem.imem_subword8[unit_number=0][vliw_instruction_number=1].imem_subword8_instr to be 0x590.
-Configuring dp.imem.imem_subword8[unit_number=0][vliw_instruction_number=1].imem_subword8_color to be 0.
-Configuring dp.imem.imem_subword8[unit_number=0][vliw_instruction_number=1].imem_subword8_parity to be 0.
-Micro instruction added in VLIW 1 for 8-bit position 0 for table table0.
- Assembled as 0x590 (or decimal 1424)
- Micro Instruction deposit-field for PHV Container 64 has bit width 20
- Field Src2 [3:0] : 0x0 (4 bits in instruction bits [3:0])
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x6. (previous value = 0x6 OR new value = 0x4)
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=1].imem_subword16_instr to be 0x4602.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=1].imem_subword16_color to be 0.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=1].imem_subword16_parity to be 0.
+Micro instruction added in VLIW 1 for 16-bit position 2 for table table0.
+ Assembled as 0x4602 (or decimal 17922)
+ Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+Configuring dp.imem.imem_subword8[unit_number=2][vliw_instruction_number=1].imem_subword8_instr to be 0x592.
+Configuring dp.imem.imem_subword8[unit_number=2][vliw_instruction_number=1].imem_subword8_color to be 0.
+Configuring dp.imem.imem_subword8[unit_number=2][vliw_instruction_number=1].imem_subword8_parity to be 1.
+Micro instruction added in VLIW 1 for 8-bit position 2 for table table0.
+ Assembled as 0x592 (or decimal 1426)
+ Micro Instruction deposit-field for PHV Container 66 has bit width 20
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -573,14 +382,30 @@
Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=1].imem_subword8_instr to be 0xb7d94.
-Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=1].imem_subword8_color to be 1.
-Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=1].imem_subword8_parity to be 1.
-Micro instruction added in VLIW 1 for 8-bit position 4 for table table0.
- Assembled as 0xb7d94 (or decimal 753044)
- Micro Instruction deposit-field for PHV Container 68 has bit width 20
- Field Src2 [3:0] : 0x4 (4 bits in instruction bits [3:0])
+Configuring dp.imem.imem_subword16[unit_number=1][vliw_instruction_number=1].imem_subword16_instr to be 0x39fc01.
+Configuring dp.imem.imem_subword16[unit_number=1][vliw_instruction_number=1].imem_subword16_color to be 0.
+Configuring dp.imem.imem_subword16[unit_number=1][vliw_instruction_number=1].imem_subword16_parity to be 1.
+Micro instruction added in VLIW 1 for 16-bit position 1 for table table0.
+ Assembled as 0x39fc01 (or decimal 3800065)
+ Micro Instruction deposit-field for PHV Container 129 has bit width 23
+ Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
+
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x4. (previous value = 0x4 OR new value = 0x4)
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x7. (previous value = 0x6 OR new value = 0x7)
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=1].imem_subword8_instr to be 0xb7d93.
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=1].imem_subword8_color to be 1.
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=1].imem_subword8_parity to be 0.
+Micro instruction added in VLIW 1 for 8-bit position 3 for table table0.
+ Assembled as 0xb7d93 (or decimal 753043)
+ Micro Instruction deposit-field for PHV Container 67 has bit width 20
+ Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -589,7 +414,7 @@
Field right_rotate [2:0] : 0x3 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x1 (1 bits in instruction bits [19:19])
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x11. (previous value = 0x1 OR new value = 0x10)
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0xc. (previous value = 0x4 OR new value = 0x8)
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=1][result_bus=0].idletime_adr_payload_shifter_en to be 1.
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=1][result_bus=0].stats_adr_payload_shifter_en to be 1.
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=1][result_bus=0].action_instruction_adr_payload_shifter_en to be 1.
@@ -702,7 +527,7 @@
Configuring cfg_regs.mau_cfg_movereg_tcam_only.mau_cfg_movereg_tcam_only to be 0x1. (previous value = 0x0 OR new value = 0x1)
+------------------------------------------------------------------------
-| Working on table table0_counter in stage 1 ---
+| Working on table table0_counter in stage 0 ---
+------------------------------------------------------------------------
Configuring rams.array.switchbox.row[row=6].ctl.r_stats_alu_o_mux_select.r_stats_alu_o_sel_stats_rd_r_i to be 1.
Configuring rams.array.row[row=6].ram[col=6].unit_ram_ctl.match_ram_write_data_mux_select to be select of 0.
@@ -788,24 +613,24 @@
Configuring rams.match.adrdist.movereg_ad_stats_alu_to_logical_xbar_ctl[logical_index=0].movereg_ad_stats_alu_to_logical_xbar_ctl be 0x7. ( previous value = 0x0 OR new value = 0x7)
Configuring rams.match.adrdist.mau_ad_stats_virt_lt[meter_alu_index=3].mau_ad_stats_virt_lt be 0x1.
+------------------------------------------------------------------------
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 21.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 9.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 3.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 12.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 1.
Configuring rams.match.merge.exact_match_delay_thread[copy_index=0].exact_match_delay_thread to be 0x1. (previous value = 0x0 OR new value = 0x1)
Configuring rams.match.merge.exact_match_delay_thread[copy_index=1].exact_match_delay_thread to be 0x1. (previous value = 0x0 OR new value = 0x1)
Configuring rams.match.merge.exact_match_delay_thread[copy_index=2].exact_match_delay_thread to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 10.
Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay1 to be 0.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 1.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=0].adr_dist_pipe_delay to be 0.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=1].adr_dist_pipe_delay to be 0.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=0].adr_dist_pipe_delay to be 0.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=1].adr_dist_pipe_delay to be 0.
-Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x1.
-Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x3.
+Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x2.
+Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x2.
Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=1].exact_match_phys_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x2.
Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=1].exact_match_phys_result_en to be 0x0.
Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=0].exact_match_phys_result_thread to be 0x0.
Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=1].exact_match_phys_result_thread to be 0x0.
@@ -828,18 +653,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -859,23 +684,23 @@
Configuring dp.next_stage_dependency_on_cur[direction_index=0].next_stage_dependency_on_cur to be 0.
Configuring dp.action_output_delay[direction_index=1].action_output_delay to be 17.
Configuring dp.pipelength_added_stages[direction_index=1].pipelength_added_stages to be 0.
-Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 2.
+Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 0.
Configuring dp.next_stage_dependency_on_cur[direction_index=1].next_stage_dependency_on_cur to be 2.
-Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 1.
-Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 2.
+Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 0.
+Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 0.
Configuring dp.phv_fifo_enable.phv_fifo_ingress_action_output_enable to be 1.
Configuring dp.phv_fifo_enable.phv_fifo_ingress_final_output_enable to be 0.
Configuring dp.phv_fifo_enable.phv_fifo_egress_action_output_enable to be 1.
Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+------------------------------------------------------------------------
-| MAU Stage 2
+| MAU Stage 1
+------------------------------------------------------------------------
+------------------------------------------------------------------------
-| Working on table _condition_2 in stage 2 ---
+| Working on table _condition_2 in stage 1 ---
+------------------------------------------------------------------------
---> Stage Gateway Table for condition _condition_2 in stage 2
+--> Stage Gateway Table for condition _condition_2 in stage 1
Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
@@ -924,7 +749,7 @@
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][0] to be 0xffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][1] to be 0xffff3f
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0x8
-Configuring rams.match.merge.gateway_next_table_lut[0][3] to be 0x21
+Configuring rams.match.merge.gateway_next_table_lut[0][3] to be 0x11
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[2].gateway_table_entry_versionvalid0 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[2].gateway_table_entry_versionvalid1 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[2][0] to be 0xffffffff
@@ -932,15 +757,15 @@
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[2][0] to be 0xffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[2][1] to be 0xff7fff
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0xc (previous value 0x8 OR new value 0x4)
-Configuring rams.match.merge.gateway_next_table_lut[0][2] to be 0x21
+Configuring rams.match.merge.gateway_next_table_lut[0][2] to be 0x11
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[1].gateway_table_entry_versionvalid0 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[1].gateway_table_entry_versionvalid1 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[1][0] to be 0xffffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[1][1] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[1][0] to be 0xffff
+Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[1][0] to be 0x1ffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[1][1] to be 0xffff
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0xe (previous value 0xc OR new value 0x2)
-Configuring rams.match.merge.gateway_next_table_lut[0][1] to be 0x21
+Configuring rams.match.merge.gateway_next_table_lut[0][1] to be 0x11
Configuring rams.match.merge.gateway_en.gateway_en to be 0x1
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_select to be 0xf
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_enable to be 0x1
@@ -956,12 +781,12 @@
Configuring rams.match.merge.gateway_payload_match_adr[0][1][1].gateway_payload_match_adr to be 0x7ffff
+------------------------------------------------------------------------
-| Working on table ingress_port_count_table__action__ in stage 2 ---
+| Working on table ingress_port_count_table__action__ in stage 1 ---
+------------------------------------------------------------------------
--> Action Data Table ingress_port_count_table__action__ with logical_table_id 0 that is reference type is 'direct'
+------------------------------------------------------------------------
-| Working on table ingress_port_count_table in stage 2 ---
+| Working on table ingress_port_count_table in stage 1 ---
+------------------------------------------------------------------------
--> Match Table with no key ingress_port_count_table with logical_table_id 0
allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
@@ -987,12 +812,12 @@
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=1].action_instruction_adr_payload_shifter_en to be 1.
+------------------------------------------------------------------------
-| Working on table egress_port_count_table__action__ in stage 2 ---
+| Working on table egress_port_count_table__action__ in stage 1 ---
+------------------------------------------------------------------------
--> Action Data Table egress_port_count_table__action__ with logical_table_id 1 that is reference type is 'direct'
+------------------------------------------------------------------------
-| Working on table egress_port_count_table in stage 2 ---
+| Working on table egress_port_count_table in stage 1 ---
+------------------------------------------------------------------------
--> Match Table with no key egress_port_count_table with logical_table_id 1
allocated_result_bus = Ram Data Bus MatchResult1R 0 left_and_right is 83 bits
@@ -1014,7 +839,7 @@
Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x3 (previous_value=0x1 OR new_value=0x2).
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=0].mau_action_instruction_adr_map_data to be 0x40.
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
---> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 2
+--> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 1
Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
@@ -1059,7 +884,7 @@
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=0].action_instruction_adr_payload_shifter_en to be 1.
+------------------------------------------------------------------------
-| Working on table ingress_port_counter in stage 2 ---
+| Working on table ingress_port_counter in stage 1 ---
+------------------------------------------------------------------------
Configuring rams.array.switchbox.row[row=4].ctl.r_stats_alu_o_mux_select.r_stats_alu_o_sel_stats_rd_r_i to be 1.
Configuring rams.array.row[row=4].ram[col=6].unit_ram_ctl.match_ram_write_data_mux_select to be select of 0.
@@ -1143,7 +968,7 @@
Configuring rams.match.adrdist.mau_ad_stats_virt_lt[meter_alu_index=2].mau_ad_stats_virt_lt be 0x1.
+------------------------------------------------------------------------
-| Working on table egress_port_counter in stage 2 ---
+| Working on table egress_port_counter in stage 1 ---
+------------------------------------------------------------------------
Configuring rams.array.switchbox.row[row=6].ctl.r_stats_alu_o_mux_select.r_stats_alu_o_sel_stats_rd_r_i to be 1.
Configuring rams.array.row[row=6].ram[col=6].unit_ram_ctl.match_ram_write_data_mux_select to be select of 0.
@@ -1262,18 +1087,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1303,6 +1128,88 @@
Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+------------------------------------------------------------------------
+| MAU Stage 2
++------------------------------------------------------------------------
++------------------------------------------------------------------------
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay1 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=0].adr_dist_pipe_delay to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=1].adr_dist_pipe_delay to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=0].adr_dist_pipe_delay to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=1].adr_dist_pipe_delay to be 0.
+Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=1].exact_match_phys_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=1].exact_match_phys_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=0].exact_match_phys_result_thread to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=1].exact_match_phys_result_thread to be 0x0.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_internal_delay_fifo to be 14.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_output_delay_fifo to be 0.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_delay_fifo_en to be 1.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_internal_delay_fifo to be 14.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_output_delay_fifo to be 0.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_delay_fifo_en to be 1.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_ingress to be 0x0.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_egress to be 0x0.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_ingress to be 0x0.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_egress to be 0x0.
+--------------------------------------------
+Configuration for unused statistics ALUs.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=0].mau_cfg_stats_alu_lt to be 0xf.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=1].mau_cfg_stats_alu_lt to be 0xf.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=2].mau_cfg_stats_alu_lt to be 0xf.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=3].mau_cfg_stats_alu_lt to be 0xf.
++------------------------------------------------------------------------
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
+Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_delay to be 0.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_delay to be 0.
+Configuring rams.match.merge.tcam_match_error_ctl[dir=1].tcam_match_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.tind_ecc_error_ctl[dir=1].tind_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_delay to be 0.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_delay to be 0.
++------------------------------------------------------------------------
+Configuring dp.action_output_delay[direction_index=0].action_output_delay to be 17.
+Configuring dp.pipelength_added_stages[direction_index=0].pipelength_added_stages to be 0.
+Configuring dp.cur_stage_dependency_on_prev[direction_index=0].cur_stage_dependency_on_prev to be 2.
+Configuring dp.next_stage_dependency_on_cur[direction_index=0].next_stage_dependency_on_cur to be 2.
+Configuring dp.action_output_delay[direction_index=1].action_output_delay to be 17.
+Configuring dp.pipelength_added_stages[direction_index=1].pipelength_added_stages to be 0.
+Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 2.
+Configuring dp.next_stage_dependency_on_cur[direction_index=1].next_stage_dependency_on_cur to be 2.
+Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 0.
+Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 3.
+Configuring dp.phv_fifo_enable.phv_fifo_ingress_action_output_enable to be 1.
+Configuring dp.phv_fifo_enable.phv_fifo_ingress_final_output_enable to be 0.
+Configuring dp.phv_fifo_enable.phv_fifo_egress_action_output_enable to be 1.
+Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+
++------------------------------------------------------------------------
| MAU Stage 3
+------------------------------------------------------------------------
+------------------------------------------------------------------------
@@ -1344,18 +1251,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1426,18 +1333,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1508,18 +1415,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1590,18 +1497,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1672,18 +1579,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1754,18 +1661,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1836,18 +1743,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1918,18 +1825,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2000,18 +1907,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x7.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x7.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x7.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0xf.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0xf.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0xf.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0x1f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0x1f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0x1f.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2041,7 +1948,7 @@
Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+------------------------------------------------------------------------
-| Number of configuration field values set in Match-Action Stages: 1635
+| Number of configuration field values set in Match-Action Stages: 1567
+------------------------------------------------------------------------
+------------------------------------------------------------------------
@@ -2054,9 +1961,9 @@
| Stage Number | Exact | Ternary | Statistics | Meter | Selector | Stateful | Dependency |
| | | | | LPF | (max words) | | to Previous |
-----------------------------------------------------------------------------------------------
-| 0 | Yes | No | No | No | No (0) | No | match |
-| 1 | No | Yes | Yes | No | No (0) | No | match |
-| 2 | Yes | No | Yes | No | No (0) | No | match |
+| 0 | Yes | Yes | Yes | No | No (0) | No | match |
+| 1 | Yes | No | Yes | No | No (0) | No | match |
+| 2 | Yes* | No | Yes* | No | No (0) | No | concurrent |
| 3 | Yes* | No | Yes* | No | No (0) | No | concurrent |
| 4 | Yes* | No | Yes* | No | No (0) | No | concurrent |
| 5 | Yes* | No | Yes* | No | No (0) | No | concurrent |
@@ -2076,12 +1983,12 @@
| Stage Number | Exact | Ternary | Statistics | Meter | Selector | Stateful | Dependency |
| | | | | LPF | (max words) | | to Previous |
-----------------------------------------------------------------------------------------------
-| 0 | Yes | No | No | No | No (0) | No | match |
-| 1 | Yes* | No | No | No | No (0) | No | concurrent |
-| 2 | Yes* | No | No | No | No (0) | No | concurrent |
-| 3 | Yes* | No | No | No | No (0) | No | concurrent |
-| 4 | Yes* | No | No | No | No (0) | No | concurrent |
-| 5 | Yes* | No | No | No | No (0) | No | concurrent |
+| 0 | No | No | No | No | No (0) | No | match |
+| 1 | No | No | No | No | No (0) | No | concurrent |
+| 2 | No | No | No | No | No (0) | No | concurrent |
+| 3 | No | No | No | No | No (0) | No | concurrent |
+| 4 | No | No | No | No | No (0) | No | concurrent |
+| 5 | No | No | No | No | No (0) | No | concurrent |
| 6 | No | No | No | No | No (0) | No | match |
| 7 | No | No | No | No | No (0) | No | concurrent |
| 8 | No | No | No | No | No (0) | No | concurrent |
@@ -2101,9 +2008,9 @@
-----------------------------------------------------------------------------------------------------
| Stage Number | Clock Cycles | Predication Cycle | Dependency To Previous | Cycles Add To Latency |
-----------------------------------------------------------------------------------------------------
-| 0 | 20 | 11 | match | 20 |
-| 1 | 22 | 13 | match | 22 |
-| 2 | 20 | 11 | match | 20 |
+| 0 | 22 | 13 | match | 22 |
+| 1 | 20 | 11 | match | 20 |
+| 2 | 20 | 11 | concurrent | 1 |
| 3 | 20 | 11 | concurrent | 1 |
| 4 | 20 | 11 | concurrent | 1 |
| 5 | 20 | 11 | concurrent | 1 |
@@ -2115,7 +2022,7 @@
| 11 | 20 | 11 | concurrent | 1 |
-----------------------------------------------------------------------------------------------------
-Total latency for ingress: 94
+Total latency for ingress: 75
Clock Cycles Per Stage For egress:
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.gateway.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.gateway.log
index 45fde03..30897dd 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.gateway.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.gateway.log
@@ -1,9 +1,19 @@
+---------------------------------------------------------------------+
| Log file: mau.gateway.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
+
+========================================================
+ Run Gateway Placement on Request List of size 0
+========================================================
+
+
+========================================================
+ Run Gateway Placement on Request List of size 0
+========================================================
+
valid:
f = packet_out_hdr
const:
@@ -120,13 +130,13 @@
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (67, 0)
+ (66, 0)
Byte Position 1
- (67, 0)
+ (66, 0)
Byte Position 2
- (67, 0)
+ (66, 0)
Byte Position 3
- (67, 0)
+ (66, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -351,13 +361,13 @@
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (67, 0)
+ (66, 0)
Byte Position 1
- (67, 0)
+ (66, 0)
Byte Position 2
- (67, 0)
+ (66, 0)
Byte Position 3
- (67, 0)
+ (66, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -480,33 +490,22 @@
Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
Allocating: Gateway 15 in stage 0 for _condition_0.
-
-========================================================
- Run Gateway Placement on Request List of size 0
-========================================================
-
-
-========================================================
- Run Gateway Placement on Request List of size 0
-========================================================
-
valid:
- f = packet_out_hdr
const:
xor:
-Gateway Resource Request for P4 table _condition_1 with handle 117440514 in stage 1
+Gateway Resource Request for P4 table process_packet_out_table_always_true_condition with handle -1 in stage 0
Validity checks:
- Field --validity_check--packet_out_hdr [0:0]
+ <none>
Fields to check against constants:
<none>
Field pairs to compare to each other:
<none>
-Gateway Resource Request for table _condition_1 needs access to 1 input bits
+Gateway Resource Request for table process_packet_out_table_always_true_condition needs access to 0 input bits
========================================================
- Run Gateway Placement on Request List of size 1
+ Run Gateway Placement on Request List of size 2
========================================================
Available Gateways are: (16)
@@ -600,19 +599,19 @@
open_parity_group_ids = [0, 1]
----------------------------
- Trying to place Gateway Resource Request for table _condition_1 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
+ Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
----------------------------
--------------
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (67, 0)
+ (66, 0)
Byte Position 1
- (67, 0)
+ (66, 0)
Byte Position 2
- (67, 0)
+ (66, 0)
Byte Position 3
- (67, 0)
+ (66, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -733,11 +732,149 @@
Hash Bit Mapping:
(0, 1) --> 40
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
-Allocating: Gateway 15 in stage 1 for _condition_1.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
+Allocating: Gateway 15 in stage 0 for _condition_0.
+Available Gateways are: (15)
+Gateway 0
+Gateway 1
+Gateway 2
+Gateway 3
+Gateway 4
+Gateway 5
+Gateway 6
+Gateway 7
+Gateway 8
+Gateway 9
+Gateway 10
+Gateway 11
+Gateway 12
+Gateway 13
+Gateway 14
+------- Phase 0 -------------
+Looking at gateway table 14
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f555b613450>, 0)])), (1, (None, [], None, [], []))])
+Search bus 0 on row 7
+----------------------------
+ Trying to place Gateway Resource Request for table process_packet_out_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
+----------------------------
+Gateway data search bus packing is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ [44] = None
+ [45] = None
+ [46] = None
+ [47] = None
+ [48] = None
+ [49] = None
+ [50] = None
+ [51] = None
+ [52] = None
+ [53] = None
+ [54] = None
+ [55] = None
+ [56] = None
+ [57] = None
+ [58] = None
+ [59] = None
+ [60] = None
+ [61] = None
+ [62] = None
+ [63] = None
+ Move Byte Mapping:
+
+Final Gateway Key is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ Hash Bit Mapping:
+
+Allocating: Gateway 14 in stage 0 for process_packet_out_table_always_true_condition.
========================================================
- Run Gateway Placement on Request List of size 1
+ Run Gateway Placement on Request List of size 2
========================================================
Available Gateways are: (16)
@@ -831,19 +968,19 @@
open_parity_group_ids = [0, 1]
----------------------------
- Trying to place Gateway Resource Request for table _condition_1 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
+ Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
----------------------------
--------------
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (67, 0)
+ (66, 0)
Byte Position 1
- (67, 0)
+ (66, 0)
Byte Position 2
- (67, 0)
+ (66, 0)
Byte Position 3
- (67, 0)
+ (66, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -964,8 +1101,146 @@
Hash Bit Mapping:
(0, 1) --> 40
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
-Allocating: Gateway 15 in stage 1 for _condition_1.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
+Allocating: Gateway 15 in stage 0 for _condition_0.
+Available Gateways are: (15)
+Gateway 0
+Gateway 1
+Gateway 2
+Gateway 3
+Gateway 4
+Gateway 5
+Gateway 6
+Gateway 7
+Gateway 8
+Gateway 9
+Gateway 10
+Gateway 11
+Gateway 12
+Gateway 13
+Gateway 14
+------- Phase 0 -------------
+Looking at gateway table 14
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f555b192810>, 0)])), (1, (None, [], None, [], []))])
+Search bus 0 on row 7
+----------------------------
+ Trying to place Gateway Resource Request for table process_packet_out_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
+----------------------------
+Gateway data search bus packing is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ [44] = None
+ [45] = None
+ [46] = None
+ [47] = None
+ [48] = None
+ [49] = None
+ [50] = None
+ [51] = None
+ [52] = None
+ [53] = None
+ [54] = None
+ [55] = None
+ [56] = None
+ [57] = None
+ [58] = None
+ [59] = None
+ [60] = None
+ [61] = None
+ [62] = None
+ [63] = None
+ Move Byte Mapping:
+
+Final Gateway Key is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ Hash Bit Mapping:
+
+Allocating: Gateway 14 in stage 0 for process_packet_out_table_always_true_condition.
========================================================
Run Gateway Placement on Request List of size 0
@@ -975,7 +1250,7 @@
const:
f = ig_intr_md_for_tm.ucast_egress_port
xor:
-Gateway Resource Request for P4 table _condition_2 with handle 117440515 in stage 2
+Gateway Resource Request for P4 table _condition_2 with handle 117440514 in stage 1
Validity checks:
<none>
Fields to check against constants:
@@ -1230,8 +1505,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
-Allocating: Gateway 15 in stage 2 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
+Allocating: Gateway 15 in stage 1 for _condition_2.
========================================================
Run Gateway Placement on Request List of size 1
@@ -1477,8 +1752,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
-Allocating: Gateway 15 in stage 2 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
+Allocating: Gateway 15 in stage 1 for _condition_2.
========================================================
Run Gateway Placement on Request List of size 1
@@ -1724,12 +1999,12 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
-Allocating: Gateway 15 in stage 2 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
+Allocating: Gateway 15 in stage 1 for _condition_2.
valid:
const:
xor:
-Gateway Resource Request for P4 table egress_port_count_table_always_true_condition with handle -1 in stage 2
+Gateway Resource Request for P4 table egress_port_count_table_always_true_condition with handle -1 in stage 1
Validity checks:
<none>
Fields to check against constants:
@@ -1984,8 +2259,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
-Allocating: Gateway 15 in stage 2 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
+Allocating: Gateway 15 in stage 1 for _condition_2.
Available Gateways are: (15)
Gateway 0
Gateway 1
@@ -2004,7 +2279,7 @@
Gateway 14
------- Phase 0 -------------
Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f1b5325e750>, 0)])), (1, (None, [], None, [], []))])
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f555f79cc90>, 0)])), (1, (None, [], None, [], []))])
Search bus 0 on row 7
----------------------------
Trying to place Gateway Resource Request for table egress_port_count_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
@@ -2123,7 +2398,7 @@
[43] = None
Hash Bit Mapping:
-Allocating: Gateway 14 in stage 2 for egress_port_count_table_always_true_condition.
+Allocating: Gateway 14 in stage 1 for egress_port_count_table_always_true_condition.
========================================================
Run Gateway Placement on Request List of size 2
@@ -2369,8 +2644,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
-Allocating: Gateway 15 in stage 2 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
+Allocating: Gateway 15 in stage 1 for _condition_2.
Available Gateways are: (15)
Gateway 0
Gateway 1
@@ -2389,7 +2664,7 @@
Gateway 14
------- Phase 0 -------------
Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f1b4f4e7e50>, 0)])), (1, (None, [], None, [], []))])
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f555b5fadd0>, 0)])), (1, (None, [], None, [], []))])
Search bus 0 on row 7
----------------------------
Trying to place Gateway Resource Request for table egress_port_count_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
@@ -2508,798 +2783,4 @@
[43] = None
Hash Bit Mapping:
-Allocating: Gateway 14 in stage 2 for egress_port_count_table_always_true_condition.
-valid:
-const:
- f = ig_intr_md_for_tm.copy_to_cpu
-xor:
-Gateway Resource Request for P4 table _condition_3 with handle 117440516 in stage 0
- Validity checks:
- <none>
- Fields to check against constants:
- Field ig_intr_md_for_tm.copy_to_cpu [0:0]
- Field pairs to compare to each other:
- <none>
-
-Gateway Resource Request for table _condition_3 needs access to 1 input bits
-
-
-========================================================
- Run Gateway Placement on Request List of size 2
-========================================================
-
-Available Gateways are: (16)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-Gateway 15
-------- Phase 0 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 13
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 12
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 11
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 10
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 9
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 8
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 7
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 6
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 5
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 4
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 3
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 2
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 1
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-Looking at gateway table 0
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-------- Phase 1 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-
- final_parity_group_ids = [(0, []), (1, [])]
-
- open_parity_group_ids = [0, 1]
-----------------------------
- Trying to place Gateway Resource Request for table _condition_3 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (80, 0)
-Byte Position 1
- (80, 0)
-Byte Position 2
- (80, 0)
-Byte Position 3
- (80, 0)
-
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 40 in hash match group 0 for ('ig_intr_md_for_tm.copy_to_cpu', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = (('ig_intr_md_for_tm.copy_to_cpu', 0), 'exact')
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (0, 0) --> 40
-
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
-Allocating: Gateway 15 in stage 0 for _condition_3.
-Available Gateways are: (15)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-------- Phase 0 -------------
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f1b539aed50>, 0)])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-----------------------------
- Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (67, 0)
-Byte Position 1
- (67, 0)
-Byte Position 2
- (67, 0)
-Byte Position 3
- (67, 0)
-
-Removing available byte Byte 8 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 10 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 14 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 41 in hash match group 0 for ('--validity_check--packet_out_hdr', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = (('--validity_check--packet_out_hdr', 0), 'exact')
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (1, 1) --> 41
-
-Allocating: Gateway 14 in stage 0 for _condition_0.
-
-========================================================
- Run Gateway Placement on Request List of size 2
-========================================================
-
-Available Gateways are: (16)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-Gateway 15
-------- Phase 0 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 13
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 12
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 11
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 10
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 9
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 8
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 7
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 6
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 5
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 4
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 3
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 2
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 1
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-Looking at gateway table 0
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-------- Phase 1 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-
- final_parity_group_ids = [(0, []), (1, [])]
-
- open_parity_group_ids = [0, 1]
-----------------------------
- Trying to place Gateway Resource Request for table _condition_3 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (80, 0)
-Byte Position 1
- (80, 0)
-Byte Position 2
- (80, 0)
-Byte Position 3
- (80, 0)
-
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 40 in hash match group 0 for ('ig_intr_md_for_tm.copy_to_cpu', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = (('ig_intr_md_for_tm.copy_to_cpu', 0), 'exact')
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (0, 0) --> 40
-
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
-Allocating: Gateway 15 in stage 0 for _condition_3.
-Available Gateways are: (15)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-------- Phase 0 -------------
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f1b4fa16d50>, 0)])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-----------------------------
- Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (67, 0)
-Byte Position 1
- (67, 0)
-Byte Position 2
- (67, 0)
-Byte Position 3
- (67, 0)
-
-Removing available byte Byte 8 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 10 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 14 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 41 in hash match group 0 for ('--validity_check--packet_out_hdr', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = (('--validity_check--packet_out_hdr', 0), 'exact')
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (1, 1) --> 41
-
-Allocating: Gateway 14 in stage 0 for _condition_0.
+Allocating: Gateway 14 in stage 1 for egress_port_count_table_always_true_condition.
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.gw.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.gw.log
index 95da6a1..e208fa4 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.gw.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.gw.log
@@ -1,124 +1,79 @@
+---------------------------------------------------------------------+
| Log file: mau.gw.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
-cond _condition_0: valid packet_out_hdr
- valid packet_out_hdr
- ! not valid packet_out_hdr
-cond _condition_0 can be gateway (1+0)x1
-cond !_condition_0 can be gateway (1+0)x1
-_condition_0 is gateway for ingress_pkt
-cond _condition_1: not valid packet_out_hdr
+cond _condition_0: not valid packet_out_hdr
not valid packet_out_hdr
! not not valid packet_out_hdr
-cond _condition_1 can be gateway (1+0)x1
-cond !_condition_1 can be gateway (1+0)x1
-_condition_1 is gateway for table0
-cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 254
- ig_intr_md_for_tm.ucast_egress_port < 254
- ! ig_intr_md_for_tm.ucast_egress_port >= 254
+cond _condition_0 can be gateway (1+0)x1
+cond !_condition_0 can be gateway (1+0)x1
+_condition_0 is gateway for table0
+cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 510
+ ig_intr_md_for_tm.ucast_egress_port < 510
+ ! ig_intr_md_for_tm.ucast_egress_port >= 510
cond _condition_2 can be gateway (9+0)x1
cond !_condition_2 can be gateway (9+0)x1
_condition_2 is gateway for ingress_port_count_table
-cond _condition_3: ig_intr_md_for_tm.copy_to_cpu == 1
- ig_intr_md_for_tm.copy_to_cpu == 1
- ! ig_intr_md_for_tm.copy_to_cpu != 1
-cond _condition_3 can be gateway (0+1)x1
-cond !_condition_3 can be gateway (0+1)x2
-_condition_3 is gateway for egress_pkt
-fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f1b53dcc1d0>]) and and xor_fields is OrderedSet()
+fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f555fea6d90>]) and and xor_fields is OrderedSet()
fields = OrderedSet() and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f1b53dcc490>])
-fields = OrderedSet() and and xor_fields is OrderedSet()
-cond _condition_0: valid packet_out_hdr
- valid packet_out_hdr
- ! not valid packet_out_hdr
-cond _condition_0 can be gateway (1+0)x1
-cond !_condition_0 can be gateway (1+0)x1
-_condition_0 is gateway for ingress_pkt
-cond _condition_1: not valid packet_out_hdr
+cond _condition_0: not valid packet_out_hdr
not valid packet_out_hdr
! not not valid packet_out_hdr
-cond _condition_1 can be gateway (1+0)x1
-cond !_condition_1 can be gateway (1+0)x1
-_condition_1 is gateway for table0
-cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 254
- ig_intr_md_for_tm.ucast_egress_port < 254
- ! ig_intr_md_for_tm.ucast_egress_port >= 254
+cond _condition_0 can be gateway (1+0)x1
+cond !_condition_0 can be gateway (1+0)x1
+_condition_0 is gateway for table0
+cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 510
+ ig_intr_md_for_tm.ucast_egress_port < 510
+ ! ig_intr_md_for_tm.ucast_egress_port >= 510
cond _condition_2 can be gateway (9+0)x1
cond !_condition_2 can be gateway (9+0)x1
_condition_2 is gateway for ingress_port_count_table
-cond _condition_3: ig_intr_md_for_tm.copy_to_cpu == 1
- ig_intr_md_for_tm.copy_to_cpu == 1
- ! ig_intr_md_for_tm.copy_to_cpu != 1
-cond _condition_3 can be gateway (0+1)x1
-cond !_condition_3 can be gateway (0+1)x2
-_condition_3 is gateway for egress_pkt
-fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f1b53dcc1d0>]) and and xor_fields is OrderedSet()
+fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f555fea6d90>]) and and xor_fields is OrderedSet()
fields = OrderedSet() and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f1b53dcc490>])
-fields = OrderedSet() and and xor_fields is OrderedSet()
-cond _condition_0: valid packet_out_hdr
- valid packet_out_hdr
- ! not valid packet_out_hdr
-cond _condition_0 can be gateway (1+0)x1
-cond !_condition_0 can be gateway (1+0)x1
-_condition_0 is gateway for ingress_pkt
-cond _condition_1: not valid packet_out_hdr
+cond _condition_0: not valid packet_out_hdr
not valid packet_out_hdr
! not not valid packet_out_hdr
-cond _condition_1 can be gateway (1+0)x1
-cond !_condition_1 can be gateway (1+0)x1
-_condition_1 is gateway for table0
-cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 254
- ig_intr_md_for_tm.ucast_egress_port < 254
- ! ig_intr_md_for_tm.ucast_egress_port >= 254
+cond _condition_0 can be gateway (1+0)x1
+cond !_condition_0 can be gateway (1+0)x1
+_condition_0 is gateway for table0
+cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 510
+ ig_intr_md_for_tm.ucast_egress_port < 510
+ ! ig_intr_md_for_tm.ucast_egress_port >= 510
cond _condition_2 can be gateway (9+0)x1
cond !_condition_2 can be gateway (9+0)x1
_condition_2 is gateway for ingress_port_count_table
-cond _condition_3: ig_intr_md_for_tm.copy_to_cpu == 1
- ig_intr_md_for_tm.copy_to_cpu == 1
- ! ig_intr_md_for_tm.copy_to_cpu != 1
-cond _condition_3 can be gateway (0+1)x1
-cond !_condition_3 can be gateway (0+1)x2
-_condition_3 is gateway for egress_pkt
-fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f1b53dcc1d0>]) and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f1b53dcc490>])
+fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f555fea6d90>]) and and xor_fields is OrderedSet()
fields = OrderedSet() and and xor_fields is OrderedSet()
cond _always_true: True == True
True
! False
+cond _always_true: True == True
+ True
+ ! False
--> Stage Gateway Table for condition _condition_0 in stage 0
-T -> ingress_pkt(0), F -> _condition_1(16)
-building tcam for GatewayTest('valid packet_out_hdr')
- adding line (match=200000000 mask=200000000 T)
-tcam data: [(match=200000000 mask=200000000 T)]
-final.tcam: [(match=200000000 mask=200000000 T)], miss=False
---> Stage Gateway Table for condition _condition_3 in stage 0
-T -> egress_pkt(1), F -> None(255)
-building tcam for GatewayTest('ig_intr_md_for_tm.copy_to_cpu == 1')
- adding line (match=100000000 mask=100000000 T)
-tcam data: [(match=100000000 mask=100000000 T)]
-final.tcam: [(match=100000000 mask=100000000 T)], miss=False
---> Stage Gateway Table for condition _condition_1 in stage 1
-T -> table0(16), F -> _condition_2(32)
+T -> table0(0), F -> process_packet_out_table(1)
building tcam for GatewayTest('not valid packet_out_hdr')
adding line (match=0 mask=100000000 T)
tcam data: [(match=0 mask=100000000 T)]
final.tcam: [(match=0 mask=100000000 T)], miss=False
---> Stage Gateway Table for condition _condition_2 in stage 2
-T -> ingress_port_count_table(32), F -> None(255)
-building tcam for GatewayTest('ig_intr_md_for_tm.ucast_egress_port < 254')
+--> Stage Gateway Table for condition process_packet_out_table_always_true_condition in stage 0
+T -> process_packet_out_table(1), F -> process_packet_out_table(1)
+building tcam for GatewayTest('True')
+ adding line (match=0 mask=0 T)
+tcam data: [(match=0 mask=0 T)]
+final.tcam: [(match=0 mask=0 T)], miss=False
+--> Stage Gateway Table for condition _condition_2 in stage 1
+T -> ingress_port_count_table(16), F -> None(255)
+building tcam for GatewayTest('ig_intr_md_for_tm.ucast_egress_port < 510')
adding line (range=[ffff ffff 3fff] match=0 mask=0 T)
adding line (range=[ffff 7fff ffff] match=0 mask=0 T)
- adding line (range=[0 ffff ffff] match=0 mask=0 T)
-tcam data: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[0 ffff ffff] match=0 mask=0 T)]
-final.tcam: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[0 ffff ffff] match=0 mask=0 T)], miss=False
---> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 2
-T -> egress_port_count_table(33), F -> egress_port_count_table(33)
+ adding line (range=[1 ffff ffff] match=0 mask=0 T)
+tcam data: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[1 ffff ffff] match=0 mask=0 T)]
+final.tcam: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[1 ffff ffff] match=0 mask=0 T)], miss=False
+--> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 1
+T -> egress_port_count_table(17), F -> egress_port_count_table(17)
building tcam for GatewayTest('True')
adding line (match=0 mask=0 T)
tcam data: [(match=0 mask=0 T)]
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.log
index d2157f3..8e46412 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.log
@@ -1,21 +1,21 @@
+---------------------------------------------------------------------+
| Log file: mau.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
Match Table table0 did not specify the number of entries required. A default value (512) will be used.
Match Entry Table table0 has already been associated with stat Table table0_counter.
-Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
+Cannot implement table0 in phase 0 resources because table uses side effect tables.
Match Table table0 did not specify the number of entries required. A default value (512) will be used.
Match Entry Table table0 has already been associated with stat Table table0_counter.
-Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
+Cannot implement table0 in phase 0 resources because table uses side effect tables.
Match Table table0 did not specify the number of entries required. A default value (512) will be used.
-POV/metadata bridge containers added between ingress/egress: [0, 64, 128]
+POV/metadata bridge containers added between ingress/egress: [0]
Metadata bridge_ingress_intrinsic containers added between ingress/egress: [128]
Match Entry Table table0 has already been associated with stat Table table0_counter.
Match table ingress_port_count_table has no match key fields
-Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 254.
+Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 510.
##########################################
Call to decide_action_data_placement(stage=0, table=ingress_port_count_table)
@@ -77,7 +77,7 @@
Best Ram Usage is 97 rams
Best Immediate placement is 0 bits
Match table egress_port_count_table has no match key fields
-Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 254.
+Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 510.
##########################################
Call to decide_action_data_placement(stage=0, table=egress_port_count_table)
@@ -140,16 +140,16 @@
Best Immediate placement is 0 bits
##########################################
- Call to decide_action_data_placement(stage=0, table=ingress_pkt)
+ Call to decide_action_data_placement(stage=0, table=process_packet_out_table)
##########################################
Max immediate bits used in any action is 0 bits.
-Overhead bit width for table ingress_pkt is 2 bits.
+Overhead bit width for table process_packet_out_table is 0 bits.
Bits available in overhead for non-essential immediate data is 32 bits.
~~~~~~~~~~~~~~~~~~~~~
Examining placing 0 bits in match overhead
-Overhead bit width for table ingress_pkt is 2 bits.
+Overhead bit width for table process_packet_out_table is 0 bits.
Overhead SRAMs to use = 97
Entries requested = 1024 and match entries get = 0
ram_size_matrix =
@@ -166,73 +166,13 @@
total action ram packing size = [0, 0, 0]
action_ram_packing:
- action _packet_out has []
+ action _process_packet_out has []
total action ram packing size = [0, 0, 0]
action_ram_packing:
- action _packet_out has []
+ action _process_packet_out has []
total action ram packing size = [0, 0, 0]
action_ram_packing:
- action _packet_out has []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-Action Data SRAMs to use = 0
-TODO: Total RAMs use when put 0 bits in match overhead: 97
-TODO: Total RAMs use when put 0 bits in match overhead: 97
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 8 bits in match overhead
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 16 bits in match overhead
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 24 bits in match overhead
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 32 bits in match overhead
-
-##########################################
-
-Best Ram Usage is 97 rams
-Best Immediate placement is 0 bits
-
-##########################################
- Call to decide_action_data_placement(stage=0, table=egress_pkt)
-##########################################
-
-
-Max immediate bits used in any action is 0 bits.
-Overhead bit width for table egress_pkt is 2 bits.
-Bits available in overhead for non-essential immediate data is 32 bits.
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 0 bits in match overhead
-Overhead bit width for table egress_pkt is 2 bits.
-Overhead SRAMs to use = 97
- Entries requested = 1024 and match entries get = 0
-ram_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-immediate_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-hash_to_phv_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
+ action _process_packet_out has []
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
@@ -275,7 +215,7 @@
ram_size_matrix =
(8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
0 0 0 1 0 0 0 0 # 0
- 0 0 0 0 0 0 0 0 # 1
+ 0 0 0 1 0 0 0 0 # 1
0 0 0 0 0 0 0 0 # 2
immediate_size_matrix =
@@ -293,7 +233,7 @@
total action ram packing size = [16, 0, 0]
action_ram_packing:
action set_egress_port has [(16, 16, False)]
- action send_to_cpu has []
+ action send_to_cpu has [(16, 16, False)]
action _drop has []
total action ram packing size = [16, 0, 0]
action_ram_packing:
@@ -312,7 +252,7 @@
Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)]
final packing is [(16, 16, False)]
-final packing is []
+final packing is [(16, 16, False)]
final packing is []
byte_enables = []
After allocation of 32s, available_slots is []
@@ -343,7 +283,7 @@
immediate_size_matrix =
(8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
0 0 0 1 0 0 0 0 # 0
- 0 0 0 0 0 0 0 0 # 1
+ 0 0 0 1 0 0 0 0 # 1
0 0 0 0 0 0 0 0 # 2
hash_to_phv_matrix =
@@ -360,7 +300,7 @@
total action ram packing size = [0, 16, 0]
action_ram_packing:
action set_egress_port has [(16, 16, False)]
- action send_to_cpu has []
+ action send_to_cpu has [(16, 16, False)]
action _drop has []
total action ram packing size = [0, 16, 0]
action_ram_packing:
@@ -379,7 +319,7 @@
Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)]
final packing is [(16, 16, False)]
-final packing is []
+final packing is [(16, 16, False)]
final packing is []
byte_enables = []
After allocation of 32s, available_slots is []
@@ -403,7 +343,7 @@
immediate_size_matrix =
(8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
0 0 0 1 0 0 0 0 # 0
- 0 0 0 0 0 0 0 0 # 1
+ 0 0 0 1 0 0 0 0 # 1
0 0 0 0 0 0 0 0 # 2
hash_to_phv_matrix =
@@ -420,7 +360,7 @@
total action ram packing size = [0, 16, 0]
action_ram_packing:
action set_egress_port has [(16, 16, False)]
- action send_to_cpu has []
+ action send_to_cpu has [(16, 16, False)]
action _drop has []
total action ram packing size = [0, 16, 0]
action_ram_packing:
@@ -439,7 +379,7 @@
Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)]
final packing is [(16, 16, False)]
-final packing is []
+final packing is [(16, 16, False)]
final packing is []
byte_enables = []
After allocation of 32s, available_slots is []
@@ -463,7 +403,7 @@
immediate_size_matrix =
(8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
0 0 0 1 0 0 0 0 # 0
- 0 0 0 0 0 0 0 0 # 1
+ 0 0 0 1 0 0 0 0 # 1
0 0 0 0 0 0 0 0 # 2
hash_to_phv_matrix =
@@ -480,7 +420,7 @@
total action ram packing size = [0, 16, 0]
action_ram_packing:
action set_egress_port has [(16, 16, False)]
- action send_to_cpu has []
+ action send_to_cpu has [(16, 16, False)]
action _drop has []
total action ram packing size = [0, 16, 0]
action_ram_packing:
@@ -499,7 +439,7 @@
Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)]
final packing is [(16, 16, False)]
-final packing is []
+final packing is [(16, 16, False)]
final packing is []
byte_enables = []
After allocation of 32s, available_slots is []
@@ -514,93 +454,11 @@
Best Ram Usage is 1 rams
Best Immediate placement is 16 bits
-Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
-
-----------------------------------------------
-Call to Allocate P4 Table with table ingress_pkt__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-ram_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-immediate_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-hash_to_phv_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action _packet_out has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action _packet_out has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action _packet_out has []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-Allocating Action Logical Table ID 0 in stage 0
-
-----------------------------------------------
-Call to Allocate P4 Table with table ingress_pkt, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-Logical Table ID in stage 0 was not supplied by table placement for table ingress_pkt.
-Allocating Logical Table ID 0 in stage 0
-Allocating Table Type ID 0 of type exact in stage 0
-Match Overhead:
- Field --version_valid-- [3:0] (4 bits)
- Field --instruction_address-- [1:0] (2 bits)
-
-Logical Table ID in stage 0 was not supplied by table placement for table ingress_pkt.
-Allocating Logical Table ID 0 in stage 0
-Allocating Table Type ID 0 of type exact in stage 0
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Match Table Resource Request is:
-SRAM Resource Request for table ingress_pkt (of type match), with 0 ways wants 0 rams.
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-For action _packet_out, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 130 has bit width 23
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-
-For action _packet_out, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 67 has bit width 20
- Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-Allocating Action ALU 2 (16 bits) in stage 0 for match table ingress_pkt's action _packet_out
-Allocating Action ALU 3 (8 bits) in stage 0 for match table ingress_pkt's action _packet_out
-Allocating VLIW Instruction : 0 in stage 0 for match table ingress_pkt's action _packet_out
+Cannot implement table0 in phase 0 resources because table uses side effect tables.
----------------------------------------------
Call to Allocate P4 Table with table table0__action__, number_entries = 512, table id = None, and match type = exact
- Allocating in stage 1
+ Allocating in stage 0
----------------------------------------------
ram_size_matrix =
@@ -612,7 +470,7 @@
immediate_size_matrix =
(8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
0 0 0 1 0 0 0 0 # 0
- 0 0 0 0 0 0 0 0 # 1
+ 0 0 0 1 0 0 0 0 # 1
0 0 0 0 0 0 0 0 # 2
hash_to_phv_matrix =
@@ -629,7 +487,7 @@
total action ram packing size = [0, 16, 0]
action_ram_packing:
action set_egress_port has [(16, 16, False)]
- action send_to_cpu has []
+ action send_to_cpu has [(16, 16, False)]
action _drop has []
total action ram packing size = [0, 16, 0]
action_ram_packing:
@@ -642,30 +500,30 @@
final packing is []
final packing is []
byte_enables = [1, 1]
-Allocating Action Parameter Bus Byte 32 in stage 1 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 33 in stage 1 for Byte 1 of 16-bit constant
-Allocating Action Parameter Bus Byte 34 in stage 1 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 35 in stage 1 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 32 in stage 0 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 33 in stage 0 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 34 in stage 0 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)]
final packing is [(16, 16, False)]
-final packing is []
+final packing is [(16, 16, False)]
final packing is []
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
final packing is []
final packing is []
-Allocating Action Logical Table ID 0 in stage 1
+Allocating Action Logical Table ID 0 in stage 0
----------------------------------------------
Call to Allocate P4 Table with table table0_counter, number_entries = 512, table id = None, and match type = exact
- Allocating in stage 1
+ Allocating in stage 0
----------------------------------------------
stat_stage_table referenced: direct
stat Table Resource Request is:
SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-Sram Resource Request for P4 table table0_counter with handle 67108867 of type statistics in stage 1
+Sram Resource Request for P4 table table0_counter with handle 67108867 of type statistics in stage 0
table_type : statistics
rams_for_width : 1
use_stash : False
@@ -681,12 +539,12 @@
----------------------------------------------
Call to Allocate P4 Table with table table0, number_entries = 512, table id = None, and match type = ternary
- Allocating in stage 1
+ Allocating in stage 0
----------------------------------------------
-Logical Table ID in stage 1 was not supplied by table placement for table table0.
-Allocating Logical Table ID 0 in stage 1
-Allocating Table Type ID 0 of type ternary in stage 1
+Logical Table ID in stage 0 was not supplied by table placement for table table0.
+Allocating Logical Table ID 0 in stage 0
+Allocating Table Type ID 0 of type ternary in stage 0
-----------------------------------------
Call to allocate_ternary_match_key_2
@@ -715,9 +573,9 @@
{--unused--[3:0], ethernet.dstAddr[47:40], ethernet.srcAddr[39:32], ethernet.dstAddr[7:0], ig_intr_md.ingress_port[7:0], ethernet.etherType[15:8], --version--[1:0], --unused--[1:0], ethernet.srcAddr[47:40], ethernet.dstAddr[23:16], ethernet.etherType[7:0], ethernet.dstAddr[39:24], --unused--[2:0], ig_intr_md.ingress_port[8:8], ethernet.dstAddr[15:8], ethernet.srcAddr[31:0]}
---------------------------------------------
-Call to can_any_match_key_fields_be_shared(stage=1, table=table0)
+Call to can_any_match_key_fields_be_shared(stage=0, table=table0)
---------------------------------------------
-Decided way to allocate for table table0 in stage 1 WAS non_shared
+Decided way to allocate for table table0 in stage 0 WAS non_shared
-----------------------------------------
Call to allocate_ternary_match_key_2
@@ -757,11 +615,22 @@
Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-Allocating Action ALU 2 (16 bits) in stage 1 for match table table0's action set_egress_port
-Allocating VLIW Instruction : 0 in stage 1 for match table table0's action set_egress_port
+Allocating Action ALU 2 (16 bits) in stage 0 for match table table0's action set_egress_port
+Allocating VLIW Instruction : 0 in stage 0 for match table table0's action set_egress_port
For action send_to_cpu, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 64 has bit width 20
- Field Src2 [3:0] : 0x0 (4 bits in instruction bits [3:0])
+Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+For action send_to_cpu, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 66 has bit width 20
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -770,11 +639,24 @@
Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-Allocating Action ALU 0 (8 bits) in stage 1 for match table table0's action send_to_cpu
-Allocating VLIW Instruction : 1 in stage 1 for match table table0's action send_to_cpu
+For action send_to_cpu, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 129 has bit width 23
+ Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
+
+Allocating Action ALU 2 (16 bits) in stage 0 for match table table0's action send_to_cpu
+Allocating Action ALU 2 (8 bits) in stage 0 for match table table0's action send_to_cpu
+Allocating Action ALU 1 (16 bits) in stage 0 for match table table0's action send_to_cpu
+Allocating VLIW Instruction : 1 in stage 0 for match table table0's action send_to_cpu
For action _drop, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 68 has bit width 20
- Field Src2 [3:0] : 0x4 (4 bits in instruction bits [3:0])
+Micro Instruction deposit-field for PHV Container 67 has bit width 20
+ Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -783,8 +665,8 @@
Field right_rotate [2:0] : 0x3 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x1 (1 bits in instruction bits [19:19])
-Allocating Action ALU 4 (8 bits) in stage 1 for match table table0's action _drop
-Allocating VLIW Instruction : 1 in stage 1 for match table table0's action _drop
+Allocating Action ALU 3 (8 bits) in stage 0 for match table table0's action _drop
+Allocating VLIW Instruction : 1 in stage 0 for match table table0's action _drop
Ternary table Pack Format =
Pack Format:
table_word_width: 141
@@ -821,8 +703,89 @@
----------------------------------------------
+Call to Allocate P4 Table with table process_packet_out_table__action__, number_entries = 1024, table id = None, and match type = exact
+ Allocating in stage 0
+----------------------------------------------
+
+ram_size_matrix =
+ (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
+ 0 0 0 0 0 0 0 0 # 0
+
+immediate_size_matrix =
+ (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
+ 0 0 0 0 0 0 0 0 # 0
+
+hash_to_phv_matrix =
+ (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
+ 0 0 0 0 0 0 0 0 # 0
+
+total action ram packing size = [0, 0, 0]
+action_ram_packing:
+ action _process_packet_out has []
+total action ram packing size = [0, 0, 0]
+action_ram_packing:
+ action _process_packet_out has []
+total action ram packing size = [0, 0, 0]
+action_ram_packing:
+ action _process_packet_out has []
+byte_enables = []
+After allocation of 32s, available_slots is []
+final packing is []
+byte_enables = []
+After allocation of 32s, available_slots is []
+final packing is []
+byte_enables = []
+After allocation of 32s, available_slots is []
+final packing is []
+Allocating Action Logical Table ID 1 in stage 0
+
+----------------------------------------------
+Call to Allocate P4 Table with table process_packet_out_table, number_entries = 1024, table id = None, and match type = exact
+ Allocating in stage 0
+----------------------------------------------
+
+Logical Table ID in stage 0 was not supplied by table placement for table process_packet_out_table.
+Allocating Logical Table ID 1 in stage 0
+Allocating Table Type ID 0 of type exact in stage 0
+Match Overhead:
+ Field --version_valid-- [3:0] (4 bits)
+
+Logical Table ID in stage 0 was not supplied by table placement for table process_packet_out_table.
+Allocating Logical Table ID 1 in stage 0
+Allocating Table Type ID 0 of type exact in stage 0
+Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
+Match Table Resource Request is:
+SRAM Resource Request for table process_packet_out_table (of type match), with 0 ways wants 0 rams.
+Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
+For action _process_packet_out, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+For action _process_packet_out, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 66 has bit width 20
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
+ Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
+ Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
+ Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
+
+Allocating Action ALU 2 (16 bits) in stage 0 for match table process_packet_out_table's action _process_packet_out
+Allocating Action ALU 2 (8 bits) in stage 0 for match table process_packet_out_table's action _process_packet_out
+Allocating VLIW Instruction : 2 in stage 0 for match table process_packet_out_table's action _process_packet_out
+
+----------------------------------------------
Call to Allocate P4 Table with table ingress_port_count_table__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 2
+ Allocating in stage 1
----------------------------------------------
ram_size_matrix =
@@ -855,17 +818,17 @@
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
-Allocating Action Logical Table ID 0 in stage 2
+Allocating Action Logical Table ID 0 in stage 1
----------------------------------------------
-Call to Allocate P4 Table with table ingress_port_counter, number_entries = 254, table id = None, and match type = exact
- Allocating in stage 2
+Call to Allocate P4 Table with table ingress_port_counter, number_entries = 510, table id = None, and match type = exact
+ Allocating in stage 1
----------------------------------------------
stat_stage_table referenced: indirect
stat Table Resource Request is:
SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
-Sram Resource Request for P4 table ingress_port_counter with handle 67108865 of type statistics in stage 2
+Sram Resource Request for P4 table ingress_port_counter with handle 67108865 of type statistics in stage 1
table_type : statistics
rams_for_width : 1
use_stash : False
@@ -881,20 +844,20 @@
----------------------------------------------
Call to Allocate P4 Table with table ingress_port_count_table, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 2
+ Allocating in stage 1
----------------------------------------------
-Logical Table ID in stage 2 was not supplied by table placement for table ingress_port_count_table.
-Allocating Logical Table ID 0 in stage 2
-Allocating Table Type ID 0 of type exact in stage 2
+Logical Table ID in stage 1 was not supplied by table placement for table ingress_port_count_table.
+Allocating Logical Table ID 0 in stage 1
+Allocating Table Type ID 0 of type exact in stage 1
Match Overhead:
Field --version_valid-- [3:0] (4 bits)
Field --instruction_address-- [1:0] (2 bits)
Field --statistics_pointer-- [19:0] (20 bits)
-Logical Table ID in stage 2 was not supplied by table placement for table ingress_port_count_table.
-Allocating Logical Table ID 0 in stage 2
-Allocating Table Type ID 0 of type exact in stage 2
+Logical Table ID in stage 1 was not supplied by table placement for table ingress_port_count_table.
+Allocating Logical Table ID 0 in stage 1
+Allocating Table Type ID 0 of type exact in stage 1
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
Match Table Resource Request is:
@@ -902,12 +865,12 @@
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
No micro instructions needed for action count_ingress executed from table ingress_port_count_table.
-Allocating Action ALU 0 (32 bits) in stage 2 for match table ingress_port_count_table's action count_ingress
-Allocating VLIW Instruction : 0 in stage 2 for match table ingress_port_count_table's action count_ingress
+Allocating Action ALU 0 (32 bits) in stage 1 for match table ingress_port_count_table's action count_ingress
+Allocating VLIW Instruction : 0 in stage 1 for match table ingress_port_count_table's action count_ingress
----------------------------------------------
Call to Allocate P4 Table with table egress_port_count_table__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 2
+ Allocating in stage 1
----------------------------------------------
ram_size_matrix =
@@ -940,17 +903,17 @@
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
-Allocating Action Logical Table ID 1 in stage 2
+Allocating Action Logical Table ID 1 in stage 1
----------------------------------------------
-Call to Allocate P4 Table with table egress_port_counter, number_entries = 254, table id = None, and match type = exact
- Allocating in stage 2
+Call to Allocate P4 Table with table egress_port_counter, number_entries = 510, table id = None, and match type = exact
+ Allocating in stage 1
----------------------------------------------
stat_stage_table referenced: indirect
stat Table Resource Request is:
SRAM Resource Request for table egress_port_counter (of type statistics), with 1 ways wants 2 rams.
-Sram Resource Request for P4 table egress_port_counter with handle 67108866 of type statistics in stage 2
+Sram Resource Request for P4 table egress_port_counter with handle 67108866 of type statistics in stage 1
table_type : statistics
rams_for_width : 1
use_stash : False
@@ -968,19 +931,19 @@
----------------------------------------------
Call to Allocate P4 Table with table egress_port_count_table, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 2
+ Allocating in stage 1
----------------------------------------------
-Logical Table ID in stage 2 was not supplied by table placement for table egress_port_count_table.
-Allocating Logical Table ID 1 in stage 2
-Allocating Table Type ID 1 of type exact in stage 2
+Logical Table ID in stage 1 was not supplied by table placement for table egress_port_count_table.
+Allocating Logical Table ID 1 in stage 1
+Allocating Table Type ID 1 of type exact in stage 1
Match Overhead:
Field --version_valid-- [3:0] (4 bits)
Field --statistics_pointer-- [19:0] (20 bits)
-Logical Table ID in stage 2 was not supplied by table placement for table egress_port_count_table.
-Allocating Logical Table ID 1 in stage 2
-Allocating Table Type ID 1 of type exact in stage 2
+Logical Table ID in stage 1 was not supplied by table placement for table egress_port_count_table.
+Allocating Logical Table ID 1 in stage 1
+Allocating Table Type ID 1 of type exact in stage 1
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
Match Table Resource Request is:
@@ -988,103 +951,33 @@
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
No micro instructions needed for action count_egress executed from table egress_port_count_table.
-Allocating Action ALU 0 (32 bits) in stage 2 for match table egress_port_count_table's action count_egress
-Allocating VLIW Instruction : 0 in stage 2 for match table egress_port_count_table's action count_egress
-
-----------------------------------------------
-Call to Allocate P4 Table with table egress_pkt__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-ram_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-immediate_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-hash_to_phv_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-Allocating Action Logical Table ID 1 in stage 0
-
-----------------------------------------------
-Call to Allocate P4 Table with table egress_pkt, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-Logical Table ID in stage 0 was not supplied by table placement for table egress_pkt.
-Allocating Logical Table ID 1 in stage 0
-Allocating Table Type ID 1 of type exact in stage 0
-Match Overhead:
- Field --version_valid-- [3:0] (4 bits)
- Field --instruction_address-- [1:0] (2 bits)
-
-Logical Table ID in stage 0 was not supplied by table placement for table egress_pkt.
-Allocating Logical Table ID 1 in stage 0
-Allocating Table Type ID 1 of type exact in stage 0
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]}.
-Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Match Table Resource Request is:
-SRAM Resource Request for table egress_pkt (of type match), with 0 ways wants 0 rams.
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]}.
-Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-For action add_packet_in_hdr, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 82 has bit width 20
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x0 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x0 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-For action add_packet_in_hdr, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 145 has bit width 23
- Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
-
-Allocating Action ALU 18 (8 bits) in stage 0 for match table egress_pkt's action add_packet_in_hdr
-Allocating Action ALU 17 (16 bits) in stage 0 for match table egress_pkt's action add_packet_in_hdr
-Allocating VLIW Instruction : 0 in stage 0 for match table egress_pkt's action add_packet_in_hdr
+Allocating Action ALU 0 (32 bits) in stage 1 for match table egress_port_count_table's action count_egress
+Allocating VLIW Instruction : 0 in stage 1 for match table egress_port_count_table's action count_egress
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
+Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Field ig_intr_md_for_tm.ucast_egress_port not contiguous on gateway input
Field ig_intr_md_for_tm.ucast_egress_port not contiguous on gateway input
Writing configuration registers: regs.match_action_stage.00
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.resources.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.resources.log
index 5e679a6..8fd4959 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.resources.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.resources.log
@@ -1,16 +1,16 @@
+---------------------------------------------------------------------+
| Log file: mau.resources.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
| Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
-| 0 | 2 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 |
-| 1 | 1 | 16 | 1 | 0 | 1 | 3 | 3 | 3 | 2 | 0 | 1 | 0 | 4 | 0 | 2 | 1 | 1 |
-| 2 | 2 | 0 | 9 | 0 | 2 | 4 | 4 | 0 | 1 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2 |
+| 0 | 1 | 16 | 1 | 0 | 2 | 3 | 3 | 3 | 3 | 0 | 1 | 0 | 4 | 0 | 2 | 1 | 2 |
+| 1 | 2 | 0 | 9 | 0 | 2 | 4 | 4 | 0 | 1 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2 |
+| 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
@@ -21,16 +21,16 @@
| 10 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 11 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| | | | | | | | | | | | | | | | | | |
-| Totals | 5 | 16 | 12 | 0 | 5 | 7 | 7 | 3 | 4 | 0 | 3 | 0 | 4 | 0 | 2 | 1 | 5 |
+| Totals | 3 | 16 | 10 | 0 | 4 | 7 | 7 | 3 | 4 | 0 | 3 | 0 | 4 | 0 | 2 | 1 | 4 |
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
| Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
-| 0 | 1.56% | 0.00% | 0.48% | 0.00% | 12.50% | 0.00% | 0.00% | 0.00% | 3.12% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
-| 1 | 0.78% | 24.24% | 0.24% | 0.00% | 6.25% | 3.75% | 6.25% | 12.50% | 6.25% | 0.00% | 25.00% | 0.00% | 3.12% | 0.00% | 6.25% | 3.12% | 6.25% |
-| 2 | 1.56% | 0.00% | 2.16% | 0.00% | 12.50% | 5.00% | 8.33% | 0.00% | 3.12% | 0.00% | 50.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
+| 0 | 0.78% | 24.24% | 0.24% | 0.00% | 12.50% | 3.75% | 6.25% | 12.50% | 9.38% | 0.00% | 25.00% | 0.00% | 3.12% | 0.00% | 6.25% | 3.12% | 12.50% |
+| 1 | 1.56% | 0.00% | 2.16% | 0.00% | 12.50% | 5.00% | 8.33% | 0.00% | 3.12% | 0.00% | 50.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
+| 2 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 3 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 4 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 5 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
@@ -41,7 +41,7 @@
| 10 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 11 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| | | | | | | | | | | | | | | | | | |
-| Average | 0.33% | 2.02% | 0.24% | 0.00% | 2.60% | 0.73% | 1.22% | 1.04% | 1.04% | 0.00% | 6.25% | 0.00% | 0.26% | 0.00% | 0.52% | 0.26% | 2.60% |
+| Average | 0.20% | 2.02% | 0.20% | 0.00% | 2.08% | 0.73% | 1.22% | 1.04% | 1.04% | 0.00% | 6.25% | 0.00% | 0.26% | 0.00% | 0.52% | 0.26% | 2.08% |
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
@@ -53,21 +53,17 @@
| | | | | | | | | Bytes | |
--------------------------------------------------------------------------------------------------------------------
| _condition_0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
-| _condition_3 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
-| ingress_pkt__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| ingress_pkt | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
-| egress_pkt__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| egress_pkt | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
-| _condition_1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
-| table0__action__ | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
-| table0 | 1 | 16 | 0 | 0 | 1 | 3 | 1 | 0 | 3 |
-| table0_counter | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
-| _condition_2 | 2 | 2 | 9 | 1 | 0 | 0 | 0 | 0 | 0 |
-| ingress_port_count_table__action__ | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| ingress_port_count_table | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
-| egress_port_count_table__action__ | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| egress_port_count_table | 2 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
-| ingress_port_counter | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
-| egress_port_counter | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| process_packet_out_table__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| process_packet_out_table | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
+| table0__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
+| table0 | 0 | 16 | 0 | 0 | 1 | 3 | 1 | 0 | 3 |
+| table0_counter | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| _condition_2 | 1 | 2 | 9 | 1 | 0 | 0 | 0 | 0 | 0 |
+| ingress_port_count_table__action__ | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| ingress_port_count_table | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
+| egress_port_count_table__action__ | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| egress_port_count_table | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
+| ingress_port_counter | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| egress_port_counter | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
--------------------------------------------------------------------------------------------------------------------
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.rf.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.rf.log
index 255b3988..6c57767 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.rf.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.rf.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: mau.rf.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.sram.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.sram.log
index ca2a656..cac1c83 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.sram.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.sram.log
@@ -1,17 +1,17 @@
+---------------------------------------------------------------------+
| Log file: mau.sram.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
=======================================================
- calling allocate and add with SRAM Resource Request for table ingress_pkt (of type match), with 0 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
+ calling allocate and add with SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams. (open-all=False, synth_two_port_first=False)
=======================================================
-Requesting to use 0 RAMs and have 80 available.
+Requesting to use 2 RAMs and have 80 available.
Requesting to use 0 Map RAMs and have 48 available.
========================================================
@@ -22,7 +22,7 @@
Match Rams Need is 0
Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 0
+Other Rams Need is 2
+=========================================
| Placing algorithmic tcam
@@ -34,28 +34,295 @@
-------------------------------------
Columns need for match is 0
columns for width is 0
-other columns is 0
-reserved columns is 10
+other columns is 1
+reserved columns is 9
reserved columns for tind 0
-reserved columns for stateful 0
+reserved columns for stateful 1
Ternary Indirection Rams Need is 0
Depth sorted requested
Requesting to use 0 RAMs and have 32 available.
-Result bus only needs (1):
- ingress_pkt
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 0
+Result bus only needs (0):
+=========================================
| Placing action/stats/meters/selection
+=========================================
-Requesting to use 0 RAMs and have 80 available.
+Requesting to use 2 RAMs and have 80 available.
+SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
Depth sorted idletime requests:
=======================================================
- calling allocate and add with SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams. (open-all=False, synth_two_port_first=False)
+ calling allocate and add with SRAM Resource Request for table table0 (of type ternary_indirection), with 1 ways wants 1 rams. (open-all=False, synth_two_port_first=False)
+=======================================================
+
+Requesting to use 1 RAMs and have 78 available.
+Requesting to use 0 Map RAMs and have 46 available.
+
+========================================================
+ Run Placement on Request List of size 2 in stage 0
+ open_up_all_for_match=False
+ synth_two_port_first=False
+========================================================
+
+Match Rams Need is 0
+Algorithmic TCAM Match RAMs Need is 0
+Other Rams Need is 3
+
++=========================================
+| Placing algorithmic tcam
++=========================================
+
+sorted algorithmic tcam requests: (0)
+
+
+-------------------------------------
+Columns need for match is 0
+columns for width is 0
+other columns is 1
+reserved columns is 9
+reserved columns for tind 1
+reserved columns for stateful 1
+Ternary Indirection Rams Need is 1
+Depth sorted requested
+Group 0
+Sram Resource Request for P4 table table0 with handle 16777220 of type ternary_indirection in stage 0
+ table_type : ternary_indirection
+ rams_for_width : 1
+ use_stash : False
+ number_ways : 1
+ way #0
+ SRAM Request Group 0
+ rams_for_depth : 1
+ map_rams : 0
+ way_number : 0
+ ram_word_select_bits : 0
+ ram_enable_select_bits : 0
+
+Requesting to use 1 RAMs and have 32 available.
+Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 0
+Allocating: SRAM: Row 0 Col 2 in stage 0 for table table0's ternary indirection word range Words 0 to 1023.
+Result bus only needs (0):
+
++=========================================
+| Placing action/stats/meters/selection
++=========================================
+
+Requesting to use 2 RAMs and have 79 available.
+SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
+Depth sorted idletime requests:
+
+
+=======================================================
+
+ calling allocate and add with SRAM Resource Request for table table0 (of type idletime), with 1 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
+=======================================================
+
+Requesting to use 0 RAMs and have 77 available.
+Requesting to use 1 Map RAMs and have 46 available.
+
+========================================================
+ Run Placement on Request List of size 3 in stage 0
+ open_up_all_for_match=False
+ synth_two_port_first=False
+========================================================
+
+Match Rams Need is 0
+Algorithmic TCAM Match RAMs Need is 0
+Other Rams Need is 3
+
++=========================================
+| Placing algorithmic tcam
++=========================================
+
+sorted algorithmic tcam requests: (0)
+
+
+-------------------------------------
+Columns need for match is 0
+columns for width is 0
+other columns is 1
+reserved columns is 9
+reserved columns for tind 1
+reserved columns for stateful 1
+Ternary Indirection Rams Need is 1
+Depth sorted requested
+Group 0
+Sram Resource Request for P4 table table0 with handle 16777220 of type ternary_indirection in stage 0
+ table_type : ternary_indirection
+ rams_for_width : 1
+ use_stash : False
+ number_ways : 1
+ way #0
+ SRAM Request Group 0
+ rams_for_depth : 1
+ map_rams : 0
+ way_number : 0
+ ram_word_select_bits : 0
+ ram_enable_select_bits : 0
+
+Requesting to use 1 RAMs and have 32 available.
+Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 0
+Allocating: SRAM: Row 0 Col 2 in stage 0 for table table0's ternary indirection word range Words 0 to 1023.
+Result bus only needs (0):
+
++=========================================
+| Placing action/stats/meters/selection
++=========================================
+
+Requesting to use 2 RAMs and have 79 available.
+SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
+Depth sorted idletime requests:
+Sram Resource Request for P4 table table0 with handle 16777220 of type idletime in stage 0
+ table_type : idletime
+ rams_for_width : 0
+ use_stash : False
+ number_ways : 1
+ way #0
+ SRAM Request Group 0
+ rams_for_depth : 0
+ map_rams : 1
+ way_number : 0
+ ram_word_select_bits : 0
+ ram_enable_select_bits : 0
+
+Requesting to use 1 RAMs and have 46 available.
+top_cnt = 1 and num requests = 1
+bottom_cnt = 0 and num requests = 0
+Working on idletime request SRAM Resource Request for table table0 (of type idletime), with 1 ways wants 0 rams.
+>> wants 1 map rams
+Allocating: Map RAM: Row 7 Unit 0 in stage 0 for table0.
+Allocating: Ram Data Bus IdletimeHalfLogicalRow 0 top is 19 bits in stage 0 for table0.
+
+
+=======================================================
+
+ calling allocate and add with SRAM Resource Request for table process_packet_out_table (of type match), with 0 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
+=======================================================
+
+Requesting to use 0 RAMs and have 77 available.
+Requesting to use 0 Map RAMs and have 45 available.
+
+========================================================
+ Run Placement on Request List of size 4 in stage 0
+ open_up_all_for_match=False
+ synth_two_port_first=False
+========================================================
+
+Match Rams Need is 0
+Algorithmic TCAM Match RAMs Need is 0
+Other Rams Need is 3
+
++=========================================
+| Placing algorithmic tcam
++=========================================
+
+sorted algorithmic tcam requests: (0)
+
+
+-------------------------------------
+Columns need for match is 0
+columns for width is 0
+other columns is 1
+reserved columns is 9
+reserved columns for tind 1
+reserved columns for stateful 1
+Ternary Indirection Rams Need is 1
+Depth sorted requested
+Group 0
+Sram Resource Request for P4 table table0 with handle 16777220 of type ternary_indirection in stage 0
+ table_type : ternary_indirection
+ rams_for_width : 1
+ use_stash : False
+ number_ways : 1
+ way #0
+ SRAM Request Group 0
+ rams_for_depth : 1
+ map_rams : 0
+ way_number : 0
+ ram_word_select_bits : 0
+ ram_enable_select_bits : 0
+
+Requesting to use 1 RAMs and have 32 available.
+Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 0
+Allocating: SRAM: Row 0 Col 2 in stage 0 for table table0's ternary indirection word range Words 0 to 1023.
+Result bus only needs (1):
+ process_packet_out_table
+Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 0
+
++=========================================
+| Placing action/stats/meters/selection
++=========================================
+
+Requesting to use 2 RAMs and have 79 available.
+SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
+Depth sorted idletime requests:
+Sram Resource Request for P4 table table0 with handle 16777220 of type idletime in stage 0
+ table_type : idletime
+ rams_for_width : 0
+ use_stash : False
+ number_ways : 1
+ way #0
+ SRAM Request Group 0
+ rams_for_depth : 0
+ map_rams : 1
+ way_number : 0
+ ram_word_select_bits : 0
+ ram_enable_select_bits : 0
+
+Requesting to use 1 RAMs and have 46 available.
+top_cnt = 1 and num requests = 1
+bottom_cnt = 0 and num requests = 0
+Working on idletime request SRAM Resource Request for table table0 (of type idletime), with 1 ways wants 0 rams.
+>> wants 1 map rams
+Allocating: Map RAM: Row 7 Unit 0 in stage 0 for table0.
+Allocating: Ram Data Bus IdletimeHalfLogicalRow 0 top is 19 bits in stage 0 for table0.
+
+
+=======================================================
+
+ calling allocate and add with SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams. (open-all=False, synth_two_port_first=False)
=======================================================
Requesting to use 2 RAMs and have 80 available.
@@ -95,237 +362,17 @@
+=========================================
Requesting to use 2 RAMs and have 80 available.
-SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-
-call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table table0_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 1 for table0_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for table0_counter.
-Depth sorted idletime requests:
-
-
-=======================================================
-
- calling allocate and add with SRAM Resource Request for table table0 (of type ternary_indirection), with 1 ways wants 1 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 1 RAMs and have 78 available.
-Requesting to use 0 Map RAMs and have 46 available.
-
-========================================================
- Run Placement on Request List of size 2 in stage 1
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 0
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 3
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 0
-columns for width is 0
-other columns is 1
-reserved columns is 9
-reserved columns for tind 1
-reserved columns for stateful 1
-Ternary Indirection Rams Need is 1
-Depth sorted requested
-Group 0
-Sram Resource Request for P4 table table0 with handle 16777221 of type ternary_indirection in stage 1
- table_type : ternary_indirection
- rams_for_width : 1
- use_stash : False
- number_ways : 1
- way #0
- SRAM Request Group 0
- rams_for_depth : 1
- map_rams : 0
- way_number : 0
- ram_word_select_bits : 0
- ram_enable_select_bits : 0
-
-Requesting to use 1 RAMs and have 32 available.
-Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 1
-Allocating: SRAM: Row 0 Col 2 in stage 1 for table table0's ternary indirection word range Words 0 to 1023.
-Result bus only needs (0):
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 2 RAMs and have 79 available.
-SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-
-call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table table0_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 1 for table0_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for table0_counter.
-Depth sorted idletime requests:
-
-
-=======================================================
-
- calling allocate and add with SRAM Resource Request for table table0 (of type idletime), with 1 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 0 RAMs and have 77 available.
-Requesting to use 1 Map RAMs and have 46 available.
-
-========================================================
- Run Placement on Request List of size 3 in stage 1
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 0
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 3
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 0
-columns for width is 0
-other columns is 1
-reserved columns is 9
-reserved columns for tind 1
-reserved columns for stateful 1
-Ternary Indirection Rams Need is 1
-Depth sorted requested
-Group 0
-Sram Resource Request for P4 table table0 with handle 16777221 of type ternary_indirection in stage 1
- table_type : ternary_indirection
- rams_for_width : 1
- use_stash : False
- number_ways : 1
- way #0
- SRAM Request Group 0
- rams_for_depth : 1
- map_rams : 0
- way_number : 0
- ram_word_select_bits : 0
- ram_enable_select_bits : 0
-
-Requesting to use 1 RAMs and have 32 available.
-Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 1
-Allocating: SRAM: Row 0 Col 2 in stage 1 for table table0's ternary indirection word range Words 0 to 1023.
-Result bus only needs (0):
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 2 RAMs and have 79 available.
-SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-
-call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table table0_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 1 for table0_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for table0_counter.
-Depth sorted idletime requests:
-Sram Resource Request for P4 table table0 with handle 16777221 of type idletime in stage 1
- table_type : idletime
- rams_for_width : 0
- use_stash : False
- number_ways : 1
- way #0
- SRAM Request Group 0
- rams_for_depth : 0
- map_rams : 1
- way_number : 0
- ram_word_select_bits : 0
- ram_enable_select_bits : 0
-
-Requesting to use 1 RAMs and have 46 available.
-top_cnt = 1 and num requests = 1
-bottom_cnt = 0 and num requests = 0
-Working on idletime request SRAM Resource Request for table table0 (of type idletime), with 1 ways wants 0 rams.
->> wants 1 map rams
-Allocating: Map RAM: Row 7 Unit 0 in stage 1 for table0.
-Allocating: Ram Data Bus IdletimeHalfLogicalRow 0 top is 19 bits in stage 1 for table0.
-
-
-=======================================================
-
- calling allocate and add with SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 2 RAMs and have 80 available.
-Requesting to use 0 Map RAMs and have 48 available.
-
-========================================================
- Run Placement on Request List of size 1 in stage 2
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 0
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 2
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 0
-columns for width is 0
-other columns is 1
-reserved columns is 9
-reserved columns for tind 0
-reserved columns for stateful 1
-Ternary Indirection Rams Need is 0
-Depth sorted requested
-Requesting to use 0 RAMs and have 32 available.
-Result bus only needs (0):
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 2 RAMs and have 80 available.
SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
NO Spill Required off of logical row 13 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table ingress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 2 for ingress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for ingress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table ingress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 1 for ingress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for ingress_port_counter.
Depth sorted idletime requests:
@@ -338,7 +385,7 @@
Requesting to use 0 Map RAMs and have 46 available.
========================================================
- Run Placement on Request List of size 2 in stage 2
+ Run Placement on Request List of size 2 in stage 1
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -366,7 +413,7 @@
Requesting to use 0 RAMs and have 32 available.
Result bus only needs (1):
ingress_port_count_table
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 2
+Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 1
+=========================================
| Placing action/stats/meters/selection
@@ -377,13 +424,13 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table ingress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 2 for ingress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for ingress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table ingress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 1 for ingress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for ingress_port_counter.
Depth sorted idletime requests:
@@ -396,7 +443,7 @@
Requesting to use 0 Map RAMs and have 46 available.
========================================================
- Run Placement on Request List of size 3 in stage 2
+ Run Placement on Request List of size 3 in stage 1
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -424,7 +471,7 @@
Requesting to use 0 RAMs and have 32 available.
Result bus only needs (1):
ingress_port_count_table
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 2
+Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 1
+=========================================
| Placing action/stats/meters/selection
@@ -436,23 +483,23 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table egress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table egress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 2 for egress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 2 for egress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for egress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for egress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table egress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 1 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 1 for egress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 1 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 1 for egress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for egress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for egress_port_counter.
NO Spill Required off of logical row 9 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 9 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 4 on right (128 bits) in stage 2 for table ingress_port_counter.
-Allocating: SRAM: Row 4 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 4 Unit 0 in stage 2 for ingress_port_counter.
-Allocating: SRAM: Row 4 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 4 Unit 1 in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 2 for ingress_port_counter.
+Allocating: Statistics ALU 4 on right (128 bits) in stage 1 for table ingress_port_counter.
+Allocating: SRAM: Row 4 Col 6 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 4 Unit 0 in stage 1 for ingress_port_counter.
+Allocating: SRAM: Row 4 Col 7 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 4 Unit 1 in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 1 for ingress_port_counter.
Depth sorted idletime requests:
@@ -465,7 +512,7 @@
Requesting to use 0 Map RAMs and have 44 available.
========================================================
- Run Placement on Request List of size 4 in stage 2
+ Run Placement on Request List of size 4 in stage 1
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -494,8 +541,8 @@
Result bus only needs (2):
egress_port_count_table
ingress_port_count_table
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 2
-Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 2
+Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 1
+Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 1
+=========================================
| Placing action/stats/meters/selection
@@ -507,70 +554,21 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table egress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table egress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 2 for egress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 2 for egress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for egress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for egress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table egress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 1 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 1 for egress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 1 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 1 for egress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for egress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for egress_port_counter.
NO Spill Required off of logical row 9 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 9 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 4 on right (128 bits) in stage 2 for table ingress_port_counter.
-Allocating: SRAM: Row 4 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 4 Unit 0 in stage 2 for ingress_port_counter.
-Allocating: SRAM: Row 4 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 4 Unit 1 in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 2 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 2 for ingress_port_counter.
-Depth sorted idletime requests:
-
-
-=======================================================
-
- calling allocate and add with SRAM Resource Request for table egress_pkt (of type match), with 0 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 0 RAMs and have 80 available.
-Requesting to use 0 Map RAMs and have 48 available.
-
-========================================================
- Run Placement on Request List of size 2 in stage 0
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 0
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 0
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 0
-columns for width is 0
-other columns is 0
-reserved columns is 10
-reserved columns for tind 0
-reserved columns for stateful 0
-Ternary Indirection Rams Need is 0
-Depth sorted requested
-Requesting to use 0 RAMs and have 32 available.
-Result bus only needs (2):
- egress_pkt
- ingress_pkt
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 0
-Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 0
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 0 RAMs and have 80 available.
+Allocating: Statistics ALU 4 on right (128 bits) in stage 1 for table ingress_port_counter.
+Allocating: SRAM: Row 4 Col 6 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 4 Unit 0 in stage 1 for ingress_port_counter.
+Allocating: SRAM: Row 4 Col 7 in stage 1 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 4 Unit 1 in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 1 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 1 for ingress_port_counter.
Depth sorted idletime requests:
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.tcam.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.tcam.log
index 9efbe60..355fc95 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.tcam.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.tcam.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: mau.tcam.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
@@ -17,9 +17,9 @@
Run Placement on Request List of size 1
========================================================
-Allocating: TCAM: Row 11 Col 1 in stage 1 for table table0 for entries Entry bits [43:0] and word range Words 0 to 511.
-Allocating: TCAM: Row 10 Col 1 in stage 1 for table table0 for entries Entry bits [87:44] and word range Words 0 to 511.
-Allocating: TCAM: Row 9 Col 1 in stage 1 for table table0 for entries Entry bits [131:88] and word range Words 0 to 511.
-Allocating: Ram Data Bus TcamMatchSearch2 11 left_and_right is 44 bits in stage 1
-Allocating: Ram Data Bus TcamMatchSearch2 10 left_and_right is 44 bits in stage 1
-Allocating: Ram Data Bus TcamMatchSearch2 9 left_and_right is 44 bits in stage 1
+Allocating: TCAM: Row 11 Col 1 in stage 0 for table table0 for entries Entry bits [43:0] and word range Words 0 to 511.
+Allocating: TCAM: Row 10 Col 1 in stage 0 for table table0 for entries Entry bits [87:44] and word range Words 0 to 511.
+Allocating: TCAM: Row 9 Col 1 in stage 0 for table table0 for entries Entry bits [131:88] and word range Words 0 to 511.
+Allocating: Ram Data Bus TcamMatchSearch2 11 left_and_right is 44 bits in stage 0
+Allocating: Ram Data Bus TcamMatchSearch2 10 left_and_right is 44 bits in stage 0
+Allocating: Ram Data Bus TcamMatchSearch2 9 left_and_right is 44 bits in stage 0
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.tp.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.tp.log
index fa641bc..44131b9 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.tp.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/mau.tp.log
@@ -1,86 +1,93 @@
+---------------------------------------------------------------------+
| Log file: mau.tp.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
----- Stage 0 ------
_condition_0
- ingress_pkt
------ Stage 1 ------
- _condition_1
+ process_packet_out_table
table0
------ Stage 2 ------
+----- Stage 1 ------
_condition_2
ingress_port_count_table
egress_port_count_table
----- Stage 0 ------
- _condition_3
- egress_pkt
+ _condition_0
+ process_packet_out_table
+ table0
+----- Stage 1 ------
+ _condition_2
+ ingress_port_count_table
+ egress_port_count_table
+----- Stage 0 ------
+ _condition_0
+ process_packet_out_table
+ table0
+----- Stage 1 ------
+ _condition_2
+ ingress_port_count_table
+ egress_port_count_table
------------------------------------------
Running Table Placement 4
------------------------------------------
Cannot use hash action for table ingress_port_count_table.
-Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 254.
+Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 510.
Cannot use hash action for table egress_port_count_table.
-Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 254.
-Cannot use hash action for table ingress_pkt.
-Table ingress_pkt has no side effect tables.
-Cannot use hash action for table egress_pkt.
-Table egress_pkt has no side effect tables.
+Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 510.
+Cannot use hash action for table process_packet_out_table.
+Table process_packet_out_table has no side effect tables.
Cannot use hash action for table table0.
Cannot use hash-action for table table0 because it requires a ternary-style match for field ig_intr_md.ingress_port.
------------------------------------------
Table Groups
------------------------------------------
-Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (254)]
-Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (254)]
-Table Grouping (ingress) with match table ingress_pkt (1024) [ingress_pkt__action__ (1024)]
-Table Grouping (egress) with match table egress_pkt (1024) [egress_pkt__action__ (1024)]
+Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (510)]
+Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (510)]
+Table Grouping (ingress) with match table process_packet_out_table (1024) [process_packet_out_table__action__ (1024)]
Table Grouping (ingress) with match table table0 (512) [table0__action__ (512), table0_counter (512)]
Table Grouping (ingress) with condition table _condition_0 (0) []
-Table Grouping (ingress) with condition table _condition_1 (0) []
Table Grouping (ingress) with condition table _condition_2 (0) []
-Table Grouping (egress) with condition table _condition_3 (0) []
-Phase 0 possible? False Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
+Phase 0 possible? False Cannot implement table0 in phase 0 resources because table uses side effect tables.
------------------------------------
Starting placement pass 0
------------------------------------
Nodes could place:
_condition_0 (2)
->> choose Table Grouping (ingress) with match table ingress_pkt (1024) [ingress_pkt__action__ (1024)]
-Earliest stage can place: 0
-Placing table: ingress_pkt__action__ with 1024 entries
-Table ingress_pkt__action__ with 0 entries is directly referenced
-Match Table ingress_pkt has a total of 1 entries in stage 0
- Direct mapped table ingress_pkt__action__ has 0 entries
->> set ingress_pkt (8) to placed
->> set _condition_0 (2) to placed
-
-Nodes could place:
- _condition_1 (3)
>> choose Table Grouping (ingress) with match table table0 (512) [table0__action__ (512), table0_counter (512)]
-Earliest stage can place: 1
+Earliest stage can place: 0
Placing table: table0__action__ with 512 entries
Placing table: table0_counter with 512 entries
Table table0__action__ with 0 entries is directly referenced
Table table0_counter with 4096 entries is directly referenced
-Match Table table0 has a total of 512 entries in stage 1
+Match Table table0 has a total of 512 entries in stage 0
Direct mapped table table0__action__ has 0 entries
Direct mapped table table0_counter has 4096 entries
>> set table0 (7) to placed
->> set _condition_1 (3) to placed
+>> set _condition_0 (2) to placed
+
+Nodes could place:
+ process_packet_out_table (3)
+process_packet_out_table and _condition_0 not mutually exclusive
+>> choose Table Grouping (ingress) with match table process_packet_out_table (1024) [process_packet_out_table__action__ (1024)]
+Earliest stage can place: 0
+process_packet_out_table and _condition_0 not mutually exclusive
+Placing table: process_packet_out_table__action__ with 1024 entries
+Table process_packet_out_table__action__ with 0 entries is directly referenced
+Match Table process_packet_out_table has a total of 1 entries in stage 0
+ Direct mapped table process_packet_out_table__action__ has 0 entries
+>> set process_packet_out_table (3) to placed
Nodes could place:
_condition_2 (4)
->> choose Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (254)]
-Earliest stage can place: 2
+>> choose Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (510)]
+Earliest stage can place: 1
Placing table: ingress_port_count_table__action__ with 1024 entries
-Placing table: ingress_port_counter with 254 entries
+Placing table: ingress_port_counter with 510 entries
Table ingress_port_count_table__action__ with 0 entries is directly referenced
Table ingress_port_counter with 4096 entries is indirectly referenced
-Match Table ingress_port_count_table has a total of 1 entries in stage 2
+Match Table ingress_port_count_table has a total of 1 entries in stage 1
Direct mapped table ingress_port_count_table__action__ has 0 entries
>> set ingress_port_count_table (5) to placed
>> set _condition_2 (4) to placed
@@ -89,41 +96,25 @@
egress_port_count_table (6)
egress_port_count_table and _condition_2 not mutually exclusive
egress_port_count_table and ingress_port_count_table not mutually exclusive
->> choose Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (254)]
-Earliest stage can place: 2
+>> choose Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (510)]
+Earliest stage can place: 1
egress_port_count_table and _condition_2 not mutually exclusive
egress_port_count_table and ingress_port_count_table not mutually exclusive
Placing table: egress_port_count_table__action__ with 1024 entries
-Placing table: egress_port_counter with 254 entries
+Placing table: egress_port_counter with 510 entries
Table egress_port_count_table__action__ with 0 entries is directly referenced
Table egress_port_counter with 4096 entries is indirectly referenced
-Match Table egress_port_count_table has a total of 1 entries in stage 2
+Match Table egress_port_count_table has a total of 1 entries in stage 1
Direct mapped table egress_port_count_table__action__ has 0 entries
>> set egress_port_count_table (6) to placed
-------------------------------------
- Starting placement pass 1
-------------------------------------
-
-Nodes could place:
- _condition_3 (2)
->> choose Table Grouping (egress) with match table egress_pkt (1024) [egress_pkt__action__ (1024)]
-Earliest stage can place: 0
-Placing table: egress_pkt__action__ with 1024 entries
-Table egress_pkt__action__ with 0 entries is directly referenced
-Match Table egress_pkt has a total of 1 entries in stage 0
- Direct mapped table egress_pkt__action__ has 0 entries
->> set egress_pkt (3) to placed
->> set _condition_3 (2) to placed
------------------------------------------
Logical Table IDs
------------------------------------------
Logical Table IDs in stage 0 are:
- 0 : ingress_pkt
- 1 : egress_pkt
-Logical Table IDs in stage 1 are:
0 : table0
-Logical Table IDs in stage 2 are:
+ 1 : process_packet_out_table
+Logical Table IDs in stage 1 are:
0 : ingress_port_count_table
1 : egress_port_count_table
@@ -133,23 +124,15 @@
count_ingress -> egress_port_count_table
action mapping for egress_port_count_table
count_egress -> --END_OF_PIPELINE--
-action mapping for ingress_pkt
- _packet_out -> _condition_1
-action mapping for egress_pkt
- add_packet_in_hdr -> --END_OF_PIPELINE--
+action mapping for process_packet_out_table
+ _process_packet_out -> _condition_2
action mapping for table0
set_egress_port -> _condition_2
send_to_cpu -> _condition_2
_drop -> _condition_2
true/false mapping for _condition_0
- False -> _condition_1
- True -> ingress_pkt
-true/false mapping for _condition_1
- False -> _condition_2
+ False -> process_packet_out_table
True -> table0
true/false mapping for _condition_2
False -> --END_OF_PIPELINE--
True -> ingress_port_count_table
-true/false mapping for _condition_3
- False -> --END_OF_PIPELINE--
- True -> egress_pkt
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.characterize.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.characterize.log
index 0dd4854..fbedb72 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.characterize.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.characterize.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: pa.characterize.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
Program: default
@@ -12,9 +12,9 @@
| phv0 | ingress | | | | | | | | | | | | | | | | | |
| [31:0] | ingress | --pov_reserved--_0[31:0] | meta | | | | | | | | | | | | | | | R |
| phv1 | ingress | | | | | | | | | | | | | | | | | |
-| [31:0] | ingress | ethernet.dstAddr[39:8] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [31:0] | ingress | ethernet.dstAddr[39:8] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv2 | ingress | | | | | | | | | | | | | | | | | |
-| [31:0] | ingress | ethernet.srcAddr[31:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [31:0] | ingress | ethernet.srcAddr[31:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv3 | - | | | | | | | | | | | | | | | | | |
| phv4 | - | | | | | | | | | | | | | | | | | |
| phv5 | - | | | | | | | | | | | | | | | | | |
@@ -80,23 +80,21 @@
| phv62 | - | | | | | | | | | | | | | | | | | |
| phv63 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
-| phv64 | ingress | | SH | | | | | | | | | | | | | | | |
-| [7:1] | ingress | -pad-0-[6:0] | meta | | | | | | | | | | | | | | | |
-| [0:0] | ingress | ig_intr_md_for_tm.copy_to_cpu[0:0] | imeta | | | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv64 | ingress | | | | | | | | | | | | | | | | | |
+| [7:0] | ingress | ethernet.dstAddr[47:40] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv65 | ingress | | | | | | | | | | | | | | | | | |
-| [7:0] | ingress | ethernet.dstAddr[47:40] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv66 | ingress | | | | | | | | | | | | | | | | | |
-| [7:0] | ingress | ethernet.srcAddr[39:32] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv67 | ingress | | SH | | | | | | | | | | | | | | | |
+| [7:0] | ingress | ethernet.srcAddr[39:32] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv66 | ingress | | SH | | | | | | | | | | | | | | | |
| [6:6] | ingress | --validity_check--metadata_bridge[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [5:5] | ingress | --validity_check--udp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [4:4] | ingress | --validity_check--tcp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [3:3] | ingress | --validity_check--ipv4[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [2:2] | ingress | --validity_check--ethernet[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [1:1] | ingress | --validity_check--packet_out_hdr[0:0] | pov | | W | RW | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [0:0] | ingress | --validity_check--packet_in_hdr[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv68 | ingress | | | | | | | | | | | | | | | | | |
-| [7:5] | ingress | ig_intr_md_for_tm.drop_ctl[2:0] | imeta | | | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [1:1] | ingress | --validity_check--packet_out_hdr[0:0] | pov | | W | RW | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [0:0] | ingress | --validity_check--packet_in_hdr[0:0] | pov | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv67 | ingress | | | | | | | | | | | | | | | | | |
+| [7:5] | ingress | ig_intr_md_for_tm.drop_ctl[2:0] | imeta | | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv68 | - | | | | | | | | | | | | | | | | | |
| phv69 | - | | | | | | | | | | | | | | | | | |
| phv70 | - | | | | | | | | | | | | | | | | | |
| phv71 | - | | | | | | | | | | | | | | | | | |
@@ -110,18 +108,16 @@
| phv79 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| phv80 | egress | | SH | | | | | | | | | | | | | | | |
-| [7:1] | egress | -pad-0-[6:0] | meta | | | | | | | | | | | | | | | |
-| [0:0] | egress | ig_intr_md_for_tm.copy_to_cpu[0:0] | imeta | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv81 | egress | | SH | | | | | | | | | | | | | | | |
| [7:3] | egress | eg_intr_md._pad7[4:0] | imeta | | W | | | | | | | | | | | | | |
| [2:0] | egress | eg_intr_md.egress_cos[2:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv82 | egress | | SH | | | | | | | | | | | | | | | |
+| phv81 | egress | | SH | | | | | | | | | | | | | | | |
| [5:5] | egress | --validity_check--udp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [4:4] | egress | --validity_check--tcp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [3:3] | egress | --validity_check--ipv4[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [2:2] | egress | --validity_check--ethernet[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [1:1] | egress | --validity_check--packet_out_hdr[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [0:0] | egress | --validity_check--packet_in_hdr[0:0] | pov | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [0:0] | egress | --validity_check--packet_in_hdr[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv82 | - | | | | | | | | | | | | | | | | | |
| phv83 | - | | | | | | | | | | | | | | | | | |
| phv84 | - | | | | | | | | | | | | | | | | | |
| phv85 | - | | | | | | | | | | | | | | | | | |
@@ -171,23 +167,23 @@
| phv127 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| phv128 | ingress | | SH | | | | | | | | | | | | | | | |
-| [15:15] | ingress | ig_intr_md.resubmit_flag[0:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [14:14] | ingress | ig_intr_md._pad1[0:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [13:12] | ingress | ig_intr_md._pad2[1:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [11:9] | ingress | ig_intr_md._pad3[2:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [8:0] | ingress | ig_intr_md.ingress_port[8:0] | imeta | | W | ~ | R | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:15] | ingress | ig_intr_md.resubmit_flag[0:0] | imeta | | W | | | | | | | | | | | | | |
+| [14:14] | ingress | ig_intr_md._pad1[0:0] | imeta | | W | | | | | | | | | | | | | |
+| [13:12] | ingress | ig_intr_md._pad2[1:0] | imeta | | W | | | | | | | | | | | | | |
+| [11:9] | ingress | ig_intr_md._pad3[2:0] | imeta | | W | | | | | | | | | | | | | |
+| [8:0] | ingress | ig_intr_md.ingress_port[8:0] | imeta | | W | R | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv129 | ingress | | OL,SH | | | | | | | | | | | | | | | |
| [15:7] | ingress | packet_out_hdr.egress_port[8:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [15:7] | ingress | packet_in_hdr.ingress_port[8:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:7] | ingress | packet_in_hdr.ingress_port[8:0] | pkt | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [6:0] | ingress | packet_out_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [6:0] | ingress | packet_in_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv130 | ingress | | | | | | | | | | | | | | | | | |
-| [8:0] | ingress | ig_intr_md_for_tm.ucast_egress_port[8:0] | imeta | | | W | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [8:0] | ingress | ig_intr_md_for_tm.ucast_egress_port[8:0] | imeta | | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv131 | ingress | | SH | | | | | | | | | | | | | | | |
-| [15:8] | ingress | ethernet.dstAddr[7:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [7:0] | ingress | ethernet.srcAddr[47:40] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:8] | ingress | ethernet.dstAddr[7:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [7:0] | ingress | ethernet.srcAddr[47:40] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv132 | ingress | | | | | | | | | | | | | | | | | |
-| [15:0] | ingress | ethernet.etherType[15:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:0] | ingress | ethernet.etherType[15:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv133 | - | | | | | | | | | | | | | | | | | |
| phv134 | - | | | | | | | | | | | | | | | | | |
| phv135 | - | | | | | | | | | | | | | | | | | |
@@ -201,14 +197,10 @@
| phv143 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| phv144 | egress | | SH | | | | | | | | | | | | | | | |
-| [15:9] | egress | -pad-1-[6:0] | meta | | | | | | | | | | | | | | | |
-| [8:0] | egress | ig_intr_md.ingress_port[8:0] | imeta | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv145 | egress | | SH | | | | | | | | | | | | | | | |
-| [15:7] | egress | packet_in_hdr.ingress_port[8:0] | pkt | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [6:0] | egress | packet_in_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv146 | egress | | SH | | | | | | | | | | | | | | | |
| [15:9] | egress | eg_intr_md._pad0[6:0] | imeta | | W | | | | | | | | | | | | | |
| [8:0] | egress | eg_intr_md.egress_port[8:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv145 | - | | | | | | | | | | | | | | | | | |
+| phv146 | - | | | | | | | | | | | | | | | | | |
| phv147 | - | | | | | | | | | | | | | | | | | |
| phv148 | - | | | | | | | | | | | | | | | | | |
| phv149 | - | | | | | | | | | | | | | | | | | |
@@ -300,18 +292,17 @@
| phv258 | ingress | | | | | | | | | | | | | | | | | |
| [31:0] | ingress | ipv4.dstAddr[31:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv259 | ingress | | OL,SH | | | | | | | | | | | | | | | |
-| [31:16] | ingress | udp.length_[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [31:0] | ingress | tcp.ackNo[31:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [15:0] | ingress | udp.checksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv260 | ingress | | SH | | | | | | | | | | | | | | | |
| [31:28] | ingress | tcp.dataOffset[3:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [27:25] | ingress | tcp.res[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [24:22] | ingress | tcp.ecn[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [21:16] | ingress | tcp.ctrl[5:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [31:16] | ingress | udp.length_[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | ingress | tcp.window[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv261 | ingress | | SH | | | | | | | | | | | | | | | |
+| [15:0] | ingress | udp.checksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv260 | ingress | | SH | | | | | | | | | | | | | | | |
| [31:16] | ingress | tcp.checksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | ingress | tcp.urgentPtr[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv261 | - | | | | | | | | | | | | | | | | | |
| phv262 | - | | | | | | | | | | | | | | | | | |
| phv263 | - | | | | | | | | | | | | | | | | | |
| phv264 | egress | | SH | | | | | | | | | | | | | | | |
@@ -368,8 +359,10 @@
| phv291 | ingress | | OL,SH | | | | | | | | | | | | | | | |
| [7:0] | ingress | tcp.srcPort[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [7:0] | ingress | udp.srcPort[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv292 | - | | | | | | | | | | | | | | | | | |
-| phv293 | - | | | | | | | | | | | | | | | | | |
+| phv292 | ingress | | | | | | | | | | | | | | | | | |
+| [7:0] | ingress | tcp.dstPort[15:8] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv293 | ingress | | | | | | | | | | | | | | | | | |
+| [7:0] | ingress | tcp.dstPort[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv294 | - | | | | | | | | | | | | | | | | | |
| phv295 | - | | | | | | | | | | | | | | | | | |
| phv296 | egress | | SH | | | | | | | | | | | | | | | |
@@ -415,13 +408,14 @@
| [15:13] | ingress | ipv4.flags[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [12:0] | ingress | ipv4.fragOffset[12:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv323 | ingress | | OL,SH | | | | | | | | | | | | | | | |
-| [15:0] | ingress | tcp.dstPort[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:0] | ingress | tcp.seqNo[31:16] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | ingress | udp.dstPort[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv324 | ingress | | | | | | | | | | | | | | | | | |
-| [15:0] | ingress | tcp.seqNo[31:16] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv325 | ingress | | | | | | | | | | | | | | | | | |
| [15:0] | ingress | tcp.seqNo[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv326 | - | | | | | | | | | | | | | | | | | |
+| phv325 | ingress | | | | | | | | | | | | | | | | | |
+| [15:0] | ingress | tcp.ackNo[31:16] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv326 | ingress | | | | | | | | | | | | | | | | | |
+| [15:0] | ingress | tcp.ackNo[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv327 | - | | | | | | | | | | | | | | | | | |
| phv328 | - | | | | | | | | | | | | | | | | | |
| phv329 | - | | | | | | | | | | | | | | | | | |
@@ -447,9 +441,11 @@
| [7:0] | egress | ethernet.srcAddr[47:40] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv339 | egress | | | | | | | | | | | | | | | | | |
| [15:0] | egress | ethernet.etherType[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv340 | egress | | SH | | | | | | | | | | | | | | | |
+| phv340 | egress | | OL,SH | | | | | | | | | | | | | | | |
| [15:7] | egress | packet_out_hdr.egress_port[8:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:7] | egress | packet_in_hdr.ingress_port[8:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [6:0] | egress | packet_out_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [6:0] | egress | packet_in_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv341 | - | | | | | | | | | | | | | | | | | |
| phv342 | - | | | | | | | | | | | | | | | | | |
| phv343 | - | | | | | | | | | | | | | | | | | |
@@ -481,9 +477,9 @@
-----------------------------------------------------------------------------------------------------------------------------------------
-Containers used: 58
-Containers with data overlayed: 9 (15.52%)
-Containers shared: 31 (53.45%)
+Containers used: 56
+Containers with data overlayed: 10 (17.86%)
+Containers shared: 26 (46.43%)
------------------------
Legend:
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.constraints.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.constraints.log
index ce29a75..0813a74 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.constraints.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.constraints.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: pa.constraints.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
To populate this log file, include --print-pa-constraints as a compiler argument.
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.liveness.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.liveness.log
index 490a414..35be00a 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.liveness.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.liveness.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: pa.liveness.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.log
index efa1034..0311aff 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: pa.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
HLIR Version: 0.10.5
@@ -60,7 +60,7 @@
-----------------------------------------------
-----------------------------------------------
- Eliminating unused metadata (98 instances)
+ Eliminating unused metadata (99 instances)
-----------------------------------------------
Removing standard_metadata.ingress_port in ingress
Removing standard_metadata.packet_length in ingress
@@ -80,6 +80,7 @@
Removing ig_intr_md_for_tm.qid in ingress
Removing ig_intr_md_for_tm.icos_for_copy_to_cpu in ingress
Removing ig_intr_md_for_tm._pad2 in ingress
+Removing ig_intr_md_for_tm.copy_to_cpu in ingress
Removing ig_intr_md_for_tm.packet_color in ingress
Removing ig_intr_md_for_tm.disable_ucast_cutthru in ingress
Removing ig_intr_md_for_tm.enable_mcast_cutthru in ingress
@@ -174,10 +175,10 @@
--------------------------------------------
ingress field instance bit width histogram
--------------------------------------------
- Total fields: 49
+ Total fields: 48
Max value: 13
- 1 : xxxxxxxxxx (10)
+ 1 : xxxxxxxxx (9)
2 : x (1)
3 : xxxxx (5)
4 : xxx (3)
@@ -193,17 +194,17 @@
--------------------------------------------
egress field instance bit width histogram
--------------------------------------------
- Total fields: 46
+ Total fields: 44
Max value: 13
- 1 : xxxxxxx (7)
+ 1 : xxxxxx (6)
3 : xxxx (4)
4 : xxx (3)
5 : x (1)
6 : x (1)
7 : xxx (3)
8 : xxx (3)
- 9 : xxxx (4)
+ 9 : xxx (3)
13 : x (1)
16 : xxxxxxxxxxxxx (13)
32 : xxxx (4)
@@ -265,7 +266,7 @@
-----------------------------------------------
-----------------------------------------------
- Eliminating unused metadata (98 instances)
+ Eliminating unused metadata (99 instances)
-----------------------------------------------
Removing standard_metadata.ingress_port in ingress
Removing standard_metadata.packet_length in ingress
@@ -285,6 +286,7 @@
Removing ig_intr_md_for_tm.qid in ingress
Removing ig_intr_md_for_tm.icos_for_copy_to_cpu in ingress
Removing ig_intr_md_for_tm._pad2 in ingress
+Removing ig_intr_md_for_tm.copy_to_cpu in ingress
Removing ig_intr_md_for_tm.packet_color in ingress
Removing ig_intr_md_for_tm.disable_ucast_cutthru in ingress
Removing ig_intr_md_for_tm.enable_mcast_cutthru in ingress
@@ -379,10 +381,10 @@
--------------------------------------------
ingress field instance bit width histogram
--------------------------------------------
- Total fields: 49
+ Total fields: 48
Max value: 13
- 1 : xxxxxxxxxx (10)
+ 1 : xxxxxxxxx (9)
2 : x (1)
3 : xxxxx (5)
4 : xxx (3)
@@ -398,17 +400,17 @@
--------------------------------------------
egress field instance bit width histogram
--------------------------------------------
- Total fields: 46
+ Total fields: 44
Max value: 13
- 1 : xxxxxxx (7)
+ 1 : xxxxxx (6)
3 : xxxx (4)
4 : xxx (3)
5 : x (1)
6 : x (1)
7 : xxx (3)
8 : xxx (3)
- 9 : xxxx (4)
+ 9 : xxx (3)
13 : x (1)
16 : xxxxxxxxxxxxx (13)
32 : xxxx (4)
@@ -419,7 +421,7 @@
---------------------------------------------------------------------------------------------------------------------------------
| --validity_check--ethernet | 1 | egress | x | x | | | |
| --validity_check--ipv4 | 1 | egress | x | x | | | |
-| --validity_check--packet_in_hdr | 1 | egress | x | x | | | x |
+| --validity_check--packet_in_hdr | 1 | egress | x | x | | | |
| --validity_check--packet_out_hdr | 1 | egress | x | x | | | |
| --validity_check--tcp | 1 | egress | x | x | | | |
| --validity_check--udp | 1 | egress | x | x | | | |
@@ -430,8 +432,6 @@
| ethernet.dstAddr | 48 | egress | x | x | | | |
| ethernet.etherType | 16 | egress | x | x | | | |
| ethernet.srcAddr | 48 | egress | x | x | | | |
-| ig_intr_md.ingress_port | 9 | egress | x | | x | x | |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | egress | x | | x | x | |
| ipv4.diffserv | 8 | egress | x | x | | | |
| ipv4.dstAddr | 32 | egress | x | x | | | |
| ipv4.flags | 3 | egress | x | x | | | |
@@ -445,7 +445,7 @@
| ipv4.ttl | 8 | egress | x | x | | | |
| ipv4.version | 4 | egress | x | x | | | |
| packet_in_hdr._padding | 7 | egress | x | x | | | |
-| packet_in_hdr.ingress_port | 9 | egress | x | x | | | x |
+| packet_in_hdr.ingress_port | 9 | egress | x | x | | | |
| packet_out_hdr._padding | 7 | egress | x | x | | | |
| packet_out_hdr.egress_port | 9 | egress | x | x | | | |
| tcp.ackNo | 32 | egress | x | x | | | |
@@ -466,7 +466,7 @@
| --validity_check--ethernet | 1 | ingress | x | x | | | |
| --validity_check--ipv4 | 1 | ingress | x | x | | | |
| --validity_check--metadata_bridge | 1 | ingress | x | x | | | |
-| --validity_check--packet_in_hdr | 1 | ingress | x | x | | | |
+| --validity_check--packet_in_hdr | 1 | ingress | x | x | | | x |
| --validity_check--packet_out_hdr | 1 | ingress | x | x | | x | x |
| --validity_check--tcp | 1 | ingress | x | x | | | |
| --validity_check--udp | 1 | ingress | x | x | | | |
@@ -478,7 +478,6 @@
| ig_intr_md._pad3 | 3 | ingress | x | | x | | |
| ig_intr_md.ingress_port | 9 | ingress | x | x | x | x | |
| ig_intr_md.resubmit_flag | 1 | ingress | x | | x | | |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | ingress | | x | x | | x |
| ig_intr_md_for_tm.drop_ctl | 3 | ingress | | x | x | | x |
| ig_intr_md_for_tm.ucast_egress_port | 9 | ingress | | x | x | x | x |
| ipv4.diffserv | 8 | ingress | x | x | | | |
@@ -494,7 +493,7 @@
| ipv4.ttl | 8 | ingress | x | x | | | |
| ipv4.version | 4 | ingress | x | x | | | |
| packet_in_hdr._padding | 7 | ingress | x | x | | | |
-| packet_in_hdr.ingress_port | 9 | ingress | x | x | | | |
+| packet_in_hdr.ingress_port | 9 | ingress | x | x | | | x |
| packet_out_hdr._padding | 7 | ingress | x | x | | | |
| packet_out_hdr.egress_port | 9 | ingress | x | x | | x | |
| tcp.ackNo | 32 | ingress | x | x | | | |
@@ -550,19 +549,19 @@
parse_pkt_in and parse_pkt_out are exclusive parse states
parse_tcp and parse_udp are exclusive parse states
->>Event 'pa_init' at time 1504792615.51
+>>Event 'pa_init' at time 1504859072.87
Took 0.01 seconds
--------------------------------------------
-PHV MAU Groups: 93
+PHV MAU Groups: 90
--------------------------------------------
Phv Mau Group (ingress) -- 2 instances for total bit width of 18.
+ ig_intr_md.ingress_port <9 bits ingress parsed imeta R>
+ packet_in_hdr.ingress_port <9 bits ingress parsed W>
+
+Phv Mau Group (ingress) -- 2 instances for total bit width of 18.
ig_intr_md_for_tm.ucast_egress_port <9 bits ingress imeta R W>
packet_out_hdr.egress_port <9 bits ingress parsed R>
-Phv Mau Group (egress) -- 2 instances for total bit width of 18.
- packet_in_hdr.ingress_port <9 bits egress parsed W>
- ig_intr_md.ingress_port <9 bits egress parsed imeta R>
-
Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
ig_intr_md.resubmit_flag <1 bits ingress parsed imeta>
@@ -575,20 +574,11 @@
Phv Mau Group (ingress) -- 1 instance for total bit width of 3.
ig_intr_md._pad3 <3 bits ingress parsed imeta>
-Phv Mau Group (ingress) -- 1 instance for total bit width of 9.
- ig_intr_md.ingress_port <9 bits ingress parsed imeta R>
-
Phv Mau Group (ingress) -- 1 instance for total bit width of 3.
ig_intr_md_for_tm.drop_ctl <3 bits ingress imeta W>
Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
- ig_intr_md_for_tm.copy_to_cpu <1 bits ingress imeta W>
-
-Phv Mau Group (ingress) -- 1 instance for total bit width of 9.
- packet_in_hdr.ingress_port <9 bits ingress parsed tagalong>
-
-Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
- --validity_check--packet_in_hdr <1 bits ingress parsed pov>
+ --validity_check--packet_in_hdr <1 bits ingress parsed pov W>
Phv Mau Group (ingress) -- 1 instance for total bit width of 7.
packet_in_hdr._padding <7 bits ingress parsed tagalong>
@@ -704,8 +694,11 @@
Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
--validity_check--metadata_bridge <1 bits ingress parsed pov>
+Phv Mau Group (egress) -- 1 instance for total bit width of 9.
+ packet_in_hdr.ingress_port <9 bits egress parsed tagalong>
+
Phv Mau Group (egress) -- 1 instance for total bit width of 1.
- --validity_check--packet_in_hdr <1 bits egress parsed pov W>
+ --validity_check--packet_in_hdr <1 bits egress parsed pov>
Phv Mau Group (egress) -- 1 instance for total bit width of 7.
packet_in_hdr._padding <7 bits egress parsed tagalong>
@@ -821,9 +814,6 @@
Phv Mau Group (egress) -- 1 instance for total bit width of 16.
udp.checksum <16 bits egress parsed tagalong>
-Phv Mau Group (egress) -- 1 instance for total bit width of 1.
- ig_intr_md_for_tm.copy_to_cpu <1 bits egress parsed imeta R>
-
Phv Mau Group (egress) -- 1 instance for total bit width of 7.
eg_intr_md._pad0 <7 bits egress parsed imeta>
@@ -837,7 +827,7 @@
eg_intr_md.egress_cos <3 bits egress parsed imeta>
->>Event 'pa_resv' at time 1504792615.52
+>>Event 'pa_resv' at time 1504859072.88
Took 0.00 seconds
-----------------------------------------------
@@ -879,239 +869,14 @@
Group 2 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv32
Group 3 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv48
Reserving 32-bit container for ingress: phv0
->>Event 'pa_bridge' at time 1504792615.55
+>>Event 'pa_bridge' at time 1504859072.91
Took 0.04 seconds
-----------------------------------------------
Allocating fields related to bridged metadata
-----------------------------------------------
Allocation Step
- ig_intr_md.ingress_port <9 bits ingress parsed imeta R> and ig_intr_md.ingress_port <9 bits egress parsed imeta R>
- ig_intr_md_for_tm.copy_to_cpu <1 bits ingress imeta W> and ig_intr_md_for_tm.copy_to_cpu <1 bits egress parsed imeta R>
-
-
-Allowed alignment for fields:
- ig_intr_md.ingress_port -> [0, 8, 16, 24]
- ig_intr_md_for_tm.copy_to_cpu -> [0, 1, 2, 3, 4, 5, 6, 7]
-
-Required packing for bridged metadata: 1
- ig_intr_md.ingress_port (ingress)
- phv[15:15] = ig_intr_md.resubmit_flag[0:0]
- phv[14:14] = ig_intr_md._pad1[0:0]
- phv[13:12] = ig_intr_md._pad2[1:0]
- phv[11:9] = ig_intr_md._pad3[2:0]
- phv[8:0] = ig_intr_md.ingress_port[8:0]
-ig_intr_md_for_tm.copy_to_cpu cannot share with any fields: total bits 1
-
-
-All combinations = 1
-Valid combinations = 1
-Choosing to pack non-byte multiple metadata as below, which wastes 0 bits
-
-Sharing capabilities of groups: (2)
-Group ['ig_intr_md.resubmit_flag', 'ig_intr_md._pad1', 'ig_intr_md._pad2', 'ig_intr_md._pad3', 'ig_intr_md.ingress_port'] can share with 0 other groups:
-Group ['ig_intr_md_for_tm.copy_to_cpu'] can share with 0 other groups:
-
-Merged sharing capabilities of groups: (2)
-Group ['ig_intr_md.resubmit_flag', 'ig_intr_md._pad1', 'ig_intr_md._pad2', 'ig_intr_md._pad3', 'ig_intr_md.ingress_port'] can share with 0 other groups (16 bits):
-Group ['ig_intr_md_for_tm.copy_to_cpu'] can share with 0 other groups (1 bits):
-
-Final group packing:
-Group 0:
- ['ig_intr_md_for_tm.copy_to_cpu']
-Group 1:
- ['ig_intr_md.resubmit_flag', 'ig_intr_md._pad1', 'ig_intr_md._pad2', 'ig_intr_md._pad3', 'ig_intr_md.ingress_port']
-Preferred packing is [8, 16]
-
-Final ingress bridged metadata packing: 24 bits (3 bytes)
- -pad-0- / 7 bits
- ig_intr_md_for_tm.copy_to_cpu / 1 bits
- ig_intr_md.resubmit_flag / 1 bits
- ig_intr_md._pad1 / 1 bits
- ig_intr_md._pad2 / 2 bits
- ig_intr_md._pad3 / 3 bits
- ig_intr_md.ingress_port / 9 bits
-
-Final egress bridged metadata packing: 24 bits (3 bytes)
- -pad-0- / 7 bits
- ig_intr_md_for_tm.copy_to_cpu / 1 bits
- -pad-1- / 7 bits
- ig_intr_md.ingress_port / 9 bits
-
--------------------------------------------
-Allocating parsed header: pkt fields (7) / meta fields (0) using extraction bandwidth 224
--------------------------------------------
-Extracted bits: 24
-Set metadata bits: 0
-Gress: ingress
-bits_will_need_to_parse = 24
-unused_metadata_container_bits = 0
-min_parse_states = 1
-bits_per_state = 24
-Parse state 0 (24 bits)
- -pad-0- [6:0]
- ig_intr_md_for_tm.copy_to_cpu [0:0]
- ig_intr_md.resubmit_flag [0:0]
- ig_intr_md._pad1 [0:0]
- ig_intr_md._pad2 [1:0]
- ig_intr_md._pad3 [2:0]
- ig_intr_md.ingress_port [8:0]
-----------------------------------------------------------------------------------------------------
-| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-----------------------------------------------------------------------------------------------------
-| -pad-0- | 7 | True | - | - | - | None | 1 |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | False | - | - | - | 1 | 1 |
-| ig_intr_md.resubmit_flag | 1 | False | - | - | - | 1 | 1 |
-| ig_intr_md._pad1 | 1 | False | - | - | - | 1 | 1 |
-| ig_intr_md._pad2 | 2 | False | - | - | - | 1 | 1 |
-| ig_intr_md._pad3 | 3 | False | - | - | - | 1 | 1 |
-| ig_intr_md.ingress_port | 9 | False | - | - | - | 2 | 1 |
-----------------------------------------------------------------------------------------------------
-
-Packing options: 5
-MAU containers available:
- 8-bit: 48
- 16-bit: 80
- 32-bit: 47
-Tagalong containers available:
- 8-bit: 32
- 16-bit: 48
- 32-bit: 32
-Initial packing options: 5
-
-Packing option 0: [8, 16]
-MAU containers after:
- 8-bit: 47
- 16-bit: 79
- 32-bit: 47
-+----------------------------------------+
-| -pad-0- [6:0] |
-| ig_intr_md_for_tm.copy_to_cpu [0:0] |
-+----------------------------------------+
-| ig_intr_md.resubmit_flag [0:0] |
-| ig_intr_md._pad1 [0:0] |
-| ig_intr_md._pad2 [1:0] |
-| ig_intr_md._pad3 [2:0] |
-| ig_intr_md.ingress_port [8:0] |
-+----------------------------------------+
-
-Looking at -pad-0- (ingress) [6:0], with test_alloc = False
-Looking at ig_intr_md_for_tm.copy_to_cpu (ingress) [0:0], with test_alloc = True
-----> ig_intr_md_for_tm.copy_to_cpu (ingress) is allocated? False
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 3
- Group 4 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv64
- Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
- Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
-***Allocating phv64[7:1] for -pad-0-[6:0]
-***Allocating phv64[0:0] for ig_intr_md_for_tm.copy_to_cpu[0:0]
-Looking at ig_intr_md.resubmit_flag (ingress) [0:0], with test_alloc = True
-----> ig_intr_md.resubmit_flag (ingress) is allocated? False
-Looking at ig_intr_md._pad1 (ingress) [0:0], with test_alloc = True
-Looking at ig_intr_md._pad2 (ingress) [1:0], with test_alloc = True
-Looking at ig_intr_md._pad3 (ingress) [2:0], with test_alloc = True
-Looking at ig_intr_md.ingress_port (ingress) [8:0], with test_alloc = True
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 5
- Group 8 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv128
- Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv160
- Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv176
- Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv192
- Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
-***Allocating phv128[15:15] for ig_intr_md.resubmit_flag[0:0]
-***Allocating phv128[14:14] for ig_intr_md._pad1[0:0]
-***Allocating phv128[13:12] for ig_intr_md._pad2[1:0]
-***Allocating phv128[11:9] for ig_intr_md._pad3[2:0]
-***Allocating phv128[8:0] for ig_intr_md.ingress_port[8:0]
-Packing options tried: 1
-Packing options skipped: 0
-
-
--------------------------------------------
-Allocating parsed header: pkt fields (4) / meta fields (0) using extraction bandwidth 224
--------------------------------------------
-Extracted bits: 24
-Set metadata bits: 0
-Gress: egress
-bits_will_need_to_parse = 24
-unused_metadata_container_bits = 0
-min_parse_states = 1
-bits_per_state = 24
-Parse state 0 (24 bits)
- -pad-0- [6:0]
- ig_intr_md_for_tm.copy_to_cpu [0:0]
- -pad-1- [6:0]
- ig_intr_md.ingress_port [8:0]
-----------------------------------------------------------------------------------------------------
-| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-----------------------------------------------------------------------------------------------------
-| -pad-0- | 7 | True | - | - | - | None | 1 |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | False | - | - | - | None | 1 |
-| -pad-1- | 7 | True | - | - | - | None | 1 |
-| ig_intr_md.ingress_port | 9 | False | - | - | [32] | None | 2 |
-----------------------------------------------------------------------------------------------------
-
-Packing options: 5
-MAU containers available:
- 8-bit: 48
- 16-bit: 80
- 32-bit: 48
-Tagalong containers available:
- 8-bit: 32
- 16-bit: 48
- 32-bit: 32
-Initial packing options: 5
-
-Packing option 0: [8, 16]
-MAU containers after:
- 8-bit: 47
- 16-bit: 78
- 32-bit: 48
-+----------------------------------------+
-| -pad-0- [6:0] |
-| ig_intr_md_for_tm.copy_to_cpu [0:0] |
-+----------------------------------------+
-| -pad-1- [6:0] |
-| ig_intr_md.ingress_port [8:0] |
-+----------------------------------------+
-
-Looking at -pad-0- (egress) [6:0], with test_alloc = False
-Looking at ig_intr_md_for_tm.copy_to_cpu (egress) [0:0], with test_alloc = True
-----> ig_intr_md_for_tm.copy_to_cpu (egress) is allocated? False
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 3
- Group 5 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv80
- Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv96
- Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv112
-***Allocating phv80[7:1] for -pad-0-[6:0]
-***Allocating phv80[0:0] for ig_intr_md_for_tm.copy_to_cpu[0:0]
-Looking at -pad-1- (egress) [6:0], with test_alloc = False
-Looking at ig_intr_md.ingress_port (egress) [8:0], with test_alloc = True
-----> ig_intr_md.ingress_port (egress) is allocated? False
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 5
- Group 9 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv144
- Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv160
- Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv176
- Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv192
- Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv208
-***Allocating phv144[15:9] for -pad-1-[6:0]
-***Allocating phv144[8:0] for ig_intr_md.ingress_port[8:0]
-Packing options tried: 1
-Packing options skipped: 0
-
+ No bridged metadata field instances required
After allocating bridged metadata:
Allocation state: Final Allocation
@@ -1125,19 +890,19 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 1 (1.56%) | 32 (1.56%) | 2048 |
| | | | |
-| 4 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
-| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 4 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 5 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 2 (3.12%) | 16 (3.12%) | 512 |
+| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 512 |
| | | | |
-| 8 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
-| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 8 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 9 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 2 (2.08%) | 32 (2.08%) | 1536 |
+| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 1536 |
| | | | |
| 14 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
@@ -1152,13 +917,13 @@
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 768 |
| | | | |
-| MAU total | 5 (2.23%) | 80 (1.95%) | 4096 |
+| MAU total | 1 (0.45%) | 32 (0.78%) | 4096 |
| Tagalong total | 0 (0.00%) | 0 (0.00%) | 2048 |
-| Overall total | 5 (1.49%) | 80 (1.30%) | 6144 |
+| Overall total | 1 (0.30%) | 32 (0.52%) | 6144 |
---------------------------------------------------------------------------
->>Event 'pa_phase0' at time 1504792615.96
- Took 0.41 seconds
+>>Event 'pa_phase0' at time 1504859072.92
+ Took 0.00 seconds
-----------------------------------------------
Allocating Phase 0-related metadata
@@ -1178,19 +943,19 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 1 (1.56%) | 32 (1.56%) | 2048 |
| | | | |
-| 4 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
-| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 4 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 5 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 2 (3.12%) | 16 (3.12%) | 512 |
+| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 512 |
| | | | |
-| 8 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
-| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 8 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 9 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 2 (2.08%) | 32 (2.08%) | 1536 |
+| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 1536 |
| | | | |
| 14 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
@@ -1205,12 +970,12 @@
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 768 |
| | | | |
-| MAU total | 5 (2.23%) | 80 (1.95%) | 4096 |
+| MAU total | 1 (0.45%) | 32 (0.78%) | 4096 |
| Tagalong total | 0 (0.00%) | 0 (0.00%) | 2048 |
-| Overall total | 5 (1.49%) | 80 (1.30%) | 6144 |
+| Overall total | 1 (0.30%) | 32 (0.52%) | 6144 |
---------------------------------------------------------------------------
->>Event 'pa_critical' at time 1504792615.96
+>>Event 'pa_critical' at time 1504859072.92
Took 0.00 seconds
-----------------------------------------------
@@ -1219,6 +984,7 @@
Allocation Step
All Sorted parse nodes:
+ ingress_intrinsic_metadata (ingress) with bits = 16 and max = 2
parse_pkt_out (ingress) with bits = 16 and max = 2
parse_ipv4 (ingress) with bits = 160 and max = 1
parse_tcp (ingress) with bits = 160 and max = 1
@@ -1227,7 +993,6 @@
parse_ethernet (ingress) with bits = 112 and max = 1
parse_ethernet (egress) with bits = 112 and max = 1
egress_intrinsic_metadata (egress) with bits = 24 and max = 1
- ingress_intrinsic_metadata (ingress) with bits = 16 and max = 1
parse_pkt_out (egress) with bits = 16 and max = 1
start () with bits = 0 and max = 0
default_parser () with bits = 0 and max = 0
@@ -1239,6 +1004,85 @@
Total packet bits: 936
Total meta bits: 0
Total bits: 936
+Working on parse node ingress_intrinsic_metadata (9) (ingress)
+
+-------------------------------------------
+Allocating parsed header: pkt fields (5) / meta fields (0) using extraction bandwidth 224
+-------------------------------------------
+Extracted bits: 16
+Set metadata bits: 0
+Gress: ingress
+bits_will_need_to_parse = 16
+unused_metadata_container_bits = 0
+min_parse_states = 1
+bits_per_state = 16
+Parse state 0 (16 bits)
+ ig_intr_md.resubmit_flag [0:0]
+ ig_intr_md._pad1 [0:0]
+ ig_intr_md._pad2 [1:0]
+ ig_intr_md._pad3 [2:0]
+ ig_intr_md.ingress_port [8:0]
+-----------------------------------------------------------------------------------------------
+| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
+-----------------------------------------------------------------------------------------------
+| ig_intr_md.resubmit_flag | 1 | False | - | - | - | 1 | 1 |
+| ig_intr_md._pad1 | 1 | False | - | - | - | 1 | 1 |
+| ig_intr_md._pad2 | 2 | False | - | - | - | 1 | 1 |
+| ig_intr_md._pad3 | 3 | False | - | - | - | 1 | 1 |
+| ig_intr_md.ingress_port | 9 | False | - | - | [32] | 2 | 2 |
+-----------------------------------------------------------------------------------------------
+
+min_extracts[8] = 1
+min_extracts[16] = 1
+min_extracts[32] = 1
+Packing options: 2
+MAU containers available:
+ 8-bit: 48
+ 16-bit: 80
+ 32-bit: 47
+Tagalong containers available:
+ 8-bit: 32
+ 16-bit: 48
+ 32-bit: 32
+Initial packing options: 2
+
+Packing option 0: [16]
+MAU containers after:
+ 8-bit: 48
+ 16-bit: 78
+ 32-bit: 47
++-----------------------------------+
+| ig_intr_md.resubmit_flag [0:0] |
+| ig_intr_md._pad1 [0:0] |
+| ig_intr_md._pad2 [1:0] |
+| ig_intr_md._pad3 [2:0] |
+| ig_intr_md.ingress_port [8:0] |
++-----------------------------------+
+
+Looking at ig_intr_md.resubmit_flag (ingress) [0:0], with test_alloc = True
+----> ig_intr_md.resubmit_flag (ingress) is allocated? False
+Looking at ig_intr_md._pad1 (ingress) [0:0], with test_alloc = True
+Looking at ig_intr_md._pad2 (ingress) [1:0], with test_alloc = True
+Looking at ig_intr_md._pad3 (ingress) [2:0], with test_alloc = True
+Looking at ig_intr_md.ingress_port (ingress) [8:0], with test_alloc = True
+Checking if can overlay metadata field.
+No required PHV group.
+Could not find container to overlay in.
+
+MAU groups: 5
+ Group 8 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv128
+ Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv160
+ Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv176
+ Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv192
+ Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
+***Allocating phv128[15:15] for ig_intr_md.resubmit_flag[0:0]
+***Allocating phv128[14:14] for ig_intr_md._pad1[0:0]
+***Allocating phv128[13:12] for ig_intr_md._pad2[1:0]
+***Allocating phv128[11:9] for ig_intr_md._pad3[2:0]
+***Allocating phv128[8:0] for ig_intr_md.ingress_port[8:0]
+Packing options tried: 1
+Packing options skipped: 0
+
Working on parse node parse_pkt_out (4) (ingress)
-------------------------------------------
@@ -1266,8 +1110,8 @@
min_extracts[32] = 1
Packing options: 2
MAU containers available:
- 8-bit: 47
- 16-bit: 79
+ 8-bit: 48
+ 16-bit: 78
32-bit: 47
Tagalong containers available:
8-bit: 32
@@ -1277,8 +1121,8 @@
Packing option 0: [16]
MAU containers after:
- 8-bit: 47
- 16-bit: 77
+ 8-bit: 48
+ 16-bit: 76
32-bit: 47
+-------------------------------------+
| packet_out_hdr.egress_port [8:0] |
@@ -1347,7 +1191,7 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 47
+ 8-bit: 48
16-bit: 77
32-bit: 47
Tagalong containers available:
@@ -1358,7 +1202,7 @@
Packing option 0: [8, 8, 16, 16, 16, 32, 32, 32]
MAU containers after:
- 8-bit: 47
+ 8-bit: 48
16-bit: 77
32-bit: 47
+------------------------------+
@@ -1463,7 +1307,7 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 47
+ 8-bit: 48
16-bit: 77
32-bit: 47
Tagalong containers available:
@@ -1472,9 +1316,9 @@
32-bit: 29
Initial packing options: 5196
-Packing option 0: [8, 8, 16, 16, 16, 32, 32, 32]
+Packing option 0: [8, 8, 8, 8, 16, 16, 16, 16, 32, 32]
MAU containers after:
- 8-bit: 47
+ 8-bit: 48
16-bit: 77
32-bit: 47
+-------------------------+
@@ -1482,13 +1326,17 @@
+-------------------------+
| tcp.srcPort [7:0] |
+-------------------------+
-| tcp.dstPort [15:0] |
+| tcp.dstPort [15:8] |
++-------------------------+
+| tcp.dstPort [7:0] |
+-------------------------+
| tcp.seqNo [31:16] |
+-------------------------+
| tcp.seqNo [15:0] |
+-------------------------+
-| tcp.ackNo [31:0] |
+| tcp.ackNo [31:16] |
++-------------------------+
+| tcp.ackNo [15:0] |
+-------------------------+
| tcp.dataOffset [3:0] |
| tcp.res [2:0] |
@@ -1506,34 +1354,40 @@
Looking at tcp.srcPort (ingress) [7:0], with test_alloc = True
----> tcp.srcPort (ingress) is allocated? False
***Allocating phv291[7:0] for tcp.srcPort[7:0]
-Looking at tcp.dstPort (ingress) [15:0], with test_alloc = True
+Looking at tcp.dstPort (ingress) [15:8], with test_alloc = True
----> tcp.dstPort (ingress) is allocated? False
-***Allocating phv323[15:0] for tcp.dstPort[15:0]
+***Allocating phv292[7:0] for tcp.dstPort[15:8]
+Looking at tcp.dstPort (ingress) [7:0], with test_alloc = True
+----> tcp.dstPort (ingress) is allocated? False
+***Allocating phv293[7:0] for tcp.dstPort[7:0]
Looking at tcp.seqNo (ingress) [31:16], with test_alloc = True
----> tcp.seqNo (ingress) is allocated? False
-***Allocating phv324[15:0] for tcp.seqNo[31:16]
+***Allocating phv323[15:0] for tcp.seqNo[31:16]
Looking at tcp.seqNo (ingress) [15:0], with test_alloc = True
----> tcp.seqNo (ingress) is allocated? False
-***Allocating phv325[15:0] for tcp.seqNo[15:0]
-Looking at tcp.ackNo (ingress) [31:0], with test_alloc = True
+***Allocating phv324[15:0] for tcp.seqNo[15:0]
+Looking at tcp.ackNo (ingress) [31:16], with test_alloc = True
----> tcp.ackNo (ingress) is allocated? False
-***Allocating phv259[31:0] for tcp.ackNo[31:0]
+***Allocating phv325[15:0] for tcp.ackNo[31:16]
+Looking at tcp.ackNo (ingress) [15:0], with test_alloc = True
+----> tcp.ackNo (ingress) is allocated? False
+***Allocating phv326[15:0] for tcp.ackNo[15:0]
Looking at tcp.dataOffset (ingress) [3:0], with test_alloc = True
----> tcp.dataOffset (ingress) is allocated? False
Looking at tcp.res (ingress) [2:0], with test_alloc = True
Looking at tcp.ecn (ingress) [2:0], with test_alloc = True
Looking at tcp.ctrl (ingress) [5:0], with test_alloc = True
Looking at tcp.window (ingress) [15:0], with test_alloc = True
-***Allocating phv260[31:28] for tcp.dataOffset[3:0]
-***Allocating phv260[27:25] for tcp.res[2:0]
-***Allocating phv260[24:22] for tcp.ecn[2:0]
-***Allocating phv260[21:16] for tcp.ctrl[5:0]
-***Allocating phv260[15:0] for tcp.window[15:0]
+***Allocating phv259[31:28] for tcp.dataOffset[3:0]
+***Allocating phv259[27:25] for tcp.res[2:0]
+***Allocating phv259[24:22] for tcp.ecn[2:0]
+***Allocating phv259[21:16] for tcp.ctrl[5:0]
+***Allocating phv259[15:0] for tcp.window[15:0]
Looking at tcp.checksum (ingress) [15:0], with test_alloc = True
----> tcp.checksum (ingress) is allocated? False
Looking at tcp.urgentPtr (ingress) [15:0], with test_alloc = True
-***Allocating phv261[31:16] for tcp.checksum[15:0]
-***Allocating phv261[15:0] for tcp.urgentPtr[15:0]
+***Allocating phv260[31:16] for tcp.checksum[15:0]
+***Allocating phv260[15:0] for tcp.urgentPtr[15:0]
Packing options tried: 1
Packing options skipped: 0
@@ -1584,8 +1438,8 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
8-bit: 24
@@ -1595,8 +1449,8 @@
Packing option 0: [8, 8, 16, 16, 16, 32, 32, 32]
MAU containers after:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
+------------------------------+
| ipv4.version [3:0] |
@@ -1700,8 +1554,8 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
8-bit: 22
@@ -1711,8 +1565,8 @@
Packing option 0: [8, 8, 16, 16, 16, 32, 32, 32]
MAU containers after:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
+-------------------------+
| tcp.srcPort [15:8] |
@@ -1803,18 +1657,18 @@
min_extracts[32] = 1
Packing options: 604
MAU containers available:
- 8-bit: 47
+ 8-bit: 48
16-bit: 77
32-bit: 47
Tagalong containers available:
- 8-bit: 20
- 16-bit: 30
- 32-bit: 18
+ 8-bit: 18
+ 16-bit: 29
+ 32-bit: 19
Initial packing options: 604
Packing option 0: [8, 32, 16, 8, 32, 16]
MAU containers after:
- 8-bit: 45
+ 8-bit: 46
16-bit: 75
32-bit: 45
+-----------------------------+
@@ -1836,10 +1690,10 @@
----> ethernet.dstAddr (ingress) is allocated? False
MAU groups: 3
- Group 4 8 bits -- avail 15 -- ingress avail 15 and remain 14 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv65
+ Group 4 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv64
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
-***Allocating phv65[7:0] for ethernet.dstAddr[47:40]
+***Allocating phv64[7:0] for ethernet.dstAddr[47:40]
Looking at ethernet.dstAddr (ingress) [39:8], with test_alloc = True
----> ethernet.dstAddr (ingress) is allocated? False
@@ -1864,10 +1718,10 @@
----> ethernet.srcAddr (ingress) is allocated? False
MAU groups: 3
- Group 4 8 bits -- avail 14 -- ingress avail 14 and remain 13 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv66
+ Group 4 8 bits -- avail 15 -- ingress avail 15 and remain 14 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv65
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
-***Allocating phv66[7:0] for ethernet.srcAddr[39:32]
+***Allocating phv65[7:0] for ethernet.srcAddr[39:32]
Looking at ethernet.srcAddr (ingress) [31:0], with test_alloc = True
----> ethernet.srcAddr (ingress) is allocated? False
@@ -1918,8 +1772,8 @@
min_extracts[32] = 1
Packing options: 604
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
8-bit: 20
@@ -1929,8 +1783,8 @@
Packing option 0: [8, 32, 16, 8, 32, 16]
MAU containers after:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
+-----------------------------+
| ethernet.dstAddr [47:40] |
@@ -2001,8 +1855,8 @@
min_extracts[32] = 1
Packing options: 3
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
8-bit: 18
@@ -2012,8 +1866,8 @@
Packing option 1: [16, 8]
MAU containers after:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
+---------------------------------+
| eg_intr_md._pad0 [6:0] |
@@ -2028,31 +1882,29 @@
Looking at eg_intr_md.egress_port (egress) [8:0], with test_alloc = True
Checking if can overlay metadata field.
No required PHV group.
- Group 9 16 bits -- deparsed True -- avail 15 and promised 2 -- ingress promised 0 and remain 0 and req 8 -- egress promised 2 and remain 13 and req 2 -- act like deparsed True -- container_to_use phv146 -- fails False
Could not find container to overlay in.
MAU groups: 5
- Group 9 16 bits -- avail 15 -- ingress avail 8 and remain 8 and promised 0 and req 0 -- egress avail 15 and remain 13 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv146
+ Group 9 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv144
Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv160
Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv176
Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv192
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv208
-***Allocating phv146[15:9] for eg_intr_md._pad0[6:0]
-***Allocating phv146[8:0] for eg_intr_md.egress_port[8:0]
+***Allocating phv144[15:9] for eg_intr_md._pad0[6:0]
+***Allocating phv144[8:0] for eg_intr_md.egress_port[8:0]
Looking at eg_intr_md._pad7 (egress) [4:0], with test_alloc = True
----> eg_intr_md._pad7 (egress) is allocated? False
Looking at eg_intr_md.egress_cos (egress) [2:0], with test_alloc = True
Checking if can overlay metadata field.
No required PHV group.
- Group 5 8 bits -- deparsed True -- avail 15 and promised 1 -- ingress promised 0 and remain 0 and req 8 -- egress promised 1 and remain 14 and req 1 -- act like deparsed True -- container_to_use phv81 -- fails False
Could not find container to overlay in.
MAU groups: 3
- Group 5 8 bits -- avail 15 -- ingress avail 8 and remain 8 and promised 0 and req 0 -- egress avail 15 and remain 14 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv81
+ Group 5 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv80
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv112
-***Allocating phv81[7:3] for eg_intr_md._pad7[4:0]
-***Allocating phv81[2:0] for eg_intr_md.egress_cos[2:0]
+***Allocating phv80[7:3] for eg_intr_md._pad7[4:0]
+***Allocating phv80[2:0] for eg_intr_md.egress_cos[2:0]
Packing options tried: 2
Packing options skipped: 0
Failure Reasons:
@@ -2065,86 +1917,6 @@
ContainerAlignment Constraint: eg_intr_md.egress_cos <3 bits egress parsed imeta> -- field_bit: 0 -- bits_list: [0, 1, 2, 3, 4, 5, 6, 7]
]
-Working on parse node ingress_intrinsic_metadata (9) (ingress)
-
--------------------------------------------
-Allocating parsed header: pkt fields (5) / meta fields (0) using extraction bandwidth 224
--------------------------------------------
-Extracted bits: 16
-Set metadata bits: 0
-Gress: ingress
-bits_will_need_to_parse = 16
-unused_metadata_container_bits = 0
-min_parse_states = 1
-bits_per_state = 16
-Already allocated? ig_intr_md.resubmit_flag (ingress)
-Already allocated? ig_intr_md._pad1 (ingress)
-Already allocated? ig_intr_md._pad2 (ingress)
-Already allocated? ig_intr_md._pad3 (ingress)
-Already allocated? ig_intr_md.ingress_port (ingress)
-Already allocated? ig_intr_md.ingress_port (ingress)
-Parse state 0 (16 bits)
- ig_intr_md.resubmit_flag [0:0]
- ig_intr_md._pad1 [0:0]
- ig_intr_md._pad2 [1:0]
- ig_intr_md._pad3 [2:0]
- ig_intr_md.ingress_port [8:0]
------------------------------------------------------------------------------------------------------
-| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
------------------------------------------------------------------------------------------------------
-| ig_intr_md.resubmit_flag | 1 | False | [(16, 1)] | - | - | 1 | 1 |
-| ig_intr_md._pad1 | 1 | False | [(16, 1)] | - | - | 1 | 1 |
-| ig_intr_md._pad2 | 2 | False | [(16, 2)] | - | - | 1 | 1 |
-| ig_intr_md._pad3 | 3 | False | [(16, 3)] | - | - | 1 | 1 |
-| ig_intr_md.ingress_port | 9 | False | [(16, 9)] | - | - | 2 | 1 |
------------------------------------------------------------------------------------------------------
-
-min_extracts[8] = 1
-min_extracts[16] = 6
-min_extracts[32] = 1
-Packing options: 2
-MAU containers available:
- 8-bit: 45
- 16-bit: 75
- 32-bit: 45
-Tagalong containers available:
- 8-bit: 20
- 16-bit: 30
- 32-bit: 18
-Initial packing options: 2
-
-Packing option 0: [16]
-MAU containers after:
- 8-bit: 45
- 16-bit: 75
- 32-bit: 45
-+-----------------------------------+
-| ig_intr_md.resubmit_flag [0:0] |
-| ig_intr_md._pad1 [0:0] |
-| ig_intr_md._pad2 [1:0] |
-| ig_intr_md._pad3 [2:0] |
-| ig_intr_md.ingress_port [8:0] |
-+-----------------------------------+
-
-Looking at ig_intr_md.resubmit_flag (ingress) [0:0], with test_alloc = True
-----> ig_intr_md.resubmit_flag (ingress) is allocated? True
-Looking at ig_intr_md._pad1 (ingress) [0:0], with test_alloc = True
-----> ig_intr_md._pad1 (ingress) is allocated? True
-Looking at ig_intr_md._pad2 (ingress) [1:0], with test_alloc = True
-----> ig_intr_md._pad2 (ingress) is allocated? True
-Looking at ig_intr_md._pad3 (ingress) [2:0], with test_alloc = True
-----> ig_intr_md._pad3 (ingress) is allocated? True
-Looking at ig_intr_md.ingress_port (ingress) [8:0], with test_alloc = True
-----> ig_intr_md.ingress_port (ingress) is allocated? True
-Fields for container 16 at index 0 already allocated. No need to overlay or allocate new.
- ig_intr_md.resubmit_flag[0:0]
- ig_intr_md._pad1[0:0]
- ig_intr_md._pad2[1:0]
- ig_intr_md._pad3[2:0]
- ig_intr_md.ingress_port[8:0]
-Packing options tried: 1
-Packing options skipped: 0
-
Working on parse node parse_pkt_out (4) (egress)
-------------------------------------------
@@ -2172,8 +1944,8 @@
min_extracts[32] = 1
Packing options: 2
MAU containers available:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
Tagalong containers available:
8-bit: 18
@@ -2183,8 +1955,8 @@
Packing option 0: [16]
MAU containers after:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
+-------------------------------------+
| packet_out_hdr.egress_port [8:0] |
@@ -2209,50 +1981,50 @@
After allocating critical parse paths:
Allocation state: Final Allocation
-------------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
-------------------------------------------------------------------------------
-| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
-| | | | |
-| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 5 (7.81%) | 40 (7.81%) | 512 |
-| | | | |
-| 8 (16) | 4 (25.00%) | 64 (25.00%) | 256 |
-| 9 (16) | 2 (12.50%) | 32 (12.50%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 6 (6.25%) | 96 (6.25%) | 1536 |
-| | | | |
-| 14 (32) T | 14 (87.50%) | 448 (87.50%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 14 (43.75%) | 448 (43.75%) | 1024 |
-| | | | |
-| 16 (8) T | 10 (62.50%) | 80 (62.50%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 10 (31.25%) | 80 (31.25%) | 256 |
-| | | | |
-| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
-| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
-| | | | |
-| MAU total | 14 (6.25%) | 232 (5.66%) | 4096 |
-| Tagalong total | 39 (34.82%) | 768 (37.50%) | 2048 |
-| Overall total | 53 (15.77%) | 1000 (16.28%) | 6144 |
-------------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+-----------------------------------------------------------------------------
+| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
+| | | | |
+| 4 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 3 (4.69%) | 24 (4.69%) | 512 |
+| | | | |
+| 8 (16) | 4 (25.00%) | 64 (25.00%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 5 (5.21%) | 80 (5.21%) | 1536 |
+| | | | |
+| 14 (32) T | 13 (81.25%) | 416 (81.25%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 13 (40.62%) | 416 (40.62%) | 1024 |
+| | | | |
+| 16 (8) T | 12 (75.00%) | 96 (75.00%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 12 (37.50%) | 96 (37.50%) | 256 |
+| | | | |
+| 18 (16) T | 11 (68.75%) | 176 (68.75%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 16 (33.33%) | 256 (33.33%) | 768 |
+| | | | |
+| MAU total | 11 (4.91%) | 200 (4.88%) | 4096 |
+| Tagalong total | 41 (36.61%) | 768 (37.50%) | 2048 |
+| Overall total | 52 (15.48%) | 968 (15.76%) | 6144 |
+-----------------------------------------------------------------------------
->>Event 'pa_overlay' at time 1504792624.95
- Took 8.99 seconds
+>>Event 'pa_overlay' at time 1504859082.02
+ Took 9.10 seconds
-----------------------------------------------
Allocating remaining parsed fields
@@ -2260,21 +2032,21 @@
Allocation Step
All Sorted parse nodes (non-critical):
- parse_pkt_in (egress) with bits = 16 and max = 2
+ parse_pkt_in (ingress) with bits = 16 and max = 2
parse_udp (ingress) with bits = 64 and max = 1
parse_udp (egress) with bits = 64 and max = 1
- parse_pkt_in (ingress) with bits = 16 and max = 1
+ parse_pkt_in (egress) with bits = 16 and max = 1
Total packet bits: 160
Total meta bits: 0
Total bits: 160
-Working on parse node parse_pkt_in (2) (egress)
+Working on parse node parse_pkt_in (2) (ingress)
-------------------------------------------
Overlaying parsed header: pkt fields (2) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 16
Set metadata bits: 0
-Gress: egress
+Gress: ingress
bits_will_need_to_parse = 16
unused_metadata_container_bits = 0
min_parse_states = 1
@@ -2291,18 +2063,18 @@
MAU containers available:
8-bit: 46
- 16-bit: 77
- 32-bit: 48
+ 16-bit: 75
+ 32-bit: 45
Packing options: 2
Initial packing options: 2
Packing option 0: [16]
->>Can pack using [16] if open up 1 new containers.
-Packing options tried: 2
+>>Can pack using [16] if open up 0 new containers.
+Packing options tried: 1
Packing options skipped: 0
Trying to place using best packing [16]
-***Allocating phv145[15:7] for packet_in_hdr.ingress_port[8:0]
-***Allocating phv145[6:0] for packet_in_hdr._padding[6:0]
+***Allocating phv129[15:7] for packet_in_hdr.ingress_port[8:0]
+***Allocating phv129[6:0] for packet_in_hdr._padding[6:0]
Working on parse node parse_udp (8) (ingress)
-------------------------------------------
@@ -2330,7 +2102,7 @@
-----------------------------------------------------------------------------------
MAU containers available:
- 8-bit: 45
+ 8-bit: 46
16-bit: 75
32-bit: 45
Packing options: 47
@@ -2373,8 +2145,8 @@
-----------------------------------------------------------------------------------
MAU containers available:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
Packing options: 47
Initial packing options: 47
@@ -2389,14 +2161,14 @@
***Allocating phv336[15:0] for udp.dstPort[15:0]
***Allocating phv267[31:16] for udp.length_[15:0]
***Allocating phv267[15:0] for udp.checksum[15:0]
-Working on parse node parse_pkt_in (2) (ingress)
+Working on parse node parse_pkt_in (2) (egress)
-------------------------------------------
Overlaying parsed header: pkt fields (2) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 16
Set metadata bits: 0
-Gress: ingress
+Gress: egress
bits_will_need_to_parse = 16
unused_metadata_container_bits = 0
min_parse_states = 1
@@ -2412,9 +2184,9 @@
-------------------------------------------------------------------------------------------------
MAU containers available:
- 8-bit: 45
- 16-bit: 75
- 32-bit: 45
+ 8-bit: 47
+ 16-bit: 79
+ 32-bit: 48
Packing options: 2
Initial packing options: 2
@@ -2423,109 +2195,113 @@
Packing options tried: 1
Packing options skipped: 0
Trying to place using best packing [16]
-***Allocating phv129[15:7] for packet_in_hdr.ingress_port[8:0]
-***Allocating phv129[6:0] for packet_in_hdr._padding[6:0]
+***Allocating phv340[15:7] for packet_in_hdr.ingress_port[8:0]
+***Allocating phv340[6:0] for packet_in_hdr._padding[6:0]
After allocating remaining parse nodes:
Allocation state: Final Allocation
-------------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
-------------------------------------------------------------------------------
-| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
-| | | | |
-| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 5 (7.81%) | 40 (7.81%) | 512 |
-| | | | |
-| 8 (16) | 4 (25.00%) | 64 (25.00%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 7 (7.29%) | 112 (7.29%) | 1536 |
-| | | | |
-| 14 (32) T | 14 (87.50%) | 448 (87.50%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 14 (43.75%) | 448 (43.75%) | 1024 |
-| | | | |
-| 16 (8) T | 10 (62.50%) | 80 (62.50%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 10 (31.25%) | 80 (31.25%) | 256 |
-| | | | |
-| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
-| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
-| | | | |
-| MAU total | 15 (6.70%) | 248 (6.05%) | 4096 |
-| Tagalong total | 39 (34.82%) | 768 (37.50%) | 2048 |
-| Overall total | 54 (16.07%) | 1016 (16.54%) | 6144 |
-------------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+-----------------------------------------------------------------------------
+| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
+| | | | |
+| 4 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 3 (4.69%) | 24 (4.69%) | 512 |
+| | | | |
+| 8 (16) | 4 (25.00%) | 64 (25.00%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 5 (5.21%) | 80 (5.21%) | 1536 |
+| | | | |
+| 14 (32) T | 13 (81.25%) | 416 (81.25%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 13 (40.62%) | 416 (40.62%) | 1024 |
+| | | | |
+| 16 (8) T | 12 (75.00%) | 96 (75.00%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 12 (37.50%) | 96 (37.50%) | 256 |
+| | | | |
+| 18 (16) T | 11 (68.75%) | 176 (68.75%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 16 (33.33%) | 256 (33.33%) | 768 |
+| | | | |
+| MAU total | 11 (4.91%) | 200 (4.88%) | 4096 |
+| Tagalong total | 41 (36.61%) | 768 (37.50%) | 2048 |
+| Overall total | 52 (15.48%) | 968 (15.76%) | 6144 |
+-----------------------------------------------------------------------------
Difference in allocation between critical parse path and overlaying headers:
Allocation state: Diff
----------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
----------------------------------------------------------------------------
-| 0 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 0 (0.00%) | 0 (0.00%) | 2048 |
-| | | | |
-| 4 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 5 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 512 |
-| | | | |
-| 8 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 1 (1.04%) | 16 (1.04%) | 1536 |
-| | | | |
-| 14 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 0 (0.00%) | 0 (0.00%) | 1024 |
-| | | | |
-| 16 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 256 |
-| | | | |
-| 18 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 768 |
-| | | | |
-| MAU total | 1 (0.45%) | 16 (0.39%) | 4096 |
-| Tagalong total | 0 (0.00%) | 0 (0.00%) | 2048 |
-| Overall total | 1 (0.30%) | 16 (0.26%) | 6144 |
----------------------------------------------------------------------------
+--------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+--------------------------------------------------------------------------
+| 0 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 0 (0.00%) | 0 (0.00%) | 2048 |
+| | | | |
+| 4 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 5 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 512 |
+| | | | |
+| 8 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 9 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 1536 |
+| | | | |
+| 14 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 0 (0.00%) | 0 (0.00%) | 1024 |
+| | | | |
+| 16 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 256 |
+| | | | |
+| 18 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 768 |
+| | | | |
+| MAU total | 0 (0.00%) | 0 (0.00%) | 4096 |
+| Tagalong total | 0 (0.00%) | 0 (0.00%) | 2048 |
+| Overall total | 0 (0.00%) | 0 (0.00%) | 6144 |
+--------------------------------------------------------------------------
->>Event 'pa_meta1' at time 1504792625.46
- Took 0.51 seconds
+>>Event 'pa_meta1' at time 1504859082.54
+ Took 0.52 seconds
-----------------------------------------------
Allocating metadata (pass 1)
-----------------------------------------------
Allocation Step
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md.resubmit_flag (ingress) will require table injection to initialize.
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md._pad1 (ingress) will require table injection to initialize.
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md._pad2 (ingress) will require table injection to initialize.
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md._pad3 (ingress) will require table injection to initialize.
Total metadata field instances to allocate: 2 / 12 bits (12 ingress bits and 0 egress bits)
Promised metadata field instances to allocate: 1 / 9 bits (9 ingress bits and 0 egress bits)
- 0: ig_intr_md_for_tm.ucast_egress_port (ingress) (highly=0, mau_group_size=2, max_overlay=0, max_share=0, max_split=1, bit_width=9, initial_usage_read=3, earliest_use=0, latest_use=12)
+ 0: ig_intr_md_for_tm.ucast_egress_port (ingress) (highly=0, mau_group_size=2, max_overlay=0, max_share=0, max_split=1, bit_width=9, initial_usage_read=2, earliest_use=0, latest_use=12)
--------------
Working on:
@@ -2570,47 +2346,47 @@
***Allocating phv130[8:0] for ig_intr_md_for_tm.ucast_egress_port[8:0]
Allocation state after promised meta allocated:
Allocation state: Final Allocation
-------------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
-------------------------------------------------------------------------------
-| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
-| | | | |
-| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 5 (7.81%) | 40 (7.81%) | 512 |
-| | | | |
-| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 8 (8.33%) | 121 (7.88%) | 1536 |
-| | | | |
-| 14 (32) T | 14 (87.50%) | 448 (87.50%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 14 (43.75%) | 448 (43.75%) | 1024 |
-| | | | |
-| 16 (8) T | 10 (62.50%) | 80 (62.50%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 10 (31.25%) | 80 (31.25%) | 256 |
-| | | | |
-| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
-| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
-| | | | |
-| MAU total | 16 (7.14%) | 257 (6.27%) | 4096 |
-| Tagalong total | 39 (34.82%) | 768 (37.50%) | 2048 |
-| Overall total | 55 (16.37%) | 1025 (16.68%) | 6144 |
-------------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+-----------------------------------------------------------------------------
+| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
+| | | | |
+| 4 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 3 (4.69%) | 24 (4.69%) | 512 |
+| | | | |
+| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 6 (6.25%) | 89 (5.79%) | 1536 |
+| | | | |
+| 14 (32) T | 13 (81.25%) | 416 (81.25%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 13 (40.62%) | 416 (40.62%) | 1024 |
+| | | | |
+| 16 (8) T | 12 (75.00%) | 96 (75.00%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 12 (37.50%) | 96 (37.50%) | 256 |
+| | | | |
+| 18 (16) T | 11 (68.75%) | 176 (68.75%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 16 (33.33%) | 256 (33.33%) | 768 |
+| | | | |
+| MAU total | 12 (5.36%) | 209 (5.10%) | 4096 |
+| Tagalong total | 41 (36.61%) | 768 (37.50%) | 2048 |
+| Overall total | 53 (15.77%) | 977 (15.90%) | 6144 |
+-----------------------------------------------------------------------------
Allocation state difference after promised meta allocated:
Allocation state: Diff
@@ -2657,55 +2433,55 @@
--------------------------------------------------------------------------
Sorted metadata field instances to allocate: 0 / 0 bits (0 ingress bits and 0 egress bits)
->>Event 'pa_pov' at time 1504792625.51
- Took 0.05 seconds
+>>Event 'pa_pov' at time 1504859082.61
+ Took 0.07 seconds
-----------------------------------------------
Allocating POV
-----------------------------------------------
Allocation Step
Allocation state: Final Allocation
-------------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
-------------------------------------------------------------------------------
-| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
-| | | | |
-| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 5 (7.81%) | 40 (7.81%) | 512 |
-| | | | |
-| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 8 (8.33%) | 121 (7.88%) | 1536 |
-| | | | |
-| 14 (32) T | 14 (87.50%) | 448 (87.50%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 14 (43.75%) | 448 (43.75%) | 1024 |
-| | | | |
-| 16 (8) T | 10 (62.50%) | 80 (62.50%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 10 (31.25%) | 80 (31.25%) | 256 |
-| | | | |
-| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
-| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
-| | | | |
-| MAU total | 16 (7.14%) | 257 (6.27%) | 4096 |
-| Tagalong total | 39 (34.82%) | 768 (37.50%) | 2048 |
-| Overall total | 55 (16.37%) | 1025 (16.68%) | 6144 |
-------------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+-----------------------------------------------------------------------------
+| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
+| | | | |
+| 4 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 3 (4.69%) | 24 (4.69%) | 512 |
+| | | | |
+| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 6 (6.25%) | 89 (5.79%) | 1536 |
+| | | | |
+| 14 (32) T | 13 (81.25%) | 416 (81.25%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 13 (40.62%) | 416 (40.62%) | 1024 |
+| | | | |
+| 16 (8) T | 12 (75.00%) | 96 (75.00%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 12 (37.50%) | 96 (37.50%) | 256 |
+| | | | |
+| 18 (16) T | 11 (68.75%) | 176 (68.75%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 16 (33.33%) | 256 (33.33%) | 768 |
+| | | | |
+| MAU total | 12 (5.36%) | 209 (5.10%) | 4096 |
+| Tagalong total | 41 (36.61%) | 768 (37.50%) | 2048 |
+| Overall total | 53 (15.77%) | 977 (15.90%) | 6144 |
+-----------------------------------------------------------------------------
Sorted POV field instances to allocate (with best pack): 13
0: --validity_check--packet_in_hdr (ingress) -- max pov share 6 / best pack 5
@@ -2723,25 +2499,25 @@
12: --validity_check--udp (egress) -- max pov share 5 / best pack 4
Working on
---validity_check--packet_in_hdr <1 bits ingress parsed pov>
+--validity_check--packet_in_hdr <1 bits ingress parsed pov W>
Call to _allocate_pov_helper for:
--validity_check--packet_in_hdr (ingress)
Best pack group: (6)
Looking for container to share POV bit in from already allocated containers for POV.
-Container availability (not used yet for POV): total 197 / partial 1
+Container availability (not used yet for POV): total 198 / partial 1
Looking for container to share POV bit in from already allocated containers that have not been used for POV.
->>Choose container phv67, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 7).
+>>Choose container phv66, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 7).
>> Decided to allocate new container
-Required container phv67
-***Allocating phv67[0:0] for --validity_check--packet_in_hdr[0:0]
-***Allocating phv67[1:1] for --validity_check--packet_out_hdr[0:0]
-***Allocating phv67[2:2] for --validity_check--ethernet[0:0]
-***Allocating phv67[3:3] for --validity_check--ipv4[0:0]
-***Allocating phv67[4:4] for --validity_check--tcp[0:0]
-***Allocating phv67[5:5] for --validity_check--udp[0:0]
-***Allocating phv67[6:6] for --validity_check--metadata_bridge[0:0]
+Required container phv66
+***Allocating phv66[0:0] for --validity_check--packet_in_hdr[0:0]
+***Allocating phv66[1:1] for --validity_check--packet_out_hdr[0:0]
+***Allocating phv66[2:2] for --validity_check--ethernet[0:0]
+***Allocating phv66[3:3] for --validity_check--ipv4[0:0]
+***Allocating phv66[4:4] for --validity_check--tcp[0:0]
+***Allocating phv66[5:5] for --validity_check--udp[0:0]
+***Allocating phv66[6:6] for --validity_check--metadata_bridge[0:0]
Working on
--validity_check--packet_out_hdr <1 bits ingress parsed pov R W>
@@ -2768,24 +2544,24 @@
Already allocated.
Working on
---validity_check--packet_in_hdr <1 bits egress parsed pov W>
+--validity_check--packet_in_hdr <1 bits egress parsed pov>
Call to _allocate_pov_helper for:
--validity_check--packet_in_hdr (egress)
Best pack group: (5)
Looking for container to share POV bit in from already allocated containers for POV.
-Container availability (not used yet for POV): total 199 / partial 0
+Container availability (not used yet for POV): total 202 / partial 0
Looking for container to share POV bit in from already allocated containers that have not been used for POV.
->>Choose container phv82, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 6).
+>>Choose container phv81, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 6).
>> Decided to allocate new container
-Required container phv82
-***Allocating phv82[0:0] for --validity_check--packet_in_hdr[0:0]
-***Allocating phv82[1:1] for --validity_check--packet_out_hdr[0:0]
-***Allocating phv82[2:2] for --validity_check--ethernet[0:0]
-***Allocating phv82[3:3] for --validity_check--ipv4[0:0]
-***Allocating phv82[4:4] for --validity_check--tcp[0:0]
-***Allocating phv82[5:5] for --validity_check--udp[0:0]
+Required container phv81
+***Allocating phv81[0:0] for --validity_check--packet_in_hdr[0:0]
+***Allocating phv81[1:1] for --validity_check--packet_out_hdr[0:0]
+***Allocating phv81[2:2] for --validity_check--ethernet[0:0]
+***Allocating phv81[3:3] for --validity_check--ipv4[0:0]
+***Allocating phv81[4:4] for --validity_check--tcp[0:0]
+***Allocating phv81[5:5] for --validity_check--udp[0:0]
Working on
--validity_check--packet_out_hdr <1 bits egress parsed pov>
@@ -2809,12 +2585,12 @@
Sum of container bit widths POVs found in: 16
ingress
- phv67 (8 bits)
+ phv66 (8 bits)
>> 8 total bits
egress
- phv82 (8 bits)
+ phv81 (8 bits)
>> 8 total bits
->>Event 'pa_meta2' at time 1504792625.63
+>>Event 'pa_meta2' at time 1504859082.73
Took 0.12 seconds
-----------------------------------------------
@@ -2825,47 +2601,47 @@
Promised metadata field instances to allocate: 0 / 0 bits (0 ingress bits and 0 egress bits)
Allocation state after promised meta allocated:
Allocation state: Final Allocation
-------------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
-------------------------------------------------------------------------------
-| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
-| | | | |
-| 4 (8) | 4 (25.00%) | 31 (24.22%) | 128 |
-| 5 (8) | 3 (18.75%) | 22 (17.19%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 7 (10.94%) | 53 (10.35%) | 512 |
-| | | | |
-| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 8 (8.33%) | 121 (7.88%) | 1536 |
-| | | | |
-| 14 (32) T | 14 (87.50%) | 448 (87.50%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 14 (43.75%) | 448 (43.75%) | 1024 |
-| | | | |
-| 16 (8) T | 10 (62.50%) | 80 (62.50%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 10 (31.25%) | 80 (31.25%) | 256 |
-| | | | |
-| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
-| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
-| | | | |
-| MAU total | 18 (8.04%) | 270 (6.59%) | 4096 |
-| Tagalong total | 39 (34.82%) | 768 (37.50%) | 2048 |
-| Overall total | 57 (16.96%) | 1038 (16.89%) | 6144 |
-------------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+-----------------------------------------------------------------------------
+| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
+| | | | |
+| 4 (8) | 3 (18.75%) | 23 (17.97%) | 128 |
+| 5 (8) | 2 (12.50%) | 14 (10.94%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 5 (7.81%) | 37 (7.23%) | 512 |
+| | | | |
+| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 6 (6.25%) | 89 (5.79%) | 1536 |
+| | | | |
+| 14 (32) T | 13 (81.25%) | 416 (81.25%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 13 (40.62%) | 416 (40.62%) | 1024 |
+| | | | |
+| 16 (8) T | 12 (75.00%) | 96 (75.00%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 12 (37.50%) | 96 (37.50%) | 256 |
+| | | | |
+| 18 (16) T | 11 (68.75%) | 176 (68.75%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 16 (33.33%) | 256 (33.33%) | 768 |
+| | | | |
+| MAU total | 14 (6.25%) | 222 (5.42%) | 4096 |
+| Tagalong total | 41 (36.61%) | 768 (37.50%) | 2048 |
+| Overall total | 55 (16.37%) | 990 (16.11%) | 6144 |
+-----------------------------------------------------------------------------
Allocation state difference after promised meta allocated:
Allocation state: Diff
@@ -2912,7 +2688,7 @@
--------------------------------------------------------------------------
Sorted metadata field instances to allocate: 1 / 3 bits (3 ingress bits and 0 egress bits)
- 0: ig_intr_md_for_tm.drop_ctl (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=0, best_share_pack=0, max_split=1, bit_width=3, initial_usage_read=2, earliest_use=1, latest_use=12)
+ 0: ig_intr_md_for_tm.drop_ctl (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=0, best_share_pack=0, max_split=1, bit_width=3, initial_usage_read=2, earliest_use=0, latest_use=12)
---------------------------------------
Working on:
@@ -2939,12 +2715,12 @@
Group 1 32 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 2 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 12 and req 0 -- as if deparsed True -- container_to_use phv32 -- fails False
Group 3 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 12 and req 0 -- as if deparsed True -- container_to_use phv48 -- fails False
- Group 4 8 bits -- avail 12 and promised 1 -- ingress promised 1 and remain 11 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv68 -- fails False
- Group 5 8 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 4 8 bits -- avail 13 and promised 1 -- ingress promised 1 and remain 12 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv67 -- fails False
+ Group 5 8 bits -- avail 14 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 6 8 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv96 -- fails False
Group 7 8 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv112 -- fails False
Group 8 16 bits -- avail 11 and promised 1 -- ingress promised 1 and remain 10 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv133 -- fails False
- Group 9 16 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 9 16 bits -- avail 15 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 10 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv160 -- fails False
Group 11 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv176 -- fails False
Group 12 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv192 -- fails False
@@ -2956,9 +2732,9 @@
case 2: looking at allowed start bits [0, 1, 2, 3, 4, 5, 6, 7]
final start_bit = 5
(1) msb_offset = 8
-***Allocating phv68[7:5] for ig_intr_md_for_tm.drop_ctl[2:0]
->>Event 'pa_meta_init' at time 1504792625.69
- Took 0.07 seconds
+***Allocating phv67[7:5] for ig_intr_md_for_tm.drop_ctl[2:0]
+>>Event 'pa_meta_init' at time 1504859082.80
+ Took 0.06 seconds
-----------------------------------------------
Adding metadata initialization
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.results.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.results.log
index 3c197a0..2e8758a 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.results.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.results.log
@@ -1,53 +1,53 @@
+---------------------------------------------------------------------+
| Log file: pa.results.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
Program: default
Allocation state: Final Allocation
-------------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
-------------------------------------------------------------------------------
-| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
-| | | | |
-| 4 (8) | 5 (31.25%) | 34 (26.56%) | 128 |
-| 5 (8) | 3 (18.75%) | 22 (17.19%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 8 (12.50%) | 56 (10.94%) | 512 |
-| | | | |
-| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 8 (8.33%) | 121 (7.88%) | 1536 |
-| | | | |
-| 14 (32) T | 14 (87.50%) | 448 (87.50%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 14 (43.75%) | 448 (43.75%) | 1024 |
-| | | | |
-| 16 (8) T | 10 (62.50%) | 80 (62.50%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 10 (31.25%) | 80 (31.25%) | 256 |
-| | | | |
-| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
-| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
-| | | | |
-| MAU total | 19 (8.48%) | 273 (6.67%) | 4096 |
-| Tagalong total | 39 (34.82%) | 768 (37.50%) | 2048 |
-| Overall total | 58 (17.26%) | 1041 (16.94%) | 6144 |
-------------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+-----------------------------------------------------------------------------
+| 0 (32) | 3 (18.75%) | 96 (18.75%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 3 (4.69%) | 96 (4.69%) | 2048 |
+| | | | |
+| 4 (8) | 4 (25.00%) | 26 (20.31%) | 128 |
+| 5 (8) | 2 (12.50%) | 14 (10.94%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 6 (9.38%) | 40 (7.81%) | 512 |
+| | | | |
+| 8 (16) | 5 (31.25%) | 73 (28.52%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 6 (6.25%) | 89 (5.79%) | 1536 |
+| | | | |
+| 14 (32) T | 13 (81.25%) | 416 (81.25%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 13 (40.62%) | 416 (40.62%) | 1024 |
+| | | | |
+| 16 (8) T | 12 (75.00%) | 96 (75.00%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 12 (37.50%) | 96 (37.50%) | 256 |
+| | | | |
+| 18 (16) T | 11 (68.75%) | 176 (68.75%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 16 (33.33%) | 256 (33.33%) | 768 |
+| | | | |
+| MAU total | 15 (6.70%) | 225 (5.49%) | 4096 |
+| Tagalong total | 41 (36.61%) | 768 (37.50%) | 2048 |
+| Overall total | 56 (16.67%) | 993 (16.16%) | 6144 |
+-----------------------------------------------------------------------------
--------------------------------------------
PHV Allocation
@@ -60,41 +60,37 @@
>> 3 in ingress and 0 in egress
Allocations in Group 4 8 bits
- 8-bit PHV 64 (ingress): phv64[7:1] = -pad-0-[6:0] (tagalong capable)
- 8-bit PHV 64 (ingress): phv64[0:0] = ig_intr_md_for_tm.copy_to_cpu[0:0] (deparsed)
- 8-bit PHV 65 (ingress): phv65[7:0] = ethernet.dstAddr[47:40] (deparsed)
- 8-bit PHV 66 (ingress): phv66[7:0] = ethernet.srcAddr[39:32] (deparsed)
- 8-bit PHV 67 (ingress): phv67[6:6] = --validity_check--metadata_bridge[0:0] (deparsed)
- 8-bit PHV 67 (ingress): phv67[5:5] = --validity_check--udp[0:0] (deparsed)
- 8-bit PHV 67 (ingress): phv67[4:4] = --validity_check--tcp[0:0] (deparsed)
- 8-bit PHV 67 (ingress): phv67[3:3] = --validity_check--ipv4[0:0] (deparsed)
- 8-bit PHV 67 (ingress): phv67[2:2] = --validity_check--ethernet[0:0] (deparsed)
- 8-bit PHV 67 (ingress): phv67[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
- 8-bit PHV 67 (ingress): phv67[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
- 8-bit PHV 68 (ingress): phv68[7:5] = ig_intr_md_for_tm.drop_ctl[2:0] (deparsed)
- >> 5 in ingress and 0 in egress
+ 8-bit PHV 64 (ingress): phv64[7:0] = ethernet.dstAddr[47:40] (deparsed)
+ 8-bit PHV 65 (ingress): phv65[7:0] = ethernet.srcAddr[39:32] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[6:6] = --validity_check--metadata_bridge[0:0] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[5:5] = --validity_check--udp[0:0] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[4:4] = --validity_check--tcp[0:0] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[3:3] = --validity_check--ipv4[0:0] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[2:2] = --validity_check--ethernet[0:0] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[7:5] = ig_intr_md_for_tm.drop_ctl[2:0] (deparsed)
+ >> 4 in ingress and 0 in egress
Allocations in Group 5 8 bits
- 8-bit PHV 80 (egress): phv80[7:1] = -pad-0-[6:0] (tagalong capable)
- 8-bit PHV 80 (egress): phv80[0:0] = ig_intr_md_for_tm.copy_to_cpu[0:0] (deparsed)
- 8-bit PHV 81 (egress): phv81[7:3] = eg_intr_md._pad7[4:0]
- 8-bit PHV 81 (egress): phv81[2:0] = eg_intr_md.egress_cos[2:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[5:5] = --validity_check--udp[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[4:4] = --validity_check--tcp[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[3:3] = --validity_check--ipv4[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[2:2] = --validity_check--ethernet[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
- >> 0 in ingress and 3 in egress
+ 8-bit PHV 80 (egress): phv80[7:3] = eg_intr_md._pad7[4:0]
+ 8-bit PHV 80 (egress): phv80[2:0] = eg_intr_md.egress_cos[2:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[5:5] = --validity_check--udp[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[4:4] = --validity_check--tcp[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[3:3] = --validity_check--ipv4[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[2:2] = --validity_check--ethernet[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
+ >> 0 in ingress and 2 in egress
Allocations in Group 8 16 bits
- 16-bit PHV 128 (ingress): phv128[15:15] = ig_intr_md.resubmit_flag[0:0] (deparsed)
- 16-bit PHV 128 (ingress): phv128[14:14] = ig_intr_md._pad1[0:0] (deparsed)
- 16-bit PHV 128 (ingress): phv128[13:12] = ig_intr_md._pad2[1:0] (deparsed)
- 16-bit PHV 128 (ingress): phv128[11:9] = ig_intr_md._pad3[2:0] (deparsed)
+ 16-bit PHV 128 (ingress): phv128[15:15] = ig_intr_md.resubmit_flag[0:0]
+ 16-bit PHV 128 (ingress): phv128[14:14] = ig_intr_md._pad1[0:0]
+ 16-bit PHV 128 (ingress): phv128[13:12] = ig_intr_md._pad2[1:0]
+ 16-bit PHV 128 (ingress): phv128[11:9] = ig_intr_md._pad3[2:0]
16-bit PHV 128 (ingress): phv128[8:0] = ig_intr_md.ingress_port[8:0] (deparsed)
16-bit PHV 129 (ingress): phv129[15:7] = packet_out_hdr.egress_port[8:0] (deparsed)
- 16-bit PHV 129 (ingress): phv129[15:7] = packet_in_hdr.ingress_port[8:0] (tagalong capable) (deparsed)
+ 16-bit PHV 129 (ingress): phv129[15:7] = packet_in_hdr.ingress_port[8:0] (deparsed)
16-bit PHV 129 (ingress): phv129[6:0] = packet_out_hdr._padding[6:0] (tagalong capable) (deparsed)
16-bit PHV 129 (ingress): phv129[6:0] = packet_in_hdr._padding[6:0] (tagalong capable) (deparsed)
16-bit PHV 130 (ingress): phv130[8:0] = ig_intr_md_for_tm.ucast_egress_port[8:0] (deparsed)
@@ -104,13 +100,9 @@
>> 5 in ingress and 0 in egress
Allocations in Group 9 16 bits
- 16-bit PHV 144 (egress): phv144[15:9] = -pad-1-[6:0] (tagalong capable)
- 16-bit PHV 144 (egress): phv144[8:0] = ig_intr_md.ingress_port[8:0] (deparsed)
- 16-bit PHV 145 (egress): phv145[15:7] = packet_in_hdr.ingress_port[8:0] (deparsed)
- 16-bit PHV 145 (egress): phv145[6:0] = packet_in_hdr._padding[6:0] (tagalong capable) (deparsed)
- 16-bit PHV 146 (egress): phv146[15:9] = eg_intr_md._pad0[6:0]
- 16-bit PHV 146 (egress): phv146[8:0] = eg_intr_md.egress_port[8:0] (deparsed)
- >> 0 in ingress and 3 in egress
+ 16-bit PHV 144 (egress): phv144[15:9] = eg_intr_md._pad0[6:0]
+ 16-bit PHV 144 (egress): phv144[8:0] = eg_intr_md.egress_port[8:0] (deparsed)
+ >> 0 in ingress and 1 in egress
Allocations in Group 14 32 bits (tagalong)
32-bit PHV 256 (ingress): phv256[31:24] = ipv4.ttl[7:0] (tagalong capable) (deparsed)
@@ -118,16 +110,15 @@
32-bit PHV 256 (ingress): phv256[15:0] = ipv4.hdrChecksum[15:0] (tagalong capable) (deparsed)
32-bit PHV 257 (ingress): phv257[31:0] = ipv4.srcAddr[31:0] (tagalong capable) (deparsed)
32-bit PHV 258 (ingress): phv258[31:0] = ipv4.dstAddr[31:0] (tagalong capable) (deparsed)
- 32-bit PHV 259 (ingress): phv259[31:0] = tcp.ackNo[31:0] (tagalong capable) (deparsed)
+ 32-bit PHV 259 (ingress): phv259[31:28] = tcp.dataOffset[3:0] (tagalong capable) (deparsed)
32-bit PHV 259 (ingress): phv259[31:16] = udp.length_[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 259 (ingress): phv259[27:25] = tcp.res[2:0] (tagalong capable) (deparsed)
+ 32-bit PHV 259 (ingress): phv259[24:22] = tcp.ecn[2:0] (tagalong capable) (deparsed)
+ 32-bit PHV 259 (ingress): phv259[21:16] = tcp.ctrl[5:0] (tagalong capable) (deparsed)
+ 32-bit PHV 259 (ingress): phv259[15:0] = tcp.window[15:0] (tagalong capable) (deparsed)
32-bit PHV 259 (ingress): phv259[15:0] = udp.checksum[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (ingress): phv260[31:28] = tcp.dataOffset[3:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (ingress): phv260[27:25] = tcp.res[2:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (ingress): phv260[24:22] = tcp.ecn[2:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (ingress): phv260[21:16] = tcp.ctrl[5:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (ingress): phv260[15:0] = tcp.window[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 261 (ingress): phv261[31:16] = tcp.checksum[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 261 (ingress): phv261[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 260 (ingress): phv260[31:16] = tcp.checksum[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 260 (ingress): phv260[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed)
32-bit PHV 264 (egress): phv264[31:24] = ipv4.ttl[7:0] (tagalong capable) (deparsed)
32-bit PHV 264 (egress): phv264[23:16] = ipv4.protocol[7:0] (tagalong capable) (deparsed)
32-bit PHV 264 (egress): phv264[15:0] = ipv4.hdrChecksum[15:0] (tagalong capable) (deparsed)
@@ -145,7 +136,7 @@
32-bit PHV 269 (egress): phv269[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed)
32-bit PHV 270 (egress): phv270[31:0] = ethernet.dstAddr[39:8] (tagalong capable) (deparsed)
32-bit PHV 271 (egress): phv271[31:0] = ethernet.srcAddr[31:0] (tagalong capable) (deparsed)
- >> 6 in ingress and 8 in egress
+ >> 5 in ingress and 8 in egress
Allocations in Group 16 8 bits (tagalong)
8-bit PHV 288 (ingress): phv288[7:4] = ipv4.version[3:0] (tagalong capable) (deparsed)
@@ -155,6 +146,8 @@
8-bit PHV 290 (ingress): phv290[7:0] = udp.srcPort[15:8] (tagalong capable) (deparsed)
8-bit PHV 291 (ingress): phv291[7:0] = tcp.srcPort[7:0] (tagalong capable) (deparsed)
8-bit PHV 291 (ingress): phv291[7:0] = udp.srcPort[7:0] (tagalong capable) (deparsed)
+ 8-bit PHV 292 (ingress): phv292[7:0] = tcp.dstPort[15:8] (tagalong capable) (deparsed)
+ 8-bit PHV 293 (ingress): phv293[7:0] = tcp.dstPort[7:0] (tagalong capable) (deparsed)
8-bit PHV 296 (egress): phv296[7:4] = ipv4.version[3:0] (tagalong capable) (deparsed)
8-bit PHV 296 (egress): phv296[3:0] = ipv4.ihl[3:0] (tagalong capable) (deparsed)
8-bit PHV 297 (egress): phv297[7:0] = ipv4.diffserv[7:0] (tagalong capable) (deparsed)
@@ -164,23 +157,24 @@
8-bit PHV 299 (egress): phv299[7:0] = udp.srcPort[7:0] (tagalong capable) (deparsed)
8-bit PHV 300 (egress): phv300[7:0] = ethernet.dstAddr[47:40] (tagalong capable) (deparsed)
8-bit PHV 301 (egress): phv301[7:0] = ethernet.srcAddr[39:32] (tagalong capable) (deparsed)
- >> 4 in ingress and 6 in egress
+ >> 6 in ingress and 6 in egress
Allocations in Group 18 16 bits (tagalong)
16-bit PHV 320 (ingress): phv320[15:0] = ipv4.totalLen[15:0] (tagalong capable) (deparsed)
16-bit PHV 321 (ingress): phv321[15:0] = ipv4.identification[15:0] (tagalong capable) (deparsed)
16-bit PHV 322 (ingress): phv322[15:13] = ipv4.flags[2:0] (tagalong capable) (deparsed)
16-bit PHV 322 (ingress): phv322[12:0] = ipv4.fragOffset[12:0] (tagalong capable) (deparsed)
- 16-bit PHV 323 (ingress): phv323[15:0] = tcp.dstPort[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 323 (ingress): phv323[15:0] = tcp.seqNo[31:16] (tagalong capable) (deparsed)
16-bit PHV 323 (ingress): phv323[15:0] = udp.dstPort[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 324 (ingress): phv324[15:0] = tcp.seqNo[31:16] (tagalong capable) (deparsed)
- 16-bit PHV 325 (ingress): phv325[15:0] = tcp.seqNo[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 324 (ingress): phv324[15:0] = tcp.seqNo[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 325 (ingress): phv325[15:0] = tcp.ackNo[31:16] (tagalong capable) (deparsed)
+ 16-bit PHV 326 (ingress): phv326[15:0] = tcp.ackNo[15:0] (tagalong capable) (deparsed)
16-bit PHV 332 (egress): phv332[15:0] = ipv4.totalLen[15:0] (tagalong capable) (deparsed)
16-bit PHV 333 (egress): phv333[15:0] = ipv4.identification[15:0] (tagalong capable) (deparsed)
16-bit PHV 334 (egress): phv334[15:13] = ipv4.flags[2:0] (tagalong capable) (deparsed)
16-bit PHV 334 (egress): phv334[12:0] = ipv4.fragOffset[12:0] (tagalong capable) (deparsed)
16-bit PHV 335 (egress): phv335[15:0] = tcp.dstPort[15:0] (tagalong capable) (deparsed)
- >> 6 in ingress and 4 in egress
+ >> 7 in ingress and 4 in egress
Allocations in Group 19 16 bits (tagalong)
16-bit PHV 336 (egress): phv336[15:0] = tcp.seqNo[31:16] (tagalong capable) (deparsed)
@@ -190,42 +184,30 @@
16-bit PHV 338 (egress): phv338[7:0] = ethernet.srcAddr[47:40] (tagalong capable) (deparsed)
16-bit PHV 339 (egress): phv339[15:0] = ethernet.etherType[15:0] (tagalong capable) (deparsed)
16-bit PHV 340 (egress): phv340[15:7] = packet_out_hdr.egress_port[8:0] (tagalong capable) (deparsed)
+ 16-bit PHV 340 (egress): phv340[15:7] = packet_in_hdr.ingress_port[8:0] (tagalong capable) (deparsed)
16-bit PHV 340 (egress): phv340[6:0] = packet_out_hdr._padding[6:0] (tagalong capable) (deparsed)
+ 16-bit PHV 340 (egress): phv340[6:0] = packet_in_hdr._padding[6:0] (tagalong capable) (deparsed)
>> 0 in ingress and 5 in egress
Final POV layout (ingress):
- 32: --validity_check--packet_in_hdr (ingress) in container 67
- 33: --validity_check--packet_out_hdr (ingress) in container 67
- 34: --validity_check--ethernet (ingress) in container 67
- 35: --validity_check--ipv4 (ingress) in container 67
- 36: --validity_check--tcp (ingress) in container 67
- 37: --validity_check--udp (ingress) in container 67
- 38: --validity_check--metadata_bridge (ingress) in container 67
+ 32: --validity_check--packet_in_hdr (ingress) in container 66
+ 33: --validity_check--packet_out_hdr (ingress) in container 66
+ 34: --validity_check--ethernet (ingress) in container 66
+ 35: --validity_check--ipv4 (ingress) in container 66
+ 36: --validity_check--tcp (ingress) in container 66
+ 37: --validity_check--udp (ingress) in container 66
+ 38: --validity_check--metadata_bridge (ingress) in container 66
Final POV layout (egress):
- 0: --validity_check--packet_in_hdr (egress) in container 82
- 1: --validity_check--packet_out_hdr (egress) in container 82
- 2: --validity_check--ethernet (egress) in container 82
- 3: --validity_check--ipv4 (egress) in container 82
- 4: --validity_check--tcp (egress) in container 82
- 5: --validity_check--udp (egress) in container 82
+ 0: --validity_check--packet_in_hdr (egress) in container 81
+ 1: --validity_check--packet_out_hdr (egress) in container 81
+ 2: --validity_check--ethernet (egress) in container 81
+ 3: --validity_check--ipv4 (egress) in container 81
+ 4: --validity_check--tcp (egress) in container 81
+ 5: --validity_check--udp (egress) in container 81
--------------------------------------------
- Bridged metadata layout (9 bytes)
+ Bridged metadata layout (6 bytes)
--------------------------------------------
-Final ingress layout:
- -pad-0-[6:0]
- ig_intr_md_for_tm.copy_to_cpu[0:0]
- ig_intr_md.resubmit_flag[0:0]
- ig_intr_md._pad1[0:0]
- ig_intr_md._pad2[1:0]
- ig_intr_md._pad3[2:0]
- ig_intr_md.ingress_port[8:0]
-
-Final egress layout:
- -pad-0-[6:0]
- ig_intr_md_for_tm.copy_to_cpu[0:0]
- -pad-1-[6:0]
- ig_intr_md.ingress_port[8:0]
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.calcfields.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.calcfields.log
index 2885112..4ee6b6a 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.calcfields.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.calcfields.log
@@ -1,35 +1,37 @@
+---------------------------------------------------------------------+
| Log file: parde.calcfields.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
Reserving 0 16-bit ingress tphvs for residual checksums
Reserving 0 16-bit egress tphvs for residual checksums
Need 0 POV bits for checksum update control
-Number of reachable states from state parse_tcp : 1
+Number of reachable states from state parse_tcp//spilled : 1
+Number of reachable states from state parse_tcp : 2
Number of reachable states from state parse_udp : 1
-Number of reachable states from state parse_ipv4 : 3
-Number of reachable states from state parse_ethernet : 4
-Number of reachable states from state parse_pkt_in : 5
-Number of reachable states from state parse_pkt_out : 5
-Number of reachable states from state default_parser : 6
-Number of reachable states from state start : 8
-Number of reachable states from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0> : 9
-Number of reachable states from state <Shim start state> : 10
+Number of reachable states from state parse_ipv4 : 4
+Number of reachable states from state parse_ethernet : 5
+Number of reachable states from state parse_pkt_in : 6
+Number of reachable states from state parse_pkt_out : 6
+Number of reachable states from state default_parser : 7
+Number of reachable states from state start : 9
+Number of reachable states from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0> : 10
+Number of reachable states from state <Shim start state> : 11
parser_state_calculations:[
- parse_tcp_139755269479824
- parse_udp_139755269478992
- parse_ipv4_139755274337616
- parse_ethernet_139755274336784
- parse_pkt_in_139755274334544
- parse_pkt_out_139755274284112
- default_parser_139755274284304
- start_139755274335440
- <Phase 0>_139755273146128
- <Ingress intrinsic metadata>_139755273145808
- <POV initialization>_139755273117904
- <Shim start state>_139755273118224
+ parse_tcp_140004581269072
+ parse_tcp_140004588184656
+ parse_udp_140004588183696
+ parse_ipv4_140004588185488
+ parse_ethernet_140004582443984
+ parse_pkt_in_140004588185680
+ parse_pkt_out_140004588358736
+ default_parser_140004588358928
+ start_140004588186320
+ <Phase 0>_140004583263632
+ <Ingress intrinsic metadata>_140004583263312
+ <POV initialization>_140004583264016
+ <Shim start state>_140004583329936
]
parser_calculations: [
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.config.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.config.log
index 39cdfa2..d59725b 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.config.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.config.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: parde.config.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
Configuring deparser.inp.iim.ii_phv_csum.csum_cfg[0].csum_cfg_entry[0].zero_m_s_b = 1
@@ -16059,11 +16059,11 @@
63 | g1w31:
|
8 bits
- 64 | I g2w0: [ig_intr_md_for_tm.copy_to_cpu]
- 65 | I g2w1: [ethernet.dstAddr[47:40]]
- 66 | I g2w2: [ethernet.srcAddr[39:32]]
- 67 | I g2w3: [POV[39:32]]
- 68 | I g2w4: [ig_intr_md_for_tm.drop_ctl]
+ 64 | I g2w0: [ethernet.dstAddr[47:40]]
+ 65 | I g2w1: [ethernet.srcAddr[39:32]]
+ 66 | I g2w2: [POV[39:32]]
+ 67 | I g2w3: [ig_intr_md_for_tm.drop_ctl]
+ 68 | g2w4:
69 | g2w5:
70 | g2w6:
71 | g2w7:
@@ -16075,9 +16075,9 @@
77 | g2w13:
78 | g2w14:
79 | g2w15:
- 80 | E g2w16: [ig_intr_md_for_tm.copy_to_cpu]
- 81 | E g2w17: [eg_intr_md._pad7, eg_intr_md.egress_cos]
- 82 | E g2w18: [POV[7:0]]
+ 80 | E g2w16: [eg_intr_md._pad7, eg_intr_md.egress_cos]
+ 81 | E g2w17: [POV[7:0]]
+ 82 | g2w18:
83 | g2w19:
84 | g2w20:
85 | g2w21:
@@ -16143,9 +16143,9 @@
141 | g4w13:
142 | g4w14:
143 | g4w15:
- 144 | E g4w16: [ig_intr_md.ingress_port]
- 145 | E g4w17: [packet_in_hdr.ingress_port, packet_in_hdr._padding]
- 146 | E g4w18: [eg_intr_md._pad0, eg_intr_md.egress_port]
+ 144 | E g4w16: [eg_intr_md._pad0, eg_intr_md.egress_port]
+ 145 | g4w17:
+ 146 | g4w18:
147 | g4w19:
148 | g4w20:
149 | g4w21:
@@ -16234,9 +16234,9 @@
256 | I g8w0: [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]
257 | I g8w1: [ipv4.srcAddr]
258 | I g8w2: [ipv4.dstAddr]
- 259 | I g8w3: [tcp.ackNo, udp.length_, udp.checksum]
- 260 | I g8w4: [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]
- 261 | I g8w5: [tcp.checksum, tcp.urgentPtr]
+ 259 | I g8w3: [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]
+ 260 | I g8w4: [tcp.checksum, tcp.urgentPtr]
+ 261 | g8w5:
262 | g8w6:
263 | g8w7:
264 | E g8w8: [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]
@@ -16269,8 +16269,8 @@
289 | I g9w1: [ipv4.diffserv]
290 | I g9w2: [tcp.srcPort[15:8], udp.srcPort[15:8]]
291 | I g9w3: [tcp.srcPort[7:0], udp.srcPort[7:0]]
- 292 | g9w4:
- 293 | g9w5:
+ 292 | I g9w4: [tcp.dstPort[15:8]]
+ 293 | I g9w5: [tcp.dstPort[7:0]]
294 | g9w6:
295 | g9w7:
296 | E g9w8: [ipv4.version, ipv4.ihl]
@@ -16302,10 +16302,10 @@
320 | I g10w0: [ipv4.totalLen]
321 | I g10w1: [ipv4.identification]
322 | I g10w2: [ipv4.flags, ipv4.fragOffset]
- 323 | I g10w3: [tcp.dstPort, udp.dstPort]
- 324 | I g10w4: [tcp.seqNo[31:16]]
- 325 | I g10w5: [tcp.seqNo[15:0]]
- 326 | g10w6:
+ 323 | I g10w3: [tcp.seqNo[31:16], udp.dstPort]
+ 324 | I g10w4: [tcp.seqNo[15:0]]
+ 325 | I g10w5: [tcp.ackNo[31:16]]
+ 326 | I g10w6: [tcp.ackNo[15:0]]
327 | g10w7:
328 | g10w8:
329 | g10w9:
@@ -16319,7 +16319,7 @@
337 | E g10w17: [tcp.seqNo[15:0]]
338 | E g10w18: [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]
339 | E g10w19: [ethernet.etherType]
- 340 | E g10w20: [packet_out_hdr.egress_port, packet_out_hdr._padding]
+ 340 | E g10w20: [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]
341 | g10w21:
342 | g10w22:
343 | g10w23:
@@ -16363,6 +16363,7 @@
7: parse_pkt_out
8: <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>
9: start
+ 10: parse_tcp//spilled
Egress:
0: <Shim start state>
1: parse_ethernet
@@ -16371,7 +16372,7 @@
4: parse_udp
5: default_parser
6: parse_pkt_out
- 7: <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
+ 7: <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
8: parse_pkt_in
---------------
POV layout:
@@ -16395,11 +16396,8 @@
6-254 | -
---------------
Bridged metadata:
-Ingress:
-[64, 128]
-Egress:
-[80, 144]
+[None]
---------------
Deparse order:
-Ingress: ['metadata_bridge', '_bridged_intr_md_', 'packet_out_hdr', 'packet_in_hdr', 'ethernet', 'ipv4', 'udp', 'tcp']
-Egress: ['packet_out_hdr', 'packet_in_hdr', 'ethernet', 'ipv4', 'udp', 'tcp']
+Ingress: ['metadata_bridge', '_bridged_intr_md_', 'packet_in_hdr', 'packet_out_hdr', 'ethernet', 'ipv4', 'udp', 'tcp']
+Egress: ['packet_in_hdr', 'packet_out_hdr', 'ethernet', 'ipv4', 'udp', 'tcp']
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.error.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.error.log
index 4f9296c..cf3dfaa 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.error.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.error.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: parde.error.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.log
index 7ef4cc4..f0bc0fc 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parde.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: parde.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
># Begin digest init (pre-PHV)
@@ -14,20 +14,18 @@
># End digest PHV reservations
># Begin digest init (post-PHV)
># End digest init (post-PHV)
-Bridge-MF:ig_intr_md_for_tm.copy_to_cpu
-Bridge-MF:ig_intr_md.ingress_port
Found parser entry point: start
># Begin unroll of HLIR parse graph
>## Create shadow parse graph and find loops
>## Entrypoint 'p4_parse_state.start'
-Creating shadow state: 'p4_parse_state.start' -> 'shadow_state (start, 139755274337680)'
-Creating shadow state: 'p4_parse_state.parse_pkt_in' -> 'shadow_state (parse_pkt_in, 139755274337488)'
-Creating shadow state: 'p4_parse_state.parse_ethernet' -> 'shadow_state (parse_ethernet, 139755274336720)'
-Creating shadow state: 'p4_parse_state.parse_ipv4' -> 'shadow_state (parse_ipv4, 139755274336848)'
-Creating shadow state: 'p4_parse_state.parse_tcp' -> 'shadow_state (parse_tcp, 139755274336528)'
-Creating shadow state: 'p4_parse_state.parse_udp' -> 'shadow_state (parse_udp, 139755274336592)'
-Creating shadow state: 'p4_parse_state.default_parser' -> 'shadow_state (default_parser, 139755274336464)'
-Creating shadow state: 'p4_parse_state.parse_pkt_out' -> 'shadow_state (parse_pkt_out, 139755274336400)'
+Creating shadow state: 'p4_parse_state.start' -> 'shadow_state (start, 140004582444624)'
+Creating shadow state: 'p4_parse_state.parse_pkt_in' -> 'shadow_state (parse_pkt_in, 140004582444432)'
+Creating shadow state: 'p4_parse_state.parse_ethernet' -> 'shadow_state (parse_ethernet, 140004582443856)'
+Creating shadow state: 'p4_parse_state.parse_ipv4' -> 'shadow_state (parse_ipv4, 140004582443728)'
+Creating shadow state: 'p4_parse_state.parse_tcp' -> 'shadow_state (parse_tcp, 140004582443600)'
+Creating shadow state: 'p4_parse_state.parse_udp' -> 'shadow_state (parse_udp, 140004582443664)'
+Creating shadow state: 'p4_parse_state.default_parser' -> 'shadow_state (default_parser, 140004582443536)'
+Creating shadow state: 'p4_parse_state.parse_pkt_out' -> 'shadow_state (parse_pkt_out, 140004582443344)'
># End unroll of HLIR parse graph
># Begin deparser init
>## Create records for gress 0
@@ -45,8 +43,8 @@
Created record for 'p4_header_instance.tcp'
Created record for 'p4_header_instance.udp'
>## Build record ordering for gress 0
->## Build field ordering for record 'packet_out_hdr'
>## Build field ordering for record 'packet_in_hdr'
+>## Build field ordering for record 'packet_out_hdr'
>## Build field ordering for record 'ethernet'
>## Build field ordering for record 'ipv4'
>## Build field ordering for record 'udp'
@@ -66,8 +64,8 @@
Created record for 'p4_header_instance.tcp'
Created record for 'p4_header_instance.udp'
>## Build record ordering for gress 1
->## Build field ordering for record 'packet_out_hdr'
>## Build field ordering for record 'packet_in_hdr'
+>## Build field ordering for record 'packet_out_hdr'
>## Build field ordering for record 'ethernet'
>## Build field ordering for record 'ipv4'
>## Build field ordering for record 'udp'
@@ -80,7 +78,6 @@
Add container 128 for ig_intr_md._pad3 to bmeta_ig_intr_md
Add container 128 for ig_intr_md.ingress_port to bmeta_ig_intr_md
>## Create deparser bridge record
-Bridge contains user-provided data
># End deparser init
Constructing parse graph for entry point start on ingress
Constructing parse graph for entry point start on egress
@@ -90,52 +87,57 @@
Stretch extraction of ingress_port to state <Ingress intrinsic metadata> offset 7
Stretch extraction of ig_intr_md.ingress_port to state <_parse_bridged_ingress_intrinsic_metadata> offset 7
># Begin scraping deparser POV allocation from raw PHV allocation
-PHV layout: [0, 0, 0, 0, 67, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
+PHV layout: [0, 0, 0, 0, 66, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
>## Scraping individual POV records
-POV 32 -> packet_in_hdr
POV 33 -> packet_out_hdr
POV 34 -> ethernet
POV 35 -> ipv4
-POV 38 -> pov_bmeta
POV 36 -> tcp
POV 37 -> udp
+POV 38 -> pov_bmeta
+POV 32 -> packet_in_hdr
>## Setting up array bits
># End scraping deparser POV allocation from raw PHV allocation
># Begin parser POV rewrite
>## Filling in POV init state
>## Rewriting parser POV extractions
-POV for metadata_bridge -> PHV 67 |= 0x40
-POV for packet_in_hdr -> PHV 67 |= 0x1
-POV for ethernet -> PHV 67 |= 0x4
-POV for ipv4 -> PHV 67 |= 0x8
-POV for tcp -> PHV 67 |= 0x10
-POV for udp -> PHV 67 |= 0x20
-POV for packet_out_hdr -> PHV 67 |= 0x2
+POV for metadata_bridge -> PHV 66 |= 0x40
+POV for packet_in_hdr -> PHV 66 |= 0x1
+POV for ethernet -> PHV 66 |= 0x4
+POV for ipv4 -> PHV 66 |= 0x8
+POV for tcp -> PHV 66 |= 0x10
+POV for udp -> PHV 66 |= 0x20
+POV for packet_out_hdr -> PHV 66 |= 0x2
POV for ig_intr_md -> dropped (no deparser record)
POV for _bridged_intr_md_ -> PHV 0 |= 0x10000
>## Sampling not detected, deparsing at least 1 POV byte
>## Adding POV containers to metadata bridge: [0]
>## Set POV skip state's shift amount to 32
># Begin scraping deparser POV allocation from raw PHV allocation
-PHV layout: [82, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
+PHV layout: [81, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
>## Scraping individual POV records
-POV 0 -> packet_in_hdr
POV 1 -> packet_out_hdr
POV 2 -> ethernet
POV 3 -> ipv4
POV 4 -> tcp
POV 5 -> udp
+POV 0 -> packet_in_hdr
>## Setting up array bits
># End scraping deparser POV allocation from raw PHV allocation
># Begin parser POV rewrite
>## Filling in POV init state
>## Rewriting parser POV extractions
-POV for packet_in_hdr -> PHV 82 |= 0x1
-POV for ethernet -> PHV 82 |= 0x4
-POV for ipv4 -> PHV 82 |= 0x8
-POV for tcp -> PHV 82 |= 0x10
-POV for udp -> PHV 82 |= 0x20
-POV for packet_out_hdr -> PHV 82 |= 0x2
+POV for packet_in_hdr -> PHV 81 |= 0x1
+POV for ethernet -> PHV 81 |= 0x4
+POV for ipv4 -> PHV 81 |= 0x8
+POV for tcp -> PHV 81 |= 0x10
+POV for udp -> PHV 81 |= 0x20
+POV for packet_out_hdr -> PHV 81 |= 0x2
+Linear Chain parse_tcp -> parse_tcp//spilled
+Try merge parse_tcp <- parse_tcp//spilled
+merge output at offset 24
+Ran out of 8b extractors
+states will not be partially merged since S2 is end of chain
Linear Chain parse_pkt_in -> parse_ethernet
Try merge parse_pkt_in <- parse_ethernet
Multiple paths to state S2 : parse_ethernet <- 3
@@ -195,7 +197,7 @@
Multiple paths to state S2 : start <- 2
Remove state <Ingress intrinsic metadata>
Remove state <Phase 0>
-assign ids to 10 states, dir = 0
+assign ids to 11 states, dir = 0
------
State : <Shim start state>
shift: 0B
@@ -208,7 +210,7 @@
State : parse_pkt_in
shift: 2B
match_reservations: []
-outputs[addr, width]: ([67, 8], [129, 16])
+outputs[addr, width]: ([66, 8], [129, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
parent state start
@@ -217,7 +219,7 @@
State : parse_ethernet
shift: 14B
match_reservations: []
-outputs[addr, width]: ([67, 8], [65, 8], [1, 32], [131, 16], [66, 8], [2, 32], [132, 16])
+outputs[addr, width]: ([66, 8], [64, 8], [1, 32], [131, 16], [65, 8], [2, 32], [132, 16])
branch on = etherType, offset = 96b, dst = parse_ethernet
match_extractions: [match_window(hw_id=0, width=16)]
match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
@@ -230,29 +232,30 @@
State : parse_ipv4
shift: 20B
match_reservations: []
-outputs[addr, width]: ([67, 8], [288, 8], [289, 8], [320, 16], [321, 16], [322, 16], [256, 32], [257, 32], [258, 32])
+outputs[addr, width]: ([66, 8], [288, 8], [289, 8], [320, 16], [321, 16], [322, 16], [256, 32], [257, 32], [258, 32])
branch on = fragOffset, offset = 51b, dst = parse_ipv4
branch on = protocol, offset = 72b, dst = parse_ipv4
-match_extractions: [match_window(hw_id=2, width=8), match_window(hw_id=0, width=16)]
-match key = [0, 1, 2, 3, 4, 5, 6, 7]
+match_extractions: [match_window(hw_id=0, width=16), match_window(hw_id=2, width=8)]
match key = [8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, None, None, None]
+match key = [0, 1, 2, 3, 4, 5, 6, 7]
next state parse_tcp val 6 mask [True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True]
next state parse_udp val 17 mask [True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True]
parent state parse_ethernet
------
State : parse_tcp
-shift: 20B
+shift: 0B
match_reservations: []
-outputs[addr, width]: ([67, 8], [290, 8], [291, 8], [323, 16], [324, 16], [325, 16], [259, 32], [260, 32], [261, 32])
+outputs[addr, width]: ([66, 8], [290, 8], [291, 8], [292, 8], [323, 16], [324, 16], [325, 16], [326, 16], [259, 32], [260, 32])
match_extractions: []
+next state parse_tcp//spilled val 0 mask [False]
parent state parse_ipv4
------
State : parse_udp
shift: 8B
match_reservations: []
-outputs[addr, width]: ([67, 8], [290, 8], [291, 8], [323, 16], [259, 32])
+outputs[addr, width]: ([66, 8], [290, 8], [291, 8], [323, 16], [259, 32])
match_extractions: []
parent state parse_ipv4
@@ -272,7 +275,7 @@
State : parse_pkt_out
shift: 2B
match_reservations: []
-outputs[addr, width]: ([67, 8], [129, 16])
+outputs[addr, width]: ([66, 8], [129, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
parent state default_parser
@@ -285,9 +288,9 @@
branch on = None, offset = 0b, dst = <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>
branch on = None, offset = 64b, dst = <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>
branch promise on = ingress_port, offset = 7b, dst = default_parser
-match_extractions: [match_window(hw_id=2, width=8), match_window(hw_id=0, width=16)]
-match key = [0, 1, 2, 3, 4, 5, 6, 7]
+match_extractions: [match_window(hw_id=0, width=16), match_window(hw_id=2, width=8)]
match key = [None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, 8]
+match key = [0, 1, 2, 3, 4, 5, 6, 7]
next state start val 0 mask [False]
parent state <Shim start state>
@@ -295,7 +298,7 @@
State : start
shift: 0B
match_reservations: [match_window(hw_id=0, width=16)]
-outputs[addr, width]: ([67, 8],)
+outputs[addr, width]: ([66, 8],)
branch on = None, offset = 96b, dst = start
match_extractions: [match_window(hw_id=2, width=8)]
match key = [0, 1, 2, 3, 4, 5, 6, 7]
@@ -303,6 +306,14 @@
next state default_parser val 0 mask [False]
parent state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>
+------
+State : parse_tcp//spilled
+shift: 20B
+match_reservations: []
+outputs[addr, width]: ([293, 8],)
+match_extractions: []
+parent state parse_tcp
+
Linear Chain parse_pkt_in -> parse_ethernet
Try merge parse_pkt_in <- parse_ethernet
Multiple paths to state S2 : parse_ethernet <- 3
@@ -324,7 +335,7 @@
S2: State : <Egress intrinsic metadata>
shift: 3B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8])
+outputs[addr, width]: ([144, 16], [80, 8])
branch on = None, offset = 24b, dst = <Egress intrinsic metadata>
match_extractions: []
next state <POV skip> val 0 mask [False]
@@ -338,7 +349,7 @@
S1: State : <POV initialization>_<Egress intrinsic metadata>
shift: 3B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8])
+outputs[addr, width]: ([144, 16], [80, 8])
branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>
match_extractions: []
next state <POV skip> val 0 mask [False]
@@ -350,45 +361,20 @@
match_reservations: []
outputs[addr, width]: ()
match_extractions: []
-next state <Metadata bridge> val 0 mask [False]
+next state <_parse_bridged_ingress_intrinsic_metadata> val 0 mask [False]
parent state <POV initialization>_<Egress intrinsic metadata>
Full merge done <POV initialization>_<Egress intrinsic metadata> <- <POV skip>
-Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <Metadata bridge>
-merge output at offset 0
-merge output at offset 8
-merge_offset = 24, complete_merge = True
+Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <_parse_bridged_ingress_intrinsic_metadata>
+merge_offset = 0, complete_merge = True
Before Merge ------
S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>
shift: 7B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8])
+outputs[addr, width]: ([144, 16], [80, 8])
branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>
match_extractions: []
-next state <Metadata bridge> val 0 mask [False]
-parent state <Shim start state>
-
-
-S2: State : <Metadata bridge>
-shift: 3B
-match_reservations: []
-outputs[addr, width]: ([80, 8], [144, 16])
-match_extractions: []
-next state <_parse_bridged_ingress_intrinsic_metadata> val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>
-
-
-Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <Metadata bridge>
-Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge> <- <_parse_bridged_ingress_intrinsic_metadata>
-merge_offset = 0, complete_merge = True
-Before Merge ------
-S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>
-shift: 10B
-match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8], [80, 8], [144, 16])
-branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>
-match_extractions: []
next state <_parse_bridged_ingress_intrinsic_metadata> val 0 mask [False]
parent state <Shim start state>
@@ -400,19 +386,19 @@
branch promise on = ingress_port, offset = 7b, dst = default_parser
match_extractions: []
next state start val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>
-Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge> <- <_parse_bridged_ingress_intrinsic_metadata>
-Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata> <- start
+Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <_parse_bridged_ingress_intrinsic_metadata>
+Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata> <- start
merge_offset = 0, complete_merge = True
Before Merge ------
-S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>
-shift: 12B
+S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>
+shift: 9B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8], [80, 8], [144, 16])
-branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>
-branch promise on = ingress_port, offset = 87b, dst = default_parser
+outputs[addr, width]: ([144, 16], [80, 8])
+branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>
+branch promise on = ingress_port, offset = 63b, dst = default_parser
match_extractions: []
next state start val 0 mask [False]
parent state <Shim start state>
@@ -426,13 +412,12 @@
match_extractions: []
next state parse_pkt_in val 0 mask [True, True, True, True, True, True, True, True]
next state default_parser val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>
-Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata> <- start
+Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata> <- start
Remove state <Egress intrinsic metadata>
Remove state <POV skip>
-Remove state <Metadata bridge>
Remove state <_parse_bridged_ingress_intrinsic_metadata>
Remove state start
assign ids to 9 states, dir = 1
@@ -442,13 +427,13 @@
match_reservations: []
outputs[addr, width]: ()
match_extractions: []
-next state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start val 0 mask [False]
+next state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start val 0 mask [False]
------
State : parse_ethernet
shift: 14B
match_reservations: []
-outputs[addr, width]: ([82, 8], [300, 8], [270, 32], [338, 16], [301, 8], [271, 32], [339, 16])
+outputs[addr, width]: ([81, 8], [300, 8], [270, 32], [338, 16], [301, 8], [271, 32], [339, 16])
branch on = etherType, offset = 96b, dst = parse_ethernet
match_extractions: [match_window(hw_id=0, width=16)]
match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
@@ -461,12 +446,12 @@
State : parse_ipv4
shift: 20B
match_reservations: []
-outputs[addr, width]: ([82, 8], [296, 8], [297, 8], [332, 16], [333, 16], [334, 16], [264, 32], [265, 32], [266, 32])
+outputs[addr, width]: ([81, 8], [296, 8], [297, 8], [332, 16], [333, 16], [334, 16], [264, 32], [265, 32], [266, 32])
branch on = fragOffset, offset = 51b, dst = parse_ipv4
branch on = protocol, offset = 72b, dst = parse_ipv4
-match_extractions: [match_window(hw_id=2, width=8), match_window(hw_id=0, width=16)]
-match key = [0, 1, 2, 3, 4, 5, 6, 7]
+match_extractions: [match_window(hw_id=0, width=16), match_window(hw_id=2, width=8)]
match key = [8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, None, None, None]
+match key = [0, 1, 2, 3, 4, 5, 6, 7]
next state parse_tcp val 6 mask [True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True]
next state parse_udp val 17 mask [True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True, True]
parent state parse_ethernet
@@ -475,7 +460,7 @@
State : parse_tcp
shift: 20B
match_reservations: []
-outputs[addr, width]: ([82, 8], [298, 8], [299, 8], [335, 16], [336, 16], [337, 16], [267, 32], [268, 32], [269, 32])
+outputs[addr, width]: ([81, 8], [298, 8], [299, 8], [335, 16], [336, 16], [337, 16], [267, 32], [268, 32], [269, 32])
match_extractions: []
parent state parse_ipv4
@@ -483,7 +468,7 @@
State : parse_udp
shift: 8B
match_reservations: []
-outputs[addr, width]: ([82, 8], [298, 8], [299, 8], [336, 16], [267, 32])
+outputs[addr, width]: ([81, 8], [298, 8], [299, 8], [336, 16], [267, 32])
match_extractions: []
parent state parse_ipv4
@@ -492,33 +477,33 @@
shift: 0B
match_reservations: [match_window(hw_id=0, width=16)]
outputs[addr, width]: ()
-branch on = ingress_port, offset = 87b, dst = default_parser
+branch on = ingress_port, offset = 63b, dst = default_parser
match_extractions: [match_window(hw_id=0, width=16)]
match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, None, None, None, None, None, None, None]
next state parse_pkt_out val 192 mask [True, True, True, True, True, True, True, True, True]
next state parse_ethernet val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
------
State : parse_pkt_out
shift: 2B
match_reservations: []
-outputs[addr, width]: ([82, 8], [340, 16])
+outputs[addr, width]: ([81, 8], [340, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
parent state default_parser
------
-State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
-shift: 12B
+State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
+shift: 9B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8], [80, 8], [144, 16])
-branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
-branch on = None, offset = 192b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
-branch promise on = ingress_port, offset = 87b, dst = default_parser
-match_extractions: [match_window(hw_id=2, width=8), match_window(hw_id=0, width=16), match_window(hw_id=3, width=8)]
-match key = [8, 9, 10, 11, 12, 13, 14, 15]
+outputs[addr, width]: ([144, 16], [80, 8])
+branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
+branch on = None, offset = 168b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
+branch promise on = ingress_port, offset = 63b, dst = default_parser
+match_extractions: [match_window(hw_id=0, width=16), match_window(hw_id=2, width=8), match_window(hw_id=3, width=8)]
match key = [None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
+match key = [8, 9, 10, 11, 12, 13, 14, 15]
match key = [0, 1, 2, 3, 4, 5, 6, 7]
next state parse_pkt_in val 0 mask [True, True, True, True, True, True, True, True]
next state default_parser val 0 mask [False]
@@ -528,8 +513,8 @@
State : parse_pkt_in
shift: 2B
match_reservations: []
-outputs[addr, width]: ([82, 8], [145, 16])
+outputs[addr, width]: ([81, 8], [340, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parser.characterize.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parser.characterize.log
index 2ab3117..4d4e6e3 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parser.characterize.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/parser.characterize.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: parser.characterize.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/transform.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/transform.log
index 4d7c799..6f53712 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/transform.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/transform.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: transform.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 13:56:53 2017 |
+| Created on: Fri Sep 8 08:24:30 2017 |
+---------------------------------------------------------------------+
-------------------------------
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/name_lookup.c b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/name_lookup.c
index ff238fe..c2d2570 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/name_lookup.c
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/name_lookup.c
@@ -5,7 +5,7 @@
const char * p4_table_name_lookup(int pipe, int stage, int table_index)
{
switch(stage) {
- case 2:
+ case 1:
{
switch(table_index) {
case 0:
@@ -24,22 +24,11 @@
case 0:
{
switch(table_index) {
- case 0:
- {
- return "ingress_pkt";
- }
- break;
case 1:
{
- return "egress_pkt";
+ return "process_packet_out_table";
}
break;
- }
- }
- break;
- case 1:
- {
- switch(table_index) {
case 0:
{
return "table0";
@@ -77,40 +66,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -142,16 +121,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -172,16 +141,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -245,6 +209,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -292,17 +266,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -347,7 +326,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -373,40 +352,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -438,16 +407,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -468,16 +427,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -541,6 +495,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -588,17 +552,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -643,7 +612,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -669,40 +638,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -734,16 +693,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -764,16 +713,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -837,6 +781,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -884,17 +838,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -939,7 +898,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -965,40 +924,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -1030,16 +979,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -1060,16 +999,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -1133,6 +1067,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -1180,17 +1124,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -1235,7 +1184,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -1261,40 +1210,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -1326,16 +1265,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -1356,16 +1285,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -1429,6 +1353,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -1476,17 +1410,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -1531,7 +1470,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -1557,40 +1496,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -1622,16 +1551,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -1652,16 +1571,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -1725,6 +1639,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -1772,17 +1696,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -1827,7 +1756,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -1853,40 +1782,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -1918,16 +1837,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -1948,16 +1857,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -2021,6 +1925,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -2068,17 +1982,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -2123,7 +2042,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -2149,40 +2068,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -2214,16 +2123,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -2244,16 +2143,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -2317,6 +2211,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -2364,17 +2268,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -2419,7 +2328,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -2445,40 +2354,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -2510,16 +2409,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -2540,16 +2429,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -2613,6 +2497,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -2660,17 +2554,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -2715,7 +2614,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -2741,40 +2640,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -2806,16 +2695,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -2836,16 +2715,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -2909,6 +2783,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -2956,17 +2840,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -3011,7 +2900,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -3037,40 +2926,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -3102,16 +2981,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -3132,16 +3001,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -3205,6 +3069,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -3252,17 +3126,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -3307,7 +3186,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -3333,40 +3212,30 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 65 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 66 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 67 :
- {
return "I [POV[39:32]]";
}
break;
- case 68 :
+ case 67 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -3398,16 +3267,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -3428,16 +3287,11 @@
break;
case 259 :
{
- return "I [tcp.ackNo, udp.length_, udp.checksum]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window, udp.length_, udp.checksum]";
}
break;
case 260 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 261 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
@@ -3501,6 +3355,16 @@
return "I [tcp.srcPort[7:0], udp.srcPort[7:0]]";
}
break;
+ case 292 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
+ case 293 :
+ {
+ return "I [tcp.dstPort[7:0]]";
+ }
+ break;
case 296 :
{
return "E [ipv4.version, ipv4.ihl]";
@@ -3548,17 +3412,22 @@
break;
case 323 :
{
- return "I [tcp.dstPort, udp.dstPort]";
+ return "I [tcp.seqNo[31:16], udp.dstPort]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 325 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
+ }
+ break;
+ case 326 :
+ {
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
@@ -3603,7 +3472,7 @@
break;
case 340 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/tofino.bin b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/tofino.bin
index 8ec0542..a11fd1e 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/tofino.bin
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/tofino.bin
Binary files differ
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/deparser.html b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/deparser.html
index 29e8aa5..3cd0e6e 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/deparser.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/deparser.html
@@ -102,7 +102,7 @@
<td width=50 style="border: 1px solid black" align=center>120-127</td>
</tr><tr><td width=50 align=right>PHV </td>
<td height=50 colspan=4 align=center bgcolor=#DDDDDD>0</td>
-<td height=50 colspan=1 align=center bgcolor=#DDDDDD>67</td>
+<td height=50 colspan=1 align=center bgcolor=#DDDDDD>66</td>
<td height=50 colspan=11 align=center bgcolor=#FFFFFF>----</td>
</tr></table><br />
<table border=0 style="border: 1px solid black;"><tr><td width=50 align=right>POV </td>
@@ -129,13 +129,13 @@
<tr class=fde_row_0><td height=50 width=50>0-15</td><td>----</td><td> </td><td> </td></tr>
<tr class=fde_row_0><td height=50 width=50>16</td><td>_bridged_intr_md_</td><td>PHV 0 bit 16</td><td>(phv[0] & 0x10000)</td></tr>
<tr class=fde_row_0><td height=50 width=50>17-31</td><td>----</td><td> </td><td> </td></tr>
-<tr class=fde_row_0><td height=50 width=50>32</td><td>packet_in_hdr</td><td>PHV 67 bit 0</td><td>(phv[67] & 0x1)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>33</td><td>packet_out_hdr</td><td>PHV 67 bit 1</td><td>(phv[67] & 0x2)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>34</td><td>ethernet</td><td>PHV 67 bit 2</td><td>(phv[67] & 0x4)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>35</td><td>ipv4</td><td>PHV 67 bit 3</td><td>(phv[67] & 0x8)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>36</td><td>tcp</td><td>PHV 67 bit 4</td><td>(phv[67] & 0x10)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>37</td><td>udp</td><td>PHV 67 bit 5</td><td>(phv[67] & 0x20)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>38</td><td>metadata_bridge</td><td>PHV 67 bit 6</td><td>(phv[67] & 0x40)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>32</td><td>packet_in_hdr</td><td>PHV 66 bit 0</td><td>(phv[66] & 0x1)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>33</td><td>packet_out_hdr</td><td>PHV 66 bit 1</td><td>(phv[66] & 0x2)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>34</td><td>ethernet</td><td>PHV 66 bit 2</td><td>(phv[66] & 0x4)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>35</td><td>ipv4</td><td>PHV 66 bit 3</td><td>(phv[66] & 0x8)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>36</td><td>tcp</td><td>PHV 66 bit 4</td><td>(phv[66] & 0x10)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>37</td><td>udp</td><td>PHV 66 bit 5</td><td>(phv[66] & 0x20)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>38</td><td>metadata_bridge</td><td>PHV 66 bit 6</td><td>(phv[66] & 0x40)</td></tr>
<tr class=fde_row_0><td height=50 width=50>39-254</td><td>----</td><td> </td><td> </td></tr>
</table>
</div></div><br><br>
@@ -154,15 +154,6 @@
<tr class="fde_row_1">
- <td style="border-right: 1px solid black">metadata_bridge (38)</td>
- <td>64</td>
- <td>128</td>
- <td>128</td>
- <td>-</td>
- </tr>
-
-
- <tr class="fde_row_0">
<td style="border-right: 1px solid black">_bridged_intr_md_ (16)</td>
<td>128</td>
<td>128</td>
@@ -171,15 +162,6 @@
</tr>
- <tr class="fde_row_1">
- <td style="border-right: 1px solid black">packet_out_hdr (33)</td>
- <td>129</td>
- <td>129</td>
- <td>-</td>
- <td>-</td>
- </tr>
-
-
<tr class="fde_row_0">
<td style="border-right: 1px solid black">packet_in_hdr (32)</td>
<td>129</td>
@@ -190,34 +172,43 @@
<tr class="fde_row_1">
+ <td style="border-right: 1px solid black">packet_out_hdr (33)</td>
+ <td>129</td>
+ <td>129</td>
+ <td>-</td>
+ <td>-</td>
+ </tr>
+
+
+ <tr class="fde_row_0">
<td style="border-right: 1px solid black">ethernet (34)</td>
+ <td>64</td>
+ <td>1</td>
+ <td>1</td>
+ <td>1</td>
+ </tr>
+
+
+ <tr class="fde_row_1">
+ <td style="border-right: 1px solid black">ethernet (34)</td>
+ <td>1</td>
+ <td>131</td>
+ <td>131</td>
<td>65</td>
- <td>1</td>
- <td>1</td>
- <td>1</td>
</tr>
<tr class="fde_row_0">
<td style="border-right: 1px solid black">ethernet (34)</td>
- <td>1</td>
- <td>131</td>
- <td>131</td>
- <td>66</td>
+ <td>2</td>
+ <td>2</td>
+ <td>2</td>
+ <td>2</td>
</tr>
<tr class="fde_row_1">
<td style="border-right: 1px solid black">ethernet (34)</td>
- <td>2</td>
- <td>2</td>
- <td>2</td>
- <td>2</td>
- </tr>
-
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">ethernet (34)</td>
<td>132</td>
<td>132</td>
<td>-</td>
@@ -225,7 +216,7 @@
</tr>
- <tr class="fde_row_1">
+ <tr class="fde_row_0">
<td style="border-right: 1px solid black">ipv4 (35)</td>
<td><font color=#333333><i>288</i></font></td>
<td><font color=#333333><i>289</i></font></td>
@@ -234,7 +225,7 @@
</tr>
- <tr class="fde_row_0">
+ <tr class="fde_row_1">
<td style="border-right: 1px solid black">ipv4 (35)</td>
<td><font color=#333333><i>321</i></font></td>
<td><font color=#333333><i>321</i></font></td>
@@ -243,26 +234,26 @@
</tr>
- <tr class="fde_row_1">
- <td style="border-right: 1px solid black">ipv4 (35)</td>
- <td><font color=#333333><i>256</i></font></td>
- <td><font color=#333333><i>256</i></font></td>
- <td><font color=#333333><i>256</i></font></td>
- <td><font color=#333333><i>256</i></font></td>
- </tr>
-
-
<tr class="fde_row_0">
<td style="border-right: 1px solid black">ipv4 (35)</td>
- <td><font color=#333333><i>257</i></font></td>
- <td><font color=#333333><i>257</i></font></td>
- <td><font color=#333333><i>257</i></font></td>
- <td><font color=#333333><i>257</i></font></td>
+ <td><font color=#333333><i>256</i></font></td>
+ <td><font color=#333333><i>256</i></font></td>
+ <td><font color=#333333><i>256</i></font></td>
+ <td><font color=#333333><i>256</i></font></td>
</tr>
<tr class="fde_row_1">
<td style="border-right: 1px solid black">ipv4 (35)</td>
+ <td><font color=#333333><i>257</i></font></td>
+ <td><font color=#333333><i>257</i></font></td>
+ <td><font color=#333333><i>257</i></font></td>
+ <td><font color=#333333><i>257</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">ipv4 (35)</td>
<td><font color=#333333><i>258</i></font></td>
<td><font color=#333333><i>258</i></font></td>
<td><font color=#333333><i>258</i></font></td>
@@ -270,7 +261,7 @@
</tr>
- <tr class="fde_row_0">
+ <tr class="fde_row_1">
<td style="border-right: 1px solid black">udp (37)</td>
<td><font color=#333333><i>290</i></font></td>
<td><font color=#333333><i>291</i></font></td>
@@ -279,7 +270,7 @@
</tr>
- <tr class="fde_row_1">
+ <tr class="fde_row_0">
<td style="border-right: 1px solid black">udp (37)</td>
<td><font color=#333333><i>259</i></font></td>
<td><font color=#333333><i>259</i></font></td>
@@ -288,21 +279,30 @@
</tr>
- <tr class="fde_row_0">
+ <tr class="fde_row_1">
<td style="border-right: 1px solid black">tcp (36)</td>
<td><font color=#333333><i>290</i></font></td>
<td><font color=#333333><i>291</i></font></td>
+ <td><font color=#333333><i>292</i></font></td>
+ <td><font color=#333333><i>293</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">tcp (36)</td>
<td><font color=#333333><i>323</i></font></td>
<td><font color=#333333><i>323</i></font></td>
+ <td><font color=#333333><i>324</i></font></td>
+ <td><font color=#333333><i>324</i></font></td>
</tr>
<tr class="fde_row_1">
<td style="border-right: 1px solid black">tcp (36)</td>
- <td><font color=#333333><i>324</i></font></td>
- <td><font color=#333333><i>324</i></font></td>
<td><font color=#333333><i>325</i></font></td>
<td><font color=#333333><i>325</i></font></td>
+ <td><font color=#333333><i>326</i></font></td>
+ <td><font color=#333333><i>326</i></font></td>
</tr>
@@ -323,17 +323,8 @@
<td><font color=#333333><i>260</i></font></td>
</tr>
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">tcp (36)</td>
- <td><font color=#333333><i>261</i></font></td>
- <td><font color=#333333><i>261</i></font></td>
- <td><font color=#333333><i>261</i></font></td>
- <td><font color=#333333><i>261</i></font></td>
- </tr>
-
</table>
-<br>21/192 entries populated<br>
+<br>20/192 entries populated<br>
</div></div><br><br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('resub_table');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#resub_table">Resubmit Table</a> <br><br><div id="resub_table" style="display: block;">
@@ -370,7 +361,7 @@
<td width=50 style="border: 1px solid black" align=center>112-119</td>
<td width=50 style="border: 1px solid black" align=center>120-127</td>
</tr><tr><td width=50 align=right>PHV </td>
-<td height=50 colspan=1 align=center bgcolor=#DDDDDD>82</td>
+<td height=50 colspan=1 align=center bgcolor=#DDDDDD>81</td>
<td height=50 colspan=15 align=center bgcolor=#FFFFFF>----</td>
</tr></table><br />
<table border=0 style="border: 1px solid black;"><tr><td width=50 align=right>POV </td>
@@ -394,12 +385,12 @@
<td height=50 colspan=16 align=center bgcolor=#FFFFFF>----</td>
</tr></table><br />
<table border=0 style="text-align: center; border: 1px solid black; border-bottom: 0px; border-spacing: 0px;"><tr><td>POV</td><td>Use</td><td>Location</td><td>Expression</td></tr>
-<tr class=fde_row_0><td height=50 width=50>0</td><td>packet_in_hdr</td><td>PHV 82 bit 0</td><td>(phv[82] & 0x1)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>1</td><td>packet_out_hdr</td><td>PHV 82 bit 1</td><td>(phv[82] & 0x2)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>2</td><td>ethernet</td><td>PHV 82 bit 2</td><td>(phv[82] & 0x4)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>3</td><td>ipv4</td><td>PHV 82 bit 3</td><td>(phv[82] & 0x8)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>4</td><td>tcp</td><td>PHV 82 bit 4</td><td>(phv[82] & 0x10)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>5</td><td>udp</td><td>PHV 82 bit 5</td><td>(phv[82] & 0x20)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>0</td><td>packet_in_hdr</td><td>PHV 81 bit 0</td><td>(phv[81] & 0x1)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>1</td><td>packet_out_hdr</td><td>PHV 81 bit 1</td><td>(phv[81] & 0x2)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>2</td><td>ethernet</td><td>PHV 81 bit 2</td><td>(phv[81] & 0x4)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>3</td><td>ipv4</td><td>PHV 81 bit 3</td><td>(phv[81] & 0x8)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>4</td><td>tcp</td><td>PHV 81 bit 4</td><td>(phv[81] & 0x10)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>5</td><td>udp</td><td>PHV 81 bit 5</td><td>(phv[81] & 0x20)</td></tr>
<tr class=fde_row_0><td height=50 width=50>6-254</td><td>----</td><td> </td><td> </td></tr>
</table>
</div></div><br><br>
@@ -409,7 +400,7 @@
<tr><td><center>POV</center></td><td colspan=4><center>PHV</center></td></tr>
<tr class="fde_row_0">
- <td style="border-right: 1px solid black">packet_out_hdr (1)</td>
+ <td style="border-right: 1px solid black">packet_in_hdr (0)</td>
<td><font color=#333333><i>340</i></font></td>
<td><font color=#333333><i>340</i></font></td>
<td>-</td>
@@ -418,9 +409,9 @@
<tr class="fde_row_1">
- <td style="border-right: 1px solid black">packet_in_hdr (0)</td>
- <td>145</td>
- <td>145</td>
+ <td style="border-right: 1px solid black">packet_out_hdr (1)</td>
+ <td><font color=#333333><i>340</i></font></td>
+ <td><font color=#333333><i>340</i></font></td>
<td>-</td>
<td>-</td>
</tr>
@@ -578,7 +569,7 @@
</div></div><br><br>
</td></tr>
</table>
-<br><i>Created on Thu Sep 7 13:57:10 2017</i>
+<br><i>Created on Fri Sep 8 08:24:46 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/mau.html b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/mau.html
index a31b9c1..3adfa0d 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/mau.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/mau.html
@@ -4,7 +4,7 @@
<div id="content" style="width: 100%; height: 100%">
<h1>Pipeline 0 -- default</h1>
-<h3>Stages Occupied: 3</h3>
+<h3>Stages Occupied: 2</h3>
<h3>Resource Usage Summary</h3>
<table border="1">
<tr>
@@ -29,35 +29,15 @@
</tr>
<tr>
<td align="center">0</td>
-<td align="center">2</td>
-<td align="center">0</td>
-<td align="center">2</td>
-<td align="center">0</td>
-<td align="center">2</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">1</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">2</td>
-</tr>
-<tr>
-<td align="center">1</td>
<td align="center">1</td>
<td align="center">16</td>
<td align="center">1</td>
<td align="center">0</td>
-<td align="center">1</td>
-<td align="center">3</td>
-<td align="center">3</td>
-<td align="center">3</td>
<td align="center">2</td>
+<td align="center">3</td>
+<td align="center">3</td>
+<td align="center">3</td>
+<td align="center">3</td>
<td align="center">0</td>
<td align="center">1</td>
<td align="center">0</td>
@@ -65,10 +45,10 @@
<td align="center">0</td>
<td align="center">2</td>
<td align="center">1</td>
-<td align="center">1</td>
+<td align="center">2</td>
</tr>
<tr>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">2</td>
<td align="center">0</td>
<td align="center">9</td>
@@ -88,6 +68,26 @@
<td align="center">2</td>
</tr>
<tr>
+<td align="center">2</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+</tr>
+<tr>
<td align="center">3</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -289,11 +289,11 @@
</tr>
<tr>
<td align="center">Totals</td>
-<td align="center">5</td>
+<td align="center">3</td>
<td align="center">16</td>
-<td align="center">12</td>
+<td align="center">10</td>
<td align="center">0</td>
-<td align="center">5</td>
+<td align="center">4</td>
<td align="center">7</td>
<td align="center">7</td>
<td align="center">3</td>
@@ -305,7 +305,7 @@
<td align="center">0</td>
<td align="center">2</td>
<td align="center">1</td>
-<td align="center">5</td>
+<td align="center">4</td>
</tr>
</table>
<h3>Resource Percentage Summary</h3>
@@ -332,35 +332,15 @@
</tr>
<tr>
<td align="center">0</td>
-<td align="center" bgcolor="#07fe00" >1.56%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#02fe00" >0.48%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#3ffe00" >12.50%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#0ffe00" >3.12%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#3ffe00" >12.50%</td>
-</tr>
-<tr>
-<td align="center">1</td>
<td align="center" bgcolor="#03fe00" >0.78%</td>
<td align="center" bgcolor="#7bfe00" >24.24%</td>
<td align="center" bgcolor="#01fe00" >0.24%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#1ffe00" >6.25%</td>
+<td align="center" bgcolor="#3ffe00" >12.50%</td>
<td align="center" bgcolor="#13fe00" >3.75%</td>
<td align="center" bgcolor="#1ffe00" >6.25%</td>
<td align="center" bgcolor="#3ffe00" >12.50%</td>
-<td align="center" bgcolor="#1ffe00" >6.25%</td>
+<td align="center" bgcolor="#2ffe00" >9.38%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#7ffe00" >25.00%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
@@ -368,10 +348,10 @@
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#1ffe00" >6.25%</td>
<td align="center" bgcolor="#0ffe00" >3.12%</td>
-<td align="center" bgcolor="#1ffe00" >6.25%</td>
+<td align="center" bgcolor="#3ffe00" >12.50%</td>
</tr>
<tr>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center" bgcolor="#07fe00" >1.56%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#0bfe00" >2.16%</td>
@@ -391,6 +371,26 @@
<td align="center" bgcolor="#3ffe00" >12.50%</td>
</tr>
<tr>
+<td align="center">2</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+</tr>
+<tr>
<td align="center">3</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
@@ -592,11 +592,11 @@
</tr>
<tr>
<td align="center">Average</td>
-<td align="center" bgcolor="#01fe00" >0.33%</td>
+<td align="center" bgcolor="#01fe00" >0.20%</td>
<td align="center" bgcolor="#0afe00" >2.02%</td>
-<td align="center" bgcolor="#01fe00" >0.24%</td>
+<td align="center" bgcolor="#01fe00" >0.20%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#0dfe00" >2.60%</td>
+<td align="center" bgcolor="#0afe00" >2.08%</td>
<td align="center" bgcolor="#03fe00" >0.73%</td>
<td align="center" bgcolor="#06fe00" >1.22%</td>
<td align="center" bgcolor="#05fe00" >1.04%</td>
@@ -608,7 +608,7 @@
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#02fe00" >0.52%</td>
<td align="center" bgcolor="#01fe00" >0.26%</td>
-<td align="center" bgcolor="#0dfe00" >2.60%</td>
+<td align="center" bgcolor="#0afe00" >2.08%</td>
</tr>
</table>
<h2>Phase 0 is not in use.</h2>
@@ -618,2633 +618,8 @@
<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
<rect x="16" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 0 in exact Group 0 (parity group 0)
contains:
- {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]} for table _condition_3
-</title></rect>
-<rect x="16" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 1 in exact Group 0 (parity group 0)
-contains:
{unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]} for table _condition_0
</title></rect>
-<rect x="16" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 2 in exact Group 0 (parity group 0)</title></rect>
-<rect x="16" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 3 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 4 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 5 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 6 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 7 in exact Group 0 (parity group 0)</title></rect>
-<rect x="40" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 8 in exact Group 0 (parity group 1)</title></rect>
-<rect x="40" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 9 in exact Group 0 (parity group 1)</title></rect>
-<rect x="40" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 10 in exact Group 0 (parity group 1)</title></rect>
-<rect x="40" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 11 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 12 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 13 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 14 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 15 in exact Group 0 (parity group 1)</title></rect>
-<rect x="16" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 16 in exact Group 1 (parity group 2)</title></rect>
-<rect x="16" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 17 in exact Group 1 (parity group 2)</title></rect>
-<rect x="16" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 18 in exact Group 1 (parity group 2)</title></rect>
-<rect x="16" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 19 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 20 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 21 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 22 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 23 in exact Group 1 (parity group 2)</title></rect>
-<rect x="40" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 24 in exact Group 1 (parity group 3)</title></rect>
-<rect x="40" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 25 in exact Group 1 (parity group 3)</title></rect>
-<rect x="40" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 26 in exact Group 1 (parity group 3)</title></rect>
-<rect x="40" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 27 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 28 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 29 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 30 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 31 in exact Group 1 (parity group 3)</title></rect>
-<rect x="16" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 32 in exact Group 2 (parity group 4)</title></rect>
-<rect x="16" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 33 in exact Group 2 (parity group 4)</title></rect>
-<rect x="16" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 34 in exact Group 2 (parity group 4)</title></rect>
-<rect x="16" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 35 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 36 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 37 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 38 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 39 in exact Group 2 (parity group 4)</title></rect>
-<rect x="40" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 40 in exact Group 2 (parity group 5)</title></rect>
-<rect x="40" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 41 in exact Group 2 (parity group 5)</title></rect>
-<rect x="40" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 42 in exact Group 2 (parity group 5)</title></rect>
-<rect x="40" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 43 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 44 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 45 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 46 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 47 in exact Group 2 (parity group 5)</title></rect>
-<rect x="16" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 48 in exact Group 3 (parity group 6)</title></rect>
-<rect x="16" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 49 in exact Group 3 (parity group 6)</title></rect>
-<rect x="16" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 50 in exact Group 3 (parity group 6)</title></rect>
-<rect x="16" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 51 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 52 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 53 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 54 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 55 in exact Group 3 (parity group 6)</title></rect>
-<rect x="40" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 56 in exact Group 3 (parity group 7)</title></rect>
-<rect x="40" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 57 in exact Group 3 (parity group 7)</title></rect>
-<rect x="40" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 58 in exact Group 3 (parity group 7)</title></rect>
-<rect x="40" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 59 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 60 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 61 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 62 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 63 in exact Group 3 (parity group 7)</title></rect>
-<rect x="16" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 64 in exact Group 4 (parity group 8)</title></rect>
-<rect x="16" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 65 in exact Group 4 (parity group 8)</title></rect>
-<rect x="16" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 66 in exact Group 4 (parity group 8)</title></rect>
-<rect x="16" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 67 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 68 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 69 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 70 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 71 in exact Group 4 (parity group 8)</title></rect>
-<rect x="40" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 72 in exact Group 4 (parity group 9)</title></rect>
-<rect x="40" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 73 in exact Group 4 (parity group 9)</title></rect>
-<rect x="40" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 74 in exact Group 4 (parity group 9)</title></rect>
-<rect x="40" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 75 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 76 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 77 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 78 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 79 in exact Group 4 (parity group 9)</title></rect>
-<rect x="16" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 80 in exact Group 5 (parity group 10)</title></rect>
-<rect x="16" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 81 in exact Group 5 (parity group 10)</title></rect>
-<rect x="16" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 82 in exact Group 5 (parity group 10)</title></rect>
-<rect x="16" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 83 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 84 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 85 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 86 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 87 in exact Group 5 (parity group 10)</title></rect>
-<rect x="40" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 88 in exact Group 5 (parity group 11)</title></rect>
-<rect x="40" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 89 in exact Group 5 (parity group 11)</title></rect>
-<rect x="40" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 90 in exact Group 5 (parity group 11)</title></rect>
-<rect x="40" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 91 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 92 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 93 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 94 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 95 in exact Group 5 (parity group 11)</title></rect>
-<rect x="16" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 96 in exact Group 6 (parity group 12)</title></rect>
-<rect x="16" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 97 in exact Group 6 (parity group 12)</title></rect>
-<rect x="16" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 98 in exact Group 6 (parity group 12)</title></rect>
-<rect x="16" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 99 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 100 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 101 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 102 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 103 in exact Group 6 (parity group 12)</title></rect>
-<rect x="40" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 104 in exact Group 6 (parity group 13)</title></rect>
-<rect x="40" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 105 in exact Group 6 (parity group 13)</title></rect>
-<rect x="40" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 106 in exact Group 6 (parity group 13)</title></rect>
-<rect x="40" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 107 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 108 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 109 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 110 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 111 in exact Group 6 (parity group 13)</title></rect>
-<rect x="16" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 112 in exact Group 7 (parity group 14)</title></rect>
-<rect x="16" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 113 in exact Group 7 (parity group 14)</title></rect>
-<rect x="16" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 114 in exact Group 7 (parity group 14)</title></rect>
-<rect x="16" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 115 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 116 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 117 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 118 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 119 in exact Group 7 (parity group 14)</title></rect>
-<rect x="40" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 120 in exact Group 7 (parity group 15)</title></rect>
-<rect x="40" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 121 in exact Group 7 (parity group 15)</title></rect>
-<rect x="40" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 122 in exact Group 7 (parity group 15)</title></rect>
-<rect x="40" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 123 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 124 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 125 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 126 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 127 in exact Group 7 (parity group 15)</title></rect>
-<rect x="16" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 128 in ternary Group 0</title></rect>
-<rect x="16" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 129 in ternary Group 0</title></rect>
-<rect x="24" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 130 in ternary Group 0</title></rect>
-<rect x="24" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 131 in ternary Group 0</title></rect>
-<rect x="32" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 132 in ternary Group 0</title></rect>
-<rect x="48" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 133 in ternary Group 0</title></rect>
-<rect x="16" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 134 in ternary Group 1</title></rect>
-<rect x="16" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 135 in ternary Group 1</title></rect>
-<rect x="24" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 136 in ternary Group 1</title></rect>
-<rect x="24" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 137 in ternary Group 1</title></rect>
-<rect x="32" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 138 in ternary Group 1</title></rect>
-<rect x="16" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 139 in ternary Group 2</title></rect>
-<rect x="16" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 140 in ternary Group 2</title></rect>
-<rect x="24" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 141 in ternary Group 2</title></rect>
-<rect x="24" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 142 in ternary Group 2</title></rect>
-<rect x="32" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 143 in ternary Group 2</title></rect>
-<rect x="48" y="432" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 144 in ternary Group 1</title></rect>
-<rect x="16" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 145 in ternary Group 3</title></rect>
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-<rect x="24" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 158 in ternary Group 5</title></rect>
-<rect x="24" y="496" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 159 in ternary Group 5</title></rect>
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-<rect x="24" y="520" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 164 in ternary Group 6</title></rect>
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-<rect x="16" y="544" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 168 in ternary Group 7</title></rect>
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-<rect x="16" y="568" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 173 in ternary Group 8</title></rect>
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-<rect x="16" y="592" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 179 in ternary Group 9</title></rect>
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-<rect x="16" y="616" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 184 in ternary Group 10</title></rect>
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- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="456" y="104" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 4 Col: 10
- Unit Number: 58
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="456" y="80" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 5 Col: 10
- Unit Number: 70
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="456" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 6 Col: 10
- Unit Number: 82
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="456" y="32" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 7 Col: 10
- Unit Number: 94
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 0 Col: 11
- Unit Number: 11
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="176" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 1 Col: 11
- Unit Number: 23
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="152" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 2 Col: 11
- Unit Number: 35
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="128" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 3 Col: 11
- Unit Number: 47
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="104" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 4 Col: 11
- Unit Number: 59
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="80" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 5 Col: 11
- Unit Number: 71
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 6 Col: 11
- Unit Number: 83
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="32" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 7 Col: 11
- Unit Number: 95
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<text x="98" y="342" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="14" heightAdjust="spacingAndGlyphs" style="fill:black;">TCAMs</text>
-<rect x="96" y="616" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 0 Col: 0
- Unit Number: 0
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="592" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 1 Col: 0
- Unit Number: 1
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="568" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 2 Col: 0
- Unit Number: 2
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="544" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 3 Col: 0
- Unit Number: 3
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="520" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 4 Col: 0
- Unit Number: 4
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="496" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 5 Col: 0
- Unit Number: 5
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="472" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 6 Col: 0
- Unit Number: 6
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="448" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 7 Col: 0
- Unit Number: 7
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="424" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 8 Col: 0
- Unit Number: 8
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 9 Col: 0
- Unit Number: 9
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 10 Col: 0
- Unit Number: 10
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 11 Col: 0
- Unit Number: 11
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="616" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 0 Col: 1
- Unit Number: 12
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="592" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 1 Col: 1
- Unit Number: 13
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="568" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 2 Col: 1
- Unit Number: 14
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="544" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 3 Col: 1
- Unit Number: 15
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="520" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 4 Col: 1
- Unit Number: 16
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="496" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 5 Col: 1
- Unit Number: 17
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="472" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 6 Col: 1
- Unit Number: 18
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="448" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 7 Col: 1
- Unit Number: 19
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="424" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 8 Col: 1
- Unit Number: 20
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 9 Col: 1
- Unit Number: 21
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 10 Col: 1
- Unit Number: 22
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 11 Col: 1
- Unit Number: 23
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<text x="82" y="254" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Distr.</text>
-<rect x="80" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 0
- Group ID: 0
-</title></rect>
-<rect x="88" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 0
- Group ID: 1
-</title></rect>
-<rect x="96" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 0
- Group ID: 2
-</title></rect>
-<rect x="104" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 1
- Group ID: 0
-</title></rect>
-<rect x="112" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 1
- Group ID: 1
-</title></rect>
-<rect x="120" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 1
- Group ID: 2
-</title></rect>
-<text x="170" y="238" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Bits</text>
-<rect x="176" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 0</title></rect>
-<rect x="184" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 0</title></rect>
-<rect x="192" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 0</title></rect>
-<rect x="200" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 0</title></rect>
-<rect x="208" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 0</title></rect>
-<rect x="216" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 0</title></rect>
-<rect x="224" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 0</title></rect>
-<rect x="232" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 0</title></rect>
-<rect x="240" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 0</title></rect>
-<rect x="248" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 0</title></rect>
-<rect x="256" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 0</title></rect>
-<rect x="264" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 0</title></rect>
-<rect x="272" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 0</title></rect>
-<rect x="176" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 0</title></rect>
-<rect x="184" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 0</title></rect>
-<rect x="192" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 0</title></rect>
-<rect x="200" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 0</title></rect>
-<rect x="208" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 0</title></rect>
-<rect x="216" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 0</title></rect>
-<rect x="224" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 0</title></rect>
-<rect x="232" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 0</title></rect>
-<rect x="240" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 0</title></rect>
-<rect x="248" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 0</title></rect>
-<rect x="256" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 0</title></rect>
-<rect x="264" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 0</title></rect>
-<rect x="272" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 0</title></rect>
-<rect x="176" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 0</title></rect>
-<rect x="184" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 0</title></rect>
-<rect x="192" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 0</title></rect>
-<rect x="200" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 0</title></rect>
-<rect x="208" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 0</title></rect>
-<rect x="216" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 0</title></rect>
-<rect x="224" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 0</title></rect>
-<rect x="232" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 0</title></rect>
-<rect x="240" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 0</title></rect>
-<rect x="248" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 0</title></rect>
-<rect x="256" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 0</title></rect>
-<rect x="264" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 0</title></rect>
-<rect x="272" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 0</title></rect>
-<rect x="176" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 0</title></rect>
-<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Hash Bit 40 in hash match group 0
-Occupied by: _condition_3 for ('ig_intr_md_for_tm.copy_to_cpu', 0)</title></rect>
-<rect x="192" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Hash Bit 41 in hash match group 0
-Occupied by: _condition_0 for ('--validity_check--packet_out_hdr', 0)</title></rect>
-<rect x="200" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 0</title></rect>
-<rect x="208" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 0</title></rect>
-<rect x="216" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 0</title></rect>
-<rect x="224" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 0</title></rect>
-<rect x="232" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 0</title></rect>
-<rect x="240" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 0</title></rect>
-<rect x="248" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 0</title></rect>
-<rect x="256" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 0</title></rect>
-<rect x="264" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 0</title></rect>
-<rect x="272" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 0</title></rect>
-<rect x="296" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 1</title></rect>
-<rect x="304" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 1</title></rect>
-<rect x="312" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 1</title></rect>
-<rect x="320" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 1</title></rect>
-<rect x="328" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 1</title></rect>
-<rect x="336" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 1</title></rect>
-<rect x="344" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 1</title></rect>
-<rect x="352" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 1</title></rect>
-<rect x="360" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 1</title></rect>
-<rect x="368" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 1</title></rect>
-<rect x="376" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 1</title></rect>
-<rect x="384" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 1</title></rect>
-<rect x="392" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 1</title></rect>
-<rect x="296" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 1</title></rect>
-<rect x="304" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 1</title></rect>
-<rect x="312" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 1</title></rect>
-<rect x="320" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 1</title></rect>
-<rect x="328" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 1</title></rect>
-<rect x="336" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 1</title></rect>
-<rect x="344" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 1</title></rect>
-<rect x="352" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 1</title></rect>
-<rect x="360" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 1</title></rect>
-<rect x="368" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 1</title></rect>
-<rect x="376" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 1</title></rect>
-<rect x="384" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 1</title></rect>
-<rect x="392" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 1</title></rect>
-<rect x="296" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 1</title></rect>
-<rect x="304" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 1</title></rect>
-<rect x="312" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 1</title></rect>
-<rect x="320" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 1</title></rect>
-<rect x="328" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 1</title></rect>
-<rect x="336" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 1</title></rect>
-<rect x="344" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 1</title></rect>
-<rect x="352" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 1</title></rect>
-<rect x="360" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 1</title></rect>
-<rect x="368" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 1</title></rect>
-<rect x="376" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 1</title></rect>
-<rect x="384" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 1</title></rect>
-<rect x="392" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 1</title></rect>
-<rect x="296" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 1</title></rect>
-<rect x="304" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 1</title></rect>
-<rect x="312" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 1</title></rect>
-<rect x="320" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 1</title></rect>
-<rect x="328" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 1</title></rect>
-<rect x="336" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 1</title></rect>
-<rect x="344" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 1</title></rect>
-<rect x="352" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 1</title></rect>
-<rect x="360" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 1</title></rect>
-<rect x="368" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 1</title></rect>
-<rect x="376" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 1</title></rect>
-<rect x="384" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 1</title></rect>
-<rect x="392" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 1</title></rect>
-<rect x="176" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 2</title></rect>
-<rect x="184" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 2</title></rect>
-<rect x="192" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 2</title></rect>
-<rect x="200" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 2</title></rect>
-<rect x="208" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 2</title></rect>
-<rect x="216" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 2</title></rect>
-<rect x="224" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 2</title></rect>
-<rect x="232" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 2</title></rect>
-<rect x="240" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 2</title></rect>
-<rect x="248" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 2</title></rect>
-<rect x="256" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 2</title></rect>
-<rect x="264" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 2</title></rect>
-<rect x="272" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 2</title></rect>
-<rect x="176" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 2</title></rect>
-<rect x="184" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 2</title></rect>
-<rect x="192" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 2</title></rect>
-<rect x="200" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 2</title></rect>
-<rect x="208" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 2</title></rect>
-<rect x="216" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 2</title></rect>
-<rect x="224" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 2</title></rect>
-<rect x="232" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 2</title></rect>
-<rect x="240" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 2</title></rect>
-<rect x="248" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 2</title></rect>
-<rect x="256" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 2</title></rect>
-<rect x="264" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 2</title></rect>
-<rect x="272" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 2</title></rect>
-<rect x="176" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 2</title></rect>
-<rect x="184" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 2</title></rect>
-<rect x="192" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 2</title></rect>
-<rect x="200" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 2</title></rect>
-<rect x="208" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 2</title></rect>
-<rect x="216" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 2</title></rect>
-<rect x="224" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 2</title></rect>
-<rect x="232" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 2</title></rect>
-<rect x="240" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 2</title></rect>
-<rect x="248" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 2</title></rect>
-<rect x="256" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 2</title></rect>
-<rect x="264" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 2</title></rect>
-<rect x="272" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 2</title></rect>
-<rect x="176" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 2</title></rect>
-<rect x="184" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 2</title></rect>
-<rect x="192" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 2</title></rect>
-<rect x="200" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 2</title></rect>
-<rect x="208" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 2</title></rect>
-<rect x="216" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 2</title></rect>
-<rect x="224" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 2</title></rect>
-<rect x="232" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 2</title></rect>
-<rect x="240" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 2</title></rect>
-<rect x="248" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 2</title></rect>
-<rect x="256" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 2</title></rect>
-<rect x="264" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 2</title></rect>
-<rect x="272" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 2</title></rect>
-<rect x="296" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 3</title></rect>
-<rect x="304" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 3</title></rect>
-<rect x="312" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 3</title></rect>
-<rect x="320" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 3</title></rect>
-<rect x="328" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 3</title></rect>
-<rect x="336" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 3</title></rect>
-<rect x="344" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 3</title></rect>
-<rect x="352" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 3</title></rect>
-<rect x="360" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 3</title></rect>
-<rect x="368" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 3</title></rect>
-<rect x="376" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 3</title></rect>
-<rect x="384" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 3</title></rect>
-<rect x="392" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 3</title></rect>
-<rect x="296" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 3</title></rect>
-<rect x="304" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 3</title></rect>
-<rect x="312" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 3</title></rect>
-<rect x="320" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 3</title></rect>
-<rect x="328" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 3</title></rect>
-<rect x="336" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 3</title></rect>
-<rect x="344" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 3</title></rect>
-<rect x="352" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 3</title></rect>
-<rect x="360" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 3</title></rect>
-<rect x="368" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 3</title></rect>
-<rect x="376" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 3</title></rect>
-<rect x="384" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 3</title></rect>
-<rect x="392" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 3</title></rect>
-<rect x="296" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 3</title></rect>
-<rect x="304" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 3</title></rect>
-<rect x="312" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 3</title></rect>
-<rect x="320" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 3</title></rect>
-<rect x="328" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 3</title></rect>
-<rect x="336" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 3</title></rect>
-<rect x="344" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 3</title></rect>
-<rect x="352" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 3</title></rect>
-<rect x="360" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 3</title></rect>
-<rect x="368" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 3</title></rect>
-<rect x="376" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 3</title></rect>
-<rect x="384" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 3</title></rect>
-<rect x="392" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 3</title></rect>
-<rect x="296" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 3</title></rect>
-<rect x="304" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 3</title></rect>
-<rect x="312" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 3</title></rect>
-<rect x="320" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 3</title></rect>
-<rect x="328" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 3</title></rect>
-<rect x="336" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 3</title></rect>
-<rect x="344" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 3</title></rect>
-<rect x="352" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 3</title></rect>
-<rect x="360" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 3</title></rect>
-<rect x="368" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 3</title></rect>
-<rect x="376" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 3</title></rect>
-<rect x="384" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 3</title></rect>
-<rect x="392" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 3</title></rect>
-<rect x="176" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 4</title></rect>
-<rect x="184" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 4</title></rect>
-<rect x="192" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 4</title></rect>
-<rect x="200" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 4</title></rect>
-<rect x="208" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 4</title></rect>
-<rect x="216" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 4</title></rect>
-<rect x="224" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 4</title></rect>
-<rect x="232" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 4</title></rect>
-<rect x="240" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 4</title></rect>
-<rect x="248" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 4</title></rect>
-<rect x="256" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 4</title></rect>
-<rect x="264" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 4</title></rect>
-<rect x="272" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 4</title></rect>
-<rect x="176" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 4</title></rect>
-<rect x="184" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 4</title></rect>
-<rect x="192" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 4</title></rect>
-<rect x="200" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 4</title></rect>
-<rect x="208" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 4</title></rect>
-<rect x="216" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 4</title></rect>
-<rect x="224" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 4</title></rect>
-<rect x="232" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 4</title></rect>
-<rect x="240" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 4</title></rect>
-<rect x="248" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 4</title></rect>
-<rect x="256" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 4</title></rect>
-<rect x="264" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 4</title></rect>
-<rect x="272" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 4</title></rect>
-<rect x="176" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 4</title></rect>
-<rect x="184" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 4</title></rect>
-<rect x="192" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 4</title></rect>
-<rect x="200" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 4</title></rect>
-<rect x="208" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 4</title></rect>
-<rect x="216" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 4</title></rect>
-<rect x="224" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 4</title></rect>
-<rect x="232" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 4</title></rect>
-<rect x="240" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 4</title></rect>
-<rect x="248" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 4</title></rect>
-<rect x="256" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 4</title></rect>
-<rect x="264" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 4</title></rect>
-<rect x="272" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 4</title></rect>
-<rect x="176" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 4</title></rect>
-<rect x="184" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 4</title></rect>
-<rect x="192" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 4</title></rect>
-<rect x="200" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 4</title></rect>
-<rect x="208" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 4</title></rect>
-<rect x="216" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 4</title></rect>
-<rect x="224" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 4</title></rect>
-<rect x="232" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 4</title></rect>
-<rect x="240" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 4</title></rect>
-<rect x="248" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 4</title></rect>
-<rect x="256" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 4</title></rect>
-<rect x="264" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 4</title></rect>
-<rect x="272" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 4</title></rect>
-<rect x="296" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 5</title></rect>
-<rect x="304" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 5</title></rect>
-<rect x="312" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 5</title></rect>
-<rect x="320" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 5</title></rect>
-<rect x="328" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 5</title></rect>
-<rect x="336" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 5</title></rect>
-<rect x="344" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 5</title></rect>
-<rect x="352" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 5</title></rect>
-<rect x="360" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 5</title></rect>
-<rect x="368" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 5</title></rect>
-<rect x="376" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 5</title></rect>
-<rect x="384" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 5</title></rect>
-<rect x="392" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 5</title></rect>
-<rect x="296" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 5</title></rect>
-<rect x="304" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 5</title></rect>
-<rect x="312" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 5</title></rect>
-<rect x="320" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 5</title></rect>
-<rect x="328" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 5</title></rect>
-<rect x="336" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 5</title></rect>
-<rect x="344" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 5</title></rect>
-<rect x="352" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 5</title></rect>
-<rect x="360" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 5</title></rect>
-<rect x="368" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 5</title></rect>
-<rect x="376" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 5</title></rect>
-<rect x="384" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 5</title></rect>
-<rect x="392" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 5</title></rect>
-<rect x="296" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 5</title></rect>
-<rect x="304" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 5</title></rect>
-<rect x="312" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 5</title></rect>
-<rect x="320" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 5</title></rect>
-<rect x="328" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 5</title></rect>
-<rect x="336" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 5</title></rect>
-<rect x="344" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 5</title></rect>
-<rect x="352" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 5</title></rect>
-<rect x="360" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 5</title></rect>
-<rect x="368" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 5</title></rect>
-<rect x="376" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 5</title></rect>
-<rect x="384" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 5</title></rect>
-<rect x="392" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 5</title></rect>
-<rect x="296" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 5</title></rect>
-<rect x="304" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 5</title></rect>
-<rect x="312" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 5</title></rect>
-<rect x="320" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 5</title></rect>
-<rect x="328" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 5</title></rect>
-<rect x="336" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 5</title></rect>
-<rect x="344" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 5</title></rect>
-<rect x="352" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 5</title></rect>
-<rect x="360" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 5</title></rect>
-<rect x="368" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 5</title></rect>
-<rect x="376" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 5</title></rect>
-<rect x="384" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 5</title></rect>
-<rect x="392" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 5</title></rect>
-<rect x="176" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 6</title></rect>
-<rect x="184" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 6</title></rect>
-<rect x="192" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 6</title></rect>
-<rect x="200" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 6</title></rect>
-<rect x="208" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 6</title></rect>
-<rect x="216" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 6</title></rect>
-<rect x="224" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 6</title></rect>
-<rect x="232" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 6</title></rect>
-<rect x="240" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 6</title></rect>
-<rect x="248" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 6</title></rect>
-<rect x="256" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 6</title></rect>
-<rect x="264" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 6</title></rect>
-<rect x="272" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 6</title></rect>
-<rect x="176" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 6</title></rect>
-<rect x="184" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 6</title></rect>
-<rect x="192" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 6</title></rect>
-<rect x="200" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 6</title></rect>
-<rect x="208" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 6</title></rect>
-<rect x="216" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 6</title></rect>
-<rect x="224" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 6</title></rect>
-<rect x="232" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 6</title></rect>
-<rect x="240" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 6</title></rect>
-<rect x="248" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 6</title></rect>
-<rect x="256" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 6</title></rect>
-<rect x="264" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 6</title></rect>
-<rect x="272" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 6</title></rect>
-<rect x="176" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 6</title></rect>
-<rect x="184" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 6</title></rect>
-<rect x="192" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 6</title></rect>
-<rect x="200" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 6</title></rect>
-<rect x="208" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 6</title></rect>
-<rect x="216" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 6</title></rect>
-<rect x="224" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 6</title></rect>
-<rect x="232" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 6</title></rect>
-<rect x="240" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 6</title></rect>
-<rect x="248" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 6</title></rect>
-<rect x="256" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 6</title></rect>
-<rect x="264" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 6</title></rect>
-<rect x="272" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 6</title></rect>
-<rect x="176" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 6</title></rect>
-<rect x="184" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 6</title></rect>
-<rect x="192" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 6</title></rect>
-<rect x="200" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 6</title></rect>
-<rect x="208" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 6</title></rect>
-<rect x="216" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 6</title></rect>
-<rect x="224" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 6</title></rect>
-<rect x="232" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 6</title></rect>
-<rect x="240" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 6</title></rect>
-<rect x="248" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 6</title></rect>
-<rect x="256" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 6</title></rect>
-<rect x="264" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 6</title></rect>
-<rect x="272" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 6</title></rect>
-<rect x="296" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 7</title></rect>
-<rect x="304" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 7</title></rect>
-<rect x="312" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 7</title></rect>
-<rect x="320" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 7</title></rect>
-<rect x="328" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 7</title></rect>
-<rect x="336" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 7</title></rect>
-<rect x="344" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 7</title></rect>
-<rect x="352" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 7</title></rect>
-<rect x="360" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 7</title></rect>
-<rect x="368" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 7</title></rect>
-<rect x="376" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 7</title></rect>
-<rect x="384" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 7</title></rect>
-<rect x="392" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 7</title></rect>
-<rect x="296" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 7</title></rect>
-<rect x="304" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 7</title></rect>
-<rect x="312" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 7</title></rect>
-<rect x="320" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 7</title></rect>
-<rect x="328" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 7</title></rect>
-<rect x="336" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 7</title></rect>
-<rect x="344" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 7</title></rect>
-<rect x="352" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 7</title></rect>
-<rect x="360" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 7</title></rect>
-<rect x="368" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 7</title></rect>
-<rect x="376" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 7</title></rect>
-<rect x="384" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 7</title></rect>
-<rect x="392" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 7</title></rect>
-<rect x="296" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 7</title></rect>
-<rect x="304" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 7</title></rect>
-<rect x="312" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 7</title></rect>
-<rect x="320" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 7</title></rect>
-<rect x="328" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 7</title></rect>
-<rect x="336" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 7</title></rect>
-<rect x="344" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 7</title></rect>
-<rect x="352" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 7</title></rect>
-<rect x="360" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 7</title></rect>
-<rect x="368" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 7</title></rect>
-<rect x="376" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 7</title></rect>
-<rect x="384" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 7</title></rect>
-<rect x="392" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 7</title></rect>
-<rect x="296" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 7</title></rect>
-<rect x="304" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 7</title></rect>
-<rect x="312" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 7</title></rect>
-<rect x="320" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 7</title></rect>
-<rect x="328" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 7</title></rect>
-<rect x="336" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 7</title></rect>
-<rect x="344" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 7</title></rect>
-<rect x="352" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 7</title></rect>
-<rect x="360" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 7</title></rect>
-<rect x="368" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 7</title></rect>
-<rect x="376" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 7</title></rect>
-<rect x="384" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 7</title></rect>
-<rect x="392" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 7</title></rect>
-<text x="66" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Gateways</text>
-<rect x="72" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 0
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 1
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 2
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 3
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 4
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 5
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 6
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 7
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 8
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 9
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 10
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 11
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 12
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 13
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Gateway Table Gateway:
- Unit: 14
- Entry Bit Width: 44
- Depth: 4
- Occupied By: _condition_0</title></rect>
-<rect x="72" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Gateway Table Gateway:
- Unit: 15
- Entry Bit Width: 44
- Depth: 4
- Occupied By: _condition_3</title></rect>
-<text x="242" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Stashes</text>
-<rect x="248" y="208" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 0
- Unit ID: 0
- Global ID: 0
-</title></rect>
-<rect x="248" y="200" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 0
- Unit ID: 1
- Global ID: 1
-</title></rect>
-<rect x="248" y="184" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 1
- Unit ID: 0
- Global ID: 2
-</title></rect>
-<rect x="248" y="176" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 1
- Unit ID: 1
- Global ID: 3
-</title></rect>
-<rect x="248" y="160" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 2
- Unit ID: 0
- Global ID: 4
-</title></rect>
-<rect x="248" y="152" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 2
- Unit ID: 1
- Global ID: 5
-</title></rect>
-<rect x="248" y="136" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 3
- Unit ID: 0
- Global ID: 6
-</title></rect>
-<rect x="248" y="128" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 3
- Unit ID: 1
- Global ID: 7
-</title></rect>
-<rect x="248" y="112" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 4
- Unit ID: 0
- Global ID: 8
-</title></rect>
-<rect x="248" y="104" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 4
- Unit ID: 1
- Global ID: 9
-</title></rect>
-<rect x="248" y="88" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 5
- Unit ID: 0
- Global ID: 10
-</title></rect>
-<rect x="248" y="80" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 5
- Unit ID: 1
- Global ID: 11
-</title></rect>
-<rect x="248" y="64" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 6
- Unit ID: 0
- Global ID: 12
-</title></rect>
-<rect x="248" y="56" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 6
- Unit ID: 1
- Global ID: 13
-</title></rect>
-<rect x="248" y="40" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 7
- Unit ID: 0
- Global ID: 14
-</title></rect>
-<rect x="248" y="32" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 7
- Unit ID: 1
- Global ID: 15
-</title></rect>
-<text x="282" y="22" textLength="38" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Map RAMs</text>
-<rect x="280" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 0
- Unit Number: 0
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 1
- Unit Number: 1
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 2
- Unit Number: 2
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 3
- Unit Number: 3
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 4
- Unit Number: 4
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 5
- Unit Number: 5
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 0
- Unit Number: 6
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 1
- Unit Number: 7
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 2
- Unit Number: 8
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 3
- Unit Number: 9
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 4
- Unit Number: 10
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 5
- Unit Number: 11
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 0
- Unit Number: 12
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 1
- Unit Number: 13
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 2
- Unit Number: 14
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 3
- Unit Number: 15
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 4
- Unit Number: 16
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 5
- Unit Number: 17
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 0
- Unit Number: 18
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 1
- Unit Number: 19
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 2
- Unit Number: 20
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 3
- Unit Number: 21
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 4
- Unit Number: 22
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 5
- Unit Number: 23
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 0
- Unit Number: 24
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 1
- Unit Number: 25
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 2
- Unit Number: 26
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 3
- Unit Number: 27
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 4
- Unit Number: 28
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 5
- Unit Number: 29
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 5 Unit: 0
- Unit Number: 30
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 5 Unit: 1
- Unit Number: 31
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 5 Unit: 2
- Unit Number: 32
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 5 Unit: 3
- Unit Number: 33
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 5 Unit: 4
- Unit Number: 34
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 5 Unit: 5
- Unit Number: 35
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 6 Unit: 0
- Unit Number: 36
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 6 Unit: 1
- Unit Number: 37
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 6 Unit: 2
- Unit Number: 38
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 6 Unit: 3
- Unit Number: 39
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 6 Unit: 4
- Unit Number: 40
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 6 Unit: 5
- Unit Number: 41
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 7 Unit: 0
- Unit Number: 42
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 7 Unit: 1
- Unit Number: 43
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 7 Unit: 2
- Unit Number: 44
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 7 Unit: 3
- Unit Number: 45
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 7 Unit: 4
- Unit Number: 46
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 7 Unit: 5
- Unit Number: 47
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<text x="338" y="22" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">ALUs</text>
-<rect x="336" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
- Unit: 0 right</title></rect>
-<rect x="336" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
- Unit: 2 right</title></rect>
-<rect x="336" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
- Unit: 4 right</title></rect>
-<rect x="336" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
- Unit: 6 right</title></rect>
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- Unit: 1 right</title></rect>
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- Byte Number: 10
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- Byte Number: 11
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- Byte Number: 12
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- Byte Number: 13
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- Byte Number: 14
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- Byte Number: 15
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- Byte Number: 16
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- Byte Number: 17
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- Byte Number: 18
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- Byte Number: 19
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- Byte Number: 20
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- Byte Number: 21
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- Byte Number: 22
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- Byte Number: 23
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- Byte Number: 24
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- Byte Number: 25
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- Byte Number: 26
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- Byte Number: 27
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- Byte Number: 28
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- Byte Number: 29
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- Byte Number: 30
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- Byte Number: 32
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- Byte Number: 33
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- Byte Number: 34
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- Byte Number: 35
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- Byte Number: 36
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- Byte Number: 37
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- Byte Number: 38
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- Byte Number: 39
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- Byte Number: 40
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- Byte Number: 41
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- Byte Number: 42
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- Byte Number: 43
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- Byte Number: 98
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- Byte Number: 99
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- Byte Number: 100
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- Byte Number: 101
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- Byte Number: 102
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- Byte Number: 103
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- Byte Number: 104
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- Byte Number: 105
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- Byte Number: 106
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- Byte Number: 107
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- Byte Number: 108
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- Byte Number: 109
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- Byte Number: 110
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- Byte Number: 111
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- Byte Number: 112
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- Byte Number: 113
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- Byte Number: 114
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- Byte Number: 115
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- Byte Number: 116
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- Byte Number: 117
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- Byte Number: 118
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- Byte Number: 119
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- Byte Number: 120
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- Byte Number: 121
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- Byte Number: 122
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- Byte Number: 123
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- Byte Number: 124
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- Byte Number: 125
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- Byte Number: 126
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- Byte Number: 127
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- ID: 2
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- ID: 3
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- ID: 4
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- ID: 5
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- ID: 6
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- ID: 7
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- ID: 8
-</title></rect>
-<rect x="256" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 9
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- ID: 10
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-<rect x="272" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 11
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-<rect x="280" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 12
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-<rect x="288" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 13
-</title></rect>
-<rect x="296" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 14
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-<rect x="304" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 15
-</title></rect>
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- Unit: 0</title></rect>
-<rect x="568" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 1</title></rect>
-<rect x="576" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 2</title></rect>
-<rect x="584" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 3</title></rect>
-<rect x="560" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 4</title></rect>
-<rect x="568" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 5</title></rect>
-<rect x="576" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 6</title></rect>
-<rect x="584" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 7</title></rect>
-<rect x="560" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 8</title></rect>
-<rect x="568" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 9</title></rect>
-<rect x="576" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 10</title></rect>
-<rect x="584" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 11</title></rect>
-<rect x="560" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 12</title></rect>
-<rect x="568" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 13</title></rect>
-<rect x="576" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 14</title></rect>
-<rect x="584" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 15</title></rect>
-<rect x="560" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 16</title></rect>
-<rect x="568" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 17</title></rect>
-<rect x="576" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 18</title></rect>
-<rect x="584" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 19</title></rect>
-<rect x="560" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 20</title></rect>
-<rect x="568" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 21</title></rect>
-<rect x="576" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 22</title></rect>
-<rect x="584" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 23</title></rect>
-<rect x="560" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 24</title></rect>
-<rect x="568" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 25</title></rect>
-<rect x="576" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 26</title></rect>
-<rect x="584" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 27</title></rect>
-<rect x="560" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 28</title></rect>
-<rect x="568" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 29</title></rect>
-<rect x="576" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 30</title></rect>
-<rect x="584" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 31</title></rect>
-<rect x="560" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 32</title></rect>
-<rect x="568" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 33</title></rect>
-<rect x="576" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 34</title></rect>
-<rect x="584" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 35</title></rect>
-<rect x="560" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 36</title></rect>
-<rect x="568" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 37</title></rect>
-<rect x="576" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 38</title></rect>
-<rect x="584" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 39</title></rect>
-<rect x="560" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 40</title></rect>
-<rect x="568" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 41</title></rect>
-<rect x="576" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 42</title></rect>
-<rect x="584" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 43</title></rect>
-<rect x="560" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 44</title></rect>
-<rect x="568" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 45</title></rect>
-<rect x="576" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 46</title></rect>
-<rect x="584" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 47</title></rect>
-<rect x="560" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 48</title></rect>
-<rect x="568" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 49</title></rect>
-<rect x="576" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 50</title></rect>
-<rect x="584" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 51</title></rect>
-<rect x="560" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 52</title></rect>
-<rect x="568" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 53</title></rect>
-<rect x="576" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 54</title></rect>
-<rect x="584" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 55</title></rect>
-<rect x="560" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 56</title></rect>
-<rect x="568" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 57</title></rect>
-<rect x="576" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 58</title></rect>
-<rect x="584" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 59</title></rect>
-<rect x="560" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 60</title></rect>
-<rect x="568" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 61</title></rect>
-<rect x="576" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 62</title></rect>
-<rect x="584" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 63</title></rect>
-<rect x="600" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 0</title></rect>
-<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 1</title></rect>
-<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>16-bit ALU:
- Unit: 2
- Occupied By:
-For Match Table ingress_pkt's action _packet_out:
- deposit-field Instruction at PHV Container Number: 130 has bit width 23
-</title></rect>
-<rect x="624" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 3</title></rect>
-<rect x="600" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 4</title></rect>
-<rect x="608" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 5</title></rect>
-<rect x="616" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 6</title></rect>
-<rect x="624" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 7</title></rect>
-<rect x="600" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 8</title></rect>
-<rect x="608" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 9</title></rect>
-<rect x="616" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 10</title></rect>
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- Unit: 11</title></rect>
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- Unit: 12</title></rect>
-<rect x="608" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 13</title></rect>
-<rect x="616" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 14</title></rect>
-<rect x="624" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 15</title></rect>
-<rect x="600" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 16</title></rect>
-<rect x="608" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>16-bit ALU:
- Unit: 17
- Occupied By:
-For Match Table egress_pkt's action add_packet_in_hdr:
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- Unit: 18</title></rect>
-<rect x="624" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 19</title></rect>
-<rect x="600" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 20</title></rect>
-<rect x="608" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 21</title></rect>
-<rect x="616" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 22</title></rect>
-<rect x="624" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 23</title></rect>
-<rect x="600" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 24</title></rect>
-<rect x="608" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 25</title></rect>
-<rect x="616" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 26</title></rect>
-<rect x="624" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 27</title></rect>
-<rect x="600" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 28</title></rect>
-<rect x="608" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 29</title></rect>
-<rect x="616" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 30</title></rect>
-<rect x="624" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 31</title></rect>
-<rect x="600" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 32</title></rect>
-<rect x="608" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 33</title></rect>
-<rect x="616" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 34</title></rect>
-<rect x="624" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 35</title></rect>
-<rect x="600" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 36</title></rect>
-<rect x="608" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 37</title></rect>
-<rect x="616" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 38</title></rect>
-<rect x="624" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 39</title></rect>
-<rect x="600" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 40</title></rect>
-<rect x="608" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 41</title></rect>
-<rect x="616" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 42</title></rect>
-<rect x="624" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 43</title></rect>
-<rect x="600" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 44</title></rect>
-<rect x="608" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 45</title></rect>
-<rect x="616" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 46</title></rect>
-<rect x="624" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 47</title></rect>
-<rect x="600" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 48</title></rect>
-<rect x="608" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 49</title></rect>
-<rect x="616" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 50</title></rect>
-<rect x="624" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 51</title></rect>
-<rect x="600" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 52</title></rect>
-<rect x="608" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 53</title></rect>
-<rect x="616" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 54</title></rect>
-<rect x="624" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 55</title></rect>
-<rect x="600" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 56</title></rect>
-<rect x="608" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 57</title></rect>
-<rect x="616" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 58</title></rect>
-<rect x="624" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 59</title></rect>
-<rect x="600" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 60</title></rect>
-<rect x="608" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 61</title></rect>
-<rect x="616" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 62</title></rect>
-<rect x="624" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 63</title></rect>
-<rect x="600" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 64</title></rect>
-<rect x="608" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 65</title></rect>
-<rect x="616" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 66</title></rect>
-<rect x="624" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 67</title></rect>
-<rect x="600" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 68</title></rect>
-<rect x="608" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 69</title></rect>
-<rect x="616" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 70</title></rect>
-<rect x="624" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 71</title></rect>
-<rect x="600" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 72</title></rect>
-<rect x="608" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 73</title></rect>
-<rect x="616" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 74</title></rect>
-<rect x="624" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 75</title></rect>
-<rect x="600" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 76</title></rect>
-<rect x="608" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 77</title></rect>
-<rect x="616" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 78</title></rect>
-<rect x="624" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 79</title></rect>
-<rect x="600" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 80</title></rect>
-<rect x="608" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 81</title></rect>
-<rect x="616" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 82</title></rect>
-<rect x="624" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 83</title></rect>
-<rect x="600" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 84</title></rect>
-<rect x="608" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 85</title></rect>
-<rect x="616" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 86</title></rect>
-<rect x="624" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 87</title></rect>
-<rect x="600" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 88</title></rect>
-<rect x="608" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 89</title></rect>
-<rect x="616" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 90</title></rect>
-<rect x="624" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 91</title></rect>
-<rect x="600" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 92</title></rect>
-<rect x="608" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 93</title></rect>
-<rect x="616" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 94</title></rect>
-<rect x="624" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 95</title></rect>
-<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 0</title></rect>
-<rect x="648" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 1</title></rect>
-<rect x="656" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 2</title></rect>
-<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>8-bit ALU:
- Unit: 3
- Occupied By:
-For Match Table ingress_pkt's action _packet_out:
- deposit-field Instruction at PHV Container Number: 67 has bit width 20
-</title></rect>
-<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 4</title></rect>
-<rect x="648" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 5</title></rect>
-<rect x="656" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 6</title></rect>
-<rect x="664" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 7</title></rect>
-<rect x="640" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 8</title></rect>
-<rect x="648" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 9</title></rect>
-<rect x="656" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 10</title></rect>
-<rect x="664" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 11</title></rect>
-<rect x="640" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 12</title></rect>
-<rect x="648" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 13</title></rect>
-<rect x="656" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 14</title></rect>
-<rect x="664" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 15</title></rect>
-<rect x="640" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 16</title></rect>
-<rect x="648" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 17</title></rect>
-<rect x="656" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>8-bit ALU:
- Unit: 18
- Occupied By:
-For Match Table egress_pkt's action add_packet_in_hdr:
- deposit-field Instruction at PHV Container Number: 82 has bit width 20
-</title></rect>
-<rect x="664" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 19</title></rect>
-<rect x="640" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 20</title></rect>
-<rect x="648" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 21</title></rect>
-<rect x="656" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 22</title></rect>
-<rect x="664" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 23</title></rect>
-<rect x="640" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 24</title></rect>
-<rect x="648" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 25</title></rect>
-<rect x="656" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 26</title></rect>
-<rect x="664" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 27</title></rect>
-<rect x="640" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 28</title></rect>
-<rect x="648" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 29</title></rect>
-<rect x="656" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 30</title></rect>
-<rect x="664" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 31</title></rect>
-<rect x="640" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 32</title></rect>
-<rect x="648" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 33</title></rect>
-<rect x="656" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 34</title></rect>
-<rect x="664" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 35</title></rect>
-<rect x="640" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 36</title></rect>
-<rect x="648" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 37</title></rect>
-<rect x="656" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 38</title></rect>
-<rect x="664" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 39</title></rect>
-<rect x="640" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 40</title></rect>
-<rect x="648" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 41</title></rect>
-<rect x="656" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 42</title></rect>
-<rect x="664" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 43</title></rect>
-<rect x="640" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 44</title></rect>
-<rect x="648" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 45</title></rect>
-<rect x="656" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 46</title></rect>
-<rect x="664" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 47</title></rect>
-<rect x="640" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 48</title></rect>
-<rect x="648" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 49</title></rect>
-<rect x="656" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 50</title></rect>
-<rect x="664" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 51</title></rect>
-<rect x="640" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 52</title></rect>
-<rect x="648" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 53</title></rect>
-<rect x="656" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 54</title></rect>
-<rect x="664" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 55</title></rect>
-<rect x="640" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 56</title></rect>
-<rect x="648" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 57</title></rect>
-<rect x="656" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 58</title></rect>
-<rect x="664" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 59</title></rect>
-<rect x="640" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 60</title></rect>
-<rect x="648" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 61</title></rect>
-<rect x="656" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 62</title></rect>
-<rect x="664" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 63</title></rect>
-<text x="570" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
-<text x="738" y="78" style="fill:black; font-weight:bold;">Ingress Tables</text>
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-<text x="738" y="102" style="fill:black;">ingress_pkt</text>
-<text x="738" y="126" style="fill:black; font-weight:bold;">Egress Tables</text>
-<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>egress_pkt</title></rect>
-<text x="738" y="150" style="fill:black;">egress_pkt</text>
-<rect x="720" y="168" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
-
-<line x1="720" y1="168" x2="736" y2="184" style="stroke:black; stroke-width:2" />
-<line x1="720" y1="184" x2="736" y2="168" style="stroke:black; stroke-width:2" />
-<text x="738" y="182" style="fill:black;">Unavailable</text>
-<rect x="704" y="24" width="240" height="184" style="stroke:black; stroke-width:1; fill:none""></rect>
-<rect x="712" y="32" width="224" height="168" style="stroke:black; stroke-width:1; fill:none""></rect>
-<text x="978" y="54" style="fill:black;">Totals</text>
-<text x="986" y="78" style="fill:black;">Exact Match Input xbar</text>
-<text x="994" y="102" style="fill:black;"> 2 of 128 (1.56%)</text>
-<text x="986" y="126" style="fill:black;">Ternary Match Input xbar</text>
-<text x="994" y="150" style="fill:black;"> 0 of 66 (0.00%)</text>
-<text x="986" y="174" style="fill:black;">Hash Bit</text>
-<text x="994" y="198" style="fill:black;"> 2 of 416 (0.48%)</text>
-<text x="986" y="222" style="fill:black;">Hash Dist Unit</text>
-<text x="994" y="246" style="fill:black;"> 0 of 6 (0.00%)</text>
-<text x="986" y="270" style="fill:black;">Gateway</text>
-<text x="994" y="294" style="fill:black;"> 2 of 16 (12.50%)</text>
-<text x="986" y="318" style="fill:black;">SRAM</text>
-<text x="994" y="342" style="fill:black;"> 0 of 80 (0.00%)</text>
-<text x="986" y="366" style="fill:black;">Map RAM</text>
-<text x="994" y="390" style="fill:black;"> 0 of 48 (0.00%)</text>
-<text x="986" y="414" style="fill:black;">TCAM</text>
-<text x="994" y="438" style="fill:black;"> 0 of 24 (0.00%)</text>
-<text x="986" y="462" style="fill:black;">VLIW Instr</text>
-<text x="994" y="486" style="fill:black;"> 1 of 32 (3.12%)</text>
-<text x="986" y="510" style="fill:black;">Meter ALU</text>
-<text x="994" y="534" style="fill:black;"> 0 of 4 (0.00%)</text>
-<text x="986" y="558" style="fill:black;">Stats ALU</text>
-<text x="994" y="582" style="fill:black;"> 0 of 4 (0.00%)</text>
-<text x="986" y="606" style="fill:black;">Stash</text>
-<text x="994" y="630" style="fill:black;"> 0 of 16 (0.00%)</text>
-<text x="986" y="654" style="fill:black;">Action Data Bus Bytes</text>
-<text x="994" y="678" style="fill:black;"> 0 of 128 (0.00%)</text>
-<text x="986" y="702" style="fill:black;">Logical TableID</text>
-<text x="994" y="726" style="fill:black;"> 2 of 16 (12.50%)</text>
-<rect x="960" y="24" width="240" height="728" style="stroke:black; stroke-width:1; fill:none""></rect>
-<rect x="968" y="32" width="224" height="712" style="stroke:black; stroke-width:1; fill:none""></rect>
-<rect x="0" y="0" width="680" height="672" style="stroke:black; stroke-width:2; fill:none""></rect>
-</svg><br>
-
-<h2>MAU Stage 1</h2>
-<svg width="95%" height="95%" viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
-<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
-<rect x="16" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 0 in exact Group 0 (parity group 0)
-contains:
- {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]} for table _condition_1
-</title></rect>
<rect x="16" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 1 in exact Group 0 (parity group 0)</title></rect>
<rect x="16" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 2 in exact Group 0 (parity group 0)</title></rect>
<rect x="16" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 3 in exact Group 0 (parity group 0)</title></rect>
@@ -3372,68 +747,68 @@
<rect x="48" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 125 in exact Group 7 (parity group 15)</title></rect>
<rect x="48" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 126 in exact Group 7 (parity group 15)</title></rect>
<rect x="48" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 127 in exact Group 7 (parity group 15)</title></rect>
-<rect x="16" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 128 in ternary Group 0
+<rect x="16" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 128 in ternary Group 0
contains:
{ethernet.srcAddr[7:0]} for table table0
</title></rect>
-<rect x="16" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 129 in ternary Group 0
+<rect x="16" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 129 in ternary Group 0
contains:
{ethernet.srcAddr[15:8]} for table table0
</title></rect>
-<rect x="24" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 130 in ternary Group 0
+<rect x="24" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 130 in ternary Group 0
contains:
{ethernet.srcAddr[23:16]} for table table0
</title></rect>
-<rect x="24" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 131 in ternary Group 0
+<rect x="24" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 131 in ternary Group 0
contains:
{ethernet.srcAddr[31:24]} for table table0
</title></rect>
-<rect x="32" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 132 in ternary Group 0
+<rect x="32" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 132 in ternary Group 0
contains:
{ethernet.dstAddr[15:8]} for table table0
</title></rect>
-<rect x="48" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 133 in ternary Group 0
+<rect x="48" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 133 in ternary Group 0
contains:
version/valid
{unused[6:0], ig_intr_md.ingress_port[8:8]} for table table0
</title></rect>
-<rect x="16" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 134 in ternary Group 1
+<rect x="16" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 134 in ternary Group 1
contains:
{ethernet.dstAddr[31:24]} for table table0
</title></rect>
-<rect x="16" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 135 in ternary Group 1
+<rect x="16" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 135 in ternary Group 1
contains:
{ethernet.dstAddr[39:32]} for table table0
</title></rect>
-<rect x="24" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 136 in ternary Group 1
+<rect x="24" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 136 in ternary Group 1
contains:
{ethernet.etherType[7:0]} for table table0
</title></rect>
-<rect x="24" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 137 in ternary Group 1
+<rect x="24" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 137 in ternary Group 1
contains:
{ethernet.dstAddr[23:16]} for table table0
</title></rect>
-<rect x="32" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 138 in ternary Group 1
+<rect x="32" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 138 in ternary Group 1
contains:
{ethernet.srcAddr[47:40]} for table table0
</title></rect>
-<rect x="16" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 139 in ternary Group 2
+<rect x="16" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 139 in ternary Group 2
contains:
{ethernet.etherType[15:8]} for table table0
</title></rect>
-<rect x="16" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 140 in ternary Group 2
+<rect x="16" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 140 in ternary Group 2
contains:
{ig_intr_md.ingress_port[7:0]} for table table0
</title></rect>
-<rect x="24" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 141 in ternary Group 2
+<rect x="24" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 141 in ternary Group 2
contains:
{ethernet.dstAddr[7:0]} for table table0
</title></rect>
-<rect x="24" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 142 in ternary Group 2
+<rect x="24" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 142 in ternary Group 2
contains:
{ethernet.srcAddr[39:32]} for table table0
</title></rect>
-<rect x="32" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 143 in ternary Group 2
+<rect x="32" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 143 in ternary Group 2
contains:
{ethernet.dstAddr[47:40]} for table table0
</title></rect>
@@ -3489,7 +864,7 @@
<rect x="32" y="632" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 193 in ternary Group 11</title></rect>
<text x="146" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="14" heightAdjust="spacingAndGlyphs" style="fill:black;">SRAMs</text>
<text x="410" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="14" heightAdjust="spacingAndGlyphs" style="fill:black;">SRAMs</text>
-<rect x="144" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>SRAM:
+<rect x="144" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>SRAM:
Row: 0 Col: 2
Unit Number: 2
Entry Bit Width: 128
@@ -3700,7 +1075,7 @@
Unit Number: 66
Entry Bit Width: 128
Depth: 1024</title></rect>
-<rect x="360" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>SRAM:
+<rect x="360" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>SRAM:
Row: 6 Col: 6
Unit Number: 78
Entry Bit Width: 128
@@ -3763,7 +1138,7 @@
Unit Number: 67
Entry Bit Width: 128
Depth: 1024</title></rect>
-<rect x="384" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>SRAM:
+<rect x="384" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>SRAM:
Row: 6 Col: 7
Unit Number: 79
Entry Bit Width: 128
@@ -4083,7 +1458,7 @@
Entry Bit Width: 44
Result Bit width: 1
Depth: 512</title></rect>
-<rect x="120" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>TCAM:
+<rect x="120" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>TCAM:
Row: 9 Col: 1
Unit Number: 21
Entry Bit Width: 44
@@ -4096,7 +1471,7 @@
Entry bits [131:88]
Connected to buses:
Ram Data Bus TcamMatchSearch2 9 left_and_right is 44 bits</title></rect>
-<rect x="120" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>TCAM:
+<rect x="120" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>TCAM:
Row: 10 Col: 1
Unit Number: 22
Entry Bit Width: 44
@@ -4109,7 +1484,7 @@
Entry bits [87:44]
Connected to buses:
Ram Data Bus TcamMatchSearch2 10 left_and_right is 44 bits</title></rect>
-<rect x="120" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>TCAM:
+<rect x="120" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>TCAM:
Row: 11 Col: 1
Unit Number: 23
Entry Bit Width: 44
@@ -4188,8 +1563,8 @@
<rect x="264" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 0</title></rect>
<rect x="272" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 0</title></rect>
<rect x="176" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 0</title></rect>
-<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Hash Bit 40 in hash match group 0
-Occupied by: _condition_1 for ('--validity_check--packet_out_hdr', 0)</title></rect>
+<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Hash Bit 40 in hash match group 0
+Occupied by: _condition_0 for ('--validity_check--packet_out_hdr', 0)</title></rect>
<rect x="192" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 0</title></rect>
<rect x="200" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 0</title></rect>
<rect x="208" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 0</title></rect>
@@ -4622,15 +1997,16 @@
Unit: 13
Entry Bit Width: 44
Depth: 4</title></rect>
-<rect x="72" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+<rect x="72" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Gateway Table Gateway:
Unit: 14
Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Gateway Table Gateway:
+ Depth: 4
+ Occupied By: process_packet_out_table_always_true_condition</title></rect>
+<rect x="72" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Gateway Table Gateway:
Unit: 15
Entry Bit Width: 44
Depth: 4
- Occupied By: _condition_1</title></rect>
+ Occupied By: _condition_0</title></rect>
<text x="242" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Stashes</text>
<rect x="248" y="208" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
Row: 0
@@ -4893,7 +2269,7 @@
Unit Number: 35
Entry Bit Width: 11
Depth: 1024</title></rect>
-<rect x="280" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Map RAM:
+<rect x="280" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Map RAM:
Row: 6 Unit: 0
Unit Number: 36
Entry Bit Width: 11
@@ -4901,7 +2277,7 @@
Occupied By: table0_counter
Used For: synthetic two port
</title></rect>
-<rect x="288" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Map RAM:
+<rect x="288" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Map RAM:
Row: 6 Unit: 1
Unit Number: 37
Entry Bit Width: 11
@@ -4929,7 +2305,7 @@
Unit Number: 41
Entry Bit Width: 11
Depth: 1024</title></rect>
-<rect x="280" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Map RAM:
+<rect x="280" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Map RAM:
Row: 7 Unit: 0
Unit Number: 42
Entry Bit Width: 11
@@ -4971,7 +2347,7 @@
Unit: 2 right</title></rect>
<rect x="336" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
Unit: 4 right</title></rect>
-<rect x="336" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>128-bit Statistics ALU:
+<rect x="336" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>128-bit Statistics ALU:
Unit: 6 right
Occupied By: table0_counter</title></rect>
<rect x="336" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
@@ -4983,23 +2359,26 @@
<rect x="336" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
Unit: 7 right</title></rect>
<text x="514" y="222" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">VLIW</text>
-<rect x="512" y="232" width="32" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>VLIW Instruction:
+<rect x="512" y="232" width="32" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>VLIW Instruction:
Number: 0
Occupied By: Match Table table0's action set_egress_port
with color 1 and direction ingress
</title></rect>
-<rect x="512" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>VLIW Instruction:
+<rect x="512" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>VLIW Instruction:
Number: 1
Occupied By: Match Table table0's action send_to_cpu
with color 0 and direction ingress
</title></rect>
-<rect x="528" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>VLIW Instruction:
+<rect x="528" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>VLIW Instruction:
Number: 1
Occupied By: Match Table table0's action _drop
with color 1 and direction ingress
</title></rect>
-<rect x="512" y="248" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
- Number: 2</title></rect>
+<rect x="512" y="248" width="32" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>VLIW Instruction:
+ Number: 2
+ Occupied By: Match Table process_packet_out_table's action _process_packet_out
+ with color 0 and direction ingress
+</title></rect>
<rect x="512" y="256" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
Number: 3</title></rect>
<rect x="512" y="264" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
@@ -5448,13 +2827,14 @@
Byte Number: 127
</title></rect>
<text x="202" y="590" textLength="78" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Logical Table IDs</text>
-<rect x="184" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Logical Table ID:
+<rect x="184" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Logical Table ID:
ID: 0
Occupied By: table0</title></rect>
-<rect x="192" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+<rect x="192" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Logical Table ID:
ID: 1
-</title></rect>
+
+ Occupied By: process_packet_out_table</title></rect>
<rect x="200" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
ID: 2
</title></rect>
@@ -5628,13 +3008,23 @@
Unit: 63</title></rect>
<rect x="600" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
Unit: 0</title></rect>
-<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 1</title></rect>
-<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>16-bit ALU:
+<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>16-bit ALU:
+ Unit: 1
+ Occupied By:
+For Match Table table0's action send_to_cpu:
+ deposit-field Instruction at PHV Container Number: 129 has bit width 23
+</title></rect>
+<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>16-bit ALU:
Unit: 2
Occupied By:
For Match Table table0's action set_egress_port:
deposit-field Instruction at PHV Container Number: 130 has bit width 23
+
+For Match Table table0's action send_to_cpu:
+ deposit-field Instruction at PHV Container Number: 130 has bit width 23
+
+For Match Table process_packet_out_table's action _process_packet_out:
+ deposit-field Instruction at PHV Container Number: 130 has bit width 23
</title></rect>
<rect x="624" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
Unit: 3</title></rect>
@@ -5822,24 +3212,27 @@
Unit: 94</title></rect>
<rect x="624" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
Unit: 95</title></rect>
-<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>8-bit ALU:
- Unit: 0
- Occupied By:
-For Match Table table0's action send_to_cpu:
- deposit-field Instruction at PHV Container Number: 64 has bit width 20
-</title></rect>
+<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 0</title></rect>
<rect x="648" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
Unit: 1</title></rect>
-<rect x="656" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 2</title></rect>
-<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 3</title></rect>
-<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>8-bit ALU:
- Unit: 4
+<rect x="656" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>8-bit ALU:
+ Unit: 2
+ Occupied By:
+For Match Table table0's action send_to_cpu:
+ deposit-field Instruction at PHV Container Number: 66 has bit width 20
+
+For Match Table process_packet_out_table's action _process_packet_out:
+ deposit-field Instruction at PHV Container Number: 66 has bit width 20
+</title></rect>
+<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>8-bit ALU:
+ Unit: 3
Occupied By:
For Match Table table0's action _drop:
- deposit-field Instruction at PHV Container Number: 68 has bit width 20
+ deposit-field Instruction at PHV Container Number: 67 has bit width 20
</title></rect>
+<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 4</title></rect>
<rect x="648" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
Unit: 5</title></rect>
<rect x="656" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
@@ -5962,12 +3355,13 @@
<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
-<text x="738" y="78" style="fill:black; font-weight:bold;">Ingress Tables</text>
-<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>table0</title></rect>
+<rect x="720" y="64" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>process_packet_out_table</title></rect>
+<text x="738" y="78" style="fill:black;">process_packet_out_table</text>
+<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>table0</title></rect>
<text x="738" y="102" style="fill:black;">table0</text>
<rect x="720" y="112" width="16" height="16" style="stroke:black; stroke-width:1; fill:burlywood""><title>table0__action__</title></rect>
<text x="738" y="126" style="fill:black;">table0__action__</text>
-<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>table0_counter</title></rect>
+<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>table0_counter</title></rect>
<text x="738" y="150" style="fill:black;">table0_counter</text>
<rect x="720" y="168" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
@@ -5986,7 +3380,7 @@
<text x="986" y="222" style="fill:black;">Hash Dist Unit</text>
<text x="994" y="246" style="fill:black;"> 0 of 6 (0.00%)</text>
<text x="986" y="270" style="fill:black;">Gateway</text>
-<text x="994" y="294" style="fill:black;"> 1 of 16 (6.25%)</text>
+<text x="994" y="294" style="fill:black;"> 2 of 16 (12.50%)</text>
<text x="986" y="318" style="fill:black;">SRAM</text>
<text x="994" y="342" style="fill:black;"> 3 of 80 (3.75%)</text>
<text x="986" y="366" style="fill:black;">Map RAM</text>
@@ -5994,7 +3388,7 @@
<text x="986" y="414" style="fill:black;">TCAM</text>
<text x="994" y="438" style="fill:black;"> 3 of 24 (12.50%)</text>
<text x="986" y="462" style="fill:black;">VLIW Instr</text>
-<text x="994" y="486" style="fill:black;"> 2 of 32 (6.25%)</text>
+<text x="994" y="486" style="fill:black;"> 3 of 32 (9.38%)</text>
<text x="986" y="510" style="fill:black;">Meter ALU</text>
<text x="994" y="534" style="fill:black;"> 0 of 4 (0.00%)</text>
<text x="986" y="558" style="fill:black;">Stats ALU</text>
@@ -6004,13 +3398,13 @@
<text x="986" y="654" style="fill:black;">Action Data Bus Bytes</text>
<text x="994" y="678" style="fill:black;"> 4 of 128 (3.12%)</text>
<text x="986" y="702" style="fill:black;">Logical TableID</text>
-<text x="994" y="726" style="fill:black;"> 1 of 16 (6.25%)</text>
+<text x="994" y="726" style="fill:black;"> 2 of 16 (12.50%)</text>
<rect x="960" y="24" width="240" height="728" style="stroke:black; stroke-width:1; fill:none""></rect>
<rect x="968" y="32" width="224" height="712" style="stroke:black; stroke-width:1; fill:none""></rect>
<rect x="0" y="0" width="680" height="672" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
-<h2>MAU Stage 2</h2>
+<h2>MAU Stage 1</h2>
<svg width="95%" height="95%" viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
<rect x="16" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:chartreuse""><title>Crossbar Byte 0 in exact Group 0 (parity group 0)
@@ -8690,22 +6084,21 @@
<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
-<text x="738" y="78" style="fill:black; font-weight:bold;">Ingress Tables</text>
-<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:crimson""><title>egress_port_count_table</title></rect>
-<text x="738" y="102" style="fill:black;">egress_port_count_table</text>
-<rect x="720" y="112" width="16" height="16" style="stroke:black; stroke-width:1; fill:coral""><title>egress_port_counter</title></rect>
-<text x="738" y="126" style="fill:black;">egress_port_counter</text>
-<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:chartreuse""><title>ingress_port_count_table</title></rect>
-<text x="738" y="150" style="fill:black;">ingress_port_count_table</text>
-<rect x="720" y="160" width="16" height="16" style="stroke:black; stroke-width:1; fill:chocolate""><title>ingress_port_counter</title></rect>
-<text x="738" y="174" style="fill:black;">ingress_port_counter</text>
-<rect x="720" y="192" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
+<rect x="720" y="64" width="16" height="16" style="stroke:black; stroke-width:1; fill:crimson""><title>egress_port_count_table</title></rect>
+<text x="738" y="78" style="fill:black;">egress_port_count_table</text>
+<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:coral""><title>egress_port_counter</title></rect>
+<text x="738" y="102" style="fill:black;">egress_port_counter</text>
+<rect x="720" y="112" width="16" height="16" style="stroke:black; stroke-width:1; fill:chartreuse""><title>ingress_port_count_table</title></rect>
+<text x="738" y="126" style="fill:black;">ingress_port_count_table</text>
+<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:chocolate""><title>ingress_port_counter</title></rect>
+<text x="738" y="150" style="fill:black;">ingress_port_counter</text>
+<rect x="720" y="168" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
-<line x1="720" y1="192" x2="736" y2="208" style="stroke:black; stroke-width:2" />
-<line x1="720" y1="208" x2="736" y2="192" style="stroke:black; stroke-width:2" />
-<text x="738" y="206" style="fill:black;">Unavailable</text>
-<rect x="704" y="24" width="240" height="208" style="stroke:black; stroke-width:1; fill:none""></rect>
-<rect x="712" y="32" width="224" height="192" style="stroke:black; stroke-width:1; fill:none""></rect>
+<line x1="720" y1="168" x2="736" y2="184" style="stroke:black; stroke-width:2" />
+<line x1="720" y1="184" x2="736" y2="168" style="stroke:black; stroke-width:2" />
+<text x="738" y="182" style="fill:black;">Unavailable</text>
+<rect x="704" y="24" width="240" height="184" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="712" y="32" width="224" height="168" style="stroke:black; stroke-width:1; fill:none""></rect>
<text x="978" y="54" style="fill:black;">Totals</text>
<text x="986" y="78" style="fill:black;">Exact Match Input xbar</text>
<text x="994" y="102" style="fill:black;"> 2 of 128 (1.56%)</text>
@@ -8740,6 +6133,2589 @@
<rect x="0" y="0" width="680" height="672" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
+<h2>MAU Stage 2</h2>
+<svg width="95%" height="95%" viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
+<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
+<rect x="16" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 0 in exact Group 0 (parity group 0)</title></rect>
+<rect x="16" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 1 in exact Group 0 (parity group 0)</title></rect>
+<rect x="16" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 2 in exact Group 0 (parity group 0)</title></rect>
+<rect x="16" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 3 in exact Group 0 (parity group 0)</title></rect>
+<rect x="24" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 4 in exact Group 0 (parity group 0)</title></rect>
+<rect x="24" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 5 in exact Group 0 (parity group 0)</title></rect>
+<rect x="24" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 6 in exact Group 0 (parity group 0)</title></rect>
+<rect x="24" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 7 in exact Group 0 (parity group 0)</title></rect>
+<rect x="40" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 8 in exact Group 0 (parity group 1)</title></rect>
+<rect x="40" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 9 in exact Group 0 (parity group 1)</title></rect>
+<rect x="40" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 10 in exact Group 0 (parity group 1)</title></rect>
+<rect x="40" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 11 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 12 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 13 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 14 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 15 in exact Group 0 (parity group 1)</title></rect>
+<rect x="16" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 16 in exact Group 1 (parity group 2)</title></rect>
+<rect x="16" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 17 in exact Group 1 (parity group 2)</title></rect>
+<rect x="16" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 18 in exact Group 1 (parity group 2)</title></rect>
+<rect x="16" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 19 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 20 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 21 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 22 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 23 in exact Group 1 (parity group 2)</title></rect>
+<rect x="40" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 24 in exact Group 1 (parity group 3)</title></rect>
+<rect x="40" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 25 in exact Group 1 (parity group 3)</title></rect>
+<rect x="40" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 26 in exact Group 1 (parity group 3)</title></rect>
+<rect x="40" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 27 in exact Group 1 (parity group 3)</title></rect>
+<rect x="48" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 28 in exact Group 1 (parity group 3)</title></rect>
+<rect x="48" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 29 in exact Group 1 (parity group 3)</title></rect>
+<rect x="48" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 30 in exact Group 1 (parity group 3)</title></rect>
+<rect x="48" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 31 in exact Group 1 (parity group 3)</title></rect>
+<rect x="16" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 32 in exact Group 2 (parity group 4)</title></rect>
+<rect x="16" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 33 in exact Group 2 (parity group 4)</title></rect>
+<rect x="16" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 34 in exact Group 2 (parity group 4)</title></rect>
+<rect x="16" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 35 in exact Group 2 (parity group 4)</title></rect>
+<rect x="24" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 36 in exact Group 2 (parity group 4)</title></rect>
+<rect x="24" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 37 in exact Group 2 (parity group 4)</title></rect>
+<rect x="24" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 38 in exact Group 2 (parity group 4)</title></rect>
+<rect x="24" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 39 in exact Group 2 (parity group 4)</title></rect>
+<rect x="40" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 40 in exact Group 2 (parity group 5)</title></rect>
+<rect x="40" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 41 in exact Group 2 (parity group 5)</title></rect>
+<rect x="40" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 42 in exact Group 2 (parity group 5)</title></rect>
+<rect x="40" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 43 in exact Group 2 (parity group 5)</title></rect>
+<rect x="48" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 44 in exact Group 2 (parity group 5)</title></rect>
+<rect x="48" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 45 in exact Group 2 (parity group 5)</title></rect>
+<rect x="48" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 46 in exact Group 2 (parity group 5)</title></rect>
+<rect x="48" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 47 in exact Group 2 (parity group 5)</title></rect>
+<rect x="16" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 48 in exact Group 3 (parity group 6)</title></rect>
+<rect x="16" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 49 in exact Group 3 (parity group 6)</title></rect>
+<rect x="16" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 50 in exact Group 3 (parity group 6)</title></rect>
+<rect x="16" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 51 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 52 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 53 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 54 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 55 in exact Group 3 (parity group 6)</title></rect>
+<rect x="40" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 56 in exact Group 3 (parity group 7)</title></rect>
+<rect x="40" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 57 in exact Group 3 (parity group 7)</title></rect>
+<rect x="40" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 58 in exact Group 3 (parity group 7)</title></rect>
+<rect x="40" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 59 in exact Group 3 (parity group 7)</title></rect>
+<rect x="48" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 60 in exact Group 3 (parity group 7)</title></rect>
+<rect x="48" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 61 in exact Group 3 (parity group 7)</title></rect>
+<rect x="48" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 62 in exact Group 3 (parity group 7)</title></rect>
+<rect x="48" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 63 in exact Group 3 (parity group 7)</title></rect>
+<rect x="16" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 64 in exact Group 4 (parity group 8)</title></rect>
+<rect x="16" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 65 in exact Group 4 (parity group 8)</title></rect>
+<rect x="16" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 66 in exact Group 4 (parity group 8)</title></rect>
+<rect x="16" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 67 in exact Group 4 (parity group 8)</title></rect>
+<rect x="24" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 68 in exact Group 4 (parity group 8)</title></rect>
+<rect x="24" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 69 in exact Group 4 (parity group 8)</title></rect>
+<rect x="24" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 70 in exact Group 4 (parity group 8)</title></rect>
+<rect x="24" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 71 in exact Group 4 (parity group 8)</title></rect>
+<rect x="40" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 72 in exact Group 4 (parity group 9)</title></rect>
+<rect x="40" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 73 in exact Group 4 (parity group 9)</title></rect>
+<rect x="40" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 74 in exact Group 4 (parity group 9)</title></rect>
+<rect x="40" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 75 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 76 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 77 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 78 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 79 in exact Group 4 (parity group 9)</title></rect>
+<rect x="16" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 80 in exact Group 5 (parity group 10)</title></rect>
+<rect x="16" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 81 in exact Group 5 (parity group 10)</title></rect>
+<rect x="16" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 82 in exact Group 5 (parity group 10)</title></rect>
+<rect x="16" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 83 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 84 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 85 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 86 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 87 in exact Group 5 (parity group 10)</title></rect>
+<rect x="40" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 88 in exact Group 5 (parity group 11)</title></rect>
+<rect x="40" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 89 in exact Group 5 (parity group 11)</title></rect>
+<rect x="40" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 90 in exact Group 5 (parity group 11)</title></rect>
+<rect x="40" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 91 in exact Group 5 (parity group 11)</title></rect>
+<rect x="48" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 92 in exact Group 5 (parity group 11)</title></rect>
+<rect x="48" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 93 in exact Group 5 (parity group 11)</title></rect>
+<rect x="48" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 94 in exact Group 5 (parity group 11)</title></rect>
+<rect x="48" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 95 in exact Group 5 (parity group 11)</title></rect>
+<rect x="16" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 96 in exact Group 6 (parity group 12)</title></rect>
+<rect x="16" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 97 in exact Group 6 (parity group 12)</title></rect>
+<rect x="16" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 98 in exact Group 6 (parity group 12)</title></rect>
+<rect x="16" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 99 in exact Group 6 (parity group 12)</title></rect>
+<rect x="24" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 100 in exact Group 6 (parity group 12)</title></rect>
+<rect x="24" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 101 in exact Group 6 (parity group 12)</title></rect>
+<rect x="24" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 102 in exact Group 6 (parity group 12)</title></rect>
+<rect x="24" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 103 in exact Group 6 (parity group 12)</title></rect>
+<rect x="40" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 104 in exact Group 6 (parity group 13)</title></rect>
+<rect x="40" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 105 in exact Group 6 (parity group 13)</title></rect>
+<rect x="40" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 106 in exact Group 6 (parity group 13)</title></rect>
+<rect x="40" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 107 in exact Group 6 (parity group 13)</title></rect>
+<rect x="48" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 108 in exact Group 6 (parity group 13)</title></rect>
+<rect x="48" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 109 in exact Group 6 (parity group 13)</title></rect>
+<rect x="48" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 110 in exact Group 6 (parity group 13)</title></rect>
+<rect x="48" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 111 in exact Group 6 (parity group 13)</title></rect>
+<rect x="16" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 112 in exact Group 7 (parity group 14)</title></rect>
+<rect x="16" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 113 in exact Group 7 (parity group 14)</title></rect>
+<rect x="16" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 114 in exact Group 7 (parity group 14)</title></rect>
+<rect x="16" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 115 in exact Group 7 (parity group 14)</title></rect>
+<rect x="24" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 116 in exact Group 7 (parity group 14)</title></rect>
+<rect x="24" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 117 in exact Group 7 (parity group 14)</title></rect>
+<rect x="24" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 118 in exact Group 7 (parity group 14)</title></rect>
+<rect x="24" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 119 in exact Group 7 (parity group 14)</title></rect>
+<rect x="40" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 120 in exact Group 7 (parity group 15)</title></rect>
+<rect x="40" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 121 in exact Group 7 (parity group 15)</title></rect>
+<rect x="40" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 122 in exact Group 7 (parity group 15)</title></rect>
+<rect x="40" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 123 in exact Group 7 (parity group 15)</title></rect>
+<rect x="48" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 124 in exact Group 7 (parity group 15)</title></rect>
+<rect x="48" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 125 in exact Group 7 (parity group 15)</title></rect>
+<rect x="48" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 126 in exact Group 7 (parity group 15)</title></rect>
+<rect x="48" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 127 in exact Group 7 (parity group 15)</title></rect>
+<rect x="16" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 128 in ternary Group 0</title></rect>
+<rect x="16" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 129 in ternary Group 0</title></rect>
+<rect x="24" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 130 in ternary Group 0</title></rect>
+<rect x="24" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 131 in ternary Group 0</title></rect>
+<rect x="32" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 132 in ternary Group 0</title></rect>
+<rect x="48" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 133 in ternary Group 0</title></rect>
+<rect x="16" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 134 in ternary Group 1</title></rect>
+<rect x="16" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 135 in ternary Group 1</title></rect>
+<rect x="24" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 136 in ternary Group 1</title></rect>
+<rect x="24" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 137 in ternary Group 1</title></rect>
+<rect x="32" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 138 in ternary Group 1</title></rect>
+<rect x="16" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 139 in ternary Group 2</title></rect>
+<rect x="16" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 140 in ternary Group 2</title></rect>
+<rect x="24" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 141 in ternary Group 2</title></rect>
+<rect x="24" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 142 in ternary Group 2</title></rect>
+<rect x="32" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 143 in ternary Group 2</title></rect>
+<rect x="48" y="432" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 144 in ternary Group 1</title></rect>
+<rect x="16" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 145 in ternary Group 3</title></rect>
+<rect x="16" y="448" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 146 in ternary Group 3</title></rect>
+<rect x="24" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 147 in ternary Group 3</title></rect>
+<rect x="24" y="448" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 148 in ternary Group 3</title></rect>
+<rect x="32" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 149 in ternary Group 3</title></rect>
+<rect x="16" y="464" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 150 in ternary Group 4</title></rect>
+<rect x="16" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 151 in ternary Group 4</title></rect>
+<rect x="24" y="464" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 152 in ternary Group 4</title></rect>
+<rect x="24" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 153 in ternary Group 4</title></rect>
+<rect x="32" y="464" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 154 in ternary Group 4</title></rect>
+<rect x="48" y="480" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 155 in ternary Group 2</title></rect>
+<rect x="16" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 156 in ternary Group 5</title></rect>
+<rect x="16" y="496" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 157 in ternary Group 5</title></rect>
+<rect x="24" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 158 in ternary Group 5</title></rect>
+<rect x="24" y="496" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 159 in ternary Group 5</title></rect>
+<rect x="32" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 160 in ternary Group 5</title></rect>
+<rect x="16" y="512" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 161 in ternary Group 6</title></rect>
+<rect x="16" y="520" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 162 in ternary Group 6</title></rect>
+<rect x="24" y="512" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 163 in ternary Group 6</title></rect>
+<rect x="24" y="520" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 164 in ternary Group 6</title></rect>
+<rect x="32" y="512" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 165 in ternary Group 6</title></rect>
+<rect x="48" y="528" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 166 in ternary Group 3</title></rect>
+<rect x="16" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 167 in ternary Group 7</title></rect>
+<rect x="16" y="544" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 168 in ternary Group 7</title></rect>
+<rect x="24" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 169 in ternary Group 7</title></rect>
+<rect x="24" y="544" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 170 in ternary Group 7</title></rect>
+<rect x="32" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 171 in ternary Group 7</title></rect>
+<rect x="16" y="560" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 172 in ternary Group 8</title></rect>
+<rect x="16" y="568" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 173 in ternary Group 8</title></rect>
+<rect x="24" y="560" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 174 in ternary Group 8</title></rect>
+<rect x="24" y="568" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 175 in ternary Group 8</title></rect>
+<rect x="32" y="560" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 176 in ternary Group 8</title></rect>
+<rect x="48" y="576" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 177 in ternary Group 4</title></rect>
+<rect x="16" y="584" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 178 in ternary Group 9</title></rect>
+<rect x="16" y="592" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 179 in ternary Group 9</title></rect>
+<rect x="24" y="584" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 180 in ternary Group 9</title></rect>
+<rect x="24" y="592" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 181 in ternary Group 9</title></rect>
+<rect x="32" y="584" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 182 in ternary Group 9</title></rect>
+<rect x="16" y="608" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 183 in ternary Group 10</title></rect>
+<rect x="16" y="616" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 184 in ternary Group 10</title></rect>
+<rect x="24" y="608" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 185 in ternary Group 10</title></rect>
+<rect x="24" y="616" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 186 in ternary Group 10</title></rect>
+<rect x="32" y="608" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 187 in ternary Group 10</title></rect>
+<rect x="48" y="624" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 188 in ternary Group 5</title></rect>
+<rect x="16" y="632" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 189 in ternary Group 11</title></rect>
+<rect x="16" y="640" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 190 in ternary Group 11</title></rect>
+<rect x="24" y="632" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 191 in ternary Group 11</title></rect>
+<rect x="24" y="640" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 192 in ternary Group 11</title></rect>
+<rect x="32" y="632" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 193 in ternary Group 11</title></rect>
+<text x="146" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="14" heightAdjust="spacingAndGlyphs" style="fill:black;">SRAMs</text>
+<text x="410" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="14" heightAdjust="spacingAndGlyphs" style="fill:black;">SRAMs</text>
+<rect x="144" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 0 Col: 2
+ Unit Number: 2
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="144" y="176" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 1 Col: 2
+ Unit Number: 14
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="144" y="152" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 2 Col: 2
+ Unit Number: 26
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="144" y="128" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 3 Col: 2
+ Unit Number: 38
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="144" y="104" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 4 Col: 2
+ Unit Number: 50
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="144" y="80" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 5 Col: 2
+ Unit Number: 62
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="144" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 6 Col: 2
+ Unit Number: 74
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="144" y="32" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 7 Col: 2
+ Unit Number: 86
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="168" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 0 Col: 3
+ Unit Number: 3
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="168" y="176" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 1 Col: 3
+ Unit Number: 15
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="168" y="152" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 2 Col: 3
+ Unit Number: 27
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="168" y="128" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 3 Col: 3
+ Unit Number: 39
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="168" y="104" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 4 Col: 3
+ Unit Number: 51
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="168" y="80" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 5 Col: 3
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+<rect x="208" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 0</title></rect>
+<rect x="216" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 0</title></rect>
+<rect x="224" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 0</title></rect>
+<rect x="232" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 0</title></rect>
+<rect x="240" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 0</title></rect>
+<rect x="248" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 0</title></rect>
+<rect x="256" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 0</title></rect>
+<rect x="264" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 0</title></rect>
+<rect x="272" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 0</title></rect>
+<rect x="176" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 0</title></rect>
+<rect x="184" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 0</title></rect>
+<rect x="192" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 0</title></rect>
+<rect x="200" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 0</title></rect>
+<rect x="208" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 0</title></rect>
+<rect x="216" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 0</title></rect>
+<rect x="224" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 0</title></rect>
+<rect x="232" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 0</title></rect>
+<rect x="240" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 0</title></rect>
+<rect x="248" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 0</title></rect>
+<rect x="256" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 0</title></rect>
+<rect x="264" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 0</title></rect>
+<rect x="272" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 0</title></rect>
+<rect x="176" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 0</title></rect>
+<rect x="184" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 0</title></rect>
+<rect x="192" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 0</title></rect>
+<rect x="200" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 0</title></rect>
+<rect x="208" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 0</title></rect>
+<rect x="216" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 0</title></rect>
+<rect x="224" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 0</title></rect>
+<rect x="232" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 0</title></rect>
+<rect x="240" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 0</title></rect>
+<rect x="248" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 0</title></rect>
+<rect x="256" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 0</title></rect>
+<rect x="264" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 0</title></rect>
+<rect x="272" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 0</title></rect>
+<rect x="176" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 0</title></rect>
+<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 0</title></rect>
+<rect x="192" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 0</title></rect>
+<rect x="200" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 0</title></rect>
+<rect x="208" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 0</title></rect>
+<rect x="216" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 0</title></rect>
+<rect x="224" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 0</title></rect>
+<rect x="232" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 0</title></rect>
+<rect x="240" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 0</title></rect>
+<rect x="248" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 0</title></rect>
+<rect x="256" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 0</title></rect>
+<rect x="264" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 0</title></rect>
+<rect x="272" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 0</title></rect>
+<rect x="296" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 1</title></rect>
+<rect x="304" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 1</title></rect>
+<rect x="312" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 1</title></rect>
+<rect x="320" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 1</title></rect>
+<rect x="328" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 1</title></rect>
+<rect x="336" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 1</title></rect>
+<rect x="344" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 1</title></rect>
+<rect x="352" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 1</title></rect>
+<rect x="360" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 1</title></rect>
+<rect x="368" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 1</title></rect>
+<rect x="376" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 1</title></rect>
+<rect x="384" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 1</title></rect>
+<rect x="392" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 1</title></rect>
+<rect x="296" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 1</title></rect>
+<rect x="304" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 1</title></rect>
+<rect x="312" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 1</title></rect>
+<rect x="320" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 1</title></rect>
+<rect x="328" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 1</title></rect>
+<rect x="336" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 1</title></rect>
+<rect x="344" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 1</title></rect>
+<rect x="352" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 1</title></rect>
+<rect x="360" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 1</title></rect>
+<rect x="368" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 1</title></rect>
+<rect x="376" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 1</title></rect>
+<rect x="384" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 1</title></rect>
+<rect x="392" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 1</title></rect>
+<rect x="296" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 1</title></rect>
+<rect x="304" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 1</title></rect>
+<rect x="312" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 1</title></rect>
+<rect x="320" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 1</title></rect>
+<rect x="328" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 1</title></rect>
+<rect x="336" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 1</title></rect>
+<rect x="344" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 1</title></rect>
+<rect x="352" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 1</title></rect>
+<rect x="360" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 1</title></rect>
+<rect x="368" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 1</title></rect>
+<rect x="376" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 1</title></rect>
+<rect x="384" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 1</title></rect>
+<rect x="392" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 1</title></rect>
+<rect x="296" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 1</title></rect>
+<rect x="304" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 1</title></rect>
+<rect x="312" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 1</title></rect>
+<rect x="320" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 1</title></rect>
+<rect x="328" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 1</title></rect>
+<rect x="336" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 1</title></rect>
+<rect x="344" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 1</title></rect>
+<rect x="352" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 1</title></rect>
+<rect x="360" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 1</title></rect>
+<rect x="368" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 1</title></rect>
+<rect x="376" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 1</title></rect>
+<rect x="384" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 1</title></rect>
+<rect x="392" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 1</title></rect>
+<rect x="176" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 2</title></rect>
+<rect x="184" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 2</title></rect>
+<rect x="192" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 2</title></rect>
+<rect x="200" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 2</title></rect>
+<rect x="208" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 2</title></rect>
+<rect x="216" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 2</title></rect>
+<rect x="224" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 2</title></rect>
+<rect x="232" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 2</title></rect>
+<rect x="240" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 2</title></rect>
+<rect x="248" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 2</title></rect>
+<rect x="256" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 2</title></rect>
+<rect x="264" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 2</title></rect>
+<rect x="272" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 2</title></rect>
+<rect x="176" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 2</title></rect>
+<rect x="184" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 2</title></rect>
+<rect x="192" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 2</title></rect>
+<rect x="200" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 2</title></rect>
+<rect x="208" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 2</title></rect>
+<rect x="216" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 2</title></rect>
+<rect x="224" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 2</title></rect>
+<rect x="232" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 2</title></rect>
+<rect x="240" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 2</title></rect>
+<rect x="248" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 2</title></rect>
+<rect x="256" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 2</title></rect>
+<rect x="264" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 2</title></rect>
+<rect x="272" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 2</title></rect>
+<rect x="176" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 2</title></rect>
+<rect x="184" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 2</title></rect>
+<rect x="192" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 2</title></rect>
+<rect x="200" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 2</title></rect>
+<rect x="208" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 2</title></rect>
+<rect x="216" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 2</title></rect>
+<rect x="224" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 2</title></rect>
+<rect x="232" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 2</title></rect>
+<rect x="240" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 2</title></rect>
+<rect x="248" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 2</title></rect>
+<rect x="256" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 2</title></rect>
+<rect x="264" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 2</title></rect>
+<rect x="272" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 2</title></rect>
+<rect x="176" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 2</title></rect>
+<rect x="184" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 2</title></rect>
+<rect x="192" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 2</title></rect>
+<rect x="200" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 2</title></rect>
+<rect x="208" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 2</title></rect>
+<rect x="216" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 2</title></rect>
+<rect x="224" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 2</title></rect>
+<rect x="232" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 2</title></rect>
+<rect x="240" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 2</title></rect>
+<rect x="248" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 2</title></rect>
+<rect x="256" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 2</title></rect>
+<rect x="264" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 2</title></rect>
+<rect x="272" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 2</title></rect>
+<rect x="296" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 3</title></rect>
+<rect x="304" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 3</title></rect>
+<rect x="312" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 3</title></rect>
+<rect x="320" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 3</title></rect>
+<rect x="328" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 3</title></rect>
+<rect x="336" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 3</title></rect>
+<rect x="344" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 3</title></rect>
+<rect x="352" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 3</title></rect>
+<rect x="360" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 3</title></rect>
+<rect x="368" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 3</title></rect>
+<rect x="376" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 3</title></rect>
+<rect x="384" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 3</title></rect>
+<rect x="392" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 3</title></rect>
+<rect x="296" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 3</title></rect>
+<rect x="304" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 3</title></rect>
+<rect x="312" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 3</title></rect>
+<rect x="320" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 3</title></rect>
+<rect x="328" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 3</title></rect>
+<rect x="336" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 3</title></rect>
+<rect x="344" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 3</title></rect>
+<rect x="352" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 3</title></rect>
+<rect x="360" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 3</title></rect>
+<rect x="368" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 3</title></rect>
+<rect x="376" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 3</title></rect>
+<rect x="384" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 3</title></rect>
+<rect x="392" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 3</title></rect>
+<rect x="296" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 3</title></rect>
+<rect x="304" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 3</title></rect>
+<rect x="312" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 3</title></rect>
+<rect x="320" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 3</title></rect>
+<rect x="328" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 3</title></rect>
+<rect x="336" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 3</title></rect>
+<rect x="344" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 3</title></rect>
+<rect x="352" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 3</title></rect>
+<rect x="360" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 3</title></rect>
+<rect x="368" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 3</title></rect>
+<rect x="376" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 3</title></rect>
+<rect x="384" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 3</title></rect>
+<rect x="392" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 3</title></rect>
+<rect x="296" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 3</title></rect>
+<rect x="304" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 3</title></rect>
+<rect x="312" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 3</title></rect>
+<rect x="320" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 3</title></rect>
+<rect x="328" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 3</title></rect>
+<rect x="336" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 3</title></rect>
+<rect x="344" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 3</title></rect>
+<rect x="352" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 3</title></rect>
+<rect x="360" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 3</title></rect>
+<rect x="368" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 3</title></rect>
+<rect x="376" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 3</title></rect>
+<rect x="384" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 3</title></rect>
+<rect x="392" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 3</title></rect>
+<rect x="176" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 4</title></rect>
+<rect x="184" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 4</title></rect>
+<rect x="192" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 4</title></rect>
+<rect x="200" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 4</title></rect>
+<rect x="208" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 4</title></rect>
+<rect x="216" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 4</title></rect>
+<rect x="224" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 4</title></rect>
+<rect x="232" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 4</title></rect>
+<rect x="240" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 4</title></rect>
+<rect x="248" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 4</title></rect>
+<rect x="256" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 4</title></rect>
+<rect x="264" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 4</title></rect>
+<rect x="272" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 4</title></rect>
+<rect x="176" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 4</title></rect>
+<rect x="184" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 4</title></rect>
+<rect x="192" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 4</title></rect>
+<rect x="200" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 4</title></rect>
+<rect x="208" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 4</title></rect>
+<rect x="216" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 4</title></rect>
+<rect x="224" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 4</title></rect>
+<rect x="232" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 4</title></rect>
+<rect x="240" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 4</title></rect>
+<rect x="248" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 4</title></rect>
+<rect x="256" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 4</title></rect>
+<rect x="264" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 4</title></rect>
+<rect x="272" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 4</title></rect>
+<rect x="176" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 4</title></rect>
+<rect x="184" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 4</title></rect>
+<rect x="192" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 4</title></rect>
+<rect x="200" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 4</title></rect>
+<rect x="208" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 4</title></rect>
+<rect x="216" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 4</title></rect>
+<rect x="224" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 4</title></rect>
+<rect x="232" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 4</title></rect>
+<rect x="240" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 4</title></rect>
+<rect x="248" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 4</title></rect>
+<rect x="256" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 4</title></rect>
+<rect x="264" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 4</title></rect>
+<rect x="272" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 4</title></rect>
+<rect x="176" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 4</title></rect>
+<rect x="184" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 4</title></rect>
+<rect x="192" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 4</title></rect>
+<rect x="200" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 4</title></rect>
+<rect x="208" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 4</title></rect>
+<rect x="216" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 4</title></rect>
+<rect x="224" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 4</title></rect>
+<rect x="232" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 4</title></rect>
+<rect x="240" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 4</title></rect>
+<rect x="248" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 4</title></rect>
+<rect x="256" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 4</title></rect>
+<rect x="264" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 4</title></rect>
+<rect x="272" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 4</title></rect>
+<rect x="296" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 5</title></rect>
+<rect x="304" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 5</title></rect>
+<rect x="312" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 5</title></rect>
+<rect x="320" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 5</title></rect>
+<rect x="328" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 5</title></rect>
+<rect x="336" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 5</title></rect>
+<rect x="344" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 5</title></rect>
+<rect x="352" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 5</title></rect>
+<rect x="360" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 5</title></rect>
+<rect x="368" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 5</title></rect>
+<rect x="376" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 5</title></rect>
+<rect x="384" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 5</title></rect>
+<rect x="392" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 5</title></rect>
+<rect x="296" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 5</title></rect>
+<rect x="304" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 5</title></rect>
+<rect x="312" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 5</title></rect>
+<rect x="320" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 5</title></rect>
+<rect x="328" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 5</title></rect>
+<rect x="336" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 5</title></rect>
+<rect x="344" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 5</title></rect>
+<rect x="352" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 5</title></rect>
+<rect x="360" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 5</title></rect>
+<rect x="368" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 5</title></rect>
+<rect x="376" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 5</title></rect>
+<rect x="384" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 5</title></rect>
+<rect x="392" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 5</title></rect>
+<rect x="296" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 5</title></rect>
+<rect x="304" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 5</title></rect>
+<rect x="312" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 5</title></rect>
+<rect x="320" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 5</title></rect>
+<rect x="328" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 5</title></rect>
+<rect x="336" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 5</title></rect>
+<rect x="344" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 5</title></rect>
+<rect x="352" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 5</title></rect>
+<rect x="360" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 5</title></rect>
+<rect x="368" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 5</title></rect>
+<rect x="376" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 5</title></rect>
+<rect x="384" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 5</title></rect>
+<rect x="392" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 5</title></rect>
+<rect x="296" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 5</title></rect>
+<rect x="304" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 5</title></rect>
+<rect x="312" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 5</title></rect>
+<rect x="320" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 5</title></rect>
+<rect x="328" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 5</title></rect>
+<rect x="336" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 5</title></rect>
+<rect x="344" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 5</title></rect>
+<rect x="352" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 5</title></rect>
+<rect x="360" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 5</title></rect>
+<rect x="368" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 5</title></rect>
+<rect x="376" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 5</title></rect>
+<rect x="384" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 5</title></rect>
+<rect x="392" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 5</title></rect>
+<rect x="176" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 6</title></rect>
+<rect x="184" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 6</title></rect>
+<rect x="192" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 6</title></rect>
+<rect x="200" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 6</title></rect>
+<rect x="208" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 6</title></rect>
+<rect x="216" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 6</title></rect>
+<rect x="224" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 6</title></rect>
+<rect x="232" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 6</title></rect>
+<rect x="240" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 6</title></rect>
+<rect x="248" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 6</title></rect>
+<rect x="256" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 6</title></rect>
+<rect x="264" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 6</title></rect>
+<rect x="272" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 6</title></rect>
+<rect x="176" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 6</title></rect>
+<rect x="184" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 6</title></rect>
+<rect x="192" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 6</title></rect>
+<rect x="200" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 6</title></rect>
+<rect x="208" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 6</title></rect>
+<rect x="216" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 6</title></rect>
+<rect x="224" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 6</title></rect>
+<rect x="232" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 6</title></rect>
+<rect x="240" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 6</title></rect>
+<rect x="248" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 6</title></rect>
+<rect x="256" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 6</title></rect>
+<rect x="264" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 6</title></rect>
+<rect x="272" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 6</title></rect>
+<rect x="176" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 6</title></rect>
+<rect x="184" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 6</title></rect>
+<rect x="192" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 6</title></rect>
+<rect x="200" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 6</title></rect>
+<rect x="208" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 6</title></rect>
+<rect x="216" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 6</title></rect>
+<rect x="224" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 6</title></rect>
+<rect x="232" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 6</title></rect>
+<rect x="240" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 6</title></rect>
+<rect x="248" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 6</title></rect>
+<rect x="256" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 6</title></rect>
+<rect x="264" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 6</title></rect>
+<rect x="272" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 6</title></rect>
+<rect x="176" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 6</title></rect>
+<rect x="184" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 6</title></rect>
+<rect x="192" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 6</title></rect>
+<rect x="200" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 6</title></rect>
+<rect x="208" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 6</title></rect>
+<rect x="216" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 6</title></rect>
+<rect x="224" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 6</title></rect>
+<rect x="232" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 6</title></rect>
+<rect x="240" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 6</title></rect>
+<rect x="248" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 6</title></rect>
+<rect x="256" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 6</title></rect>
+<rect x="264" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 6</title></rect>
+<rect x="272" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 6</title></rect>
+<rect x="296" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 7</title></rect>
+<rect x="304" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 7</title></rect>
+<rect x="312" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 7</title></rect>
+<rect x="320" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 7</title></rect>
+<rect x="328" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 7</title></rect>
+<rect x="336" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 7</title></rect>
+<rect x="344" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 7</title></rect>
+<rect x="352" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 7</title></rect>
+<rect x="360" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 7</title></rect>
+<rect x="368" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 7</title></rect>
+<rect x="376" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 7</title></rect>
+<rect x="384" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 7</title></rect>
+<rect x="392" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 7</title></rect>
+<rect x="296" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 7</title></rect>
+<rect x="304" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 7</title></rect>
+<rect x="312" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 7</title></rect>
+<rect x="320" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 7</title></rect>
+<rect x="328" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 7</title></rect>
+<rect x="336" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 7</title></rect>
+<rect x="344" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 7</title></rect>
+<rect x="352" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 7</title></rect>
+<rect x="360" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 7</title></rect>
+<rect x="368" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 7</title></rect>
+<rect x="376" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 7</title></rect>
+<rect x="384" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 7</title></rect>
+<rect x="392" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 7</title></rect>
+<rect x="296" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 7</title></rect>
+<rect x="304" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 7</title></rect>
+<rect x="312" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 7</title></rect>
+<rect x="320" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 7</title></rect>
+<rect x="328" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 7</title></rect>
+<rect x="336" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 7</title></rect>
+<rect x="344" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 7</title></rect>
+<rect x="352" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 7</title></rect>
+<rect x="360" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 7</title></rect>
+<rect x="368" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 7</title></rect>
+<rect x="376" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 7</title></rect>
+<rect x="384" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 7</title></rect>
+<rect x="392" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 7</title></rect>
+<rect x="296" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 7</title></rect>
+<rect x="304" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 7</title></rect>
+<rect x="312" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 7</title></rect>
+<rect x="320" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 7</title></rect>
+<rect x="328" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 7</title></rect>
+<rect x="336" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 7</title></rect>
+<rect x="344" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 7</title></rect>
+<rect x="352" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 7</title></rect>
+<rect x="360" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 7</title></rect>
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+<rect x="376" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 7</title></rect>
+<rect x="384" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 7</title></rect>
+<rect x="392" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 7</title></rect>
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
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+ Entry Bit Width: 44
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+ Entry Bit Width: 44
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+ Entry Bit Width: 44
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+ Entry Bit Width: 44
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+ Entry Bit Width: 44
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
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+ Unit ID: 0
+ Global ID: 0
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+<rect x="296" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 2
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+ Depth: 1024</title></rect>
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+ Unit Number: 3
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 4
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
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+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
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+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 8
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 9
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
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+ Unit Number: 10
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 11
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 0
+ Unit Number: 12
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 1
+ Unit Number: 13
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
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+ Row: 2 Unit: 2
+ Unit Number: 14
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 3
+ Unit Number: 15
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
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+ Row: 2 Unit: 4
+ Unit Number: 16
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 17
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 18
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 3 Unit: 1
+ Unit Number: 19
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 3 Unit: 2
+ Unit Number: 20
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 3 Unit: 3
+ Unit Number: 21
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 3 Unit: 4
+ Unit Number: 22
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 3 Unit: 5
+ Unit Number: 23
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 4 Unit: 0
+ Unit Number: 24
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 4 Unit: 1
+ Unit Number: 25
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
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+ Row: 4 Unit: 2
+ Unit Number: 26
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
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+ Row: 4 Unit: 3
+ Unit Number: 27
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 4 Unit: 4
+ Unit Number: 28
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 4 Unit: 5
+ Unit Number: 29
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 5 Unit: 0
+ Unit Number: 30
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
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+ Row: 5 Unit: 1
+ Unit Number: 31
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 5 Unit: 2
+ Unit Number: 32
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 33
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 5 Unit: 4
+ Unit Number: 34
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 35
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 36
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 6 Unit: 1
+ Unit Number: 37
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 6 Unit: 2
+ Unit Number: 38
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
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+ Row: 6 Unit: 3
+ Unit Number: 39
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 6 Unit: 4
+ Unit Number: 40
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 6 Unit: 5
+ Unit Number: 41
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
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+ Unit Number: 42
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 43
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 44
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
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+ Unit Number: 45
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 46
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 47
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<text x="338" y="22" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">ALUs</text>
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+ Number: 2</title></rect>
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+ Number: 3</title></rect>
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+ Number: 4</title></rect>
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+ Number: 5</title></rect>
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+ Number: 6</title></rect>
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+ Number: 7</title></rect>
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+ Number: 8</title></rect>
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+ Number: 9</title></rect>
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+ Number: 10</title></rect>
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+ Number: 11</title></rect>
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+ Number: 12</title></rect>
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+ Number: 13</title></rect>
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+ Number: 15</title></rect>
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+ Number: 16</title></rect>
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+ Number: 17</title></rect>
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+ Number: 18</title></rect>
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+ Number: 19</title></rect>
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+ Number: 20</title></rect>
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+ Number: 21</title></rect>
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+ Number: 22</title></rect>
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+ Number: 23</title></rect>
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+ Number: 24</title></rect>
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+ Number: 25</title></rect>
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+ Number: 26</title></rect>
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+ Number: 27</title></rect>
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+ Number: 28</title></rect>
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+ Number: 29</title></rect>
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+ Number: 30</title></rect>
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+ Number: 31</title></rect>
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+ Byte Number: 0
+</title></rect>
+<rect x="192" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 1
+</title></rect>
+<rect x="200" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 2
+</title></rect>
+<rect x="208" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 3
+</title></rect>
+<rect x="216" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 4
+</title></rect>
+<rect x="224" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 5
+</title></rect>
+<rect x="232" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 6
+</title></rect>
+<rect x="240" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 7
+</title></rect>
+<rect x="248" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 8
+</title></rect>
+<rect x="256" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 9
+</title></rect>
+<rect x="264" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 10
+</title></rect>
+<rect x="272" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 11
+</title></rect>
+<rect x="280" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 12
+</title></rect>
+<rect x="288" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 13
+</title></rect>
+<rect x="296" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 14
+</title></rect>
+<rect x="304" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 15
+</title></rect>
+<rect x="184" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 16
+</title></rect>
+<rect x="192" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 17
+</title></rect>
+<rect x="200" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 18
+</title></rect>
+<rect x="208" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 19
+</title></rect>
+<rect x="216" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 20
+</title></rect>
+<rect x="224" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 21
+</title></rect>
+<rect x="232" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 22
+</title></rect>
+<rect x="240" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 23
+</title></rect>
+<rect x="248" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 24
+</title></rect>
+<rect x="256" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 25
+</title></rect>
+<rect x="264" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 26
+</title></rect>
+<rect x="272" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 27
+</title></rect>
+<rect x="280" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 28
+</title></rect>
+<rect x="288" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 29
+</title></rect>
+<rect x="296" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
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+<rect x="568" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 21</title></rect>
+<rect x="576" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 22</title></rect>
+<rect x="584" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 23</title></rect>
+<rect x="560" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 24</title></rect>
+<rect x="568" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 25</title></rect>
+<rect x="576" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 26</title></rect>
+<rect x="584" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 27</title></rect>
+<rect x="560" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 28</title></rect>
+<rect x="568" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 29</title></rect>
+<rect x="576" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 30</title></rect>
+<rect x="584" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 31</title></rect>
+<rect x="560" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 32</title></rect>
+<rect x="568" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 33</title></rect>
+<rect x="576" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 34</title></rect>
+<rect x="584" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 35</title></rect>
+<rect x="560" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 36</title></rect>
+<rect x="568" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 37</title></rect>
+<rect x="576" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 38</title></rect>
+<rect x="584" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 39</title></rect>
+<rect x="560" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 40</title></rect>
+<rect x="568" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 41</title></rect>
+<rect x="576" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 42</title></rect>
+<rect x="584" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 43</title></rect>
+<rect x="560" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 44</title></rect>
+<rect x="568" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 45</title></rect>
+<rect x="576" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 46</title></rect>
+<rect x="584" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 47</title></rect>
+<rect x="560" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 48</title></rect>
+<rect x="568" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 49</title></rect>
+<rect x="576" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 50</title></rect>
+<rect x="584" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 51</title></rect>
+<rect x="560" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 52</title></rect>
+<rect x="568" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 53</title></rect>
+<rect x="576" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 54</title></rect>
+<rect x="584" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 55</title></rect>
+<rect x="560" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 56</title></rect>
+<rect x="568" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 57</title></rect>
+<rect x="576" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 58</title></rect>
+<rect x="584" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 59</title></rect>
+<rect x="560" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 60</title></rect>
+<rect x="568" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 61</title></rect>
+<rect x="576" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 62</title></rect>
+<rect x="584" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 63</title></rect>
+<rect x="600" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 0</title></rect>
+<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 1</title></rect>
+<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 2</title></rect>
+<rect x="624" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 3</title></rect>
+<rect x="600" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 4</title></rect>
+<rect x="608" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 5</title></rect>
+<rect x="616" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 6</title></rect>
+<rect x="624" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 7</title></rect>
+<rect x="600" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 8</title></rect>
+<rect x="608" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 9</title></rect>
+<rect x="616" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 10</title></rect>
+<rect x="624" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 11</title></rect>
+<rect x="600" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 12</title></rect>
+<rect x="608" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 13</title></rect>
+<rect x="616" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 14</title></rect>
+<rect x="624" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 15</title></rect>
+<rect x="600" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 16</title></rect>
+<rect x="608" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 17</title></rect>
+<rect x="616" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 18</title></rect>
+<rect x="624" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 19</title></rect>
+<rect x="600" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 20</title></rect>
+<rect x="608" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 21</title></rect>
+<rect x="616" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 22</title></rect>
+<rect x="624" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 23</title></rect>
+<rect x="600" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 24</title></rect>
+<rect x="608" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 25</title></rect>
+<rect x="616" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 26</title></rect>
+<rect x="624" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 27</title></rect>
+<rect x="600" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 28</title></rect>
+<rect x="608" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 29</title></rect>
+<rect x="616" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 30</title></rect>
+<rect x="624" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 31</title></rect>
+<rect x="600" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 32</title></rect>
+<rect x="608" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 33</title></rect>
+<rect x="616" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 34</title></rect>
+<rect x="624" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 35</title></rect>
+<rect x="600" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 36</title></rect>
+<rect x="608" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 37</title></rect>
+<rect x="616" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 38</title></rect>
+<rect x="624" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 39</title></rect>
+<rect x="600" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 40</title></rect>
+<rect x="608" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 41</title></rect>
+<rect x="616" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 42</title></rect>
+<rect x="624" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 43</title></rect>
+<rect x="600" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 44</title></rect>
+<rect x="608" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 45</title></rect>
+<rect x="616" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 46</title></rect>
+<rect x="624" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 47</title></rect>
+<rect x="600" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 48</title></rect>
+<rect x="608" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 49</title></rect>
+<rect x="616" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 50</title></rect>
+<rect x="624" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 51</title></rect>
+<rect x="600" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 52</title></rect>
+<rect x="608" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 53</title></rect>
+<rect x="616" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 54</title></rect>
+<rect x="624" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 55</title></rect>
+<rect x="600" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 56</title></rect>
+<rect x="608" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 57</title></rect>
+<rect x="616" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 58</title></rect>
+<rect x="624" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 59</title></rect>
+<rect x="600" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 60</title></rect>
+<rect x="608" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 61</title></rect>
+<rect x="616" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 62</title></rect>
+<rect x="624" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 63</title></rect>
+<rect x="600" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 64</title></rect>
+<rect x="608" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 65</title></rect>
+<rect x="616" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 66</title></rect>
+<rect x="624" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 67</title></rect>
+<rect x="600" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 68</title></rect>
+<rect x="608" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 69</title></rect>
+<rect x="616" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 70</title></rect>
+<rect x="624" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 71</title></rect>
+<rect x="600" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 72</title></rect>
+<rect x="608" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 73</title></rect>
+<rect x="616" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 74</title></rect>
+<rect x="624" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 75</title></rect>
+<rect x="600" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 76</title></rect>
+<rect x="608" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 77</title></rect>
+<rect x="616" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 78</title></rect>
+<rect x="624" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 79</title></rect>
+<rect x="600" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 80</title></rect>
+<rect x="608" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 81</title></rect>
+<rect x="616" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 82</title></rect>
+<rect x="624" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 83</title></rect>
+<rect x="600" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 84</title></rect>
+<rect x="608" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 85</title></rect>
+<rect x="616" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 86</title></rect>
+<rect x="624" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 87</title></rect>
+<rect x="600" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 88</title></rect>
+<rect x="608" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 89</title></rect>
+<rect x="616" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 90</title></rect>
+<rect x="624" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 91</title></rect>
+<rect x="600" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 92</title></rect>
+<rect x="608" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 93</title></rect>
+<rect x="616" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 94</title></rect>
+<rect x="624" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 95</title></rect>
+<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 0</title></rect>
+<rect x="648" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 1</title></rect>
+<rect x="656" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 2</title></rect>
+<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 3</title></rect>
+<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 4</title></rect>
+<rect x="648" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 5</title></rect>
+<rect x="656" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 6</title></rect>
+<rect x="664" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 7</title></rect>
+<rect x="640" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 8</title></rect>
+<rect x="648" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 9</title></rect>
+<rect x="656" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 10</title></rect>
+<rect x="664" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 11</title></rect>
+<rect x="640" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 12</title></rect>
+<rect x="648" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 13</title></rect>
+<rect x="656" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 14</title></rect>
+<rect x="664" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 15</title></rect>
+<rect x="640" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 16</title></rect>
+<rect x="648" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 17</title></rect>
+<rect x="656" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 18</title></rect>
+<rect x="664" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 19</title></rect>
+<rect x="640" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 20</title></rect>
+<rect x="648" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 21</title></rect>
+<rect x="656" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 22</title></rect>
+<rect x="664" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 23</title></rect>
+<rect x="640" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 24</title></rect>
+<rect x="648" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 25</title></rect>
+<rect x="656" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 26</title></rect>
+<rect x="664" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 27</title></rect>
+<rect x="640" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 28</title></rect>
+<rect x="648" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 29</title></rect>
+<rect x="656" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 30</title></rect>
+<rect x="664" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 31</title></rect>
+<rect x="640" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 32</title></rect>
+<rect x="648" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 33</title></rect>
+<rect x="656" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 34</title></rect>
+<rect x="664" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 35</title></rect>
+<rect x="640" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 36</title></rect>
+<rect x="648" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 37</title></rect>
+<rect x="656" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 38</title></rect>
+<rect x="664" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 39</title></rect>
+<rect x="640" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 40</title></rect>
+<rect x="648" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 41</title></rect>
+<rect x="656" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 42</title></rect>
+<rect x="664" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 43</title></rect>
+<rect x="640" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 44</title></rect>
+<rect x="648" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 45</title></rect>
+<rect x="656" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 46</title></rect>
+<rect x="664" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 47</title></rect>
+<rect x="640" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 48</title></rect>
+<rect x="648" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 49</title></rect>
+<rect x="656" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 50</title></rect>
+<rect x="664" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 51</title></rect>
+<rect x="640" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 52</title></rect>
+<rect x="648" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 53</title></rect>
+<rect x="656" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 54</title></rect>
+<rect x="664" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 55</title></rect>
+<rect x="640" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 56</title></rect>
+<rect x="648" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 57</title></rect>
+<rect x="656" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 58</title></rect>
+<rect x="664" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 59</title></rect>
+<rect x="640" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 60</title></rect>
+<rect x="648" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 61</title></rect>
+<rect x="656" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 62</title></rect>
+<rect x="664" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 63</title></rect>
+<text x="570" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
+<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
+<rect x="720" y="72" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
+
+<line x1="720" y1="72" x2="736" y2="88" style="stroke:black; stroke-width:2" />
+<line x1="720" y1="88" x2="736" y2="72" style="stroke:black; stroke-width:2" />
+<text x="738" y="86" style="fill:black;">Unavailable</text>
+<rect x="704" y="24" width="240" height="88" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="712" y="32" width="224" height="72" style="stroke:black; stroke-width:1; fill:none""></rect>
+<text x="978" y="54" style="fill:black;">Totals</text>
+<text x="986" y="78" style="fill:black;">Exact Match Input xbar</text>
+<text x="994" y="102" style="fill:black;"> 0 of 128 (0.00%)</text>
+<text x="986" y="126" style="fill:black;">Ternary Match Input xbar</text>
+<text x="994" y="150" style="fill:black;"> 0 of 66 (0.00%)</text>
+<text x="986" y="174" style="fill:black;">Hash Bit</text>
+<text x="994" y="198" style="fill:black;"> 0 of 416 (0.00%)</text>
+<text x="986" y="222" style="fill:black;">Hash Dist Unit</text>
+<text x="994" y="246" style="fill:black;"> 0 of 6 (0.00%)</text>
+<text x="986" y="270" style="fill:black;">Gateway</text>
+<text x="994" y="294" style="fill:black;"> 0 of 16 (0.00%)</text>
+<text x="986" y="318" style="fill:black;">SRAM</text>
+<text x="994" y="342" style="fill:black;"> 0 of 80 (0.00%)</text>
+<text x="986" y="366" style="fill:black;">Map RAM</text>
+<text x="994" y="390" style="fill:black;"> 0 of 48 (0.00%)</text>
+<text x="986" y="414" style="fill:black;">TCAM</text>
+<text x="994" y="438" style="fill:black;"> 0 of 24 (0.00%)</text>
+<text x="986" y="462" style="fill:black;">VLIW Instr</text>
+<text x="994" y="486" style="fill:black;"> 0 of 32 (0.00%)</text>
+<text x="986" y="510" style="fill:black;">Meter ALU</text>
+<text x="994" y="534" style="fill:black;"> 0 of 4 (0.00%)</text>
+<text x="986" y="558" style="fill:black;">Stats ALU</text>
+<text x="994" y="582" style="fill:black;"> 0 of 4 (0.00%)</text>
+<text x="986" y="606" style="fill:black;">Stash</text>
+<text x="994" y="630" style="fill:black;"> 0 of 16 (0.00%)</text>
+<text x="986" y="654" style="fill:black;">Action Data Bus Bytes</text>
+<text x="994" y="678" style="fill:black;"> 0 of 128 (0.00%)</text>
+<text x="986" y="702" style="fill:black;">Logical TableID</text>
+<text x="994" y="726" style="fill:black;"> 0 of 16 (0.00%)</text>
+<rect x="960" y="24" width="240" height="728" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="968" y="32" width="224" height="712" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="0" y="0" width="680" height="672" style="stroke:black; stroke-width:2; fill:none""></rect>
+</svg><br>
+
<h2>MAU Stage 3</h2>
<svg width="95%" height="95%" viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
@@ -31988,7 +31964,7 @@
</svg><br>
-<br><i>Created on Thu Sep 7 13:57:06 2017</i>
+<br><i>Created on Fri Sep 8 08:24:43 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
</div>
</body>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/parser.egress.html b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/parser.egress.html
index 54f4fd9..b086e4f 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/parser.egress.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/parser.egress.html
@@ -625,7 +625,7 @@
<tr><td id="row255" class="row_cell">
<a href="#row255">Row 255</a> <br><br>
-State <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start (from state <Shim start state>)<br />
+State <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start (from state <Shim start state>)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_255');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_255">Raw register data</a> <br><br><div id="reg_data_255" style="display: none;">
@@ -684,18 +684,18 @@
<tr>
<td><center>0</center></td>
<td><center>ff</center></td>
-<td><center>c</center></td>
+<td><center>9</center></td>
<td><center>7</center></td>
-<td><center>18</center></td>
+<td><center>15</center></td>
<td><center>0</center></td>
<td><center>3</center></td>
<td><center>1</center></td>
<td><center>1</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
-<td><center>a</center></td>
+<td><center>7</center></td>
<td><center>0</center></td>
-<td><center>19</center></td>
+<td><center>16</center></td>
</tr>
</table> <br>
Action: <table border=1>
@@ -772,7 +772,7 @@
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>90</center></td>
-<td><center>92</center></td>
+<td><center>1ff</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -781,13 +781,13 @@
<td><center>1ff</center></td>
<td><center>1ff</center></td>
<td><center>50</center></td>
-<td><center>51</center></td>
+<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>8</center></td>
+<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1ff</center></td>
@@ -822,8 +822,8 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
+<td><center>0</center></td>
<td><center>2</center></td>
-<td><center>7</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
</tr>
@@ -851,12 +851,6 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
<div class="tcam_arrow" style="width:54px; bottom: 0px;">16</div>
</td>
<td height=1 style="position: relative">
@@ -902,6 +896,12 @@
</td>
<td height=1 style="position: relative">
</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
<td height=40></td></tr><tr>
<td align=right><font size=-3>Bytes </font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
@@ -912,10 +912,10 @@
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>8</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>11</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>13</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>14</center></font></td>
@@ -926,9 +926,9 @@
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>19</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>20</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>21</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>22</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>23</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>24</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
@@ -939,18 +939,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">146</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">81</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">144</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -958,7 +947,16 @@
<div class="extr_arrow" style="width:27px; top: 0px;">80</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">144</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
</td>
@@ -1182,7 +1180,7 @@
<td><center>0</center></td>
<td><center>129</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>128</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -1413,7 +1411,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x8<br>
+PHV 81 <font size=+1>|=</font> 0x8<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -1984,7 +1982,7 @@
<td><center>0</center></td>
<td><center>12b</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>12a</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2213,7 +2211,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x10<br>
+PHV 81 <font size=+1>|=</font> 0x10<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -2381,7 +2379,7 @@
<td><center>0</center></td>
<td><center>12b</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>12a</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2606,7 +2604,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x20<br>
+PHV 81 <font size=+1>|=</font> 0x20<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3161,7 +3159,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -3383,7 +3381,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x2<br>
+PHV 81 <font size=+1>|=</font> 0x2<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3557,7 +3555,7 @@
<td><center>0</center></td>
<td><center>12d</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>12c</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -3785,7 +3783,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x4<br>
+PHV 81 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3963,7 +3961,7 @@
<td><center>0</center></td>
<td><center>12d</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>12c</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -4191,7 +4189,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x4<br>
+PHV 81 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -4214,7 +4212,7 @@
<tr><td id="row246" class="row_cell">
<a href="#row246">Row 246</a> <br><br>
-State parse_pkt_in (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
+State parse_pkt_in (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_246');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_246">Raw register data</a> <br><br><div id="reg_data_246" style="display: none;">
@@ -4360,7 +4358,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
-<td><center>91</center></td>
+<td><center>154</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
@@ -4369,7 +4367,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -4525,7 +4523,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">145</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">340</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -4591,7 +4589,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x1<br>
+PHV 81 <font size=+1>|=</font> 0x1<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -4610,7 +4608,7 @@
<tr><td id="row245" class="row_cell">
<a href="#row245">Row 245</a> <br><br>
-State default_parser (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
+State default_parser (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_245">Raw register data</a> <br><br><div id="reg_data_245" style="display: none;">
@@ -5167,7 +5165,7 @@
<td><center>0</center></td>
<td><center>12d</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>12c</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -5395,7 +5393,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x4<br>
+PHV 81 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -6641,7 +6639,7 @@
<br></td></tr>
</table>
-<br><i>Created on Thu Sep 7 13:57:10 2017</i>
+<br><i>Created on Fri Sep 8 08:24:46 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/parser.ingress.html b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/parser.ingress.html
index 0062be0..892950e 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/parser.ingress.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/parser.ingress.html
@@ -1013,7 +1013,7 @@
<tr>
<th> </th></tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row245">Row 245 (state start)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row244">Row 244 (state start)</a></td>
</tr>
</table>
</div></div><br><br>
@@ -1174,10 +1174,10 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>42</center></td>
-<td><center>1ff</center></td>
-<td><center>43</center></td>
<td><center>41</center></td>
+<td><center>1ff</center></td>
+<td><center>42</center></td>
+<td><center>40</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -1333,7 +1333,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">64</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">1</div>
@@ -1350,7 +1350,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">2</div>
@@ -1404,7 +1404,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x4<br>
+PHV 66 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -1421,7 +1421,7 @@
</tr>
</table>
<br>Previous states:
-<a href="#row244">Row 244</a><br>
+<a href="#row243">Row 243</a><br>
</div></div><br><br>
</td></tr>
@@ -1582,7 +1582,7 @@
<td><center>0</center></td>
<td><center>121</center></td>
<td><center>1ff</center></td>
-<td><center>43</center></td>
+<td><center>42</center></td>
<td><center>120</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -1813,7 +1813,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x8<br>
+PHV 66 <font size=+1>|=</font> 0x8<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -1836,7 +1836,7 @@
</tr>
</table>
<br>Previous states:
-<a href="#row254">Row 254</a>, <a href="#row246">Row 246</a>, <a href="#row247">Row 247</a><br>
+<a href="#row254">Row 254</a>, <a href="#row245">Row 245</a>, <a href="#row246">Row 246</a><br>
</div></div><br><br>
</td></tr>
@@ -2223,7 +2223,7 @@
[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_252');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_252">Transitions</a> <br><br><div id="transitions_252" style="display: block;">
End<br>
<br>Previous states:
-<a href="#row254">Row 254</a>, <a href="#row246">Row 246</a>, <a href="#row247">Row 247</a><br>
+<a href="#row254">Row 254</a>, <a href="#row245">Row 245</a>, <a href="#row246">Row 246</a><br>
</div></div><br><br>
</td></tr>
@@ -2287,8 +2287,9 @@
</tr>
<tr>
<td><center>0</center></td>
+<td><center>ff</center></td>
<td><center>0</center></td>
-<td><center>14</center></td>
+<td><center>4</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2296,7 +2297,6 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>1</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>14</center></td>
@@ -2383,19 +2383,19 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>123</center></td>
-<td><center>1ff</center></td>
-<td><center>43</center></td>
+<td><center>124</center></td>
+<td><center>42</center></td>
<td><center>122</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
-<td><center>4</center></td>
-<td><center>2</center></td>
-<td><center>0</center></td>
<td><center>6</center></td>
-<td><center>1ff</center></td>
-<td><center>10</center></td>
+<td><center>4</center></td>
+<td><center>a</center></td>
+<td><center>8</center></td>
+<td><center>146</center></td>
+<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2408,9 +2408,9 @@
<td><center>0</center></td>
<td><center>104</center></td>
<td><center>0</center></td>
-<td><center>105</center></td>
+<td><center>1ff</center></td>
+<td><center>10</center></td>
<td><center>c</center></td>
-<td><center>8</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2420,7 +2420,7 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>0</center></td>
+<td><center>2</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2524,7 +2524,7 @@
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>16</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>17</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>18</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>19</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>19</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
@@ -2546,6 +2546,11 @@
<div class="extr_arrow" style="width:27px; top: 0px;">291</div>
</td>
<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">292</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
<div class="extr_arrow" style="width:54px; top: 0px;">323</div>
</td>
<td height=1 style="position: relative">
@@ -2561,6 +2566,11 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">326</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">259</div>
</td>
<td height=1 style="position: relative">
@@ -2579,15 +2589,6 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">261</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
</td>
@@ -2613,12 +2614,18 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x10<br>
+PHV 66 <font size=+1>|=</font> 0x10<br>
<br>
</div></div><br><br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_251');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_251">Transitions</a> <br><br><div id="transitions_251" style="display: block;">
-End<br>
+<table border=0 id="transitions_table_251" class="draggable transitions_table">
+<tr>
+<th> </th></tr>
+<td>Default</td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row248">Row 248 (state parse_tcp//spilled)</a></td>
+</tr>
+</table>
<br>Previous states:
<a href="#row253">Row 253</a><br>
</div></div><br><br>
@@ -2781,7 +2788,7 @@
<td><center>0</center></td>
<td><center>123</center></td>
<td><center>1ff</center></td>
-<td><center>43</center></td>
+<td><center>42</center></td>
<td><center>122</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -3006,7 +3013,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x20<br>
+PHV 66 <font size=+1>|=</font> 0x20<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3406,7 +3413,7 @@
<tr><td id="row248" class="row_cell">
<a href="#row248">Row 248</a> <br><br>
-State parse_pkt_out (from state default_parser)<br />
+State parse_tcp//spilled (from state parse_tcp)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_248">Raw register data</a> <br><br><div id="reg_data_248" style="display: none;">
@@ -3424,6 +3431,394 @@
</tr>
<tr>
<td><center>value</center></td>
+<td><center>4</center></td>
+<td><center>ffff</center></td>
+<td><center>ff</center></td>
+<td><center>ff</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+</tr>
+<tr>
+<td><center>mask</center></td>
+<td><center>ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+</tr>
+</table> <br>
+Early action: <table border=1>
+<tr>
+<td><center><font size=-3>ctr_amt_idx</font></center></td>
+<td><center><font size=-3>nxt_state_mask</font></center></td>
+<td><center><font size=-3>shift_amt</font></center></td>
+<td><center><font size=-3>nxt_state</font></center></td>
+<td><center><font size=-3>lookup_offset_8[1]</font></center></td>
+<td><center><font size=-3>ctr_ld_src</font></center></td>
+<td><center><font size=-3>lookup_offset_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_16</font></center></td>
+<td><center><font size=-3>ld_lookup_8[1]</font></center></td>
+<td><center><font size=-3>done</font></center></td>
+<td><center><font size=-3>lookup_offset_16</font></center></td>
+<td><center><font size=-3>ctr_load</font></center></td>
+<td><center><font size=-3>buf_req</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>14</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>14</center></td>
+</tr>
+</table> <br>
+Action: <table border=1>
+<tr>
+<td><center><font size=-3>phv_8b_src_type_3</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_2</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_0</font></center></td>
+<td><center><font size=-3>csum_addr[1]</font></center></td>
+<td><center><font size=-3>phv_16b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_dst_1</font></center></td>
+<td><center><font size=-3>pri_upd_en_shr</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_1</font></center></td>
+<td><center><font size=-3>dst_offset_rst</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_3</font></center></td>
+<td><center><font size=-3>phv_16b_src_2</font></center></td>
+<td><center><font size=-3>phv_16b_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_src_2</font></center></td>
+<td><center><font size=-3>pri_upd_src</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>csum_en[1]</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>dst_offset_inc</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>csum_addr[0]</font></center></td>
+<td><center><font size=-3>pri_upd_type</font></center></td>
+<td><center><font size=-3>phv_32b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_3</font></center></td>
+<td><center><font size=-3>phv_32b_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_src_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_0</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_2</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_32b_dst_3</font></center></td>
+<td><center><font size=-3>pri_upd_val_mask</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_3</font></center></td>
+<td><center><font size=-3>csum_en[0]</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_2</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>1ff</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>1ff</center></td>
+<td><center>125</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>3</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+</tr>
+</table> <br>
+</div></div><br><br>
+
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_248">Input buffer</a> <br><br><div id="input_buffer_248" style="display: block;">
+<div style="min-width: 1060;"></div>
+<table border=0><tr>
+<td valign=bottom align=right><font size=-3>Matches </font></td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=20></td></tr><tr>
+<td align=right><font size=-3>Bytes </font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>1</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>2</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>3</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>4</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>13</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>14</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>15</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>16</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>17</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>18</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>19</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>28</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>29</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>30</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>31</center></font></td>
+</tr><tr>
+<td valign=top align=right><font size=-3>Extractions </font></td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">293</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+</tr></table>
+<div style="height:40px;"> </div>
+</div></div><br><br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_248">Transitions</a> <br><br><div id="transitions_248" style="display: block;">
+End<br>
+<br>Previous states:
+<a href="#row251">Row 251</a><br>
+</div></div><br><br>
+</td></tr>
+
+<tr><td id="row247" class="row_cell">
+<a href="#row247">Row 247</a> <br><br>
+State parse_pkt_out (from state default_parser)<br />
+<br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_247">Raw register data</a> <br><br><div id="reg_data_247" style="display: none;">
+TCAM word: <table border=1>
+<tr>
+<td><center><font size=-3></font></center></td>
+<td><center><font size=-3>curr_state</font></center></td>
+<td><center><font size=-3>lookup_16</font></center></td>
+<td><center><font size=-3>lookup_8[1]</font></center></td>
+<td><center><font size=-3>lookup_8[0]</font></center></td>
+<td><center><font size=-3>ver_1</font></center></td>
+<td><center><font size=-3>ver_0</font></center></td>
+<td><center><font size=-3>ctr_zero</font></center></td>
+<td><center><font size=-3>ctr_neg</font></center></td>
+</tr>
+<tr>
+<td><center>value</center></td>
<td><center>6</center></td>
<td><center>fec0</center></td>
<td><center>ff</center></td>
@@ -3561,7 +3956,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>43</center></td>
+<td><center>42</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -3612,7 +4007,7 @@
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_248">Input buffer</a> <br><br><div id="input_buffer_248" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_247">Input buffer</a> <br><br><div id="input_buffer_247" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -3783,29 +4178,29 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x2<br>
+PHV 66 <font size=+1>|=</font> 0x2<br>
<br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_248">Transitions</a> <br><br><div id="transitions_248" style="display: block;">
-<table border=0 id="transitions_table_248" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_247">Transitions</a> <br><br><div id="transitions_247" style="display: block;">
+<table border=0 id="transitions_table_247" class="draggable transitions_table">
<tr>
<th> </th></tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row246">Row 246 (state parse_ethernet)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row245">Row 245 (state parse_ethernet)</a></td>
</tr>
</table>
<br>Previous states:
-<a href="#row243">Row 243</a><br>
+<a href="#row242">Row 242</a><br>
</div></div><br><br>
</td></tr>
-<tr><td id="row247" class="row_cell">
-<a href="#row247">Row 247</a> <br><br>
+<tr><td id="row246" class="row_cell">
+<a href="#row246">Row 246</a> <br><br>
State parse_ethernet (from state default_parser)<br />
<br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_247">Raw register data</a> <br><br><div id="reg_data_247" style="display: none;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_246');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_246">Raw register data</a> <br><br><div id="reg_data_246" style="display: none;">
TCAM word: <table border=1>
<tr>
<td><center><font size=-3></font></center></td>
@@ -3955,416 +4350,10 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>42</center></td>
-<td><center>1ff</center></td>
-<td><center>43</center></td>
<td><center>41</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>c</center></td>
-<td><center>5</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
<td><center>1ff</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>2</center></td>
-<td><center>0</center></td>
-<td><center>1ff</center></td>
-<td><center>8</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1ff</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>4</center></td>
-<td><center>0</center></td>
-<td><center>7</center></td>
-</tr>
-</table> <br>
-</div></div><br><br>
-
-<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_247">Input buffer</a> <br><br><div id="input_buffer_247" style="display: block;">
-<div style="min-width: 1060;"></div>
-<table border=0><tr>
-<td valign=bottom align=right><font size=-3>Matches </font></td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="tcam_arrow" style="width:54px; bottom: 0px;">16</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=40></td></tr><tr>
-<td align=right><font size=-3>Bytes </font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>1</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>2</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>3</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>4</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>13</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>14</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>15</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>16</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>17</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>18</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>19</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>28</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>29</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>30</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>31</center></font></td>
-</tr><tr>
-<td valign=top align=right><font size=-3>Extractions </font></td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">1</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">131</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">2</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">132</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-</tr></table>
-<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x4<br>
-<br>
-</div></div><br><br>
-<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_247">Transitions</a> <br><br><div id="transitions_247" style="display: block;">
-<table border=0 id="transitions_table_247" class="draggable transitions_table">
-<tr>
-<th>16b</th>
-<th> </th></tr>
-<td>0800</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row253">Row 253 (state parse_ipv4)</a></td>
-</tr>
-<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row252">Row 252 (state <leaf>)</a></td>
-</tr>
-</table>
-<br>Previous states:
-<a href="#row243">Row 243</a><br>
-</div></div><br><br>
-</td></tr>
-
-<tr><td id="row246" class="row_cell">
-<a href="#row246">Row 246</a> <br><br>
-State parse_ethernet (from state parse_pkt_out)<br />
-<br>
-<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_246');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_246">Raw register data</a> <br><br><div id="reg_data_246" style="display: none;">
-TCAM word: <table border=1>
-<tr>
-<td><center><font size=-3></font></center></td>
-<td><center><font size=-3>curr_state</font></center></td>
-<td><center><font size=-3>lookup_16</font></center></td>
-<td><center><font size=-3>lookup_8[1]</font></center></td>
-<td><center><font size=-3>lookup_8[0]</font></center></td>
-<td><center><font size=-3>ver_1</font></center></td>
-<td><center><font size=-3>ver_0</font></center></td>
-<td><center><font size=-3>ctr_zero</font></center></td>
-<td><center><font size=-3>ctr_neg</font></center></td>
-</tr>
-<tr>
-<td><center>value</center></td>
-<td><center>7</center></td>
-<td><center>ffff</center></td>
-<td><center>ff</center></td>
-<td><center>ff</center></td>
-<td><center>1</center></td>
-<td><center>1</center></td>
-<td><center>1</center></td>
-<td><center>1</center></td>
-</tr>
-<tr>
-<td><center>mask</center></td>
-<td><center>ff</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-</tr>
-</table> <br>
-Early action: <table border=1>
-<tr>
-<td><center><font size=-3>ctr_amt_idx</font></center></td>
-<td><center><font size=-3>nxt_state_mask</font></center></td>
-<td><center><font size=-3>shift_amt</font></center></td>
-<td><center><font size=-3>nxt_state</font></center></td>
-<td><center><font size=-3>lookup_offset_8[1]</font></center></td>
-<td><center><font size=-3>ctr_ld_src</font></center></td>
-<td><center><font size=-3>lookup_offset_8[0]</font></center></td>
-<td><center><font size=-3>ld_lookup_8[0]</font></center></td>
-<td><center><font size=-3>ld_lookup_16</font></center></td>
-<td><center><font size=-3>ld_lookup_8[1]</font></center></td>
-<td><center><font size=-3>done</font></center></td>
-<td><center><font size=-3>lookup_offset_16</font></center></td>
-<td><center><font size=-3>ctr_load</font></center></td>
-<td><center><font size=-3>buf_req</font></center></td>
-</tr>
-<tr>
-<td><center>0</center></td>
-<td><center>ff</center></td>
-<td><center>e</center></td>
-<td><center>2</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>c</center></td>
-<td><center>0</center></td>
-<td><center>e</center></td>
-</tr>
-</table> <br>
-Action: <table border=1>
-<tr>
-<td><center><font size=-3>phv_8b_src_type_3</font></center></td>
-<td><center><font size=-3>phv_8b_src_type_2</font></center></td>
-<td><center><font size=-3>phv_8b_src_type_1</font></center></td>
-<td><center><font size=-3>phv_8b_src_type_0</font></center></td>
-<td><center><font size=-3>csum_addr[1]</font></center></td>
-<td><center><font size=-3>phv_16b_dst_2</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_0</font></center></td>
-<td><center><font size=-3>phv_16b_dst_0</font></center></td>
-<td><center><font size=-3>phv_16b_dst_1</font></center></td>
-<td><center><font size=-3>phv_32b_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_1</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_3</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_2</font></center></td>
-<td><center><font size=-3>phv_8b_dst_2</font></center></td>
-<td><center><font size=-3>phv_8b_dst_3</font></center></td>
-<td><center><font size=-3>phv_8b_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_dst_1</font></center></td>
-<td><center><font size=-3>pri_upd_en_shr</font></center></td>
-<td><center><font size=-3>phv_32b_src_type_1</font></center></td>
-<td><center><font size=-3>dst_offset_rst</font></center></td>
-<td><center><font size=-3>phv_32b_src_type_0</font></center></td>
-<td><center><font size=-3>phv_16b_src_1</font></center></td>
-<td><center><font size=-3>phv_16b_src_0</font></center></td>
-<td><center><font size=-3>phv_16b_src_3</font></center></td>
-<td><center><font size=-3>phv_16b_src_2</font></center></td>
-<td><center><font size=-3>phv_16b_dst_3</font></center></td>
-<td><center><font size=-3>phv_32b_src_2</font></center></td>
-<td><center><font size=-3>pri_upd_src</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_3</font></center></td>
-<td><center><font size=-3>phv_16b_offset_rot_imm_1</font></center></td>
-<td><center><font size=-3>csum_en[1]</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_1</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_0</font></center></td>
-<td><center><font size=-3>dst_offset_inc</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_2</font></center></td>
-<td><center><font size=-3>csum_addr[0]</font></center></td>
-<td><center><font size=-3>pri_upd_type</font></center></td>
-<td><center><font size=-3>phv_32b_dst_1</font></center></td>
-<td><center><font size=-3>phv_32b_src_3</font></center></td>
-<td><center><font size=-3>phv_32b_dst_2</font></center></td>
-<td><center><font size=-3>phv_32b_src_1</font></center></td>
-<td><center><font size=-3>phv_32b_src_0</font></center></td>
-<td><center><font size=-3>phv_32b_offset_rot_imm_1</font></center></td>
-<td><center><font size=-3>phv_32b_offset_rot_imm_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_3</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_2</font></center></td>
-<td><center><font size=-3>phv_16b_offset_rot_imm_0</font></center></td>
-<td><center><font size=-3>phv_32b_dst_3</font></center></td>
-<td><center><font size=-3>pri_upd_val_mask</font></center></td>
-<td><center><font size=-3>phv_16b_src_type_1</font></center></td>
-<td><center><font size=-3>phv_16b_src_type_0</font></center></td>
-<td><center><font size=-3>phv_8b_src_3</font></center></td>
-<td><center><font size=-3>csum_en[0]</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_3</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_2</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_1</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_src_1</font></center></td>
-<td><center><font size=-3>phv_8b_src_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_1</font></center></td>
-<td><center><font size=-3>phv_8b_src_2</font></center></td>
-</tr>
-<tr>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>1ff</center></td>
-<td><center>0</center></td>
-<td><center>83</center></td>
-<td><center>84</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
<td><center>42</center></td>
-<td><center>1ff</center></td>
-<td><center>43</center></td>
-<td><center>41</center></td>
+<td><center>40</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -4520,7 +4509,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">64</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">1</div>
@@ -4537,7 +4526,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">2</div>
@@ -4591,7 +4580,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x4<br>
+PHV 66 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -4608,13 +4597,13 @@
</tr>
</table>
<br>Previous states:
-<a href="#row248">Row 248</a><br>
+<a href="#row242">Row 242</a><br>
</div></div><br><br>
</td></tr>
<tr><td id="row245" class="row_cell">
<a href="#row245">Row 245</a> <br><br>
-State start (from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>)<br />
+State parse_ethernet (from state parse_pkt_out)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_245">Raw register data</a> <br><br><div id="reg_data_245" style="display: none;">
@@ -4632,6 +4621,412 @@
</tr>
<tr>
<td><center>value</center></td>
+<td><center>7</center></td>
+<td><center>ffff</center></td>
+<td><center>ff</center></td>
+<td><center>ff</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+</tr>
+<tr>
+<td><center>mask</center></td>
+<td><center>ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+</tr>
+</table> <br>
+Early action: <table border=1>
+<tr>
+<td><center><font size=-3>ctr_amt_idx</font></center></td>
+<td><center><font size=-3>nxt_state_mask</font></center></td>
+<td><center><font size=-3>shift_amt</font></center></td>
+<td><center><font size=-3>nxt_state</font></center></td>
+<td><center><font size=-3>lookup_offset_8[1]</font></center></td>
+<td><center><font size=-3>ctr_ld_src</font></center></td>
+<td><center><font size=-3>lookup_offset_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_16</font></center></td>
+<td><center><font size=-3>ld_lookup_8[1]</font></center></td>
+<td><center><font size=-3>done</font></center></td>
+<td><center><font size=-3>lookup_offset_16</font></center></td>
+<td><center><font size=-3>ctr_load</font></center></td>
+<td><center><font size=-3>buf_req</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>ff</center></td>
+<td><center>e</center></td>
+<td><center>2</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>c</center></td>
+<td><center>0</center></td>
+<td><center>e</center></td>
+</tr>
+</table> <br>
+Action: <table border=1>
+<tr>
+<td><center><font size=-3>phv_8b_src_type_3</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_2</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_0</font></center></td>
+<td><center><font size=-3>csum_addr[1]</font></center></td>
+<td><center><font size=-3>phv_16b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_dst_1</font></center></td>
+<td><center><font size=-3>pri_upd_en_shr</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_1</font></center></td>
+<td><center><font size=-3>dst_offset_rst</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_3</font></center></td>
+<td><center><font size=-3>phv_16b_src_2</font></center></td>
+<td><center><font size=-3>phv_16b_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_src_2</font></center></td>
+<td><center><font size=-3>pri_upd_src</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>csum_en[1]</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>dst_offset_inc</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>csum_addr[0]</font></center></td>
+<td><center><font size=-3>pri_upd_type</font></center></td>
+<td><center><font size=-3>phv_32b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_3</font></center></td>
+<td><center><font size=-3>phv_32b_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_src_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_0</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_2</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_32b_dst_3</font></center></td>
+<td><center><font size=-3>pri_upd_val_mask</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_3</font></center></td>
+<td><center><font size=-3>csum_en[0]</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_2</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>83</center></td>
+<td><center>84</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>41</center></td>
+<td><center>1ff</center></td>
+<td><center>42</center></td>
+<td><center>40</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>c</center></td>
+<td><center>5</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>2</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>8</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>4</center></td>
+<td><center>0</center></td>
+<td><center>7</center></td>
+</tr>
+</table> <br>
+</div></div><br><br>
+
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_245">Input buffer</a> <br><br><div id="input_buffer_245" style="display: block;">
+<div style="min-width: 1060;"></div>
+<table border=0><tr>
+<td valign=bottom align=right><font size=-3>Matches </font></td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="tcam_arrow" style="width:54px; bottom: 0px;">16</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=40></td></tr><tr>
+<td align=right><font size=-3>Bytes </font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>1</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>2</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>3</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>4</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>13</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>14</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>15</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>16</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>17</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>18</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>19</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>28</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>29</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>30</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>31</center></font></td>
+</tr><tr>
+<td valign=top align=right><font size=-3>Extractions </font></td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">64</div>
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:108px; top: 0px;">1</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">131</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:108px; top: 0px;">2</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">132</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+</tr></table>
+<div style="height:40px;"> </div>
+PHV 66 <font size=+1>|=</font> 0x4<br>
+<br>
+</div></div><br><br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_245">Transitions</a> <br><br><div id="transitions_245" style="display: block;">
+<table border=0 id="transitions_table_245" class="draggable transitions_table">
+<tr>
+<th>16b</th>
+<th> </th></tr>
+<td>0800</td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row253">Row 253 (state parse_ipv4)</a></td>
+</tr>
+<td>Default</td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row252">Row 252 (state <leaf>)</a></td>
+</tr>
+</table>
+<br>Previous states:
+<a href="#row247">Row 247</a><br>
+</div></div><br><br>
+</td></tr>
+
+<tr><td id="row244" class="row_cell">
+<a href="#row244">Row 244</a> <br><br>
+State start (from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>)<br />
+<br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_244">Raw register data</a> <br><br><div id="reg_data_244" style="display: none;">
+TCAM word: <table border=1>
+<tr>
+<td><center><font size=-3></font></center></td>
+<td><center><font size=-3>curr_state</font></center></td>
+<td><center><font size=-3>lookup_16</font></center></td>
+<td><center><font size=-3>lookup_8[1]</font></center></td>
+<td><center><font size=-3>lookup_8[0]</font></center></td>
+<td><center><font size=-3>ver_1</font></center></td>
+<td><center><font size=-3>ver_0</font></center></td>
+<td><center><font size=-3>ctr_zero</font></center></td>
+<td><center><font size=-3>ctr_neg</font></center></td>
+</tr>
+<tr>
+<td><center>value</center></td>
<td><center>8</center></td>
<td><center>ffff</center></td>
<td><center>ff</center></td>
@@ -4769,7 +5164,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>43</center></td>
+<td><center>42</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -4820,7 +5215,7 @@
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_245">Input buffer</a> <br><br><div id="input_buffer_245" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_244">Input buffer</a> <br><br><div id="input_buffer_244" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -4991,20 +5386,20 @@
</td>
</tr></table>
<div style="height:20px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x40<br>
+PHV 66 <font size=+1>|=</font> 0x40<br>
<br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_245">Transitions</a> <br><br><div id="transitions_245" style="display: block;">
-<table border=0 id="transitions_table_245" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_244">Transitions</a> <br><br><div id="transitions_244" style="display: block;">
+<table border=0 id="transitions_table_244" class="draggable transitions_table">
<tr>
<th>8b[0]</th>
<th> </th></tr>
<td>00</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row244">Row 244 (state parse_pkt_in)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row243">Row 243 (state parse_pkt_in)</a></td>
</tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row243">Row 243 (state default_parser)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row242">Row 242 (state default_parser)</a></td>
</tr>
</table>
<br>Previous states:
@@ -5012,12 +5407,12 @@
</div></div><br><br>
</td></tr>
-<tr><td id="row244" class="row_cell">
-<a href="#row244">Row 244</a> <br><br>
+<tr><td id="row243" class="row_cell">
+<a href="#row243">Row 243</a> <br><br>
State parse_pkt_in (from state start)<br />
<br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_244">Raw register data</a> <br><br><div id="reg_data_244" style="display: none;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_243">Raw register data</a> <br><br><div id="reg_data_243" style="display: none;">
TCAM word: <table border=1>
<tr>
<td><center><font size=-3></font></center></td>
@@ -5169,7 +5564,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>43</center></td>
+<td><center>42</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -5220,7 +5615,7 @@
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_244">Input buffer</a> <br><br><div id="input_buffer_244" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_243">Input buffer</a> <br><br><div id="input_buffer_243" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -5391,12 +5786,12 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 67 <font size=+1>|=</font> 0x1<br>
+PHV 66 <font size=+1>|=</font> 0x1<br>
<br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_244">Transitions</a> <br><br><div id="transitions_244" style="display: block;">
-<table border=0 id="transitions_table_244" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_243">Transitions</a> <br><br><div id="transitions_243" style="display: block;">
+<table border=0 id="transitions_table_243" class="draggable transitions_table">
<tr>
<th> </th></tr>
<td>Default</td>
@@ -5404,16 +5799,16 @@
</tr>
</table>
<br>Previous states:
-<a href="#row245">Row 245</a><br>
+<a href="#row244">Row 244</a><br>
</div></div><br><br>
</td></tr>
-<tr><td id="row243" class="row_cell">
-<a href="#row243">Row 243</a> <br><br>
+<tr><td id="row242" class="row_cell">
+<a href="#row242">Row 242</a> <br><br>
State default_parser (from state start)<br />
<br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_243">Raw register data</a> <br><br><div id="reg_data_243" style="display: none;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_242">Raw register data</a> <br><br><div id="reg_data_242" style="display: none;">
TCAM word: <table border=1>
<tr>
<td><center><font size=-3></font></center></td>
@@ -5615,13 +6010,13 @@
</table> <br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('saved_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#saved_243">Saved matches</a> <br><br><div id="saved_243" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('saved_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#saved_242">Saved matches</a> <br><br><div id="saved_242" style="display: block;">
16b
<font size=+1><-</font>
<a href="#row255">Row 255</a><br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_243">Input buffer</a> <br><br><div id="input_buffer_243" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_242">Input buffer</a> <br><br><div id="input_buffer_242" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -5793,28 +6188,23 @@
<div style="height:20px;"> </div>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_243">Transitions</a> <br><br><div id="transitions_243" style="display: block;">
-<table border=0 id="transitions_table_243" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_242">Transitions</a> <br><br><div id="transitions_242" style="display: block;">
+<table border=0 id="transitions_table_242" class="draggable transitions_table">
<tr>
<th>16b</th>
<th> </th></tr>
<td>00c0 && 01ff</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row248">Row 248 (state parse_pkt_out)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row247">Row 247 (state parse_pkt_out)</a></td>
</tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row247">Row 247 (state parse_ethernet)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row246">Row 246 (state parse_ethernet)</a></td>
</tr>
</table>
<br>Previous states:
-<a href="#row245">Row 245</a><br>
+<a href="#row244">Row 244</a><br>
</div></div><br><br>
</td></tr>
-<tr><td id="row242" class="row_cell">
-<a href="#row242">Row 242</a> <br><br>
-Unmatchable
-</td></tr>
-
<tr><td id="row241" class="row_cell">
<a href="#row241">Row 241</a> <br><br>
Unmatchable
@@ -7026,11 +7416,11 @@
</td></tr>
<tr><td class="row_cell">
-Matchable row occupancy: 13/256 (5.08%)
+Matchable row occupancy: 14/256 (5.47%)
<br></td></tr>
</table>
-<br><i>Created on Thu Sep 7 13:57:10 2017</i>
+<br><i>Created on Fri Sep 8 08:24:46 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/phv_allocation.html b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/phv_allocation.html
index f8dce72..579b829 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/phv_allocation.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/phv_allocation.html
@@ -19,2670 +19,6 @@
ethernet.dstAddr[39:8] in container bits [31:0]
-</title></rect>
-<rect x="9" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 2
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="9" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 3
-
-
-</title></rect>
-<rect x="9" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 4
-
-
-</title></rect>
-<rect x="9" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 5
-
-
-</title></rect>
-<rect x="9" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 6
-
-
-</title></rect>
-<rect x="9" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 7
-
-
-</title></rect>
-<rect x="27" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 8
-
-
-</title></rect>
-<rect x="27" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 9
-
-
-</title></rect>
-<rect x="27" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 10
-
-
-</title></rect>
-<rect x="27" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 11
-
-
-</title></rect>
-<rect x="27" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 12
-
-
-</title></rect>
-<rect x="27" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 13
-
-
-</title></rect>
-<rect x="27" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 14
-
-
-</title></rect>
-<rect x="27" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 15
-
-
-</title></rect>
-<text x="20" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="54" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 16
-
-
-</title></rect>
-<rect x="54" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 17
-
-
-</title></rect>
-<rect x="54" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 18
-
-
-</title></rect>
-<rect x="54" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 19
-
-
-</title></rect>
-<rect x="54" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 20
-
-
-</title></rect>
-<rect x="54" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 21
-
-
-</title></rect>
-<rect x="54" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 22
-
-
-</title></rect>
-<rect x="54" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 23
-
-
-</title></rect>
-<rect x="72" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 24
-
-
-</title></rect>
-<rect x="72" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 25
-
-
-</title></rect>
-<rect x="72" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 26
-
-
-</title></rect>
-<rect x="72" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 27
-
-
-</title></rect>
-<rect x="72" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 28
-
-
-</title></rect>
-<rect x="72" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 29
-
-
-</title></rect>
-<rect x="72" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 30
-
-
-</title></rect>
-<rect x="72" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 31
-
-
-</title></rect>
-<text x="65" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="99" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 32
-
-
-</title></rect>
-<rect x="99" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 33
-
-
-</title></rect>
-<rect x="99" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 34
-
-
-</title></rect>
-<rect x="99" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 35
-
-
-</title></rect>
-<rect x="99" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 36
-
-
-</title></rect>
-<rect x="99" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 37
-
-
-</title></rect>
-<rect x="99" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 38
-
-
-</title></rect>
-<rect x="99" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 39
-
-
-</title></rect>
-<rect x="117" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 40
-
-
-</title></rect>
-<rect x="117" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 41
-
-
-</title></rect>
-<rect x="117" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 42
-
-
-</title></rect>
-<rect x="117" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 43
-
-
-</title></rect>
-<rect x="117" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 44
-
-
-</title></rect>
-<rect x="117" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 45
-
-
-</title></rect>
-<rect x="117" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 46
-
-
-</title></rect>
-<rect x="117" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 47
-
-
-</title></rect>
-<text x="110" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="144" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 48
-
-
-</title></rect>
-<rect x="144" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 49
-
-
-</title></rect>
-<rect x="144" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 50
-
-
-</title></rect>
-<rect x="144" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 51
-
-
-</title></rect>
-<rect x="144" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 52
-
-
-</title></rect>
-<rect x="144" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 53
-
-
-</title></rect>
-<rect x="144" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 54
-
-
-</title></rect>
-<rect x="144" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 55
-
-
-</title></rect>
-<rect x="162" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 56
-
-
-</title></rect>
-<rect x="162" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 57
-
-
-</title></rect>
-<rect x="162" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 58
-
-
-</title></rect>
-<rect x="162" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 59
-
-
-</title></rect>
-<rect x="162" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 60
-
-
-</title></rect>
-<rect x="162" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 61
-
-
-</title></rect>
-<rect x="162" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 62
-
-
-</title></rect>
-<rect x="162" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 63
-
-
-</title></rect>
-<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 64
-
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 65
-
-ethernet.dstAddr[47:40] in container bits [7:0]
-
-</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 66
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 67
-
-POV.POV[39:32] in container bits [7:0]
-
-Field --validity_check--packet_out_hdr read by table ingress_pkt for a gateway expression
-Field --validity_check--packet_out_hdr written by table ingress_pkt's action _packet_out
-</title></rect>
-<text x="191" y="79" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">RW<title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 67
-
-POV.POV[39:32] in container bits [7:0]
-
-Field --validity_check--packet_out_hdr read by table ingress_pkt for a gateway expression
-Field --validity_check--packet_out_hdr written by table ingress_pkt's action _packet_out
-</title></text>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 68
-
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
-
-</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 69
-
-
-</title></rect>
-<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 70
-
-
-</title></rect>
-<rect x="189" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 71
-
-
-</title></rect>
-<rect x="207" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 72
-
-
-</title></rect>
-<rect x="207" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 73
-
-
-</title></rect>
-<rect x="207" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 74
-
-
-</title></rect>
-<rect x="207" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 75
-
-
-</title></rect>
-<rect x="207" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 76
-
-
-</title></rect>
-<rect x="207" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 77
-
-
-</title></rect>
-<rect x="207" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 78
-
-
-</title></rect>
-<rect x="207" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 79
-
-
-</title></rect>
-<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 80
-
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-Field ig_intr_md_for_tm.copy_to_cpu read by table egress_pkt for a gateway expression
-</title></rect>
-<text x="236" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 80
-
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-Field ig_intr_md_for_tm.copy_to_cpu read by table egress_pkt for a gateway expression
-</title></text>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
-eg_intr_md._pad7[4:0] in container bits [7:3]
-eg_intr_md.egress_cos[2:0] in container bits [2:0]
-
-</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 82
-
-POV.POV[7:0] in container bits [7:0]
-
-Field --validity_check--packet_in_hdr written by table egress_pkt's action add_packet_in_hdr
-</title></rect>
-<text x="236" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 82
-
-POV.POV[7:0] in container bits [7:0]
-
-Field --validity_check--packet_in_hdr written by table egress_pkt's action add_packet_in_hdr
-</title></text>
-<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 83
-
-
-</title></rect>
-<rect x="234" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 84
-
-
-</title></rect>
-<rect x="234" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 85
-
-
-</title></rect>
-<rect x="234" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 86
-
-
-</title></rect>
-<rect x="234" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 87
-
-
-</title></rect>
-<rect x="252" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 88
-
-
-</title></rect>
-<rect x="252" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 89
-
-
-</title></rect>
-<rect x="252" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 90
-
-
-</title></rect>
-<rect x="252" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 91
-
-
-</title></rect>
-<rect x="252" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 92
-
-
-</title></rect>
-<rect x="252" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 93
-
-
-</title></rect>
-<rect x="252" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 94
-
-
-</title></rect>
-<rect x="252" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 95
-
-
-</title></rect>
-<text x="245" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="279" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 96
-
-
-</title></rect>
-<rect x="279" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 97
-
-
-</title></rect>
-<rect x="279" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 98
-
-
-</title></rect>
-<rect x="279" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 99
-
-
-</title></rect>
-<rect x="279" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 100
-
-
-</title></rect>
-<rect x="279" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 101
-
-
-</title></rect>
-<rect x="279" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 102
-
-
-</title></rect>
-<rect x="279" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 103
-
-
-</title></rect>
-<rect x="297" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 104
-
-
-</title></rect>
-<rect x="297" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 105
-
-
-</title></rect>
-<rect x="297" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 106
-
-
-</title></rect>
-<rect x="297" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 107
-
-
-</title></rect>
-<rect x="297" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 108
-
-
-</title></rect>
-<rect x="297" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 109
-
-
-</title></rect>
-<rect x="297" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 110
-
-
-</title></rect>
-<rect x="297" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 111
-
-
-</title></rect>
-<text x="290" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="324" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 112
-
-
-</title></rect>
-<rect x="324" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 113
-
-
-</title></rect>
-<rect x="324" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 114
-
-
-</title></rect>
-<rect x="324" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 115
-
-
-</title></rect>
-<rect x="324" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 116
-
-
-</title></rect>
-<rect x="324" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 117
-
-
-</title></rect>
-<rect x="324" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 118
-
-
-</title></rect>
-<rect x="324" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 119
-
-
-</title></rect>
-<rect x="342" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 120
-
-
-</title></rect>
-<rect x="342" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 121
-
-
-</title></rect>
-<rect x="342" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 122
-
-
-</title></rect>
-<rect x="342" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 123
-
-
-</title></rect>
-<rect x="342" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 124
-
-
-</title></rect>
-<rect x="342" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 125
-
-
-</title></rect>
-<rect x="342" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 126
-
-
-</title></rect>
-<rect x="342" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 127
-
-
-</title></rect>
-<text x="335" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="369" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 128
-
-ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
-ig_intr_md._pad1[0:0] in container bits [14:14]
-ig_intr_md._pad2[1:0] in container bits [13:12]
-ig_intr_md._pad3[2:0] in container bits [11:9]
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-</title></rect>
-<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 129
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_out_hdr.egress_port read by table ingress_pkt's action _packet_out
-</title></rect>
-<text x="371" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 129
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_out_hdr.egress_port read by table ingress_pkt's action _packet_out
-</title></text>
-<rect x="369" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 130
-
-ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md_for_tm.ucast_egress_port written by table ingress_pkt's action _packet_out
-</title></rect>
-<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 130
-
-ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md_for_tm.ucast_egress_port written by table ingress_pkt's action _packet_out
-</title></text>
-<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 131
-
-ethernet.dstAddr[7:0] in container bits [15:8]
-ethernet.srcAddr[47:40] in container bits [7:0]
-
-</title></rect>
-<rect x="369" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 132
-
-ethernet.etherType[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="369" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 133
-
-
-</title></rect>
-<rect x="369" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 134
-
-
-</title></rect>
-<rect x="369" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 135
-
-
-</title></rect>
-<rect x="387" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 136
-
-
-</title></rect>
-<rect x="387" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 137
-
-
-</title></rect>
-<rect x="387" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 138
-
-
-</title></rect>
-<rect x="387" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 139
-
-
-</title></rect>
-<rect x="387" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 140
-
-
-</title></rect>
-<rect x="387" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 141
-
-
-</title></rect>
-<rect x="387" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 142
-
-
-</title></rect>
-<rect x="387" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 143
-
-
-</title></rect>
-<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 144
-
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md.ingress_port read by table egress_pkt's action add_packet_in_hdr
-</title></rect>
-<text x="416" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 144
-
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md.ingress_port read by table egress_pkt's action add_packet_in_hdr
-</title></text>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 145
-
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_in_hdr.ingress_port written by table egress_pkt's action add_packet_in_hdr
-</title></rect>
-<text x="416" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 145
-
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_in_hdr.ingress_port written by table egress_pkt's action add_packet_in_hdr
-</title></text>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 146
-
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
-
-</title></rect>
-<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 147
-
-
-</title></rect>
-<rect x="414" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 148
-
-
-</title></rect>
-<rect x="414" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 149
-
-
-</title></rect>
-<rect x="414" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 150
-
-
-</title></rect>
-<rect x="414" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 151
-
-
-</title></rect>
-<rect x="432" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 152
-
-
-</title></rect>
-<rect x="432" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 153
-
-
-</title></rect>
-<rect x="432" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 154
-
-
-</title></rect>
-<rect x="432" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 155
-
-
-</title></rect>
-<rect x="432" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 156
-
-
-</title></rect>
-<rect x="432" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 157
-
-
-</title></rect>
-<rect x="432" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 158
-
-
-</title></rect>
-<rect x="432" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 159
-
-
-</title></rect>
-<text x="425" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="459" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 160
-
-
-</title></rect>
-<rect x="459" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 161
-
-
-</title></rect>
-<rect x="459" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 162
-
-
-</title></rect>
-<rect x="459" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 163
-
-
-</title></rect>
-<rect x="459" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 164
-
-
-</title></rect>
-<rect x="459" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 165
-
-
-</title></rect>
-<rect x="459" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 166
-
-
-</title></rect>
-<rect x="459" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 167
-
-
-</title></rect>
-<rect x="477" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 168
-
-
-</title></rect>
-<rect x="477" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 169
-
-
-</title></rect>
-<rect x="477" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 170
-
-
-</title></rect>
-<rect x="477" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 171
-
-
-</title></rect>
-<rect x="477" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 172
-
-
-</title></rect>
-<rect x="477" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 173
-
-
-</title></rect>
-<rect x="477" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 174
-
-
-</title></rect>
-<rect x="477" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 175
-
-
-</title></rect>
-<text x="470" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="504" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 176
-
-
-</title></rect>
-<rect x="504" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 177
-
-
-</title></rect>
-<rect x="504" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 178
-
-
-</title></rect>
-<rect x="504" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 179
-
-
-</title></rect>
-<rect x="504" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 180
-
-
-</title></rect>
-<rect x="504" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 181
-
-
-</title></rect>
-<rect x="504" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 182
-
-
-</title></rect>
-<rect x="504" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 183
-
-
-</title></rect>
-<rect x="522" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 184
-
-
-</title></rect>
-<rect x="522" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 185
-
-
-</title></rect>
-<rect x="522" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 186
-
-
-</title></rect>
-<rect x="522" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 187
-
-
-</title></rect>
-<rect x="522" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 188
-
-
-</title></rect>
-<rect x="522" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 189
-
-
-</title></rect>
-<rect x="522" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 190
-
-
-</title></rect>
-<rect x="522" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 191
-
-
-</title></rect>
-<text x="515" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="549" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 192
-
-
-</title></rect>
-<rect x="549" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 193
-
-
-</title></rect>
-<rect x="549" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 194
-
-
-</title></rect>
-<rect x="549" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 195
-
-
-</title></rect>
-<rect x="549" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 196
-
-
-</title></rect>
-<rect x="549" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 197
-
-
-</title></rect>
-<rect x="549" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 198
-
-
-</title></rect>
-<rect x="549" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 199
-
-
-</title></rect>
-<rect x="567" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 200
-
-
-</title></rect>
-<rect x="567" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 201
-
-
-</title></rect>
-<rect x="567" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 202
-
-
-</title></rect>
-<rect x="567" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 203
-
-
-</title></rect>
-<rect x="567" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 204
-
-
-</title></rect>
-<rect x="567" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 205
-
-
-</title></rect>
-<rect x="567" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 206
-
-
-</title></rect>
-<rect x="567" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 207
-
-
-</title></rect>
-<text x="560" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="594" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 208
-
-
-</title></rect>
-<rect x="594" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 209
-
-
-</title></rect>
-<rect x="594" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 210
-
-
-</title></rect>
-<rect x="594" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 211
-
-
-</title></rect>
-<rect x="594" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 212
-
-
-</title></rect>
-<rect x="594" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 213
-
-
-</title></rect>
-<rect x="594" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 214
-
-
-</title></rect>
-<rect x="594" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 215
-
-
-</title></rect>
-<rect x="612" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 216
-
-
-</title></rect>
-<rect x="612" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 217
-
-
-</title></rect>
-<rect x="612" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 218
-
-
-</title></rect>
-<rect x="612" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 219
-
-
-</title></rect>
-<rect x="612" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 220
-
-
-</title></rect>
-<rect x="612" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 221
-
-
-</title></rect>
-<rect x="612" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 222
-
-
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-<rect x="612" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 223
-
-
-</title></rect>
-<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 256
- Tag-Along Space
-
-ipv4.ttl[7:0] in container bits [31:24]
-ipv4.protocol[7:0] in container bits [23:16]
-ipv4.hdrChecksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 257
- Tag-Along Space
-
-ipv4.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
-ipv4.dstAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 259
- Tag-Along Space
-
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
-tcp.dataOffset[3:0] in container bits [31:28]
-tcp.res[2:0] in container bits [27:25]
-tcp.ecn[2:0] in container bits [24:22]
-tcp.ctrl[5:0] in container bits [21:16]
-tcp.window[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 261
- Tag-Along Space
-
-tcp.checksum[15:0] in container bits [31:16]
-tcp.urgentPtr[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 262
- Tag-Along Space
-
-
-</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 263
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 264
- Tag-Along Space
-
-ipv4.ttl[7:0] in container bits [31:24]
-ipv4.protocol[7:0] in container bits [23:16]
-ipv4.hdrChecksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 265
- Tag-Along Space
-
-ipv4.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 266
- Tag-Along Space
-
-ipv4.dstAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-tcp.dataOffset[3:0] in container bits [31:28]
-tcp.res[2:0] in container bits [27:25]
-tcp.ecn[2:0] in container bits [24:22]
-tcp.ctrl[5:0] in container bits [21:16]
-tcp.window[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-tcp.checksum[15:0] in container bits [31:16]
-tcp.urgentPtr[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-ethernet.dstAddr[39:8] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 271
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="774" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 272
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 273
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 274
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 275
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 276
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 277
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 278
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 279
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 280
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 281
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 282
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 283
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 284
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 285
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 286
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 287
- Tag-Along Space
-
-
-</title></rect>
-<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 288
- Tag-Along Space
-
-ipv4.version[3:0] in container bits [7:4]
-ipv4.ihl[3:0] in container bits [3:0]
-
-</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 289
- Tag-Along Space
-
-ipv4.diffserv[7:0] in container bits [7:0]
-
-</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 290
- Tag-Along Space
-
-tcp.srcPort[15:8] in container bits [7:0]
-udp.srcPort[15:8] in container bits [7:0]
-
-</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 291
- Tag-Along Space
-
-tcp.srcPort[7:0] in container bits [7:0]
-udp.srcPort[7:0] in container bits [7:0]
-
-</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 292
- Tag-Along Space
-
-
-</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 293
- Tag-Along Space
-
-
-</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 294
- Tag-Along Space
-
-
-</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 295
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 296
- Tag-Along Space
-
-ipv4.version[3:0] in container bits [7:4]
-ipv4.ihl[3:0] in container bits [3:0]
-
-</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ipv4.diffserv[7:0] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-tcp.srcPort[15:8] in container bits [7:0]
-udp.srcPort[15:8] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-tcp.srcPort[7:0] in container bits [7:0]
-udp.srcPort[7:0] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-ethernet.dstAddr[47:40] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 301
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 302
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 303
- Tag-Along Space
-
-
-</title></rect>
-<text x="830" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="864" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 304
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 305
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 306
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 307
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 308
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 309
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 310
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 311
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 312
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 313
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 314
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 315
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 316
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 317
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 318
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 319
- Tag-Along Space
-
-
-</title></rect>
-<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 320
- Tag-Along Space
-
-ipv4.totalLen[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 321
- Tag-Along Space
-
-ipv4.identification[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 322
- Tag-Along Space
-
-ipv4.flags[2:0] in container bits [15:13]
-ipv4.fragOffset[12:0] in container bits [12:0]
-
-</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 323
- Tag-Along Space
-
-tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 324
- Tag-Along Space
-
-tcp.seqNo[31:16] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 325
- Tag-Along Space
-
-tcp.seqNo[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 326
- Tag-Along Space
-
-
-</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 327
- Tag-Along Space
-
-
-</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 328
- Tag-Along Space
-
-
-</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 329
- Tag-Along Space
-
-
-</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 330
- Tag-Along Space
-
-
-</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 331
- Tag-Along Space
-
-
-</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 332
- Tag-Along Space
-
-ipv4.totalLen[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 333
- Tag-Along Space
-
-ipv4.identification[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-ipv4.flags[2:0] in container bits [15:13]
-ipv4.fragOffset[12:0] in container bits [12:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-tcp.dstPort[15:0] in container bits [15:0]
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-tcp.seqNo[31:16] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-tcp.seqNo[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 21
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-ethernet.dstAddr[7:0] in container bits [15:8]
-ethernet.srcAddr[47:40] in container bits [7:0]
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 21
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-ethernet.etherType[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 340
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
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- Unassigned
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- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 342
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 343
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 344
- Tag-Along Space
-
-
-</title></rect>
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- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 346
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
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- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
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- Tag-Along Space
-
-
-</title></rect>
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- Tag-Along Space
-
-
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-<rect x="972" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
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- Container Address: 350
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 351
- Tag-Along Space
-
-
-</title></rect>
-<text x="965" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="999" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 352
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 353
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 354
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 355
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 356
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 357
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 358
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 359
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 360
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 361
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 362
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 363
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 364
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 365
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 366
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 367
- Tag-Along Space
-
-
-</title></rect>
-<text x="1010" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="0" y="0" width="1053" height="198" style="stroke:black; stroke-width:2; fill:none""></rect>
-</svg><br>
-<h2>Stage 1</h2>
-<svg viewBox="0 0 1280 200" preserveAspectRatio="xmlMidYMid meet">
-<rect x="9" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 0
-
-POV.POV[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="9" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 1
-
-ethernet.dstAddr[39:8] in container bits [31:0]
-
Field ethernet.dstAddr read by table table0 for a match key
</title></rect>
<text x="11" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 0
@@ -3143,96 +479,89 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
-Field ig_intr_md_for_tm.copy_to_cpu written by table table0's action send_to_cpu
+Field ethernet.dstAddr read by table table0 for a match key
</title></rect>
-<text x="191" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 4
+<text x="191" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
-Field ig_intr_md_for_tm.copy_to_cpu written by table table0's action send_to_cpu
+Field ethernet.dstAddr read by table table0 for a match key
</title></text>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
-Field ethernet.dstAddr read by table table0 for a match key
+Field ethernet.srcAddr read by table table0 for a match key
</title></rect>
<text x="191" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
-
-Field ethernet.dstAddr read by table table0 for a match key
-</title></text>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 66
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-Field ethernet.srcAddr read by table table0 for a match key
-</title></rect>
-<text x="191" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 66
-
ethernet.srcAddr[39:32] in container bits [7:0]
Field ethernet.srcAddr read by table table0 for a match key
</title></text>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 67
+ Container Address: 66
POV.POV[39:32] in container bits [7:0]
Field --validity_check--packet_out_hdr read by table table0 for a gateway expression
+Field --validity_check--packet_out_hdr written by table process_packet_out_table's action _process_packet_out
+Field --validity_check--packet_in_hdr written by table table0's action send_to_cpu
</title></rect>
-<text x="191" y="79" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
+<text x="191" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">RW<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 67
+ Container Address: 66
POV.POV[39:32] in container bits [7:0]
Field --validity_check--packet_out_hdr read by table table0 for a gateway expression
+Field --validity_check--packet_out_hdr written by table process_packet_out_table's action _process_packet_out
+Field --validity_check--packet_in_hdr written by table table0's action send_to_cpu
</title></text>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 68
+ Container Address: 67
ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
Field ig_intr_md_for_tm.drop_ctl written by table table0's action _drop
</title></rect>
-<text x="191" y="97" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 4
+<text x="191" y="79" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 68
+ Container Address: 67
ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
Field ig_intr_md_for_tm.drop_ctl written by table table0's action _drop
</title></text>
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 68
+
+
+</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
Unassigned
Container Bit Width: 8
@@ -3311,29 +640,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -3666,6 +994,7 @@
ig_intr_md.ingress_port[8:0] in container bits [8:0]
Field ig_intr_md.ingress_port read by table table0 for a match key
+Field ig_intr_md.ingress_port read by table table0's action send_to_cpu
</title></rect>
<text x="371" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
Assigned to Ingress
@@ -3679,6 +1008,7 @@
ig_intr_md.ingress_port[8:0] in container bits [8:0]
Field ig_intr_md.ingress_port read by table table0 for a match key
+Field ig_intr_md.ingress_port read by table table0's action send_to_cpu
</title></text>
<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 8
Assigned to Ingress
@@ -3690,7 +1020,22 @@
packet_out_hdr._padding[6:0] in container bits [6:0]
packet_in_hdr._padding[6:0] in container bits [6:0]
+Field packet_out_hdr.egress_port read by table process_packet_out_table's action _process_packet_out
+Field packet_in_hdr.ingress_port written by table table0's action send_to_cpu
</title></rect>
+<text x="371" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">RW<title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 129
+
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
+
+Field packet_out_hdr.egress_port read by table process_packet_out_table's action _process_packet_out
+Field packet_in_hdr.ingress_port written by table table0's action send_to_cpu
+</title></text>
<rect x="369" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -3698,7 +1043,9 @@
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+Field ig_intr_md_for_tm.ucast_egress_port written by table process_packet_out_table's action _process_packet_out
Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action set_egress_port
+Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action send_to_cpu
</title></rect>
<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 8
Assigned to Ingress
@@ -3707,7 +1054,9 @@
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+Field ig_intr_md_for_tm.ucast_egress_port written by table process_packet_out_table's action _process_packet_out
Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action set_egress_port
+Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action send_to_cpu
</title></text>
<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 8
Assigned to Ingress
@@ -3827,30 +1176,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -4397,7 +1743,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -4408,7 +1754,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -4417,7 +1763,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -4426,40 +1772,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -4476,7 +1821,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -4487,7 +1832,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -4496,7 +1841,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -4516,7 +1861,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -4529,7 +1874,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -4687,7 +2032,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -4697,7 +2042,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -4706,7 +2051,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -4716,7 +2061,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -4726,20 +2071,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -4758,7 +2105,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -4768,7 +2115,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -4777,7 +2124,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -4787,7 +2134,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -4961,7 +2308,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -4970,7 +2317,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -4979,7 +2326,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -4989,40 +2336,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -5065,7 +2413,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -5074,7 +2422,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -5083,7 +2431,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -5093,7 +2441,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -5103,7 +2451,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -5113,7 +2461,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -5148,7 +2496,2622 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
+
+</title></rect>
+<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 341
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="954" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 342
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="954" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 343
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 344
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 345
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 346
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 347
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 348
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 349
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 350
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 351
+ Tag-Along Space
+
+
+</title></rect>
+<text x="965" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="999" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 352
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 353
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 354
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 355
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 356
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 357
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 358
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 359
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 360
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 361
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 362
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 363
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 364
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 365
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 366
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
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+<rect x="252" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 93
+
+
+</title></rect>
+<rect x="252" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 94
+
+
+</title></rect>
+<rect x="252" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 95
+
+
+</title></rect>
+<text x="245" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="279" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 96
+
+
+</title></rect>
+<rect x="279" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 97
+
+
+</title></rect>
+<rect x="279" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 98
+
+
+</title></rect>
+<rect x="279" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 99
+
+
+</title></rect>
+<rect x="279" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 100
+
+
+</title></rect>
+<rect x="279" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 101
+
+
+</title></rect>
+<rect x="279" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 102
+
+
+</title></rect>
+<rect x="279" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 103
+
+
+</title></rect>
+<rect x="297" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 104
+
+
+</title></rect>
+<rect x="297" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 105
+
+
+</title></rect>
+<rect x="297" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 106
+
+
+</title></rect>
+<rect x="297" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 107
+
+
+</title></rect>
+<rect x="297" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 108
+
+
+</title></rect>
+<rect x="297" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 109
+
+
+</title></rect>
+<rect x="297" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 110
+
+
+</title></rect>
+<rect x="297" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 111
+
+
+</title></rect>
+<text x="290" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="324" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 112
+
+
+</title></rect>
+<rect x="324" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 113
+
+
+</title></rect>
+<rect x="324" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 114
+
+
+</title></rect>
+<rect x="324" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 115
+
+
+</title></rect>
+<rect x="324" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 116
+
+
+</title></rect>
+<rect x="324" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 117
+
+
+</title></rect>
+<rect x="324" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 118
+
+
+</title></rect>
+<rect x="324" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 119
+
+
+</title></rect>
+<rect x="342" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 120
+
+
+</title></rect>
+<rect x="342" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 121
+
+
+</title></rect>
+<rect x="342" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 122
+
+
+</title></rect>
+<rect x="342" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 123
+
+
+</title></rect>
+<rect x="342" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 124
+
+
+</title></rect>
+<rect x="342" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 125
+
+
+</title></rect>
+<rect x="342" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 126
+
+
+</title></rect>
+<rect x="342" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 127
+
+
+</title></rect>
+<text x="335" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="369" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 128
+
+ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
+ig_intr_md._pad1[0:0] in container bits [14:14]
+ig_intr_md._pad2[1:0] in container bits [13:12]
+ig_intr_md._pad3[2:0] in container bits [11:9]
+ig_intr_md.ingress_port[8:0] in container bits [8:0]
+
+Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
+</title></rect>
+<text x="371" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 128
+
+ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
+ig_intr_md._pad1[0:0] in container bits [14:14]
+ig_intr_md._pad2[1:0] in container bits [13:12]
+ig_intr_md._pad3[2:0] in container bits [11:9]
+ig_intr_md.ingress_port[8:0] in container bits [8:0]
+
+Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
+</title></text>
+<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 129
+
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
+
+</title></rect>
+<rect x="369" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 130
+
+ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+
+Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
+Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
+</title></rect>
+<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 130
+
+ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+
+Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
+Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
+</title></text>
+<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 131
+
+ethernet.dstAddr[7:0] in container bits [15:8]
+ethernet.srcAddr[47:40] in container bits [7:0]
+
+</title></rect>
+<rect x="369" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 132
+
+ethernet.etherType[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="369" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 133
+
+
+</title></rect>
+<rect x="369" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 134
+
+
+</title></rect>
+<rect x="369" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 135
+
+
+</title></rect>
+<rect x="387" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 136
+
+
+</title></rect>
+<rect x="387" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 137
+
+
+</title></rect>
+<rect x="387" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 138
+
+
+</title></rect>
+<rect x="387" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 139
+
+
+</title></rect>
+<rect x="387" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 140
+
+
+</title></rect>
+<rect x="387" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 141
+
+
+</title></rect>
+<rect x="387" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 142
+
+
+</title></rect>
+<rect x="387" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 143
+
+
+</title></rect>
+<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 144
+
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
+
+</title></rect>
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 145
+
+
+</title></rect>
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 146
+
+
+</title></rect>
+<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 147
+
+
+</title></rect>
+<rect x="414" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 148
+
+
+</title></rect>
+<rect x="414" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 149
+
+
+</title></rect>
+<rect x="414" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 150
+
+
+</title></rect>
+<rect x="414" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 151
+
+
+</title></rect>
+<rect x="432" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 152
+
+
+</title></rect>
+<rect x="432" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 153
+
+
+</title></rect>
+<rect x="432" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 154
+
+
+</title></rect>
+<rect x="432" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 155
+
+
+</title></rect>
+<rect x="432" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 156
+
+
+</title></rect>
+<rect x="432" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 157
+
+
+</title></rect>
+<rect x="432" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 158
+
+
+</title></rect>
+<rect x="432" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 159
+
+
+</title></rect>
+<text x="425" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="459" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 160
+
+
+</title></rect>
+<rect x="459" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 161
+
+
+</title></rect>
+<rect x="459" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 162
+
+
+</title></rect>
+<rect x="459" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 163
+
+
+</title></rect>
+<rect x="459" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 164
+
+
+</title></rect>
+<rect x="459" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 165
+
+
+</title></rect>
+<rect x="459" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 166
+
+
+</title></rect>
+<rect x="459" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 167
+
+
+</title></rect>
+<rect x="477" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 168
+
+
+</title></rect>
+<rect x="477" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 169
+
+
+</title></rect>
+<rect x="477" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 170
+
+
+</title></rect>
+<rect x="477" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 171
+
+
+</title></rect>
+<rect x="477" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 172
+
+
+</title></rect>
+<rect x="477" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 173
+
+
+</title></rect>
+<rect x="477" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 174
+
+
+</title></rect>
+<rect x="477" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 175
+
+
+</title></rect>
+<text x="470" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="504" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 176
+
+
+</title></rect>
+<rect x="504" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 177
+
+
+</title></rect>
+<rect x="504" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 178
+
+
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+ipv4.ttl[7:0] in container bits [31:24]
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+</title></rect>
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+ipv4.srcAddr[31:0] in container bits [31:0]
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+ipv4.dstAddr[31:0] in container bits [31:0]
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+</title></rect>
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+tcp.dataOffset[3:0] in container bits [31:28]
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+</title></rect>
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+tcp.checksum[15:0] in container bits [31:16]
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+</title></rect>
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+</title></rect>
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+ipv4.ttl[7:0] in container bits [31:24]
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+</title></rect>
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+ipv4.srcAddr[31:0] in container bits [31:0]
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+</title></rect>
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+ipv4.dstAddr[31:0] in container bits [31:0]
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+
+udp.length_[15:0] in container bits [31:16]
+tcp.ackNo[31:0] in container bits [31:0]
+udp.checksum[15:0] in container bits [15:0]
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+</title></rect>
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+tcp.dataOffset[3:0] in container bits [31:28]
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+</title></rect>
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+tcp.checksum[15:0] in container bits [31:16]
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+ethernet.dstAddr[39:8] in container bits [31:0]
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+ethernet.srcAddr[31:0] in container bits [31:0]
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+</title></rect>
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+ Container Bit Width: 8
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+ipv4.version[3:0] in container bits [7:4]
+ipv4.ihl[3:0] in container bits [3:0]
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+ Container Bit Width: 8
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+ipv4.diffserv[7:0] in container bits [7:0]
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+</title></rect>
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+tcp.srcPort[15:8] in container bits [7:0]
+udp.srcPort[15:8] in container bits [7:0]
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+</title></rect>
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+tcp.srcPort[7:0] in container bits [7:0]
+udp.srcPort[7:0] in container bits [7:0]
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+</title></rect>
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+ Container Bit Width: 8
+ Container Address: 292
+ Tag-Along Space
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+tcp.dstPort[15:8] in container bits [7:0]
+
+</title></rect>
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+ Tag-Along Space
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+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
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+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
+ipv4.version[3:0] in container bits [7:4]
+ipv4.ihl[3:0] in container bits [3:0]
+
+</title></rect>
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 297
+ Tag-Along Space
+
+ipv4.diffserv[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 298
+ Tag-Along Space
+
+tcp.srcPort[15:8] in container bits [7:0]
+udp.srcPort[15:8] in container bits [7:0]
+
+</title></rect>
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 299
+ Tag-Along Space
+
+tcp.srcPort[7:0] in container bits [7:0]
+udp.srcPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 300
+ Tag-Along Space
+
+ethernet.dstAddr[47:40] in container bits [7:0]
+
+</title></rect>
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 301
+ Tag-Along Space
+
+ethernet.srcAddr[39:32] in container bits [7:0]
+
+</title></rect>
+<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 302
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 303
+ Tag-Along Space
+
+
+</title></rect>
+<text x="830" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="864" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 304
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 305
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 306
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 307
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 308
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 309
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 310
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 311
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 312
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 313
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 314
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 315
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 316
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 317
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 318
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 319
+ Tag-Along Space
+
+
+</title></rect>
+<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 320
+ Tag-Along Space
+
+ipv4.totalLen[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 321
+ Tag-Along Space
+
+ipv4.identification[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 322
+ Tag-Along Space
+
+ipv4.flags[2:0] in container bits [15:13]
+ipv4.fragOffset[12:0] in container bits [12:0]
+
+</title></rect>
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 323
+ Tag-Along Space
+
+tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 324
+ Tag-Along Space
+
+tcp.seqNo[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 325
+ Tag-Along Space
+
+tcp.ackNo[31:16] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 326
+ Tag-Along Space
+
+tcp.ackNo[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
+ipv4.totalLen[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 333
+ Tag-Along Space
+
+ipv4.identification[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 334
+ Tag-Along Space
+
+ipv4.flags[2:0] in container bits [15:13]
+ipv4.fragOffset[12:0] in container bits [12:0]
+
+</title></rect>
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 335
+ Tag-Along Space
+
+tcp.dstPort[15:0] in container bits [15:0]
+
+</title></rect>
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 336
+ Tag-Along Space
+
+tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 337
+ Tag-Along Space
+
+tcp.seqNo[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 21
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 338
+ Tag-Along Space
+
+ethernet.dstAddr[7:0] in container bits [15:8]
+ethernet.srcAddr[47:40] in container bits [7:0]
+
+</title></rect>
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 21
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 339
+ Tag-Along Space
+
+ethernet.etherType[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 340
+ Tag-Along Space
+
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -5828,12 +5791,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -5841,31 +5804,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -5946,29 +5908,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -6300,21 +6261,7 @@
ig_intr_md._pad3[2:0] in container bits [11:9]
ig_intr_md.ingress_port[8:0] in container bits [8:0]
-Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
</title></rect>
-<text x="371" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 128
-
-ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
-ig_intr_md._pad1[0:0] in container bits [14:14]
-ig_intr_md._pad2[1:0] in container bits [13:12]
-ig_intr_md._pad3[2:0] in container bits [11:9]
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
-</title></text>
<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -6333,19 +6280,7 @@
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
-Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
</title></rect>
-<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 130
-
-ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
-Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
-</title></text>
<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -6441,30 +6376,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -7011,7 +6943,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -7022,7 +6954,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -7031,7 +6963,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -7040,40 +6972,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -7090,7 +7021,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -7101,7 +7032,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -7110,7 +7041,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -7130,7 +7061,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -7143,7 +7074,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -7301,7 +7232,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -7311,7 +7242,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -7320,7 +7251,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -7330,7 +7261,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -7340,20 +7271,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -7372,7 +7305,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -7382,7 +7315,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -7391,7 +7324,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -7401,7 +7334,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -7575,7 +7508,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -7584,7 +7517,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -7593,7 +7526,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -7603,40 +7536,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -7679,7 +7613,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -7688,7 +7622,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -7697,7 +7631,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -7707,7 +7641,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -7717,7 +7651,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -7727,7 +7661,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -7762,7 +7696,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -8442,12 +8378,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -8455,31 +8391,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -8560,29 +8495,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -9029,30 +8963,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -9599,7 +9530,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -9610,7 +9541,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -9619,7 +9550,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -9628,40 +9559,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -9678,7 +9608,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -9689,7 +9619,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -9698,7 +9628,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -9718,7 +9648,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -9731,7 +9661,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -9889,7 +9819,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -9899,7 +9829,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -9908,7 +9838,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -9918,7 +9848,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -9928,20 +9858,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -9960,7 +9892,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -9970,7 +9902,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -9979,7 +9911,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -9989,7 +9921,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -10163,7 +10095,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -10172,7 +10104,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -10181,7 +10113,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -10191,40 +10123,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -10267,7 +10200,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -10276,7 +10209,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -10285,7 +10218,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -10295,7 +10228,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -10305,7 +10238,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -10315,7 +10248,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -10350,7 +10283,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -11030,12 +10965,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -11043,31 +10978,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -11148,29 +11082,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -11617,30 +11550,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -12187,7 +12117,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -12198,7 +12128,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -12207,7 +12137,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -12216,40 +12146,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -12266,7 +12195,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -12277,7 +12206,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -12286,7 +12215,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -12306,7 +12235,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -12319,7 +12248,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -12477,7 +12406,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -12487,7 +12416,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -12496,7 +12425,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -12506,7 +12435,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -12516,20 +12445,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -12548,7 +12479,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -12558,7 +12489,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -12567,7 +12498,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -12577,7 +12508,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -12751,7 +12682,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -12760,7 +12691,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -12769,7 +12700,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -12779,40 +12710,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -12855,7 +12787,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -12864,7 +12796,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -12873,7 +12805,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -12883,7 +12815,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -12893,7 +12825,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -12903,7 +12835,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -12938,7 +12870,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -13618,12 +13552,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -13631,31 +13565,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -13736,29 +13669,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -14205,30 +14137,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -14775,7 +14704,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -14786,7 +14715,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -14795,7 +14724,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -14804,40 +14733,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -14854,7 +14782,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -14865,7 +14793,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -14874,7 +14802,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -14894,7 +14822,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -14907,7 +14835,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -15065,7 +14993,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -15075,7 +15003,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -15084,7 +15012,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -15094,7 +15022,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -15104,20 +15032,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -15136,7 +15066,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -15146,7 +15076,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -15155,7 +15085,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -15165,7 +15095,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -15339,7 +15269,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -15348,7 +15278,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -15357,7 +15287,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -15367,40 +15297,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -15443,7 +15374,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -15452,7 +15383,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -15461,7 +15392,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -15471,7 +15402,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -15481,7 +15412,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -15491,7 +15422,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -15526,7 +15457,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -16206,12 +16139,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -16219,31 +16152,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -16324,29 +16256,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -16793,30 +16724,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -17363,7 +17291,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -17374,7 +17302,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -17383,7 +17311,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -17392,40 +17320,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -17442,7 +17369,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -17453,7 +17380,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -17462,7 +17389,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -17482,7 +17409,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -17495,7 +17422,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -17653,7 +17580,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -17663,7 +17590,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -17672,7 +17599,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -17682,7 +17609,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -17692,20 +17619,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -17724,7 +17653,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -17734,7 +17663,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -17743,7 +17672,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -17753,7 +17682,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -17927,7 +17856,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -17936,7 +17865,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -17945,7 +17874,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -17955,40 +17884,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -18031,7 +17961,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -18040,7 +17970,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -18049,7 +17979,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -18059,7 +17989,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -18069,7 +17999,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -18079,7 +18009,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -18114,7 +18044,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -18794,12 +18726,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -18807,31 +18739,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -18912,29 +18843,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -19381,30 +19311,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -19951,7 +19878,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -19962,7 +19889,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -19971,7 +19898,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -19980,40 +19907,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -20030,7 +19956,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -20041,7 +19967,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -20050,7 +19976,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -20070,7 +19996,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -20083,7 +20009,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -20241,7 +20167,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -20251,7 +20177,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -20260,7 +20186,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -20270,7 +20196,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -20280,20 +20206,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -20312,7 +20240,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -20322,7 +20250,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -20331,7 +20259,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -20341,7 +20269,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -20515,7 +20443,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -20524,7 +20452,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -20533,7 +20461,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -20543,40 +20471,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -20619,7 +20548,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -20628,7 +20557,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -20637,7 +20566,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -20647,7 +20576,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -20657,7 +20586,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -20667,7 +20596,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -20702,7 +20631,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -21382,12 +21313,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -21395,31 +21326,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -21500,29 +21430,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -21969,30 +21898,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -22539,7 +22465,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -22550,7 +22476,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -22559,7 +22485,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -22568,40 +22494,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -22618,7 +22543,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -22629,7 +22554,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -22638,7 +22563,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -22658,7 +22583,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -22671,7 +22596,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -22829,7 +22754,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -22839,7 +22764,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -22848,7 +22773,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -22858,7 +22783,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -22868,20 +22793,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -22900,7 +22827,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -22910,7 +22837,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -22919,7 +22846,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -22929,7 +22856,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -23103,7 +23030,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -23112,7 +23039,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -23121,7 +23048,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -23131,40 +23058,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -23207,7 +23135,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -23216,7 +23144,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -23225,7 +23153,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -23235,7 +23163,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -23245,7 +23173,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -23255,7 +23183,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -23290,7 +23218,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -23970,12 +23900,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -23983,31 +23913,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -24088,29 +24017,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -24557,30 +24485,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -25127,7 +25052,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -25138,7 +25063,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -25147,7 +25072,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -25156,40 +25081,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -25206,7 +25130,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -25217,7 +25141,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -25226,7 +25150,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -25246,7 +25170,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -25259,7 +25183,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -25417,7 +25341,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -25427,7 +25351,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -25436,7 +25360,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -25446,7 +25370,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -25456,20 +25380,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -25488,7 +25414,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -25498,7 +25424,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -25507,7 +25433,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -25517,7 +25443,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -25691,7 +25617,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -25700,7 +25626,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -25709,7 +25635,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -25719,40 +25645,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -25795,7 +25722,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -25804,7 +25731,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -25813,7 +25740,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -25823,7 +25750,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -25833,7 +25760,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -25843,7 +25770,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -25878,7 +25805,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -26558,12 +26487,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -26571,31 +26500,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -26676,29 +26604,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -27145,30 +27072,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -27715,7 +27639,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -27726,7 +27650,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -27735,7 +27659,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -27744,40 +27668,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -27794,7 +27717,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -27805,7 +27728,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -27814,7 +27737,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -27834,7 +27757,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -27847,7 +27770,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -28005,7 +27928,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -28015,7 +27938,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -28024,7 +27947,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -28034,7 +27957,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -28044,20 +27967,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -28076,7 +28001,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -28086,7 +28011,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -28095,7 +28020,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -28105,7 +28030,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -28279,7 +28204,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -28288,7 +28213,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -28297,7 +28222,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -28307,40 +28232,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -28383,7 +28309,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -28392,7 +28318,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -28401,7 +28327,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -28411,7 +28337,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -28421,7 +28347,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -28431,7 +28357,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -28466,7 +28392,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -29146,12 +29074,12 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
@@ -29159,31 +29087,30 @@
Container Bit Width: 8
Container Address: 65
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:limegreen""><title>PHV Group: 4
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 68
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -29264,29 +29191,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkorange""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:cyan""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -29733,30 +29659,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -30303,7 +30226,7 @@
</title></rect>
<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 256
@@ -30314,7 +30237,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
@@ -30323,7 +30246,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 258
@@ -30332,40 +30255,39 @@
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 16
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 259
Tag-Along Space
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
tcp.ctrl[5:0] in container bits [21:16]
+udp.length_[15:0] in container bits [31:16]
tcp.window[15:0] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 260
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
Unassigned
Container Bit Width: 32
@@ -30382,7 +30304,7 @@
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 264
@@ -30393,7 +30315,7 @@
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 265
@@ -30402,7 +30324,7 @@
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 266
@@ -30422,7 +30344,7 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 268
@@ -30435,7 +30357,7 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
Container Address: 269
@@ -30593,7 +30515,7 @@
</title></rect>
<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 288
@@ -30603,7 +30525,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -30612,7 +30534,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -30622,7 +30544,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 291
@@ -30632,20 +30554,22 @@
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 293
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
</title></rect>
<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -30664,7 +30588,7 @@
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 296
@@ -30674,7 +30598,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 297
@@ -30683,7 +30607,7 @@
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 298
@@ -30693,7 +30617,7 @@
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
Container Address: 299
@@ -30867,7 +30791,7 @@
</title></rect>
<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 320
@@ -30876,7 +30800,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 321
@@ -30885,7 +30809,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
@@ -30895,40 +30819,41 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
@@ -30971,7 +30896,7 @@
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 332
@@ -30980,7 +30905,7 @@
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 333
@@ -30989,7 +30914,7 @@
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
@@ -30999,7 +30924,7 @@
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 335
@@ -31009,7 +30934,7 @@
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 336
@@ -31019,7 +30944,7 @@
udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 21
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
Container Address: 337
@@ -31054,7 +30979,9 @@
Tag-Along Space
packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -31277,7 +31204,7 @@
<text x="1010" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
<rect x="0" y="0" width="1053" height="198" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
-<br><i>Created on Thu Sep 7 13:57:07 2017</i>
+<br><i>Created on Fri Sep 8 08:24:44 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
</body>
</html>
\ No newline at end of file
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/table_placement.html b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/table_placement.html
index c916a6d..eb8ba85 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/table_placement.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/visualization/table_placement.html
@@ -4,9 +4,12 @@
<h2>Pipeline 0</h2>
<svg viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
-<rect x="0" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
-<rect x="13" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
-<rect x="26" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="0" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:aquamarine""><title>TCAM for table0</title></rect>
+<rect x="13" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:aquamarine""><title>TCAM for table0</title></rect>
+<rect x="26" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:aquamarine""><title>TCAM for table0</title></rect>
+<rect x="0" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:aquamarine""><title>SRAM for table0</title></rect>
+<rect x="13" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:blue""><title>SRAM for table0_counter</title></rect>
+<rect x="26" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:blue""><title>SRAM for table0_counter</title></rect>
<rect x="39" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="52" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="65" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
@@ -84,9 +87,6 @@
<rect x="65" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="78" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="91" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
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<rect x="39" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
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<rect x="65" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
@@ -110,13 +110,10 @@
<rect x="91" y="195" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="0" y="26" width="104" height="182" style="stroke:black; stroke-width:2; fill:none""></rect>
<text x="41" y="245" textLength="24" lengthAdjust="spacingAndGlyphs" textHeight="24" heightAdjust="spacingAndGlyphs" style="fill:black;">0</text>
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-<rect x="130" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:blueviolet""><title>TCAM for table0</title></rect>
-<rect x="143" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:blueviolet""><title>TCAM for table0</title></rect>
-<rect x="117" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:blueviolet""><title>SRAM for table0</title></rect>
-<rect x="130" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:yellow""><title>SRAM for table0_counter</title></rect>
-<rect x="143" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:yellow""><title>SRAM for table0_counter</title></rect>
-<rect x="156" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="117" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chocolate""><title>SRAM for ingress_port_counter</title></rect>
+<rect x="130" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chocolate""><title>SRAM for ingress_port_counter</title></rect>
+<rect x="143" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:coral""><title>SRAM for egress_port_counter</title></rect>
+<rect x="156" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:coral""><title>SRAM for egress_port_counter</title></rect>
<rect x="169" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="182" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="195" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
@@ -193,6 +190,9 @@
<rect x="182" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="195" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="208" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="117" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
+<rect x="130" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
+<rect x="143" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="156" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="169" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="182" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
@@ -216,10 +216,10 @@
<rect x="208" y="195" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="117" y="26" width="104" height="182" style="stroke:black; stroke-width:2; fill:none""></rect>
<text x="158" y="245" textLength="24" lengthAdjust="spacingAndGlyphs" textHeight="24" heightAdjust="spacingAndGlyphs" style="fill:black;">1</text>
-<rect x="234" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chocolate""><title>SRAM for ingress_port_counter</title></rect>
-<rect x="247" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chocolate""><title>SRAM for ingress_port_counter</title></rect>
-<rect x="260" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:coral""><title>SRAM for egress_port_counter</title></rect>
-<rect x="273" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:coral""><title>SRAM for egress_port_counter</title></rect>
+<rect x="234" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="247" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="260" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="273" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="286" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="299" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="312" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
@@ -1277,17 +1277,16 @@
<rect x="585" y="260" width="104" height="182" style="stroke:black; stroke-width:2; fill:none""></rect>
<text x="626" y="479" textLength="24" lengthAdjust="spacingAndGlyphs" textHeight="24" heightAdjust="spacingAndGlyphs" style="fill:black;">11</text>
<text x="834" y="89" style="fill:black; font-weight:bold;">Legend</text>
-<text x="860" y="128" style="fill:black; font-weight:bold;">Ingress Tables</text>
-<rect x="832" y="143" width="26" height="26" style="stroke:black; stroke-width:1; fill:coral""><title>egress_port_counter</title></rect>
-<text x="860" y="167" style="fill:black;">egress_port_counter</text>
-<rect x="832" y="182" width="26" height="26" style="stroke:black; stroke-width:1; fill:chocolate""><title>ingress_port_counter</title></rect>
-<text x="860" y="206" style="fill:black;">ingress_port_counter</text>
-<rect x="832" y="221" width="26" height="26" style="stroke:black; stroke-width:1; fill:blueviolet""><title>table0</title></rect>
-<text x="860" y="245" style="fill:black;">table0</text>
-<rect x="832" y="260" width="26" height="26" style="stroke:black; stroke-width:1; fill:yellow""><title>table0_counter</title></rect>
-<text x="860" y="284" style="fill:black;">table0_counter</text>
-<rect x="806" y="39" width="390" height="286" style="stroke:black; stroke-width:1; fill:none""></rect>
-<rect x="819" y="52" width="364" height="260" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="832" y="104" width="26" height="26" style="stroke:black; stroke-width:1; fill:coral""><title>egress_port_counter</title></rect>
+<text x="860" y="128" style="fill:black;">egress_port_counter</text>
+<rect x="832" y="143" width="26" height="26" style="stroke:black; stroke-width:1; fill:chocolate""><title>ingress_port_counter</title></rect>
+<text x="860" y="167" style="fill:black;">ingress_port_counter</text>
+<rect x="832" y="182" width="26" height="26" style="stroke:black; stroke-width:1; fill:aquamarine""><title>table0</title></rect>
+<text x="860" y="206" style="fill:black;">table0</text>
+<rect x="832" y="221" width="26" height="26" style="stroke:black; stroke-width:1; fill:blue""><title>table0_counter</title></rect>
+<text x="860" y="245" style="fill:black;">table0_counter</text>
+<rect x="806" y="39" width="390" height="247" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="819" y="52" width="364" height="221" style="stroke:black; stroke-width:1; fill:none""></rect>
<rect x="0" y="0" width="754" height="728" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
<table border="1">
@@ -1316,19 +1315,7 @@
<td align="center">0</td>
</tr>
<tr>
-<td align="center">_condition_3</td>
-<td align="center">0</td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-</tr>
-<tr>
-<td align="center">ingress_pkt__action__</td>
+<td align="center">process_packet_out_table__action__</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1340,56 +1327,20 @@
<td align="center">0</td>
</tr>
<tr>
-<td align="center">ingress_pkt</td>
+<td align="center">process_packet_out_table</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">1</td>
-</tr>
-<tr>
-<td align="center">egress_pkt__action__</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-</tr>
-<tr>
-<td align="center">egress_pkt</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">1</td>
-</tr>
-<tr>
-<td align="center">_condition_1</td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center">1</td>
<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
-<td align="center">0</td>
+<td align="center">1</td>
</tr>
<tr>
<td align="center">table0__action__</td>
-<td align="center">1</td>
+<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1401,7 +1352,7 @@
</tr>
<tr>
<td align="center">table0</td>
-<td align="center">1</td>
+<td align="center">0</td>
<td align="center">16</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1413,7 +1364,7 @@
</tr>
<tr>
<td align="center">table0_counter</td>
-<td align="center">1</td>
+<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1425,7 +1376,7 @@
</tr>
<tr>
<td align="center">_condition_2</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">2</td>
<td align="center">9</td>
<td align="center">1</td>
@@ -1437,7 +1388,7 @@
</tr>
<tr>
<td align="center">ingress_port_count_table__action__</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1449,7 +1400,7 @@
</tr>
<tr>
<td align="center">ingress_port_count_table</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1461,7 +1412,7 @@
</tr>
<tr>
<td align="center">egress_port_count_table__action__</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1473,7 +1424,7 @@
</tr>
<tr>
<td align="center">egress_port_count_table</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">1</td>
@@ -1485,7 +1436,7 @@
</tr>
<tr>
<td align="center">ingress_port_counter</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1497,7 +1448,7 @@
</tr>
<tr>
<td align="center">egress_port_counter</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1508,7 +1459,7 @@
<td align="center">0</td>
</tr>
</table>
-<br><i>Created on Thu Sep 7 13:57:06 2017</i>
+<br><i>Created on Fri Sep 8 08:24:43 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
</body>
</html>
\ No newline at end of file
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/context.json b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/context.json
index f1ae66b..ef56c33 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/context.json
@@ -1,5 +1,5 @@
{
- "build_date": "Thu Sep 7 14:49:09 2017",
+ "build_date": "Fri Sep 8 08:25:35 2017",
"phv_allocation": [
{
"ingress": [
@@ -26,7 +26,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -50,7 +50,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -67,7 +67,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -84,7 +84,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -101,7 +101,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -118,7 +118,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -130,7 +130,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -147,24 +147,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -177,11 +160,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -194,11 +177,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -211,7 +194,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -221,37 +204,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -266,11 +249,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -287,7 +270,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -328,7 +311,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -345,7 +328,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -362,7 +345,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -379,7 +362,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -391,7 +374,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -425,7 +408,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -442,7 +425,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -459,7 +442,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -483,7 +466,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -495,7 +478,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -512,24 +495,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -541,7 +507,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -553,567 +519,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -1137,7 +543,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1150,7 +556,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -1166,7 +572,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1179,45 +585,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -1242,7 +614,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -1259,11 +1225,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1275,7 +1241,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1288,11 +1254,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -1304,7 +1270,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -1317,11 +1283,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -1334,11 +1300,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -1351,11 +1317,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1368,11 +1334,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1385,7 +1351,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -1414,11 +1380,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1427,10 +1393,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1443,28 +1426,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1477,11 +1443,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -1493,7 +1459,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -1506,11 +1472,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1523,7 +1489,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -1536,6 +1502,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -1567,7 +1545,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -1591,7 +1569,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -1608,7 +1586,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -1625,7 +1603,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -1642,7 +1620,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -1659,7 +1637,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -1671,7 +1649,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1688,24 +1666,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -1718,11 +1679,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -1735,11 +1696,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -1752,7 +1713,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -1762,37 +1723,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -1807,11 +1768,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -1828,7 +1789,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -1869,7 +1830,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -1886,7 +1847,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -1903,7 +1864,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1920,7 +1881,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -1932,7 +1893,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -1966,7 +1927,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1983,7 +1944,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2000,7 +1961,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -2024,7 +1985,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -2036,7 +1997,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -2053,24 +2014,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -2082,7 +2026,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -2094,567 +2038,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -2678,7 +2062,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2691,7 +2075,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -2707,7 +2091,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2720,45 +2104,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -2783,7 +2133,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -2800,11 +2744,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2816,7 +2760,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2829,11 +2773,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -2845,7 +2789,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -2858,11 +2802,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -2875,11 +2819,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -2892,11 +2836,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2909,11 +2853,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2926,7 +2870,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -2955,11 +2899,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2968,10 +2912,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2984,28 +2945,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3018,11 +2962,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -3034,7 +2978,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -3047,11 +2991,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3064,7 +3008,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -3077,6 +3021,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -3108,7 +3064,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -3132,7 +3088,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -3149,7 +3105,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -3166,7 +3122,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -3183,7 +3139,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -3200,7 +3156,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -3212,7 +3168,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3229,24 +3185,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -3259,11 +3198,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -3276,11 +3215,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -3293,7 +3232,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -3303,37 +3242,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -3348,11 +3287,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -3369,7 +3308,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -3410,7 +3349,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -3427,7 +3366,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -3444,7 +3383,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3461,7 +3400,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -3473,7 +3412,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -3507,7 +3446,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3524,7 +3463,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3541,7 +3480,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -3565,7 +3504,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -3577,7 +3516,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -3594,24 +3533,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -3623,7 +3545,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -3635,567 +3557,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -4219,7 +3581,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4232,7 +3594,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -4248,7 +3610,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4261,45 +3623,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -4324,7 +3652,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -4341,11 +4263,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4357,7 +4279,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4370,11 +4292,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -4386,7 +4308,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -4399,11 +4321,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -4416,11 +4338,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -4433,11 +4355,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4450,11 +4372,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4467,7 +4389,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -4496,11 +4418,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4509,10 +4431,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4525,28 +4464,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4559,11 +4481,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -4575,7 +4497,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -4588,11 +4510,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4605,7 +4527,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -4618,6 +4540,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -4649,7 +4583,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -4673,7 +4607,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -4690,7 +4624,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -4707,7 +4641,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -4724,7 +4658,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -4741,7 +4675,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -4753,7 +4687,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4770,24 +4704,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -4800,11 +4717,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -4817,11 +4734,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -4834,7 +4751,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -4844,37 +4761,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -4889,11 +4806,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -4910,7 +4827,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -4951,7 +4868,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -4968,7 +4885,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -4985,7 +4902,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5002,7 +4919,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -5014,7 +4931,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -5048,7 +4965,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5065,7 +4982,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5082,7 +4999,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -5106,7 +5023,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -5118,7 +5035,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -5135,24 +5052,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -5164,7 +5064,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -5176,567 +5076,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -5760,7 +5100,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5773,7 +5113,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -5789,7 +5129,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5802,45 +5142,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -5865,7 +5171,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -5882,11 +5782,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5898,7 +5798,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5911,11 +5811,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -5927,7 +5827,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -5940,11 +5840,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -5957,11 +5857,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -5974,11 +5874,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5991,11 +5891,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6008,7 +5908,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -6037,11 +5937,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6050,10 +5950,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6066,28 +5983,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6100,11 +6000,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -6116,7 +6016,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -6129,11 +6029,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6146,7 +6046,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -6159,6 +6059,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -6190,7 +6102,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -6214,7 +6126,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -6231,7 +6143,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -6248,7 +6160,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -6265,7 +6177,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -6282,7 +6194,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -6294,7 +6206,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6311,24 +6223,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -6341,11 +6236,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -6358,11 +6253,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -6375,7 +6270,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -6385,37 +6280,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -6430,11 +6325,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -6451,7 +6346,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -6492,7 +6387,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -6509,7 +6404,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -6526,7 +6421,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6543,7 +6438,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -6555,7 +6450,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -6589,7 +6484,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6606,7 +6501,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6623,7 +6518,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -6647,7 +6542,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -6659,7 +6554,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -6676,24 +6571,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -6705,7 +6583,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -6717,567 +6595,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -7301,7 +6619,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7314,7 +6632,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -7330,7 +6648,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7343,45 +6661,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -7406,7 +6690,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -7423,11 +7301,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7439,7 +7317,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7452,11 +7330,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -7468,7 +7346,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -7481,11 +7359,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -7498,11 +7376,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -7515,11 +7393,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7532,11 +7410,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7549,7 +7427,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -7578,11 +7456,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7591,10 +7469,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7607,28 +7502,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7641,11 +7519,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -7657,7 +7535,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -7670,11 +7548,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7687,7 +7565,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -7700,6 +7578,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -7731,7 +7621,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -7755,7 +7645,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -7772,7 +7662,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -7789,7 +7679,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -7806,7 +7696,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -7823,7 +7713,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -7835,7 +7725,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7852,24 +7742,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -7882,11 +7755,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -7899,11 +7772,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -7916,7 +7789,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -7926,37 +7799,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -7971,11 +7844,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -7992,7 +7865,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -8033,7 +7906,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -8050,7 +7923,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -8067,7 +7940,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8084,7 +7957,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -8096,7 +7969,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -8130,7 +8003,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8147,7 +8020,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8164,7 +8037,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -8188,7 +8061,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -8200,7 +8073,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -8217,24 +8090,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -8246,7 +8102,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -8258,567 +8114,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -8842,7 +8138,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8855,7 +8151,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -8871,7 +8167,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8884,45 +8180,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -8947,7 +8209,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -8964,11 +8820,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8980,7 +8836,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8993,11 +8849,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -9009,7 +8865,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -9022,11 +8878,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -9039,11 +8895,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -9056,11 +8912,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9073,11 +8929,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9090,7 +8946,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -9119,11 +8975,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9132,10 +8988,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9148,28 +9021,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9182,11 +9038,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -9198,7 +9054,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -9211,11 +9067,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9228,7 +9084,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -9241,6 +9097,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -9272,7 +9140,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -9296,7 +9164,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -9313,7 +9181,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -9330,7 +9198,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -9347,7 +9215,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -9364,7 +9232,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -9376,7 +9244,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9393,24 +9261,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -9423,11 +9274,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -9440,11 +9291,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -9457,7 +9308,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -9467,37 +9318,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -9512,11 +9363,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -9533,7 +9384,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -9574,7 +9425,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -9591,7 +9442,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -9608,7 +9459,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9625,7 +9476,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -9637,7 +9488,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -9671,7 +9522,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9688,7 +9539,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9705,7 +9556,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -9729,7 +9580,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -9741,7 +9592,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -9758,24 +9609,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -9787,7 +9621,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -9799,567 +9633,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -10383,7 +9657,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10396,7 +9670,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -10412,7 +9686,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10425,45 +9699,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -10488,7 +9728,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -10505,11 +10339,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10521,7 +10355,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10534,11 +10368,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -10550,7 +10384,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -10563,11 +10397,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -10580,11 +10414,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -10597,11 +10431,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10614,11 +10448,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10631,7 +10465,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -10660,11 +10494,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10673,10 +10507,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10689,28 +10540,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10723,11 +10557,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -10739,7 +10573,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -10752,11 +10586,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10769,7 +10603,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -10782,6 +10616,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -10813,7 +10659,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -10837,7 +10683,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -10854,7 +10700,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -10871,7 +10717,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -10888,7 +10734,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -10905,7 +10751,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -10917,7 +10763,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10934,24 +10780,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -10964,11 +10793,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -10981,11 +10810,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -10998,7 +10827,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -11008,37 +10837,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -11053,11 +10882,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -11074,7 +10903,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -11115,7 +10944,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -11132,7 +10961,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -11149,7 +10978,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11166,7 +10995,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -11178,7 +11007,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -11212,7 +11041,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11229,7 +11058,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11246,7 +11075,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -11270,7 +11099,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -11282,7 +11111,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -11299,24 +11128,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -11328,7 +11140,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -11340,567 +11152,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -11924,7 +11176,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11937,7 +11189,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -11953,7 +11205,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11966,45 +11218,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -12029,7 +11247,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -12046,11 +11858,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12062,7 +11874,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12075,11 +11887,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -12091,7 +11903,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -12104,11 +11916,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -12121,11 +11933,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -12138,11 +11950,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12155,11 +11967,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12172,7 +11984,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -12201,11 +12013,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12214,10 +12026,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12230,28 +12059,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12264,11 +12076,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -12280,7 +12092,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -12293,11 +12105,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12310,7 +12122,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -12323,6 +12135,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -12354,7 +12178,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -12378,7 +12202,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12395,7 +12219,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12412,7 +12236,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -12429,7 +12253,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12446,7 +12270,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -12458,7 +12282,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12475,24 +12299,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -12505,11 +12312,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -12522,11 +12329,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -12539,7 +12346,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -12549,37 +12356,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -12594,11 +12401,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -12615,7 +12422,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -12656,7 +12463,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -12673,7 +12480,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -12690,7 +12497,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12707,7 +12514,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -12719,7 +12526,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -12753,7 +12560,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12770,7 +12577,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12787,7 +12594,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -12811,7 +12618,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -12823,7 +12630,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -12840,24 +12647,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -12869,7 +12659,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -12881,567 +12671,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -13465,7 +12695,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13478,7 +12708,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -13494,7 +12724,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13507,45 +12737,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -13570,7 +12766,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -13587,11 +13377,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13603,7 +13393,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13616,11 +13406,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -13632,7 +13422,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -13645,11 +13435,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -13662,11 +13452,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -13679,11 +13469,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13696,11 +13486,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13713,7 +13503,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -13742,11 +13532,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13755,10 +13545,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13771,28 +13578,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13805,11 +13595,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -13821,7 +13611,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -13834,11 +13624,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13851,7 +13641,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -13864,6 +13654,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -13895,7 +13697,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -13919,7 +13721,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -13936,7 +13738,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -13953,7 +13755,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -13970,7 +13772,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -13987,7 +13789,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -13999,7 +13801,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14016,24 +13818,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -14046,11 +13831,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -14063,11 +13848,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -14080,7 +13865,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -14090,37 +13875,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -14135,11 +13920,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -14156,7 +13941,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -14197,7 +13982,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -14214,7 +13999,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -14231,7 +14016,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14248,7 +14033,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -14260,7 +14045,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -14294,7 +14079,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14311,7 +14096,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14328,7 +14113,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -14352,7 +14137,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -14364,7 +14149,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -14381,24 +14166,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -14410,7 +14178,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -14422,567 +14190,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -15006,7 +14214,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15019,7 +14227,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -15035,7 +14243,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15048,45 +14256,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -15111,7 +14285,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -15128,11 +14896,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15144,7 +14912,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15157,11 +14925,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -15173,7 +14941,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -15186,11 +14954,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -15203,11 +14971,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -15220,11 +14988,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15237,11 +15005,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15254,7 +15022,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -15283,11 +15051,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15296,10 +15064,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15312,28 +15097,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15346,11 +15114,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -15362,7 +15130,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -15375,11 +15143,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15392,7 +15160,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -15405,6 +15173,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -15436,7 +15216,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -15460,7 +15240,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15477,7 +15257,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15494,7 +15274,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -15511,7 +15291,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15528,7 +15308,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -15540,7 +15320,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15557,24 +15337,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -15587,11 +15350,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -15604,11 +15367,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -15621,7 +15384,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -15631,37 +15394,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -15676,11 +15439,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -15697,7 +15460,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -15738,7 +15501,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -15755,7 +15518,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -15772,7 +15535,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15789,7 +15552,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -15801,7 +15564,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -15835,7 +15598,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15852,7 +15615,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15869,7 +15632,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -15893,7 +15656,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -15905,7 +15668,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -15922,24 +15685,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -15951,7 +15697,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -15963,567 +15709,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -16547,7 +15733,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16560,7 +15746,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -16576,7 +15762,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16589,45 +15775,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -16652,7 +15804,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -16669,11 +16415,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16685,7 +16431,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16698,11 +16444,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -16714,7 +16460,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -16727,11 +16473,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -16744,11 +16490,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -16761,11 +16507,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16778,11 +16524,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16795,7 +16541,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -16824,11 +16570,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16837,10 +16583,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16853,28 +16616,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16887,11 +16633,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -16903,7 +16649,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -16916,11 +16662,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16933,7 +16679,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -16946,6 +16692,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -16977,7 +16735,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -17001,7 +16759,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -17018,7 +16776,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -17035,7 +16793,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -17052,7 +16810,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -17069,7 +16827,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -17081,7 +16839,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17098,24 +16856,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -17128,11 +16869,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -17145,11 +16886,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -17162,7 +16903,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -17172,37 +16913,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -17217,11 +16958,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -17238,7 +16979,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -17279,7 +17020,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -17296,7 +17037,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -17313,7 +17054,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17330,7 +17071,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -17342,7 +17083,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -17376,7 +17117,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17393,7 +17134,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17410,7 +17151,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -17434,7 +17175,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -17446,7 +17187,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -17463,24 +17204,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -17492,7 +17216,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -17504,567 +17228,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -18088,7 +17252,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18101,7 +17265,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -18117,7 +17281,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18130,45 +17294,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -18193,7 +17323,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -18210,11 +17934,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18226,7 +17950,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18239,11 +17963,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -18255,7 +17979,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -18268,11 +17992,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -18285,11 +18009,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -18302,11 +18026,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18319,11 +18043,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18336,7 +18060,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -18365,11 +18089,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18378,10 +18102,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18394,28 +18135,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18428,11 +18152,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -18444,7 +18168,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -18457,11 +18181,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18474,7 +18198,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -18487,6 +18211,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -18529,7 +18265,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "action_data",
"size": 0
}
@@ -18593,12 +18329,12 @@
"match_attributes": {
"stage_tables": [
{
- "default_next_table": 49,
+ "default_next_table": 33,
"action_format": [
{
"vliw_instruction_full": 64,
"next_table": 0,
- "next_table_full": 49,
+ "next_table_full": 33,
"action_handle": 536870914,
"action_name": "count_ingress",
"table_name": "egress_port_count_table",
@@ -18619,7 +18355,7 @@
1
],
"logical_table_id": 0,
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "match_with_no_key",
"size": 1
}
@@ -18666,7 +18402,7 @@
}
],
"logical_table_id": 1,
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "action_data",
"size": 0
}
@@ -18756,7 +18492,7 @@
0
],
"logical_table_id": 1,
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "match_with_no_key",
"size": 1
}
@@ -18773,7 +18509,7 @@
{
"direction": "ingress",
"handle": 33554435,
- "name": "ingress_pkt__action__",
+ "name": "process_packet_out_table__action__",
"table_type": "action",
"stage_tables": [
{
@@ -18802,137 +18538,6 @@
"number_memory_units_per_table_word": 1
}
],
- "logical_table_id": 0,
- "stage_number": 0,
- "stage_table_type": "action_data",
- "size": 0
- }
- ],
- "actions": [
- {
- "p4_parameters": [],
- "handle": 536870919,
- "name": "_packet_out",
- "indirect_resources": [],
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "allowed_as_default_action": true,
- "override_stat_addr_pfe": false,
- "override_stateful_addr_pfe": false,
- "override_meter_full_addr": 0,
- "override_stat_addr": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "override_meter_addr": false
- }
- ],
- "how_referenced": "direct",
- "size": 1024
- },
- {
- "direction": "ingress",
- "handle": 16777219,
- "name": "ingress_pkt",
- "is_resource_controllable": true,
- "table_type": "match",
- "ap_bind_indirect_res_to_match": [],
- "statistics_table_refs": [],
- "actions": [
- {
- "p4_parameters": [],
- "handle": 536870919,
- "name": "_packet_out",
- "indirect_resources": [],
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "allowed_as_default_action": true,
- "override_stat_addr_pfe": false,
- "override_stateful_addr_pfe": false,
- "override_meter_full_addr": 0,
- "override_stat_addr": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "override_meter_addr": false
- }
- ],
- "meter_table_refs": [],
- "default_action_handle": 536870919,
- "uses_range": false,
- "match_attributes": {
- "stage_tables": [
- {
- "default_next_table": 16,
- "action_format": [
- {
- "vliw_instruction_full": 65,
- "next_table": 0,
- "next_table_full": 16,
- "action_handle": 536870919,
- "action_name": "_packet_out",
- "table_name": "_condition_1",
- "immediate_fields": [],
- "vliw_instruction": 1
- }
- ],
- "memory_resource_allocation": null,
- "pack_format": [
- {
- "memory_word_width": 0,
- "entries_per_table_word": 1,
- "table_word_width": 0,
- "number_memory_units_per_table_word": 0
- }
- ],
- "result_physical_buses": [
- 1
- ],
- "logical_table_id": 0,
- "stage_number": 0,
- "stage_table_type": "match_with_no_key",
- "size": 1
- }
- ],
- "match_type": "match_with_no_key"
- },
- "stateful_table_refs": [],
- "default_next_table_mask": 0,
- "selection_table_refs": [],
- "action_data_table_refs": [],
- "match_key_fields": [],
- "size": 1024
- },
- {
- "direction": "egress",
- "handle": 33554436,
- "name": "egress_pkt__action__",
- "table_type": "action",
- "stage_tables": [
- {
- "memory_resource_allocation": null,
- "pack_format": [
- {
- "entries_per_table_word": 1,
- "action_handle": 536870922,
- "memory_word_width": 128,
- "table_word_width": 128,
- "entries": [
- {
- "entry_number": 0,
- "fields": [
- {
- "start_bit": 0,
- "field_width": 0,
- "lsb_mem_word_idx": 1,
- "source": "zero",
- "lsb_mem_word_offset": 0,
- "field_name": "--padding--"
- }
- ]
- }
- ],
- "number_memory_units_per_table_word": 1
- }
- ],
"logical_table_id": 1,
"stage_number": 0,
"stage_table_type": "action_data",
@@ -18942,8 +18547,8 @@
"actions": [
{
"p4_parameters": [],
- "handle": 536870922,
- "name": "add_packet_in_hdr",
+ "handle": 536870919,
+ "name": "_process_packet_out",
"indirect_resources": [],
"override_stat_full_addr": 0,
"override_meter_addr_pfe": false,
@@ -18961,9 +18566,9 @@
"size": 1024
},
{
- "direction": "egress",
- "handle": 16777220,
- "name": "egress_pkt",
+ "direction": "ingress",
+ "handle": 16777219,
+ "name": "process_packet_out_table",
"is_resource_controllable": true,
"table_type": "match",
"ap_bind_indirect_res_to_match": [],
@@ -18971,8 +18576,8 @@
"actions": [
{
"p4_parameters": [],
- "handle": 536870922,
- "name": "add_packet_in_hdr",
+ "handle": 536870919,
+ "name": "_process_packet_out",
"indirect_resources": [],
"override_stat_full_addr": 0,
"override_meter_addr_pfe": false,
@@ -18987,22 +18592,22 @@
}
],
"meter_table_refs": [],
- "default_action_handle": 536870922,
+ "default_action_handle": 536870919,
"uses_range": false,
"match_attributes": {
"stage_tables": [
{
- "default_next_table": 255,
+ "default_next_table": 32,
"action_format": [
{
- "vliw_instruction_full": 65,
+ "vliw_instruction_full": 69,
"next_table": 0,
- "next_table_full": 255,
- "action_handle": 536870922,
- "action_name": "add_packet_in_hdr",
- "table_name": "--END_OF_PIPELINE--",
+ "next_table_full": 32,
+ "action_handle": 536870919,
+ "action_name": "_process_packet_out",
+ "table_name": "_condition_2",
"immediate_fields": [],
- "vliw_instruction": 1
+ "vliw_instruction": 0
}
],
"memory_resource_allocation": null,
@@ -19015,7 +18620,7 @@
}
],
"result_physical_buses": [
- 0
+ 1
],
"logical_table_id": 1,
"stage_number": 0,
@@ -19034,7 +18639,7 @@
},
{
"direction": "ingress",
- "handle": 33554437,
+ "handle": 33554436,
"name": "table0__action__",
"table_type": "action",
"stage_tables": [
@@ -19056,7 +18661,7 @@
"pack_format": [
{
"entries_per_table_word": 8,
- "action_handle": 536870924,
+ "action_handle": 536870921,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -19233,7 +18838,7 @@
},
{
"entries_per_table_word": 8,
- "action_handle": 536870927,
+ "action_handle": 536870924,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -19346,7 +18951,7 @@
},
{
"entries_per_table_word": 8,
- "action_handle": 536870929,
+ "action_handle": 536870928,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -19355,11 +18960,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 112,
+ "lsb_mem_word_offset": 121,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 320,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 112,
+ "field_name": "--constant-0--"
}
]
},
@@ -19368,11 +18989,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 96,
+ "lsb_mem_word_offset": 105,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 320,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 96,
+ "field_name": "--constant-0--"
}
]
},
@@ -19381,11 +19018,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 80,
+ "lsb_mem_word_offset": 89,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 320,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 80,
+ "field_name": "--constant-0--"
}
]
},
@@ -19394,11 +19047,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 64,
+ "lsb_mem_word_offset": 73,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 320,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 64,
+ "field_name": "--constant-0--"
}
]
},
@@ -19407,11 +19076,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 48,
+ "lsb_mem_word_offset": 57,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 320,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 48,
+ "field_name": "--constant-0--"
}
]
},
@@ -19420,11 +19105,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 32,
+ "lsb_mem_word_offset": 41,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 320,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 32,
+ "field_name": "--constant-0--"
}
]
},
@@ -19433,11 +19134,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 16,
+ "lsb_mem_word_offset": 25,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 320,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 16,
+ "field_name": "--constant-0--"
}
]
},
@@ -19446,11 +19163,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 0,
+ "lsb_mem_word_offset": 9,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 320,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 0,
+ "field_name": "--constant-0--"
}
]
}
@@ -19459,7 +19192,7 @@
},
{
"entries_per_table_word": 8,
- "action_handle": 536870931,
+ "action_handle": 536870930,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -19572,7 +19305,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "action_data",
"size": 8192
}
@@ -19587,7 +19320,7 @@
"bit_width": 9
}
],
- "handle": 536870924,
+ "handle": 536870921,
"name": "set_egress_port",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19611,7 +19344,7 @@
}
],
"disallowed_as_default_action_reason": "USES_HASH_DIST",
- "handle": 536870927,
+ "handle": 536870924,
"name": "ecmp_group",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19627,7 +19360,7 @@
},
{
"p4_parameters": [],
- "handle": 536870929,
+ "handle": 536870928,
"name": "send_to_cpu",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19643,7 +19376,7 @@
},
{
"p4_parameters": [],
- "handle": 536870931,
+ "handle": 536870930,
"name": "_drop",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19663,7 +19396,7 @@
},
{
"direction": "ingress",
- "handle": 16777221,
+ "handle": 16777220,
"name": "table0",
"is_resource_controllable": true,
"table_type": "match",
@@ -19685,7 +19418,7 @@
"bit_width": 9
}
],
- "handle": 536870924,
+ "handle": 536870921,
"name": "set_egress_port",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19709,7 +19442,7 @@
}
],
"disallowed_as_default_action_reason": "USES_HASH_DIST",
- "handle": 536870927,
+ "handle": 536870924,
"name": "ecmp_group",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19725,7 +19458,7 @@
},
{
"p4_parameters": [],
- "handle": 536870929,
+ "handle": 536870928,
"name": "send_to_cpu",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19741,7 +19474,7 @@
},
{
"p4_parameters": [],
- "handle": 536870931,
+ "handle": 536870930,
"name": "_drop",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19761,7 +19494,7 @@
"match_attributes": {
"stage_tables": [
{
- "default_next_table": 48,
+ "default_next_table": 32,
"memory_resource_allocation": {
"memory_units_and_vpns": [
{
@@ -20018,7 +19751,7 @@
"two_way_notification": true,
"disable_notification": false,
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "idletime",
"size": 2048
},
@@ -20027,8 +19760,8 @@
{
"vliw_instruction_full": 65,
"next_table": 0,
- "next_table_full": 48,
- "action_handle": 536870924,
+ "next_table_full": 32,
+ "action_handle": 536870921,
"action_name": "set_egress_port",
"table_name": "_condition_2",
"immediate_fields": [],
@@ -20037,8 +19770,8 @@
{
"vliw_instruction_full": 66,
"next_table": 1,
- "next_table_full": 32,
- "action_handle": 536870927,
+ "next_table_full": 16,
+ "action_handle": 536870924,
"action_name": "ecmp_group",
"table_name": "ecmp_group_table",
"immediate_fields": [],
@@ -20047,8 +19780,8 @@
{
"vliw_instruction_full": 67,
"next_table": 0,
- "next_table_full": 48,
- "action_handle": 536870929,
+ "next_table_full": 32,
+ "action_handle": 536870928,
"action_name": "send_to_cpu",
"table_name": "_condition_2",
"immediate_fields": [],
@@ -20057,8 +19790,8 @@
{
"vliw_instruction_full": 68,
"next_table": 0,
- "next_table_full": 48,
- "action_handle": 536870931,
+ "next_table_full": 32,
+ "action_handle": 536870930,
"action_name": "_drop",
"table_name": "_condition_2",
"immediate_fields": [],
@@ -20650,7 +20383,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_indirection",
"size": 16384
},
@@ -20658,7 +20391,7 @@
0
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_match",
"size": 512
}
@@ -20671,7 +20404,7 @@
"action_data_table_refs": [
{
"how_referenced": "direct",
- "handle": 33554437,
+ "handle": 33554436,
"name": "table0__action__"
}
],
@@ -20713,7 +20446,7 @@
},
{
"direction": "ingress",
- "handle": 33554438,
+ "handle": 33554437,
"name": "ecmp_group_table__action__",
"table_type": "action",
"stage_tables": [
@@ -20722,7 +20455,7 @@
"pack_format": [
{
"entries_per_table_word": 1,
- "action_handle": 536870933,
+ "action_handle": 536870932,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -20744,7 +20477,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "action_data",
"size": 0
}
@@ -20759,7 +20492,7 @@
"bit_width": 9
}
],
- "handle": 536870933,
+ "handle": 536870932,
"name": "set_egress_port",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -20779,7 +20512,7 @@
},
{
"direction": "ingress",
- "handle": 16777222,
+ "handle": 16777221,
"name": "ecmp_group_table",
"is_resource_controllable": true,
"table_type": "match",
@@ -20801,7 +20534,7 @@
"bit_width": 9
}
],
- "handle": 536870933,
+ "handle": 536870932,
"name": "set_egress_port",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -20821,13 +20554,13 @@
"match_attributes": {
"stage_tables": [
{
- "default_next_table": 48,
+ "default_next_table": 32,
"action_format": [
{
"vliw_instruction_full": 65,
"next_table": 0,
- "next_table_full": 48,
- "action_handle": 536870933,
+ "next_table_full": 32,
+ "action_handle": 536870932,
"action_name": "set_egress_port",
"table_name": "_condition_2",
"immediate_fields": [
@@ -23251,7 +22984,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_way",
"size": 1024
},
@@ -23337,7 +23070,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_way",
"size": 1024
},
@@ -23423,7 +23156,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_way",
"size": 1024
}
@@ -23432,7 +23165,7 @@
14
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_match",
"size": 3072
}
@@ -23496,7 +23229,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "statistics",
"size": 4096
}
@@ -23505,7 +23238,7 @@
"packet_counter_resolution": 32,
"pfe_bit_position": 19,
"how_referenced": "indirect",
- "size": 254
+ "size": 510
},
{
"direction": "ingress",
@@ -23539,7 +23272,7 @@
}
],
"logical_table_id": 1,
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "statistics",
"size": 4096
}
@@ -23548,7 +23281,7 @@
"packet_counter_resolution": 32,
"pfe_bit_position": 19,
"how_referenced": "indirect",
- "size": 254
+ "size": 510
},
{
"direction": "ingress",
@@ -23582,7 +23315,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "statistics",
"size": 4096
}
@@ -23625,7 +23358,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "statistics",
"size": 4096
}
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/mau.context.json b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/mau.context.json
index d303eda..0acaceb 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/mau.context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/mau.context.json
@@ -1,7 +1,7 @@
{
"ProgramInfo": {
"ProgramName": "ecmp",
- "BuildDate": "Thu Sep 7 14:49:09 2017",
+ "BuildDate": "Fri Sep 8 08:25:35 2017",
"CompilerVersion": "5.1.0"
},
"HashJsonNode": {
@@ -9,7 +9,7 @@
"ProxyTables": {},
"AllTables": {
"ecmp_group_table": {
- "2": [
+ "1": [
{
"0": [
{
@@ -1938,7 +1938,7 @@
]
}
],
- "Handle": 16777222
+ "Handle": 16777221
}
},
"HashFieldCount": 1
@@ -1947,7 +1947,7 @@
"ExmEntryFormat": {
"AllExmTables": [
{
- "ExmTableHandle": 16777222,
+ "ExmTableHandle": 16777221,
"ExmTableName": "ecmp_group_table",
"ExmTableFormat": [
{
@@ -2260,7 +2260,7 @@
"OVERRIDE_STAT_ADDR_PFE": false,
"IMMEDIATE": {
"instr": 0,
- "next_tbl_full": 48,
+ "next_tbl_full": 32,
"action_name": "set_egress_port",
"table_name": "_condition_2",
"next_tbl": 0,
@@ -2281,7 +2281,7 @@
"OVERRIDE_METER_FULL_ADDR": 0,
"ImmediateCount": 1,
"OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870933,
+ "ACTION_HDL": 536870932,
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR": false,
"NEXTTBL": 0,
@@ -2289,12 +2289,12 @@
}
],
"ExmMatchWayCount": 3,
- "Stage": 2
+ "Stage": 1
}
]
}
],
- "TotalExmTables": 6
+ "TotalExmTables": 5
},
"Phase0EntryFormat": {
"Phase0Action": [],
@@ -2309,7 +2309,7 @@
"SPECFORMAT": []
},
{
- "TableHandle": 16777221,
+ "TableHandle": 16777220,
"SPECFORMAT": [
{
"MATCHTYPE": "ternary",
@@ -2338,7 +2338,7 @@
]
},
{
- "TableHandle": 16777222,
+ "TableHandle": 16777221,
"SPECFORMAT": [
{
"MATCHTYPE": "exact",
@@ -2355,10 +2355,6 @@
]
},
{
- "TableHandle": 16777220,
- "SPECFORMAT": []
- },
- {
"TableHandle": 16777219,
"SPECFORMAT": []
},
@@ -2372,7 +2368,7 @@
"AllTindTables": [
{
"TindTableName": "table0",
- "TindTableHandle": 16777221,
+ "TindTableHandle": 16777220,
"TindTableFormat": [
{
"TindMatchEntryFormat": [
@@ -3254,34 +3250,14 @@
"table_name": "_condition_2",
"action_name": "send_to_cpu",
"next_tbl": 0,
- "next_tbl_full": 48,
+ "next_tbl_full": 32,
"instr": 11
},
"OVERRIDE_STATEFUL_ADDR_PFE": false,
"OVERRIDE_METER_FULL_ADDR": 0,
"ImmediateCount": 0,
"OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870929,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR": false,
- "OVERRIDE_STATEFUL_ADDR": false
- },
- {
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "IMMEDIATE": {
- "table_name": "_condition_2",
- "action_name": "_drop",
- "next_tbl": 0,
- "next_tbl_full": 48,
- "instr": 12
- },
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "ImmediateCount": 0,
- "OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870931,
+ "ACTION_HDL": 536870928,
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR": false,
"OVERRIDE_STATEFUL_ADDR": false
@@ -3294,14 +3270,34 @@
"table_name": "_condition_2",
"action_name": "set_egress_port",
"next_tbl": 0,
- "next_tbl_full": 48,
+ "next_tbl_full": 32,
"instr": 9
},
"OVERRIDE_STATEFUL_ADDR_PFE": false,
"OVERRIDE_METER_FULL_ADDR": 0,
"ImmediateCount": 0,
"OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870924,
+ "ACTION_HDL": 536870921,
+ "OVERRIDE_STATEFUL_FULL_ADDR": 0,
+ "OVERRIDE_METER_ADDR": false,
+ "OVERRIDE_STATEFUL_ADDR": false
+ },
+ {
+ "OVERRIDE_STAT_FULL_ADDR": 0,
+ "OVERRIDE_METER_ADDR_PFE": false,
+ "OVERRIDE_STAT_ADDR_PFE": false,
+ "IMMEDIATE": {
+ "table_name": "_condition_2",
+ "action_name": "_drop",
+ "next_tbl": 0,
+ "next_tbl_full": 32,
+ "instr": 12
+ },
+ "OVERRIDE_STATEFUL_ADDR_PFE": false,
+ "OVERRIDE_METER_FULL_ADDR": 0,
+ "ImmediateCount": 0,
+ "OVERRIDE_STAT_ADDR": false,
+ "ACTION_HDL": 536870930,
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR": false,
"OVERRIDE_STATEFUL_ADDR": false
@@ -3314,20 +3310,20 @@
"table_name": "ecmp_group_table",
"action_name": "ecmp_group",
"next_tbl": 1,
- "next_tbl_full": 32,
+ "next_tbl_full": 16,
"instr": 10
},
"OVERRIDE_STATEFUL_ADDR_PFE": false,
"OVERRIDE_METER_FULL_ADDR": 0,
"ImmediateCount": 0,
"OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870927,
+ "ACTION_HDL": 536870924,
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR": false,
"OVERRIDE_STATEFUL_ADDR": false
}
],
- "Stage": 1
+ "Stage": 0
}
]
}
@@ -3346,16 +3342,11 @@
},
{
"ActionHandle": 536870919,
- "action_function": "_packet_out",
+ "action_function": "_process_packet_out",
"ACTIONSPECFORMAT": []
},
{
- "ActionHandle": 536870922,
- "action_function": "add_packet_in_hdr",
- "ACTIONSPECFORMAT": []
- },
- {
- "ActionHandle": 536870924,
+ "ActionHandle": 536870921,
"action_function": "set_egress_port",
"ACTIONSPECFORMAT": [
{
@@ -3366,7 +3357,7 @@
]
},
{
- "ActionHandle": 536870927,
+ "ActionHandle": 536870924,
"action_function": "ecmp_group",
"ACTIONSPECFORMAT": [
{
@@ -3377,17 +3368,17 @@
]
},
{
- "ActionHandle": 536870929,
+ "ActionHandle": 536870928,
"action_function": "send_to_cpu",
"ACTIONSPECFORMAT": []
},
{
- "ActionHandle": 536870931,
+ "ActionHandle": 536870930,
"action_function": "_drop",
"ACTIONSPECFORMAT": []
},
{
- "ActionHandle": 536870933,
+ "ActionHandle": 536870932,
"action_function": "set_egress_port",
"ACTIONSPECFORMAT": [
{
@@ -3401,7 +3392,7 @@
"TernEntryFormat": {
"AllTernTables": [
{
- "TernTableHandle": 16777221,
+ "TernTableHandle": 16777220,
"TernTableName": "table0",
"TernTableFormat": [
{
@@ -3791,12 +3782,12 @@
}
],
"TernEntryFieldCount": 22,
- "Stage": 1
+ "Stage": 0
}
]
}
],
- "TotalTernTables": 6
+ "TotalTernTables": 5
},
"AdtEntryFormat": {
"AllActionDataTables": [
@@ -3831,7 +3822,7 @@
}
],
"ActFuncEntryCount": 1,
- "Stage": 3
+ "Stage": 2
}
]
}
@@ -3872,7 +3863,7 @@
}
],
"ActFuncEntryCount": 1,
- "Stage": 3
+ "Stage": 2
}
]
}
@@ -3887,7 +3878,7 @@
"ActFuncTotalEntries": 1,
"ActionDataTableFormat": [
{
- "ActFuncName": "_packet_out",
+ "ActFuncName": "_process_packet_out",
"ActFuncHandle": 536870919,
"ActFuncStageCount": 1,
"ActFuncFormat": [
@@ -3924,70 +3915,47 @@
"ActionDataTableHandle": 33554435
},
{
- "ActFuncTotalStageCount": 1,
- "ActFuncTotalEntries": 1,
- "ActionDataTableFormat": [
- {
- "ActFuncName": "add_packet_in_hdr",
- "ActFuncHandle": 536870922,
- "ActFuncStageCount": 1,
- "ActFuncFormat": [
- {
- "ActFuncEntryFormat": [
- {
- "Entry": 0,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
- "EntryFormat": [
- {
- "FIELDWIDTH": 0,
- "SOURCENAME": "ZERO",
- "SHIFT": 0,
- "WORDINDEX": 1,
- "MASKBITOFFSET": "NULL",
- "SOURCEOFFSET": 0,
- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 0,
- "SOURCEWIDTH": 0
- }
- ]
- }
- ],
- "ActFuncEntryCount": 1,
- "Stage": 0
- }
- ]
- }
- ],
- "ActFuncHandleTotalCount": 1,
- "ActFuncTotalEntryFieldCount": 1,
- "ActFuncTotalConstTupleList": 0,
- "ActionDataTableHandle": 33554436
- },
- {
"ActFuncTotalStageCount": 4,
"ActFuncTotalEntries": 32,
"ActionDataTableFormat": [
{
"ActFuncName": "send_to_cpu",
- "ActFuncHandle": 536870929,
+ "ActFuncHandle": 536870928,
"ActFuncStageCount": 1,
"ActFuncFormat": [
{
"ActFuncEntryFormat": [
{
"Entry": 0,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
+ "EntryFieldCount": 2,
+ "EntryConstTupCount": 1,
"EntryFormat": [
{
- "FIELDWIDTH": 16,
+ "FIELDWIDTH": 7,
"SOURCENAME": "ZERO",
"SHIFT": 0,
"WORDINDEX": 0,
"MASKBITOFFSET": "NULL",
"SOURCEOFFSET": 0,
"FIELDNAME": "--padding--",
+ "FIELDOFFSET": 9,
+ "SOURCEWIDTH": 0
+ },
+ {
+ "FIELDWIDTH": 9,
+ "CONSTTUPLELIST": [
+ {
+ "DSTSTART": 0,
+ "CONSTANT": 320,
+ "DSTWIDTH": 9
+ }
+ ],
+ "SOURCENAME": "CONSTANT",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--constant-0--",
"FIELDOFFSET": 0,
"SOURCEWIDTH": 0
}
@@ -3995,17 +3963,35 @@
},
{
"Entry": 1,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
+ "EntryFieldCount": 2,
+ "EntryConstTupCount": 1,
"EntryFormat": [
{
- "FIELDWIDTH": 16,
+ "FIELDWIDTH": 7,
"SOURCENAME": "ZERO",
"SHIFT": 0,
"WORDINDEX": 0,
"MASKBITOFFSET": "NULL",
"SOURCEOFFSET": 0,
"FIELDNAME": "--padding--",
+ "FIELDOFFSET": 25,
+ "SOURCEWIDTH": 0
+ },
+ {
+ "FIELDWIDTH": 9,
+ "CONSTTUPLELIST": [
+ {
+ "DSTSTART": 0,
+ "CONSTANT": 320,
+ "DSTWIDTH": 9
+ }
+ ],
+ "SOURCENAME": "CONSTANT",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--constant-0--",
"FIELDOFFSET": 16,
"SOURCEWIDTH": 0
}
@@ -4013,17 +3999,35 @@
},
{
"Entry": 2,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
+ "EntryFieldCount": 2,
+ "EntryConstTupCount": 1,
"EntryFormat": [
{
- "FIELDWIDTH": 16,
+ "FIELDWIDTH": 7,
"SOURCENAME": "ZERO",
"SHIFT": 0,
"WORDINDEX": 0,
"MASKBITOFFSET": "NULL",
"SOURCEOFFSET": 0,
"FIELDNAME": "--padding--",
+ "FIELDOFFSET": 41,
+ "SOURCEWIDTH": 0
+ },
+ {
+ "FIELDWIDTH": 9,
+ "CONSTTUPLELIST": [
+ {
+ "DSTSTART": 0,
+ "CONSTANT": 320,
+ "DSTWIDTH": 9
+ }
+ ],
+ "SOURCENAME": "CONSTANT",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--constant-0--",
"FIELDOFFSET": 32,
"SOURCEWIDTH": 0
}
@@ -4031,17 +4035,35 @@
},
{
"Entry": 3,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
+ "EntryFieldCount": 2,
+ "EntryConstTupCount": 1,
"EntryFormat": [
{
- "FIELDWIDTH": 16,
+ "FIELDWIDTH": 7,
"SOURCENAME": "ZERO",
"SHIFT": 0,
"WORDINDEX": 0,
"MASKBITOFFSET": "NULL",
"SOURCEOFFSET": 0,
"FIELDNAME": "--padding--",
+ "FIELDOFFSET": 57,
+ "SOURCEWIDTH": 0
+ },
+ {
+ "FIELDWIDTH": 9,
+ "CONSTTUPLELIST": [
+ {
+ "DSTSTART": 0,
+ "CONSTANT": 320,
+ "DSTWIDTH": 9
+ }
+ ],
+ "SOURCENAME": "CONSTANT",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--constant-0--",
"FIELDOFFSET": 48,
"SOURCEWIDTH": 0
}
@@ -4049,17 +4071,35 @@
},
{
"Entry": 4,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
+ "EntryFieldCount": 2,
+ "EntryConstTupCount": 1,
"EntryFormat": [
{
- "FIELDWIDTH": 16,
+ "FIELDWIDTH": 7,
"SOURCENAME": "ZERO",
"SHIFT": 0,
"WORDINDEX": 0,
"MASKBITOFFSET": "NULL",
"SOURCEOFFSET": 0,
"FIELDNAME": "--padding--",
+ "FIELDOFFSET": 73,
+ "SOURCEWIDTH": 0
+ },
+ {
+ "FIELDWIDTH": 9,
+ "CONSTTUPLELIST": [
+ {
+ "DSTSTART": 0,
+ "CONSTANT": 320,
+ "DSTWIDTH": 9
+ }
+ ],
+ "SOURCENAME": "CONSTANT",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--constant-0--",
"FIELDOFFSET": 64,
"SOURCEWIDTH": 0
}
@@ -4067,17 +4107,35 @@
},
{
"Entry": 5,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
+ "EntryFieldCount": 2,
+ "EntryConstTupCount": 1,
"EntryFormat": [
{
- "FIELDWIDTH": 16,
+ "FIELDWIDTH": 7,
"SOURCENAME": "ZERO",
"SHIFT": 0,
"WORDINDEX": 0,
"MASKBITOFFSET": "NULL",
"SOURCEOFFSET": 0,
"FIELDNAME": "--padding--",
+ "FIELDOFFSET": 89,
+ "SOURCEWIDTH": 0
+ },
+ {
+ "FIELDWIDTH": 9,
+ "CONSTTUPLELIST": [
+ {
+ "DSTSTART": 0,
+ "CONSTANT": 320,
+ "DSTWIDTH": 9
+ }
+ ],
+ "SOURCENAME": "CONSTANT",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--constant-0--",
"FIELDOFFSET": 80,
"SOURCEWIDTH": 0
}
@@ -4085,17 +4143,35 @@
},
{
"Entry": 6,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
+ "EntryFieldCount": 2,
+ "EntryConstTupCount": 1,
"EntryFormat": [
{
- "FIELDWIDTH": 16,
+ "FIELDWIDTH": 7,
"SOURCENAME": "ZERO",
"SHIFT": 0,
"WORDINDEX": 0,
"MASKBITOFFSET": "NULL",
"SOURCEOFFSET": 0,
"FIELDNAME": "--padding--",
+ "FIELDOFFSET": 105,
+ "SOURCEWIDTH": 0
+ },
+ {
+ "FIELDWIDTH": 9,
+ "CONSTTUPLELIST": [
+ {
+ "DSTSTART": 0,
+ "CONSTANT": 320,
+ "DSTWIDTH": 9
+ }
+ ],
+ "SOURCENAME": "CONSTANT",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--constant-0--",
"FIELDOFFSET": 96,
"SOURCEWIDTH": 0
}
@@ -4103,17 +4179,35 @@
},
{
"Entry": 7,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
+ "EntryFieldCount": 2,
+ "EntryConstTupCount": 1,
"EntryFormat": [
{
- "FIELDWIDTH": 16,
+ "FIELDWIDTH": 7,
"SOURCENAME": "ZERO",
"SHIFT": 0,
"WORDINDEX": 0,
"MASKBITOFFSET": "NULL",
"SOURCEOFFSET": 0,
"FIELDNAME": "--padding--",
+ "FIELDOFFSET": 121,
+ "SOURCEWIDTH": 0
+ },
+ {
+ "FIELDWIDTH": 9,
+ "CONSTTUPLELIST": [
+ {
+ "DSTSTART": 0,
+ "CONSTANT": 320,
+ "DSTWIDTH": 9
+ }
+ ],
+ "SOURCENAME": "CONSTANT",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--constant-0--",
"FIELDOFFSET": 112,
"SOURCEWIDTH": 0
}
@@ -4121,170 +4215,13 @@
}
],
"ActFuncEntryCount": 8,
- "Stage": 1
- }
- ]
- },
- {
- "ActFuncName": "_drop",
- "ActFuncHandle": 536870931,
- "ActFuncStageCount": 1,
- "ActFuncFormat": [
- {
- "ActFuncEntryFormat": [
- {
- "Entry": 0,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
- "EntryFormat": [
- {
- "FIELDWIDTH": 16,
- "SOURCENAME": "ZERO",
- "SHIFT": 0,
- "WORDINDEX": 0,
- "MASKBITOFFSET": "NULL",
- "SOURCEOFFSET": 0,
- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 0,
- "SOURCEWIDTH": 0
- }
- ]
- },
- {
- "Entry": 1,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
- "EntryFormat": [
- {
- "FIELDWIDTH": 16,
- "SOURCENAME": "ZERO",
- "SHIFT": 0,
- "WORDINDEX": 0,
- "MASKBITOFFSET": "NULL",
- "SOURCEOFFSET": 0,
- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 16,
- "SOURCEWIDTH": 0
- }
- ]
- },
- {
- "Entry": 2,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
- "EntryFormat": [
- {
- "FIELDWIDTH": 16,
- "SOURCENAME": "ZERO",
- "SHIFT": 0,
- "WORDINDEX": 0,
- "MASKBITOFFSET": "NULL",
- "SOURCEOFFSET": 0,
- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 32,
- "SOURCEWIDTH": 0
- }
- ]
- },
- {
- "Entry": 3,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
- "EntryFormat": [
- {
- "FIELDWIDTH": 16,
- "SOURCENAME": "ZERO",
- "SHIFT": 0,
- "WORDINDEX": 0,
- "MASKBITOFFSET": "NULL",
- "SOURCEOFFSET": 0,
- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 48,
- "SOURCEWIDTH": 0
- }
- ]
- },
- {
- "Entry": 4,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
- "EntryFormat": [
- {
- "FIELDWIDTH": 16,
- "SOURCENAME": "ZERO",
- "SHIFT": 0,
- "WORDINDEX": 0,
- "MASKBITOFFSET": "NULL",
- "SOURCEOFFSET": 0,
- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 64,
- "SOURCEWIDTH": 0
- }
- ]
- },
- {
- "Entry": 5,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
- "EntryFormat": [
- {
- "FIELDWIDTH": 16,
- "SOURCENAME": "ZERO",
- "SHIFT": 0,
- "WORDINDEX": 0,
- "MASKBITOFFSET": "NULL",
- "SOURCEOFFSET": 0,
- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 80,
- "SOURCEWIDTH": 0
- }
- ]
- },
- {
- "Entry": 6,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
- "EntryFormat": [
- {
- "FIELDWIDTH": 16,
- "SOURCENAME": "ZERO",
- "SHIFT": 0,
- "WORDINDEX": 0,
- "MASKBITOFFSET": "NULL",
- "SOURCEOFFSET": 0,
- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 96,
- "SOURCEWIDTH": 0
- }
- ]
- },
- {
- "Entry": 7,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
- "EntryFormat": [
- {
- "FIELDWIDTH": 16,
- "SOURCENAME": "ZERO",
- "SHIFT": 0,
- "WORDINDEX": 0,
- "MASKBITOFFSET": "NULL",
- "SOURCEOFFSET": 0,
- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 112,
- "SOURCEWIDTH": 0
- }
- ]
- }
- ],
- "ActFuncEntryCount": 8,
- "Stage": 1
+ "Stage": 0
}
]
},
{
"ActFuncName": "set_egress_port",
- "ActFuncHandle": 536870924,
+ "ActFuncHandle": 536870921,
"ActFuncStageCount": 1,
"ActFuncFormat": [
{
@@ -4523,13 +4460,170 @@
}
],
"ActFuncEntryCount": 8,
- "Stage": 1
+ "Stage": 0
+ }
+ ]
+ },
+ {
+ "ActFuncName": "_drop",
+ "ActFuncHandle": 536870930,
+ "ActFuncStageCount": 1,
+ "ActFuncFormat": [
+ {
+ "ActFuncEntryFormat": [
+ {
+ "Entry": 0,
+ "EntryFieldCount": 1,
+ "EntryConstTupCount": 0,
+ "EntryFormat": [
+ {
+ "FIELDWIDTH": 16,
+ "SOURCENAME": "ZERO",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--padding--",
+ "FIELDOFFSET": 0,
+ "SOURCEWIDTH": 0
+ }
+ ]
+ },
+ {
+ "Entry": 1,
+ "EntryFieldCount": 1,
+ "EntryConstTupCount": 0,
+ "EntryFormat": [
+ {
+ "FIELDWIDTH": 16,
+ "SOURCENAME": "ZERO",
+ "SHIFT": 0,
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+ "FIELDNAME": "--padding--",
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}
]
},
{
"ActFuncName": "ecmp_group",
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+ "ActFuncHandle": 536870924,
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{
@@ -4680,15 +4774,15 @@
}
],
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}
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},
{
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@@ -4696,7 +4790,7 @@
"ActionDataTableFormat": [
{
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- "ActFuncHandle": 536870933,
+ "ActFuncHandle": 536870932,
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{
@@ -4721,7 +4815,7 @@
}
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@@ -4729,17 +4823,17 @@
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+ "ActionDataTableHandle": 33554437
}
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},
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{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
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{
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@@ -4758,7 +4852,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
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}
]
}
@@ -4775,7 +4869,7 @@
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"CONTAINERWIDTH": 32,
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- "POSITIONOFFSET": 20
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},
{
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@@ -4795,7 +4889,7 @@
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}
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@@ -4810,7 +4904,7 @@
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}
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@@ -4825,7 +4919,7 @@
"PHVNAME": "ethernet_dstAddr",
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}
],
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@@ -4840,7 +4934,7 @@
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}
],
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@@ -4855,7 +4949,7 @@
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},
{
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@@ -4865,7 +4959,7 @@
"PHVNAME": "udp_dstPort",
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+ "POSITIONOFFSET": 55
}
],
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@@ -4880,7 +4974,7 @@
"PHVNAME": "ecmp_metadata_groupId",
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+ "POSITIONOFFSET": 20
}
],
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@@ -4905,7 +4999,7 @@
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+ "POSITIONOFFSET": 33
}
],
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@@ -4914,13 +5008,13 @@
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{
"FIELDWIDTH": 4,
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+ "FIELDLSB": 16,
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- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
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+ "PHVNAME": "tcp_ackNo",
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}
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@@ -4935,7 +5029,7 @@
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},
{
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@@ -4960,7 +5054,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
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}
],
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@@ -4975,7 +5069,7 @@
"PHVNAME": "ipv4_identification",
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+ "POSITIONOFFSET": 49
},
{
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@@ -4995,7 +5089,7 @@
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},
{
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@@ -5005,7 +5099,7 @@
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}
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@@ -5030,7 +5124,7 @@
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}
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@@ -5045,7 +5139,7 @@
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}
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@@ -5060,7 +5154,7 @@
"PHVNAME": "ethernet_dstAddr",
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},
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@@ -5070,7 +5164,7 @@
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@@ -5100,7 +5194,7 @@
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@@ -5110,7 +5204,7 @@
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@@ -5125,7 +5219,7 @@
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@@ -5135,7 +5229,7 @@
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@@ -5150,7 +5244,7 @@
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@@ -5160,7 +5254,7 @@
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}
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@@ -5169,13 +5263,43 @@
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{
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+ "PHVNAME": "tcp_dstPort",
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+ "PHVNAME": "tcp_dstPort",
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@@ -5183,426 +5307,34 @@
{
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+ "PHVNAME": "tcp_res",
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+ "POSITIONOFFSET": 48
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"FIELDWIDTH": 1,
@@ -5622,10 +5354,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -5647,7 +5530,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -5655,6 +5634,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -5662,10 +5771,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -5677,40 +5786,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -5722,10 +5801,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -5737,7 +5816,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -5747,10 +5826,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -5765,7 +5844,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -5777,7 +5856,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -5787,10 +5866,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -5802,7 +5881,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -5812,10 +5891,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -5827,10 +5906,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -5842,10 +5921,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -5857,10 +5936,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -5872,10 +5951,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -5900,7 +5979,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -5912,120 +5991,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -6040,7 +6009,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -6056,53 +6025,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 0
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -6121,7 +6195,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -6138,7 +6212,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -6158,7 +6232,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -6173,7 +6247,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -6188,7 +6262,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -6203,7 +6277,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -6218,7 +6292,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -6228,7 +6302,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -6243,7 +6317,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -6268,7 +6342,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -6277,13 +6351,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -6298,7 +6372,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -6323,7 +6397,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -6338,7 +6412,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -6358,7 +6432,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -6368,7 +6442,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -6393,7 +6467,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -6408,7 +6482,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -6423,7 +6497,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -6433,7 +6507,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -6463,7 +6537,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -6473,7 +6547,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -6488,7 +6562,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
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@@ -6498,7 +6572,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -6513,7 +6587,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
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@@ -6523,7 +6597,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -6532,13 +6606,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -6546,426 +6650,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
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- {
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- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
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- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
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- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
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- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
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+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
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- "PHVNAME": "tcp_ecn",
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- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
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@@ -6985,10 +6697,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
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+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
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+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
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+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
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+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -7010,7 +6873,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
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+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
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+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -7018,6 +6977,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -7025,10 +7114,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -7040,40 +7129,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -7085,10 +7144,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -7100,7 +7159,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -7110,10 +7169,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -7128,7 +7187,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -7140,7 +7199,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -7150,10 +7209,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -7165,7 +7224,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -7175,10 +7234,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -7190,10 +7249,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -7205,10 +7264,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -7220,10 +7279,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -7235,10 +7294,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -7263,7 +7322,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -7275,120 +7334,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -7403,7 +7352,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -7419,53 +7368,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 1
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -7484,7 +7538,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -7501,7 +7555,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -7521,7 +7575,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -7536,7 +7590,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -7551,7 +7605,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -7566,7 +7620,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -7581,7 +7635,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -7591,7 +7645,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -7606,7 +7660,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -7631,7 +7685,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -7640,13 +7694,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -7661,7 +7715,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -7686,7 +7740,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -7701,7 +7755,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -7721,7 +7775,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -7731,7 +7785,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -7756,7 +7810,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -7771,7 +7825,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -7786,7 +7840,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -7796,7 +7850,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -7826,7 +7880,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -7836,7 +7890,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -7851,7 +7905,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -7861,7 +7915,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -7876,7 +7930,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -7886,7 +7940,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -7895,13 +7949,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -7909,426 +7993,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 7,
- "FIELDMSB": 23,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 14
- }
- ],
- "PHVNUMBER": 65
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_dstAddr",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 71
- }
- ],
- "PHVNUMBER": 67
- },
- {
- "PHVRECORD": [
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- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "POV",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
- {
- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
- "POSITIONOFFSET": 85
- },
- {
- "HEADER": "tcp",
- "POVBIT": 4,
- "HIDDEN": false,
- "POSITIONOFFSET": 86
- },
- {
- "HEADER": "udp",
- "POVBIT": 5,
- "HIDDEN": false,
- "POSITIONOFFSET": 87
- }
- ]
- }
- ],
- "PHVNUMBER": 68
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 7,
- "FIELDMSB": 2,
- "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 5,
- "POSITIONOFFSET": 52
- }
- ],
- "PHVNUMBER": 69
- },
- {
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- {
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- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 44
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 49
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 13
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 21,
- "FIELDMSB": 5,
- "PHVNAME": "tcp_ctrl",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 38
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_window",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 47
- }
- ],
- "PHVNUMBER": 258
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 36
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 69
- }
- ],
- "PHVNUMBER": 322
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 77
- }
- ],
- "PHVNUMBER": 323
- }
- ],
- "TOTALINGRESSPHVS": 32
- },
- {
- "PHVDIRECTION": 1,
- "EGRESSPHVS": [
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_ttl",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 24,
- "POSITIONOFFSET": 50
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 23,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_protocol",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 21
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_hdrChecksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 11
- }
- ],
- "PHVNUMBER": 260
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 15
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_dstAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 262
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 62
- }
- ],
- "PHVNUMBER": 263
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -8348,10 +8040,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -8373,7 +8216,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -8381,6 +8320,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -8388,10 +8457,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -8403,40 +8472,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -8448,10 +8487,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -8463,7 +8502,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -8473,10 +8512,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -8491,7 +8530,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -8503,7 +8542,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -8513,10 +8552,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -8528,7 +8567,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -8538,10 +8577,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -8553,10 +8592,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -8568,10 +8607,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -8583,10 +8622,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -8598,10 +8637,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -8626,7 +8665,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -8638,120 +8677,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -8766,7 +8695,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -8782,53 +8711,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 2
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -8847,7 +8881,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -8864,7 +8898,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -8884,7 +8918,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -8899,7 +8933,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -8914,7 +8948,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -8929,7 +8963,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -8944,7 +8978,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -8954,7 +8988,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -8969,7 +9003,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -8994,7 +9028,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -9003,13 +9037,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -9024,7 +9058,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -9049,7 +9083,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -9064,7 +9098,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -9084,7 +9118,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -9094,7 +9128,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -9119,7 +9153,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -9134,7 +9168,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -9149,7 +9183,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -9159,7 +9193,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -9189,7 +9223,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -9199,7 +9233,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -9214,7 +9248,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -9224,7 +9258,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -9239,7 +9273,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -9249,7 +9283,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -9258,13 +9292,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -9272,426 +9336,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 7,
- "FIELDMSB": 23,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 14
- }
- ],
- "PHVNUMBER": 65
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 71
- }
- ],
- "PHVNUMBER": 67
- },
- {
- "PHVRECORD": [
- {
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "POV",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
- {
- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
- "POSITIONOFFSET": 85
- },
- {
- "HEADER": "tcp",
- "POVBIT": 4,
- "HIDDEN": false,
- "POSITIONOFFSET": 86
- },
- {
- "HEADER": "udp",
- "POVBIT": 5,
- "HIDDEN": false,
- "POSITIONOFFSET": 87
- }
- ]
- }
- ],
- "PHVNUMBER": 68
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 7,
- "FIELDMSB": 2,
- "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 5,
- "POSITIONOFFSET": 52
- }
- ],
- "PHVNUMBER": 69
- },
- {
- "PHVRECORD": [
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- }
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- },
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- "PHVNAME": "tcp_dataOffset",
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- },
- {
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- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
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- "PHVLSB": 25,
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- },
- {
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- "PHVNAME": "tcp_ecn",
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- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -9711,10 +9383,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
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+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -9736,7 +9559,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -9744,6 +9663,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -9751,10 +9800,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -9766,40 +9815,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -9811,10 +9830,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -9826,7 +9845,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -9836,10 +9855,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -9854,7 +9873,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -9866,7 +9885,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -9876,10 +9895,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -9891,7 +9910,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -9901,10 +9920,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -9916,10 +9935,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -9931,10 +9950,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -9946,10 +9965,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -9961,10 +9980,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -9989,7 +10008,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -10001,120 +10020,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
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- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
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- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -10129,7 +10038,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -10145,53 +10054,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 3
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -10210,7 +10224,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -10227,7 +10241,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -10247,7 +10261,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -10262,7 +10276,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -10277,7 +10291,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -10292,7 +10306,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -10307,7 +10321,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -10317,7 +10331,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -10332,7 +10346,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -10357,7 +10371,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -10366,13 +10380,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -10387,7 +10401,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -10412,7 +10426,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -10427,7 +10441,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -10447,7 +10461,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -10457,7 +10471,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -10482,7 +10496,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -10497,7 +10511,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -10512,7 +10526,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -10522,7 +10536,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -10552,7 +10566,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -10562,7 +10576,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -10577,7 +10591,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -10587,7 +10601,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -10602,7 +10616,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -10612,7 +10626,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -10621,13 +10635,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -10635,426 +10679,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
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"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 16,
- "PHVMSB": 7,
- "FIELDMSB": 23,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 14
- }
- ],
- "PHVNUMBER": 65
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_dstAddr",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
- "PHVRECORD": [
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- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "ethernet_srcAddr",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 71
- }
- ],
- "PHVNUMBER": 67
- },
- {
- "PHVRECORD": [
- {
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- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "POV",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
- {
- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
- "POSITIONOFFSET": 85
- },
- {
- "HEADER": "tcp",
- "POVBIT": 4,
- "HIDDEN": false,
- "POSITIONOFFSET": 86
- },
- {
- "HEADER": "udp",
- "POVBIT": 5,
- "HIDDEN": false,
- "POSITIONOFFSET": 87
- }
- ]
- }
- ],
- "PHVNUMBER": 68
- },
- {
- "PHVRECORD": [
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- "FIELDMSB": 2,
- "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 5,
- "POSITIONOFFSET": 52
- }
- ],
- "PHVNUMBER": 69
- },
- {
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- "FIELDLSB": 0,
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- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 44
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
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- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
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- "PHVLSB": 25,
- "POSITIONOFFSET": 49
- },
- {
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- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
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- "PHVLSB": 22,
- "POSITIONOFFSET": 13
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 21,
- "FIELDMSB": 5,
- "PHVNAME": "tcp_ctrl",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 38
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_window",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 47
- }
- ],
- "PHVNUMBER": 258
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
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- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 36
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 69
- }
- ],
- "PHVNUMBER": 322
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
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- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
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- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 77
- }
- ],
- "PHVNUMBER": 323
- }
- ],
- "TOTALINGRESSPHVS": 32
- },
- {
- "PHVDIRECTION": 1,
- "EGRESSPHVS": [
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- "FIELDMSB": 7,
- "PHVNAME": "ipv4_ttl",
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- },
- {
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- },
- {
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- "PHVNAME": "ipv4_hdrChecksum",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 11
- }
- ],
- "PHVNUMBER": 260
- },
- {
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- },
- {
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- "PHVLSB": 0,
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- }
- ],
- "PHVNUMBER": 262
- },
- {
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- "PHVNAME": "tcp_ackNo",
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- },
- {
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- "PHVNAME": "udp_checksum",
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- "PHVLSB": 0,
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- "PHVNUMBER": 263
- },
- {
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- "FIELDLSB": 0,
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- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
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- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
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- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
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- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -11074,10 +10726,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
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+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -11099,7 +10902,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
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+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -11107,6 +11006,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -11114,10 +11143,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -11129,40 +11158,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
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- },
- {
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- {
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- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
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- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -11174,10 +11173,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -11189,7 +11188,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -11199,10 +11198,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -11217,7 +11216,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -11229,7 +11228,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -11239,10 +11238,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -11254,7 +11253,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -11264,10 +11263,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -11279,10 +11278,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -11294,10 +11293,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -11309,10 +11308,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -11324,10 +11323,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -11352,7 +11351,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -11364,120 +11363,10 @@
"PHVNAME": "tcp_dstPort",
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"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
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- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
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- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
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- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
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- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -11492,7 +11381,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -11508,53 +11397,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 4
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -11573,7 +11567,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -11590,7 +11584,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -11610,7 +11604,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -11625,7 +11619,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -11640,7 +11634,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -11655,7 +11649,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -11670,7 +11664,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -11680,7 +11674,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -11695,7 +11689,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -11720,7 +11714,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -11729,13 +11723,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -11750,7 +11744,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -11775,7 +11769,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -11790,7 +11784,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -11810,7 +11804,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -11820,7 +11814,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -11845,7 +11839,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -11860,7 +11854,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -11875,7 +11869,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -11885,7 +11879,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -11915,7 +11909,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -11925,7 +11919,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -11940,7 +11934,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -11950,7 +11944,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -11965,7 +11959,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -11975,7 +11969,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -11984,13 +11978,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -11998,426 +12022,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 7,
- "FIELDMSB": 23,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 14
- }
- ],
- "PHVNUMBER": 65
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 71
- }
- ],
- "PHVNUMBER": 67
- },
- {
- "PHVRECORD": [
- {
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "POV",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
- {
- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
- "POSITIONOFFSET": 85
- },
- {
- "HEADER": "tcp",
- "POVBIT": 4,
- "HIDDEN": false,
- "POSITIONOFFSET": 86
- },
- {
- "HEADER": "udp",
- "POVBIT": 5,
- "HIDDEN": false,
- "POSITIONOFFSET": 87
- }
- ]
- }
- ],
- "PHVNUMBER": 68
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 7,
- "FIELDMSB": 2,
- "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 5,
- "POSITIONOFFSET": 52
- }
- ],
- "PHVNUMBER": 69
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 44
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 49
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 13
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 21,
- "FIELDMSB": 5,
- "PHVNAME": "tcp_ctrl",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 38
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_window",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 47
- }
- ],
- "PHVNUMBER": 258
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 36
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 69
- }
- ],
- "PHVNUMBER": 322
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 77
- }
- ],
- "PHVNUMBER": 323
- }
- ],
- "TOTALINGRESSPHVS": 32
- },
- {
- "PHVDIRECTION": 1,
- "EGRESSPHVS": [
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_ttl",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 24,
- "POSITIONOFFSET": 50
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 23,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_protocol",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 21
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_hdrChecksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 11
- }
- ],
- "PHVNUMBER": 260
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 15
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_dstAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 262
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 62
- }
- ],
- "PHVNUMBER": 263
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -12437,10 +12069,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -12462,7 +12245,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -12470,6 +12349,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -12477,10 +12486,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -12492,40 +12501,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -12537,10 +12516,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -12552,7 +12531,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -12562,10 +12541,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -12580,7 +12559,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -12592,7 +12571,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -12602,10 +12581,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -12617,7 +12596,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -12627,10 +12606,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -12642,10 +12621,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -12657,10 +12636,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -12672,10 +12651,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -12687,10 +12666,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -12715,7 +12694,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -12727,120 +12706,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -12855,7 +12724,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -12871,53 +12740,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 5
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -12936,7 +12910,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -12953,7 +12927,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -12973,7 +12947,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -12988,7 +12962,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -13003,7 +12977,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -13018,7 +12992,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -13033,7 +13007,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -13043,7 +13017,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -13058,7 +13032,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -13083,7 +13057,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -13092,13 +13066,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -13113,7 +13087,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -13138,7 +13112,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -13153,7 +13127,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -13173,7 +13147,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -13183,7 +13157,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -13208,7 +13182,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -13223,7 +13197,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -13238,7 +13212,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -13248,7 +13222,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -13278,7 +13252,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -13288,7 +13262,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -13303,7 +13277,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -13313,7 +13287,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -13328,7 +13302,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -13338,7 +13312,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -13347,13 +13321,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -13361,426 +13365,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 7,
- "FIELDMSB": 23,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 14
- }
- ],
- "PHVNUMBER": 65
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 71
- }
- ],
- "PHVNUMBER": 67
- },
- {
- "PHVRECORD": [
- {
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- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "POV",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
- {
- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
- "POSITIONOFFSET": 85
- },
- {
- "HEADER": "tcp",
- "POVBIT": 4,
- "HIDDEN": false,
- "POSITIONOFFSET": 86
- },
- {
- "HEADER": "udp",
- "POVBIT": 5,
- "HIDDEN": false,
- "POSITIONOFFSET": 87
- }
- ]
- }
- ],
- "PHVNUMBER": 68
- },
- {
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- "FIELDLSB": 0,
- "PHVMSB": 7,
- "FIELDMSB": 2,
- "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 5,
- "POSITIONOFFSET": 52
- }
- ],
- "PHVNUMBER": 69
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 44
- },
- {
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- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
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- "PHVLSB": 25,
- "POSITIONOFFSET": 49
- },
- {
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- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
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- "PHVLSB": 22,
- "POSITIONOFFSET": 13
- },
- {
- "FIELDWIDTH": 1,
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- "FIELDMSB": 5,
- "PHVNAME": "tcp_ctrl",
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- "PHVLSB": 16,
- "POSITIONOFFSET": 38
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_window",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 47
- }
- ],
- "PHVNUMBER": 258
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 36
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 69
- }
- ],
- "PHVNUMBER": 322
- },
- {
- "PHVRECORD": [
- {
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- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
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- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 77
- }
- ],
- "PHVNUMBER": 323
- }
- ],
- "TOTALINGRESSPHVS": 32
- },
- {
- "PHVDIRECTION": 1,
- "EGRESSPHVS": [
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_ttl",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 24,
- "POSITIONOFFSET": 50
- },
- {
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- "FIELDLSB": 0,
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- "FIELDMSB": 7,
- "PHVNAME": "ipv4_protocol",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 21
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_hdrChecksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 11
- }
- ],
- "PHVNUMBER": 260
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 15
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_dstAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 262
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 62
- }
- ],
- "PHVNUMBER": 263
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -13800,10 +13412,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -13825,7 +13588,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -13833,6 +13692,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -13840,10 +13829,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -13855,40 +13844,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -13900,10 +13859,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -13915,7 +13874,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -13925,10 +13884,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -13943,7 +13902,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -13955,7 +13914,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -13965,10 +13924,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -13980,7 +13939,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -13990,10 +13949,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -14005,10 +13964,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -14020,10 +13979,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -14035,10 +13994,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -14050,10 +14009,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -14078,7 +14037,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -14090,120 +14049,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -14218,7 +14067,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -14234,53 +14083,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 6
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -14299,7 +14253,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -14316,7 +14270,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -14336,7 +14290,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -14351,7 +14305,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -14366,7 +14320,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -14381,7 +14335,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -14396,7 +14350,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -14406,7 +14360,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -14421,7 +14375,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -14446,7 +14400,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -14455,13 +14409,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -14476,7 +14430,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -14501,7 +14455,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -14516,7 +14470,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -14536,7 +14490,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -14546,7 +14500,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -14571,7 +14525,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -14586,7 +14540,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -14601,7 +14555,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -14611,7 +14565,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -14641,7 +14595,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -14651,7 +14605,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -14666,7 +14620,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -14676,7 +14630,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -14691,7 +14645,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -14701,7 +14655,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -14710,13 +14664,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -14724,426 +14708,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 7,
- "FIELDMSB": 23,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 14
- }
- ],
- "PHVNUMBER": 65
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 71
- }
- ],
- "PHVNUMBER": 67
- },
- {
- "PHVRECORD": [
- {
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "POV",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
- {
- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
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- {
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- },
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- },
- {
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- }
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- "PHVNUMBER": 259
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- {
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- "PHVNAME": "tcp_seqNo",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 77
- }
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- "PHVNUMBER": 323
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- ],
- "TOTALINGRESSPHVS": 32
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- },
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- },
- {
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- "PHVNAME": "ipv4_hdrChecksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
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- }
- ],
- "PHVNUMBER": 260
- },
- {
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- "PHVNAME": "ipv4_srcAddr",
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- "PHVLSB": 0,
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- }
- ],
- "PHVNUMBER": 261
- },
- {
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- "PHVNAME": "ipv4_dstAddr",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 262
- },
- {
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- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
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- "PHVNAME": "udp_length_",
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- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
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- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
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- }
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- {
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- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
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- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
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- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -15163,10 +14755,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -15188,7 +14931,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -15196,6 +15035,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -15203,10 +15172,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -15218,40 +15187,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -15263,10 +15202,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -15278,7 +15217,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -15288,10 +15227,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -15306,7 +15245,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -15318,7 +15257,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -15328,10 +15267,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -15343,7 +15282,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -15353,10 +15292,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -15368,10 +15307,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -15383,10 +15322,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -15398,10 +15337,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -15413,10 +15352,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -15441,7 +15380,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -15453,120 +15392,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -15581,7 +15410,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -15597,53 +15426,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 7
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -15662,7 +15596,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -15679,7 +15613,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -15699,7 +15633,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -15714,7 +15648,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -15729,7 +15663,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -15744,7 +15678,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -15759,7 +15693,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -15769,7 +15703,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -15784,7 +15718,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -15809,7 +15743,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -15818,13 +15752,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -15839,7 +15773,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -15864,7 +15798,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -15879,7 +15813,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -15899,7 +15833,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -15909,7 +15843,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -15934,7 +15868,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -15949,7 +15883,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -15964,7 +15898,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -15974,7 +15908,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -16004,7 +15938,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -16014,7 +15948,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -16029,7 +15963,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -16039,7 +15973,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -16054,7 +15988,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -16064,7 +15998,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -16073,13 +16007,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -16087,426 +16051,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 7,
- "FIELDMSB": 23,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 14
- }
- ],
- "PHVNUMBER": 65
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 71
- }
- ],
- "PHVNUMBER": 67
- },
- {
- "PHVRECORD": [
- {
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "POV",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
- {
- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
- "POSITIONOFFSET": 85
- },
- {
- "HEADER": "tcp",
- "POVBIT": 4,
- "HIDDEN": false,
- "POSITIONOFFSET": 86
- },
- {
- "HEADER": "udp",
- "POVBIT": 5,
- "HIDDEN": false,
- "POSITIONOFFSET": 87
- }
- ]
- }
- ],
- "PHVNUMBER": 68
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 7,
- "FIELDMSB": 2,
- "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 5,
- "POSITIONOFFSET": 52
- }
- ],
- "PHVNUMBER": 69
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 44
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 49
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 13
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 21,
- "FIELDMSB": 5,
- "PHVNAME": "tcp_ctrl",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 38
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_window",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 47
- }
- ],
- "PHVNUMBER": 258
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 36
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 69
- }
- ],
- "PHVNUMBER": 322
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 77
- }
- ],
- "PHVNUMBER": 323
- }
- ],
- "TOTALINGRESSPHVS": 32
- },
- {
- "PHVDIRECTION": 1,
- "EGRESSPHVS": [
- {
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- {
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- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_ttl",
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- "PHVLSB": 24,
- "POSITIONOFFSET": 50
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
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- "FIELDMSB": 7,
- "PHVNAME": "ipv4_protocol",
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- "PHVLSB": 16,
- "POSITIONOFFSET": 21
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_hdrChecksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 11
- }
- ],
- "PHVNUMBER": 260
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 15
- }
- ],
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- },
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- {
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- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_dstAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 262
- },
- {
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- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
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- "PHVNAME": "udp_length_",
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- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
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- "PHVNAME": "udp_checksum",
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- "PHVLSB": 0,
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- }
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- },
- {
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- {
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- "FIELDLSB": 0,
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- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
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- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -16526,10 +16098,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -16551,7 +16274,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -16559,6 +16378,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -16566,10 +16515,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -16581,40 +16530,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -16626,10 +16545,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -16641,7 +16560,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -16651,10 +16570,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -16669,7 +16588,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -16681,7 +16600,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -16691,10 +16610,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -16706,7 +16625,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -16716,10 +16635,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -16731,10 +16650,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -16746,10 +16665,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -16761,10 +16680,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -16776,10 +16695,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -16804,7 +16723,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -16816,120 +16735,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -16944,7 +16753,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -16960,53 +16769,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 8
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -17025,7 +16939,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -17042,7 +16956,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -17062,7 +16976,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -17077,7 +16991,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -17092,7 +17006,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -17107,7 +17021,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -17122,7 +17036,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -17132,7 +17046,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -17147,7 +17061,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -17172,7 +17086,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -17181,13 +17095,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -17202,7 +17116,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -17227,7 +17141,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -17242,7 +17156,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -17262,7 +17176,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -17272,7 +17186,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -17297,7 +17211,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -17312,7 +17226,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -17327,7 +17241,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -17337,7 +17251,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -17367,7 +17281,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -17377,7 +17291,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -17392,7 +17306,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -17402,7 +17316,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -17417,7 +17331,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -17427,7 +17341,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -17436,13 +17350,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -17450,426 +17394,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 7,
- "FIELDMSB": 23,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 14
- }
- ],
- "PHVNUMBER": 65
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 71
- }
- ],
- "PHVNUMBER": 67
- },
- {
- "PHVRECORD": [
- {
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "POV",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
- {
- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
- "POSITIONOFFSET": 85
- },
- {
- "HEADER": "tcp",
- "POVBIT": 4,
- "HIDDEN": false,
- "POSITIONOFFSET": 86
- },
- {
- "HEADER": "udp",
- "POVBIT": 5,
- "HIDDEN": false,
- "POSITIONOFFSET": 87
- }
- ]
- }
- ],
- "PHVNUMBER": 68
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 7,
- "FIELDMSB": 2,
- "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 5,
- "POSITIONOFFSET": 52
- }
- ],
- "PHVNUMBER": 69
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 44
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 49
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 13
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 21,
- "FIELDMSB": 5,
- "PHVNAME": "tcp_ctrl",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 38
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_window",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 47
- }
- ],
- "PHVNUMBER": 258
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 36
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 69
- }
- ],
- "PHVNUMBER": 322
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 77
- }
- ],
- "PHVNUMBER": 323
- }
- ],
- "TOTALINGRESSPHVS": 32
- },
- {
- "PHVDIRECTION": 1,
- "EGRESSPHVS": [
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_ttl",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 24,
- "POSITIONOFFSET": 50
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 23,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_protocol",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 21
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_hdrChecksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 11
- }
- ],
- "PHVNUMBER": 260
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 15
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_dstAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 262
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 62
- }
- ],
- "PHVNUMBER": 263
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -17889,10 +17441,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
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+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
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+ "PHVNUMBER": 68
+ },
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -17914,7 +17617,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
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+ },
+ {
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+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
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+ "PHVNUMBER": 322
+ },
+ {
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+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
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+ "PHVNUMBER": 323
+ }
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+ "EGRESSPHVS": [
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+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
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+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
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+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
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+ "FIELDLSB": 0,
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+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
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+ "POSITIONOFFSET": 9
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+ {
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+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
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}
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"PHVNUMBER": 265
@@ -17922,6 +17721,136 @@
{
"PHVRECORD": [
{
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+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
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+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
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+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
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+ "PHVNUMBER": 267
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+ {
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+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
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+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
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+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
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+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
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+ "PHVNUMBER": 269
+ },
+ {
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@@ -17929,10 +17858,10 @@
"PHVNAME": "ethernet_dstAddr",
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+ "POSITIONOFFSET": 19
}
],
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},
{
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@@ -17944,40 +17873,10 @@
"PHVNAME": "ethernet_srcAddr",
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"PHVLSB": 0,
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+ "POSITIONOFFSET": 63
}
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},
{
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@@ -17989,10 +17888,10 @@
"PHVNAME": "eg_intr_md_egress_port",
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}
],
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},
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@@ -18004,7 +17903,7 @@
"PHVNAME": "ipv4_version",
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},
{
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@@ -18014,10 +17913,10 @@
"PHVNAME": "ipv4_ihl",
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}
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},
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@@ -18032,7 +17931,7 @@
"POSITIONOFFSET": 4
}
],
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},
{
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@@ -18044,7 +17943,7 @@
"PHVNAME": "tcp_srcPort",
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+ "POSITIONOFFSET": 35
},
{
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@@ -18054,10 +17953,10 @@
"PHVNAME": "udp_srcPort",
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+ "POSITIONOFFSET": 56
}
],
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},
{
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@@ -18069,7 +17968,7 @@
"PHVNAME": "tcp_srcPort",
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},
{
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@@ -18079,10 +17978,10 @@
"PHVNAME": "udp_srcPort",
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}
],
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},
{
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@@ -18094,10 +17993,10 @@
"PHVNAME": "ethernet_dstAddr",
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+ "POSITIONOFFSET": 19
}
],
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},
{
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@@ -18109,10 +18008,10 @@
"PHVNAME": "ethernet_srcAddr",
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+ "POSITIONOFFSET": 63
}
],
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+ "PHVNUMBER": 301
},
{
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@@ -18124,10 +18023,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
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+ "POSITIONOFFSET": 54
}
],
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+ "PHVNUMBER": 332
},
{
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@@ -18139,10 +18038,10 @@
"PHVNAME": "ipv4_identification",
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"PHVLSB": 0,
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+ "POSITIONOFFSET": 43
}
],
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},
{
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@@ -18167,7 +18066,7 @@
"POSITIONOFFSET": 5
}
],
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+ "PHVNUMBER": 334
},
{
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@@ -18179,120 +18078,10 @@
"PHVNAME": "tcp_dstPort",
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- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
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- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
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- "PHVNAME": "tcp_seqNo",
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- "PHVNAME": "ethernet_etherType",
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- }
- ],
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+ "PHVNUMBER": 335
},
{
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@@ -18307,7 +18096,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -18323,53 +18112,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
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+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
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+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
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+ "POSITIONOFFSET": 78
}
]
}
],
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+ "PHVNUMBER": 81
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
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+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
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+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
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+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
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+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
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+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 9
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -18388,7 +18282,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -18405,7 +18299,7 @@
"PHVNAME": "ipv4_protocol",
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"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
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@@ -18425,7 +18319,7 @@
"PHVNAME": "ipv4_srcAddr",
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"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -18440,7 +18334,7 @@
"PHVNAME": "ipv4_dstAddr",
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"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -18455,7 +18349,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -18470,7 +18364,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -18485,7 +18379,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
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@@ -18495,7 +18389,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -18510,7 +18404,7 @@
"PHVNAME": "ecmp_metadata_groupId",
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"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -18535,7 +18429,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -18544,13 +18438,13 @@
"PHVRECORD": [
{
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- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
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"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -18565,7 +18459,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
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"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
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@@ -18590,7 +18484,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -18605,7 +18499,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
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@@ -18625,7 +18519,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -18635,7 +18529,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -18660,7 +18554,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -18675,7 +18569,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -18690,7 +18584,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -18700,7 +18594,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -18730,7 +18624,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -18740,7 +18634,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -18755,7 +18649,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -18765,7 +18659,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -18780,7 +18674,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -18790,7 +18684,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -18799,13 +18693,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -18813,426 +18737,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
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"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
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- "PHVMSB": 7,
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- "PHVNAME": "ipv4_srcAddr",
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- }
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- },
- {
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- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_dstAddr",
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- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
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- "PHVNAME": "ethernet_srcAddr",
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- }
- ],
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- },
- {
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- "PHVNAME": "POV",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
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- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
- "POSITIONOFFSET": 85
- },
- {
- "HEADER": "tcp",
- "POVBIT": 4,
- "HIDDEN": false,
- "POSITIONOFFSET": 86
- },
- {
- "HEADER": "udp",
- "POVBIT": 5,
- "HIDDEN": false,
- "POSITIONOFFSET": 87
- }
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- }
- ],
- "PHVNUMBER": 68
- },
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- "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
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- "PHVLSB": 5,
- "POSITIONOFFSET": 52
- }
- ],
- "PHVNUMBER": 69
- },
- {
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- "FIELDMSB": 3,
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- "PHVLSB": 28,
- "POSITIONOFFSET": 44
- },
- {
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- "PHVNAME": "tcp_res",
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- "POSITIONOFFSET": 49
- },
- {
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- "POSITIONOFFSET": 13
- },
- {
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- "FIELDMSB": 5,
- "PHVNAME": "tcp_ctrl",
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- "PHVLSB": 16,
- "POSITIONOFFSET": 38
- },
- {
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- "FIELDLSB": 0,
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- "FIELDMSB": 15,
- "PHVNAME": "tcp_window",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 47
- }
- ],
- "PHVNUMBER": 258
- },
- {
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- },
- {
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- "PHVNAME": "udp_checksum",
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- }
- ],
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- },
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- },
- {
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- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 259
- },
- {
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- "PHVMSB": 15,
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- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 77
- }
- ],
- "PHVNUMBER": 323
- }
- ],
- "TOTALINGRESSPHVS": 32
- },
- {
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- "EGRESSPHVS": [
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- "FIELDMSB": 7,
- "PHVNAME": "ipv4_ttl",
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- "POSITIONOFFSET": 50
- },
- {
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- "PHVNAME": "ipv4_protocol",
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- "PHVLSB": 16,
- "POSITIONOFFSET": 21
- },
- {
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- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_hdrChecksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 11
- }
- ],
- "PHVNUMBER": 260
- },
- {
- "PHVRECORD": [
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- "FIELDMSB": 31,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 15
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_dstAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 262
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 62
- }
- ],
- "PHVNUMBER": 263
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -19252,10 +18784,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -19277,7 +18960,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -19285,6 +19064,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
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+ "PHVNUMBER": 268
+ },
+ {
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+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
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+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
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+ {
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"FIELDLSB": 8,
"PHVMSB": 31,
@@ -19292,10 +19201,10 @@
"PHVNAME": "ethernet_dstAddr",
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}
],
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},
{
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@@ -19307,40 +19216,10 @@
"PHVNAME": "ethernet_srcAddr",
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},
{
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],
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},
{
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{
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@@ -19377,10 +19256,10 @@
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{
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{
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},
{
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@@ -19417,10 +19296,10 @@
"PHVNAME": "udp_srcPort",
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}
],
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},
{
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@@ -19432,7 +19311,7 @@
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{
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@@ -19442,10 +19321,10 @@
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}
],
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{
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@@ -19457,10 +19336,10 @@
"PHVNAME": "ethernet_dstAddr",
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}
],
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},
{
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@@ -19472,10 +19351,10 @@
"PHVNAME": "ethernet_srcAddr",
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}
],
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},
{
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@@ -19487,10 +19366,10 @@
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}
],
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{
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{
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@@ -19530,7 +19409,7 @@
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{
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@@ -19542,120 +19421,10 @@
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- "PHVNAME": "udp_dstPort",
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},
{
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@@ -19670,7 +19439,7 @@
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}
],
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},
{
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@@ -19686,53 +19455,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
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},
{
"HEADER": "packet_out_hdr",
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"HIDDEN": false,
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},
{
"HEADER": "ethernet",
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{
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{
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{
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}
]
}
],
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+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
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+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
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+ "FIELDLSB": 40,
+ "PHVMSB": 7,
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+ "PHVNAME": "ethernet_srcAddr",
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+ "PHVLSB": 0,
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+ }
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+ },
+ {
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+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
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+ },
+ {
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+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
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+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
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+ {
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+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
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+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
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+ },
+ {
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+ "FIELDLSB": 16,
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+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
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+ "PHVNAME": "udp_dstPort",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
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+ "PHVNUMBER": 336
+ },
+ {
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+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
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+ "PHVNUMBER": 337
}
],
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}
],
"Stage": 10
},
{
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- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
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@@ -19751,7 +19625,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -19768,7 +19642,7 @@
"PHVNAME": "ipv4_protocol",
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"PHVLSB": 24,
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},
{
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@@ -19788,7 +19662,7 @@
"PHVNAME": "ipv4_srcAddr",
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"PHVLSB": 0,
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+ "POSITIONOFFSET": 13
}
],
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@@ -19803,7 +19677,7 @@
"PHVNAME": "ipv4_dstAddr",
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"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
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@@ -19818,7 +19692,7 @@
"PHVNAME": "ethernet_dstAddr",
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"PHVLSB": 0,
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+ "POSITIONOFFSET": 22
}
],
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@@ -19833,7 +19707,7 @@
"PHVNAME": "ethernet_srcAddr",
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"PHVLSB": 0,
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}
],
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@@ -19848,7 +19722,7 @@
"PHVNAME": "udp_srcPort",
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"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
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@@ -19858,7 +19732,7 @@
"PHVNAME": "udp_dstPort",
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"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
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@@ -19873,7 +19747,7 @@
"PHVNAME": "ecmp_metadata_groupId",
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"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -19898,7 +19772,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
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"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -19907,13 +19781,13 @@
"PHVRECORD": [
{
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- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
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"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
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@@ -19928,7 +19802,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
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+ "POSITIONOFFSET": 32
},
{
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@@ -19953,7 +19827,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
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"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
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@@ -19968,7 +19842,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
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@@ -19988,7 +19862,7 @@
"PHVNAME": "ipv4_fragOffset",
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"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
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@@ -19998,7 +19872,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -20023,7 +19897,7 @@
"PHVNAME": "ipv4_totalLen",
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"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -20038,7 +19912,7 @@
"PHVNAME": "ipv4_srcAddr",
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"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
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@@ -20053,7 +19927,7 @@
"PHVNAME": "ethernet_dstAddr",
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"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
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@@ -20063,7 +19937,7 @@
"PHVNAME": "ethernet_srcAddr",
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"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -20093,7 +19967,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
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@@ -20103,7 +19977,7 @@
"PHVNAME": "ipv4_ihl",
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"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
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@@ -20118,7 +19992,7 @@
"PHVNAME": "tcp_srcPort",
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"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
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@@ -20128,7 +20002,7 @@
"PHVNAME": "udp_length_",
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"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
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@@ -20143,7 +20017,7 @@
"PHVNAME": "tcp_srcPort",
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- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
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@@ -20153,7 +20027,7 @@
"PHVNAME": "udp_length_",
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+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -20162,13 +20036,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
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"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
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"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -20176,426 +20080,34 @@
{
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{
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+ "FIELDWIDTH": 1,
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"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
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- "PHVLSB": 0,
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- {
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- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
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- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
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+ "PHVLSB": 22,
"POSITIONOFFSET": 12
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- {
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},
{
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@@ -20615,10 +20127,161 @@
"PHVNAME": "tcp_window",
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"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
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+ "PHVNUMBER": 257
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+ {
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+ {
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+ "PHVNAME": "ipv4_srcAddr",
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+ {
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+ "PHVNAME": "ethernet_dstAddr",
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+ "PHVNAME": "ethernet_srcAddr",
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+ "PHVNUMBER": 66
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+ {
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+ "PHVNAME": "POV",
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+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
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+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
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+ "HIDDEN": false,
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+ },
+ {
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+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
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+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
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+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
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+ "PHVNUMBER": 67
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+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
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+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
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+ "PHVNUMBER": 68
+ },
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+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
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@@ -20640,7 +20303,103 @@
"PHVNAME": "tcp_urgentPtr",
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- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
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+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
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+ "FIELDLSB": 0,
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+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
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+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
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+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
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+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
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+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
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+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
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+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -20648,6 +20407,136 @@
{
"PHVRECORD": [
{
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -20655,10 +20544,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
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- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -20670,40 +20559,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
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- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
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- "PHVLSB": 0,
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- }
- ],
- "PHVNUMBER": 144
- },
- {
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- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -20715,10 +20574,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
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+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -20730,7 +20589,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -20740,10 +20599,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -20758,7 +20617,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -20770,7 +20629,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -20780,10 +20639,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -20795,7 +20654,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -20805,10 +20664,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -20820,10 +20679,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -20835,10 +20694,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -20850,10 +20709,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -20865,10 +20724,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -20893,7 +20752,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -20905,120 +20764,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -21033,7 +20782,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -21049,45 +20798,150 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 11
@@ -21098,61 +20952,13 @@
"DIRECTION": 0,
"TABLETYPE": "SRAM",
"PHYSICALBUSES": [
- 14
- ],
- "TABLENAME": "ecmp_group_table",
- "ID": 32,
- "TableHandle": 16777222,
- "TCAMADDRSHIFT": 0,
- "Stage": 2
- },
- {
- "DIRECTION": 0,
- "TABLETYPE": "TCAM",
- "PHYSICALBUSES": [
- 0
- ],
- "TABLENAME": "table0",
- "ID": 16,
- "TableHandle": 16777221,
- "TCAMADDRSHIFT": 1,
- "Stage": 1
- },
- {
- "DIRECTION": 0,
- "TABLETYPE": "SRAM",
- "PHYSICALBUSES": [
- 1
- ],
- "TABLENAME": "ingress_pkt",
- "ID": 0,
- "TableHandle": 16777219,
- "TCAMADDRSHIFT": 0,
- "Stage": 0
- },
- {
- "DIRECTION": 1,
- "TABLETYPE": "SRAM",
- "PHYSICALBUSES": [
- 0
- ],
- "TABLENAME": "egress_pkt",
- "ID": 1,
- "TableHandle": 16777220,
- "TCAMADDRSHIFT": 0,
- "Stage": 0
- },
- {
- "DIRECTION": 0,
- "TABLETYPE": "SRAM",
- "PHYSICALBUSES": [
1
],
"TABLENAME": "ingress_port_count_table",
- "ID": 48,
+ "ID": 32,
"TableHandle": 16777217,
"TCAMADDRSHIFT": 0,
- "Stage": 3
+ "Stage": 2
},
{
"DIRECTION": 0,
@@ -21161,16 +20967,52 @@
0
],
"TABLENAME": "egress_port_count_table",
- "ID": 49,
+ "ID": 33,
"TableHandle": 16777218,
"TCAMADDRSHIFT": 0,
- "Stage": 3
+ "Stage": 2
+ },
+ {
+ "DIRECTION": 0,
+ "TABLETYPE": "SRAM",
+ "PHYSICALBUSES": [
+ 14
+ ],
+ "TABLENAME": "ecmp_group_table",
+ "ID": 16,
+ "TableHandle": 16777221,
+ "TCAMADDRSHIFT": 0,
+ "Stage": 1
+ },
+ {
+ "DIRECTION": 0,
+ "TABLETYPE": "TCAM",
+ "PHYSICALBUSES": [
+ 0
+ ],
+ "TABLENAME": "table0",
+ "ID": 0,
+ "TableHandle": 16777220,
+ "TCAMADDRSHIFT": 1,
+ "Stage": 0
+ },
+ {
+ "DIRECTION": 0,
+ "TABLETYPE": "SRAM",
+ "PHYSICALBUSES": [
+ 1
+ ],
+ "TABLENAME": "process_packet_out_table",
+ "ID": 1,
+ "TableHandle": 16777219,
+ "TCAMADDRSHIFT": 0,
+ "Stage": 0
}
]
},
"AlpmFormat": [],
"DefaultEntryFormat": {
- "TotalTables": 6,
+ "TotalTables": 5,
"DefaultEntries": [
{
"TotalActionFields": 0,
@@ -21190,7 +21032,7 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 49,
+ "next_tbl": 33,
"act_name": "reset_default_action"
}
},
@@ -21208,7 +21050,7 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 49,
+ "next_tbl": 33,
"act_name": "count_ingress"
}
}
@@ -21225,7 +21067,7 @@
"SelectorCount": 0,
"TableHandle": 16777217,
"LogicalId": 0,
- "Stage": 3
+ "Stage": 2
},
{
"TotalActionFields": 0,
@@ -21280,7 +21122,7 @@
"SelectorCount": 0,
"TableHandle": 16777218,
"LogicalId": 1,
- "Stage": 3
+ "Stage": 2
},
{
"TotalActionFields": 0,
@@ -21300,14 +21142,14 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 16,
+ "next_tbl": 32,
"act_name": "reset_default_action"
}
},
{
"ActionHandle": 536870919,
"ActionFunction": {
- "instr": 65,
+ "instr": 69,
"OVERRIDE_STAT_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR_PFE": false,
"OVERRIDE_STAT_ADDR_PFE": false,
@@ -21318,8 +21160,8 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 16,
- "act_name": "_packet_out"
+ "next_tbl": 32,
+ "act_name": "_process_packet_out"
}
}
],
@@ -21334,61 +21176,6 @@
"TotalActionHandles": 2,
"SelectorCount": 0,
"TableHandle": 16777219,
- "LogicalId": 0,
- "Stage": 0
- },
- {
- "TotalActionFields": 0,
- "Actions": [
- {
- "ActionHandle": 0,
- "ActionFunction": {
- "instr": 0,
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "OVERRIDE_STAT_ADDR": false,
- "tbl_name": "None",
- "OVERRIDE_STATEFUL_ADDR": false,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "tbl_mask": 0,
- "OVERRIDE_METER_ADDR": false,
- "next_tbl": 255,
- "act_name": "reset_default_action"
- }
- },
- {
- "ActionHandle": 536870922,
- "ActionFunction": {
- "instr": 65,
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "OVERRIDE_STAT_ADDR": false,
- "OVERRIDE_STATEFUL_ADDR": false,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "tbl_mask": 0,
- "OVERRIDE_METER_ADDR": false,
- "next_tbl": 255,
- "act_name": "add_packet_in_hdr"
- }
- }
- ],
- "Immediate": [
- {
- "ActionHandle": 0
- },
- {
- "ActionHandle": 536870922
- }
- ],
- "TotalActionHandles": 2,
- "SelectorCount": 0,
- "TableHandle": 16777220,
"LogicalId": 1,
"Stage": 0
},
@@ -21396,26 +21183,7 @@
"TotalActionFields": 0,
"Actions": [
{
- "ActionHandle": 0,
- "ActionFunction": {
- "instr": 0,
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "OVERRIDE_STAT_ADDR": false,
- "tbl_name": "None",
- "OVERRIDE_STATEFUL_ADDR": false,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "tbl_mask": 1,
- "OVERRIDE_METER_ADDR": false,
- "next_tbl": 48,
- "act_name": "reset_default_action"
- }
- },
- {
- "ActionHandle": 536870929,
+ "ActionHandle": 536870928,
"ActionFunction": {
"instr": 67,
"OVERRIDE_STAT_FULL_ADDR": 0,
@@ -21428,30 +21196,12 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 1,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 48,
+ "next_tbl": 32,
"act_name": "send_to_cpu"
}
},
{
- "ActionHandle": 536870931,
- "ActionFunction": {
- "instr": 68,
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "OVERRIDE_STAT_ADDR": false,
- "OVERRIDE_STATEFUL_ADDR": false,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "tbl_mask": 1,
- "OVERRIDE_METER_ADDR": false,
- "next_tbl": 48,
- "act_name": "_drop"
- }
- },
- {
- "ActionHandle": 536870924,
+ "ActionHandle": 536870921,
"ActionFunction": {
"instr": 65,
"OVERRIDE_STAT_FULL_ADDR": 0,
@@ -21464,12 +21214,30 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 1,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 48,
+ "next_tbl": 32,
"act_name": "set_egress_port"
}
},
{
- "ActionHandle": 536870927,
+ "ActionHandle": 536870930,
+ "ActionFunction": {
+ "instr": 68,
+ "OVERRIDE_STAT_FULL_ADDR": 0,
+ "OVERRIDE_METER_ADDR_PFE": false,
+ "OVERRIDE_STAT_ADDR_PFE": false,
+ "OVERRIDE_STATEFUL_ADDR_PFE": false,
+ "OVERRIDE_METER_FULL_ADDR": 0,
+ "OVERRIDE_STAT_ADDR": false,
+ "OVERRIDE_STATEFUL_ADDR": false,
+ "OVERRIDE_STATEFUL_FULL_ADDR": 0,
+ "tbl_mask": 1,
+ "OVERRIDE_METER_ADDR": false,
+ "next_tbl": 32,
+ "act_name": "_drop"
+ }
+ },
+ {
+ "ActionHandle": 536870924,
"ActionFunction": {
"instr": 66,
"OVERRIDE_STAT_FULL_ADDR": 0,
@@ -21482,33 +21250,52 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 1,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 32,
+ "next_tbl": 16,
"act_name": "ecmp_group"
}
+ },
+ {
+ "ActionHandle": 0,
+ "ActionFunction": {
+ "instr": 0,
+ "OVERRIDE_STAT_FULL_ADDR": 0,
+ "OVERRIDE_METER_ADDR_PFE": false,
+ "OVERRIDE_STAT_ADDR_PFE": false,
+ "OVERRIDE_STATEFUL_ADDR_PFE": false,
+ "OVERRIDE_METER_FULL_ADDR": 0,
+ "OVERRIDE_STAT_ADDR": false,
+ "tbl_name": "None",
+ "OVERRIDE_STATEFUL_ADDR": false,
+ "OVERRIDE_STATEFUL_FULL_ADDR": 0,
+ "tbl_mask": 1,
+ "OVERRIDE_METER_ADDR": false,
+ "next_tbl": 32,
+ "act_name": "reset_default_action"
+ }
}
],
"Immediate": [
{
- "ActionHandle": 0
+ "ActionHandle": 536870928
},
{
- "ActionHandle": 536870929
+ "ActionHandle": 536870921
},
{
- "ActionHandle": 536870931
+ "ActionHandle": 536870930
},
{
"ActionHandle": 536870924
},
{
- "ActionHandle": 536870927
+ "ActionHandle": 0
}
],
"TotalActionHandles": 5,
"SelectorCount": 0,
- "TableHandle": 16777221,
+ "TableHandle": 16777220,
"LogicalId": 0,
- "Stage": 1
+ "Stage": 0
},
{
"TotalActionFields": 1,
@@ -21528,12 +21315,12 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 48,
+ "next_tbl": 32,
"act_name": "reset_default_action"
}
},
{
- "ActionHandle": 536870933,
+ "ActionHandle": 536870932,
"ActionFunction": {
"instr": 65,
"OVERRIDE_STAT_FULL_ADDR": 0,
@@ -21546,7 +21333,7 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 48,
+ "next_tbl": 32,
"act_name": "set_egress_port"
}
}
@@ -21556,7 +21343,7 @@
"ActionHandle": 0
},
{
- "ActionHandle": 536870933,
+ "ActionHandle": 536870932,
"ActionFunctionFields": [
{
"DSTSTART": 0,
@@ -21573,9 +21360,9 @@
],
"TotalActionHandles": 2,
"SelectorCount": 0,
- "TableHandle": 16777222,
+ "TableHandle": 16777221,
"LogicalId": 0,
- "Stage": 2
+ "Stage": 1
}
]
}
@@ -21593,7 +21380,8 @@
"6": "default_parser",
"7": "parse_pkt_out",
"8": "<POV initialization>_<Ingress intrinsic metadata>_<Phase 0>",
- "9": "start"
+ "9": "start",
+ "10": "parse_tcp//spilled"
},
"parser_value_set": []
},
@@ -21607,7 +21395,7 @@
"4": "parse_udp",
"5": "default_parser",
"6": "parse_pkt_out",
- "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"8": "parse_pkt_in"
},
"parser_value_set": []
@@ -21623,7 +21411,7 @@
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "match_with_no_key",
"number_entries": 1,
"pack_format_length": 1,
@@ -21646,7 +21434,7 @@
"stage_table_type_handle": 0,
"stage_idletime_table": null,
"stage_gateway_table": {
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "gateway",
"number_entries": 0,
"pack_format_length": 0,
@@ -21759,12 +21547,12 @@
"536870914": {
"next_table_address_to_use": 0,
"action_name": "count_ingress",
- "next_table_full_address": 49,
+ "next_table_full_address": 33,
"next_table_name": "egress_port_count_table"
}
},
"default_next_table_modifiable": false,
- "default_next_table": 49,
+ "default_next_table": 33,
"action_to_immediate_mapping": {
"536870914": [
[]
@@ -21882,7 +21670,7 @@
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "match_with_no_key",
"number_entries": 1,
"pack_format_length": 1,
@@ -21905,7 +21693,7 @@
"stage_table_type_handle": 1,
"stage_idletime_table": null,
"stage_gateway_table": {
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "gateway",
"number_entries": 0,
"pack_format_length": 0,
@@ -22116,7 +21904,7 @@
"ap_bind_indirect_res_to_match": []
},
{
- "name": "ingress_pkt",
+ "name": "process_packet_out_table",
"handle": 16777219,
"direction": "ingress",
"number_entries": 1024,
@@ -22142,7 +21930,7 @@
}
],
"memory_resource_allocation": null,
- "stage_table_handle": 0,
+ "stage_table_handle": 1,
"stage_table_type_handle": 0,
"stage_idletime_table": null,
"stage_gateway_table": {
@@ -22173,10 +21961,8 @@
16
]
],
- "match_group_key_bit_width": 8,
- "match_group_phv_bit_scrambling": {
- "--validity_check--packet_out_hdr[0]": 9
- },
+ "match_group_key_bit_width": 0,
+ "match_group_phv_bit_scrambling": {},
"match_group_match_bit_scrambling": {},
"seed": [
0,
@@ -22235,14 +22021,14 @@
"hash_match_group_id_for_hash_bits": 0,
"hash_match_group_id_for_data_bits": 0
},
- "use_condition_from_program": true
+ "use_condition_from_program": false
},
"match_group_resource_allocation": [],
"vliw_resource_allocation": {
"536870919": {
- "address_to_use": 1,
- "full_address": 65,
- "vliw_instruction_number": 0,
+ "address_to_use": 0,
+ "full_address": 69,
+ "vliw_instruction_number": 2,
"color": 1,
"direction": "ingress"
}
@@ -22250,13 +22036,13 @@
"action_to_next_table_mapping": {
"536870919": {
"next_table_address_to_use": 0,
- "action_name": "_packet_out",
- "next_table_full_address": 16,
- "next_table_name": "_condition_1"
+ "action_name": "_process_packet_out",
+ "next_table_full_address": 32,
+ "next_table_name": "_condition_2"
}
},
"default_next_table_modifiable": false,
- "default_next_table": 16,
+ "default_next_table": 32,
"action_to_immediate_mapping": {
"536870919": [
[]
@@ -22267,19 +22053,11 @@
],
"match_key_fields": [],
"match_fields_type_dictionary": {},
- "gateway_fields": [
- {
- "name": "--validity_check--packet_out_hdr",
- "start_offset": 0,
- "start_bit": 0,
- "bit_width": 1,
- "range_field": false
- }
- ],
+ "gateway_fields": [],
"preferred_match_type": "exact",
"actions": [
{
- "name": "_packet_out",
+ "name": "_process_packet_out",
"handle": 536870919,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
@@ -22325,14 +22103,14 @@
"phv_word_address": 130
},
{
- "phv_word_address": 68
+ "phv_word_address": 67
}
],
"indirect_resources": []
}
],
"default_action": {
- "name": "_packet_out",
+ "name": "_process_packet_out",
"handle": 536870919,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
@@ -22378,294 +22156,7 @@
"phv_word_address": 130
},
{
- "phv_word_address": 68
- }
- ]
- },
- "default_action_parameters": {},
- "default_only_action": null,
- "p4_action_data_tables": [],
- "p4_statistics_tables": [],
- "p4_meter_tables": [],
- "p4_stateful_tables": [],
- "p4_selection_tables": [],
- "include_idletime": false,
- "performs_hash_action": false,
- "uses_range": false,
- "number_entries_with_ranges": 0,
- "uses_versioning": true,
- "tcam_error_detect": false,
- "dynamic_match_key_masks": false,
- "uses_static_entries": false,
- "match_type": "exact",
- "action_profile": null,
- "timeout": false,
- "ap_bind_indirect_res_to_match": []
- },
- {
- "name": "egress_pkt",
- "handle": 16777220,
- "direction": "egress",
- "number_entries": 1024,
- "stage_tables_length": 1,
- "stage_tables": [
- {
- "stage_number": 0,
- "stage_table_type": "match_with_no_key",
- "number_entries": 1,
- "pack_format_length": 1,
- "pack_format": [
- {
- "table_word_width": 0,
- "memory_word_width": 0,
- "entries_per_table_word": 1,
- "number_memory_units_per_table_word": 0,
- "entry_list": [
- {
- "entry_number": 0,
- "field_list": []
- }
- ]
- }
- ],
- "memory_resource_allocation": null,
- "stage_table_handle": 1,
- "stage_table_type_handle": 1,
- "stage_idletime_table": null,
- "stage_gateway_table": {
- "stage_number": 0,
- "stage_table_type": "gateway",
- "number_entries": 0,
- "pack_format_length": 0,
- "pack_format": [],
- "memory_resource_allocation": {
- "memory_type": "gateway",
- "memory_units_depth": 1,
- "memory_units_width": 1,
- "memory_units_and_vpns": [
- {
- "memory_units": [
- 15
- ],
- "vpns": [
- null
- ]
- }
- ]
- },
- "gateway_match_group_resource_allocation": {
- "match_groups": [
- [
- 0,
- 16
- ]
- ],
- "match_group_key_bit_width": 8,
- "match_group_phv_bit_scrambling": {
- "ig_intr_md_for_tm.copy_to_cpu[0]": 0
- },
- "match_group_match_bit_scrambling": {},
- "seed": [
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0
- ],
- "hash_match_group_id_for_hash_bits": 0,
- "hash_match_group_id_for_data_bits": 0
- },
- "use_condition_from_program": true
- },
- "match_group_resource_allocation": [],
- "vliw_resource_allocation": {
- "536870922": {
- "address_to_use": 1,
- "full_address": 65,
- "vliw_instruction_number": 0,
- "color": 1,
- "direction": "egress"
- }
- },
- "action_to_next_table_mapping": {
- "536870922": {
- "next_table_address_to_use": 0,
- "action_name": "add_packet_in_hdr",
- "next_table_full_address": 255,
- "next_table_name": "--END_OF_PIPELINE--"
- }
- },
- "default_next_table_modifiable": false,
- "default_next_table": 255,
- "action_to_immediate_mapping": {
- "536870922": [
- []
- ]
- },
- "stage_table_type_handle_type": "exact"
- }
- ],
- "match_key_fields": [],
- "match_fields_type_dictionary": {},
- "gateway_fields": [
- {
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "start_offset": 35,
- "start_bit": 0,
- "bit_width": 1,
- "range_field": false
- }
- ],
- "preferred_match_type": "exact",
- "actions": [
- {
- "name": "add_packet_in_hdr",
- "handle": 536870922,
- "allowed_to_be_default_action": true,
- "disallowed_as_default_action_reason": null,
- "override_stat_addr_pfe": false,
- "override_stat_addr": false,
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "override_meter_addr": false,
- "override_meter_full_addr": 0,
- "override_stateful_addr_pfe": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "p4_parameters": [],
- "p4_primitives": [
- {
- "handle": 536870920,
- "header_instance": "packet_in_hdr"
- },
- {
- "handle": 536870921,
- "destination_field": {
- "name": "packet_in_hdr.ingress_port",
- "start_offset": 0,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "source_value": {
- "name": "ig_intr_md.ingress_port",
- "start_offset": 7,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "mask": {
- "value": 511,
- "signed": false
- }
- }
- ],
- "stage_primitives": [
- {
- "phv_word_address": 82
- },
- {
- "phv_word_address": 145
- }
- ],
- "indirect_resources": []
- }
- ],
- "default_action": {
- "name": "add_packet_in_hdr",
- "handle": 536870922,
- "allowed_to_be_default_action": true,
- "disallowed_as_default_action_reason": null,
- "override_stat_addr_pfe": false,
- "override_stat_addr": false,
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "override_meter_addr": false,
- "override_meter_full_addr": 0,
- "override_stateful_addr_pfe": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "p4_parameters": [],
- "p4_primitives": [
- {
- "handle": 536870920,
- "header_instance": "packet_in_hdr"
- },
- {
- "handle": 536870921,
- "destination_field": {
- "name": "packet_in_hdr.ingress_port",
- "start_offset": 0,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "source_value": {
- "name": "ig_intr_md.ingress_port",
- "start_offset": 7,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "mask": {
- "value": 511,
- "signed": false
- }
- }
- ],
- "stage_primitives": [
- {
- "phv_word_address": 82
- },
- {
- "phv_word_address": 145
+ "phv_word_address": 67
}
]
},
@@ -22691,13 +22182,13 @@
},
{
"name": "table0__action__",
- "handle": 33554437,
+ "handle": 33554436,
"direction": "ingress",
"number_entries": 512,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "action_data",
"number_entries": 8192,
"pack_format_length": 4,
@@ -22979,7 +22470,14 @@
"name": "--padding--",
"start_offset": 0,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 7,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -22991,7 +22489,14 @@
"name": "--padding--",
"start_offset": 16,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 23,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -23003,7 +22508,14 @@
"name": "--padding--",
"start_offset": 32,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 39,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -23015,7 +22527,14 @@
"name": "--padding--",
"start_offset": 48,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 55,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -23027,7 +22546,14 @@
"name": "--padding--",
"start_offset": 64,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 71,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -23039,7 +22565,14 @@
"name": "--padding--",
"start_offset": 80,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 87,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -23051,7 +22584,14 @@
"name": "--padding--",
"start_offset": 96,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 103,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -23063,7 +22603,14 @@
"name": "--padding--",
"start_offset": 112,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 119,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -23194,10 +22741,10 @@
"how_referenced": "direct",
"default_lower_huffman_bits_included": 2,
"action_pack_format_map": {
- "536870924": 0,
- "536870927": 1,
- "536870929": 2,
- "536870931": 3
+ "536870921": 0,
+ "536870924": 1,
+ "536870928": 2,
+ "536870930": 3
},
"action_parameter_map": {
"1": [
@@ -23253,7 +22800,7 @@
]
},
"stage_action_parameter_map": {
- "5": [
+ "3": [
{
"parameter_name": "port",
"location": "action_table",
@@ -23270,7 +22817,7 @@
"field_most_significant_bit": 8
}
],
- "6": [
+ "4": [
{
"parameter_name": "groupId",
"location": "action_table",
@@ -23287,7 +22834,24 @@
"field_most_significant_bit": 15
}
],
- "7": [
+ "6": [
+ {
+ "parameter_name": "--constant-0--",
+ "location": "action_table",
+ "parameter_least_significant_bit": 0,
+ "parameter_most_significant_bit": 8,
+ "entry_least_significant_bit": 0,
+ "entry_most_significant_bit": 8,
+ "action_slot_offset": 0,
+ "ram_entry_slot_bit_width": 16,
+ "right_shift_adjust_for_smaller_allocation": 0,
+ "constant_size": 16,
+ "constant_slot_number": 0,
+ "field_least_significant_bit": 0,
+ "field_most_significant_bit": 8
+ }
+ ],
+ "5": [
{
"parameter_name": "--hash_parameter_3--",
"location": "match_entry",
@@ -23306,17 +22870,29 @@
]
},
"action_to_constant_mapping": {
+ "536870921": [],
"536870924": [],
- "536870927": [],
- "536870929": [],
- "536870931": []
+ "536870928": [
+ {
+ "name": "--constant-0--",
+ "constant_least_significant_bit": 0,
+ "constant_most_significant_bit": 8,
+ "immediate_field_least_significant_bit": 0,
+ "immediate_field_most_significant_bit": 8,
+ "location": "action_table",
+ "type": "constant",
+ "value": 320,
+ "constant_field_called": "--constant-0--"
+ }
+ ],
+ "536870930": []
}
}
],
"actions": [
{
"name": "set_egress_port",
- "handle": 536870924,
+ "handle": 536870921,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -23342,7 +22918,7 @@
],
"p4_primitives": [
{
- "handle": 536870923,
+ "handle": 536870920,
"destination_field": {
"name": "ig_intr_md_for_tm.ucast_egress_port",
"start_offset": 7,
@@ -23374,7 +22950,7 @@
},
{
"name": "ecmp_group",
- "handle": 536870927,
+ "handle": 536870924,
"allowed_to_be_default_action": false,
"disallowed_as_default_action_reason": "USES_HASH_DIST",
"override_stat_addr_pfe": false,
@@ -23400,7 +22976,7 @@
],
"p4_primitives": [
{
- "handle": 536870925,
+ "handle": 536870922,
"destination_field": {
"name": "ecmp_metadata.groupId",
"start_offset": 0,
@@ -23424,7 +23000,7 @@
}
},
{
- "handle": 536870926,
+ "handle": 536870923,
"destination_field": {
"name": "ecmp_metadata.selector",
"start_offset": 16,
@@ -23458,7 +23034,7 @@
},
{
"name": "send_to_cpu",
- "handle": 536870929,
+ "handle": 536870928,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -23473,33 +23049,64 @@
"p4_parameters": [],
"p4_primitives": [
{
- "handle": 536870928,
+ "handle": 536870925,
"destination_field": {
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "start_offset": 35,
+ "name": "ig_intr_md_for_tm.ucast_egress_port",
+ "start_offset": 7,
"start_bit": 0,
- "bit_width": 1,
+ "bit_width": 9,
"range_field": false
},
"source_value": {
- "value": 1,
+ "value": 320,
"signed": false
},
"mask": {
- "value": 1,
+ "value": 511,
+ "signed": false
+ }
+ },
+ {
+ "handle": 536870926,
+ "header_instance": "packet_in_hdr"
+ },
+ {
+ "handle": 536870927,
+ "destination_field": {
+ "name": "packet_in_hdr.ingress_port",
+ "start_offset": 0,
+ "start_bit": 0,
+ "bit_width": 9,
+ "range_field": false
+ },
+ "source_value": {
+ "name": "ig_intr_md.ingress_port",
+ "start_offset": 7,
+ "start_bit": 0,
+ "bit_width": 9,
+ "range_field": false
+ },
+ "mask": {
+ "value": 511,
"signed": false
}
}
],
"stage_primitives": [
{
- "phv_word_address": 64
+ "phv_word_address": 130
+ },
+ {
+ "phv_word_address": 67
+ },
+ {
+ "phv_word_address": 129
}
]
},
{
"name": "_drop",
- "handle": 536870931,
+ "handle": 536870930,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -23514,13 +23121,13 @@
"p4_parameters": [],
"p4_primitives": [
{
- "handle": 536870930,
+ "handle": 536870929,
"table_direction": "ingress"
}
],
"stage_primitives": [
{
- "phv_word_address": 69
+ "phv_word_address": 68
}
]
}
@@ -23535,13 +23142,13 @@
},
{
"name": "table0",
- "handle": 16777221,
+ "handle": 16777220,
"direction": "ingress",
"number_entries": 512,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_match",
"number_entries": 512,
"pack_format_length": 0,
@@ -23734,7 +23341,7 @@
"stage_table_handle": 0,
"stage_table_type_handle": 0,
"stage_idletime_table": {
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "idletime",
"number_entries": 2048,
"pack_format_length": 1,
@@ -23815,7 +23422,7 @@
"idletime_per_flow_idletime": true
},
"stage_gateway_table": {
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "gateway",
"number_entries": 0,
"pack_format_length": 0,
@@ -24180,28 +23787,28 @@
}
],
"vliw_resource_allocation": {
- "536870924": {
+ "536870921": {
"address_to_use": 9,
"full_address": 65,
"vliw_instruction_number": 0,
"color": 1,
"direction": "ingress"
},
- "536870927": {
+ "536870924": {
"address_to_use": 10,
"full_address": 66,
"vliw_instruction_number": 1,
"color": 0,
"direction": "ingress"
},
- "536870929": {
+ "536870928": {
"address_to_use": 11,
"full_address": 67,
"vliw_instruction_number": 1,
"color": 1,
"direction": "ingress"
},
- "536870931": {
+ "536870930": {
"address_to_use": 12,
"full_address": 68,
"vliw_instruction_number": 2,
@@ -24210,48 +23817,48 @@
}
},
"action_to_next_table_mapping": {
- "536870924": {
+ "536870921": {
"next_table_address_to_use": 0,
"action_name": "set_egress_port",
- "next_table_full_address": 48,
+ "next_table_full_address": 32,
"next_table_name": "_condition_2"
},
- "536870927": {
+ "536870924": {
"next_table_address_to_use": 1,
"action_name": "ecmp_group",
- "next_table_full_address": 32,
+ "next_table_full_address": 16,
"next_table_name": "ecmp_group_table"
},
- "536870929": {
+ "536870928": {
"next_table_address_to_use": 0,
"action_name": "send_to_cpu",
- "next_table_full_address": 48,
+ "next_table_full_address": 32,
"next_table_name": "_condition_2"
},
- "536870931": {
+ "536870930": {
"next_table_address_to_use": 0,
"action_name": "_drop",
- "next_table_full_address": 48,
+ "next_table_full_address": 32,
"next_table_name": "_condition_2"
}
},
- "default_next_table": 48,
+ "default_next_table": 32,
"action_to_immediate_mapping": {
+ "536870921": [
+ []
+ ],
"536870924": [
[]
],
- "536870927": [
+ "536870928": [
[]
],
- "536870929": [
- []
- ],
- "536870931": [
+ "536870930": [
[]
]
},
"ternary_indirection_table": {
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_indirection",
"number_entries": 16384,
"pack_format_length": 1,
@@ -24748,7 +24355,7 @@
"actions": [
{
"name": "set_egress_port",
- "handle": 536870924,
+ "handle": 536870921,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -24774,7 +24381,7 @@
],
"p4_primitives": [
{
- "handle": 536870923,
+ "handle": 536870920,
"destination_field": {
"name": "ig_intr_md_for_tm.ucast_egress_port",
"start_offset": 7,
@@ -24807,7 +24414,7 @@
},
{
"name": "ecmp_group",
- "handle": 536870927,
+ "handle": 536870924,
"allowed_to_be_default_action": false,
"disallowed_as_default_action_reason": "USES_HASH_DIST",
"override_stat_addr_pfe": false,
@@ -24833,7 +24440,7 @@
],
"p4_primitives": [
{
- "handle": 536870925,
+ "handle": 536870922,
"destination_field": {
"name": "ecmp_metadata.groupId",
"start_offset": 0,
@@ -24857,7 +24464,7 @@
}
},
{
- "handle": 536870926,
+ "handle": 536870923,
"destination_field": {
"name": "ecmp_metadata.selector",
"start_offset": 16,
@@ -24892,7 +24499,7 @@
},
{
"name": "send_to_cpu",
- "handle": 536870929,
+ "handle": 536870928,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -24907,34 +24514,65 @@
"p4_parameters": [],
"p4_primitives": [
{
- "handle": 536870928,
+ "handle": 536870925,
"destination_field": {
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "start_offset": 35,
+ "name": "ig_intr_md_for_tm.ucast_egress_port",
+ "start_offset": 7,
"start_bit": 0,
- "bit_width": 1,
+ "bit_width": 9,
"range_field": false
},
"source_value": {
- "value": 1,
+ "value": 320,
"signed": false
},
"mask": {
- "value": 1,
+ "value": 511,
+ "signed": false
+ }
+ },
+ {
+ "handle": 536870926,
+ "header_instance": "packet_in_hdr"
+ },
+ {
+ "handle": 536870927,
+ "destination_field": {
+ "name": "packet_in_hdr.ingress_port",
+ "start_offset": 0,
+ "start_bit": 0,
+ "bit_width": 9,
+ "range_field": false
+ },
+ "source_value": {
+ "name": "ig_intr_md.ingress_port",
+ "start_offset": 7,
+ "start_bit": 0,
+ "bit_width": 9,
+ "range_field": false
+ },
+ "mask": {
+ "value": 511,
"signed": false
}
}
],
"stage_primitives": [
{
- "phv_word_address": 64
+ "phv_word_address": 130
+ },
+ {
+ "phv_word_address": 67
+ },
+ {
+ "phv_word_address": 129
}
],
"indirect_resources": []
},
{
"name": "_drop",
- "handle": 536870931,
+ "handle": 536870930,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -24949,13 +24587,13 @@
"p4_parameters": [],
"p4_primitives": [
{
- "handle": 536870930,
+ "handle": 536870929,
"table_direction": "ingress"
}
],
"stage_primitives": [
{
- "phv_word_address": 69
+ "phv_word_address": 68
}
],
"indirect_resources": []
@@ -24967,7 +24605,7 @@
"p4_action_data_tables": [
{
"name": "table0__action__",
- "handle_reference": 33554437,
+ "handle_reference": 33554436,
"how_referenced": "direct"
}
],
@@ -24996,13 +24634,13 @@
},
{
"name": "ecmp_group_table",
- "handle": 16777222,
+ "handle": 16777221,
"direction": "ingress",
"number_entries": 1024,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_match",
"number_entries": 3072,
"pack_format_length": 1,
@@ -25197,7 +24835,7 @@
}
],
"vliw_resource_allocation": {
- "536870933": {
+ "536870932": {
"address_to_use": 0,
"full_address": 65,
"vliw_instruction_number": 0,
@@ -25206,17 +24844,17 @@
}
},
"action_to_next_table_mapping": {
- "536870933": {
+ "536870932": {
"next_table_address_to_use": 0,
"action_name": "set_egress_port",
- "next_table_full_address": 48,
+ "next_table_full_address": 32,
"next_table_name": "_condition_2"
}
},
"default_next_table_modifiable": false,
- "default_next_table": 48,
+ "default_next_table": 32,
"action_to_immediate_mapping": {
- "536870933": [
+ "536870932": [
[
{
"name": "port",
@@ -25236,7 +24874,7 @@
"number_hash_ways": 3,
"way_stage_tables": [
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_way",
"number_entries": 1024,
"pack_format_length": 1,
@@ -25320,7 +24958,7 @@
"stash_resource_allocation": null
},
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_way",
"number_entries": 1024,
"pack_format_length": 1,
@@ -25404,7 +25042,7 @@
"stash_resource_allocation": null
},
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_way",
"number_entries": 1024,
"pack_format_length": 1,
@@ -25941,7 +25579,7 @@
"actions": [
{
"name": "set_egress_port",
- "handle": 536870933,
+ "handle": 536870932,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -25967,7 +25605,7 @@
],
"p4_primitives": [
{
- "handle": 536870932,
+ "handle": 536870931,
"destination_field": {
"name": "ig_intr_md_for_tm.ucast_egress_port",
"start_offset": 7,
@@ -26030,11 +25668,11 @@
"name": "ingress_port_counter",
"handle": 67108865,
"direction": "ingress",
- "number_entries": 254,
+ "number_entries": 510,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "statistics",
"number_entries": 4096,
"pack_format_length": 1,
@@ -26138,11 +25776,11 @@
"name": "egress_port_counter",
"handle": 67108866,
"direction": "ingress",
- "number_entries": 254,
+ "number_entries": 510,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "statistics",
"number_entries": 4096,
"pack_format_length": 1,
@@ -26250,7 +25888,7 @@
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "statistics",
"number_entries": 4096,
"pack_format_length": 1,
@@ -26358,7 +25996,7 @@
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "statistics",
"number_entries": 4096,
"pack_format_length": 1,
@@ -26469,7 +26107,6 @@
"ipv4_flags": 1,
"ig_intr_md_ingress_port": 2,
"ipv4_hdrChecksum": 2,
- "ig_intr_md_for_tm_copy_to_cpu": 1,
"tcp_ecn": 1,
"ipv4_srcAddr": 4,
"udp_length_": 2,
@@ -26509,9 +26146,7 @@
"ipv4_fragOffset": 2,
"eg_intr_md_egress_cos": 1,
"ipv4_flags": 1,
- "ig_intr_md_ingress_port": 2,
"ipv4_hdrChecksum": 2,
- "ig_intr_md_for_tm_copy_to_cpu": 1,
"tcp_ecn": 1,
"ipv4_srcAddr": 4,
"udp_length_": 2,
@@ -26543,7 +26178,7 @@
},
{
"0": {
- "68": {
+ "67": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
@@ -26553,7 +26188,7 @@
}
},
"1": {
- "82": {
+ "81": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/p4_name_lookup.json b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/p4_name_lookup.json
index 275d643..36919e7 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/p4_name_lookup.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/p4_name_lookup.json
@@ -11,13 +11,14 @@
"6": "default_parser",
"7": "parse_pkt_out",
"8": "<POV initialization>",
- "9": "start"
+ "9": "start",
+ "10": "parse_tcp"
},
"pov": {
"0": {
"0": "--pov_reserved--_0"
},
- "68": {
+ "67": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
@@ -40,7 +41,7 @@
"8": "parse_pkt_in"
},
"pov": {
- "82": {
+ "81": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
@@ -60,15 +61,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -77,218 +76,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
- },
- "logical_tables": {
- "0": {
- "actions": {
- "_packet_out": {
- "direction": 0,
- "primitives": [
- {
- "dst": {
- "name": "ig_intr_md_for_tm.ucast_egress_port",
- "phv_allocation": [
- {
- "field_instance_least_significant_bit": 0,
- "field_instance_most_significant_bit": 8,
- "phv_container_least_significant_bit": 0,
- "phv_container_most_significant_bit": 8,
- "word_address": 130
- }
- ],
- "type": "phv"
- },
- "name": "ModifyFieldPrimitive",
- "src": [
- {
- "name": "packet_out_hdr.egress_port",
- "phv_allocation": [
- {
- "field_instance_least_significant_bit": 0,
- "field_instance_most_significant_bit": 8,
- "phv_container_least_significant_bit": 7,
- "phv_container_most_significant_bit": 15,
- "word_address": 129
- }
- ],
- "type": "phv"
- }
- ]
- },
- {
- "dst": {
- "name": "packet_out_hdr",
- "type": "header"
- },
- "name": "RemoveHeaderPrimitive"
- }
- ],
- "table_name": "ingress_pkt"
- }
- },
- "instruction_addresses": {
- "65": "_packet_out"
- },
- "match_fields": {},
- "table_name": "ingress_pkt"
- },
- "1": {
- "actions": {
- "add_packet_in_hdr": {
- "direction": 1,
- "primitives": [
- {
- "dst": {
- "name": "packet_in_hdr",
- "type": "header"
- },
- "name": "AddHeaderPrimitive"
- },
- {
- "dst": {
- "name": "packet_in_hdr.ingress_port",
- "phv_allocation": [
- {
- "field_instance_least_significant_bit": 0,
- "field_instance_most_significant_bit": 8,
- "phv_container_least_significant_bit": 7,
- "phv_container_most_significant_bit": 15,
- "word_address": 145
- }
- ],
- "type": "phv"
- },
- "name": "ModifyFieldPrimitive",
- "src": [
- {
- "name": "ig_intr_md.ingress_port",
- "phv_allocation": [
- {
- "field_instance_least_significant_bit": 0,
- "field_instance_most_significant_bit": 8,
- "phv_container_least_significant_bit": 0,
- "phv_container_most_significant_bit": 8,
- "word_address": 144
- }
- ],
- "type": "phv"
- }
- ]
- }
- ],
- "table_name": "egress_pkt"
- }
- },
- "instruction_addresses": {
- "65": "add_packet_in_hdr"
- },
- "match_fields": {},
- "table_name": "egress_pkt"
- }
- },
- "stateful_tables": []
- },
- "1": {
- "containers": {
- "0": "I [POV[31:0]]",
- "1": "I [ipv4.protocol, ipv4.hdrChecksum, ipv4.srcAddr[31:24]]",
- "2": "I [ipv4.dstAddr]",
- "3": "I [ethernet.dstAddr[39:8]]",
- "4": "I [ethernet.srcAddr[31:0]]",
- "5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
- "128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
- "129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "130": "I [ig_intr_md_for_tm.ucast_egress_port]",
- "131": "I [ipv4.srcAddr[15:0]]",
- "132": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "133": "I [ethernet.etherType]",
- "134": "I [ecmp_metadata.groupId]",
- "135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
- "256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
- "288": "I [ipv4.version, ipv4.ihl]",
- "289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
- "290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
- "320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
- "321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {
"0": {
@@ -351,14 +176,14 @@
"primitives": [
{
"dst": {
- "name": "ig_intr_md_for_tm.copy_to_cpu",
+ "name": "ig_intr_md_for_tm.ucast_egress_port",
"phv_allocation": [
{
"field_instance_least_significant_bit": 0,
- "field_instance_most_significant_bit": 0,
+ "field_instance_most_significant_bit": 8,
"phv_container_least_significant_bit": 0,
- "phv_container_most_significant_bit": 0,
- "word_address": 64
+ "phv_container_most_significant_bit": 8,
+ "word_address": 130
}
],
"type": "phv"
@@ -366,10 +191,48 @@
"name": "ModifyFieldPrimitive",
"src": [
{
- "name": 1,
+ "name": 320,
"type": "immediate"
}
]
+ },
+ {
+ "dst": {
+ "name": "packet_in_hdr",
+ "type": "header"
+ },
+ "name": "AddHeaderPrimitive"
+ },
+ {
+ "dst": {
+ "name": "packet_in_hdr.ingress_port",
+ "phv_allocation": [
+ {
+ "field_instance_least_significant_bit": 0,
+ "field_instance_most_significant_bit": 8,
+ "phv_container_least_significant_bit": 7,
+ "phv_container_most_significant_bit": 15,
+ "word_address": 129
+ }
+ ],
+ "type": "phv"
+ },
+ "name": "ModifyFieldPrimitive",
+ "src": [
+ {
+ "name": "ig_intr_md.ingress_port",
+ "phv_allocation": [
+ {
+ "field_instance_least_significant_bit": 0,
+ "field_instance_most_significant_bit": 8,
+ "phv_container_least_significant_bit": 0,
+ "phv_container_most_significant_bit": 8,
+ "word_address": 128
+ }
+ ],
+ "type": "phv"
+ }
+ ]
}
],
"table_name": "table0"
@@ -416,7 +279,7 @@
"field_instance_most_significant_bit": 47,
"phv_container_least_significant_bit": 0,
"phv_container_most_significant_bit": 7,
- "word_address": 66
+ "word_address": 65
},
{
"field_instance_least_significant_bit": 8,
@@ -455,7 +318,7 @@
"field_instance_most_significant_bit": 39,
"phv_container_least_significant_bit": 0,
"phv_container_most_significant_bit": 7,
- "word_address": 67
+ "word_address": 66
},
{
"field_instance_least_significant_bit": 0,
@@ -476,11 +339,64 @@
]
},
"table_name": "table0"
+ },
+ "1": {
+ "actions": {
+ "_process_packet_out": {
+ "direction": 0,
+ "primitives": [
+ {
+ "dst": {
+ "name": "ig_intr_md_for_tm.ucast_egress_port",
+ "phv_allocation": [
+ {
+ "field_instance_least_significant_bit": 0,
+ "field_instance_most_significant_bit": 8,
+ "phv_container_least_significant_bit": 0,
+ "phv_container_most_significant_bit": 8,
+ "word_address": 130
+ }
+ ],
+ "type": "phv"
+ },
+ "name": "ModifyFieldPrimitive",
+ "src": [
+ {
+ "name": "packet_out_hdr.egress_port",
+ "phv_allocation": [
+ {
+ "field_instance_least_significant_bit": 0,
+ "field_instance_most_significant_bit": 8,
+ "phv_container_least_significant_bit": 7,
+ "phv_container_most_significant_bit": 15,
+ "word_address": 129
+ }
+ ],
+ "type": "phv"
+ }
+ ]
+ },
+ {
+ "dst": {
+ "name": "packet_out_hdr",
+ "type": "header"
+ },
+ "name": "RemoveHeaderPrimitive"
+ }
+ ],
+ "table_name": "process_packet_out_table"
+ }
+ },
+ "instruction_addresses": {
+ "69": "_process_packet_out"
+ },
+ "match_fields": {},
+ "table_name": "process_packet_out_table"
}
},
"stateful_tables": []
},
- "2": {
+ "1": {
"containers": {
"0": "I [POV[31:0]]",
"1": "I [ipv4.protocol, ipv4.hdrChecksum, ipv4.srcAddr[31:24]]",
@@ -488,15 +404,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -505,44 +419,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {
"0": {
@@ -604,7 +518,7 @@
},
"stateful_tables": []
},
- "3": {
+ "2": {
"containers": {
"0": "I [POV[31:0]]",
"1": "I [ipv4.protocol, ipv4.hdrChecksum, ipv4.srcAddr[31:24]]",
@@ -612,15 +526,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -629,44 +541,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {
"0": {
@@ -716,7 +628,7 @@
},
"stateful_tables": []
},
- "4": {
+ "3": {
"containers": {
"0": "I [POV[31:0]]",
"1": "I [ipv4.protocol, ipv4.hdrChecksum, ipv4.srcAddr[31:24]]",
@@ -724,15 +636,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -741,44 +651,109 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
+ },
+ "logical_tables": {},
+ "stateful_tables": []
+ },
+ "4": {
+ "containers": {
+ "0": "I [POV[31:0]]",
+ "1": "I [ipv4.protocol, ipv4.hdrChecksum, ipv4.srcAddr[31:24]]",
+ "2": "I [ipv4.dstAddr]",
+ "3": "I [ethernet.dstAddr[39:8]]",
+ "4": "I [ethernet.srcAddr[31:0]]",
+ "5": "I [udp.srcPort, udp.dstPort]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
+ "128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
+ "129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
+ "130": "I [ig_intr_md_for_tm.ucast_egress_port]",
+ "131": "I [ipv4.srcAddr[15:0]]",
+ "132": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "133": "I [ethernet.etherType]",
+ "134": "I [ecmp_metadata.groupId]",
+ "135": "I [ecmp_metadata.selector]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
+ "288": "I [ipv4.version, ipv4.ihl]",
+ "289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
+ "290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
+ "320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
+ "321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -791,15 +766,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -808,44 +781,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -858,15 +831,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -875,44 +846,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -925,15 +896,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -942,44 +911,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -992,15 +961,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -1009,44 +976,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -1059,15 +1026,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -1076,44 +1041,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -1126,15 +1091,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -1143,44 +1106,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -1193,15 +1156,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -1210,44 +1171,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/parser.context.json b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/parser.context.json
index 4027247..22409ec 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/parser.context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/parser.context.json
@@ -243,7 +243,6 @@
null,
null,
null,
- null,
{
"origin": "start",
"origin-case": 0,
@@ -281,6 +280,12 @@
"origin-mask": 511
},
{
+ "origin": "parse_tcp",
+ "origin-case": 0,
+ "state": "parse_tcp//spilled",
+ "origin-mask": 0
+ },
+ {
"origin": "parse_ipv4",
"origin-case": 0,
"state": "<leaf>",
@@ -334,7 +339,8 @@
"6": "default_parser",
"7": "parse_pkt_out",
"8": "<POV initialization>_<Ingress intrinsic metadata>_<Phase 0>",
- "9": "start"
+ "9": "start",
+ "10": "parse_tcp//spilled"
}
},
"egress": {
@@ -590,13 +596,13 @@
"origin-mask": 0
},
{
- "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"origin-case": 0,
"state": "default_parser",
"origin-mask": 0
},
{
- "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"origin-case": 0,
"state": "parse_pkt_in",
"origin-mask": 255
@@ -652,7 +658,7 @@
{
"origin": "<Shim start state>",
"origin-case": 0,
- "state": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "state": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"origin-mask": 0
}
],
@@ -665,7 +671,7 @@
"4": "parse_udp",
"5": "default_parser",
"6": "parse_pkt_out",
- "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"8": "parse_pkt_in"
}
}
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/phv.context.json b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/phv.context.json
index c3a266c..2cfaaae 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/phv.context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/context/phv.context.json
@@ -393,19 +393,6 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 0,
- "data_msb": 0,
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "container_lsb": 0,
- "container_msb": 0
- }
- ],
- "address": 64
- },
- {
- "pipeline": "ingress",
- "data": [
- {
"data_lsb": 16,
"data_msb": 23,
"name": "ipv4.srcAddr",
@@ -413,7 +400,7 @@
"container_msb": 7
}
],
- "address": 65
+ "address": 64
},
{
"pipeline": "ingress",
@@ -426,7 +413,7 @@
"container_msb": 7
}
],
- "address": 66
+ "address": 65
},
{
"pipeline": "ingress",
@@ -439,7 +426,7 @@
"container_msb": 7
}
],
- "address": 67
+ "address": 66
},
{
"pipeline": "ingress",
@@ -452,7 +439,7 @@
"container_msb": 7
}
],
- "address": 68
+ "address": 67
},
{
"pipeline": "ingress",
@@ -465,6 +452,11 @@
"container_msb": 7
}
],
+ "address": 68
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 69
},
{
@@ -522,19 +514,6 @@
"data": [
{
"data_lsb": 0,
- "data_msb": 0,
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "container_lsb": 0,
- "container_msb": 0
- }
- ],
- "address": 80
- },
- {
- "pipeline": "egress",
- "data": [
- {
- "data_lsb": 0,
"data_msb": 4,
"name": "eg_intr_md._pad7",
"container_lsb": 3,
@@ -548,7 +527,7 @@
"container_msb": 2
}
],
- "address": 81
+ "address": 80
},
{
"pipeline": "egress",
@@ -561,6 +540,11 @@
"container_msb": 7
}
],
+ "address": 81
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 82
},
{
@@ -993,39 +977,6 @@
"data": [
{
"data_lsb": 0,
- "data_msb": 8,
- "name": "ig_intr_md.ingress_port",
- "container_lsb": 0,
- "container_msb": 8
- }
- ],
- "address": 144
- },
- {
- "pipeline": "egress",
- "data": [
- {
- "data_lsb": 0,
- "data_msb": 8,
- "name": "packet_in_hdr.ingress_port",
- "container_lsb": 7,
- "container_msb": 15
- },
- {
- "data_lsb": 0,
- "data_msb": 6,
- "name": "packet_in_hdr._padding",
- "container_lsb": 0,
- "container_msb": 6
- }
- ],
- "address": 145
- },
- {
- "pipeline": "egress",
- "data": [
- {
- "data_lsb": 0,
"data_msb": 6,
"name": "eg_intr_md._pad0",
"container_lsb": 9,
@@ -1039,6 +990,16 @@
"container_msb": 8
}
],
+ "address": 144
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 145
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 146
},
{
@@ -1497,19 +1458,6 @@
"data": [
{
"data_lsb": 0,
- "data_msb": 31,
- "name": "tcp.ackNo",
- "container_lsb": 0,
- "container_msb": 31
- }
- ],
- "address": 257
- },
- {
- "pipeline": "ingress",
- "data": [
- {
- "data_lsb": 0,
"data_msb": 3,
"name": "tcp.dataOffset",
"container_lsb": 28,
@@ -1544,7 +1492,7 @@
"container_msb": 15
}
],
- "address": 258
+ "address": 257
},
{
"pipeline": "ingress",
@@ -1564,9 +1512,34 @@
"container_msb": 15
}
],
+ "address": 258
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 259
},
{
+ "pipeline": "unused",
+ "data": [],
+ "address": 260
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 261
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 262
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 263
+ },
+ {
"pipeline": "egress",
"data": [
{
@@ -1591,7 +1564,7 @@
"container_msb": 15
}
],
- "address": 260
+ "address": 264
},
{
"pipeline": "egress",
@@ -1604,7 +1577,7 @@
"container_msb": 31
}
],
- "address": 261
+ "address": 265
},
{
"pipeline": "egress",
@@ -1617,7 +1590,7 @@
"container_msb": 31
}
],
- "address": 262
+ "address": 266
},
{
"pipeline": "egress",
@@ -1644,7 +1617,7 @@
"container_msb": 15
}
],
- "address": 263
+ "address": 267
},
{
"pipeline": "egress",
@@ -1685,7 +1658,7 @@
"container_msb": 15
}
],
- "address": 264
+ "address": 268
},
{
"pipeline": "egress",
@@ -1705,7 +1678,7 @@
"container_msb": 15
}
],
- "address": 265
+ "address": 269
},
{
"pipeline": "egress",
@@ -1718,7 +1691,7 @@
"container_msb": 31
}
],
- "address": 266
+ "address": 270
},
{
"pipeline": "egress",
@@ -1731,26 +1704,6 @@
"container_msb": 31
}
],
- "address": 267
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 268
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 269
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 270
- },
- {
- "pipeline": "unused",
- "data": [],
"address": 271
},
{
@@ -1894,9 +1847,45 @@
"address": 290
},
{
+ "pipeline": "ingress",
+ "data": [
+ {
+ "data_lsb": 8,
+ "data_msb": 15,
+ "name": "tcp.dstPort",
+ "container_lsb": 0,
+ "container_msb": 7
+ }
+ ],
+ "address": 291
+ },
+ {
+ "pipeline": "ingress",
+ "data": [
+ {
+ "data_lsb": 0,
+ "data_msb": 7,
+ "name": "tcp.dstPort",
+ "container_lsb": 0,
+ "container_msb": 7
+ }
+ ],
+ "address": 292
+ },
+ {
"pipeline": "unused",
"data": [],
- "address": 291
+ "address": 293
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 294
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 295
},
{
"pipeline": "egress",
@@ -1916,7 +1905,7 @@
"container_msb": 3
}
],
- "address": 292
+ "address": 296
},
{
"pipeline": "egress",
@@ -1929,7 +1918,7 @@
"container_msb": 7
}
],
- "address": 293
+ "address": 297
},
{
"pipeline": "egress",
@@ -1949,7 +1938,7 @@
"container_msb": 7
}
],
- "address": 294
+ "address": 298
},
{
"pipeline": "egress",
@@ -1969,7 +1958,7 @@
"container_msb": 7
}
],
- "address": 295
+ "address": 299
},
{
"pipeline": "egress",
@@ -1982,7 +1971,7 @@
"container_msb": 7
}
],
- "address": 296
+ "address": 300
},
{
"pipeline": "egress",
@@ -1995,26 +1984,6 @@
"container_msb": 7
}
],
- "address": 297
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 298
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 299
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 300
- },
- {
- "pipeline": "unused",
- "data": [],
"address": 301
},
{
@@ -2151,9 +2120,9 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 0,
- "data_msb": 15,
- "name": "tcp.dstPort",
+ "data_lsb": 16,
+ "data_msb": 31,
+ "name": "tcp.seqNo",
"container_lsb": 0,
"container_msb": 15
},
@@ -2171,8 +2140,8 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 16,
- "data_msb": 31,
+ "data_lsb": 0,
+ "data_msb": 15,
"name": "tcp.seqNo",
"container_lsb": 0,
"container_msb": 15
@@ -2184,9 +2153,9 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 0,
- "data_msb": 15,
- "name": "tcp.seqNo",
+ "data_lsb": 16,
+ "data_msb": 31,
+ "name": "tcp.ackNo",
"container_lsb": 0,
"container_msb": 15
}
@@ -2194,9 +2163,47 @@
"address": 324
},
{
+ "pipeline": "ingress",
+ "data": [
+ {
+ "data_lsb": 0,
+ "data_msb": 15,
+ "name": "tcp.ackNo",
+ "container_lsb": 0,
+ "container_msb": 15
+ }
+ ],
+ "address": 325
+ },
+ {
"pipeline": "unused",
"data": [],
- "address": 325
+ "address": 326
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 327
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 328
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 329
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 330
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 331
},
{
"pipeline": "egress",
@@ -2209,7 +2216,7 @@
"container_msb": 15
}
],
- "address": 326
+ "address": 332
},
{
"pipeline": "egress",
@@ -2222,7 +2229,7 @@
"container_msb": 15
}
],
- "address": 327
+ "address": 333
},
{
"pipeline": "egress",
@@ -2242,7 +2249,7 @@
"container_msb": 12
}
],
- "address": 328
+ "address": 334
},
{
"pipeline": "egress",
@@ -2253,6 +2260,19 @@
"name": "tcp.dstPort",
"container_lsb": 0,
"container_msb": 15
+ }
+ ],
+ "address": 335
+ },
+ {
+ "pipeline": "egress",
+ "data": [
+ {
+ "data_lsb": 16,
+ "data_msb": 31,
+ "name": "tcp.seqNo",
+ "container_lsb": 0,
+ "container_msb": 15
},
{
"data_lsb": 0,
@@ -2262,20 +2282,7 @@
"container_msb": 15
}
],
- "address": 329
- },
- {
- "pipeline": "egress",
- "data": [
- {
- "data_lsb": 16,
- "data_msb": 31,
- "name": "tcp.seqNo",
- "container_lsb": 0,
- "container_msb": 15
- }
- ],
- "address": 330
+ "address": 336
},
{
"pipeline": "egress",
@@ -2288,7 +2295,7 @@
"container_msb": 15
}
],
- "address": 331
+ "address": 337
},
{
"pipeline": "egress",
@@ -2308,7 +2315,7 @@
"container_msb": 7
}
],
- "address": 332
+ "address": 338
},
{
"pipeline": "egress",
@@ -2321,7 +2328,7 @@
"container_msb": 15
}
],
- "address": 333
+ "address": 339
},
{
"pipeline": "egress",
@@ -2339,38 +2346,22 @@
"name": "packet_out_hdr._padding",
"container_lsb": 0,
"container_msb": 6
+ },
+ {
+ "data_lsb": 0,
+ "data_msb": 8,
+ "name": "packet_in_hdr.ingress_port",
+ "container_lsb": 7,
+ "container_msb": 15
+ },
+ {
+ "data_lsb": 0,
+ "data_msb": 6,
+ "name": "packet_in_hdr._padding",
+ "container_lsb": 0,
+ "container_msb": 6
}
],
- "address": 334
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 335
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 336
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 337
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 338
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 339
- },
- {
- "pipeline": "unused",
- "data": [],
"address": 340
},
{
@@ -2527,7 +2518,7 @@
"data_lsb": 0,
"data_msb": 5,
"container_lsb": 16,
- "address": 258
+ "address": 257
}
],
"udp.length_": [
@@ -2561,7 +2552,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 16,
- "address": 259
+ "address": 258
}
],
"tcp.srcPort": [
@@ -2582,11 +2573,18 @@
],
"tcp.ackNo": [
{
- "container_msb": 31,
- "data_lsb": 0,
+ "container_msb": 15,
+ "data_lsb": 16,
"data_msb": 31,
"container_lsb": 0,
- "address": 257
+ "address": 324
+ },
+ {
+ "container_msb": 15,
+ "data_lsb": 0,
+ "data_msb": 15,
+ "container_lsb": 0,
+ "address": 325
}
],
"ethernet.etherType": [
@@ -2627,11 +2625,18 @@
],
"tcp.dstPort": [
{
- "container_msb": 15,
- "data_lsb": 0,
+ "container_msb": 7,
+ "data_lsb": 8,
"data_msb": 15,
"container_lsb": 0,
- "address": 322
+ "address": 291
+ },
+ {
+ "container_msb": 7,
+ "data_lsb": 0,
+ "data_msb": 7,
+ "container_lsb": 0,
+ "address": 292
}
],
"ig_intr_md._pad1": [
@@ -2676,7 +2681,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 5,
- "address": 69
+ "address": 68
}
],
"POV": [
@@ -2692,7 +2697,7 @@
"data_lsb": 32,
"data_msb": 39,
"container_lsb": 0,
- "address": 68
+ "address": 67
}
],
"tcp.res": [
@@ -2701,7 +2706,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 25,
- "address": 258
+ "address": 257
}
],
"ethernet.dstAddr": [
@@ -2717,7 +2722,7 @@
"data_lsb": 40,
"data_msb": 47,
"container_lsb": 0,
- "address": 66
+ "address": 65
},
{
"container_msb": 15,
@@ -2754,15 +2759,6 @@
"address": 129
}
],
- "ipv4.version": [
- {
- "container_msb": 7,
- "data_lsb": 0,
- "data_msb": 3,
- "container_lsb": 4,
- "address": 288
- }
- ],
"ethernet.srcAddr": [
{
"container_msb": 31,
@@ -2776,7 +2772,7 @@
"data_lsb": 32,
"data_msb": 39,
"container_lsb": 0,
- "address": 67
+ "address": 66
},
{
"container_msb": 7,
@@ -2869,14 +2865,14 @@
"data_lsb": 16,
"data_msb": 31,
"container_lsb": 0,
- "address": 323
+ "address": 322
},
{
"container_msb": 15,
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 324
+ "address": 323
}
],
"ipv4.ttl": [
@@ -2906,13 +2902,13 @@
"address": 5
}
],
- "ig_intr_md_for_tm.copy_to_cpu": [
+ "ipv4.version": [
{
- "container_msb": 0,
+ "container_msb": 7,
"data_lsb": 0,
- "data_msb": 0,
- "container_lsb": 0,
- "address": 64
+ "data_msb": 3,
+ "container_lsb": 4,
+ "address": 288
}
],
"ipv4.srcAddr": [
@@ -2928,7 +2924,7 @@
"data_lsb": 16,
"data_msb": 23,
"container_lsb": 0,
- "address": 65
+ "address": 64
},
{
"container_msb": 15,
@@ -2944,7 +2940,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 22,
- "address": 258
+ "address": 257
}
],
"tcp.window": [
@@ -2953,7 +2949,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 258
+ "address": 257
}
],
"ig_intr_md.ingress_port": [
@@ -2971,7 +2967,7 @@
"data_lsb": 0,
"data_msb": 3,
"container_lsb": 28,
- "address": 258
+ "address": 257
}
],
"ipv4.fragOffset": [
@@ -2998,7 +2994,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 259
+ "address": 258
}
]
},
@@ -3009,7 +3005,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 260
+ "address": 264
}
],
"packet_in_hdr.ingress_port": [
@@ -3018,16 +3014,7 @@
"data_lsb": 0,
"data_msb": 8,
"container_lsb": 7,
- "address": 145
- }
- ],
- "tcp.checksum": [
- {
- "container_msb": 31,
- "data_lsb": 0,
- "data_msb": 15,
- "container_lsb": 16,
- "address": 265
+ "address": 340
}
],
"tcp.srcPort": [
@@ -3036,14 +3023,14 @@
"data_lsb": 8,
"data_msb": 15,
"container_lsb": 0,
- "address": 294
+ "address": 298
},
{
"container_msb": 7,
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 0,
- "address": 295
+ "address": 299
}
],
"udp.dstPort": [
@@ -3052,7 +3039,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 329
+ "address": 336
}
],
"ethernet.etherType": [
@@ -3061,7 +3048,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 333
+ "address": 339
}
],
"tcp.ctrl": [
@@ -3070,7 +3057,7 @@
"data_lsb": 0,
"data_msb": 5,
"container_lsb": 16,
- "address": 264
+ "address": 268
}
],
"packet_out_hdr._padding": [
@@ -3079,7 +3066,7 @@
"data_lsb": 0,
"data_msb": 6,
"container_lsb": 0,
- "address": 334
+ "address": 340
}
],
"tcp.dstPort": [
@@ -3088,7 +3075,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 329
+ "address": 335
}
],
"eg_intr_md._pad0": [
@@ -3097,7 +3084,7 @@
"data_lsb": 0,
"data_msb": 6,
"container_lsb": 9,
- "address": 146
+ "address": 144
}
],
"eg_intr_md.egress_cos": [
@@ -3106,7 +3093,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 0,
- "address": 81
+ "address": 80
}
],
"eg_intr_md._pad7": [
@@ -3115,7 +3102,7 @@
"data_lsb": 0,
"data_msb": 4,
"container_lsb": 3,
- "address": 81
+ "address": 80
}
],
"POV": [
@@ -3124,7 +3111,7 @@
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 0,
- "address": 82
+ "address": 81
}
],
"tcp.res": [
@@ -3133,7 +3120,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 25,
- "address": 264
+ "address": 268
}
],
"ethernet.dstAddr": [
@@ -3142,21 +3129,21 @@
"data_lsb": 8,
"data_msb": 39,
"container_lsb": 0,
- "address": 266
+ "address": 270
},
{
"container_msb": 7,
"data_lsb": 40,
"data_msb": 47,
"container_lsb": 0,
- "address": 296
+ "address": 300
},
{
"container_msb": 15,
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 8,
- "address": 332
+ "address": 338
}
],
"ipv4.ihl": [
@@ -3165,7 +3152,7 @@
"data_lsb": 0,
"data_msb": 3,
"container_lsb": 0,
- "address": 292
+ "address": 296
}
],
"ipv4.dstAddr": [
@@ -3174,57 +3161,7 @@
"data_lsb": 0,
"data_msb": 31,
"container_lsb": 0,
- "address": 262
- }
- ],
- "packet_in_hdr._padding": [
- {
- "container_msb": 6,
- "data_lsb": 0,
- "data_msb": 6,
- "container_lsb": 0,
- "address": 145
- }
- ],
- "ipv4.totalLen": [
- {
- "container_msb": 15,
- "data_lsb": 0,
- "data_msb": 15,
- "container_lsb": 0,
- "address": 326
- }
- ],
- "ipv4.version": [
- {
- "container_msb": 7,
- "data_lsb": 0,
- "data_msb": 3,
- "container_lsb": 4,
- "address": 292
- }
- ],
- "ethernet.srcAddr": [
- {
- "container_msb": 31,
- "data_lsb": 0,
- "data_msb": 31,
- "container_lsb": 0,
- "address": 267
- },
- {
- "container_msb": 7,
- "data_lsb": 32,
- "data_msb": 39,
- "container_lsb": 0,
- "address": 297
- },
- {
- "container_msb": 7,
- "data_lsb": 40,
- "data_msb": 47,
- "container_lsb": 0,
- "address": 332
+ "address": 266
}
],
"ipv4.diffserv": [
@@ -3233,7 +3170,48 @@
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 0,
- "address": 293
+ "address": 297
+ }
+ ],
+ "ipv4.totalLen": [
+ {
+ "container_msb": 15,
+ "data_lsb": 0,
+ "data_msb": 15,
+ "container_lsb": 0,
+ "address": 332
+ }
+ ],
+ "ethernet.srcAddr": [
+ {
+ "container_msb": 31,
+ "data_lsb": 0,
+ "data_msb": 31,
+ "container_lsb": 0,
+ "address": 271
+ },
+ {
+ "container_msb": 7,
+ "data_lsb": 32,
+ "data_msb": 39,
+ "container_lsb": 0,
+ "address": 301
+ },
+ {
+ "container_msb": 7,
+ "data_lsb": 40,
+ "data_msb": 47,
+ "container_lsb": 0,
+ "address": 338
+ }
+ ],
+ "packet_in_hdr._padding": [
+ {
+ "container_msb": 6,
+ "data_lsb": 0,
+ "data_msb": 6,
+ "container_lsb": 0,
+ "address": 340
}
],
"ipv4.flags": [
@@ -3242,7 +3220,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 13,
- "address": 328
+ "address": 334
}
],
"ipv4.identification": [
@@ -3251,7 +3229,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 327
+ "address": 333
}
],
"eg_intr_md.egress_port": [
@@ -3260,7 +3238,7 @@
"data_lsb": 0,
"data_msb": 8,
"container_lsb": 0,
- "address": 146
+ "address": 144
}
],
"packet_out_hdr.egress_port": [
@@ -3269,7 +3247,7 @@
"data_lsb": 0,
"data_msb": 8,
"container_lsb": 7,
- "address": 334
+ "address": 340
}
],
"ipv4.protocol": [
@@ -3278,7 +3256,7 @@
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 16,
- "address": 260
+ "address": 264
}
],
"udp.checksum": [
@@ -3287,7 +3265,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 263
+ "address": 267
}
],
"tcp.seqNo": [
@@ -3296,14 +3274,14 @@
"data_lsb": 16,
"data_msb": 31,
"container_lsb": 0,
- "address": 330
+ "address": 336
},
{
"container_msb": 15,
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 331
+ "address": 337
}
],
"udp.length_": [
@@ -3312,7 +3290,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 16,
- "address": 263
+ "address": 267
}
],
"udp.srcPort": [
@@ -3321,14 +3299,14 @@
"data_lsb": 8,
"data_msb": 15,
"container_lsb": 0,
- "address": 294
+ "address": 298
},
{
"container_msb": 7,
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 0,
- "address": 295
+ "address": 299
}
],
"tcp.ackNo": [
@@ -3337,16 +3315,16 @@
"data_lsb": 0,
"data_msb": 31,
"container_lsb": 0,
- "address": 263
+ "address": 267
}
],
- "ig_intr_md_for_tm.copy_to_cpu": [
+ "ipv4.version": [
{
- "container_msb": 0,
+ "container_msb": 7,
"data_lsb": 0,
- "data_msb": 0,
- "container_lsb": 0,
- "address": 80
+ "data_msb": 3,
+ "container_lsb": 4,
+ "address": 296
}
],
"ipv4.srcAddr": [
@@ -3355,7 +3333,7 @@
"data_lsb": 0,
"data_msb": 31,
"container_lsb": 0,
- "address": 261
+ "address": 265
}
],
"tcp.ecn": [
@@ -3364,7 +3342,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 22,
- "address": 264
+ "address": 268
}
],
"tcp.window": [
@@ -3373,16 +3351,16 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 264
+ "address": 268
}
],
- "ig_intr_md.ingress_port": [
+ "tcp.checksum": [
{
- "container_msb": 8,
+ "container_msb": 31,
"data_lsb": 0,
- "data_msb": 8,
- "container_lsb": 0,
- "address": 144
+ "data_msb": 15,
+ "container_lsb": 16,
+ "address": 269
}
],
"tcp.dataOffset": [
@@ -3391,7 +3369,7 @@
"data_lsb": 0,
"data_msb": 3,
"container_lsb": 28,
- "address": 264
+ "address": 268
}
],
"ipv4.fragOffset": [
@@ -3400,7 +3378,7 @@
"data_lsb": 0,
"data_msb": 12,
"container_lsb": 0,
- "address": 328
+ "address": 334
}
],
"ipv4.ttl": [
@@ -3409,7 +3387,7 @@
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 24,
- "address": 260
+ "address": 264
}
],
"tcp.urgentPtr": [
@@ -3418,7 +3396,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 265
+ "address": 269
}
]
}
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/ecmp.json b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/ecmp.json
index e53756f..470c7b8 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/ecmp.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/ecmp.json
@@ -522,45 +522,10 @@
"learn_lists" : [],
"actions" : [
{
- "name" : "add_packet_in_hdr",
+ "name" : "NoAction",
"id" : 0,
"runtime_data" : [],
- "primitives" : [
- {
- "op" : "add_header",
- "parameters" : [
- {
- "type" : "header",
- "value" : "packet_in_hdr"
- }
- ],
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 25,
- "column" : 4,
- "source_fragment" : "add_header(packet_in_hdr)"
- }
- },
- {
- "op" : "assign",
- "parameters" : [
- {
- "type" : "field",
- "value" : ["packet_in_hdr", "ingress_port"]
- },
- {
- "type" : "field",
- "value" : ["ig_intr_md", "ingress_port"]
- }
- ],
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 26,
- "column" : 4,
- "source_fragment" : "modify_field(packet_in_hdr.ingress_port, ig_intr_md.ingress_port)"
- }
- }
- ]
+ "primitives" : []
},
{
"name" : "NoAction",
@@ -569,10 +534,35 @@
"primitives" : []
},
{
- "name" : "NoAction",
+ "name" : "set_egress_port",
"id" : 2,
- "runtime_data" : [],
- "primitives" : []
+ "runtime_data" : [
+ {
+ "name" : "port",
+ "bitwidth" : 9
+ }
+ ],
+ "primitives" : [
+ {
+ "op" : "assign",
+ "parameters" : [
+ {
+ "type" : "field",
+ "value" : ["ig_intr_md", "egress_spec"]
+ },
+ {
+ "type" : "runtime_data",
+ "value" : 0
+ }
+ ],
+ "source_info" : {
+ "filename" : "include/actions.p4",
+ "line" : 5,
+ "column" : 23,
+ "source_fragment" : "port) { ..."
+ }
+ }
+ ]
},
{
"name" : "set_egress_port",
@@ -606,39 +596,8 @@
]
},
{
- "name" : "set_egress_port",
- "id" : 4,
- "runtime_data" : [
- {
- "name" : "port",
- "bitwidth" : 9
- }
- ],
- "primitives" : [
- {
- "op" : "assign",
- "parameters" : [
- {
- "type" : "field",
- "value" : ["ig_intr_md", "egress_spec"]
- },
- {
- "type" : "runtime_data",
- "value" : 0
- }
- ],
- "source_info" : {
- "filename" : "include/actions.p4",
- "line" : 5,
- "column" : 23,
- "source_fragment" : "port) { ..."
- }
- }
- ]
- },
- {
"name" : "ecmp_group",
- "id" : 5,
+ "id" : 4,
"runtime_data" : [
{
"name" : "groupId",
@@ -696,7 +655,7 @@
},
{
"name" : "send_to_cpu",
- "id" : 6,
+ "id" : 5,
"runtime_data" : [],
"primitives" : [
{
@@ -713,16 +672,50 @@
],
"source_info" : {
"filename" : "include/actions.p4",
- "line" : 21,
+ "line" : 18,
"column" : 4,
"source_fragment" : "modify_field(ig_intr_md.egress_spec, 255)"
}
+ },
+ {
+ "op" : "add_header",
+ "parameters" : [
+ {
+ "type" : "header",
+ "value" : "packet_in_hdr"
+ }
+ ],
+ "source_info" : {
+ "filename" : "include/actions.p4",
+ "line" : 19,
+ "column" : 4,
+ "source_fragment" : "add_header(packet_in_hdr)"
+ }
+ },
+ {
+ "op" : "assign",
+ "parameters" : [
+ {
+ "type" : "field",
+ "value" : ["packet_in_hdr", "ingress_port"]
+ },
+ {
+ "type" : "field",
+ "value" : ["ig_intr_md", "ingress_port"]
+ }
+ ],
+ "source_info" : {
+ "filename" : "include/actions.p4",
+ "line" : 20,
+ "column" : 4,
+ "source_fragment" : "modify_field(packet_in_hdr.ingress_port, ig_intr_md.ingress_port)"
+ }
}
]
},
{
"name" : "_drop",
- "id" : 7,
+ "id" : 6,
"runtime_data" : [],
"primitives" : [
{
@@ -747,8 +740,8 @@
]
},
{
- "name" : "_packet_out",
- "id" : 8,
+ "name" : "_process_packet_out",
+ "id" : 7,
"runtime_data" : [],
"primitives" : [
{
@@ -789,7 +782,7 @@
},
{
"name" : "count_egress",
- "id" : 9,
+ "id" : 8,
"runtime_data" : [],
"primitives" : [
{
@@ -841,7 +834,7 @@
},
{
"name" : "count_ingress",
- "id" : 10,
+ "id" : 9,
"runtime_data" : [],
"primitives" : [
{
@@ -899,37 +892,8 @@
"init_table" : "node_2",
"tables" : [
{
- "name" : "ingress_pkt",
- "id" : 0,
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 11,
- "column" : 0,
- "source_fragment" : "table ingress_pkt { ..."
- },
- "key" : [],
- "match_type" : "exact",
- "type" : "simple",
- "max_size" : 1024,
- "with_counters" : false,
- "support_timeout" : false,
- "direct_meters" : null,
- "action_ids" : [8],
- "actions" : ["_packet_out"],
- "base_default_next" : "node_4",
- "next_tables" : {
- "_packet_out" : "node_4"
- },
- "default_entry" : {
- "action_id" : 8,
- "action_const" : false,
- "action_data" : [],
- "action_entry_const" : false
- }
- },
- {
"name" : "table0",
- "id" : 1,
+ "id" : 0,
"source_info" : {
"filename" : "ecmp.p4",
"line" : 47,
@@ -964,18 +928,18 @@
"with_counters" : true,
"support_timeout" : false,
"direct_meters" : null,
- "action_ids" : [4, 5, 6, 7, 2],
+ "action_ids" : [3, 4, 5, 6, 1],
"actions" : ["set_egress_port", "ecmp_group", "send_to_cpu", "_drop", "NoAction"],
- "base_default_next" : "node_7",
+ "base_default_next" : "node_5",
"next_tables" : {
"ecmp_group" : "ecmp_group_table",
- "set_egress_port" : "node_7",
- "send_to_cpu" : "node_7",
- "_drop" : "node_7",
- "NoAction" : "node_7"
+ "set_egress_port" : "node_5",
+ "send_to_cpu" : "node_5",
+ "_drop" : "node_5",
+ "NoAction" : "node_5"
},
"default_entry" : {
- "action_id" : 2,
+ "action_id" : 1,
"action_const" : false,
"action_data" : [],
"action_entry_const" : false
@@ -983,7 +947,7 @@
},
{
"name" : "ecmp_group_table",
- "id" : 2,
+ "id" : 1,
"source_info" : {
"filename" : "ecmp.p4",
"line" : 63,
@@ -1008,15 +972,44 @@
"with_counters" : true,
"support_timeout" : false,
"direct_meters" : null,
- "action_ids" : [3, 1],
+ "action_ids" : [2, 0],
"actions" : ["set_egress_port", "NoAction"],
- "base_default_next" : "node_7",
+ "base_default_next" : "node_5",
"next_tables" : {
- "set_egress_port" : "node_7",
- "NoAction" : "node_7"
+ "set_egress_port" : "node_5",
+ "NoAction" : "node_5"
},
"default_entry" : {
- "action_id" : 1,
+ "action_id" : 0,
+ "action_const" : false,
+ "action_data" : [],
+ "action_entry_const" : false
+ }
+ },
+ {
+ "name" : "process_packet_out_table",
+ "id" : 2,
+ "source_info" : {
+ "filename" : "include/packet_io.p4",
+ "line" : 11,
+ "column" : 0,
+ "source_fragment" : "table process_packet_out_table { ..."
+ },
+ "key" : [],
+ "match_type" : "exact",
+ "type" : "simple",
+ "max_size" : 1024,
+ "with_counters" : false,
+ "support_timeout" : false,
+ "direct_meters" : null,
+ "action_ids" : [7],
+ "actions" : ["_process_packet_out"],
+ "base_default_next" : "node_7",
+ "next_tables" : {
+ "_process_packet_out" : "node_7"
+ },
+ "default_entry" : {
+ "action_id" : 7,
"action_const" : false,
"action_data" : [],
"action_entry_const" : false
@@ -1038,14 +1031,14 @@
"with_counters" : false,
"support_timeout" : false,
"direct_meters" : null,
- "action_ids" : [10],
+ "action_ids" : [9],
"actions" : ["count_ingress"],
"base_default_next" : "egress_port_count_table",
"next_tables" : {
"count_ingress" : "egress_port_count_table"
},
"default_entry" : {
- "action_id" : 10,
+ "action_id" : 9,
"action_const" : false,
"action_data" : [],
"action_entry_const" : false
@@ -1067,14 +1060,14 @@
"with_counters" : false,
"support_timeout" : false,
"direct_meters" : null,
- "action_ids" : [9],
+ "action_ids" : [8],
"actions" : ["count_egress"],
"base_default_next" : null,
"next_tables" : {
"count_egress" : null
},
"default_entry" : {
- "action_id" : 9,
+ "action_id" : 8,
"action_const" : false,
"action_data" : [],
"action_entry_const" : false
@@ -1087,6 +1080,32 @@
"name" : "node_2",
"id" : 0,
"source_info" : {
+ "filename" : "ecmp.p4",
+ "line" : 86,
+ "column" : 12,
+ "source_fragment" : "valid(packet_out_hdr)"
+ },
+ "expression" : {
+ "type" : "expression",
+ "value" : {
+ "op" : "!=",
+ "left" : {
+ "type" : "field",
+ "value" : ["packet_out_hdr", "$valid$"]
+ },
+ "right" : {
+ "type" : "hexstr",
+ "value" : "0x01"
+ }
+ }
+ },
+ "true_next" : "table0",
+ "false_next" : "node_5"
+ },
+ {
+ "name" : "node_5",
+ "id" : 1,
+ "source_info" : {
"filename" : "include/packet_io.p4",
"line" : 19,
"column" : 8,
@@ -1106,33 +1125,7 @@
}
}
},
- "true_next" : "ingress_pkt",
- "false_next" : "node_4"
- },
- {
- "name" : "node_4",
- "id" : 1,
- "source_info" : {
- "filename" : "ecmp.p4",
- "line" : 87,
- "column" : 12,
- "source_fragment" : "valid(packet_out_hdr)"
- },
- "expression" : {
- "type" : "expression",
- "value" : {
- "op" : "!=",
- "left" : {
- "type" : "field",
- "value" : ["packet_out_hdr", "$valid$"]
- },
- "right" : {
- "type" : "hexstr",
- "value" : "0x01"
- }
- }
- },
- "true_next" : "table0",
+ "true_next" : "process_packet_out_table",
"false_next" : "node_7"
},
{
@@ -1166,67 +1159,10 @@
{
"name" : "egress",
"id" : 1,
- "init_table" : "node_12",
- "tables" : [
- {
- "name" : "egress_pkt",
- "id" : 5,
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 29,
- "column" : 0,
- "source_fragment" : "table egress_pkt { ..."
- },
- "key" : [],
- "match_type" : "exact",
- "type" : "simple",
- "max_size" : 1024,
- "with_counters" : false,
- "support_timeout" : false,
- "direct_meters" : null,
- "action_ids" : [0],
- "actions" : ["add_packet_in_hdr"],
- "base_default_next" : null,
- "next_tables" : {
- "add_packet_in_hdr" : null
- },
- "default_entry" : {
- "action_id" : 0,
- "action_const" : false,
- "action_data" : [],
- "action_entry_const" : false
- }
- }
- ],
+ "init_table" : null,
+ "tables" : [],
"action_profiles" : [],
- "conditionals" : [
- {
- "name" : "node_12",
- "id" : 3,
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 40,
- "column" : 39,
- "source_fragment" : "=="
- },
- "expression" : {
- "type" : "expression",
- "value" : {
- "op" : "==",
- "left" : {
- "type" : "field",
- "value" : ["ig_intr_md", "ingress_port"]
- },
- "right" : {
- "type" : "hexstr",
- "value" : "0x00ff"
- }
- }
- },
- "false_next" : null,
- "true_next" : "egress_pkt"
- }
- ]
+ "conditionals" : []
}
],
"checksums" : [],
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/ecmp.p4info b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/ecmp.p4info
index 3c338f0..f5f1111 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/ecmp.p4info
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/ecmp.p4info
@@ -78,12 +78,12 @@
}
tables {
preamble {
- id: 33560548
- name: "ingress_pkt"
- alias: "ingress_pkt"
+ id: 33607247
+ name: "process_packet_out_table"
+ alias: "process_packet_out_table"
}
action_refs {
- id: 16835928
+ id: 16798653
}
size: 1024
}
@@ -109,17 +109,6 @@
}
size: 1024
}
-tables {
- preamble {
- id: 33608529
- name: "egress_pkt"
- alias: "egress_pkt"
- }
- action_refs {
- id: 16835663
- }
- size: 1024
-}
actions {
preamble {
id: 16800567
@@ -167,9 +156,9 @@
}
actions {
preamble {
- id: 16835928
- name: "_packet_out"
- alias: "_packet_out"
+ id: 16798653
+ name: "_process_packet_out"
+ alias: "_process_packet_out"
}
}
actions {
@@ -186,13 +175,6 @@
alias: "count_ingress"
}
}
-actions {
- preamble {
- id: 16835663
- name: "add_packet_in_hdr"
- alias: "add_packet_in_hdr"
- }
-}
counters {
preamble {
id: 302008596
@@ -263,4 +245,4 @@
name: "egress_port"
bitwidth: 9
}
-}
+}
\ No newline at end of file
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/asm.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/asm.log
index 3506a4f..2b7ff8d 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/asm.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/asm.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: asm.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.characterize.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.characterize.log
index ea74364..37c2fe6 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.characterize.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.characterize.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: mau.characterize.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
Match+Action Resource Usage
@@ -16,19 +16,16 @@
| | | | | | | | | | ver/vld | | | | | | | | Units | Units | | | |
| | | | | | | | | | | | | | | | | | (bits) | (bits) | | | |
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
-| ingress_pkt | ingress | 0 | | - | 0 (0/0/0/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| egress_pkt | egress | 0 | | - | 0 (0/0/0/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| stage 0 totals | - | - | - | - | 0 (0/0/0/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| table0 | ingress | 0 | ternary | tcam | 4 (0/1/2/0/1) | 3 | 512 / 512 (0) | 121 / 121 (0) | 4 | 5 | 1/4/0/0/0/0/0/0 | 0 / 0 (0) | 125 / 132 (7) | 5 / 8 (3) | 16 | 16 / 16 (0) | 1 in 3 (132) | 1 in 3 (132) | 91.7% / 91.7% | - / - | 100.0% / 100.0% |
+| process_packet_out_table | ingress | 0 | | - | 0 (0/0/0/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
+| stage 0 totals | - | - | - | - | 4 (0/1/2/0/1) | 3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| | | | | | | | | | | | | | | | | | | | | | |
-| table0 | ingress | 1 | ternary | tcam | 4 (0/1/2/0/1) | 3 | 512 / 512 (0) | 121 / 121 (0) | 4 | 5 | 1/4/0/0/0/0/0/0 | 0 / 0 (0) | 125 / 132 (7) | 5 / 8 (3) | 16 | 16 / 16 (0) | 1 in 3 (132) | 1 in 3 (132) | 91.7% / 91.7% | - / - | 100.0% / 100.0% |
-| stage 1 totals | - | - | - | - | 4 (0/1/2/0/1) | 3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| ecmp_group_table | ingress | 1 | exact | sram | 5 (3/0/2/0/0) | 0 | 1024 / 3072 (2048) | 32 / 22 (-10) | 0 | 20 | 0/0/0/0/0/0/4/16 | 9 / 16 (7) | 0 / 0 (0) | 52 / 42 (-10) | 9 | 0 / 0 (0) | 3 in 1 (128) | 1 in 1 (128) | - / - | 96.1% / 29.7% | - / - |
+| stage 1 totals | - | - | - | - | 5 (3/0/2/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| | | | | | | | | | | | | | | | | | | | | | |
-| ecmp_group_table | ingress | 2 | exact | sram | 5 (3/0/2/0/0) | 0 | 1024 / 3072 (2048) | 32 / 22 (-10) | 0 | 20 | 0/0/0/0/0/0/4/16 | 9 / 16 (7) | 0 / 0 (0) | 52 / 42 (-10) | 9 | 0 / 0 (0) | 3 in 1 (128) | 1 in 1 (128) | - / - | 96.1% / 29.7% | - / - |
-| stage 2 totals | - | - | - | - | 5 (3/0/2/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
-| | | | | | | | | | | | | | | | | | | | | | |
-| ingress_port_count_table | ingress | 3 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| egress_port_count_table | ingress | 3 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| stage 3 totals | - | - | - | - | 4 (0/0/4/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| ingress_port_count_table | ingress | 2 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
+| egress_port_count_table | ingress | 2 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
+| stage 2 totals | - | - | - | - | 4 (0/0/4/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| | | | | | | | | | | | | | | | | | | | | | |
| overall totals | - | - | - | - | 13 (3/1/8/0/1) | 3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
@@ -77,19 +74,11 @@
Total bits: 20
+----------------------------------------------------------------+
- ingress_pkt
+ process_packet_out_table
+----------------------------------------------------------------+
Match Overhead:
- Field --instruction_address-- [1:0] (2 bits)
- Total bits: 2
-+----------------------------------------------------------------+
- egress_pkt
-+----------------------------------------------------------------+
-Match Overhead:
- Field --instruction_address-- [1:0] (2 bits)
-
- Total bits: 2
+ Total bits: 0
+----------------------------------------------------------------+
table0
+----------------------------------------------------------------+
@@ -148,28 +137,10 @@
]
+----------------------------------------------------------------+
- ingress_pkt__action__:
+ process_packet_out_table__action__:
+----------------------------------------------------------------+
-Action _packet_out:
----------------------------
-Pack Format:
- table_word_width: 128
- memory_word_width: 128
- entries_per_table_word: 1
- number_memory_units_per_table_word: 1
- entry_list: [
- entry_number : 0
- field_list : [
- ]
- Field --padding-- is 0 bits : in bits [127:0]
-]
-
-+----------------------------------------------------------------+
- egress_pkt__action__:
-+----------------------------------------------------------------+
-
-Action add_packet_in_hdr:
+Action _process_packet_out:
---------------------------
Pack Format:
table_word_width: 128
@@ -292,35 +263,43 @@
entry_number : 7
field_list : [
]
- Field --padding-- [15:0] : in bits [127:112]
+ Field --padding-- [6:0] : in bits [127:121]
+ Field --constant-0-- [8:0] : in bits [120:112]
entry_number : 6
field_list : [
]
- Field --padding-- [15:0] : in bits [111:96]
+ Field --padding-- [6:0] : in bits [111:105]
+ Field --constant-0-- [8:0] : in bits [104:96]
entry_number : 5
field_list : [
]
- Field --padding-- [15:0] : in bits [95:80]
+ Field --padding-- [6:0] : in bits [95:89]
+ Field --constant-0-- [8:0] : in bits [88:80]
entry_number : 4
field_list : [
]
- Field --padding-- [15:0] : in bits [79:64]
+ Field --padding-- [6:0] : in bits [79:73]
+ Field --constant-0-- [8:0] : in bits [72:64]
entry_number : 3
field_list : [
]
- Field --padding-- [15:0] : in bits [63:48]
+ Field --padding-- [6:0] : in bits [63:57]
+ Field --constant-0-- [8:0] : in bits [56:48]
entry_number : 2
field_list : [
]
- Field --padding-- [15:0] : in bits [47:32]
+ Field --padding-- [6:0] : in bits [47:41]
+ Field --constant-0-- [8:0] : in bits [40:32]
entry_number : 1
field_list : [
]
- Field --padding-- [15:0] : in bits [31:16]
+ Field --padding-- [6:0] : in bits [31:25]
+ Field --constant-0-- [8:0] : in bits [24:16]
entry_number : 0
field_list : [
]
- Field --padding-- [15:0] : in bits [15:0]
+ Field --padding-- [6:0] : in bits [15:9]
+ Field --constant-0-- [8:0] : in bits [8:0]
]
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.config.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.config.log
index fafc038..44fe6ff 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.config.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.config.log
@@ -1,14 +1,14 @@
+---------------------------------------------------------------------+
| Log file: mau.config.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
Final Stage dependencies are:
(0, 'ingress') : match
(1, 'ingress') : match
(2, 'ingress') : match
- (3, 'ingress') : match
+ (3, 'ingress') : concurrent
(4, 'ingress') : concurrent
(5, 'ingress') : concurrent
(6, 'ingress') : match
@@ -29,7 +29,7 @@
(9, 'egress') : concurrent
(10, 'egress') : concurrent
(11, 'egress') : concurrent
-Action/Concurrent chaining in ingress consists of [4, 5]
+Action/Concurrent chaining in ingress consists of [3, 4, 5]
Action/Concurrent chaining in ingress consists of [7, 8, 9, 10, 11]
Action/Concurrent chaining in egress consists of [1, 2, 3, 4, 5]
Action/Concurrent chaining in egress consists of [7, 8, 9, 10, 11]
@@ -48,322 +48,13 @@
Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=0].mau_match_input_xbar_exact_match_enable to be 0x1. (old value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=0].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=1].match_input_xbar_816b_ctl_address to be 4.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=1].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 1 to come from 8-bit PHV container 4.
- That PHV byte contains {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x10. (previous value = 0x0 OR new value = 0x10)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.hash.galois_field_matrix[byte_pair_index=0][hash_bit_index=41].byte1 to be 0x2.
-Configuring dp.hashout_ctl.hash_group_ingress_enable to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_logical_table to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_thread to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_matchdata_xor_en.gateway_table_matchdata_xor_en to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid0 to be 0x3
-Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid1 to be 0x3
-Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][0] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][1] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][0] to be 0xfffffd
-Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][1] to be 0xffffff
-Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0x8
-Configuring rams.match.merge.gateway_next_table_lut[0][3] to be 0x10
-Configuring rams.match.merge.gateway_en.gateway_en to be 0x1
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_select to be 0xe
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_enable to be 0x1
-allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_logical_select to be 0x0
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_inhibit_enable to be 0x1
-Configuring rams.match.merge.gateway_payload_exact_pbus[0].gateway_payload_exact_pbus to be 0x2
-Configuring rams.match.merge.gateway_payload_data[0][1][0][0].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][1][1][0].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_data[0][1][0][1].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][1][1][1].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_match_adr[0][1][0].gateway_payload_match_adr to be 0x7ffff
-Configuring rams.match.merge.gateway_payload_match_adr[0][1][1].gateway_payload_match_adr to be 0x7ffff
-
-+------------------------------------------------------------------------
-| Working on table _condition_3 in stage 0 ---
-+------------------------------------------------------------------------
---> Stage Gateway Table for condition _condition_3 in stage 0
-Configuring rams.match.merge.predication_ctl[direction_index=1].table_thread to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring dp.imem_table_addr_egress to be 0x2 (previous_value = 0x0 OR new_value = 0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=0].adr_dist_table_thread to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=1].adr_dist_table_thread to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_egress to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_egress to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_egress to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=1].mau_match_input_xbar_exact_match_enable to be 0x1. (old value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=1].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=2][output_byte=0].match_input_xbar_816b_ctl_address to be 0.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=2][output_byte=0].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 0 to come from 8-bit PHV container 16.
- That PHV byte contains {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]}.
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=6].match_input_xbar_din_power_ctl to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x1. (previous value = 0x1 OR new value = 0x1)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.hash.galois_field_matrix[byte_pair_index=0][hash_bit_index=40].byte0 to be 0x1.
-Configuring dp.hashout_ctl.hash_group_egress_enable to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring rams.array.row[row=7].vh_xbar[search_bus_index=0].exactmatch_row_vh_xbar_ctl.exactmatch_row_vh_xbar_select to be 0.
-Configuring rams.array.row[row=7].vh_xbar[search_bus_index=0].exactmatch_row_vh_xbar_ctl.exactmatch_row_vh_xbar_enable to be 1.
-Configuring rams.array.row[row=7].vh_adr_xbar.exactmatch_row_hashadr_xbar_ctl[search_bus_index=0].enabled_3bit_muxctl_select to be 0.
-Configuring rams.array.row[row=7].vh_adr_xbar.exactmatch_row_hashadr_xbar_ctl[search_bus_index=0].enabled_3bit_muxctl_enable to be 1.
-Configuring cfg_regs.mau_cfg_lt_thread.mau_cfg_lt_thread to be 0x2. (previous value = 0x0 OR new value = 0x2)
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_data0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_data1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_hash0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_hash1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_logical_table to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_thread to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_matchdata_xor_en.gateway_table_matchdata_xor_en to be 0x0
-Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[3].gateway_table_entry_versionvalid0 to be 0x3
-Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[3].gateway_table_entry_versionvalid1 to be 0x3
-Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[3][0] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[3][1] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][0] to be 0xfffffe
-Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][1] to be 0xffffff
-Configuring rams.match.merge.gateway_inhibit_lut[1] to be 0x8
-Configuring rams.match.merge.gateway_next_table_lut[1][3] to be 0xff
-Configuring rams.match.merge.gateway_en.gateway_en to be 0x3 (previous value 0x1 OR new value 0x2)
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_select to be 0xf
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_enable to be 0x1
-allocated_result_bus = Ram Data Bus MatchResult1R 0 left_and_right is 83 bits
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[0].exact_logical_select to be 0x1
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[0].exact_inhibit_enable to be 0x1
-Configuring rams.match.merge.gateway_payload_exact_pbus[0].gateway_payload_exact_pbus to be 0x3 (previous value 0x2 OR new value 0x1)
-Configuring rams.match.merge.gateway_payload_data[0][0][0][0].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][0][1][0].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_data[0][0][0][1].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][0][1][1].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_match_adr[0][0][0].gateway_payload_match_adr to be 0x7ffff
-Configuring rams.match.merge.gateway_payload_match_adr[0][0][1].gateway_payload_match_adr to be 0x7ffff
-
-+------------------------------------------------------------------------
-| Working on table ingress_pkt__action__ in stage 0 ---
-+------------------------------------------------------------------------
---> Action Data Table ingress_pkt__action__ with logical_table_id 0 that is reference type is 'direct'
-
-+------------------------------------------------------------------------
-| Working on table ingress_pkt in stage 0 ---
-+------------------------------------------------------------------------
---> Match Table with no key ingress_pkt with logical_table_id 0
-allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
-Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_select to be 0 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_select to be 0 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.mau_action_instruction_adr_default[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_default to be 0x0.
-Configuring rams.match.merge.mau_action_instruction_adr_mask[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_mask to be 0x1.
-Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x10.
-Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=0][entry_index=0].mau_action_instruction_adr_map_data to be 0x2080.
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=0][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
-Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=0].imem_subword16_instr to be 0x74412.
-Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=0].imem_subword16_color to be 1.
-Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=0].imem_subword16_parity to be 0.
-Micro instruction added in VLIW 0 for 16-bit position 2 for table ingress_pkt.
- Assembled as 0x74412 (or decimal 476178)
- Micro Instruction deposit-field for PHV Container 130 has bit width 23
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-
-Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=0].imem_subword8_instr to be 0x74d84.
-Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=0].imem_subword8_color to be 1.
-Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=0].imem_subword8_parity to be 0.
-Micro instruction added in VLIW 0 for 8-bit position 4 for table ingress_pkt.
- Assembled as 0x74d84 (or decimal 478596)
- Micro Instruction deposit-field for PHV Container 68 has bit width 20
- Field Src2 [3:0] : 0x4 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x10. (previous value = 0x0 OR new value = 0x10)
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x6. (previous value = 0x0 OR new value = 0x6)
-Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=1].action_instruction_adr_payload_shifter_en to be 1.
-
-+------------------------------------------------------------------------
-| Working on table egress_pkt__action__ in stage 0 ---
-+------------------------------------------------------------------------
---> Action Data Table egress_pkt__action__ with logical_table_id 1 that is reference type is 'direct'
-
-+------------------------------------------------------------------------
-| Working on table egress_pkt in stage 0 ---
-+------------------------------------------------------------------------
---> Match Table with no key egress_pkt with logical_table_id 1
-allocated_result_bus = Ram Data Bus MatchResult1R 0 left_and_right is 83 bits
-Configuring dp.imem_table_addr_egress to be 0x2 (previous_value = 0x2 OR new_value = 0x2).
-Configuring rams.match.merge.predication_ctl[direction_index=1].table_thread to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_egress to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_egress to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_egress to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=0].adr_dist_table_thread to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=1].adr_dist_table_thread to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=0].enabled_4bit_muxctl_select to be 1 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=0].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=0].enabled_4bit_muxctl_select to be 1 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=0].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.mau_action_instruction_adr_default[table_type_index=0][physical_result_bus=0].mau_action_instruction_adr_default to be 0x0.
-Configuring rams.match.merge.mau_action_instruction_adr_mask[table_type_index=0][physical_result_bus=0].mau_action_instruction_adr_mask to be 0x1.
-Configuring rams.match.merge.next_table_format_data[logical_table_id=1].match_next_table_adr_miss_value to be 0xff.
-Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x3 (previous_value=0x1 OR new_value=0x2).
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=0].mau_action_instruction_adr_map_data to be 0x2080.
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
-Configuring dp.imem.imem_subword8[unit_number=18][vliw_instruction_number=0].imem_subword8_instr to be 0x592.
-Configuring dp.imem.imem_subword8[unit_number=18][vliw_instruction_number=0].imem_subword8_color to be 1.
-Configuring dp.imem.imem_subword8[unit_number=18][vliw_instruction_number=0].imem_subword8_parity to be 0.
-Micro instruction added in VLIW 0 for 8-bit position 18 for table egress_pkt.
- Assembled as 0x592 (or decimal 1426)
- Micro Instruction deposit-field for PHV Container 82 has bit width 20
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x0 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x0 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-Configuring dp.imem.imem_subword16[unit_number=17][vliw_instruction_number=0].imem_subword16_instr to be 0x39fc01.
-Configuring dp.imem.imem_subword16[unit_number=17][vliw_instruction_number=0].imem_subword16_color to be 1.
-Configuring dp.imem.imem_subword16[unit_number=17][vliw_instruction_number=0].imem_subword16_parity to be 0.
-Micro instruction added in VLIW 0 for 16-bit position 17 for table egress_pkt.
- Assembled as 0x39fc01 (or decimal 3800065)
- Micro Instruction deposit-field for PHV Container 145 has bit width 23
- Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
-
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=6].actionmux_din_power_ctl to be 0x4. (previous value = 0x0 OR new value = 0x4)
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=10].actionmux_din_power_ctl to be 0x3. (previous value = 0x0 OR new value = 0x3)
-Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=0].action_instruction_adr_payload_shifter_en to be 1.
-+------------------------------------------------------------------------
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 10.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 0.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 1.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 10.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay1 to be 0.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 1.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=0].adr_dist_pipe_delay to be 0.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=1].adr_dist_pipe_delay to be 0.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=0].adr_dist_pipe_delay to be 0.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=1].adr_dist_pipe_delay to be 0.
-Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x3.
-Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=1].exact_match_phys_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x3.
-Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=1].exact_match_phys_result_en to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=0].exact_match_phys_result_thread to be 0x1.
-Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=1].exact_match_phys_result_thread to be 0x0.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_internal_delay_fifo to be 14.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_output_delay_fifo to be 19.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_delay_fifo_en to be 1.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_internal_delay_fifo to be 14.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_output_delay_fifo to be 0.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_delay_fifo_en to be 1.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_ingress to be 0x0.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_egress to be 0x0.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_ingress to be 0x0.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_egress to be 0x0.
---------------------------------------------
-Configuration for unused statistics ALUs.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=0].mau_cfg_stats_alu_lt to be 0xf.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=1].mau_cfg_stats_alu_lt to be 0xf.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=2].mau_cfg_stats_alu_lt to be 0xf.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=3].mau_cfg_stats_alu_lt to be 0xf.
-+------------------------------------------------------------------------
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
-Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_delay to be 0.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_delay to be 0.
-Configuring rams.match.merge.tcam_match_error_ctl[dir=1].tcam_match_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.tind_ecc_error_ctl[dir=1].tind_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_delay to be 0.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_delay to be 0.
-+------------------------------------------------------------------------
-Configuring dp.action_output_delay[direction_index=0].action_output_delay to be 17.
-Configuring dp.pipelength_added_stages[direction_index=0].pipelength_added_stages to be 0.
-Configuring dp.cur_stage_dependency_on_prev[direction_index=0].cur_stage_dependency_on_prev to be 0.
-Configuring dp.next_stage_dependency_on_cur[direction_index=0].next_stage_dependency_on_cur to be 0.
-Configuring dp.action_output_delay[direction_index=1].action_output_delay to be 17.
-Configuring dp.pipelength_added_stages[direction_index=1].pipelength_added_stages to be 0.
-Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 0.
-Configuring dp.next_stage_dependency_on_cur[direction_index=1].next_stage_dependency_on_cur to be 2.
-Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 0.
-Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 0.
-Configuring dp.phv_fifo_enable.phv_fifo_ingress_action_output_enable to be 1.
-Configuring dp.phv_fifo_enable.phv_fifo_ingress_final_output_enable to be 0.
-Configuring dp.phv_fifo_enable.phv_fifo_egress_action_output_enable to be 1.
-Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
-
-+------------------------------------------------------------------------
-| MAU Stage 1
-+------------------------------------------------------------------------
-
-+------------------------------------------------------------------------
-| Working on table _condition_1 in stage 1 ---
-+------------------------------------------------------------------------
---> Stage Gateway Table for condition _condition_1 in stage 1
-Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=0].mau_match_input_xbar_exact_match_enable to be 0x2. (old value = 0x0 OR new value = 0x2)
Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=0].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=12].match_input_xbar_816b_ctl_address to be 4.
+Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=12].match_input_xbar_816b_ctl_address to be 3.
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=12].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 12 to come from 8-bit PHV container 4.
+Configuring match input crossbar byte 12 to come from 8-bit PHV container 3.
That PHV byte contains {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x10. (previous value = 0x0 OR new value = 0x10)
+Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x8. (previous value = 0x0 OR new value = 0x8)
Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x2. (previous value = 0x0 OR new value = 0x2)
Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
Configuring dp.xbar_hash.hash.galois_field_matrix[byte_pair_index=6][hash_bit_index=40].byte0 to be 0x2.
@@ -386,7 +77,7 @@
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][0] to be 0xffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][1] to be 0xfffffe
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0x10
-Configuring rams.match.merge.gateway_next_table_lut[0][4] to be 0x30
+Configuring rams.match.merge.gateway_next_table_lut[0][4] to be 0x1
Configuring rams.match.merge.gateway_en.gateway_en to be 0x1
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_select to be 0xf
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_enable to be 0x1
@@ -396,7 +87,110 @@
Configuring rams.match.merge.gateway_payload_match_adr[0][0][1].gateway_payload_match_adr to be 0x7ffff
+------------------------------------------------------------------------
-| Working on table table0__action__ in stage 1 ---
+| Working on table process_packet_out_table__action__ in stage 0 ---
++------------------------------------------------------------------------
+--> Action Data Table process_packet_out_table__action__ with logical_table_id 1 that is reference type is 'direct'
+
++------------------------------------------------------------------------
+| Working on table process_packet_out_table in stage 0 ---
++------------------------------------------------------------------------
+--> Match Table with no key process_packet_out_table with logical_table_id 1
+allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
+Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_select to be 1 (logical table id).
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_select to be 1 (logical table id).
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
+Configuring rams.match.merge.mau_action_instruction_adr_default[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_default to be 0x40.
+Configuring rams.match.merge.mau_action_instruction_adr_mask[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_mask to be 0x0.
+Configuring rams.match.merge.next_table_format_data[logical_table_id=1].match_next_table_adr_miss_value to be 0x20.
+Configuring rams.match.merge.next_table_format_data[logical_table_id=1].match_next_table_adr_default to be 0x20.
+Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x2 (previous_value=0x0 OR new_value=0x2).
+Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=0].mau_action_instruction_adr_map_data to be 0x45.
+Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=2].imem_subword16_instr to be 0x74412.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=2].imem_subword16_color to be 1.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=2].imem_subword16_parity to be 0.
+Micro instruction added in VLIW 2 for 16-bit position 2 for table process_packet_out_table.
+ Assembled as 0x74412 (or decimal 476178)
+ Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=2].imem_subword8_instr to be 0x74d83.
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=2].imem_subword8_color to be 1.
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=2].imem_subword8_parity to be 1.
+Micro instruction added in VLIW 2 for 8-bit position 3 for table process_packet_out_table.
+ Assembled as 0x74d83 (or decimal 478595)
+ Micro Instruction deposit-field for PHV Container 67 has bit width 20
+ Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
+ Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
+ Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
+ Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
+
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x8. (previous value = 0x0 OR new value = 0x8)
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x6. (previous value = 0x0 OR new value = 0x6)
+--> Stage Gateway Table for condition process_packet_out_table_always_true_condition in stage 0
+Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=0].mau_match_input_xbar_exact_match_enable to be 0x2. (old value = 0x2 OR new value = 0x0)
+Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=0].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
+Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x2. (previous value = 0x2 OR new value = 0x0)
+Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
+Configuring dp.hashout_ctl.hash_group_ingress_enable to be 0x1. (previous value = 0x1 OR new value = 0x1)
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data0_select to be 0x1
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data1_select to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash0_select to be 0x1
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash1_select to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_logical_table to be 0x1
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_thread to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_matchdata_xor_en.gateway_table_matchdata_xor_en to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid0 to be 0x3
+Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid1 to be 0x3
+Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][0] to be 0xffffffff
+Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][1] to be 0xffffffff
+Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][0] to be 0xffffff
+Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][1] to be 0xffffff
+Configuring rams.match.merge.gateway_inhibit_lut[1] to be 0x8
+Configuring rams.match.merge.gateway_next_table_lut[1][3] to be 0x20
+Configuring rams.match.merge.gateway_inhibit_lut[1] to be 0x18 (previous value 0x8 OR new value 0x10)
+Configuring rams.match.merge.gateway_next_table_lut[1][4] to be 0x20
+Configuring rams.match.merge.gateway_en.gateway_en to be 0x3 (previous value 0x1 OR new value 0x2)
+Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_select to be 0xe
+Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_enable to be 0x1
+allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
+Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_logical_select to be 0x1
+Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_inhibit_enable to be 0x1
+Configuring rams.match.merge.gateway_payload_exact_pbus[0].gateway_payload_exact_pbus to be 0x2
+Configuring rams.match.merge.gateway_payload_data[0][1][0][0].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_data[0][1][1][0].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_data[0][1][0][1].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_data[0][1][1][1].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_match_adr[0][1][0].gateway_payload_match_adr to be 0x7ffff
+Configuring rams.match.merge.gateway_payload_match_adr[0][1][1].gateway_payload_match_adr to be 0x7ffff
+Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=1].action_instruction_adr_payload_shifter_en to be 1.
+
++------------------------------------------------------------------------
+| Working on table table0__action__ in stage 0 ---
+------------------------------------------------------------------------
--> Action Data Table table0__action__ with logical_table_id 0 that is reference type is 'direct'
Configuring rams.array.row[row=6].action_hv_xbar.action_hv_ixbar_input_bytemask[array_half=1].action_hv_ixbar_input_bytemask to be 0x3.
@@ -465,12 +259,12 @@
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=10].match_input_xbar_816b_ctl_enable to be 1.
Configuring match input crossbar byte 10 to come from 16-bit PHV container 3.
That PHV byte contains {ipv4.srcAddr[7:0]}.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=11].match_input_xbar_816b_ctl_address to be 1.
+Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=11].match_input_xbar_816b_ctl_address to be 0.
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=11].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 11 to come from 8-bit PHV container 1.
+Configuring match input crossbar byte 11 to come from 8-bit PHV container 0.
That PHV byte contains {ipv4.srcAddr[23:16]}.
Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=0].match_input_xbar_din_power_ctl to be 0x26. (previous value = 0x0 OR new value = 0x26)
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x12. (previous value = 0x10 OR new value = 0x2)
+Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x9. (previous value = 0x8 OR new value = 0x1)
Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=8].match_input_xbar_din_power_ctl to be 0x8. (previous value = 0x0 OR new value = 0x8)
Configuring dp.xbar_hash.hash.hash_seed[output_bit=0].hash_seed to be 0x1 (previous value = 0x0 OR new value = 0x1)
Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x3. (previous value = 0x2 OR new value = 0x3)
@@ -496,15 +290,15 @@
Configuring rams.match.merge.mau_hash_group_xbar_ctl[output_type_index=1][control_group_index=0].mau_hash_group_xbar_ctl to be 0x8 (old value = 0x0 OR new value = 0x8).
+------------------------------------------------------------------------
-| Working on table table0 in stage 1 ---
+| Working on table table0 in stage 0 ---
+------------------------------------------------------------------------
--> Ternary Match Table table0 with logical_table_id 0
-Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
+Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x1).
Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=1][result_bus_number=0].enabled_4bit_muxctl_select to be 0 (logical table id).
Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=1][result_bus_number=0].enabled_4bit_muxctl_enable to be 1.
Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=3][result_bus_number=0].enabled_4bit_muxctl_select to be 0 (logical table id).
@@ -517,9 +311,9 @@
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=1][logical_table=0][entry_index=0].mau_action_instruction_adr_map_data to be 0x870a080.
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=1][logical_table=0][entry_index=1].mau_action_instruction_adr_map_data to be 0x44.
Configuring rams.match.merge.next_table_map_en to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data0 to be 0x30.
-Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data1 to be 0x20.
-Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x30.
+Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data0 to be 0x20.
+Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data1 to be 0x10.
+Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x20.
Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_mask to be 0x1.
Configuring rams.match.merge.mau_immediate_data_mask[table_type_index=1][result_bus_number=0].mau_immediate_data_mask to be 0x0.
Configuring rams.match.merge.mau_stats_adr_mask[table_type_index=1][result_bus_number=0].mau_stats_adr_mask to be 0xffffe.
@@ -583,19 +377,19 @@
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=141].match_input_xbar_816b_ctl_enable to be 1.
Configuring match input crossbar byte 141 to come from 16-bit PHV container 4.
That PHV byte contains {ethernet.dstAddr[7:0]}.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=142].match_input_xbar_816b_ctl_address to be 3.
+Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=142].match_input_xbar_816b_ctl_address to be 2.
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=142].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 142 to come from 8-bit PHV container 3.
+Configuring match input crossbar byte 142 to come from 8-bit PHV container 2.
That PHV byte contains {ethernet.srcAddr[39:32]}.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=143].match_input_xbar_816b_ctl_address to be 2.
+Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=143].match_input_xbar_816b_ctl_address to be 1.
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=143].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 143 to come from 8-bit PHV container 2.
+Configuring match input crossbar byte 143 to come from 8-bit PHV container 1.
That PHV byte contains {ethernet.dstAddr[47:40]}.
Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=0].match_input_xbar_din_power_ctl to be 0x3e. (previous value = 0x26 OR new value = 0x18)
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x1e. (previous value = 0x12 OR new value = 0xc)
+Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0xf. (previous value = 0x9 OR new value = 0x6)
Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=8].match_input_xbar_din_power_ctl to be 0x39. (previous value = 0x8 OR new value = 0x31)
---> Idletime Table for match table table0 in stage 1
+--> Idletime Table for match table table0 in stage 0
Looking at Map RAM: Row 7 Unit 0
Configuring rams.map_alu.row[row=7].vh_xbars.adr_dist_idletime_adr_xbar_ctl[map_ram_index=0].enabled_4bit_muxctl_select to be select of 0.
Configuring rams.map_alu.row[row=7].vh_xbars.adr_dist_idletime_adr_xbar_ctl[map_ram_index=0].enabled_4bit_muxctl_select to be select of 1.
@@ -652,7 +446,7 @@
Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x4. (previous value = 0x0 OR new value = 0x4)
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x6. (previous value = 0x6 OR new value = 0x4)
Configuring dp.imem.imem_subword16[unit_number=6][vliw_instruction_number=1].imem_subword16_instr to be 0xc7a06.
Configuring dp.imem.imem_subword16[unit_number=6][vliw_instruction_number=1].imem_subword16_color to be 0.
Configuring dp.imem.imem_subword16[unit_number=6][vliw_instruction_number=1].imem_subword16_parity to be 1.
@@ -677,13 +471,28 @@
Field opcode [9:0] : 0x31e (10 bits in instruction bits [19:10])
Field unused [2:0] : 0x0 (3 bits in instruction bits [22:20])
-Configuring dp.imem.imem_subword8[unit_number=0][vliw_instruction_number=1].imem_subword8_instr to be 0x590.
-Configuring dp.imem.imem_subword8[unit_number=0][vliw_instruction_number=1].imem_subword8_color to be 1.
-Configuring dp.imem.imem_subword8[unit_number=0][vliw_instruction_number=1].imem_subword8_parity to be 1.
-Micro instruction added in VLIW 1 for 8-bit position 0 for table table0.
- Assembled as 0x590 (or decimal 1424)
- Micro Instruction deposit-field for PHV Container 64 has bit width 20
- Field Src2 [3:0] : 0x0 (4 bits in instruction bits [3:0])
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=1].imem_subword16_instr to be 0x4602.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=1].imem_subword16_color to be 1.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=1].imem_subword16_parity to be 1.
+Micro instruction added in VLIW 1 for 16-bit position 2 for table table0.
+ Assembled as 0x4602 (or decimal 17922)
+ Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=1].imem_subword8_instr to be 0x593.
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=1].imem_subword8_color to be 1.
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=1].imem_subword8_parity to be 1.
+Micro instruction added in VLIW 1 for 8-bit position 3 for table table0.
+ Assembled as 0x593 (or decimal 1427)
+ Micro Instruction deposit-field for PHV Container 67 has bit width 20
+ Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -692,14 +501,30 @@
Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring dp.imem.imem_subword8[unit_number=5][vliw_instruction_number=2].imem_subword8_instr to be 0xb7d95.
-Configuring dp.imem.imem_subword8[unit_number=5][vliw_instruction_number=2].imem_subword8_color to be 0.
-Configuring dp.imem.imem_subword8[unit_number=5][vliw_instruction_number=2].imem_subword8_parity to be 1.
-Micro instruction added in VLIW 2 for 8-bit position 5 for table table0.
- Assembled as 0xb7d95 (or decimal 753045)
- Micro Instruction deposit-field for PHV Container 69 has bit width 20
- Field Src2 [3:0] : 0x5 (4 bits in instruction bits [3:0])
+Configuring dp.imem.imem_subword16[unit_number=1][vliw_instruction_number=1].imem_subword16_instr to be 0x39fc01.
+Configuring dp.imem.imem_subword16[unit_number=1][vliw_instruction_number=1].imem_subword16_color to be 1.
+Configuring dp.imem.imem_subword16[unit_number=1][vliw_instruction_number=1].imem_subword16_parity to be 0.
+Micro instruction added in VLIW 1 for 16-bit position 1 for table table0.
+ Assembled as 0x39fc01 (or decimal 3800065)
+ Micro Instruction deposit-field for PHV Container 129 has bit width 23
+ Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
+
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x8. (previous value = 0x8 OR new value = 0x8)
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x7. (previous value = 0x6 OR new value = 0x7)
+Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=2].imem_subword8_instr to be 0xb7d94.
+Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=2].imem_subword8_color to be 0.
+Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=2].imem_subword8_parity to be 0.
+Micro instruction added in VLIW 2 for 8-bit position 4 for table table0.
+ Assembled as 0xb7d94 (or decimal 753044)
+ Micro Instruction deposit-field for PHV Container 68 has bit width 20
+ Field Src2 [3:0] : 0x4 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -708,7 +533,7 @@
Field right_rotate [2:0] : 0x3 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x1 (1 bits in instruction bits [19:19])
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x21. (previous value = 0x1 OR new value = 0x20)
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x18. (previous value = 0x8 OR new value = 0x10)
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=1][result_bus=0].idletime_adr_payload_shifter_en to be 1.
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=1][result_bus=0].stats_adr_payload_shifter_en to be 1.
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=1][result_bus=0].actiondata_adr_payload_shifter_en to be 1.
@@ -822,7 +647,7 @@
Configuring cfg_regs.mau_cfg_movereg_tcam_only.mau_cfg_movereg_tcam_only to be 0x1. (previous value = 0x0 OR new value = 0x1)
+------------------------------------------------------------------------
-| Working on table table0_counter in stage 1 ---
+| Working on table table0_counter in stage 0 ---
+------------------------------------------------------------------------
Configuring rams.array.switchbox.row[row=6].ctl.r_stats_alu_o_mux_select.r_stats_alu_o_sel_stats_rd_r_i to be 1.
Configuring rams.array.row[row=6].ram[col=6].unit_ram_ctl.match_ram_write_data_mux_select to be select of 0.
@@ -908,24 +733,24 @@
Configuring rams.match.adrdist.movereg_ad_stats_alu_to_logical_xbar_ctl[logical_index=0].movereg_ad_stats_alu_to_logical_xbar_ctl be 0x7. ( previous value = 0x0 OR new value = 0x7)
Configuring rams.match.adrdist.mau_ad_stats_virt_lt[meter_alu_index=3].mau_ad_stats_virt_lt be 0x1.
+------------------------------------------------------------------------
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 21.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 9.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 3.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 12.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 1.
Configuring rams.match.merge.exact_match_delay_thread[copy_index=0].exact_match_delay_thread to be 0x1. (previous value = 0x0 OR new value = 0x1)
Configuring rams.match.merge.exact_match_delay_thread[copy_index=1].exact_match_delay_thread to be 0x1. (previous value = 0x0 OR new value = 0x1)
Configuring rams.match.merge.exact_match_delay_thread[copy_index=2].exact_match_delay_thread to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 10.
Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay1 to be 0.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 1.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=0].adr_dist_pipe_delay to be 0.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=1].adr_dist_pipe_delay to be 0.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=0].adr_dist_pipe_delay to be 0.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=1].adr_dist_pipe_delay to be 0.
-Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x1.
-Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x3.
+Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x2.
+Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x2.
Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=1].exact_match_phys_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x2.
Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=1].exact_match_phys_result_en to be 0x0.
Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=0].exact_match_phys_result_thread to be 0x0.
Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=1].exact_match_phys_result_thread to be 0x0.
@@ -948,18 +773,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -979,28 +804,28 @@
Configuring dp.next_stage_dependency_on_cur[direction_index=0].next_stage_dependency_on_cur to be 0.
Configuring dp.action_output_delay[direction_index=1].action_output_delay to be 17.
Configuring dp.pipelength_added_stages[direction_index=1].pipelength_added_stages to be 0.
-Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 2.
+Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 0.
Configuring dp.next_stage_dependency_on_cur[direction_index=1].next_stage_dependency_on_cur to be 2.
-Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 1.
-Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 2.
+Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 0.
+Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 0.
Configuring dp.phv_fifo_enable.phv_fifo_ingress_action_output_enable to be 1.
Configuring dp.phv_fifo_enable.phv_fifo_ingress_final_output_enable to be 0.
Configuring dp.phv_fifo_enable.phv_fifo_egress_action_output_enable to be 1.
Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+------------------------------------------------------------------------
-| MAU Stage 2
+| MAU Stage 1
+------------------------------------------------------------------------
+------------------------------------------------------------------------
-| Working on table ecmp_group_table__action__ in stage 2 ---
+| Working on table ecmp_group_table__action__ in stage 1 ---
+------------------------------------------------------------------------
--> Action Data Table ecmp_group_table__action__ with logical_table_id 0 that is reference type is 'direct'
Configuring rams.match.adrdist.immediate_data_16b_ixbar_ctl[logical_table_concat_hi_lo_half=0].enabled_4bit_muxctl_select to be 4.
Configuring rams.match.adrdist.immediate_data_16b_ixbar_ctl[logical_table_concat_hi_lo_half=0].enabled_4bit_muxctl_enable to be 1.
+------------------------------------------------------------------------
-| Working on table ecmp_group_table in stage 2 ---
+| Working on table ecmp_group_table in stage 1 ---
+------------------------------------------------------------------------
--> Hash Match Table ecmp_group_table with logical_table_id 0
Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
@@ -1020,8 +845,8 @@
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=0][entry_index=0].mau_action_instruction_adr_map_data to be 0x41.
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=0][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
Configuring rams.match.merge.next_table_map_en to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data0 to be 0x30.
-Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x30.
+Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data0 to be 0x20.
+Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x20.
Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_mask to be 0x0.
Configuring rams.match.merge.mau_immediate_data_mask[table_type_index=0][result_bus_number=14].mau_immediate_data_mask to be 0xffff.
Configuring rams.match.merge.mau_stats_adr_mask[table_type_index=0][result_bus_number=14].mau_stats_adr_mask to be 0xffffe.
@@ -1818,7 +1643,7 @@
Configuring rams.match.merge.col[col_number=4].hitmap_output_map[hit_signal=14].enabled_4bit_muxctl_enable to be 1.
+------------------------------------------------------------------------
-| Working on table ecmp_group_table_counter in stage 2 ---
+| Working on table ecmp_group_table_counter in stage 1 ---
+------------------------------------------------------------------------
Configuring rams.array.switchbox.row[row=6].ctl.r_stats_alu_o_mux_select.r_stats_alu_o_sel_stats_rd_r_i to be 1.
Configuring rams.array.row[row=6].ram[col=6].unit_ram_ctl.match_ram_write_data_mux_select to be select of 0.
@@ -1940,18 +1765,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1981,13 +1806,13 @@
Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+------------------------------------------------------------------------
-| MAU Stage 3
+| MAU Stage 2
+------------------------------------------------------------------------
+------------------------------------------------------------------------
-| Working on table _condition_2 in stage 3 ---
+| Working on table _condition_2 in stage 2 ---
+------------------------------------------------------------------------
---> Stage Gateway Table for condition _condition_2 in stage 3
+--> Stage Gateway Table for condition _condition_2 in stage 2
Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
@@ -2036,7 +1861,7 @@
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][0] to be 0xffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][1] to be 0xffff3f
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0x8
-Configuring rams.match.merge.gateway_next_table_lut[0][3] to be 0x31
+Configuring rams.match.merge.gateway_next_table_lut[0][3] to be 0x21
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[2].gateway_table_entry_versionvalid0 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[2].gateway_table_entry_versionvalid1 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[2][0] to be 0xffffffff
@@ -2044,15 +1869,15 @@
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[2][0] to be 0xffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[2][1] to be 0xff7fff
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0xc (previous value 0x8 OR new value 0x4)
-Configuring rams.match.merge.gateway_next_table_lut[0][2] to be 0x31
+Configuring rams.match.merge.gateway_next_table_lut[0][2] to be 0x21
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[1].gateway_table_entry_versionvalid0 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[1].gateway_table_entry_versionvalid1 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[1][0] to be 0xffffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[1][1] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[1][0] to be 0xffff
+Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[1][0] to be 0x1ffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[1][1] to be 0xffff
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0xe (previous value 0xc OR new value 0x2)
-Configuring rams.match.merge.gateway_next_table_lut[0][1] to be 0x31
+Configuring rams.match.merge.gateway_next_table_lut[0][1] to be 0x21
Configuring rams.match.merge.gateway_en.gateway_en to be 0x1
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_select to be 0xf
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_enable to be 0x1
@@ -2068,12 +1893,12 @@
Configuring rams.match.merge.gateway_payload_match_adr[0][1][1].gateway_payload_match_adr to be 0x7ffff
+------------------------------------------------------------------------
-| Working on table ingress_port_count_table__action__ in stage 3 ---
+| Working on table ingress_port_count_table__action__ in stage 2 ---
+------------------------------------------------------------------------
--> Action Data Table ingress_port_count_table__action__ with logical_table_id 0 that is reference type is 'direct'
+------------------------------------------------------------------------
-| Working on table ingress_port_count_table in stage 3 ---
+| Working on table ingress_port_count_table in stage 2 ---
+------------------------------------------------------------------------
--> Match Table with no key ingress_port_count_table with logical_table_id 0
allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
@@ -2099,12 +1924,12 @@
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=1].action_instruction_adr_payload_shifter_en to be 1.
+------------------------------------------------------------------------
-| Working on table egress_port_count_table__action__ in stage 3 ---
+| Working on table egress_port_count_table__action__ in stage 2 ---
+------------------------------------------------------------------------
--> Action Data Table egress_port_count_table__action__ with logical_table_id 1 that is reference type is 'direct'
+------------------------------------------------------------------------
-| Working on table egress_port_count_table in stage 3 ---
+| Working on table egress_port_count_table in stage 2 ---
+------------------------------------------------------------------------
--> Match Table with no key egress_port_count_table with logical_table_id 1
allocated_result_bus = Ram Data Bus MatchResult1R 0 left_and_right is 83 bits
@@ -2126,7 +1951,7 @@
Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x3 (previous_value=0x1 OR new_value=0x2).
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=0].mau_action_instruction_adr_map_data to be 0x40.
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
---> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 3
+--> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 2
Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
@@ -2171,7 +1996,7 @@
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=0].action_instruction_adr_payload_shifter_en to be 1.
+------------------------------------------------------------------------
-| Working on table ingress_port_counter in stage 3 ---
+| Working on table ingress_port_counter in stage 2 ---
+------------------------------------------------------------------------
Configuring rams.array.switchbox.row[row=4].ctl.r_stats_alu_o_mux_select.r_stats_alu_o_sel_stats_rd_r_i to be 1.
Configuring rams.array.row[row=4].ram[col=6].unit_ram_ctl.match_ram_write_data_mux_select to be select of 0.
@@ -2255,7 +2080,7 @@
Configuring rams.match.adrdist.mau_ad_stats_virt_lt[meter_alu_index=2].mau_ad_stats_virt_lt be 0x1.
+------------------------------------------------------------------------
-| Working on table egress_port_counter in stage 3 ---
+| Working on table egress_port_counter in stage 2 ---
+------------------------------------------------------------------------
Configuring rams.array.switchbox.row[row=6].ctl.r_stats_alu_o_mux_select.r_stats_alu_o_sel_stats_rd_r_i to be 1.
Configuring rams.array.row[row=6].ram[col=6].unit_ram_ctl.match_ram_write_data_mux_select to be select of 0.
@@ -2374,18 +2199,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2415,6 +2240,88 @@
Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+------------------------------------------------------------------------
+| MAU Stage 3
++------------------------------------------------------------------------
++------------------------------------------------------------------------
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay1 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=0].adr_dist_pipe_delay to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=1].adr_dist_pipe_delay to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=0].adr_dist_pipe_delay to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=1].adr_dist_pipe_delay to be 0.
+Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=1].exact_match_phys_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=1].exact_match_phys_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=0].exact_match_phys_result_thread to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=1].exact_match_phys_result_thread to be 0x0.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_internal_delay_fifo to be 14.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_output_delay_fifo to be 0.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_delay_fifo_en to be 1.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_internal_delay_fifo to be 14.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_output_delay_fifo to be 0.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_delay_fifo_en to be 1.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_ingress to be 0x0.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_egress to be 0x0.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_ingress to be 0x0.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_egress to be 0x0.
+--------------------------------------------
+Configuration for unused statistics ALUs.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=0].mau_cfg_stats_alu_lt to be 0xf.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=1].mau_cfg_stats_alu_lt to be 0xf.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=2].mau_cfg_stats_alu_lt to be 0xf.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=3].mau_cfg_stats_alu_lt to be 0xf.
++------------------------------------------------------------------------
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
+Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_delay to be 0.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_delay to be 0.
+Configuring rams.match.merge.tcam_match_error_ctl[dir=1].tcam_match_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.tind_ecc_error_ctl[dir=1].tind_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_delay to be 0.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_delay to be 0.
++------------------------------------------------------------------------
+Configuring dp.action_output_delay[direction_index=0].action_output_delay to be 17.
+Configuring dp.pipelength_added_stages[direction_index=0].pipelength_added_stages to be 0.
+Configuring dp.cur_stage_dependency_on_prev[direction_index=0].cur_stage_dependency_on_prev to be 2.
+Configuring dp.next_stage_dependency_on_cur[direction_index=0].next_stage_dependency_on_cur to be 2.
+Configuring dp.action_output_delay[direction_index=1].action_output_delay to be 17.
+Configuring dp.pipelength_added_stages[direction_index=1].pipelength_added_stages to be 0.
+Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 2.
+Configuring dp.next_stage_dependency_on_cur[direction_index=1].next_stage_dependency_on_cur to be 2.
+Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 0.
+Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 3.
+Configuring dp.phv_fifo_enable.phv_fifo_ingress_action_output_enable to be 1.
+Configuring dp.phv_fifo_enable.phv_fifo_ingress_final_output_enable to be 0.
+Configuring dp.phv_fifo_enable.phv_fifo_egress_action_output_enable to be 1.
+Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+
++------------------------------------------------------------------------
| MAU Stage 4
+------------------------------------------------------------------------
+------------------------------------------------------------------------
@@ -2456,18 +2363,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2538,18 +2445,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2620,18 +2527,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2702,18 +2609,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2784,18 +2691,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2866,18 +2773,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2948,18 +2855,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -3030,18 +2937,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -3071,7 +2978,7 @@
Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+------------------------------------------------------------------------
-| Number of configuration field values set in Match-Action Stages: 2168
+| Number of configuration field values set in Match-Action Stages: 2100
+------------------------------------------------------------------------
+------------------------------------------------------------------------
@@ -3084,10 +2991,10 @@
| Stage Number | Exact | Ternary | Statistics | Meter | Selector | Stateful | Dependency |
| | | | | LPF | (max words) | | to Previous |
-----------------------------------------------------------------------------------------------
-| 0 | Yes | No | No | No | No (0) | No | match |
-| 1 | No | Yes | Yes | No | No (0) | No | match |
+| 0 | Yes | Yes | Yes | No | No (0) | No | match |
+| 1 | Yes | No | Yes | No | No (0) | No | match |
| 2 | Yes | No | Yes | No | No (0) | No | match |
-| 3 | Yes | No | Yes | No | No (0) | No | match |
+| 3 | Yes* | No | Yes* | No | No (0) | No | concurrent |
| 4 | Yes* | No | Yes* | No | No (0) | No | concurrent |
| 5 | Yes* | No | Yes* | No | No (0) | No | concurrent |
| 6 | No | No | No | No | No (0) | No | match |
@@ -3106,12 +3013,12 @@
| Stage Number | Exact | Ternary | Statistics | Meter | Selector | Stateful | Dependency |
| | | | | LPF | (max words) | | to Previous |
-----------------------------------------------------------------------------------------------
-| 0 | Yes | No | No | No | No (0) | No | match |
-| 1 | Yes* | No | No | No | No (0) | No | concurrent |
-| 2 | Yes* | No | No | No | No (0) | No | concurrent |
-| 3 | Yes* | No | No | No | No (0) | No | concurrent |
-| 4 | Yes* | No | No | No | No (0) | No | concurrent |
-| 5 | Yes* | No | No | No | No (0) | No | concurrent |
+| 0 | No | No | No | No | No (0) | No | match |
+| 1 | No | No | No | No | No (0) | No | concurrent |
+| 2 | No | No | No | No | No (0) | No | concurrent |
+| 3 | No | No | No | No | No (0) | No | concurrent |
+| 4 | No | No | No | No | No (0) | No | concurrent |
+| 5 | No | No | No | No | No (0) | No | concurrent |
| 6 | No | No | No | No | No (0) | No | match |
| 7 | No | No | No | No | No (0) | No | concurrent |
| 8 | No | No | No | No | No (0) | No | concurrent |
@@ -3131,10 +3038,10 @@
-----------------------------------------------------------------------------------------------------
| Stage Number | Clock Cycles | Predication Cycle | Dependency To Previous | Cycles Add To Latency |
-----------------------------------------------------------------------------------------------------
-| 0 | 20 | 11 | match | 20 |
-| 1 | 22 | 13 | match | 22 |
+| 0 | 22 | 13 | match | 22 |
+| 1 | 20 | 11 | match | 20 |
| 2 | 20 | 11 | match | 20 |
-| 3 | 20 | 11 | match | 20 |
+| 3 | 20 | 11 | concurrent | 1 |
| 4 | 20 | 11 | concurrent | 1 |
| 5 | 20 | 11 | concurrent | 1 |
| 6 | 20 | 11 | match | 20 |
@@ -3145,7 +3052,7 @@
| 11 | 20 | 11 | concurrent | 1 |
-----------------------------------------------------------------------------------------------------
-Total latency for ingress: 113
+Total latency for ingress: 94
Clock Cycles Per Stage For egress:
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.gateway.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.gateway.log
index c9e46f6..948e767 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.gateway.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.gateway.log
@@ -1,9 +1,24 @@
+---------------------------------------------------------------------+
| Log file: mau.gateway.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
+
+========================================================
+ Run Gateway Placement on Request List of size 0
+========================================================
+
+
+========================================================
+ Run Gateway Placement on Request List of size 0
+========================================================
+
+
+========================================================
+ Run Gateway Placement on Request List of size 0
+========================================================
+
valid:
f = packet_out_hdr
const:
@@ -110,7 +125,7 @@
match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
Search bus 0 on row 7
- final_parity_group_ids = [(0, []), (1, [])]
+ final_parity_group_ids = [(0, [0]), (1, [0])]
open_parity_group_ids = [0, 1]
----------------------------
@@ -120,13 +135,13 @@
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (68, 0)
+ (67, 0)
Byte Position 1
- (68, 0)
+ (67, 0)
Byte Position 2
- (68, 0)
+ (67, 0)
Byte Position 3
- (68, 0)
+ (67, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -245,7 +260,7 @@
[42] = None
[43] = None
Hash Bit Mapping:
- (0, 1) --> 40
+ (12, 1) --> 40
Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
Allocating: Gateway 15 in stage 0 for _condition_0.
@@ -341,7 +356,7 @@
match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
Search bus 0 on row 7
- final_parity_group_ids = [(0, []), (1, [])]
+ final_parity_group_ids = [(0, [0]), (1, [0])]
open_parity_group_ids = [0, 1]
----------------------------
@@ -351,13 +366,13 @@
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (68, 0)
+ (67, 0)
Byte Position 1
- (68, 0)
+ (67, 0)
Byte Position 2
- (68, 0)
+ (67, 0)
Byte Position 3
- (68, 0)
+ (67, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -476,42 +491,26 @@
[42] = None
[43] = None
Hash Bit Mapping:
- (0, 1) --> 40
+ (12, 1) --> 40
Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
Allocating: Gateway 15 in stage 0 for _condition_0.
-
-========================================================
- Run Gateway Placement on Request List of size 0
-========================================================
-
-
-========================================================
- Run Gateway Placement on Request List of size 0
-========================================================
-
-
-========================================================
- Run Gateway Placement on Request List of size 0
-========================================================
-
valid:
- f = packet_out_hdr
const:
xor:
-Gateway Resource Request for P4 table _condition_1 with handle 117440514 in stage 1
+Gateway Resource Request for P4 table process_packet_out_table_always_true_condition with handle -1 in stage 0
Validity checks:
- Field --validity_check--packet_out_hdr [0:0]
+ <none>
Fields to check against constants:
<none>
Field pairs to compare to each other:
<none>
-Gateway Resource Request for table _condition_1 needs access to 1 input bits
+Gateway Resource Request for table process_packet_out_table_always_true_condition needs access to 0 input bits
========================================================
- Run Gateway Placement on Request List of size 1
+ Run Gateway Placement on Request List of size 2
========================================================
Available Gateways are: (16)
@@ -605,19 +604,19 @@
open_parity_group_ids = [0, 1]
----------------------------
- Trying to place Gateway Resource Request for table _condition_1 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
+ Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
----------------------------
--------------
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (68, 0)
+ (67, 0)
Byte Position 1
- (68, 0)
+ (67, 0)
Byte Position 2
- (68, 0)
+ (67, 0)
Byte Position 3
- (68, 0)
+ (67, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -738,11 +737,149 @@
Hash Bit Mapping:
(12, 1) --> 40
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
-Allocating: Gateway 15 in stage 1 for _condition_1.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
+Allocating: Gateway 15 in stage 0 for _condition_0.
+Available Gateways are: (15)
+Gateway 0
+Gateway 1
+Gateway 2
+Gateway 3
+Gateway 4
+Gateway 5
+Gateway 6
+Gateway 7
+Gateway 8
+Gateway 9
+Gateway 10
+Gateway 11
+Gateway 12
+Gateway 13
+Gateway 14
+------- Phase 0 -------------
+Looking at gateway table 14
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [1], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f498e8ad150>, 0)])), (1, (None, [], None, [], []))])
+Search bus 0 on row 7
+----------------------------
+ Trying to place Gateway Resource Request for table process_packet_out_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [1]) and hash group 0 for gateway 14.
+----------------------------
+Gateway data search bus packing is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ [44] = None
+ [45] = None
+ [46] = None
+ [47] = None
+ [48] = None
+ [49] = None
+ [50] = None
+ [51] = None
+ [52] = None
+ [53] = None
+ [54] = None
+ [55] = None
+ [56] = None
+ [57] = None
+ [58] = None
+ [59] = None
+ [60] = None
+ [61] = None
+ [62] = None
+ [63] = None
+ Move Byte Mapping:
+
+Final Gateway Key is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ Hash Bit Mapping:
+
+Allocating: Gateway 14 in stage 0 for process_packet_out_table_always_true_condition.
========================================================
- Run Gateway Placement on Request List of size 1
+ Run Gateway Placement on Request List of size 2
========================================================
Available Gateways are: (16)
@@ -836,19 +973,19 @@
open_parity_group_ids = [0, 1]
----------------------------
- Trying to place Gateway Resource Request for table _condition_1 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
+ Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
----------------------------
--------------
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (68, 0)
+ (67, 0)
Byte Position 1
- (68, 0)
+ (67, 0)
Byte Position 2
- (68, 0)
+ (67, 0)
Byte Position 3
- (68, 0)
+ (67, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -969,8 +1106,146 @@
Hash Bit Mapping:
(12, 1) --> 40
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
-Allocating: Gateway 15 in stage 1 for _condition_1.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
+Allocating: Gateway 15 in stage 0 for _condition_0.
+Available Gateways are: (15)
+Gateway 0
+Gateway 1
+Gateway 2
+Gateway 3
+Gateway 4
+Gateway 5
+Gateway 6
+Gateway 7
+Gateway 8
+Gateway 9
+Gateway 10
+Gateway 11
+Gateway 12
+Gateway 13
+Gateway 14
+------- Phase 0 -------------
+Looking at gateway table 14
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [1], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f498e2edb10>, 0)])), (1, (None, [], None, [], []))])
+Search bus 0 on row 7
+----------------------------
+ Trying to place Gateway Resource Request for table process_packet_out_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [1]) and hash group 0 for gateway 14.
+----------------------------
+Gateway data search bus packing is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ [44] = None
+ [45] = None
+ [46] = None
+ [47] = None
+ [48] = None
+ [49] = None
+ [50] = None
+ [51] = None
+ [52] = None
+ [53] = None
+ [54] = None
+ [55] = None
+ [56] = None
+ [57] = None
+ [58] = None
+ [59] = None
+ [60] = None
+ [61] = None
+ [62] = None
+ [63] = None
+ Move Byte Mapping:
+
+Final Gateway Key is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ Hash Bit Mapping:
+
+Allocating: Gateway 14 in stage 0 for process_packet_out_table_always_true_condition.
========================================================
Run Gateway Placement on Request List of size 0
@@ -990,7 +1265,7 @@
const:
f = ig_intr_md_for_tm.ucast_egress_port
xor:
-Gateway Resource Request for P4 table _condition_2 with handle 117440515 in stage 3
+Gateway Resource Request for P4 table _condition_2 with handle 117440514 in stage 2
Validity checks:
<none>
Fields to check against constants:
@@ -1245,8 +1520,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 3 for gateway
-Allocating: Gateway 15 in stage 3 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
+Allocating: Gateway 15 in stage 2 for _condition_2.
========================================================
Run Gateway Placement on Request List of size 1
@@ -1492,8 +1767,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 3 for gateway
-Allocating: Gateway 15 in stage 3 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
+Allocating: Gateway 15 in stage 2 for _condition_2.
========================================================
Run Gateway Placement on Request List of size 1
@@ -1739,12 +2014,12 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 3 for gateway
-Allocating: Gateway 15 in stage 3 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
+Allocating: Gateway 15 in stage 2 for _condition_2.
valid:
const:
xor:
-Gateway Resource Request for P4 table egress_port_count_table_always_true_condition with handle -1 in stage 3
+Gateway Resource Request for P4 table egress_port_count_table_always_true_condition with handle -1 in stage 2
Validity checks:
<none>
Fields to check against constants:
@@ -1999,8 +2274,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 3 for gateway
-Allocating: Gateway 15 in stage 3 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
+Allocating: Gateway 15 in stage 2 for _condition_2.
Available Gateways are: (15)
Gateway 0
Gateway 1
@@ -2019,7 +2294,7 @@
Gateway 14
------- Phase 0 -------------
Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f84d5cbff10>, 0)])), (1, (None, [], None, [], []))])
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f49924f5210>, 0)])), (1, (None, [], None, [], []))])
Search bus 0 on row 7
----------------------------
Trying to place Gateway Resource Request for table egress_port_count_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
@@ -2138,7 +2413,7 @@
[43] = None
Hash Bit Mapping:
-Allocating: Gateway 14 in stage 3 for egress_port_count_table_always_true_condition.
+Allocating: Gateway 14 in stage 2 for egress_port_count_table_always_true_condition.
========================================================
Run Gateway Placement on Request List of size 2
@@ -2384,8 +2659,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 3 for gateway
-Allocating: Gateway 15 in stage 3 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
+Allocating: Gateway 15 in stage 2 for _condition_2.
Available Gateways are: (15)
Gateway 0
Gateway 1
@@ -2404,7 +2679,7 @@
Gateway 14
------- Phase 0 -------------
Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f84d27b5710>, 0)])), (1, (None, [], None, [], []))])
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f498e781990>, 0)])), (1, (None, [], None, [], []))])
Search bus 0 on row 7
----------------------------
Trying to place Gateway Resource Request for table egress_port_count_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
@@ -2523,798 +2798,4 @@
[43] = None
Hash Bit Mapping:
-Allocating: Gateway 14 in stage 3 for egress_port_count_table_always_true_condition.
-valid:
-const:
- f = ig_intr_md_for_tm.copy_to_cpu
-xor:
-Gateway Resource Request for P4 table _condition_3 with handle 117440516 in stage 0
- Validity checks:
- <none>
- Fields to check against constants:
- Field ig_intr_md_for_tm.copy_to_cpu [0:0]
- Field pairs to compare to each other:
- <none>
-
-Gateway Resource Request for table _condition_3 needs access to 1 input bits
-
-
-========================================================
- Run Gateway Placement on Request List of size 2
-========================================================
-
-Available Gateways are: (16)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-Gateway 15
-------- Phase 0 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 13
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 12
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 11
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 10
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 9
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 8
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 7
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 6
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 5
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 4
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 3
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 2
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 1
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-Looking at gateway table 0
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-------- Phase 1 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-
- final_parity_group_ids = [(0, []), (1, [])]
-
- open_parity_group_ids = [0, 1]
-----------------------------
- Trying to place Gateway Resource Request for table _condition_3 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (80, 0)
-Byte Position 1
- (80, 0)
-Byte Position 2
- (80, 0)
-Byte Position 3
- (80, 0)
-
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 40 in hash match group 0 for ('ig_intr_md_for_tm.copy_to_cpu', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = (('ig_intr_md_for_tm.copy_to_cpu', 0), 'exact')
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (0, 0) --> 40
-
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
-Allocating: Gateway 15 in stage 0 for _condition_3.
-Available Gateways are: (15)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-------- Phase 0 -------------
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f84d6772cd0>, 0)])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-----------------------------
- Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (68, 0)
-Byte Position 1
- (68, 0)
-Byte Position 2
- (68, 0)
-Byte Position 3
- (68, 0)
-
-Removing available byte Byte 8 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 10 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 14 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 41 in hash match group 0 for ('--validity_check--packet_out_hdr', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = (('--validity_check--packet_out_hdr', 0), 'exact')
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (1, 1) --> 41
-
-Allocating: Gateway 14 in stage 0 for _condition_0.
-
-========================================================
- Run Gateway Placement on Request List of size 2
-========================================================
-
-Available Gateways are: (16)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-Gateway 15
-------- Phase 0 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 13
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 12
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 11
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 10
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 9
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 8
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 7
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 6
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 5
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 4
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 3
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 2
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 1
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-Looking at gateway table 0
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-------- Phase 1 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-
- final_parity_group_ids = [(0, []), (1, [])]
-
- open_parity_group_ids = [0, 1]
-----------------------------
- Trying to place Gateway Resource Request for table _condition_3 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (80, 0)
-Byte Position 1
- (80, 0)
-Byte Position 2
- (80, 0)
-Byte Position 3
- (80, 0)
-
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 40 in hash match group 0 for ('ig_intr_md_for_tm.copy_to_cpu', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = (('ig_intr_md_for_tm.copy_to_cpu', 0), 'exact')
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (0, 0) --> 40
-
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
-Allocating: Gateway 15 in stage 0 for _condition_3.
-Available Gateways are: (15)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-------- Phase 0 -------------
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f84d1f439d0>, 0)])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-----------------------------
- Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (68, 0)
-Byte Position 1
- (68, 0)
-Byte Position 2
- (68, 0)
-Byte Position 3
- (68, 0)
-
-Removing available byte Byte 8 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 10 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 14 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 41 in hash match group 0 for ('--validity_check--packet_out_hdr', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = (('--validity_check--packet_out_hdr', 0), 'exact')
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (1, 1) --> 41
-
-Allocating: Gateway 14 in stage 0 for _condition_0.
+Allocating: Gateway 14 in stage 2 for egress_port_count_table_always_true_condition.
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.gw.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.gw.log
index 0affae5..177ac51 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.gw.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.gw.log
@@ -1,124 +1,79 @@
+---------------------------------------------------------------------+
| Log file: mau.gw.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
-cond _condition_0: valid packet_out_hdr
- valid packet_out_hdr
- ! not valid packet_out_hdr
-cond _condition_0 can be gateway (1+0)x1
-cond !_condition_0 can be gateway (1+0)x1
-_condition_0 is gateway for ingress_pkt
-cond _condition_1: not valid packet_out_hdr
+cond _condition_0: not valid packet_out_hdr
not valid packet_out_hdr
! not not valid packet_out_hdr
-cond _condition_1 can be gateway (1+0)x1
-cond !_condition_1 can be gateway (1+0)x1
-_condition_1 is gateway for table0
-cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 254
- ig_intr_md_for_tm.ucast_egress_port < 254
- ! ig_intr_md_for_tm.ucast_egress_port >= 254
+cond _condition_0 can be gateway (1+0)x1
+cond !_condition_0 can be gateway (1+0)x1
+_condition_0 is gateway for table0
+cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 510
+ ig_intr_md_for_tm.ucast_egress_port < 510
+ ! ig_intr_md_for_tm.ucast_egress_port >= 510
cond _condition_2 can be gateway (9+0)x1
cond !_condition_2 can be gateway (9+0)x1
_condition_2 is gateway for ingress_port_count_table
-cond _condition_3: ig_intr_md_for_tm.copy_to_cpu == 1
- ig_intr_md_for_tm.copy_to_cpu == 1
- ! ig_intr_md_for_tm.copy_to_cpu != 1
-cond _condition_3 can be gateway (0+1)x1
-cond !_condition_3 can be gateway (0+1)x2
-_condition_3 is gateway for egress_pkt
-fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f84d6b710d0>]) and and xor_fields is OrderedSet()
+fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f4993049bd0>]) and and xor_fields is OrderedSet()
fields = OrderedSet() and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f84d6b71390>])
-fields = OrderedSet() and and xor_fields is OrderedSet()
-cond _condition_0: valid packet_out_hdr
- valid packet_out_hdr
- ! not valid packet_out_hdr
-cond _condition_0 can be gateway (1+0)x1
-cond !_condition_0 can be gateway (1+0)x1
-_condition_0 is gateway for ingress_pkt
-cond _condition_1: not valid packet_out_hdr
+cond _condition_0: not valid packet_out_hdr
not valid packet_out_hdr
! not not valid packet_out_hdr
-cond _condition_1 can be gateway (1+0)x1
-cond !_condition_1 can be gateway (1+0)x1
-_condition_1 is gateway for table0
-cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 254
- ig_intr_md_for_tm.ucast_egress_port < 254
- ! ig_intr_md_for_tm.ucast_egress_port >= 254
+cond _condition_0 can be gateway (1+0)x1
+cond !_condition_0 can be gateway (1+0)x1
+_condition_0 is gateway for table0
+cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 510
+ ig_intr_md_for_tm.ucast_egress_port < 510
+ ! ig_intr_md_for_tm.ucast_egress_port >= 510
cond _condition_2 can be gateway (9+0)x1
cond !_condition_2 can be gateway (9+0)x1
_condition_2 is gateway for ingress_port_count_table
-cond _condition_3: ig_intr_md_for_tm.copy_to_cpu == 1
- ig_intr_md_for_tm.copy_to_cpu == 1
- ! ig_intr_md_for_tm.copy_to_cpu != 1
-cond _condition_3 can be gateway (0+1)x1
-cond !_condition_3 can be gateway (0+1)x2
-_condition_3 is gateway for egress_pkt
-fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f84d6b710d0>]) and and xor_fields is OrderedSet()
+fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f4993049bd0>]) and and xor_fields is OrderedSet()
fields = OrderedSet() and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f84d6b71390>])
-fields = OrderedSet() and and xor_fields is OrderedSet()
-cond _condition_0: valid packet_out_hdr
- valid packet_out_hdr
- ! not valid packet_out_hdr
-cond _condition_0 can be gateway (1+0)x1
-cond !_condition_0 can be gateway (1+0)x1
-_condition_0 is gateway for ingress_pkt
-cond _condition_1: not valid packet_out_hdr
+cond _condition_0: not valid packet_out_hdr
not valid packet_out_hdr
! not not valid packet_out_hdr
-cond _condition_1 can be gateway (1+0)x1
-cond !_condition_1 can be gateway (1+0)x1
-_condition_1 is gateway for table0
-cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 254
- ig_intr_md_for_tm.ucast_egress_port < 254
- ! ig_intr_md_for_tm.ucast_egress_port >= 254
+cond _condition_0 can be gateway (1+0)x1
+cond !_condition_0 can be gateway (1+0)x1
+_condition_0 is gateway for table0
+cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 510
+ ig_intr_md_for_tm.ucast_egress_port < 510
+ ! ig_intr_md_for_tm.ucast_egress_port >= 510
cond _condition_2 can be gateway (9+0)x1
cond !_condition_2 can be gateway (9+0)x1
_condition_2 is gateway for ingress_port_count_table
-cond _condition_3: ig_intr_md_for_tm.copy_to_cpu == 1
- ig_intr_md_for_tm.copy_to_cpu == 1
- ! ig_intr_md_for_tm.copy_to_cpu != 1
-cond _condition_3 can be gateway (0+1)x1
-cond !_condition_3 can be gateway (0+1)x2
-_condition_3 is gateway for egress_pkt
-fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f84d6b710d0>]) and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f84d6b71390>])
+fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f4993049bd0>]) and and xor_fields is OrderedSet()
fields = OrderedSet() and and xor_fields is OrderedSet()
cond _always_true: True == True
True
! False
+cond _always_true: True == True
+ True
+ ! False
--> Stage Gateway Table for condition _condition_0 in stage 0
-T -> ingress_pkt(0), F -> _condition_1(16)
-building tcam for GatewayTest('valid packet_out_hdr')
- adding line (match=200000000 mask=200000000 T)
-tcam data: [(match=200000000 mask=200000000 T)]
-final.tcam: [(match=200000000 mask=200000000 T)], miss=False
---> Stage Gateway Table for condition _condition_3 in stage 0
-T -> egress_pkt(1), F -> None(255)
-building tcam for GatewayTest('ig_intr_md_for_tm.copy_to_cpu == 1')
- adding line (match=100000000 mask=100000000 T)
-tcam data: [(match=100000000 mask=100000000 T)]
-final.tcam: [(match=100000000 mask=100000000 T)], miss=False
---> Stage Gateway Table for condition _condition_1 in stage 1
-T -> table0(16), F -> _condition_2(48)
+T -> table0(0), F -> process_packet_out_table(1)
building tcam for GatewayTest('not valid packet_out_hdr')
adding line (match=0 mask=100000000 T)
tcam data: [(match=0 mask=100000000 T)]
final.tcam: [(match=0 mask=100000000 T)], miss=False
---> Stage Gateway Table for condition _condition_2 in stage 3
-T -> ingress_port_count_table(48), F -> None(255)
-building tcam for GatewayTest('ig_intr_md_for_tm.ucast_egress_port < 254')
+--> Stage Gateway Table for condition process_packet_out_table_always_true_condition in stage 0
+T -> process_packet_out_table(1), F -> process_packet_out_table(1)
+building tcam for GatewayTest('True')
+ adding line (match=0 mask=0 T)
+tcam data: [(match=0 mask=0 T)]
+final.tcam: [(match=0 mask=0 T)], miss=False
+--> Stage Gateway Table for condition _condition_2 in stage 2
+T -> ingress_port_count_table(32), F -> None(255)
+building tcam for GatewayTest('ig_intr_md_for_tm.ucast_egress_port < 510')
adding line (range=[ffff ffff 3fff] match=0 mask=0 T)
adding line (range=[ffff 7fff ffff] match=0 mask=0 T)
- adding line (range=[0 ffff ffff] match=0 mask=0 T)
-tcam data: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[0 ffff ffff] match=0 mask=0 T)]
-final.tcam: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[0 ffff ffff] match=0 mask=0 T)], miss=False
---> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 3
-T -> egress_port_count_table(49), F -> egress_port_count_table(49)
+ adding line (range=[1 ffff ffff] match=0 mask=0 T)
+tcam data: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[1 ffff ffff] match=0 mask=0 T)]
+final.tcam: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[1 ffff ffff] match=0 mask=0 T)], miss=False
+--> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 2
+T -> egress_port_count_table(33), F -> egress_port_count_table(33)
building tcam for GatewayTest('True')
adding line (match=0 mask=0 T)
tcam data: [(match=0 mask=0 T)]
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.log
index 2ac02f6..a265f41 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.log
@@ -1,27 +1,27 @@
+---------------------------------------------------------------------+
| Log file: mau.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
Match Table table0 did not specify the number of entries required. A default value (512) will be used.
Match Table ecmp_group_table did not specify the number of entries required. A default value (1024) will be used.
Match Entry Table table0 has already been associated with stat Table table0_counter.
Match Entry Table ecmp_group_table has already been associated with stat Table ecmp_group_table_counter.
-Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
+Cannot implement table0 in phase 0 resources because table uses side effect tables.
Match Table table0 did not specify the number of entries required. A default value (512) will be used.
Match Table ecmp_group_table did not specify the number of entries required. A default value (1024) will be used.
Match Entry Table table0 has already been associated with stat Table table0_counter.
Match Entry Table ecmp_group_table has already been associated with stat Table ecmp_group_table_counter.
-Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
+Cannot implement table0 in phase 0 resources because table uses side effect tables.
Match Table table0 did not specify the number of entries required. A default value (512) will be used.
Match Table ecmp_group_table did not specify the number of entries required. A default value (1024) will be used.
-POV/metadata bridge containers added between ingress/egress: [0, 64, 128]
+POV/metadata bridge containers added between ingress/egress: [0]
Metadata bridge_ingress_intrinsic containers added between ingress/egress: [128]
Match Entry Table table0 has already been associated with stat Table table0_counter.
Match Entry Table ecmp_group_table has already been associated with stat Table ecmp_group_table_counter.
Match table ingress_port_count_table has no match key fields
-Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 254.
+Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 510.
##########################################
Call to decide_action_data_placement(stage=0, table=ingress_port_count_table)
@@ -83,7 +83,7 @@
Best Ram Usage is 97 rams
Best Immediate placement is 0 bits
Match table egress_port_count_table has no match key fields
-Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 254.
+Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 510.
##########################################
Call to decide_action_data_placement(stage=0, table=egress_port_count_table)
@@ -146,16 +146,16 @@
Best Immediate placement is 0 bits
##########################################
- Call to decide_action_data_placement(stage=0, table=ingress_pkt)
+ Call to decide_action_data_placement(stage=0, table=process_packet_out_table)
##########################################
Max immediate bits used in any action is 0 bits.
-Overhead bit width for table ingress_pkt is 2 bits.
+Overhead bit width for table process_packet_out_table is 0 bits.
Bits available in overhead for non-essential immediate data is 32 bits.
~~~~~~~~~~~~~~~~~~~~~
Examining placing 0 bits in match overhead
-Overhead bit width for table ingress_pkt is 2 bits.
+Overhead bit width for table process_packet_out_table is 0 bits.
Overhead SRAMs to use = 97
Entries requested = 1024 and match entries get = 0
ram_size_matrix =
@@ -172,73 +172,13 @@
total action ram packing size = [0, 0, 0]
action_ram_packing:
- action _packet_out has []
+ action _process_packet_out has []
total action ram packing size = [0, 0, 0]
action_ram_packing:
- action _packet_out has []
+ action _process_packet_out has []
total action ram packing size = [0, 0, 0]
action_ram_packing:
- action _packet_out has []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-Action Data SRAMs to use = 0
-TODO: Total RAMs use when put 0 bits in match overhead: 97
-TODO: Total RAMs use when put 0 bits in match overhead: 97
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 8 bits in match overhead
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 16 bits in match overhead
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 24 bits in match overhead
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 32 bits in match overhead
-
-##########################################
-
-Best Ram Usage is 97 rams
-Best Immediate placement is 0 bits
-
-##########################################
- Call to decide_action_data_placement(stage=0, table=egress_pkt)
-##########################################
-
-
-Max immediate bits used in any action is 0 bits.
-Overhead bit width for table egress_pkt is 2 bits.
-Bits available in overhead for non-essential immediate data is 32 bits.
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 0 bits in match overhead
-Overhead bit width for table egress_pkt is 2 bits.
-Overhead SRAMs to use = 97
- Entries requested = 1024 and match entries get = 0
-ram_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-immediate_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-hash_to_phv_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
+ action _process_packet_out has []
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
@@ -501,100 +441,18 @@
Best Ram Usage is 3 rams
Best Immediate placement is 16 bits
-Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
-
-----------------------------------------------
-Call to Allocate P4 Table with table ingress_pkt__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-ram_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-immediate_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-hash_to_phv_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action _packet_out has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action _packet_out has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action _packet_out has []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-Allocating Action Logical Table ID 0 in stage 0
-
-----------------------------------------------
-Call to Allocate P4 Table with table ingress_pkt, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-Logical Table ID in stage 0 was not supplied by table placement for table ingress_pkt.
-Allocating Logical Table ID 0 in stage 0
-Allocating Table Type ID 0 of type exact in stage 0
-Match Overhead:
- Field --version_valid-- [3:0] (4 bits)
- Field --instruction_address-- [1:0] (2 bits)
-
-Logical Table ID in stage 0 was not supplied by table placement for table ingress_pkt.
-Allocating Logical Table ID 0 in stage 0
-Allocating Table Type ID 0 of type exact in stage 0
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Match Table Resource Request is:
-SRAM Resource Request for table ingress_pkt (of type match), with 0 ways wants 0 rams.
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-For action _packet_out, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 130 has bit width 23
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-
-For action _packet_out, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 68 has bit width 20
- Field Src2 [3:0] : 0x4 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-Allocating Action ALU 2 (16 bits) in stage 0 for match table ingress_pkt's action _packet_out
-Allocating Action ALU 4 (8 bits) in stage 0 for match table ingress_pkt's action _packet_out
-Allocating VLIW Instruction : 0 in stage 0 for match table ingress_pkt's action _packet_out
+Cannot implement table0 in phase 0 resources because table uses side effect tables.
----------------------------------------------
Call to Allocate P4 Table with table table0__action__, number_entries = 512, table id = None, and match type = exact
- Allocating in stage 1
+ Allocating in stage 0
----------------------------------------------
ram_size_matrix =
(8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
0 0 0 1 0 0 0 0 # 0
0 0 0 1 0 0 0 0 # 1
- 0 0 0 0 0 0 0 0 # 2
+ 0 0 0 1 0 0 0 0 # 2
0 0 0 0 0 0 0 0 # 3
immediate_size_matrix =
@@ -615,7 +473,7 @@
action_ram_packing:
action set_egress_port has [(16, 16, False)]
action ecmp_group has [(16, 16, False)]
- action send_to_cpu has []
+ action send_to_cpu has [(16, 16, False)]
action _drop has []
total action ram packing size = [16, 0, 0]
action_ram_packing:
@@ -630,14 +488,14 @@
action send_to_cpu has [(16, 0, False)]
action _drop has [(16, 0, False)]
byte_enables = [1, 1]
-Allocating Action Parameter Bus Byte 32 in stage 1 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 33 in stage 1 for Byte 1 of 16-bit constant
-Allocating Action Parameter Bus Byte 34 in stage 1 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 35 in stage 1 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 32 in stage 0 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 33 in stage 0 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 34 in stage 0 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)]
final packing is [(16, 16, False)]
final packing is [(16, 16, False)]
-final packing is []
+final packing is [(16, 16, False)]
final packing is []
byte_enables = []
After allocation of 32s, available_slots is []
@@ -646,10 +504,10 @@
final packing is []
final packing is []
byte_enables = [1, 1]
-Allocating Action Parameter Bus Byte 36 in stage 1 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 37 in stage 1 for Byte 1 of 16-bit constant
-Allocating Action Parameter Bus Byte 38 in stage 1 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 39 in stage 1 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 36 in stage 0 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 37 in stage 0 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 38 in stage 0 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 39 in stage 0 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 2, 0), (32, 9, 0), (16, 3, 16)]
final packing is [(16, 0, False)]
final packing is [(16, 16, False)]
@@ -688,8 +546,8 @@
hash_bits_in_units = OrderedDict([(0, [0])])
address_left_shift = 0
-------------------
-Allocating Hash Distribution Group 0/0 for table table0__action__ in stage 1.
-Allocating Hash Bit 0 in hash match group 0 for table table0__action__ in stage 1.
+Allocating Hash Distribution Group 0/0 for table table0__action__ in stage 0.
+Allocating Hash Bit 0 in hash match group 0 for table table0__action__ in stage 0.
seed = 0x7bd5c66f
set the seed to be [1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]
Hash Function 0
@@ -746,17 +604,17 @@
hash_bit_50 = 0
hash_bit_51 = 0
-Allocating Action Logical Table ID 0 in stage 1
+Allocating Action Logical Table ID 0 in stage 0
----------------------------------------------
Call to Allocate P4 Table with table table0_counter, number_entries = 512, table id = None, and match type = exact
- Allocating in stage 1
+ Allocating in stage 0
----------------------------------------------
stat_stage_table referenced: direct
stat Table Resource Request is:
SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-Sram Resource Request for P4 table table0_counter with handle 67108867 of type statistics in stage 1
+Sram Resource Request for P4 table table0_counter with handle 67108867 of type statistics in stage 0
table_type : statistics
rams_for_width : 1
use_stash : False
@@ -772,12 +630,12 @@
----------------------------------------------
Call to Allocate P4 Table with table table0, number_entries = 512, table id = None, and match type = ternary
- Allocating in stage 1
+ Allocating in stage 0
----------------------------------------------
-Logical Table ID in stage 1 was not supplied by table placement for table table0.
-Allocating Logical Table ID 0 in stage 1
-Allocating Table Type ID 0 of type ternary in stage 1
+Logical Table ID in stage 0 was not supplied by table placement for table table0.
+Allocating Logical Table ID 0 in stage 0
+Allocating Table Type ID 0 of type ternary in stage 0
-----------------------------------------
Call to allocate_ternary_match_key_2
@@ -806,9 +664,9 @@
{--unused--[3:0], ethernet.dstAddr[47:40], ethernet.srcAddr[39:32], ethernet.dstAddr[7:0], ig_intr_md.ingress_port[7:0], ethernet.etherType[15:8], --version--[1:0], --unused--[1:0], ethernet.srcAddr[47:40], ethernet.dstAddr[23:16], ethernet.etherType[7:0], ethernet.dstAddr[39:24], --unused--[2:0], ig_intr_md.ingress_port[8:8], ethernet.dstAddr[15:8], ethernet.srcAddr[31:0]}
---------------------------------------------
-Call to can_any_match_key_fields_be_shared(stage=1, table=table0)
+Call to can_any_match_key_fields_be_shared(stage=0, table=table0)
---------------------------------------------
-Decided way to allocate for table table0 in stage 1 WAS non_shared
+Decided way to allocate for table table0 in stage 0 WAS non_shared
-----------------------------------------
Call to allocate_ternary_match_key_2
@@ -849,8 +707,8 @@
Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-Allocating Action ALU 2 (16 bits) in stage 1 for match table table0's action set_egress_port
-Allocating VLIW Instruction : 0 in stage 1 for match table table0's action set_egress_port
+Allocating Action ALU 2 (16 bits) in stage 0 for match table table0's action set_egress_port
+Allocating VLIW Instruction : 0 in stage 0 for match table table0's action set_egress_port
For action ecmp_group, formed micro_instruction:
Micro Instruction alu_a for PHV Container 134 has bit width 23
Field Src2 [3:0] : 0x6 (4 bits in instruction bits [3:0])
@@ -867,12 +725,23 @@
Field opcode [9:0] : 0x31e (10 bits in instruction bits [19:10])
Field unused [2:0] : 0x0 (3 bits in instruction bits [22:20])
-Allocating Action ALU 6 (16 bits) in stage 1 for match table table0's action ecmp_group
-Allocating Action ALU 7 (16 bits) in stage 1 for match table table0's action ecmp_group
-Allocating VLIW Instruction : 1 in stage 1 for match table table0's action ecmp_group
+Allocating Action ALU 6 (16 bits) in stage 0 for match table table0's action ecmp_group
+Allocating Action ALU 7 (16 bits) in stage 0 for match table table0's action ecmp_group
+Allocating VLIW Instruction : 1 in stage 0 for match table table0's action ecmp_group
For action send_to_cpu, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 64 has bit width 20
- Field Src2 [3:0] : 0x0 (4 bits in instruction bits [3:0])
+Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+For action send_to_cpu, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 67 has bit width 20
+ Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -881,11 +750,24 @@
Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-Allocating Action ALU 0 (8 bits) in stage 1 for match table table0's action send_to_cpu
-Allocating VLIW Instruction : 1 in stage 1 for match table table0's action send_to_cpu
+For action send_to_cpu, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 129 has bit width 23
+ Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
+
+Allocating Action ALU 2 (16 bits) in stage 0 for match table table0's action send_to_cpu
+Allocating Action ALU 3 (8 bits) in stage 0 for match table table0's action send_to_cpu
+Allocating Action ALU 1 (16 bits) in stage 0 for match table table0's action send_to_cpu
+Allocating VLIW Instruction : 1 in stage 0 for match table table0's action send_to_cpu
For action _drop, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 69 has bit width 20
- Field Src2 [3:0] : 0x5 (4 bits in instruction bits [3:0])
+Micro Instruction deposit-field for PHV Container 68 has bit width 20
+ Field Src2 [3:0] : 0x4 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -894,8 +776,8 @@
Field right_rotate [2:0] : 0x3 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x1 (1 bits in instruction bits [19:19])
-Allocating Action ALU 5 (8 bits) in stage 1 for match table table0's action _drop
-Allocating VLIW Instruction : 2 in stage 1 for match table table0's action _drop
+Allocating Action ALU 4 (8 bits) in stage 0 for match table table0's action _drop
+Allocating VLIW Instruction : 2 in stage 0 for match table table0's action _drop
Ternary table Pack Format =
Pack Format:
table_word_width: 141
@@ -932,8 +814,89 @@
----------------------------------------------
+Call to Allocate P4 Table with table process_packet_out_table__action__, number_entries = 1024, table id = None, and match type = exact
+ Allocating in stage 0
+----------------------------------------------
+
+ram_size_matrix =
+ (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
+ 0 0 0 0 0 0 0 0 # 0
+
+immediate_size_matrix =
+ (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
+ 0 0 0 0 0 0 0 0 # 0
+
+hash_to_phv_matrix =
+ (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
+ 0 0 0 0 0 0 0 0 # 0
+
+total action ram packing size = [0, 0, 0]
+action_ram_packing:
+ action _process_packet_out has []
+total action ram packing size = [0, 0, 0]
+action_ram_packing:
+ action _process_packet_out has []
+total action ram packing size = [0, 0, 0]
+action_ram_packing:
+ action _process_packet_out has []
+byte_enables = []
+After allocation of 32s, available_slots is []
+final packing is []
+byte_enables = []
+After allocation of 32s, available_slots is []
+final packing is []
+byte_enables = []
+After allocation of 32s, available_slots is []
+final packing is []
+Allocating Action Logical Table ID 1 in stage 0
+
+----------------------------------------------
+Call to Allocate P4 Table with table process_packet_out_table, number_entries = 1024, table id = None, and match type = exact
+ Allocating in stage 0
+----------------------------------------------
+
+Logical Table ID in stage 0 was not supplied by table placement for table process_packet_out_table.
+Allocating Logical Table ID 1 in stage 0
+Allocating Table Type ID 0 of type exact in stage 0
+Match Overhead:
+ Field --version_valid-- [3:0] (4 bits)
+
+Logical Table ID in stage 0 was not supplied by table placement for table process_packet_out_table.
+Allocating Logical Table ID 1 in stage 0
+Allocating Table Type ID 0 of type exact in stage 0
+Allocating: Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
+Match Table Resource Request is:
+SRAM Resource Request for table process_packet_out_table (of type match), with 0 ways wants 0 rams.
+Allocating: Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
+For action _process_packet_out, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+For action _process_packet_out, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 67 has bit width 20
+ Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
+ Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
+ Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
+ Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
+
+Allocating Action ALU 2 (16 bits) in stage 0 for match table process_packet_out_table's action _process_packet_out
+Allocating Action ALU 3 (8 bits) in stage 0 for match table process_packet_out_table's action _process_packet_out
+Allocating VLIW Instruction : 2 in stage 0 for match table process_packet_out_table's action _process_packet_out
+
+----------------------------------------------
Call to Allocate P4 Table with table ecmp_group_table__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 2
+ Allocating in stage 1
----------------------------------------------
ram_size_matrix =
@@ -961,26 +924,26 @@
After allocation of 32s, available_slots is []
final packing is []
byte_enables = [1, 1]
-Allocating Action Parameter Bus Byte 32 in stage 2 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 33 in stage 2 for Byte 1 of 16-bit constant
-Allocating Action Parameter Bus Byte 34 in stage 2 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 35 in stage 2 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 32 in stage 1 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 33 in stage 1 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 34 in stage 1 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 35 in stage 1 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)]
final packing is [(16, 16, False)]
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
-Allocating Action Logical Table ID 0 in stage 2
+Allocating Action Logical Table ID 0 in stage 1
----------------------------------------------
Call to Allocate P4 Table with table ecmp_group_table_counter, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 2
+ Allocating in stage 1
----------------------------------------------
stat_stage_table referenced: direct
stat Table Resource Request is:
SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
-Sram Resource Request for P4 table ecmp_group_table_counter with handle 67108868 of type statistics in stage 2
+Sram Resource Request for P4 table ecmp_group_table_counter with handle 67108868 of type statistics in stage 1
table_type : statistics
rams_for_width : 1
use_stash : False
@@ -996,12 +959,12 @@
----------------------------------------------
Call to Allocate P4 Table with table ecmp_group_table, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 2
+ Allocating in stage 1
----------------------------------------------
-Logical Table ID in stage 2 was not supplied by table placement for table ecmp_group_table.
-Allocating Logical Table ID 0 in stage 2
-Allocating Table Type ID 0 of type exact in stage 2
+Logical Table ID in stage 1 was not supplied by table placement for table ecmp_group_table.
+Allocating Logical Table ID 0 in stage 1
+Allocating Table Type ID 0 of type exact in stage 1
Match Overhead:
Field --version_valid-- [3:0] (4 bits)
Field --immediate-- [15:0] (16 bits)
@@ -1012,9 +975,9 @@
Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[15:8]}.
---------------------------------------------
-Call to can_any_match_key_fields_be_shared(stage=2, table=ecmp_group_table)
+Call to can_any_match_key_fields_be_shared(stage=1, table=ecmp_group_table)
---------------------------------------------
-Decided way to allocate for table ecmp_group_table in stage 2 WAS non_shared
+Decided way to allocate for table ecmp_group_table in stage 1 WAS non_shared
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}.
Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[7:0]}.
@@ -1139,12 +1102,12 @@
Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-Allocating Action ALU 2 (16 bits) in stage 2 for match table ecmp_group_table's action set_egress_port
-Allocating VLIW Instruction : 0 in stage 2 for match table ecmp_group_table's action set_egress_port
+Allocating Action ALU 2 (16 bits) in stage 1 for match table ecmp_group_table's action set_egress_port
+Allocating VLIW Instruction : 0 in stage 1 for match table ecmp_group_table's action set_egress_port
----------------------------------------------
Call to Allocate P4 Table with table ingress_port_count_table__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 3
+ Allocating in stage 2
----------------------------------------------
ram_size_matrix =
@@ -1177,17 +1140,17 @@
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
-Allocating Action Logical Table ID 0 in stage 3
+Allocating Action Logical Table ID 0 in stage 2
----------------------------------------------
-Call to Allocate P4 Table with table ingress_port_counter, number_entries = 254, table id = None, and match type = exact
- Allocating in stage 3
+Call to Allocate P4 Table with table ingress_port_counter, number_entries = 510, table id = None, and match type = exact
+ Allocating in stage 2
----------------------------------------------
stat_stage_table referenced: indirect
stat Table Resource Request is:
SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
-Sram Resource Request for P4 table ingress_port_counter with handle 67108865 of type statistics in stage 3
+Sram Resource Request for P4 table ingress_port_counter with handle 67108865 of type statistics in stage 2
table_type : statistics
rams_for_width : 1
use_stash : False
@@ -1203,20 +1166,20 @@
----------------------------------------------
Call to Allocate P4 Table with table ingress_port_count_table, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 3
+ Allocating in stage 2
----------------------------------------------
-Logical Table ID in stage 3 was not supplied by table placement for table ingress_port_count_table.
-Allocating Logical Table ID 0 in stage 3
-Allocating Table Type ID 0 of type exact in stage 3
+Logical Table ID in stage 2 was not supplied by table placement for table ingress_port_count_table.
+Allocating Logical Table ID 0 in stage 2
+Allocating Table Type ID 0 of type exact in stage 2
Match Overhead:
Field --version_valid-- [3:0] (4 bits)
Field --instruction_address-- [1:0] (2 bits)
Field --statistics_pointer-- [19:0] (20 bits)
-Logical Table ID in stage 3 was not supplied by table placement for table ingress_port_count_table.
-Allocating Logical Table ID 0 in stage 3
-Allocating Table Type ID 0 of type exact in stage 3
+Logical Table ID in stage 2 was not supplied by table placement for table ingress_port_count_table.
+Allocating Logical Table ID 0 in stage 2
+Allocating Table Type ID 0 of type exact in stage 2
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
Match Table Resource Request is:
@@ -1224,12 +1187,12 @@
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
No micro instructions needed for action count_ingress executed from table ingress_port_count_table.
-Allocating Action ALU 0 (32 bits) in stage 3 for match table ingress_port_count_table's action count_ingress
-Allocating VLIW Instruction : 0 in stage 3 for match table ingress_port_count_table's action count_ingress
+Allocating Action ALU 0 (32 bits) in stage 2 for match table ingress_port_count_table's action count_ingress
+Allocating VLIW Instruction : 0 in stage 2 for match table ingress_port_count_table's action count_ingress
----------------------------------------------
Call to Allocate P4 Table with table egress_port_count_table__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 3
+ Allocating in stage 2
----------------------------------------------
ram_size_matrix =
@@ -1262,17 +1225,17 @@
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
-Allocating Action Logical Table ID 1 in stage 3
+Allocating Action Logical Table ID 1 in stage 2
----------------------------------------------
-Call to Allocate P4 Table with table egress_port_counter, number_entries = 254, table id = None, and match type = exact
- Allocating in stage 3
+Call to Allocate P4 Table with table egress_port_counter, number_entries = 510, table id = None, and match type = exact
+ Allocating in stage 2
----------------------------------------------
stat_stage_table referenced: indirect
stat Table Resource Request is:
SRAM Resource Request for table egress_port_counter (of type statistics), with 1 ways wants 2 rams.
-Sram Resource Request for P4 table egress_port_counter with handle 67108866 of type statistics in stage 3
+Sram Resource Request for P4 table egress_port_counter with handle 67108866 of type statistics in stage 2
table_type : statistics
rams_for_width : 1
use_stash : False
@@ -1290,19 +1253,19 @@
----------------------------------------------
Call to Allocate P4 Table with table egress_port_count_table, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 3
+ Allocating in stage 2
----------------------------------------------
-Logical Table ID in stage 3 was not supplied by table placement for table egress_port_count_table.
-Allocating Logical Table ID 1 in stage 3
-Allocating Table Type ID 1 of type exact in stage 3
+Logical Table ID in stage 2 was not supplied by table placement for table egress_port_count_table.
+Allocating Logical Table ID 1 in stage 2
+Allocating Table Type ID 1 of type exact in stage 2
Match Overhead:
Field --version_valid-- [3:0] (4 bits)
Field --statistics_pointer-- [19:0] (20 bits)
-Logical Table ID in stage 3 was not supplied by table placement for table egress_port_count_table.
-Allocating Logical Table ID 1 in stage 3
-Allocating Table Type ID 1 of type exact in stage 3
+Logical Table ID in stage 2 was not supplied by table placement for table egress_port_count_table.
+Allocating Logical Table ID 1 in stage 2
+Allocating Table Type ID 1 of type exact in stage 2
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
Match Table Resource Request is:
@@ -1310,102 +1273,32 @@
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
No micro instructions needed for action count_egress executed from table egress_port_count_table.
-Allocating Action ALU 0 (32 bits) in stage 3 for match table egress_port_count_table's action count_egress
-Allocating VLIW Instruction : 0 in stage 3 for match table egress_port_count_table's action count_egress
-
-----------------------------------------------
-Call to Allocate P4 Table with table egress_pkt__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-ram_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-immediate_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-hash_to_phv_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-Allocating Action Logical Table ID 1 in stage 0
-
-----------------------------------------------
-Call to Allocate P4 Table with table egress_pkt, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-Logical Table ID in stage 0 was not supplied by table placement for table egress_pkt.
-Allocating Logical Table ID 1 in stage 0
-Allocating Table Type ID 1 of type exact in stage 0
-Match Overhead:
- Field --version_valid-- [3:0] (4 bits)
- Field --instruction_address-- [1:0] (2 bits)
-
-Logical Table ID in stage 0 was not supplied by table placement for table egress_pkt.
-Allocating Logical Table ID 1 in stage 0
-Allocating Table Type ID 1 of type exact in stage 0
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]}.
-Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Match Table Resource Request is:
-SRAM Resource Request for table egress_pkt (of type match), with 0 ways wants 0 rams.
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]}.
-Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-For action add_packet_in_hdr, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 82 has bit width 20
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x0 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x0 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-For action add_packet_in_hdr, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 145 has bit width 23
- Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
-
-Allocating Action ALU 18 (8 bits) in stage 0 for match table egress_pkt's action add_packet_in_hdr
-Allocating Action ALU 17 (16 bits) in stage 0 for match table egress_pkt's action add_packet_in_hdr
-Allocating VLIW Instruction : 0 in stage 0 for match table egress_pkt's action add_packet_in_hdr
+Allocating Action ALU 0 (32 bits) in stage 2 for match table egress_port_count_table's action count_egress
+Allocating VLIW Instruction : 0 in stage 2 for match table egress_port_count_table's action count_egress
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
+Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Skipping p4_primitive StageModifyFieldFromHashBitsPrimitive from overhead calculation.
Action ecmp_group for table table0 cannot be used as a default action (table miss action). The action requires the use of hash distribution, which is not available when a table misses.
Field ig_intr_md_for_tm.ucast_egress_port not contiguous on gateway input
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.resources.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.resources.log
index 5eae9b3..16b77f3 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.resources.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.resources.log
@@ -1,17 +1,17 @@
+---------------------------------------------------------------------+
| Log file: mau.resources.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
| Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
-| 0 | 2 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 |
-| 1 | 13 | 16 | 2 | 1 | 1 | 4 | 3 | 3 | 3 | 0 | 1 | 0 | 8 | 0 | 4 | 2 | 1 |
-| 2 | 4 | 0 | 30 | 0 | 0 | 5 | 2 | 0 | 1 | 0 | 1 | 0 | 4 | 0 | 2 | 1 | 1 |
-| 3 | 2 | 0 | 9 | 0 | 2 | 4 | 4 | 0 | 1 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2 |
+| 0 | 13 | 16 | 2 | 1 | 2 | 4 | 3 | 3 | 3 | 0 | 1 | 0 | 8 | 0 | 4 | 2 | 2 |
+| 1 | 4 | 0 | 30 | 0 | 0 | 5 | 2 | 0 | 1 | 0 | 1 | 0 | 4 | 0 | 2 | 1 | 1 |
+| 2 | 2 | 0 | 9 | 0 | 2 | 4 | 4 | 0 | 1 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2 |
+| 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
@@ -21,17 +21,17 @@
| 10 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 11 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| | | | | | | | | | | | | | | | | | |
-| Totals | 21 | 16 | 43 | 1 | 5 | 13 | 9 | 3 | 6 | 0 | 4 | 0 | 12 | 0 | 6 | 3 | 6 |
+| Totals | 19 | 16 | 41 | 1 | 4 | 13 | 9 | 3 | 5 | 0 | 4 | 0 | 12 | 0 | 6 | 3 | 5 |
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
| Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
-| 0 | 1.56% | 0.00% | 0.48% | 0.00% | 12.50% | 0.00% | 0.00% | 0.00% | 3.12% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
-| 1 | 10.16% | 24.24% | 0.48% | 16.67% | 6.25% | 5.00% | 6.25% | 12.50% | 9.38% | 0.00% | 25.00% | 0.00% | 6.25% | 0.00% | 12.50% | 6.25% | 6.25% |
-| 2 | 3.12% | 0.00% | 7.21% | 0.00% | 0.00% | 6.25% | 4.17% | 0.00% | 3.12% | 0.00% | 25.00% | 0.00% | 3.12% | 0.00% | 6.25% | 3.12% | 6.25% |
-| 3 | 1.56% | 0.00% | 2.16% | 0.00% | 12.50% | 5.00% | 8.33% | 0.00% | 3.12% | 0.00% | 50.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
+| 0 | 10.16% | 24.24% | 0.48% | 16.67% | 12.50% | 5.00% | 6.25% | 12.50% | 9.38% | 0.00% | 25.00% | 0.00% | 6.25% | 0.00% | 12.50% | 6.25% | 12.50% |
+| 1 | 3.12% | 0.00% | 7.21% | 0.00% | 0.00% | 6.25% | 4.17% | 0.00% | 3.12% | 0.00% | 25.00% | 0.00% | 3.12% | 0.00% | 6.25% | 3.12% | 6.25% |
+| 2 | 1.56% | 0.00% | 2.16% | 0.00% | 12.50% | 5.00% | 8.33% | 0.00% | 3.12% | 0.00% | 50.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
+| 3 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 4 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 5 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 6 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
@@ -41,7 +41,7 @@
| 10 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 11 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| | | | | | | | | | | | | | | | | | |
-| Average | 1.37% | 2.02% | 0.86% | 1.39% | 2.60% | 1.35% | 1.56% | 1.04% | 1.56% | 0.00% | 8.33% | 0.00% | 0.78% | 0.00% | 1.56% | 0.78% | 3.12% |
+| Average | 1.24% | 2.02% | 0.82% | 1.39% | 2.08% | 1.35% | 1.56% | 1.04% | 1.30% | 0.00% | 8.33% | 0.00% | 0.78% | 0.00% | 1.56% | 0.78% | 2.60% |
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
@@ -53,24 +53,20 @@
| | | | | | | | | Bytes | |
--------------------------------------------------------------------------------------------------------------------
| _condition_0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
-| _condition_3 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
-| ingress_pkt__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| ingress_pkt | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
-| egress_pkt__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| egress_pkt | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
-| _condition_1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
-| table0__action__ | 1 | 12 | 1 | 0 | 1 | 0 | 0 | 8 | 0 |
-| table0 | 1 | 16 | 0 | 0 | 1 | 3 | 1 | 0 | 4 |
-| table0_counter | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
-| ecmp_group_table__action__ | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
-| ecmp_group_table | 2 | 4 | 30 | 0 | 3 | 0 | 0 | 0 | 1 |
-| ecmp_group_table_counter | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
-| _condition_2 | 3 | 2 | 9 | 1 | 0 | 0 | 0 | 0 | 0 |
-| ingress_port_count_table__action__ | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| ingress_port_count_table | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
-| egress_port_count_table__action__ | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| egress_port_count_table | 3 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
-| ingress_port_counter | 3 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
-| egress_port_counter | 3 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| process_packet_out_table__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| process_packet_out_table | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
+| table0__action__ | 0 | 12 | 1 | 0 | 1 | 0 | 0 | 8 | 0 |
+| table0 | 0 | 16 | 0 | 0 | 1 | 3 | 1 | 0 | 4 |
+| table0_counter | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| ecmp_group_table__action__ | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
+| ecmp_group_table | 1 | 4 | 30 | 0 | 3 | 0 | 0 | 0 | 1 |
+| ecmp_group_table_counter | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| _condition_2 | 2 | 2 | 9 | 1 | 0 | 0 | 0 | 0 | 0 |
+| ingress_port_count_table__action__ | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| ingress_port_count_table | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
+| egress_port_count_table__action__ | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| egress_port_count_table | 2 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
+| ingress_port_counter | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| egress_port_counter | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
--------------------------------------------------------------------------------------------------------------------
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.rf.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.rf.log
index 644b517..dd29351 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.rf.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.rf.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: mau.rf.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.sram.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.sram.log
index 5dca0d0..8ac8b2a 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.sram.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.sram.log
@@ -1,60 +1,13 @@
+---------------------------------------------------------------------+
| Log file: mau.sram.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
=======================================================
- calling allocate and add with SRAM Resource Request for table ingress_pkt (of type match), with 0 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 0 RAMs and have 80 available.
-Requesting to use 0 Map RAMs and have 48 available.
-
-========================================================
- Run Placement on Request List of size 1 in stage 0
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 0
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 0
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 0
-columns for width is 0
-other columns is 0
-reserved columns is 10
-reserved columns for tind 0
-reserved columns for stateful 0
-Ternary Indirection Rams Need is 0
-Depth sorted requested
-Requesting to use 0 RAMs and have 32 available.
-Result bus only needs (1):
- ingress_pkt
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 0
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 0 RAMs and have 80 available.
-Depth sorted idletime requests:
-
-
-=======================================================
-
calling allocate and add with SRAM Resource Request for table table0__action__ (of type action), with 1 ways wants 1 rams. (open-all=False, synth_two_port_first=False)
=======================================================
@@ -62,7 +15,7 @@
Requesting to use 0 Map RAMs and have 48 available.
========================================================
- Run Placement on Request List of size 1 in stage 1
+ Run Placement on Request List of size 1 in stage 0
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -99,8 +52,8 @@
NO Spill Required off of logical row 15 for SRAM Resource Request for table table0__action__ (of type action), with 1 ways wants 1 rams.
call to place_table_on_logical_row --- logical row 15 and rams to place is 1 and depth index is 0
-Allocating: SRAM: Row 7 Col 6 in stage 1 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Ram Data Bus ActionR 7 right is 128 bits in stage 1 for table0__action__.
+Allocating: SRAM: Row 7 Col 6 in stage 0 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Ram Data Bus ActionR 7 right is 128 bits in stage 0 for table0__action__.
Depth sorted idletime requests:
@@ -113,7 +66,7 @@
Requesting to use 0 Map RAMs and have 48 available.
========================================================
- Run Placement on Request List of size 2 in stage 1
+ Run Placement on Request List of size 2 in stage 0
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -151,17 +104,17 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table table0_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 1 for table0_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 1 for table0_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
call to place_table_on_logical_row --- logical row 13 and rams to place is 1 and depth index is 0
-Allocating: SRAM: Row 6 Col 8 in stage 1 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Ram Data Bus ActionR 6 right is 128 bits in stage 1
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for table0_counter.
+Allocating: SRAM: Row 6 Col 8 in stage 0 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Ram Data Bus ActionR 6 right is 128 bits in stage 0
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
Depth sorted idletime requests:
@@ -174,7 +127,7 @@
Requesting to use 0 Map RAMs and have 46 available.
========================================================
- Run Placement on Request List of size 3 in stage 1
+ Run Placement on Request List of size 3 in stage 0
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -200,7 +153,7 @@
Ternary Indirection Rams Need is 1
Depth sorted requested
Group 0
-Sram Resource Request for P4 table table0 with handle 16777221 of type ternary_indirection in stage 1
+Sram Resource Request for P4 table table0 with handle 16777220 of type ternary_indirection in stage 0
table_type : ternary_indirection
rams_for_width : 1
use_stash : False
@@ -214,8 +167,8 @@
ram_enable_select_bits : 0
Requesting to use 1 RAMs and have 32 available.
-Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 1
-Allocating: SRAM: Row 0 Col 2 in stage 1 for table table0's ternary indirection word range Words 0 to 1023.
+Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 0
+Allocating: SRAM: Row 0 Col 2 in stage 0 for table table0's ternary indirection word range Words 0 to 1023.
Result bus only needs (0):
+=========================================
@@ -228,17 +181,17 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table table0_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 1 for table0_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 1 for table0_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
call to place_table_on_logical_row --- logical row 13 and rams to place is 1 and depth index is 0
-Allocating: SRAM: Row 6 Col 8 in stage 1 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Ram Data Bus ActionR 6 right is 128 bits in stage 1
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for table0_counter.
+Allocating: SRAM: Row 6 Col 8 in stage 0 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Ram Data Bus ActionR 6 right is 128 bits in stage 0
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
Depth sorted idletime requests:
@@ -251,7 +204,7 @@
Requesting to use 1 Map RAMs and have 46 available.
========================================================
- Run Placement on Request List of size 4 in stage 1
+ Run Placement on Request List of size 4 in stage 0
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -277,7 +230,7 @@
Ternary Indirection Rams Need is 1
Depth sorted requested
Group 0
-Sram Resource Request for P4 table table0 with handle 16777221 of type ternary_indirection in stage 1
+Sram Resource Request for P4 table table0 with handle 16777220 of type ternary_indirection in stage 0
table_type : ternary_indirection
rams_for_width : 1
use_stash : False
@@ -291,8 +244,8 @@
ram_enable_select_bits : 0
Requesting to use 1 RAMs and have 32 available.
-Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 1
-Allocating: SRAM: Row 0 Col 2 in stage 1 for table table0's ternary indirection word range Words 0 to 1023.
+Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 0
+Allocating: SRAM: Row 0 Col 2 in stage 0 for table table0's ternary indirection word range Words 0 to 1023.
Result bus only needs (0):
+=========================================
@@ -305,19 +258,19 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table table0_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 1 for table0_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 1 for table0_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
call to place_table_on_logical_row --- logical row 13 and rams to place is 1 and depth index is 0
-Allocating: SRAM: Row 6 Col 8 in stage 1 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Ram Data Bus ActionR 6 right is 128 bits in stage 1
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for table0_counter.
+Allocating: SRAM: Row 6 Col 8 in stage 0 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Ram Data Bus ActionR 6 right is 128 bits in stage 0
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
Depth sorted idletime requests:
-Sram Resource Request for P4 table table0 with handle 16777221 of type idletime in stage 1
+Sram Resource Request for P4 table table0 with handle 16777220 of type idletime in stage 0
table_type : idletime
rams_for_width : 0
use_stash : False
@@ -335,8 +288,107 @@
bottom_cnt = 0 and num requests = 0
Working on idletime request SRAM Resource Request for table table0 (of type idletime), with 1 ways wants 0 rams.
>> wants 1 map rams
-Allocating: Map RAM: Row 7 Unit 0 in stage 1 for table0.
-Allocating: Ram Data Bus IdletimeHalfLogicalRow 0 top is 19 bits in stage 1 for table0.
+Allocating: Map RAM: Row 7 Unit 0 in stage 0 for table0.
+Allocating: Ram Data Bus IdletimeHalfLogicalRow 0 top is 19 bits in stage 0 for table0.
+
+
+=======================================================
+
+ calling allocate and add with SRAM Resource Request for table process_packet_out_table (of type match), with 0 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
+=======================================================
+
+Requesting to use 0 RAMs and have 76 available.
+Requesting to use 0 Map RAMs and have 45 available.
+
+========================================================
+ Run Placement on Request List of size 5 in stage 0
+ open_up_all_for_match=False
+ synth_two_port_first=False
+========================================================
+
+Match Rams Need is 0
+Algorithmic TCAM Match RAMs Need is 0
+Other Rams Need is 4
+
++=========================================
+| Placing algorithmic tcam
++=========================================
+
+sorted algorithmic tcam requests: (0)
+
+
+-------------------------------------
+Columns need for match is 0
+columns for width is 0
+other columns is 1
+reserved columns is 9
+reserved columns for tind 1
+reserved columns for stateful 1
+Ternary Indirection Rams Need is 1
+Depth sorted requested
+Group 0
+Sram Resource Request for P4 table table0 with handle 16777220 of type ternary_indirection in stage 0
+ table_type : ternary_indirection
+ rams_for_width : 1
+ use_stash : False
+ number_ways : 1
+ way #0
+ SRAM Request Group 0
+ rams_for_depth : 1
+ map_rams : 0
+ way_number : 0
+ ram_word_select_bits : 0
+ ram_enable_select_bits : 0
+
+Requesting to use 1 RAMs and have 32 available.
+Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 0
+Allocating: SRAM: Row 0 Col 2 in stage 0 for table table0's ternary indirection word range Words 0 to 1023.
+Result bus only needs (1):
+ process_packet_out_table
+Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 0
+
++=========================================
+| Placing action/stats/meters/selection
++=========================================
+
+Requesting to use 3 RAMs and have 79 available.
+SRAM Resource Request for table table0__action__ (of type action), with 1 ways wants 1 rams.
+SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 1 and depth index is 0
+Allocating: SRAM: Row 6 Col 8 in stage 0 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Ram Data Bus ActionR 6 right is 128 bits in stage 0
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
+Depth sorted idletime requests:
+Sram Resource Request for P4 table table0 with handle 16777220 of type idletime in stage 0
+ table_type : idletime
+ rams_for_width : 0
+ use_stash : False
+ number_ways : 1
+ way #0
+ SRAM Request Group 0
+ rams_for_depth : 0
+ map_rams : 1
+ way_number : 0
+ ram_word_select_bits : 0
+ ram_enable_select_bits : 0
+
+Requesting to use 1 RAMs and have 46 available.
+top_cnt = 1 and num requests = 1
+bottom_cnt = 0 and num requests = 0
+Working on idletime request SRAM Resource Request for table table0 (of type idletime), with 1 ways wants 0 rams.
+>> wants 1 map rams
+Allocating: Map RAM: Row 7 Unit 0 in stage 0 for table0.
+Allocating: Ram Data Bus IdletimeHalfLogicalRow 0 top is 19 bits in stage 0 for table0.
=======================================================
@@ -348,6 +400,125 @@
Requesting to use 0 Map RAMs and have 48 available.
========================================================
+ Run Placement on Request List of size 1 in stage 1
+ open_up_all_for_match=False
+ synth_two_port_first=False
+========================================================
+
+Match Rams Need is 0
+Algorithmic TCAM Match RAMs Need is 0
+Other Rams Need is 2
+
++=========================================
+| Placing algorithmic tcam
++=========================================
+
+sorted algorithmic tcam requests: (0)
+
+
+-------------------------------------
+Columns need for match is 0
+columns for width is 0
+other columns is 1
+reserved columns is 9
+reserved columns for tind 0
+reserved columns for stateful 1
+Ternary Indirection Rams Need is 0
+Depth sorted requested
+Requesting to use 0 RAMs and have 32 available.
+Result bus only needs (0):
+
++=========================================
+| Placing action/stats/meters/selection
++=========================================
+
+Requesting to use 2 RAMs and have 80 available.
+SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
+NO Spill Required off of logical row 13 for SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
+Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table ecmp_group_table_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 1 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 1 for ecmp_group_table_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 1 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 1 for ecmp_group_table_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for ecmp_group_table_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for ecmp_group_table_counter.
+Depth sorted idletime requests:
+
+
+=======================================================
+
+ calling allocate and add with SRAM Resource Request for table ecmp_group_table (of type match), with 3 ways wants 3 rams. (open-all=False, synth_two_port_first=False)
+=======================================================
+
+Requesting to use 3 RAMs and have 78 available.
+Requesting to use 0 Map RAMs and have 46 available.
+
+========================================================
+ Run Placement on Request List of size 2 in stage 1
+ open_up_all_for_match=False
+ synth_two_port_first=False
+========================================================
+
+Match Rams Need is 3
+Algorithmic TCAM Match RAMs Need is 0
+Other Rams Need is 2
+
++=========================================
+| Placing algorithmic tcam
++=========================================
+
+sorted algorithmic tcam requests: (0)
+
+
+-------------------------------------
+Columns need for match is 1
+columns for width is 1
+other columns is 1
+reserved columns is 9
+reserved columns for tind 0
+reserved columns for stateful 1
+For group request 0
+ Dealing with way that starts at 0 of match request SRAM Resource Request for table ecmp_group_table (of type match), with 3 ways wants 3 rams.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1
+Allocating: Ram Data Bus MatchResult1R 7 left_and_right is 83 bits in stage 1
+Allocating: SRAM: Row 7 Col 2 in stage 1 for table ecmp_group_table's match way 0 for entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: SRAM: Row 7 Col 3 in stage 1 for table ecmp_group_table's match way 1 for entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: SRAM: Row 7 Col 4 in stage 1 for table ecmp_group_table's match way 2 for entry Entry bits [127: 0] and word range Words 0 to 1023.
+Ternary Indirection Rams Need is 0
+Depth sorted requested
+Requesting to use 0 RAMs and have 29 available.
+Result bus only needs (0):
+
++=========================================
+| Placing action/stats/meters/selection
++=========================================
+
+Requesting to use 2 RAMs and have 77 available.
+SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
+NO Spill Required off of logical row 13 for SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
+Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table ecmp_group_table_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 1 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 1 for ecmp_group_table_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 1 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 1 for ecmp_group_table_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for ecmp_group_table_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for ecmp_group_table_counter.
+Depth sorted idletime requests:
+
+
+=======================================================
+
+ calling allocate and add with SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams. (open-all=False, synth_two_port_first=False)
+=======================================================
+
+Requesting to use 2 RAMs and have 80 available.
+Requesting to use 0 Map RAMs and have 48 available.
+
+========================================================
Run Placement on Request List of size 1 in stage 2
open_up_all_for_match=False
synth_two_port_first=False
@@ -381,136 +552,17 @@
+=========================================
Requesting to use 2 RAMs and have 80 available.
-SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
-NO Spill Required off of logical row 13 for SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
-
-call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table ecmp_group_table_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 2 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 2 for ecmp_group_table_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 2 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 2 for ecmp_group_table_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for ecmp_group_table_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for ecmp_group_table_counter.
-Depth sorted idletime requests:
-
-
-=======================================================
-
- calling allocate and add with SRAM Resource Request for table ecmp_group_table (of type match), with 3 ways wants 3 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 3 RAMs and have 78 available.
-Requesting to use 0 Map RAMs and have 46 available.
-
-========================================================
- Run Placement on Request List of size 2 in stage 2
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 3
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 2
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 1
-columns for width is 1
-other columns is 1
-reserved columns is 9
-reserved columns for tind 0
-reserved columns for stateful 1
-For group request 0
- Dealing with way that starts at 0 of match request SRAM Resource Request for table ecmp_group_table (of type match), with 3 ways wants 3 rams.
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2
-Allocating: Ram Data Bus MatchResult1R 7 left_and_right is 83 bits in stage 2
-Allocating: SRAM: Row 7 Col 2 in stage 2 for table ecmp_group_table's match way 0 for entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: SRAM: Row 7 Col 3 in stage 2 for table ecmp_group_table's match way 1 for entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: SRAM: Row 7 Col 4 in stage 2 for table ecmp_group_table's match way 2 for entry Entry bits [127: 0] and word range Words 0 to 1023.
-Ternary Indirection Rams Need is 0
-Depth sorted requested
-Requesting to use 0 RAMs and have 29 available.
-Result bus only needs (0):
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 2 RAMs and have 77 available.
-SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
-NO Spill Required off of logical row 13 for SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
-
-call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table ecmp_group_table_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 2 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 2 for ecmp_group_table_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 2 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 2 for ecmp_group_table_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for ecmp_group_table_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for ecmp_group_table_counter.
-Depth sorted idletime requests:
-
-
-=======================================================
-
- calling allocate and add with SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 2 RAMs and have 80 available.
-Requesting to use 0 Map RAMs and have 48 available.
-
-========================================================
- Run Placement on Request List of size 1 in stage 3
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 0
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 2
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 0
-columns for width is 0
-other columns is 1
-reserved columns is 9
-reserved columns for tind 0
-reserved columns for stateful 1
-Ternary Indirection Rams Need is 0
-Depth sorted requested
-Requesting to use 0 RAMs and have 32 available.
-Result bus only needs (0):
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 2 RAMs and have 80 available.
SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
NO Spill Required off of logical row 13 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 3 for table ingress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 3 for ingress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 3 for ingress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table ingress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 2 for ingress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for ingress_port_counter.
Depth sorted idletime requests:
@@ -523,7 +575,7 @@
Requesting to use 0 Map RAMs and have 46 available.
========================================================
- Run Placement on Request List of size 2 in stage 3
+ Run Placement on Request List of size 2 in stage 2
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -551,7 +603,7 @@
Requesting to use 0 RAMs and have 32 available.
Result bus only needs (1):
ingress_port_count_table
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 3
+Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 2
+=========================================
| Placing action/stats/meters/selection
@@ -562,13 +614,13 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 3 for table ingress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 3 for ingress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 3 for ingress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table ingress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 2 for ingress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for ingress_port_counter.
Depth sorted idletime requests:
@@ -581,7 +633,7 @@
Requesting to use 0 Map RAMs and have 46 available.
========================================================
- Run Placement on Request List of size 3 in stage 3
+ Run Placement on Request List of size 3 in stage 2
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -609,7 +661,7 @@
Requesting to use 0 RAMs and have 32 available.
Result bus only needs (1):
ingress_port_count_table
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 3
+Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 2
+=========================================
| Placing action/stats/meters/selection
@@ -621,23 +673,23 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table egress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 3 for table egress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 3 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 3 for egress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 3 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 3 for egress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 3 for egress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 3 for egress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table egress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 2 for egress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 2 for egress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for egress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for egress_port_counter.
NO Spill Required off of logical row 9 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 9 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 4 on right (128 bits) in stage 3 for table ingress_port_counter.
-Allocating: SRAM: Row 4 Col 6 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 4 Unit 0 in stage 3 for ingress_port_counter.
-Allocating: SRAM: Row 4 Col 7 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 4 Unit 1 in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 3 for ingress_port_counter.
+Allocating: Statistics ALU 4 on right (128 bits) in stage 2 for table ingress_port_counter.
+Allocating: SRAM: Row 4 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 4 Unit 0 in stage 2 for ingress_port_counter.
+Allocating: SRAM: Row 4 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 4 Unit 1 in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 2 for ingress_port_counter.
Depth sorted idletime requests:
@@ -650,7 +702,7 @@
Requesting to use 0 Map RAMs and have 44 available.
========================================================
- Run Placement on Request List of size 4 in stage 3
+ Run Placement on Request List of size 4 in stage 2
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -679,8 +731,8 @@
Result bus only needs (2):
egress_port_count_table
ingress_port_count_table
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 3
-Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 3
+Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 2
+Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 2
+=========================================
| Placing action/stats/meters/selection
@@ -692,70 +744,21 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table egress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 3 for table egress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 3 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 3 for egress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 3 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 3 for egress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 3 for egress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 3 for egress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table egress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 2 for egress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 2 for egress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for egress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for egress_port_counter.
NO Spill Required off of logical row 9 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 9 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 4 on right (128 bits) in stage 3 for table ingress_port_counter.
-Allocating: SRAM: Row 4 Col 6 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 4 Unit 0 in stage 3 for ingress_port_counter.
-Allocating: SRAM: Row 4 Col 7 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 4 Unit 1 in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 3 for ingress_port_counter.
-Depth sorted idletime requests:
-
-
-=======================================================
-
- calling allocate and add with SRAM Resource Request for table egress_pkt (of type match), with 0 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 0 RAMs and have 80 available.
-Requesting to use 0 Map RAMs and have 48 available.
-
-========================================================
- Run Placement on Request List of size 2 in stage 0
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 0
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 0
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 0
-columns for width is 0
-other columns is 0
-reserved columns is 10
-reserved columns for tind 0
-reserved columns for stateful 0
-Ternary Indirection Rams Need is 0
-Depth sorted requested
-Requesting to use 0 RAMs and have 32 available.
-Result bus only needs (2):
- egress_pkt
- ingress_pkt
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 0
-Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 0
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 0 RAMs and have 80 available.
+Allocating: Statistics ALU 4 on right (128 bits) in stage 2 for table ingress_port_counter.
+Allocating: SRAM: Row 4 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 4 Unit 0 in stage 2 for ingress_port_counter.
+Allocating: SRAM: Row 4 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 4 Unit 1 in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 2 for ingress_port_counter.
Depth sorted idletime requests:
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.tcam.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.tcam.log
index faa98f7..7db6441 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.tcam.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.tcam.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: mau.tcam.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
@@ -17,9 +17,9 @@
Run Placement on Request List of size 1
========================================================
-Allocating: TCAM: Row 11 Col 1 in stage 1 for table table0 for entries Entry bits [43:0] and word range Words 0 to 511.
-Allocating: TCAM: Row 10 Col 1 in stage 1 for table table0 for entries Entry bits [87:44] and word range Words 0 to 511.
-Allocating: TCAM: Row 9 Col 1 in stage 1 for table table0 for entries Entry bits [131:88] and word range Words 0 to 511.
-Allocating: Ram Data Bus TcamMatchSearch2 11 left_and_right is 44 bits in stage 1
-Allocating: Ram Data Bus TcamMatchSearch2 10 left_and_right is 44 bits in stage 1
-Allocating: Ram Data Bus TcamMatchSearch2 9 left_and_right is 44 bits in stage 1
+Allocating: TCAM: Row 11 Col 1 in stage 0 for table table0 for entries Entry bits [43:0] and word range Words 0 to 511.
+Allocating: TCAM: Row 10 Col 1 in stage 0 for table table0 for entries Entry bits [87:44] and word range Words 0 to 511.
+Allocating: TCAM: Row 9 Col 1 in stage 0 for table table0 for entries Entry bits [131:88] and word range Words 0 to 511.
+Allocating: Ram Data Bus TcamMatchSearch2 11 left_and_right is 44 bits in stage 0
+Allocating: Ram Data Bus TcamMatchSearch2 10 left_and_right is 44 bits in stage 0
+Allocating: Ram Data Bus TcamMatchSearch2 9 left_and_right is 44 bits in stage 0
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.tp.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.tp.log
index dc2c79b..7b6e2c0 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.tp.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/mau.tp.log
@@ -1,35 +1,48 @@
+---------------------------------------------------------------------+
| Log file: mau.tp.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
----- Stage 0 ------
_condition_0
- ingress_pkt
------ Stage 1 ------
- _condition_1
+ process_packet_out_table
table0
------ Stage 2 ------
+----- Stage 1 ------
ecmp_group_table
------ Stage 3 ------
+----- Stage 2 ------
_condition_2
ingress_port_count_table
egress_port_count_table
----- Stage 0 ------
- _condition_3
- egress_pkt
+ _condition_0
+ process_packet_out_table
+ table0
+----- Stage 1 ------
+ ecmp_group_table
+----- Stage 2 ------
+ _condition_2
+ ingress_port_count_table
+ egress_port_count_table
+----- Stage 0 ------
+ _condition_0
+ process_packet_out_table
+ table0
+----- Stage 1 ------
+ ecmp_group_table
+----- Stage 2 ------
+ _condition_2
+ ingress_port_count_table
+ egress_port_count_table
------------------------------------------
Running Table Placement 4
------------------------------------------
Cannot use hash action for table ingress_port_count_table.
-Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 254.
+Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 510.
Cannot use hash action for table egress_port_count_table.
-Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 254.
-Cannot use hash action for table ingress_pkt.
-Table ingress_pkt has no side effect tables.
-Cannot use hash action for table egress_pkt.
-Table egress_pkt has no side effect tables.
+Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 510.
+Cannot use hash action for table process_packet_out_table.
+Table process_packet_out_table has no side effect tables.
User requested to not attempt to place action data parameters in the match overhead.
Cannot use hash action for table table0.
Cannot use hash-action for table table0 because it requires a ternary-style match for field ig_intr_md.ingress_port.
@@ -38,68 +51,70 @@
------------------------------------------
Table Groups
------------------------------------------
-Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (254)]
-Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (254)]
-Table Grouping (ingress) with match table ingress_pkt (1024) [ingress_pkt__action__ (1024)]
-Table Grouping (egress) with match table egress_pkt (1024) [egress_pkt__action__ (1024)]
+Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (510)]
+Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (510)]
+Table Grouping (ingress) with match table process_packet_out_table (1024) [process_packet_out_table__action__ (1024)]
Table Grouping (ingress) with match table table0 (512) [table0__action__ (512), table0_counter (512)]
Table Grouping (ingress) with match table ecmp_group_table (1024) [ecmp_group_table__action__ (1024), ecmp_group_table_counter (1024)]
Table Grouping (ingress) with condition table _condition_0 (0) []
-Table Grouping (ingress) with condition table _condition_1 (0) []
Table Grouping (ingress) with condition table _condition_2 (0) []
-Table Grouping (egress) with condition table _condition_3 (0) []
-Phase 0 possible? False Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
+Phase 0 possible? False Cannot implement table0 in phase 0 resources because table uses side effect tables.
------------------------------------
Starting placement pass 0
------------------------------------
Nodes could place:
_condition_0 (2)
->> choose Table Grouping (ingress) with match table ingress_pkt (1024) [ingress_pkt__action__ (1024)]
-Earliest stage can place: 0
-Placing table: ingress_pkt__action__ with 1024 entries
-Table ingress_pkt__action__ with 0 entries is directly referenced
-Match Table ingress_pkt has a total of 1 entries in stage 0
- Direct mapped table ingress_pkt__action__ has 0 entries
->> set ingress_pkt (9) to placed
->> set _condition_0 (2) to placed
-
-Nodes could place:
- _condition_1 (3)
>> choose Table Grouping (ingress) with match table table0 (512) [table0__action__ (512), table0_counter (512)]
-Earliest stage can place: 1
+Earliest stage can place: 0
Placing table: table0__action__ with 512 entries
Placing table: table0_counter with 512 entries
Table table0__action__ with 8192 entries is directly referenced
Table table0_counter with 4096 entries is directly referenced
-Match Table table0 has a total of 512 entries in stage 1
+Match Table table0 has a total of 512 entries in stage 0
Direct mapped table table0__action__ has 8192 entries
Direct mapped table table0_counter has 4096 entries
>> set table0 (7) to placed
->> set _condition_1 (3) to placed
+>> set _condition_0 (2) to placed
+
+Nodes could place:
+ process_packet_out_table (3)
+ ecmp_group_table (8)
+process_packet_out_table and _condition_0 not mutually exclusive
+ >> earliest stage can place Table Grouping (ingress) with match table process_packet_out_table (1024) [process_packet_out_table__action__ (1024)] is 0
+ >> earliest stage can place Table Grouping (ingress) with match table ecmp_group_table (1024) [ecmp_group_table__action__ (1024), ecmp_group_table_counter (1024)] is 1
+process_packet_out_table and _condition_0 not mutually exclusive
+>> choose Table Grouping (ingress) with match table process_packet_out_table (1024) [process_packet_out_table__action__ (1024)]
+Earliest stage can place: 0
+process_packet_out_table and _condition_0 not mutually exclusive
+Placing table: process_packet_out_table__action__ with 1024 entries
+Table process_packet_out_table__action__ with 0 entries is directly referenced
+Match Table process_packet_out_table has a total of 1 entries in stage 0
+ Direct mapped table process_packet_out_table__action__ has 0 entries
+>> set process_packet_out_table (3) to placed
Nodes could place:
ecmp_group_table (8)
>> choose Table Grouping (ingress) with match table ecmp_group_table (1024) [ecmp_group_table__action__ (1024), ecmp_group_table_counter (1024)]
-Earliest stage can place: 2
+Earliest stage can place: 1
Placing table: ecmp_group_table__action__ with 1024 entries
Placing table: ecmp_group_table_counter with 1024 entries
Table ecmp_group_table__action__ with 0 entries is directly referenced
Table ecmp_group_table_counter with 4096 entries is directly referenced
-Match Table ecmp_group_table has a total of 3072 entries in stage 2
+Match Table ecmp_group_table has a total of 3072 entries in stage 1
Direct mapped table ecmp_group_table__action__ has 0 entries
Direct mapped table ecmp_group_table_counter has 4096 entries
>> set ecmp_group_table (8) to placed
Nodes could place:
_condition_2 (4)
->> choose Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (254)]
-Earliest stage can place: 3
+>> choose Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (510)]
+Earliest stage can place: 2
Placing table: ingress_port_count_table__action__ with 1024 entries
-Placing table: ingress_port_counter with 254 entries
+Placing table: ingress_port_counter with 510 entries
Table ingress_port_count_table__action__ with 0 entries is directly referenced
Table ingress_port_counter with 4096 entries is indirectly referenced
-Match Table ingress_port_count_table has a total of 1 entries in stage 3
+Match Table ingress_port_count_table has a total of 1 entries in stage 2
Direct mapped table ingress_port_count_table__action__ has 0 entries
>> set ingress_port_count_table (5) to placed
>> set _condition_2 (4) to placed
@@ -108,43 +123,27 @@
egress_port_count_table (6)
egress_port_count_table and _condition_2 not mutually exclusive
egress_port_count_table and ingress_port_count_table not mutually exclusive
->> choose Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (254)]
-Earliest stage can place: 3
+>> choose Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (510)]
+Earliest stage can place: 2
egress_port_count_table and _condition_2 not mutually exclusive
egress_port_count_table and ingress_port_count_table not mutually exclusive
Placing table: egress_port_count_table__action__ with 1024 entries
-Placing table: egress_port_counter with 254 entries
+Placing table: egress_port_counter with 510 entries
Table egress_port_count_table__action__ with 0 entries is directly referenced
Table egress_port_counter with 4096 entries is indirectly referenced
-Match Table egress_port_count_table has a total of 1 entries in stage 3
+Match Table egress_port_count_table has a total of 1 entries in stage 2
Direct mapped table egress_port_count_table__action__ has 0 entries
>> set egress_port_count_table (6) to placed
-------------------------------------
- Starting placement pass 1
-------------------------------------
-
-Nodes could place:
- _condition_3 (2)
->> choose Table Grouping (egress) with match table egress_pkt (1024) [egress_pkt__action__ (1024)]
-Earliest stage can place: 0
-Placing table: egress_pkt__action__ with 1024 entries
-Table egress_pkt__action__ with 0 entries is directly referenced
-Match Table egress_pkt has a total of 1 entries in stage 0
- Direct mapped table egress_pkt__action__ has 0 entries
->> set egress_pkt (3) to placed
->> set _condition_3 (2) to placed
------------------------------------------
Logical Table IDs
------------------------------------------
Logical Table IDs in stage 0 are:
- 0 : ingress_pkt
- 1 : egress_pkt
-Logical Table IDs in stage 1 are:
0 : table0
-Logical Table IDs in stage 2 are:
+ 1 : process_packet_out_table
+Logical Table IDs in stage 1 are:
0 : ecmp_group_table
-Logical Table IDs in stage 3 are:
+Logical Table IDs in stage 2 are:
0 : ingress_port_count_table
1 : egress_port_count_table
@@ -154,10 +153,8 @@
count_ingress -> egress_port_count_table
action mapping for egress_port_count_table
count_egress -> --END_OF_PIPELINE--
-action mapping for ingress_pkt
- _packet_out -> _condition_1
-action mapping for egress_pkt
- add_packet_in_hdr -> --END_OF_PIPELINE--
+action mapping for process_packet_out_table
+ _process_packet_out -> _condition_2
action mapping for table0
set_egress_port -> _condition_2
ecmp_group -> ecmp_group_table
@@ -166,14 +163,8 @@
action mapping for ecmp_group_table
set_egress_port -> _condition_2
true/false mapping for _condition_0
- False -> _condition_1
- True -> ingress_pkt
-true/false mapping for _condition_1
- False -> _condition_2
+ False -> process_packet_out_table
True -> table0
true/false mapping for _condition_2
False -> --END_OF_PIPELINE--
True -> ingress_port_count_table
-true/false mapping for _condition_3
- False -> --END_OF_PIPELINE--
- True -> egress_pkt
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.characterize.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.characterize.log
index d65de27..83c9670 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.characterize.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.characterize.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: pa.characterize.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
Program: ecmp
@@ -14,16 +14,16 @@
| phv1 | ingress | | SH | | | | | | | | | | | | | | | |
| [31:24] | ingress | ipv4.protocol[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [23:8] | ingress | ipv4.hdrChecksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [7:0] | ingress | ipv4.srcAddr[31:24] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [7:0] | ingress | ipv4.srcAddr[31:24] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv2 | ingress | | | | | | | | | | | | | | | | | |
-| [31:0] | ingress | ipv4.dstAddr[31:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [31:0] | ingress | ipv4.dstAddr[31:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv3 | ingress | | | | | | | | | | | | | | | | | |
-| [31:0] | ingress | ethernet.dstAddr[39:8] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [31:0] | ingress | ethernet.dstAddr[39:8] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv4 | ingress | | | | | | | | | | | | | | | | | |
-| [31:0] | ingress | ethernet.srcAddr[31:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [31:0] | ingress | ethernet.srcAddr[31:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv5 | ingress | | SH | | | | | | | | | | | | | | | |
-| [31:16] | ingress | udp.srcPort[15:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [15:0] | ingress | udp.dstPort[15:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [31:16] | ingress | udp.srcPort[15:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:0] | ingress | udp.dstPort[15:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv6 | - | | | | | | | | | | | | | | | | | |
| phv7 | - | | | | | | | | | | | | | | | | | |
| phv8 | - | | | | | | | | | | | | | | | | | |
@@ -86,25 +86,23 @@
| phv62 | - | | | | | | | | | | | | | | | | | |
| phv63 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
-| phv64 | ingress | | SH | | | | | | | | | | | | | | | |
-| [7:1] | ingress | -pad-0-[6:0] | meta | | | | | | | | | | | | | | | |
-| [0:0] | ingress | ig_intr_md_for_tm.copy_to_cpu[0:0] | imeta | | | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv64 | ingress | | | | | | | | | | | | | | | | | |
+| [7:0] | ingress | ipv4.srcAddr[23:16] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv65 | ingress | | | | | | | | | | | | | | | | | |
-| [7:0] | ingress | ipv4.srcAddr[23:16] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [7:0] | ingress | ethernet.dstAddr[47:40] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv66 | ingress | | | | | | | | | | | | | | | | | |
-| [7:0] | ingress | ethernet.dstAddr[47:40] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv67 | ingress | | | | | | | | | | | | | | | | | |
-| [7:0] | ingress | ethernet.srcAddr[39:32] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv68 | ingress | | SH | | | | | | | | | | | | | | | |
+| [7:0] | ingress | ethernet.srcAddr[39:32] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv67 | ingress | | SH | | | | | | | | | | | | | | | |
| [6:6] | ingress | --validity_check--metadata_bridge[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [5:5] | ingress | --validity_check--udp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [4:4] | ingress | --validity_check--tcp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [3:3] | ingress | --validity_check--ipv4[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [2:2] | ingress | --validity_check--ethernet[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [1:1] | ingress | --validity_check--packet_out_hdr[0:0] | pov | | W | RW | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [0:0] | ingress | --validity_check--packet_in_hdr[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv69 | ingress | | | | | | | | | | | | | | | | | |
-| [7:5] | ingress | ig_intr_md_for_tm.drop_ctl[2:0] | imeta | | | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [1:1] | ingress | --validity_check--packet_out_hdr[0:0] | pov | | W | RW | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [0:0] | ingress | --validity_check--packet_in_hdr[0:0] | pov | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv68 | ingress | | | | | | | | | | | | | | | | | |
+| [7:5] | ingress | ig_intr_md_for_tm.drop_ctl[2:0] | imeta | | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv69 | - | | | | | | | | | | | | | | | | | |
| phv70 | - | | | | | | | | | | | | | | | | | |
| phv71 | - | | | | | | | | | | | | | | | | | |
| phv72 | - | | | | | | | | | | | | | | | | | |
@@ -117,18 +115,16 @@
| phv79 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| phv80 | egress | | SH | | | | | | | | | | | | | | | |
-| [7:1] | egress | -pad-0-[6:0] | meta | | | | | | | | | | | | | | | |
-| [0:0] | egress | ig_intr_md_for_tm.copy_to_cpu[0:0] | imeta | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv81 | egress | | SH | | | | | | | | | | | | | | | |
| [7:3] | egress | eg_intr_md._pad7[4:0] | imeta | | W | | | | | | | | | | | | | |
| [2:0] | egress | eg_intr_md.egress_cos[2:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv82 | egress | | SH | | | | | | | | | | | | | | | |
+| phv81 | egress | | SH | | | | | | | | | | | | | | | |
| [5:5] | egress | --validity_check--udp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [4:4] | egress | --validity_check--tcp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [3:3] | egress | --validity_check--ipv4[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [2:2] | egress | --validity_check--ethernet[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [1:1] | egress | --validity_check--packet_out_hdr[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [0:0] | egress | --validity_check--packet_in_hdr[0:0] | pov | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [0:0] | egress | --validity_check--packet_in_hdr[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv82 | - | | | | | | | | | | | | | | | | | |
| phv83 | - | | | | | | | | | | | | | | | | | |
| phv84 | - | | | | | | | | | | | | | | | | | |
| phv85 | - | | | | | | | | | | | | | | | | | |
@@ -178,29 +174,29 @@
| phv127 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| phv128 | ingress | | SH | | | | | | | | | | | | | | | |
-| [15:15] | ingress | ig_intr_md.resubmit_flag[0:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [14:14] | ingress | ig_intr_md._pad1[0:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [13:12] | ingress | ig_intr_md._pad2[1:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [11:9] | ingress | ig_intr_md._pad3[2:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [8:0] | ingress | ig_intr_md.ingress_port[8:0] | imeta | | W | ~ | R | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:15] | ingress | ig_intr_md.resubmit_flag[0:0] | imeta | | W | | | | | | | | | | | | | |
+| [14:14] | ingress | ig_intr_md._pad1[0:0] | imeta | | W | | | | | | | | | | | | | |
+| [13:12] | ingress | ig_intr_md._pad2[1:0] | imeta | | W | | | | | | | | | | | | | |
+| [11:9] | ingress | ig_intr_md._pad3[2:0] | imeta | | W | | | | | | | | | | | | | |
+| [8:0] | ingress | ig_intr_md.ingress_port[8:0] | imeta | | W | R | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv129 | ingress | | OL,SH | | | | | | | | | | | | | | | |
| [15:7] | ingress | packet_out_hdr.egress_port[8:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [15:7] | ingress | packet_in_hdr.ingress_port[8:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:7] | ingress | packet_in_hdr.ingress_port[8:0] | pkt | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [6:0] | ingress | packet_out_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [6:0] | ingress | packet_in_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv130 | ingress | | | | | | | | | | | | | | | | | |
-| [8:0] | ingress | ig_intr_md_for_tm.ucast_egress_port[8:0] | imeta | | | W | W | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [8:0] | ingress | ig_intr_md_for_tm.ucast_egress_port[8:0] | imeta | | | W | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv131 | ingress | | | | | | | | | | | | | | | | | |
-| [15:0] | ingress | ipv4.srcAddr[15:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:0] | ingress | ipv4.srcAddr[15:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv132 | ingress | | SH | | | | | | | | | | | | | | | |
-| [15:8] | ingress | ethernet.dstAddr[7:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [7:0] | ingress | ethernet.srcAddr[47:40] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:8] | ingress | ethernet.dstAddr[7:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [7:0] | ingress | ethernet.srcAddr[47:40] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv133 | ingress | | | | | | | | | | | | | | | | | |
-| [15:0] | ingress | ethernet.etherType[15:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:0] | ingress | ethernet.etherType[15:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv134 | ingress | | | | | | | | | | | | | | | | | |
-| [15:0] | ingress | ecmp_metadata.groupId[15:0] | meta | | | | W | R | | | | | | | | | | |
+| [15:0] | ingress | ecmp_metadata.groupId[15:0] | meta | | | W | R | | | | | | | | | | | |
| phv135 | ingress | | | | | | | | | | | | | | | | | |
-| [15:0] | ingress | ecmp_metadata.selector[15:0] | meta | | | | W | R | | | | | | | | | | |
+| [15:0] | ingress | ecmp_metadata.selector[15:0] | meta | | | W | R | | | | | | | | | | | |
| phv136 | - | | | | | | | | | | | | | | | | | |
| phv137 | - | | | | | | | | | | | | | | | | | |
| phv138 | - | | | | | | | | | | | | | | | | | |
@@ -211,14 +207,10 @@
| phv143 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| phv144 | egress | | SH | | | | | | | | | | | | | | | |
-| [15:9] | egress | -pad-1-[6:0] | meta | | | | | | | | | | | | | | | |
-| [8:0] | egress | ig_intr_md.ingress_port[8:0] | imeta | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv145 | egress | | SH | | | | | | | | | | | | | | | |
-| [15:7] | egress | packet_in_hdr.ingress_port[8:0] | pkt | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [6:0] | egress | packet_in_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv146 | egress | | SH | | | | | | | | | | | | | | | |
| [15:9] | egress | eg_intr_md._pad0[6:0] | imeta | | W | | | | | | | | | | | | | |
| [8:0] | egress | eg_intr_md.egress_port[8:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv145 | - | | | | | | | | | | | | | | | | | |
+| phv146 | - | | | | | | | | | | | | | | | | | |
| phv147 | - | | | | | | | | | | | | | | | | | |
| phv148 | - | | | | | | | | | | | | | | | | | |
| phv149 | - | | | | | | | | | | | | | | | | | |
@@ -306,46 +298,45 @@
| [23:21] | ingress | ipv4.flags[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [20:8] | ingress | ipv4.fragOffset[12:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [7:0] | ingress | ipv4.ttl[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv257 | ingress | | | | | | | | | | | | | | | | | |
-| [31:0] | ingress | tcp.ackNo[31:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv258 | ingress | | SH | | | | | | | | | | | | | | | |
+| phv257 | ingress | | SH | | | | | | | | | | | | | | | |
| [31:28] | ingress | tcp.dataOffset[3:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [27:25] | ingress | tcp.res[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [24:22] | ingress | tcp.ecn[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [21:16] | ingress | tcp.ctrl[5:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | ingress | tcp.window[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv259 | ingress | | SH | | | | | | | | | | | | | | | |
+| phv258 | ingress | | SH | | | | | | | | | | | | | | | |
| [31:16] | ingress | tcp.checksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | ingress | tcp.urgentPtr[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv260 | egress | | SH | | | | | | | | | | | | | | | |
+| phv259 | - | | | | | | | | | | | | | | | | | |
+| phv260 | - | | | | | | | | | | | | | | | | | |
+| phv261 | - | | | | | | | | | | | | | | | | | |
+| phv262 | - | | | | | | | | | | | | | | | | | |
+| phv263 | - | | | | | | | | | | | | | | | | | |
+| phv264 | egress | | SH | | | | | | | | | | | | | | | |
| [31:24] | egress | ipv4.ttl[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [23:16] | egress | ipv4.protocol[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | egress | ipv4.hdrChecksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv261 | egress | | | | | | | | | | | | | | | | | |
+| phv265 | egress | | | | | | | | | | | | | | | | | |
| [31:0] | egress | ipv4.srcAddr[31:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv262 | egress | | | | | | | | | | | | | | | | | |
+| phv266 | egress | | | | | | | | | | | | | | | | | |
| [31:0] | egress | ipv4.dstAddr[31:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv263 | egress | | OL,SH | | | | | | | | | | | | | | | |
+| phv267 | egress | | OL,SH | | | | | | | | | | | | | | | |
| [31:16] | egress | udp.length_[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [31:0] | egress | tcp.ackNo[31:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | egress | udp.checksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv264 | egress | | SH | | | | | | | | | | | | | | | |
+| phv268 | egress | | SH | | | | | | | | | | | | | | | |
| [31:28] | egress | tcp.dataOffset[3:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [27:25] | egress | tcp.res[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [24:22] | egress | tcp.ecn[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [21:16] | egress | tcp.ctrl[5:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | egress | tcp.window[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv265 | egress | | SH | | | | | | | | | | | | | | | |
+| phv269 | egress | | SH | | | | | | | | | | | | | | | |
| [31:16] | egress | tcp.checksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | egress | tcp.urgentPtr[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv266 | egress | | | | | | | | | | | | | | | | | |
+| phv270 | egress | | | | | | | | | | | | | | | | | |
| [31:0] | egress | ethernet.dstAddr[39:8] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv267 | egress | | | | | | | | | | | | | | | | | |
+| phv271 | egress | | | | | | | | | | | | | | | | | |
| [31:0] | egress | ethernet.srcAddr[31:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv268 | - | | | | | | | | | | | | | | | | | |
-| phv269 | - | | | | | | | | | | | | | | | | | |
-| phv270 | - | | | | | | | | | | | | | | | | | |
-| phv271 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| phv272 | - | | | | | | | | | | | | | | | | | |
| phv273 | - | | | | | | | | | | | | | | | | | |
@@ -373,26 +364,28 @@
| phv290 | ingress | | OL,SH | | | | | | | | | | | | | | | |
| [7:0] | ingress | tcp.srcPort[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [7:0] | ingress | udp.length_[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv291 | - | | | | | | | | | | | | | | | | | |
-| phv292 | egress | | SH | | | | | | | | | | | | | | | |
+| phv291 | ingress | | | | | | | | | | | | | | | | | |
+| [7:0] | ingress | tcp.dstPort[15:8] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv292 | ingress | | | | | | | | | | | | | | | | | |
+| [7:0] | ingress | tcp.dstPort[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv293 | - | | | | | | | | | | | | | | | | | |
+| phv294 | - | | | | | | | | | | | | | | | | | |
+| phv295 | - | | | | | | | | | | | | | | | | | |
+| phv296 | egress | | SH | | | | | | | | | | | | | | | |
| [7:4] | egress | ipv4.version[3:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [3:0] | egress | ipv4.ihl[3:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv293 | egress | | | | | | | | | | | | | | | | | |
+| phv297 | egress | | | | | | | | | | | | | | | | | |
| [7:0] | egress | ipv4.diffserv[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv294 | egress | | OL,SH | | | | | | | | | | | | | | | |
+| phv298 | egress | | OL,SH | | | | | | | | | | | | | | | |
| [7:0] | egress | tcp.srcPort[15:8] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [7:0] | egress | udp.srcPort[15:8] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv295 | egress | | OL,SH | | | | | | | | | | | | | | | |
+| phv299 | egress | | OL,SH | | | | | | | | | | | | | | | |
| [7:0] | egress | tcp.srcPort[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [7:0] | egress | udp.srcPort[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv296 | egress | | | | | | | | | | | | | | | | | |
+| phv300 | egress | | | | | | | | | | | | | | | | | |
| [7:0] | egress | ethernet.dstAddr[47:40] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv297 | egress | | | | | | | | | | | | | | | | | |
+| phv301 | egress | | | | | | | | | | | | | | | | | |
| [7:0] | egress | ethernet.srcAddr[39:32] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv298 | - | | | | | | | | | | | | | | | | | |
-| phv299 | - | | | | | | | | | | | | | | | | | |
-| phv300 | - | | | | | | | | | | | | | | | | | |
-| phv301 | - | | | | | | | | | | | | | | | | | |
| phv302 | - | | | | | | | | | | | | | | | | | |
| phv303 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
@@ -420,42 +413,45 @@
| [15:8] | ingress | ipv4.totalLen[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [7:0] | ingress | ipv4.identification[15:8] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv322 | ingress | | OL,SH | | | | | | | | | | | | | | | |
-| [15:0] | ingress | tcp.dstPort[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:0] | ingress | tcp.seqNo[31:16] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | ingress | udp.checksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv323 | ingress | | | | | | | | | | | | | | | | | |
-| [15:0] | ingress | tcp.seqNo[31:16] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv324 | ingress | | | | | | | | | | | | | | | | | |
| [15:0] | ingress | tcp.seqNo[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv325 | - | | | | | | | | | | | | | | | | | |
-| phv326 | egress | | | | | | | | | | | | | | | | | |
+| phv324 | ingress | | | | | | | | | | | | | | | | | |
+| [15:0] | ingress | tcp.ackNo[31:16] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv325 | ingress | | | | | | | | | | | | | | | | | |
+| [15:0] | ingress | tcp.ackNo[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv326 | - | | | | | | | | | | | | | | | | | |
+| phv327 | - | | | | | | | | | | | | | | | | | |
+| phv328 | - | | | | | | | | | | | | | | | | | |
+| phv329 | - | | | | | | | | | | | | | | | | | |
+| phv330 | - | | | | | | | | | | | | | | | | | |
+| phv331 | - | | | | | | | | | | | | | | | | | |
+| phv332 | egress | | | | | | | | | | | | | | | | | |
| [15:0] | egress | ipv4.totalLen[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv327 | egress | | | | | | | | | | | | | | | | | |
+| phv333 | egress | | | | | | | | | | | | | | | | | |
| [15:0] | egress | ipv4.identification[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv328 | egress | | SH | | | | | | | | | | | | | | | |
+| phv334 | egress | | SH | | | | | | | | | | | | | | | |
| [15:13] | egress | ipv4.flags[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [12:0] | egress | ipv4.fragOffset[12:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv329 | egress | | OL,SH | | | | | | | | | | | | | | | |
+| phv335 | egress | | | | | | | | | | | | | | | | | |
| [15:0] | egress | tcp.dstPort[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [15:0] | egress | udp.dstPort[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv330 | egress | | | | | | | | | | | | | | | | | |
+| | | | | | | | | | | | | | | | | | | |
+| phv336 | egress | | OL,SH | | | | | | | | | | | | | | | |
| [15:0] | egress | tcp.seqNo[31:16] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv331 | egress | | | | | | | | | | | | | | | | | |
+| [15:0] | egress | udp.dstPort[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv337 | egress | | | | | | | | | | | | | | | | | |
| [15:0] | egress | tcp.seqNo[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv332 | egress | | SH | | | | | | | | | | | | | | | |
+| phv338 | egress | | SH | | | | | | | | | | | | | | | |
| [15:8] | egress | ethernet.dstAddr[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [7:0] | egress | ethernet.srcAddr[47:40] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv333 | egress | | | | | | | | | | | | | | | | | |
+| phv339 | egress | | | | | | | | | | | | | | | | | |
| [15:0] | egress | ethernet.etherType[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv334 | egress | | SH | | | | | | | | | | | | | | | |
+| phv340 | egress | | OL,SH | | | | | | | | | | | | | | | |
| [15:7] | egress | packet_out_hdr.egress_port[8:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:7] | egress | packet_in_hdr.ingress_port[8:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [6:0] | egress | packet_out_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv335 | - | | | | | | | | | | | | | | | | | |
-| | | | | | | | | | | | | | | | | | | |
-| phv336 | - | | | | | | | | | | | | | | | | | |
-| phv337 | - | | | | | | | | | | | | | | | | | |
-| phv338 | - | | | | | | | | | | | | | | | | | |
-| phv339 | - | | | | | | | | | | | | | | | | | |
-| phv340 | - | | | | | | | | | | | | | | | | | |
+| [6:0] | egress | packet_in_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv341 | - | | | | | | | | | | | | | | | | | |
| phv342 | - | | | | | | | | | | | | | | | | | |
| phv343 | - | | | | | | | | | | | | | | | | | |
@@ -487,9 +483,9 @@
-----------------------------------------------------------------------------------------------------------------------------------------
-Containers used: 61
-Containers with data overlayed: 8 (13.11%)
-Containers shared: 33 (54.10%)
+Containers used: 59
+Containers with data overlayed: 9 (15.25%)
+Containers shared: 29 (49.15%)
------------------------
Legend:
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.constraints.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.constraints.log
index 5bb8103..f408f0a 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.constraints.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.constraints.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: pa.constraints.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
To populate this log file, include --print-pa-constraints as a compiler argument.
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.liveness.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.liveness.log
index 4ba6eee..9699d1b 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.liveness.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.liveness.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: pa.liveness.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.log
index b6941b9..7aecfb6 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: pa.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
HLIR Version: 0.10.5
@@ -60,7 +60,7 @@
-----------------------------------------------
-----------------------------------------------
- Eliminating unused metadata (99 instances)
+ Eliminating unused metadata (100 instances)
-----------------------------------------------
Removing standard_metadata.ingress_port in ingress
Removing standard_metadata.packet_length in ingress
@@ -80,6 +80,7 @@
Removing ig_intr_md_for_tm.qid in ingress
Removing ig_intr_md_for_tm.icos_for_copy_to_cpu in ingress
Removing ig_intr_md_for_tm._pad2 in ingress
+Removing ig_intr_md_for_tm.copy_to_cpu in ingress
Removing ig_intr_md_for_tm.packet_color in ingress
Removing ig_intr_md_for_tm.disable_ucast_cutthru in ingress
Removing ig_intr_md_for_tm.enable_mcast_cutthru in ingress
@@ -175,10 +176,10 @@
--------------------------------------------
ingress field instance bit width histogram
--------------------------------------------
- Total fields: 51
+ Total fields: 50
Max value: 15
- 1 : xxxxxxxxxx (10)
+ 1 : xxxxxxxxx (9)
2 : x (1)
3 : xxxxx (5)
4 : xxx (3)
@@ -194,17 +195,17 @@
--------------------------------------------
egress field instance bit width histogram
--------------------------------------------
- Total fields: 46
+ Total fields: 44
Max value: 13
- 1 : xxxxxxx (7)
+ 1 : xxxxxx (6)
3 : xxxx (4)
4 : xxx (3)
5 : x (1)
6 : x (1)
7 : xxx (3)
8 : xxx (3)
- 9 : xxxx (4)
+ 9 : xxx (3)
13 : x (1)
16 : xxxxxxxxxxxxx (13)
32 : xxxx (4)
@@ -266,7 +267,7 @@
-----------------------------------------------
-----------------------------------------------
- Eliminating unused metadata (99 instances)
+ Eliminating unused metadata (100 instances)
-----------------------------------------------
Removing standard_metadata.ingress_port in ingress
Removing standard_metadata.packet_length in ingress
@@ -286,6 +287,7 @@
Removing ig_intr_md_for_tm.qid in ingress
Removing ig_intr_md_for_tm.icos_for_copy_to_cpu in ingress
Removing ig_intr_md_for_tm._pad2 in ingress
+Removing ig_intr_md_for_tm.copy_to_cpu in ingress
Removing ig_intr_md_for_tm.packet_color in ingress
Removing ig_intr_md_for_tm.disable_ucast_cutthru in ingress
Removing ig_intr_md_for_tm.enable_mcast_cutthru in ingress
@@ -381,10 +383,10 @@
--------------------------------------------
ingress field instance bit width histogram
--------------------------------------------
- Total fields: 51
+ Total fields: 50
Max value: 15
- 1 : xxxxxxxxxx (10)
+ 1 : xxxxxxxxx (9)
2 : x (1)
3 : xxxxx (5)
4 : xxx (3)
@@ -400,17 +402,17 @@
--------------------------------------------
egress field instance bit width histogram
--------------------------------------------
- Total fields: 46
+ Total fields: 44
Max value: 13
- 1 : xxxxxxx (7)
+ 1 : xxxxxx (6)
3 : xxxx (4)
4 : xxx (3)
5 : x (1)
6 : x (1)
7 : xxx (3)
8 : xxx (3)
- 9 : xxxx (4)
+ 9 : xxx (3)
13 : x (1)
16 : xxxxxxxxxxxxx (13)
32 : xxxx (4)
@@ -421,7 +423,7 @@
---------------------------------------------------------------------------------------------------------------------------------
| --validity_check--ethernet | 1 | egress | x | x | | | |
| --validity_check--ipv4 | 1 | egress | x | x | | | |
-| --validity_check--packet_in_hdr | 1 | egress | x | x | | | x |
+| --validity_check--packet_in_hdr | 1 | egress | x | x | | | |
| --validity_check--packet_out_hdr | 1 | egress | x | x | | | |
| --validity_check--tcp | 1 | egress | x | x | | | |
| --validity_check--udp | 1 | egress | x | x | | | |
@@ -432,8 +434,6 @@
| ethernet.dstAddr | 48 | egress | x | x | | | |
| ethernet.etherType | 16 | egress | x | x | | | |
| ethernet.srcAddr | 48 | egress | x | x | | | |
-| ig_intr_md.ingress_port | 9 | egress | x | | x | x | |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | egress | x | | x | x | |
| ipv4.diffserv | 8 | egress | x | x | | | |
| ipv4.dstAddr | 32 | egress | x | x | | | |
| ipv4.flags | 3 | egress | x | x | | | |
@@ -447,7 +447,7 @@
| ipv4.ttl | 8 | egress | x | x | | | |
| ipv4.version | 4 | egress | x | x | | | |
| packet_in_hdr._padding | 7 | egress | x | x | | | |
-| packet_in_hdr.ingress_port | 9 | egress | x | x | | | x |
+| packet_in_hdr.ingress_port | 9 | egress | x | x | | | |
| packet_out_hdr._padding | 7 | egress | x | x | | | |
| packet_out_hdr.egress_port | 9 | egress | x | x | | | |
| tcp.ackNo | 32 | egress | x | x | | | |
@@ -468,7 +468,7 @@
| --validity_check--ethernet | 1 | ingress | x | x | | | |
| --validity_check--ipv4 | 1 | ingress | x | x | | | |
| --validity_check--metadata_bridge | 1 | ingress | x | x | | | |
-| --validity_check--packet_in_hdr | 1 | ingress | x | x | | | |
+| --validity_check--packet_in_hdr | 1 | ingress | x | x | | | x |
| --validity_check--packet_out_hdr | 1 | ingress | x | x | | x | x |
| --validity_check--tcp | 1 | ingress | x | x | | | |
| --validity_check--udp | 1 | ingress | x | x | | | |
@@ -482,7 +482,6 @@
| ig_intr_md._pad3 | 3 | ingress | x | | x | | |
| ig_intr_md.ingress_port | 9 | ingress | x | x | x | x | |
| ig_intr_md.resubmit_flag | 1 | ingress | x | | x | | |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | ingress | | x | x | | x |
| ig_intr_md_for_tm.drop_ctl | 3 | ingress | | x | x | | x |
| ig_intr_md_for_tm.ucast_egress_port | 9 | ingress | | x | x | x | x |
| ipv4.diffserv | 8 | ingress | x | x | | | |
@@ -498,7 +497,7 @@
| ipv4.ttl | 8 | ingress | x | x | | | |
| ipv4.version | 4 | ingress | x | x | | | |
| packet_in_hdr._padding | 7 | ingress | x | x | | | |
-| packet_in_hdr.ingress_port | 9 | ingress | x | x | | | |
+| packet_in_hdr.ingress_port | 9 | ingress | x | x | | | x |
| packet_out_hdr._padding | 7 | ingress | x | x | | | |
| packet_out_hdr.egress_port | 9 | ingress | x | x | | x | |
| tcp.ackNo | 32 | ingress | x | x | | | |
@@ -554,19 +553,19 @@
parse_pkt_in and parse_pkt_out are exclusive parse states
parse_tcp and parse_udp are exclusive parse states
->>Event 'pa_init' at time 1504795731.64
+>>Event 'pa_init' at time 1504859117.63
Took 0.01 seconds
--------------------------------------------
-PHV MAU Groups: 95
+PHV MAU Groups: 92
--------------------------------------------
Phv Mau Group (ingress) -- 2 instances for total bit width of 18.
+ ig_intr_md.ingress_port <9 bits ingress parsed imeta R>
+ packet_in_hdr.ingress_port <9 bits ingress parsed W>
+
+Phv Mau Group (ingress) -- 2 instances for total bit width of 18.
ig_intr_md_for_tm.ucast_egress_port <9 bits ingress imeta R W>
packet_out_hdr.egress_port <9 bits ingress parsed R>
-Phv Mau Group (egress) -- 2 instances for total bit width of 18.
- packet_in_hdr.ingress_port <9 bits egress parsed W>
- ig_intr_md.ingress_port <9 bits egress parsed imeta R>
-
Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
ig_intr_md.resubmit_flag <1 bits ingress parsed imeta>
@@ -579,20 +578,11 @@
Phv Mau Group (ingress) -- 1 instance for total bit width of 3.
ig_intr_md._pad3 <3 bits ingress parsed imeta>
-Phv Mau Group (ingress) -- 1 instance for total bit width of 9.
- ig_intr_md.ingress_port <9 bits ingress parsed imeta R>
-
Phv Mau Group (ingress) -- 1 instance for total bit width of 3.
ig_intr_md_for_tm.drop_ctl <3 bits ingress imeta W>
Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
- ig_intr_md_for_tm.copy_to_cpu <1 bits ingress imeta W>
-
-Phv Mau Group (ingress) -- 1 instance for total bit width of 9.
- packet_in_hdr.ingress_port <9 bits ingress parsed tagalong>
-
-Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
- --validity_check--packet_in_hdr <1 bits ingress parsed pov>
+ --validity_check--packet_in_hdr <1 bits ingress parsed pov W>
Phv Mau Group (ingress) -- 1 instance for total bit width of 7.
packet_in_hdr._padding <7 bits ingress parsed tagalong>
@@ -714,8 +704,11 @@
Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
--validity_check--metadata_bridge <1 bits ingress parsed pov>
+Phv Mau Group (egress) -- 1 instance for total bit width of 9.
+ packet_in_hdr.ingress_port <9 bits egress parsed tagalong>
+
Phv Mau Group (egress) -- 1 instance for total bit width of 1.
- --validity_check--packet_in_hdr <1 bits egress parsed pov W>
+ --validity_check--packet_in_hdr <1 bits egress parsed pov>
Phv Mau Group (egress) -- 1 instance for total bit width of 7.
packet_in_hdr._padding <7 bits egress parsed tagalong>
@@ -831,9 +824,6 @@
Phv Mau Group (egress) -- 1 instance for total bit width of 16.
udp.checksum <16 bits egress parsed tagalong>
-Phv Mau Group (egress) -- 1 instance for total bit width of 1.
- ig_intr_md_for_tm.copy_to_cpu <1 bits egress parsed imeta R>
-
Phv Mau Group (egress) -- 1 instance for total bit width of 7.
eg_intr_md._pad0 <7 bits egress parsed imeta>
@@ -847,7 +837,7 @@
eg_intr_md.egress_cos <3 bits egress parsed imeta>
->>Event 'pa_resv' at time 1504795731.64
+>>Event 'pa_resv' at time 1504859117.63
Took 0.00 seconds
-----------------------------------------------
@@ -889,239 +879,14 @@
Group 2 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv32
Group 3 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv48
Reserving 32-bit container for ingress: phv0
->>Event 'pa_bridge' at time 1504795731.68
+>>Event 'pa_bridge' at time 1504859117.67
Took 0.04 seconds
-----------------------------------------------
Allocating fields related to bridged metadata
-----------------------------------------------
Allocation Step
- ig_intr_md.ingress_port <9 bits ingress parsed imeta R> and ig_intr_md.ingress_port <9 bits egress parsed imeta R>
- ig_intr_md_for_tm.copy_to_cpu <1 bits ingress imeta W> and ig_intr_md_for_tm.copy_to_cpu <1 bits egress parsed imeta R>
-
-
-Allowed alignment for fields:
- ig_intr_md.ingress_port -> [0, 8, 16, 24]
- ig_intr_md_for_tm.copy_to_cpu -> [0, 1, 2, 3, 4, 5, 6, 7]
-
-Required packing for bridged metadata: 1
- ig_intr_md.ingress_port (ingress)
- phv[15:15] = ig_intr_md.resubmit_flag[0:0]
- phv[14:14] = ig_intr_md._pad1[0:0]
- phv[13:12] = ig_intr_md._pad2[1:0]
- phv[11:9] = ig_intr_md._pad3[2:0]
- phv[8:0] = ig_intr_md.ingress_port[8:0]
-ig_intr_md_for_tm.copy_to_cpu cannot share with any fields: total bits 1
-
-
-All combinations = 1
-Valid combinations = 1
-Choosing to pack non-byte multiple metadata as below, which wastes 0 bits
-
-Sharing capabilities of groups: (2)
-Group ['ig_intr_md.resubmit_flag', 'ig_intr_md._pad1', 'ig_intr_md._pad2', 'ig_intr_md._pad3', 'ig_intr_md.ingress_port'] can share with 0 other groups:
-Group ['ig_intr_md_for_tm.copy_to_cpu'] can share with 0 other groups:
-
-Merged sharing capabilities of groups: (2)
-Group ['ig_intr_md.resubmit_flag', 'ig_intr_md._pad1', 'ig_intr_md._pad2', 'ig_intr_md._pad3', 'ig_intr_md.ingress_port'] can share with 0 other groups (16 bits):
-Group ['ig_intr_md_for_tm.copy_to_cpu'] can share with 0 other groups (1 bits):
-
-Final group packing:
-Group 0:
- ['ig_intr_md_for_tm.copy_to_cpu']
-Group 1:
- ['ig_intr_md.resubmit_flag', 'ig_intr_md._pad1', 'ig_intr_md._pad2', 'ig_intr_md._pad3', 'ig_intr_md.ingress_port']
-Preferred packing is [8, 16]
-
-Final ingress bridged metadata packing: 24 bits (3 bytes)
- -pad-0- / 7 bits
- ig_intr_md_for_tm.copy_to_cpu / 1 bits
- ig_intr_md.resubmit_flag / 1 bits
- ig_intr_md._pad1 / 1 bits
- ig_intr_md._pad2 / 2 bits
- ig_intr_md._pad3 / 3 bits
- ig_intr_md.ingress_port / 9 bits
-
-Final egress bridged metadata packing: 24 bits (3 bytes)
- -pad-0- / 7 bits
- ig_intr_md_for_tm.copy_to_cpu / 1 bits
- -pad-1- / 7 bits
- ig_intr_md.ingress_port / 9 bits
-
--------------------------------------------
-Allocating parsed header: pkt fields (7) / meta fields (0) using extraction bandwidth 224
--------------------------------------------
-Extracted bits: 24
-Set metadata bits: 0
-Gress: ingress
-bits_will_need_to_parse = 24
-unused_metadata_container_bits = 0
-min_parse_states = 1
-bits_per_state = 24
-Parse state 0 (24 bits)
- -pad-0- [6:0]
- ig_intr_md_for_tm.copy_to_cpu [0:0]
- ig_intr_md.resubmit_flag [0:0]
- ig_intr_md._pad1 [0:0]
- ig_intr_md._pad2 [1:0]
- ig_intr_md._pad3 [2:0]
- ig_intr_md.ingress_port [8:0]
-----------------------------------------------------------------------------------------------------
-| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-----------------------------------------------------------------------------------------------------
-| -pad-0- | 7 | True | - | - | - | None | 1 |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | False | - | - | - | 1 | 1 |
-| ig_intr_md.resubmit_flag | 1 | False | - | - | - | 1 | 1 |
-| ig_intr_md._pad1 | 1 | False | - | - | - | 1 | 1 |
-| ig_intr_md._pad2 | 2 | False | - | - | - | 1 | 1 |
-| ig_intr_md._pad3 | 3 | False | - | - | - | 1 | 1 |
-| ig_intr_md.ingress_port | 9 | False | - | - | - | 2 | 1 |
-----------------------------------------------------------------------------------------------------
-
-Packing options: 5
-MAU containers available:
- 8-bit: 48
- 16-bit: 80
- 32-bit: 47
-Tagalong containers available:
- 8-bit: 32
- 16-bit: 48
- 32-bit: 32
-Initial packing options: 5
-
-Packing option 0: [8, 16]
-MAU containers after:
- 8-bit: 47
- 16-bit: 79
- 32-bit: 47
-+----------------------------------------+
-| -pad-0- [6:0] |
-| ig_intr_md_for_tm.copy_to_cpu [0:0] |
-+----------------------------------------+
-| ig_intr_md.resubmit_flag [0:0] |
-| ig_intr_md._pad1 [0:0] |
-| ig_intr_md._pad2 [1:0] |
-| ig_intr_md._pad3 [2:0] |
-| ig_intr_md.ingress_port [8:0] |
-+----------------------------------------+
-
-Looking at -pad-0- (ingress) [6:0], with test_alloc = False
-Looking at ig_intr_md_for_tm.copy_to_cpu (ingress) [0:0], with test_alloc = True
-----> ig_intr_md_for_tm.copy_to_cpu (ingress) is allocated? False
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 3
- Group 4 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv64
- Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
- Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
-***Allocating phv64[7:1] for -pad-0-[6:0]
-***Allocating phv64[0:0] for ig_intr_md_for_tm.copy_to_cpu[0:0]
-Looking at ig_intr_md.resubmit_flag (ingress) [0:0], with test_alloc = True
-----> ig_intr_md.resubmit_flag (ingress) is allocated? False
-Looking at ig_intr_md._pad1 (ingress) [0:0], with test_alloc = True
-Looking at ig_intr_md._pad2 (ingress) [1:0], with test_alloc = True
-Looking at ig_intr_md._pad3 (ingress) [2:0], with test_alloc = True
-Looking at ig_intr_md.ingress_port (ingress) [8:0], with test_alloc = True
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 5
- Group 8 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv128
- Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv160
- Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv176
- Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv192
- Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
-***Allocating phv128[15:15] for ig_intr_md.resubmit_flag[0:0]
-***Allocating phv128[14:14] for ig_intr_md._pad1[0:0]
-***Allocating phv128[13:12] for ig_intr_md._pad2[1:0]
-***Allocating phv128[11:9] for ig_intr_md._pad3[2:0]
-***Allocating phv128[8:0] for ig_intr_md.ingress_port[8:0]
-Packing options tried: 1
-Packing options skipped: 0
-
-
--------------------------------------------
-Allocating parsed header: pkt fields (4) / meta fields (0) using extraction bandwidth 224
--------------------------------------------
-Extracted bits: 24
-Set metadata bits: 0
-Gress: egress
-bits_will_need_to_parse = 24
-unused_metadata_container_bits = 0
-min_parse_states = 1
-bits_per_state = 24
-Parse state 0 (24 bits)
- -pad-0- [6:0]
- ig_intr_md_for_tm.copy_to_cpu [0:0]
- -pad-1- [6:0]
- ig_intr_md.ingress_port [8:0]
-----------------------------------------------------------------------------------------------------
-| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-----------------------------------------------------------------------------------------------------
-| -pad-0- | 7 | True | - | - | - | None | 1 |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | False | - | - | - | None | 1 |
-| -pad-1- | 7 | True | - | - | - | None | 1 |
-| ig_intr_md.ingress_port | 9 | False | - | - | [32] | None | 2 |
-----------------------------------------------------------------------------------------------------
-
-Packing options: 5
-MAU containers available:
- 8-bit: 48
- 16-bit: 80
- 32-bit: 48
-Tagalong containers available:
- 8-bit: 32
- 16-bit: 48
- 32-bit: 32
-Initial packing options: 5
-
-Packing option 0: [8, 16]
-MAU containers after:
- 8-bit: 47
- 16-bit: 78
- 32-bit: 48
-+----------------------------------------+
-| -pad-0- [6:0] |
-| ig_intr_md_for_tm.copy_to_cpu [0:0] |
-+----------------------------------------+
-| -pad-1- [6:0] |
-| ig_intr_md.ingress_port [8:0] |
-+----------------------------------------+
-
-Looking at -pad-0- (egress) [6:0], with test_alloc = False
-Looking at ig_intr_md_for_tm.copy_to_cpu (egress) [0:0], with test_alloc = True
-----> ig_intr_md_for_tm.copy_to_cpu (egress) is allocated? False
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 3
- Group 5 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv80
- Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv96
- Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv112
-***Allocating phv80[7:1] for -pad-0-[6:0]
-***Allocating phv80[0:0] for ig_intr_md_for_tm.copy_to_cpu[0:0]
-Looking at -pad-1- (egress) [6:0], with test_alloc = False
-Looking at ig_intr_md.ingress_port (egress) [8:0], with test_alloc = True
-----> ig_intr_md.ingress_port (egress) is allocated? False
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 5
- Group 9 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv144
- Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv160
- Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv176
- Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv192
- Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv208
-***Allocating phv144[15:9] for -pad-1-[6:0]
-***Allocating phv144[8:0] for ig_intr_md.ingress_port[8:0]
-Packing options tried: 1
-Packing options skipped: 0
-
+ No bridged metadata field instances required
After allocating bridged metadata:
Allocation state: Final Allocation
@@ -1135,19 +900,19 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 1 (1.56%) | 32 (1.56%) | 2048 |
| | | | |
-| 4 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
-| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 4 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 5 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 2 (3.12%) | 16 (3.12%) | 512 |
+| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 512 |
| | | | |
-| 8 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
-| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 8 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 9 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 2 (2.08%) | 32 (2.08%) | 1536 |
+| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 1536 |
| | | | |
| 14 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
@@ -1162,13 +927,13 @@
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 768 |
| | | | |
-| MAU total | 5 (2.23%) | 80 (1.95%) | 4096 |
+| MAU total | 1 (0.45%) | 32 (0.78%) | 4096 |
| Tagalong total | 0 (0.00%) | 0 (0.00%) | 2048 |
-| Overall total | 5 (1.49%) | 80 (1.30%) | 6144 |
+| Overall total | 1 (0.30%) | 32 (0.52%) | 6144 |
---------------------------------------------------------------------------
->>Event 'pa_phase0' at time 1504795732.08
- Took 0.40 seconds
+>>Event 'pa_phase0' at time 1504859117.67
+ Took 0.00 seconds
-----------------------------------------------
Allocating Phase 0-related metadata
@@ -1188,19 +953,19 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 1 (1.56%) | 32 (1.56%) | 2048 |
| | | | |
-| 4 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
-| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 4 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 5 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 2 (3.12%) | 16 (3.12%) | 512 |
+| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 512 |
| | | | |
-| 8 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
-| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 8 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 9 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 2 (2.08%) | 32 (2.08%) | 1536 |
+| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 1536 |
| | | | |
| 14 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
@@ -1215,12 +980,12 @@
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 768 |
| | | | |
-| MAU total | 5 (2.23%) | 80 (1.95%) | 4096 |
+| MAU total | 1 (0.45%) | 32 (0.78%) | 4096 |
| Tagalong total | 0 (0.00%) | 0 (0.00%) | 2048 |
-| Overall total | 5 (1.49%) | 80 (1.30%) | 6144 |
+| Overall total | 1 (0.30%) | 32 (0.52%) | 6144 |
---------------------------------------------------------------------------
->>Event 'pa_critical' at time 1504795732.09
+>>Event 'pa_critical' at time 1504859117.68
Took 0.00 seconds
-----------------------------------------------
@@ -1229,6 +994,7 @@
Allocation Step
All Sorted parse nodes:
+ ingress_intrinsic_metadata (ingress) with bits = 16 and max = 2
parse_pkt_out (ingress) with bits = 16 and max = 2
parse_ipv4 (ingress) with bits = 160 and max = 1
parse_tcp (ingress) with bits = 160 and max = 1
@@ -1237,7 +1003,6 @@
parse_ethernet (ingress) with bits = 112 and max = 1
parse_ethernet (egress) with bits = 112 and max = 1
egress_intrinsic_metadata (egress) with bits = 24 and max = 1
- ingress_intrinsic_metadata (ingress) with bits = 16 and max = 1
parse_pkt_out (egress) with bits = 16 and max = 1
start () with bits = 0 and max = 0
default_parser () with bits = 0 and max = 0
@@ -1249,6 +1014,85 @@
Total packet bits: 936
Total meta bits: 0
Total bits: 936
+Working on parse node ingress_intrinsic_metadata (9) (ingress)
+
+-------------------------------------------
+Allocating parsed header: pkt fields (5) / meta fields (0) using extraction bandwidth 224
+-------------------------------------------
+Extracted bits: 16
+Set metadata bits: 0
+Gress: ingress
+bits_will_need_to_parse = 16
+unused_metadata_container_bits = 0
+min_parse_states = 1
+bits_per_state = 16
+Parse state 0 (16 bits)
+ ig_intr_md.resubmit_flag [0:0]
+ ig_intr_md._pad1 [0:0]
+ ig_intr_md._pad2 [1:0]
+ ig_intr_md._pad3 [2:0]
+ ig_intr_md.ingress_port [8:0]
+-----------------------------------------------------------------------------------------------
+| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
+-----------------------------------------------------------------------------------------------
+| ig_intr_md.resubmit_flag | 1 | False | - | - | - | 1 | 1 |
+| ig_intr_md._pad1 | 1 | False | - | - | - | 1 | 1 |
+| ig_intr_md._pad2 | 2 | False | - | - | - | 1 | 1 |
+| ig_intr_md._pad3 | 3 | False | - | - | - | 1 | 1 |
+| ig_intr_md.ingress_port | 9 | False | - | - | [32] | 2 | 2 |
+-----------------------------------------------------------------------------------------------
+
+min_extracts[8] = 1
+min_extracts[16] = 1
+min_extracts[32] = 1
+Packing options: 2
+MAU containers available:
+ 8-bit: 48
+ 16-bit: 80
+ 32-bit: 47
+Tagalong containers available:
+ 8-bit: 32
+ 16-bit: 48
+ 32-bit: 32
+Initial packing options: 2
+
+Packing option 0: [16]
+MAU containers after:
+ 8-bit: 48
+ 16-bit: 78
+ 32-bit: 47
++-----------------------------------+
+| ig_intr_md.resubmit_flag [0:0] |
+| ig_intr_md._pad1 [0:0] |
+| ig_intr_md._pad2 [1:0] |
+| ig_intr_md._pad3 [2:0] |
+| ig_intr_md.ingress_port [8:0] |
++-----------------------------------+
+
+Looking at ig_intr_md.resubmit_flag (ingress) [0:0], with test_alloc = True
+----> ig_intr_md.resubmit_flag (ingress) is allocated? False
+Looking at ig_intr_md._pad1 (ingress) [0:0], with test_alloc = True
+Looking at ig_intr_md._pad2 (ingress) [1:0], with test_alloc = True
+Looking at ig_intr_md._pad3 (ingress) [2:0], with test_alloc = True
+Looking at ig_intr_md.ingress_port (ingress) [8:0], with test_alloc = True
+Checking if can overlay metadata field.
+No required PHV group.
+Could not find container to overlay in.
+
+MAU groups: 5
+ Group 8 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv128
+ Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv160
+ Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv176
+ Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv192
+ Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
+***Allocating phv128[15:15] for ig_intr_md.resubmit_flag[0:0]
+***Allocating phv128[14:14] for ig_intr_md._pad1[0:0]
+***Allocating phv128[13:12] for ig_intr_md._pad2[1:0]
+***Allocating phv128[11:9] for ig_intr_md._pad3[2:0]
+***Allocating phv128[8:0] for ig_intr_md.ingress_port[8:0]
+Packing options tried: 1
+Packing options skipped: 0
+
Working on parse node parse_pkt_out (4) (ingress)
-------------------------------------------
@@ -1276,8 +1120,8 @@
min_extracts[32] = 1
Packing options: 2
MAU containers available:
- 8-bit: 47
- 16-bit: 79
+ 8-bit: 48
+ 16-bit: 78
32-bit: 47
Tagalong containers available:
8-bit: 32
@@ -1287,8 +1131,8 @@
Packing option 0: [16]
MAU containers after:
- 8-bit: 47
- 16-bit: 77
+ 8-bit: 48
+ 16-bit: 76
32-bit: 47
+-------------------------------------+
| packet_out_hdr.egress_port [8:0] |
@@ -1298,6 +1142,7 @@
Looking at packet_out_hdr.egress_port (ingress) [8:0], with test_alloc = True
----> packet_out_hdr.egress_port (ingress) is allocated? False
Looking at packet_out_hdr._padding (ingress) [6:0], with test_alloc = True
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
MAU groups: 5
Group 8 16 bits -- avail 15 -- ingress avail 15 and remain 13 and promised 2 and req 2 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv129
@@ -1357,7 +1202,7 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 47
+ 8-bit: 48
16-bit: 77
32-bit: 47
Tagalong containers available:
@@ -1368,7 +1213,7 @@
Packing option 0: [8, 16, 16, 32, 32, 8, 16, 32]
MAU containers after:
- 8-bit: 46
+ 8-bit: 47
16-bit: 76
32-bit: 45
+------------------------------+
@@ -1437,10 +1282,10 @@
----> ipv4.srcAddr (ingress) is allocated? False
MAU groups: 3
- Group 4 8 bits -- avail 15 -- ingress avail 15 and remain 14 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv65
+ Group 4 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv64
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
-***Allocating phv65[7:0] for ipv4.srcAddr[23:16]
+***Allocating phv64[7:0] for ipv4.srcAddr[23:16]
Looking at ipv4.srcAddr (ingress) [15:0], with test_alloc = True
----> ipv4.srcAddr (ingress) is allocated? False
@@ -1507,7 +1352,7 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 46
+ 8-bit: 47
16-bit: 76
32-bit: 45
Tagalong containers available:
@@ -1516,9 +1361,9 @@
32-bit: 31
Initial packing options: 5196
-Packing option 0: [8, 8, 16, 16, 16, 32, 32, 32]
+Packing option 0: [8, 8, 8, 8, 16, 16, 16, 16, 32, 32]
MAU containers after:
- 8-bit: 46
+ 8-bit: 47
16-bit: 76
32-bit: 45
+-------------------------+
@@ -1526,13 +1371,17 @@
+-------------------------+
| tcp.srcPort [7:0] |
+-------------------------+
-| tcp.dstPort [15:0] |
+| tcp.dstPort [15:8] |
++-------------------------+
+| tcp.dstPort [7:0] |
+-------------------------+
| tcp.seqNo [31:16] |
+-------------------------+
| tcp.seqNo [15:0] |
+-------------------------+
-| tcp.ackNo [31:0] |
+| tcp.ackNo [31:16] |
++-------------------------+
+| tcp.ackNo [15:0] |
+-------------------------+
| tcp.dataOffset [3:0] |
| tcp.res [2:0] |
@@ -1550,34 +1399,40 @@
Looking at tcp.srcPort (ingress) [7:0], with test_alloc = True
----> tcp.srcPort (ingress) is allocated? False
***Allocating phv290[7:0] for tcp.srcPort[7:0]
-Looking at tcp.dstPort (ingress) [15:0], with test_alloc = True
+Looking at tcp.dstPort (ingress) [15:8], with test_alloc = True
----> tcp.dstPort (ingress) is allocated? False
-***Allocating phv322[15:0] for tcp.dstPort[15:0]
+***Allocating phv291[7:0] for tcp.dstPort[15:8]
+Looking at tcp.dstPort (ingress) [7:0], with test_alloc = True
+----> tcp.dstPort (ingress) is allocated? False
+***Allocating phv292[7:0] for tcp.dstPort[7:0]
Looking at tcp.seqNo (ingress) [31:16], with test_alloc = True
----> tcp.seqNo (ingress) is allocated? False
-***Allocating phv323[15:0] for tcp.seqNo[31:16]
+***Allocating phv322[15:0] for tcp.seqNo[31:16]
Looking at tcp.seqNo (ingress) [15:0], with test_alloc = True
----> tcp.seqNo (ingress) is allocated? False
-***Allocating phv324[15:0] for tcp.seqNo[15:0]
-Looking at tcp.ackNo (ingress) [31:0], with test_alloc = True
+***Allocating phv323[15:0] for tcp.seqNo[15:0]
+Looking at tcp.ackNo (ingress) [31:16], with test_alloc = True
----> tcp.ackNo (ingress) is allocated? False
-***Allocating phv257[31:0] for tcp.ackNo[31:0]
+***Allocating phv324[15:0] for tcp.ackNo[31:16]
+Looking at tcp.ackNo (ingress) [15:0], with test_alloc = True
+----> tcp.ackNo (ingress) is allocated? False
+***Allocating phv325[15:0] for tcp.ackNo[15:0]
Looking at tcp.dataOffset (ingress) [3:0], with test_alloc = True
----> tcp.dataOffset (ingress) is allocated? False
Looking at tcp.res (ingress) [2:0], with test_alloc = True
Looking at tcp.ecn (ingress) [2:0], with test_alloc = True
Looking at tcp.ctrl (ingress) [5:0], with test_alloc = True
Looking at tcp.window (ingress) [15:0], with test_alloc = True
-***Allocating phv258[31:28] for tcp.dataOffset[3:0]
-***Allocating phv258[27:25] for tcp.res[2:0]
-***Allocating phv258[24:22] for tcp.ecn[2:0]
-***Allocating phv258[21:16] for tcp.ctrl[5:0]
-***Allocating phv258[15:0] for tcp.window[15:0]
+***Allocating phv257[31:28] for tcp.dataOffset[3:0]
+***Allocating phv257[27:25] for tcp.res[2:0]
+***Allocating phv257[24:22] for tcp.ecn[2:0]
+***Allocating phv257[21:16] for tcp.ctrl[5:0]
+***Allocating phv257[15:0] for tcp.window[15:0]
Looking at tcp.checksum (ingress) [15:0], with test_alloc = True
----> tcp.checksum (ingress) is allocated? False
Looking at tcp.urgentPtr (ingress) [15:0], with test_alloc = True
-***Allocating phv259[31:16] for tcp.checksum[15:0]
-***Allocating phv259[15:0] for tcp.urgentPtr[15:0]
+***Allocating phv258[31:16] for tcp.checksum[15:0]
+***Allocating phv258[15:0] for tcp.urgentPtr[15:0]
Packing options tried: 1
Packing options skipped: 0
@@ -1628,19 +1483,19 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
- 8-bit: 28
- 16-bit: 42
- 32-bit: 28
+ 8-bit: 24
+ 16-bit: 36
+ 32-bit: 24
Initial packing options: 5196
Packing option 0: [8, 8, 16, 16, 16, 32, 32, 32]
MAU containers after:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
+------------------------------+
| ipv4.version [3:0] |
@@ -1667,35 +1522,35 @@
Looking at ipv4.version (egress) [3:0], with test_alloc = True
----> ipv4.version (egress) is allocated? False
Looking at ipv4.ihl (egress) [3:0], with test_alloc = True
-***Allocating phv292[7:4] for ipv4.version[3:0]
-***Allocating phv292[3:0] for ipv4.ihl[3:0]
+***Allocating phv296[7:4] for ipv4.version[3:0]
+***Allocating phv296[3:0] for ipv4.ihl[3:0]
Looking at ipv4.diffserv (egress) [7:0], with test_alloc = True
----> ipv4.diffserv (egress) is allocated? False
-***Allocating phv293[7:0] for ipv4.diffserv[7:0]
+***Allocating phv297[7:0] for ipv4.diffserv[7:0]
Looking at ipv4.totalLen (egress) [15:0], with test_alloc = True
----> ipv4.totalLen (egress) is allocated? False
-***Allocating phv326[15:0] for ipv4.totalLen[15:0]
+***Allocating phv332[15:0] for ipv4.totalLen[15:0]
Looking at ipv4.identification (egress) [15:0], with test_alloc = True
----> ipv4.identification (egress) is allocated? False
-***Allocating phv327[15:0] for ipv4.identification[15:0]
+***Allocating phv333[15:0] for ipv4.identification[15:0]
Looking at ipv4.flags (egress) [2:0], with test_alloc = True
----> ipv4.flags (egress) is allocated? False
Looking at ipv4.fragOffset (egress) [12:0], with test_alloc = True
-***Allocating phv328[15:13] for ipv4.flags[2:0]
-***Allocating phv328[12:0] for ipv4.fragOffset[12:0]
+***Allocating phv334[15:13] for ipv4.flags[2:0]
+***Allocating phv334[12:0] for ipv4.fragOffset[12:0]
Looking at ipv4.ttl (egress) [7:0], with test_alloc = True
----> ipv4.ttl (egress) is allocated? False
Looking at ipv4.protocol (egress) [7:0], with test_alloc = True
Looking at ipv4.hdrChecksum (egress) [15:0], with test_alloc = True
-***Allocating phv260[31:24] for ipv4.ttl[7:0]
-***Allocating phv260[23:16] for ipv4.protocol[7:0]
-***Allocating phv260[15:0] for ipv4.hdrChecksum[15:0]
+***Allocating phv264[31:24] for ipv4.ttl[7:0]
+***Allocating phv264[23:16] for ipv4.protocol[7:0]
+***Allocating phv264[15:0] for ipv4.hdrChecksum[15:0]
Looking at ipv4.srcAddr (egress) [31:0], with test_alloc = True
----> ipv4.srcAddr (egress) is allocated? False
-***Allocating phv261[31:0] for ipv4.srcAddr[31:0]
+***Allocating phv265[31:0] for ipv4.srcAddr[31:0]
Looking at ipv4.dstAddr (egress) [31:0], with test_alloc = True
----> ipv4.dstAddr (egress) is allocated? False
-***Allocating phv262[31:0] for ipv4.dstAddr[31:0]
+***Allocating phv266[31:0] for ipv4.dstAddr[31:0]
Packing options tried: 1
Packing options skipped: 0
@@ -1744,19 +1599,19 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
- 8-bit: 26
- 16-bit: 39
- 32-bit: 25
+ 8-bit: 22
+ 16-bit: 33
+ 32-bit: 21
Initial packing options: 5196
Packing option 0: [8, 8, 16, 16, 16, 32, 32, 32]
MAU containers after:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
+-------------------------+
| tcp.srcPort [15:8] |
@@ -1783,38 +1638,38 @@
Looking at tcp.srcPort (egress) [15:8], with test_alloc = True
----> tcp.srcPort (egress) is allocated? False
-***Allocating phv294[7:0] for tcp.srcPort[15:8]
+***Allocating phv298[7:0] for tcp.srcPort[15:8]
Looking at tcp.srcPort (egress) [7:0], with test_alloc = True
----> tcp.srcPort (egress) is allocated? False
-***Allocating phv295[7:0] for tcp.srcPort[7:0]
+***Allocating phv299[7:0] for tcp.srcPort[7:0]
Looking at tcp.dstPort (egress) [15:0], with test_alloc = True
----> tcp.dstPort (egress) is allocated? False
-***Allocating phv329[15:0] for tcp.dstPort[15:0]
+***Allocating phv335[15:0] for tcp.dstPort[15:0]
Looking at tcp.seqNo (egress) [31:16], with test_alloc = True
----> tcp.seqNo (egress) is allocated? False
-***Allocating phv330[15:0] for tcp.seqNo[31:16]
+***Allocating phv336[15:0] for tcp.seqNo[31:16]
Looking at tcp.seqNo (egress) [15:0], with test_alloc = True
----> tcp.seqNo (egress) is allocated? False
-***Allocating phv331[15:0] for tcp.seqNo[15:0]
+***Allocating phv337[15:0] for tcp.seqNo[15:0]
Looking at tcp.ackNo (egress) [31:0], with test_alloc = True
----> tcp.ackNo (egress) is allocated? False
-***Allocating phv263[31:0] for tcp.ackNo[31:0]
+***Allocating phv267[31:0] for tcp.ackNo[31:0]
Looking at tcp.dataOffset (egress) [3:0], with test_alloc = True
----> tcp.dataOffset (egress) is allocated? False
Looking at tcp.res (egress) [2:0], with test_alloc = True
Looking at tcp.ecn (egress) [2:0], with test_alloc = True
Looking at tcp.ctrl (egress) [5:0], with test_alloc = True
Looking at tcp.window (egress) [15:0], with test_alloc = True
-***Allocating phv264[31:28] for tcp.dataOffset[3:0]
-***Allocating phv264[27:25] for tcp.res[2:0]
-***Allocating phv264[24:22] for tcp.ecn[2:0]
-***Allocating phv264[21:16] for tcp.ctrl[5:0]
-***Allocating phv264[15:0] for tcp.window[15:0]
+***Allocating phv268[31:28] for tcp.dataOffset[3:0]
+***Allocating phv268[27:25] for tcp.res[2:0]
+***Allocating phv268[24:22] for tcp.ecn[2:0]
+***Allocating phv268[21:16] for tcp.ctrl[5:0]
+***Allocating phv268[15:0] for tcp.window[15:0]
Looking at tcp.checksum (egress) [15:0], with test_alloc = True
----> tcp.checksum (egress) is allocated? False
Looking at tcp.urgentPtr (egress) [15:0], with test_alloc = True
-***Allocating phv265[31:16] for tcp.checksum[15:0]
-***Allocating phv265[15:0] for tcp.urgentPtr[15:0]
+***Allocating phv269[31:16] for tcp.checksum[15:0]
+***Allocating phv269[15:0] for tcp.urgentPtr[15:0]
Packing options tried: 1
Packing options skipped: 0
@@ -1847,18 +1702,18 @@
min_extracts[32] = 1
Packing options: 604
MAU containers available:
- 8-bit: 46
+ 8-bit: 47
16-bit: 76
32-bit: 45
Tagalong containers available:
- 8-bit: 21
- 16-bit: 31
- 32-bit: 20
+ 8-bit: 19
+ 16-bit: 30
+ 32-bit: 21
Initial packing options: 604
Packing option 0: [8, 32, 16, 8, 32, 16]
MAU containers after:
- 8-bit: 44
+ 8-bit: 45
16-bit: 74
32-bit: 43
+-----------------------------+
@@ -1880,10 +1735,10 @@
----> ethernet.dstAddr (ingress) is allocated? False
MAU groups: 3
- Group 4 8 bits -- avail 14 -- ingress avail 14 and remain 13 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv66
+ Group 4 8 bits -- avail 15 -- ingress avail 15 and remain 14 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv65
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
-***Allocating phv66[7:0] for ethernet.dstAddr[47:40]
+***Allocating phv65[7:0] for ethernet.dstAddr[47:40]
Looking at ethernet.dstAddr (ingress) [39:8], with test_alloc = True
----> ethernet.dstAddr (ingress) is allocated? False
@@ -1908,10 +1763,10 @@
----> ethernet.srcAddr (ingress) is allocated? False
MAU groups: 3
- Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
+ Group 4 8 bits -- avail 14 -- ingress avail 14 and remain 13 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv66
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
-***Allocating phv67[7:0] for ethernet.srcAddr[39:32]
+***Allocating phv66[7:0] for ethernet.srcAddr[39:32]
Looking at ethernet.srcAddr (ingress) [31:0], with test_alloc = True
----> ethernet.srcAddr (ingress) is allocated? False
@@ -1962,19 +1817,19 @@
min_extracts[32] = 1
Packing options: 604
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
- 8-bit: 24
- 16-bit: 36
- 32-bit: 22
+ 8-bit: 20
+ 16-bit: 30
+ 32-bit: 18
Initial packing options: 604
Packing option 0: [8, 32, 16, 8, 32, 16]
MAU containers after:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
+-----------------------------+
| ethernet.dstAddr [47:40] |
@@ -1993,24 +1848,24 @@
Looking at ethernet.dstAddr (egress) [47:40], with test_alloc = True
----> ethernet.dstAddr (egress) is allocated? False
-***Allocating phv296[7:0] for ethernet.dstAddr[47:40]
+***Allocating phv300[7:0] for ethernet.dstAddr[47:40]
Looking at ethernet.dstAddr (egress) [39:8], with test_alloc = True
----> ethernet.dstAddr (egress) is allocated? False
-***Allocating phv266[31:0] for ethernet.dstAddr[39:8]
+***Allocating phv270[31:0] for ethernet.dstAddr[39:8]
Looking at ethernet.dstAddr (egress) [7:0], with test_alloc = True
----> ethernet.dstAddr (egress) is allocated? False
Looking at ethernet.srcAddr (egress) [47:40], with test_alloc = True
-***Allocating phv332[15:8] for ethernet.dstAddr[7:0]
-***Allocating phv332[7:0] for ethernet.srcAddr[47:40]
+***Allocating phv338[15:8] for ethernet.dstAddr[7:0]
+***Allocating phv338[7:0] for ethernet.srcAddr[47:40]
Looking at ethernet.srcAddr (egress) [39:32], with test_alloc = True
----> ethernet.srcAddr (egress) is allocated? False
-***Allocating phv297[7:0] for ethernet.srcAddr[39:32]
+***Allocating phv301[7:0] for ethernet.srcAddr[39:32]
Looking at ethernet.srcAddr (egress) [31:0], with test_alloc = True
----> ethernet.srcAddr (egress) is allocated? False
-***Allocating phv267[31:0] for ethernet.srcAddr[31:0]
+***Allocating phv271[31:0] for ethernet.srcAddr[31:0]
Looking at ethernet.etherType (egress) [15:0], with test_alloc = True
----> ethernet.etherType (egress) is allocated? False
-***Allocating phv333[15:0] for ethernet.etherType[15:0]
+***Allocating phv339[15:0] for ethernet.etherType[15:0]
Packing options tried: 1
Packing options skipped: 0
@@ -2045,19 +1900,19 @@
min_extracts[32] = 1
Packing options: 3
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
- 8-bit: 22
- 16-bit: 34
- 32-bit: 20
+ 8-bit: 18
+ 16-bit: 28
+ 32-bit: 16
Initial packing options: 3
Packing option 1: [16, 8]
MAU containers after:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
+---------------------------------+
| eg_intr_md._pad0 [6:0] |
@@ -2072,31 +1927,29 @@
Looking at eg_intr_md.egress_port (egress) [8:0], with test_alloc = True
Checking if can overlay metadata field.
No required PHV group.
- Group 9 16 bits -- deparsed True -- avail 15 and promised 2 -- ingress promised 0 and remain 0 and req 8 -- egress promised 2 and remain 13 and req 2 -- act like deparsed True -- container_to_use phv146 -- fails False
Could not find container to overlay in.
MAU groups: 5
- Group 9 16 bits -- avail 15 -- ingress avail 8 and remain 8 and promised 0 and req 0 -- egress avail 15 and remain 13 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv146
+ Group 9 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv144
Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv160
Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv176
Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv192
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv208
-***Allocating phv146[15:9] for eg_intr_md._pad0[6:0]
-***Allocating phv146[8:0] for eg_intr_md.egress_port[8:0]
+***Allocating phv144[15:9] for eg_intr_md._pad0[6:0]
+***Allocating phv144[8:0] for eg_intr_md.egress_port[8:0]
Looking at eg_intr_md._pad7 (egress) [4:0], with test_alloc = True
----> eg_intr_md._pad7 (egress) is allocated? False
Looking at eg_intr_md.egress_cos (egress) [2:0], with test_alloc = True
Checking if can overlay metadata field.
No required PHV group.
- Group 5 8 bits -- deparsed True -- avail 15 and promised 1 -- ingress promised 0 and remain 0 and req 8 -- egress promised 1 and remain 14 and req 1 -- act like deparsed True -- container_to_use phv81 -- fails False
Could not find container to overlay in.
MAU groups: 3
- Group 5 8 bits -- avail 15 -- ingress avail 8 and remain 8 and promised 0 and req 0 -- egress avail 15 and remain 14 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv81
+ Group 5 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv80
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv112
-***Allocating phv81[7:3] for eg_intr_md._pad7[4:0]
-***Allocating phv81[2:0] for eg_intr_md.egress_cos[2:0]
+***Allocating phv80[7:3] for eg_intr_md._pad7[4:0]
+***Allocating phv80[2:0] for eg_intr_md.egress_cos[2:0]
Packing options tried: 2
Packing options skipped: 0
Failure Reasons:
@@ -2109,86 +1962,6 @@
ContainerAlignment Constraint: eg_intr_md.egress_cos <3 bits egress parsed imeta> -- field_bit: 0 -- bits_list: [0, 1, 2, 3, 4, 5, 6, 7]
]
-Working on parse node ingress_intrinsic_metadata (9) (ingress)
-
--------------------------------------------
-Allocating parsed header: pkt fields (5) / meta fields (0) using extraction bandwidth 224
--------------------------------------------
-Extracted bits: 16
-Set metadata bits: 0
-Gress: ingress
-bits_will_need_to_parse = 16
-unused_metadata_container_bits = 0
-min_parse_states = 1
-bits_per_state = 16
-Already allocated? ig_intr_md.resubmit_flag (ingress)
-Already allocated? ig_intr_md._pad1 (ingress)
-Already allocated? ig_intr_md._pad2 (ingress)
-Already allocated? ig_intr_md._pad3 (ingress)
-Already allocated? ig_intr_md.ingress_port (ingress)
-Already allocated? ig_intr_md.ingress_port (ingress)
-Parse state 0 (16 bits)
- ig_intr_md.resubmit_flag [0:0]
- ig_intr_md._pad1 [0:0]
- ig_intr_md._pad2 [1:0]
- ig_intr_md._pad3 [2:0]
- ig_intr_md.ingress_port [8:0]
------------------------------------------------------------------------------------------------------
-| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
------------------------------------------------------------------------------------------------------
-| ig_intr_md.resubmit_flag | 1 | False | [(16, 1)] | - | - | 1 | 1 |
-| ig_intr_md._pad1 | 1 | False | [(16, 1)] | - | - | 1 | 1 |
-| ig_intr_md._pad2 | 2 | False | [(16, 2)] | - | - | 1 | 1 |
-| ig_intr_md._pad3 | 3 | False | [(16, 3)] | - | - | 1 | 1 |
-| ig_intr_md.ingress_port | 9 | False | [(16, 9)] | - | - | 2 | 1 |
------------------------------------------------------------------------------------------------------
-
-min_extracts[8] = 1
-min_extracts[16] = 6
-min_extracts[32] = 1
-Packing options: 2
-MAU containers available:
- 8-bit: 44
- 16-bit: 74
- 32-bit: 43
-Tagalong containers available:
- 8-bit: 21
- 16-bit: 31
- 32-bit: 20
-Initial packing options: 2
-
-Packing option 0: [16]
-MAU containers after:
- 8-bit: 44
- 16-bit: 74
- 32-bit: 43
-+-----------------------------------+
-| ig_intr_md.resubmit_flag [0:0] |
-| ig_intr_md._pad1 [0:0] |
-| ig_intr_md._pad2 [1:0] |
-| ig_intr_md._pad3 [2:0] |
-| ig_intr_md.ingress_port [8:0] |
-+-----------------------------------+
-
-Looking at ig_intr_md.resubmit_flag (ingress) [0:0], with test_alloc = True
-----> ig_intr_md.resubmit_flag (ingress) is allocated? True
-Looking at ig_intr_md._pad1 (ingress) [0:0], with test_alloc = True
-----> ig_intr_md._pad1 (ingress) is allocated? True
-Looking at ig_intr_md._pad2 (ingress) [1:0], with test_alloc = True
-----> ig_intr_md._pad2 (ingress) is allocated? True
-Looking at ig_intr_md._pad3 (ingress) [2:0], with test_alloc = True
-----> ig_intr_md._pad3 (ingress) is allocated? True
-Looking at ig_intr_md.ingress_port (ingress) [8:0], with test_alloc = True
-----> ig_intr_md.ingress_port (ingress) is allocated? True
-Fields for container 16 at index 0 already allocated. No need to overlay or allocate new.
- ig_intr_md.resubmit_flag[0:0]
- ig_intr_md._pad1[0:0]
- ig_intr_md._pad2[1:0]
- ig_intr_md._pad3[2:0]
- ig_intr_md.ingress_port[8:0]
-Packing options tried: 1
-Packing options skipped: 0
-
Working on parse node parse_pkt_out (4) (egress)
-------------------------------------------
@@ -2216,19 +1989,19 @@
min_extracts[32] = 1
Packing options: 2
MAU containers available:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
Tagalong containers available:
- 8-bit: 22
- 16-bit: 34
- 32-bit: 20
+ 8-bit: 18
+ 16-bit: 28
+ 32-bit: 16
Initial packing options: 2
Packing option 0: [16]
MAU containers after:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
+-------------------------------------+
| packet_out_hdr.egress_port [8:0] |
@@ -2238,8 +2011,8 @@
Looking at packet_out_hdr.egress_port (egress) [8:0], with test_alloc = True
----> packet_out_hdr.egress_port (egress) is allocated? False
Looking at packet_out_hdr._padding (egress) [6:0], with test_alloc = True
-***Allocating phv334[15:7] for packet_out_hdr.egress_port[8:0]
-***Allocating phv334[6:0] for packet_out_hdr._padding[6:0]
+***Allocating phv340[15:7] for packet_out_hdr.egress_port[8:0]
+***Allocating phv340[6:0] for packet_out_hdr._padding[6:0]
Packing options tried: 1
Packing options skipped: 0
@@ -2253,50 +2026,50 @@
After allocating critical parse paths:
Allocation state: Final Allocation
-------------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
-------------------------------------------------------------------------------
-| 0 (32) | 5 (31.25%) | 160 (31.25%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 5 (7.81%) | 160 (7.81%) | 2048 |
-| | | | |
-| 4 (8) | 4 (25.00%) | 32 (25.00%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 6 (9.38%) | 48 (9.38%) | 512 |
-| | | | |
-| 8 (16) | 5 (31.25%) | 80 (31.25%) | 256 |
-| 9 (16) | 2 (12.50%) | 32 (12.50%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 7 (7.29%) | 112 (7.29%) | 1536 |
-| | | | |
-| 14 (32) T | 12 (75.00%) | 384 (75.00%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 12 (37.50%) | 384 (37.50%) | 1024 |
-| | | | |
-| 16 (8) T | 9 (56.25%) | 72 (56.25%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 9 (28.12%) | 72 (28.12%) | 256 |
-| | | | |
-| 18 (16) T | 14 (87.50%) | 224 (87.50%) | 256 |
-| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 14 (29.17%) | 224 (29.17%) | 768 |
-| | | | |
-| MAU total | 18 (8.04%) | 320 (7.81%) | 4096 |
-| Tagalong total | 35 (31.25%) | 680 (33.20%) | 2048 |
-| Overall total | 53 (15.77%) | 1000 (16.28%) | 6144 |
-------------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+-----------------------------------------------------------------------------
+| 0 (32) | 5 (31.25%) | 160 (31.25%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 5 (7.81%) | 160 (7.81%) | 2048 |
+| | | | |
+| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 4 (6.25%) | 32 (6.25%) | 512 |
+| | | | |
+| 8 (16) | 5 (31.25%) | 80 (31.25%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 6 (6.25%) | 96 (6.25%) | 1536 |
+| | | | |
+| 14 (32) T | 11 (68.75%) | 352 (68.75%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 11 (34.38%) | 352 (34.38%) | 1024 |
+| | | | |
+| 16 (8) T | 11 (68.75%) | 88 (68.75%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 11 (34.38%) | 88 (34.38%) | 256 |
+| | | | |
+| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
+| | | | |
+| MAU total | 15 (6.70%) | 288 (7.03%) | 4096 |
+| Tagalong total | 37 (33.04%) | 680 (33.20%) | 2048 |
+| Overall total | 52 (15.48%) | 968 (15.76%) | 6144 |
+-----------------------------------------------------------------------------
->>Event 'pa_overlay' at time 1504795741.17
- Took 9.08 seconds
+>>Event 'pa_overlay' at time 1504859126.82
+ Took 9.14 seconds
-----------------------------------------------
Allocating remaining parsed fields
@@ -2304,21 +2077,21 @@
Allocation Step
All Sorted parse nodes (non-critical):
- parse_pkt_in (egress) with bits = 16 and max = 2
+ parse_pkt_in (ingress) with bits = 16 and max = 2
parse_udp (ingress) with bits = 64 and max = 1
parse_udp (egress) with bits = 64 and max = 1
- parse_pkt_in (ingress) with bits = 16 and max = 1
+ parse_pkt_in (egress) with bits = 16 and max = 1
Total packet bits: 160
Total meta bits: 0
Total bits: 160
-Working on parse node parse_pkt_in (2) (egress)
+Working on parse node parse_pkt_in (2) (ingress)
-------------------------------------------
Overlaying parsed header: pkt fields (2) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 16
Set metadata bits: 0
-Gress: egress
+Gress: ingress
bits_will_need_to_parse = 16
unused_metadata_container_bits = 0
min_parse_states = 1
@@ -2334,19 +2107,19 @@
-------------------------------------------------------------------------------------------------------
MAU containers available:
- 8-bit: 46
- 16-bit: 77
- 32-bit: 48
+ 8-bit: 45
+ 16-bit: 74
+ 32-bit: 43
Packing options: 2
Initial packing options: 2
Packing option 0: [16]
->>Can pack using [16] if open up 1 new containers.
-Packing options tried: 2
+>>Can pack using [16] if open up 0 new containers.
+Packing options tried: 1
Packing options skipped: 0
Trying to place using best packing [16]
-***Allocating phv145[15:7] for packet_in_hdr.ingress_port[8:0]
-***Allocating phv145[6:0] for packet_in_hdr._padding[6:0]
+***Allocating phv129[15:7] for packet_in_hdr.ingress_port[8:0]
+***Allocating phv129[6:0] for packet_in_hdr._padding[6:0]
Working on parse node parse_udp (8) (ingress)
-------------------------------------------
@@ -2374,7 +2147,7 @@
-----------------------------------------------------------------------------------
MAU containers available:
- 8-bit: 44
+ 8-bit: 45
16-bit: 74
32-bit: 43
Packing options: 47
@@ -2383,12 +2156,12 @@
Packing option 0: [8, 8, 16, 32]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
MAU groups: 3
- Group 4 8 bits -- avail 11 -- ingress avail 11 and remain 10 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv69
+ Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2403,12 +2176,12 @@
Packing option 1: [8, 8, 32, 16]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
MAU groups: 3
- Group 4 8 bits -- avail 11 -- ingress avail 11 and remain 10 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv69
+ Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2421,7 +2194,7 @@
Packing option 2: [8, 16, 8, 32]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2433,7 +2206,7 @@
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
MAU groups: 3
- Group 4 8 bits -- avail 11 -- ingress avail 11 and remain 10 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv69
+ Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
>>Can pack using [8, 16, 8, 32] if open up 3 new containers.
@@ -2441,7 +2214,7 @@
Packing option 3: [8, 16, 32, 8]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2461,7 +2234,7 @@
Packing option 4: [8, 32, 8, 16]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2474,7 +2247,7 @@
Packing option 5: [8, 32, 16, 8]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2494,12 +2267,12 @@
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
MAU groups: 3
- Group 4 8 bits -- avail 11 -- ingress avail 11 and remain 10 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv69
+ Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
>>Can pack using [16, 8, 8, 32] if open up 3 new containers.
@@ -2514,7 +2287,7 @@
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2606,12 +2379,12 @@
Packing option 15: [8, 8, 16, 16, 16]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
MAU groups: 3
- Group 4 8 bits -- avail 11 -- ingress avail 11 and remain 10 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv69
+ Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2626,7 +2399,7 @@
Packing option 16: [8, 16, 8, 16, 16]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2638,7 +2411,7 @@
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
MAU groups: 3
- Group 4 8 bits -- avail 11 -- ingress avail 11 and remain 10 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv69
+ Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
>>Can pack using [8, 16, 8, 16, 16] if open up 3 new containers.
@@ -2646,7 +2419,7 @@
Packing option 17: [8, 16, 16, 8, 16]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2668,7 +2441,7 @@
Packing option 18: [8, 16, 16, 16, 8]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2697,12 +2470,12 @@
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
MAU groups: 3
- Group 4 8 bits -- avail 11 -- ingress avail 11 and remain 10 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv69
+ Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
>>Can pack using [16, 8, 8, 16, 16] if open up 3 new containers.
@@ -2717,7 +2490,7 @@
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2769,8 +2542,8 @@
-----------------------------------------------------------------------------------
MAU containers available:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
Packing options: 47
Initial packing options: 47
@@ -2780,19 +2553,19 @@
Packing options tried: 1
Packing options skipped: 0
Trying to place using best packing [8, 8, 16, 32]
-***Allocating phv294[7:0] for udp.srcPort[15:8]
-***Allocating phv295[7:0] for udp.srcPort[7:0]
-***Allocating phv329[15:0] for udp.dstPort[15:0]
-***Allocating phv263[31:16] for udp.length_[15:0]
-***Allocating phv263[15:0] for udp.checksum[15:0]
-Working on parse node parse_pkt_in (2) (ingress)
+***Allocating phv298[7:0] for udp.srcPort[15:8]
+***Allocating phv299[7:0] for udp.srcPort[7:0]
+***Allocating phv336[15:0] for udp.dstPort[15:0]
+***Allocating phv267[31:16] for udp.length_[15:0]
+***Allocating phv267[15:0] for udp.checksum[15:0]
+Working on parse node parse_pkt_in (2) (egress)
-------------------------------------------
Overlaying parsed header: pkt fields (2) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 16
Set metadata bits: 0
-Gress: ingress
+Gress: egress
bits_will_need_to_parse = 16
unused_metadata_container_bits = 0
min_parse_states = 1
@@ -2808,9 +2581,9 @@
-------------------------------------------------------------------------------------------------
MAU containers available:
- 8-bit: 44
- 16-bit: 74
- 32-bit: 42
+ 8-bit: 47
+ 16-bit: 79
+ 32-bit: 48
Packing options: 2
Initial packing options: 2
@@ -2819,8 +2592,8 @@
Packing options tried: 1
Packing options skipped: 0
Trying to place using best packing [16]
-***Allocating phv129[15:7] for packet_in_hdr.ingress_port[8:0]
-***Allocating phv129[6:0] for packet_in_hdr._padding[6:0]
+***Allocating phv340[15:7] for packet_in_hdr.ingress_port[8:0]
+***Allocating phv340[6:0] for packet_in_hdr._padding[6:0]
After allocating remaining parse nodes:
Allocation state: Final Allocation
@@ -2834,36 +2607,36 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 6 (9.38%) | 192 (9.38%) | 2048 |
| | | | |
-| 4 (8) | 4 (25.00%) | 32 (25.00%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
+| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 6 (9.38%) | 48 (9.38%) | 512 |
+| Total for 8 bit | 4 (6.25%) | 32 (6.25%) | 512 |
| | | | |
| 8 (16) | 5 (31.25%) | 80 (31.25%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 8 (8.33%) | 128 (8.33%) | 1536 |
+| Total for 16 bit | 6 (6.25%) | 96 (6.25%) | 1536 |
| | | | |
-| 14 (32) T | 12 (75.00%) | 384 (75.00%) | 512 |
+| 14 (32) T | 11 (68.75%) | 352 (68.75%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 12 (37.50%) | 384 (37.50%) | 1024 |
+| Total for 32 bit | 11 (34.38%) | 352 (34.38%) | 1024 |
| | | | |
-| 16 (8) T | 9 (56.25%) | 72 (56.25%) | 128 |
+| 16 (8) T | 11 (68.75%) | 88 (68.75%) | 128 |
| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 9 (28.12%) | 72 (28.12%) | 256 |
+| Total for 8 bit | 11 (34.38%) | 88 (34.38%) | 256 |
| | | | |
-| 18 (16) T | 14 (87.50%) | 224 (87.50%) | 256 |
-| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 14 (29.17%) | 224 (29.17%) | 768 |
+| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
| | | | |
-| MAU total | 20 (8.93%) | 368 (8.98%) | 4096 |
-| Tagalong total | 35 (31.25%) | 680 (33.20%) | 2048 |
-| Overall total | 55 (16.37%) | 1048 (17.06%) | 6144 |
+| MAU total | 16 (7.14%) | 320 (7.81%) | 4096 |
+| Tagalong total | 37 (33.04%) | 680 (33.20%) | 2048 |
+| Overall total | 53 (15.77%) | 1000 (16.28%) | 6144 |
------------------------------------------------------------------------------
@@ -2887,12 +2660,12 @@
| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 512 |
| | | | |
| 8 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 9 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 1 (1.04%) | 16 (1.04%) | 1536 |
+| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 1536 |
| | | | |
| 14 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
@@ -2907,21 +2680,36 @@
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 768 |
| | | | |
-| MAU total | 2 (0.89%) | 48 (1.17%) | 4096 |
+| MAU total | 1 (0.45%) | 32 (0.78%) | 4096 |
| Tagalong total | 0 (0.00%) | 0 (0.00%) | 2048 |
-| Overall total | 2 (0.60%) | 48 (0.78%) | 6144 |
+| Overall total | 1 (0.30%) | 32 (0.52%) | 6144 |
---------------------------------------------------------------------------
->>Event 'pa_meta1' at time 1504795745.06
- Took 3.89 seconds
+>>Event 'pa_meta1' at time 1504859130.57
+ Took 3.76 seconds
-----------------------------------------------
Allocating metadata (pass 1)
-----------------------------------------------
Allocation Step
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md.resubmit_flag (ingress) will require table injection to initialize.
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md._pad1 (ingress) will require table injection to initialize.
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md._pad2 (ingress) will require table injection to initialize.
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md._pad3 (ingress) will require table injection to initialize.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
Total metadata field instances to allocate: 4 / 44 bits (44 ingress bits and 0 egress bits)
Promised metadata field instances to allocate: 1 / 9 bits (9 ingress bits and 0 egress bits)
- 0: ig_intr_md_for_tm.ucast_egress_port (ingress) (highly=0, mau_group_size=2, max_overlay=0, max_share=0, max_split=1, bit_width=9, initial_usage_read=3, earliest_use=0, latest_use=12)
+ 0: ig_intr_md_for_tm.ucast_egress_port (ingress) (highly=0, mau_group_size=2, max_overlay=0, max_share=0, max_split=1, bit_width=9, initial_usage_read=2, earliest_use=0, latest_use=12)
--------------
Working on:
@@ -2976,36 +2764,36 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 6 (9.38%) | 192 (9.38%) | 2048 |
| | | | |
-| 4 (8) | 4 (25.00%) | 32 (25.00%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
+| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 6 (9.38%) | 48 (9.38%) | 512 |
+| Total for 8 bit | 4 (6.25%) | 32 (6.25%) | 512 |
| | | | |
| 8 (16) | 6 (37.50%) | 89 (34.77%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 9 (9.38%) | 137 (8.92%) | 1536 |
+| Total for 16 bit | 7 (7.29%) | 105 (6.84%) | 1536 |
| | | | |
-| 14 (32) T | 12 (75.00%) | 384 (75.00%) | 512 |
+| 14 (32) T | 11 (68.75%) | 352 (68.75%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 12 (37.50%) | 384 (37.50%) | 1024 |
+| Total for 32 bit | 11 (34.38%) | 352 (34.38%) | 1024 |
| | | | |
-| 16 (8) T | 9 (56.25%) | 72 (56.25%) | 128 |
+| 16 (8) T | 11 (68.75%) | 88 (68.75%) | 128 |
| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 9 (28.12%) | 72 (28.12%) | 256 |
+| Total for 8 bit | 11 (34.38%) | 88 (34.38%) | 256 |
| | | | |
-| 18 (16) T | 14 (87.50%) | 224 (87.50%) | 256 |
-| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 14 (29.17%) | 224 (29.17%) | 768 |
+| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
| | | | |
-| MAU total | 21 (9.38%) | 377 (9.20%) | 4096 |
-| Tagalong total | 35 (31.25%) | 680 (33.20%) | 2048 |
-| Overall total | 56 (16.67%) | 1057 (17.20%) | 6144 |
+| MAU total | 17 (7.59%) | 329 (8.03%) | 4096 |
+| Tagalong total | 37 (33.04%) | 680 (33.20%) | 2048 |
+| Overall total | 54 (16.07%) | 1009 (16.42%) | 6144 |
------------------------------------------------------------------------------
Allocation state difference after promised meta allocated:
@@ -3053,8 +2841,8 @@
--------------------------------------------------------------------------
Sorted metadata field instances to allocate: 0 / 0 bits (0 ingress bits and 0 egress bits)
->>Event 'pa_pov' at time 1504795745.11
- Took 0.05 seconds
+>>Event 'pa_pov' at time 1504859130.68
+ Took 0.10 seconds
-----------------------------------------------
Allocating POV
@@ -3071,36 +2859,36 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 6 (9.38%) | 192 (9.38%) | 2048 |
| | | | |
-| 4 (8) | 4 (25.00%) | 32 (25.00%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
+| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 6 (9.38%) | 48 (9.38%) | 512 |
+| Total for 8 bit | 4 (6.25%) | 32 (6.25%) | 512 |
| | | | |
| 8 (16) | 6 (37.50%) | 89 (34.77%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 9 (9.38%) | 137 (8.92%) | 1536 |
+| Total for 16 bit | 7 (7.29%) | 105 (6.84%) | 1536 |
| | | | |
-| 14 (32) T | 12 (75.00%) | 384 (75.00%) | 512 |
+| 14 (32) T | 11 (68.75%) | 352 (68.75%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 12 (37.50%) | 384 (37.50%) | 1024 |
+| Total for 32 bit | 11 (34.38%) | 352 (34.38%) | 1024 |
| | | | |
-| 16 (8) T | 9 (56.25%) | 72 (56.25%) | 128 |
+| 16 (8) T | 11 (68.75%) | 88 (68.75%) | 128 |
| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 9 (28.12%) | 72 (28.12%) | 256 |
+| Total for 8 bit | 11 (34.38%) | 88 (34.38%) | 256 |
| | | | |
-| 18 (16) T | 14 (87.50%) | 224 (87.50%) | 256 |
-| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 14 (29.17%) | 224 (29.17%) | 768 |
+| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
| | | | |
-| MAU total | 21 (9.38%) | 377 (9.20%) | 4096 |
-| Tagalong total | 35 (31.25%) | 680 (33.20%) | 2048 |
-| Overall total | 56 (16.67%) | 1057 (17.20%) | 6144 |
+| MAU total | 17 (7.59%) | 329 (8.03%) | 4096 |
+| Tagalong total | 37 (33.04%) | 680 (33.20%) | 2048 |
+| Overall total | 54 (16.07%) | 1009 (16.42%) | 6144 |
------------------------------------------------------------------------------
Sorted POV field instances to allocate (with best pack): 13
@@ -3119,25 +2907,25 @@
12: --validity_check--udp (egress) -- max pov share 5 / best pack 4
Working on
---validity_check--packet_in_hdr <1 bits ingress parsed pov>
+--validity_check--packet_in_hdr <1 bits ingress parsed pov W>
Call to _allocate_pov_helper for:
--validity_check--packet_in_hdr (ingress)
Best pack group: (6)
Looking for container to share POV bit in from already allocated containers for POV.
-Container availability (not used yet for POV): total 192 / partial 1
+Container availability (not used yet for POV): total 193 / partial 1
Looking for container to share POV bit in from already allocated containers that have not been used for POV.
->>Choose container phv68, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 7).
+>>Choose container phv67, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 7).
>> Decided to allocate new container
-Required container phv68
-***Allocating phv68[0:0] for --validity_check--packet_in_hdr[0:0]
-***Allocating phv68[1:1] for --validity_check--packet_out_hdr[0:0]
-***Allocating phv68[2:2] for --validity_check--ethernet[0:0]
-***Allocating phv68[3:3] for --validity_check--ipv4[0:0]
-***Allocating phv68[4:4] for --validity_check--tcp[0:0]
-***Allocating phv68[5:5] for --validity_check--udp[0:0]
-***Allocating phv68[6:6] for --validity_check--metadata_bridge[0:0]
+Required container phv67
+***Allocating phv67[0:0] for --validity_check--packet_in_hdr[0:0]
+***Allocating phv67[1:1] for --validity_check--packet_out_hdr[0:0]
+***Allocating phv67[2:2] for --validity_check--ethernet[0:0]
+***Allocating phv67[3:3] for --validity_check--ipv4[0:0]
+***Allocating phv67[4:4] for --validity_check--tcp[0:0]
+***Allocating phv67[5:5] for --validity_check--udp[0:0]
+***Allocating phv67[6:6] for --validity_check--metadata_bridge[0:0]
Working on
--validity_check--packet_out_hdr <1 bits ingress parsed pov R W>
@@ -3164,24 +2952,24 @@
Already allocated.
Working on
---validity_check--packet_in_hdr <1 bits egress parsed pov W>
+--validity_check--packet_in_hdr <1 bits egress parsed pov>
Call to _allocate_pov_helper for:
--validity_check--packet_in_hdr (egress)
Best pack group: (5)
Looking for container to share POV bit in from already allocated containers for POV.
-Container availability (not used yet for POV): total 195 / partial 0
+Container availability (not used yet for POV): total 198 / partial 0
Looking for container to share POV bit in from already allocated containers that have not been used for POV.
->>Choose container phv82, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 6).
+>>Choose container phv81, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 6).
>> Decided to allocate new container
-Required container phv82
-***Allocating phv82[0:0] for --validity_check--packet_in_hdr[0:0]
-***Allocating phv82[1:1] for --validity_check--packet_out_hdr[0:0]
-***Allocating phv82[2:2] for --validity_check--ethernet[0:0]
-***Allocating phv82[3:3] for --validity_check--ipv4[0:0]
-***Allocating phv82[4:4] for --validity_check--tcp[0:0]
-***Allocating phv82[5:5] for --validity_check--udp[0:0]
+Required container phv81
+***Allocating phv81[0:0] for --validity_check--packet_in_hdr[0:0]
+***Allocating phv81[1:1] for --validity_check--packet_out_hdr[0:0]
+***Allocating phv81[2:2] for --validity_check--ethernet[0:0]
+***Allocating phv81[3:3] for --validity_check--ipv4[0:0]
+***Allocating phv81[4:4] for --validity_check--tcp[0:0]
+***Allocating phv81[5:5] for --validity_check--udp[0:0]
Working on
--validity_check--packet_out_hdr <1 bits egress parsed pov>
@@ -3205,12 +2993,12 @@
Sum of container bit widths POVs found in: 16
ingress
- phv68 (8 bits)
+ phv67 (8 bits)
>> 8 total bits
egress
- phv82 (8 bits)
+ phv81 (8 bits)
>> 8 total bits
->>Event 'pa_meta2' at time 1504795745.23
+>>Event 'pa_meta2' at time 1504859130.80
Took 0.12 seconds
-----------------------------------------------
@@ -3231,36 +3019,36 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 6 (9.38%) | 192 (9.38%) | 2048 |
| | | | |
-| 4 (8) | 5 (31.25%) | 39 (30.47%) | 128 |
-| 5 (8) | 3 (18.75%) | 22 (17.19%) | 128 |
+| 4 (8) | 4 (25.00%) | 31 (24.22%) | 128 |
+| 5 (8) | 2 (12.50%) | 14 (10.94%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 8 (12.50%) | 61 (11.91%) | 512 |
+| Total for 8 bit | 6 (9.38%) | 45 (8.79%) | 512 |
| | | | |
| 8 (16) | 6 (37.50%) | 89 (34.77%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 9 (9.38%) | 137 (8.92%) | 1536 |
+| Total for 16 bit | 7 (7.29%) | 105 (6.84%) | 1536 |
| | | | |
-| 14 (32) T | 12 (75.00%) | 384 (75.00%) | 512 |
+| 14 (32) T | 11 (68.75%) | 352 (68.75%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 12 (37.50%) | 384 (37.50%) | 1024 |
+| Total for 32 bit | 11 (34.38%) | 352 (34.38%) | 1024 |
| | | | |
-| 16 (8) T | 9 (56.25%) | 72 (56.25%) | 128 |
+| 16 (8) T | 11 (68.75%) | 88 (68.75%) | 128 |
| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 9 (28.12%) | 72 (28.12%) | 256 |
+| Total for 8 bit | 11 (34.38%) | 88 (34.38%) | 256 |
| | | | |
-| 18 (16) T | 14 (87.50%) | 224 (87.50%) | 256 |
-| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 14 (29.17%) | 224 (29.17%) | 768 |
+| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
| | | | |
-| MAU total | 23 (10.27%) | 390 (9.52%) | 4096 |
-| Tagalong total | 35 (31.25%) | 680 (33.20%) | 2048 |
-| Overall total | 58 (17.26%) | 1070 (17.42%) | 6144 |
+| MAU total | 19 (8.48%) | 342 (8.35%) | 4096 |
+| Tagalong total | 37 (33.04%) | 680 (33.20%) | 2048 |
+| Overall total | 56 (16.67%) | 1022 (16.63%) | 6144 |
------------------------------------------------------------------------------
Allocation state difference after promised meta allocated:
@@ -3308,9 +3096,9 @@
--------------------------------------------------------------------------
Sorted metadata field instances to allocate: 3 / 35 bits (35 ingress bits and 0 egress bits)
- 0: ecmp_metadata.groupId (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=1, best_share_pack=0, max_split=16, bit_width=16, initial_usage_read=1, earliest_use=1, latest_use=2)
- 1: ecmp_metadata.selector (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=1, best_share_pack=0, max_split=16, bit_width=16, initial_usage_read=1, earliest_use=1, latest_use=2)
- 2: ig_intr_md_for_tm.drop_ctl (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=2, best_share_pack=0, max_split=1, bit_width=3, initial_usage_read=2, earliest_use=1, latest_use=12)
+ 0: ecmp_metadata.groupId (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=1, best_share_pack=0, max_split=16, bit_width=16, initial_usage_read=1, earliest_use=0, latest_use=1)
+ 1: ecmp_metadata.selector (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=1, best_share_pack=0, max_split=16, bit_width=16, initial_usage_read=1, earliest_use=0, latest_use=1)
+ 2: ig_intr_md_for_tm.drop_ctl (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=2, best_share_pack=0, max_split=1, bit_width=3, initial_usage_read=2, earliest_use=0, latest_use=12)
---------------------------------------
Working on:
@@ -3337,12 +3125,12 @@
Group 1 32 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 2 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv32 -- fails False
Group 3 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv48 -- fails False
- Group 4 8 bits -- avail 11 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
- Group 5 8 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 4 8 bits -- avail 12 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 5 8 bits -- avail 14 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 6 8 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 7 8 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 8 16 bits -- avail 10 and promised 1 -- ingress promised 1 and remain 9 and req 0 -- egress promised 0 and remain 8 and req 0 -- as if deparsed False -- container_to_use phv134 -- fails False
- Group 9 16 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 9 16 bits -- avail 15 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 10 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv160 -- fails False
Group 11 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv176 -- fails False
Group 12 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv192 -- fails False
@@ -3378,12 +3166,12 @@
Group 1 32 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 2 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv32 -- fails False
Group 3 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv48 -- fails False
- Group 4 8 bits -- avail 11 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
- Group 5 8 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 4 8 bits -- avail 12 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 5 8 bits -- avail 14 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 6 8 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 7 8 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 8 16 bits -- avail 9 and promised 1 -- ingress promised 1 and remain 8 and req 0 -- egress promised 0 and remain 8 and req 0 -- as if deparsed False -- container_to_use phv135 -- fails False
- Group 9 16 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 9 16 bits -- avail 15 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 10 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv160 -- fails False
Group 11 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv176 -- fails False
Group 12 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv192 -- fails False
@@ -3419,12 +3207,12 @@
Group 1 32 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 2 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 12 and req 0 -- as if deparsed True -- container_to_use phv32 -- fails False
Group 3 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 12 and req 0 -- as if deparsed True -- container_to_use phv48 -- fails False
- Group 4 8 bits -- avail 11 and promised 1 -- ingress promised 1 and remain 10 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv69 -- fails False
- Group 5 8 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 4 8 bits -- avail 12 and promised 1 -- ingress promised 1 and remain 11 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv68 -- fails False
+ Group 5 8 bits -- avail 14 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 6 8 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv96 -- fails False
Group 7 8 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv112 -- fails False
Group 8 16 bits -- avail 8 and promised 1 -- ingress promised 1 and remain 7 and req 1 -- egress promised 0 and remain 0 and req 0 -- as if deparsed True -- container_to_use phv136 -- fails False
- Group 9 16 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 9 16 bits -- avail 15 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 10 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv160 -- fails False
Group 11 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv176 -- fails False
Group 12 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv192 -- fails False
@@ -3436,8 +3224,8 @@
case 2: looking at allowed start bits [0, 1, 2, 3, 4, 5, 6, 7]
final start_bit = 5
(1) msb_offset = 8
-***Allocating phv69[7:5] for ig_intr_md_for_tm.drop_ctl[2:0]
->>Event 'pa_meta_init' at time 1504795745.39
+***Allocating phv68[7:5] for ig_intr_md_for_tm.drop_ctl[2:0]
+>>Event 'pa_meta_init' at time 1504859130.96
Took 0.16 seconds
-----------------------------------------------
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.results.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.results.log
index b15a782..e535990 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.results.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/pa.results.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: pa.results.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
Program: ecmp
@@ -17,36 +17,36 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 6 (9.38%) | 192 (9.38%) | 2048 |
| | | | |
-| 4 (8) | 6 (37.50%) | 42 (32.81%) | 128 |
-| 5 (8) | 3 (18.75%) | 22 (17.19%) | 128 |
+| 4 (8) | 5 (31.25%) | 34 (26.56%) | 128 |
+| 5 (8) | 2 (12.50%) | 14 (10.94%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 9 (14.06%) | 64 (12.50%) | 512 |
+| Total for 8 bit | 7 (10.94%) | 48 (9.38%) | 512 |
| | | | |
| 8 (16) | 8 (50.00%) | 121 (47.27%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 11 (11.46%) | 169 (11.00%) | 1536 |
+| Total for 16 bit | 9 (9.38%) | 137 (8.92%) | 1536 |
| | | | |
-| 14 (32) T | 12 (75.00%) | 384 (75.00%) | 512 |
+| 14 (32) T | 11 (68.75%) | 352 (68.75%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 12 (37.50%) | 384 (37.50%) | 1024 |
+| Total for 32 bit | 11 (34.38%) | 352 (34.38%) | 1024 |
| | | | |
-| 16 (8) T | 9 (56.25%) | 72 (56.25%) | 128 |
+| 16 (8) T | 11 (68.75%) | 88 (68.75%) | 128 |
| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 9 (28.12%) | 72 (28.12%) | 256 |
+| Total for 8 bit | 11 (34.38%) | 88 (34.38%) | 256 |
| | | | |
-| 18 (16) T | 14 (87.50%) | 224 (87.50%) | 256 |
-| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 14 (29.17%) | 224 (29.17%) | 768 |
+| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
| | | | |
-| MAU total | 26 (11.61%) | 425 (10.38%) | 4096 |
-| Tagalong total | 35 (31.25%) | 680 (33.20%) | 2048 |
-| Overall total | 61 (18.15%) | 1105 (17.99%) | 6144 |
+| MAU total | 22 (9.82%) | 377 (9.20%) | 4096 |
+| Tagalong total | 37 (33.04%) | 680 (33.20%) | 2048 |
+| Overall total | 59 (17.56%) | 1057 (17.20%) | 6144 |
------------------------------------------------------------------------------
--------------------------------------------
@@ -66,42 +66,38 @@
>> 6 in ingress and 0 in egress
Allocations in Group 4 8 bits
- 8-bit PHV 64 (ingress): phv64[7:1] = -pad-0-[6:0] (tagalong capable)
- 8-bit PHV 64 (ingress): phv64[0:0] = ig_intr_md_for_tm.copy_to_cpu[0:0] (deparsed)
- 8-bit PHV 65 (ingress): phv65[7:0] = ipv4.srcAddr[23:16] (deparsed)
- 8-bit PHV 66 (ingress): phv66[7:0] = ethernet.dstAddr[47:40] (deparsed)
- 8-bit PHV 67 (ingress): phv67[7:0] = ethernet.srcAddr[39:32] (deparsed)
- 8-bit PHV 68 (ingress): phv68[6:6] = --validity_check--metadata_bridge[0:0] (deparsed)
- 8-bit PHV 68 (ingress): phv68[5:5] = --validity_check--udp[0:0] (deparsed)
- 8-bit PHV 68 (ingress): phv68[4:4] = --validity_check--tcp[0:0] (deparsed)
- 8-bit PHV 68 (ingress): phv68[3:3] = --validity_check--ipv4[0:0] (deparsed)
- 8-bit PHV 68 (ingress): phv68[2:2] = --validity_check--ethernet[0:0] (deparsed)
- 8-bit PHV 68 (ingress): phv68[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
- 8-bit PHV 68 (ingress): phv68[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
- 8-bit PHV 69 (ingress): phv69[7:5] = ig_intr_md_for_tm.drop_ctl[2:0] (deparsed)
- >> 6 in ingress and 0 in egress
+ 8-bit PHV 64 (ingress): phv64[7:0] = ipv4.srcAddr[23:16] (deparsed)
+ 8-bit PHV 65 (ingress): phv65[7:0] = ethernet.dstAddr[47:40] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[7:0] = ethernet.srcAddr[39:32] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[6:6] = --validity_check--metadata_bridge[0:0] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[5:5] = --validity_check--udp[0:0] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[4:4] = --validity_check--tcp[0:0] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[3:3] = --validity_check--ipv4[0:0] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[2:2] = --validity_check--ethernet[0:0] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
+ 8-bit PHV 68 (ingress): phv68[7:5] = ig_intr_md_for_tm.drop_ctl[2:0] (deparsed)
+ >> 5 in ingress and 0 in egress
Allocations in Group 5 8 bits
- 8-bit PHV 80 (egress): phv80[7:1] = -pad-0-[6:0] (tagalong capable)
- 8-bit PHV 80 (egress): phv80[0:0] = ig_intr_md_for_tm.copy_to_cpu[0:0] (deparsed)
- 8-bit PHV 81 (egress): phv81[7:3] = eg_intr_md._pad7[4:0]
- 8-bit PHV 81 (egress): phv81[2:0] = eg_intr_md.egress_cos[2:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[5:5] = --validity_check--udp[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[4:4] = --validity_check--tcp[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[3:3] = --validity_check--ipv4[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[2:2] = --validity_check--ethernet[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
- >> 0 in ingress and 3 in egress
+ 8-bit PHV 80 (egress): phv80[7:3] = eg_intr_md._pad7[4:0]
+ 8-bit PHV 80 (egress): phv80[2:0] = eg_intr_md.egress_cos[2:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[5:5] = --validity_check--udp[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[4:4] = --validity_check--tcp[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[3:3] = --validity_check--ipv4[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[2:2] = --validity_check--ethernet[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
+ >> 0 in ingress and 2 in egress
Allocations in Group 8 16 bits
- 16-bit PHV 128 (ingress): phv128[15:15] = ig_intr_md.resubmit_flag[0:0] (deparsed)
- 16-bit PHV 128 (ingress): phv128[14:14] = ig_intr_md._pad1[0:0] (deparsed)
- 16-bit PHV 128 (ingress): phv128[13:12] = ig_intr_md._pad2[1:0] (deparsed)
- 16-bit PHV 128 (ingress): phv128[11:9] = ig_intr_md._pad3[2:0] (deparsed)
+ 16-bit PHV 128 (ingress): phv128[15:15] = ig_intr_md.resubmit_flag[0:0]
+ 16-bit PHV 128 (ingress): phv128[14:14] = ig_intr_md._pad1[0:0]
+ 16-bit PHV 128 (ingress): phv128[13:12] = ig_intr_md._pad2[1:0]
+ 16-bit PHV 128 (ingress): phv128[11:9] = ig_intr_md._pad3[2:0]
16-bit PHV 128 (ingress): phv128[8:0] = ig_intr_md.ingress_port[8:0] (deparsed)
16-bit PHV 129 (ingress): phv129[15:7] = packet_out_hdr.egress_port[8:0] (deparsed)
- 16-bit PHV 129 (ingress): phv129[15:7] = packet_in_hdr.ingress_port[8:0] (tagalong capable) (deparsed)
+ 16-bit PHV 129 (ingress): phv129[15:7] = packet_in_hdr.ingress_port[8:0] (deparsed)
16-bit PHV 129 (ingress): phv129[6:0] = packet_out_hdr._padding[6:0] (tagalong capable) (deparsed)
16-bit PHV 129 (ingress): phv129[6:0] = packet_in_hdr._padding[6:0] (tagalong capable) (deparsed)
16-bit PHV 130 (ingress): phv130[8:0] = ig_intr_md_for_tm.ucast_egress_port[8:0] (deparsed)
@@ -114,45 +110,40 @@
>> 8 in ingress and 0 in egress
Allocations in Group 9 16 bits
- 16-bit PHV 144 (egress): phv144[15:9] = -pad-1-[6:0] (tagalong capable)
- 16-bit PHV 144 (egress): phv144[8:0] = ig_intr_md.ingress_port[8:0] (deparsed)
- 16-bit PHV 145 (egress): phv145[15:7] = packet_in_hdr.ingress_port[8:0] (deparsed)
- 16-bit PHV 145 (egress): phv145[6:0] = packet_in_hdr._padding[6:0] (tagalong capable) (deparsed)
- 16-bit PHV 146 (egress): phv146[15:9] = eg_intr_md._pad0[6:0]
- 16-bit PHV 146 (egress): phv146[8:0] = eg_intr_md.egress_port[8:0] (deparsed)
- >> 0 in ingress and 3 in egress
+ 16-bit PHV 144 (egress): phv144[15:9] = eg_intr_md._pad0[6:0]
+ 16-bit PHV 144 (egress): phv144[8:0] = eg_intr_md.egress_port[8:0] (deparsed)
+ >> 0 in ingress and 1 in egress
Allocations in Group 14 32 bits (tagalong)
32-bit PHV 256 (ingress): phv256[31:24] = ipv4.identification[7:0] (tagalong capable) (deparsed)
32-bit PHV 256 (ingress): phv256[23:21] = ipv4.flags[2:0] (tagalong capable) (deparsed)
32-bit PHV 256 (ingress): phv256[20:8] = ipv4.fragOffset[12:0] (tagalong capable) (deparsed)
32-bit PHV 256 (ingress): phv256[7:0] = ipv4.ttl[7:0] (tagalong capable) (deparsed)
- 32-bit PHV 257 (ingress): phv257[31:0] = tcp.ackNo[31:0] (tagalong capable) (deparsed)
- 32-bit PHV 258 (ingress): phv258[31:28] = tcp.dataOffset[3:0] (tagalong capable) (deparsed)
- 32-bit PHV 258 (ingress): phv258[27:25] = tcp.res[2:0] (tagalong capable) (deparsed)
- 32-bit PHV 258 (ingress): phv258[24:22] = tcp.ecn[2:0] (tagalong capable) (deparsed)
- 32-bit PHV 258 (ingress): phv258[21:16] = tcp.ctrl[5:0] (tagalong capable) (deparsed)
- 32-bit PHV 258 (ingress): phv258[15:0] = tcp.window[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 259 (ingress): phv259[31:16] = tcp.checksum[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 259 (ingress): phv259[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (egress): phv260[31:24] = ipv4.ttl[7:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (egress): phv260[23:16] = ipv4.protocol[7:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (egress): phv260[15:0] = ipv4.hdrChecksum[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 261 (egress): phv261[31:0] = ipv4.srcAddr[31:0] (tagalong capable) (deparsed)
- 32-bit PHV 262 (egress): phv262[31:0] = ipv4.dstAddr[31:0] (tagalong capable) (deparsed)
- 32-bit PHV 263 (egress): phv263[31:0] = tcp.ackNo[31:0] (tagalong capable) (deparsed)
- 32-bit PHV 263 (egress): phv263[31:16] = udp.length_[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 263 (egress): phv263[15:0] = udp.checksum[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 264 (egress): phv264[31:28] = tcp.dataOffset[3:0] (tagalong capable) (deparsed)
- 32-bit PHV 264 (egress): phv264[27:25] = tcp.res[2:0] (tagalong capable) (deparsed)
- 32-bit PHV 264 (egress): phv264[24:22] = tcp.ecn[2:0] (tagalong capable) (deparsed)
- 32-bit PHV 264 (egress): phv264[21:16] = tcp.ctrl[5:0] (tagalong capable) (deparsed)
- 32-bit PHV 264 (egress): phv264[15:0] = tcp.window[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 265 (egress): phv265[31:16] = tcp.checksum[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 265 (egress): phv265[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 266 (egress): phv266[31:0] = ethernet.dstAddr[39:8] (tagalong capable) (deparsed)
- 32-bit PHV 267 (egress): phv267[31:0] = ethernet.srcAddr[31:0] (tagalong capable) (deparsed)
- >> 4 in ingress and 8 in egress
+ 32-bit PHV 257 (ingress): phv257[31:28] = tcp.dataOffset[3:0] (tagalong capable) (deparsed)
+ 32-bit PHV 257 (ingress): phv257[27:25] = tcp.res[2:0] (tagalong capable) (deparsed)
+ 32-bit PHV 257 (ingress): phv257[24:22] = tcp.ecn[2:0] (tagalong capable) (deparsed)
+ 32-bit PHV 257 (ingress): phv257[21:16] = tcp.ctrl[5:0] (tagalong capable) (deparsed)
+ 32-bit PHV 257 (ingress): phv257[15:0] = tcp.window[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 258 (ingress): phv258[31:16] = tcp.checksum[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 258 (ingress): phv258[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 264 (egress): phv264[31:24] = ipv4.ttl[7:0] (tagalong capable) (deparsed)
+ 32-bit PHV 264 (egress): phv264[23:16] = ipv4.protocol[7:0] (tagalong capable) (deparsed)
+ 32-bit PHV 264 (egress): phv264[15:0] = ipv4.hdrChecksum[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 265 (egress): phv265[31:0] = ipv4.srcAddr[31:0] (tagalong capable) (deparsed)
+ 32-bit PHV 266 (egress): phv266[31:0] = ipv4.dstAddr[31:0] (tagalong capable) (deparsed)
+ 32-bit PHV 267 (egress): phv267[31:0] = tcp.ackNo[31:0] (tagalong capable) (deparsed)
+ 32-bit PHV 267 (egress): phv267[31:16] = udp.length_[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 267 (egress): phv267[15:0] = udp.checksum[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 268 (egress): phv268[31:28] = tcp.dataOffset[3:0] (tagalong capable) (deparsed)
+ 32-bit PHV 268 (egress): phv268[27:25] = tcp.res[2:0] (tagalong capable) (deparsed)
+ 32-bit PHV 268 (egress): phv268[24:22] = tcp.ecn[2:0] (tagalong capable) (deparsed)
+ 32-bit PHV 268 (egress): phv268[21:16] = tcp.ctrl[5:0] (tagalong capable) (deparsed)
+ 32-bit PHV 268 (egress): phv268[15:0] = tcp.window[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 269 (egress): phv269[31:16] = tcp.checksum[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 269 (egress): phv269[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 270 (egress): phv270[31:0] = ethernet.dstAddr[39:8] (tagalong capable) (deparsed)
+ 32-bit PHV 271 (egress): phv271[31:0] = ethernet.srcAddr[31:0] (tagalong capable) (deparsed)
+ >> 3 in ingress and 8 in egress
Allocations in Group 16 8 bits (tagalong)
8-bit PHV 288 (ingress): phv288[7:4] = ipv4.version[3:0] (tagalong capable) (deparsed)
@@ -161,74 +152,68 @@
8-bit PHV 289 (ingress): phv289[7:0] = udp.length_[15:8] (tagalong capable) (deparsed)
8-bit PHV 290 (ingress): phv290[7:0] = tcp.srcPort[7:0] (tagalong capable) (deparsed)
8-bit PHV 290 (ingress): phv290[7:0] = udp.length_[7:0] (tagalong capable) (deparsed)
- 8-bit PHV 292 (egress): phv292[7:4] = ipv4.version[3:0] (tagalong capable) (deparsed)
- 8-bit PHV 292 (egress): phv292[3:0] = ipv4.ihl[3:0] (tagalong capable) (deparsed)
- 8-bit PHV 293 (egress): phv293[7:0] = ipv4.diffserv[7:0] (tagalong capable) (deparsed)
- 8-bit PHV 294 (egress): phv294[7:0] = tcp.srcPort[15:8] (tagalong capable) (deparsed)
- 8-bit PHV 294 (egress): phv294[7:0] = udp.srcPort[15:8] (tagalong capable) (deparsed)
- 8-bit PHV 295 (egress): phv295[7:0] = tcp.srcPort[7:0] (tagalong capable) (deparsed)
- 8-bit PHV 295 (egress): phv295[7:0] = udp.srcPort[7:0] (tagalong capable) (deparsed)
- 8-bit PHV 296 (egress): phv296[7:0] = ethernet.dstAddr[47:40] (tagalong capable) (deparsed)
- 8-bit PHV 297 (egress): phv297[7:0] = ethernet.srcAddr[39:32] (tagalong capable) (deparsed)
- >> 3 in ingress and 6 in egress
+ 8-bit PHV 291 (ingress): phv291[7:0] = tcp.dstPort[15:8] (tagalong capable) (deparsed)
+ 8-bit PHV 292 (ingress): phv292[7:0] = tcp.dstPort[7:0] (tagalong capable) (deparsed)
+ 8-bit PHV 296 (egress): phv296[7:4] = ipv4.version[3:0] (tagalong capable) (deparsed)
+ 8-bit PHV 296 (egress): phv296[3:0] = ipv4.ihl[3:0] (tagalong capable) (deparsed)
+ 8-bit PHV 297 (egress): phv297[7:0] = ipv4.diffserv[7:0] (tagalong capable) (deparsed)
+ 8-bit PHV 298 (egress): phv298[7:0] = tcp.srcPort[15:8] (tagalong capable) (deparsed)
+ 8-bit PHV 298 (egress): phv298[7:0] = udp.srcPort[15:8] (tagalong capable) (deparsed)
+ 8-bit PHV 299 (egress): phv299[7:0] = tcp.srcPort[7:0] (tagalong capable) (deparsed)
+ 8-bit PHV 299 (egress): phv299[7:0] = udp.srcPort[7:0] (tagalong capable) (deparsed)
+ 8-bit PHV 300 (egress): phv300[7:0] = ethernet.dstAddr[47:40] (tagalong capable) (deparsed)
+ 8-bit PHV 301 (egress): phv301[7:0] = ethernet.srcAddr[39:32] (tagalong capable) (deparsed)
+ >> 5 in ingress and 6 in egress
Allocations in Group 18 16 bits (tagalong)
16-bit PHV 320 (ingress): phv320[15:8] = ipv4.diffserv[7:0] (tagalong capable) (deparsed)
16-bit PHV 320 (ingress): phv320[7:0] = ipv4.totalLen[15:8] (tagalong capable) (deparsed)
16-bit PHV 321 (ingress): phv321[15:8] = ipv4.totalLen[7:0] (tagalong capable) (deparsed)
16-bit PHV 321 (ingress): phv321[7:0] = ipv4.identification[15:8] (tagalong capable) (deparsed)
- 16-bit PHV 322 (ingress): phv322[15:0] = tcp.dstPort[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 322 (ingress): phv322[15:0] = tcp.seqNo[31:16] (tagalong capable) (deparsed)
16-bit PHV 322 (ingress): phv322[15:0] = udp.checksum[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 323 (ingress): phv323[15:0] = tcp.seqNo[31:16] (tagalong capable) (deparsed)
- 16-bit PHV 324 (ingress): phv324[15:0] = tcp.seqNo[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 326 (egress): phv326[15:0] = ipv4.totalLen[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 327 (egress): phv327[15:0] = ipv4.identification[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 328 (egress): phv328[15:13] = ipv4.flags[2:0] (tagalong capable) (deparsed)
- 16-bit PHV 328 (egress): phv328[12:0] = ipv4.fragOffset[12:0] (tagalong capable) (deparsed)
- 16-bit PHV 329 (egress): phv329[15:0] = tcp.dstPort[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 329 (egress): phv329[15:0] = udp.dstPort[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 330 (egress): phv330[15:0] = tcp.seqNo[31:16] (tagalong capable) (deparsed)
- 16-bit PHV 331 (egress): phv331[15:0] = tcp.seqNo[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 332 (egress): phv332[15:8] = ethernet.dstAddr[7:0] (tagalong capable) (deparsed)
- 16-bit PHV 332 (egress): phv332[7:0] = ethernet.srcAddr[47:40] (tagalong capable) (deparsed)
- 16-bit PHV 333 (egress): phv333[15:0] = ethernet.etherType[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 334 (egress): phv334[15:7] = packet_out_hdr.egress_port[8:0] (tagalong capable) (deparsed)
- 16-bit PHV 334 (egress): phv334[6:0] = packet_out_hdr._padding[6:0] (tagalong capable) (deparsed)
- >> 5 in ingress and 9 in egress
+ 16-bit PHV 323 (ingress): phv323[15:0] = tcp.seqNo[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 324 (ingress): phv324[15:0] = tcp.ackNo[31:16] (tagalong capable) (deparsed)
+ 16-bit PHV 325 (ingress): phv325[15:0] = tcp.ackNo[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 332 (egress): phv332[15:0] = ipv4.totalLen[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 333 (egress): phv333[15:0] = ipv4.identification[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 334 (egress): phv334[15:13] = ipv4.flags[2:0] (tagalong capable) (deparsed)
+ 16-bit PHV 334 (egress): phv334[12:0] = ipv4.fragOffset[12:0] (tagalong capable) (deparsed)
+ 16-bit PHV 335 (egress): phv335[15:0] = tcp.dstPort[15:0] (tagalong capable) (deparsed)
+ >> 6 in ingress and 4 in egress
+
+Allocations in Group 19 16 bits (tagalong)
+ 16-bit PHV 336 (egress): phv336[15:0] = tcp.seqNo[31:16] (tagalong capable) (deparsed)
+ 16-bit PHV 336 (egress): phv336[15:0] = udp.dstPort[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 337 (egress): phv337[15:0] = tcp.seqNo[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 338 (egress): phv338[15:8] = ethernet.dstAddr[7:0] (tagalong capable) (deparsed)
+ 16-bit PHV 338 (egress): phv338[7:0] = ethernet.srcAddr[47:40] (tagalong capable) (deparsed)
+ 16-bit PHV 339 (egress): phv339[15:0] = ethernet.etherType[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 340 (egress): phv340[15:7] = packet_out_hdr.egress_port[8:0] (tagalong capable) (deparsed)
+ 16-bit PHV 340 (egress): phv340[15:7] = packet_in_hdr.ingress_port[8:0] (tagalong capable) (deparsed)
+ 16-bit PHV 340 (egress): phv340[6:0] = packet_out_hdr._padding[6:0] (tagalong capable) (deparsed)
+ 16-bit PHV 340 (egress): phv340[6:0] = packet_in_hdr._padding[6:0] (tagalong capable) (deparsed)
+ >> 0 in ingress and 5 in egress
Final POV layout (ingress):
- 32: --validity_check--packet_in_hdr (ingress) in container 68
- 33: --validity_check--packet_out_hdr (ingress) in container 68
- 34: --validity_check--ethernet (ingress) in container 68
- 35: --validity_check--ipv4 (ingress) in container 68
- 36: --validity_check--tcp (ingress) in container 68
- 37: --validity_check--udp (ingress) in container 68
- 38: --validity_check--metadata_bridge (ingress) in container 68
+ 32: --validity_check--packet_in_hdr (ingress) in container 67
+ 33: --validity_check--packet_out_hdr (ingress) in container 67
+ 34: --validity_check--ethernet (ingress) in container 67
+ 35: --validity_check--ipv4 (ingress) in container 67
+ 36: --validity_check--tcp (ingress) in container 67
+ 37: --validity_check--udp (ingress) in container 67
+ 38: --validity_check--metadata_bridge (ingress) in container 67
Final POV layout (egress):
- 0: --validity_check--packet_in_hdr (egress) in container 82
- 1: --validity_check--packet_out_hdr (egress) in container 82
- 2: --validity_check--ethernet (egress) in container 82
- 3: --validity_check--ipv4 (egress) in container 82
- 4: --validity_check--tcp (egress) in container 82
- 5: --validity_check--udp (egress) in container 82
+ 0: --validity_check--packet_in_hdr (egress) in container 81
+ 1: --validity_check--packet_out_hdr (egress) in container 81
+ 2: --validity_check--ethernet (egress) in container 81
+ 3: --validity_check--ipv4 (egress) in container 81
+ 4: --validity_check--tcp (egress) in container 81
+ 5: --validity_check--udp (egress) in container 81
--------------------------------------------
- Bridged metadata layout (9 bytes)
+ Bridged metadata layout (6 bytes)
--------------------------------------------
-Final ingress layout:
- -pad-0-[6:0]
- ig_intr_md_for_tm.copy_to_cpu[0:0]
- ig_intr_md.resubmit_flag[0:0]
- ig_intr_md._pad1[0:0]
- ig_intr_md._pad2[1:0]
- ig_intr_md._pad3[2:0]
- ig_intr_md.ingress_port[8:0]
-
-Final egress layout:
- -pad-0-[6:0]
- ig_intr_md_for_tm.copy_to_cpu[0:0]
- -pad-1-[6:0]
- ig_intr_md.ingress_port[8:0]
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.calcfields.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.calcfields.log
index 910a68e..f521d95 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.calcfields.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.calcfields.log
@@ -1,35 +1,37 @@
+---------------------------------------------------------------------+
| Log file: parde.calcfields.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
Reserving 0 16-bit ingress tphvs for residual checksums
Reserving 0 16-bit egress tphvs for residual checksums
Need 0 POV bits for checksum update control
-Number of reachable states from state parse_tcp : 1
+Number of reachable states from state parse_tcp//spilled : 1
+Number of reachable states from state parse_tcp : 2
Number of reachable states from state parse_udp : 1
-Number of reachable states from state parse_ipv4 : 3
-Number of reachable states from state parse_ethernet : 4
-Number of reachable states from state parse_pkt_in : 5
-Number of reachable states from state parse_pkt_out : 5
-Number of reachable states from state default_parser : 6
-Number of reachable states from state start : 8
-Number of reachable states from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0> : 9
-Number of reachable states from state <Shim start state> : 10
+Number of reachable states from state parse_ipv4 : 4
+Number of reachable states from state parse_ethernet : 5
+Number of reachable states from state parse_pkt_in : 6
+Number of reachable states from state parse_pkt_out : 6
+Number of reachable states from state default_parser : 7
+Number of reachable states from state start : 9
+Number of reachable states from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0> : 10
+Number of reachable states from state <Shim start state> : 11
parser_state_calculations:[
- parse_tcp_140208442752208
- parse_udp_140208440733776
- parse_ipv4_140208442749200
- parse_ethernet_140208440786256
- parse_pkt_in_140208440785552
- parse_pkt_out_140208440734864
- default_parser_140208440734672
- start_140208442750992
- <Phase 0>_140208442851280
- <Ingress intrinsic metadata>_140208442850960
- <POV initialization>_140208442802576
- <Shim start state>_140208442802896
+ parse_tcp_139953904595664
+ parse_tcp_139953905676240
+ parse_udp_139953897530320
+ parse_ipv4_139953905675408
+ parse_ethernet_139953905672592
+ parse_pkt_in_139953905675344
+ parse_pkt_out_139953897531408
+ default_parser_139953897531216
+ start_139953905674832
+ <Phase 0>_139953905422864
+ <Ingress intrinsic metadata>_139953905422544
+ <POV initialization>_139953905423248
+ <Shim start state>_139953905423568
]
parser_calculations: [
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.config.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.config.log
index 22d729d..42c8ef3 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.config.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.config.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: parde.config.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
Configuring deparser.inp.iim.ii_phv_csum.csum_cfg[0].csum_cfg_entry[0].zero_m_s_b = 1
@@ -16059,12 +16059,12 @@
63 | g1w31:
|
8 bits
- 64 | I g2w0: [ig_intr_md_for_tm.copy_to_cpu]
- 65 | I g2w1: [ipv4.srcAddr[23:16]]
- 66 | I g2w2: [ethernet.dstAddr[47:40]]
- 67 | I g2w3: [ethernet.srcAddr[39:32]]
- 68 | I g2w4: [POV[39:32]]
- 69 | I g2w5: [ig_intr_md_for_tm.drop_ctl]
+ 64 | I g2w0: [ipv4.srcAddr[23:16]]
+ 65 | I g2w1: [ethernet.dstAddr[47:40]]
+ 66 | I g2w2: [ethernet.srcAddr[39:32]]
+ 67 | I g2w3: [POV[39:32]]
+ 68 | I g2w4: [ig_intr_md_for_tm.drop_ctl]
+ 69 | g2w5:
70 | g2w6:
71 | g2w7:
72 | g2w8:
@@ -16075,9 +16075,9 @@
77 | g2w13:
78 | g2w14:
79 | g2w15:
- 80 | E g2w16: [ig_intr_md_for_tm.copy_to_cpu]
- 81 | E g2w17: [eg_intr_md._pad7, eg_intr_md.egress_cos]
- 82 | E g2w18: [POV[7:0]]
+ 80 | E g2w16: [eg_intr_md._pad7, eg_intr_md.egress_cos]
+ 81 | E g2w17: [POV[7:0]]
+ 82 | g2w18:
83 | g2w19:
84 | g2w20:
85 | g2w21:
@@ -16143,9 +16143,9 @@
141 | g4w13:
142 | g4w14:
143 | g4w15:
- 144 | E g4w16: [ig_intr_md.ingress_port]
- 145 | E g4w17: [packet_in_hdr.ingress_port, packet_in_hdr._padding]
- 146 | E g4w18: [eg_intr_md._pad0, eg_intr_md.egress_port]
+ 144 | E g4w16: [eg_intr_md._pad0, eg_intr_md.egress_port]
+ 145 | g4w17:
+ 146 | g4w18:
147 | g4w19:
148 | g4w20:
149 | g4w21:
@@ -16232,21 +16232,21 @@
|
32 bits
256 | I g8w0: [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]
- 257 | I g8w1: [tcp.ackNo]
- 258 | I g8w2: [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]
- 259 | I g8w3: [tcp.checksum, tcp.urgentPtr]
- 260 | E g8w4: [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]
- 261 | E g8w5: [ipv4.srcAddr]
- 262 | E g8w6: [ipv4.dstAddr]
- 263 | E g8w7: [tcp.ackNo, udp.length_, udp.checksum]
- 264 | E g8w8: [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]
- 265 | E g8w9: [tcp.checksum, tcp.urgentPtr]
- 266 | E g8w10: [ethernet.dstAddr[39:8]]
- 267 | E g8w11: [ethernet.srcAddr[31:0]]
- 268 | g8w12:
- 269 | g8w13:
- 270 | g8w14:
- 271 | g8w15:
+ 257 | I g8w1: [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]
+ 258 | I g8w2: [tcp.checksum, tcp.urgentPtr]
+ 259 | g8w3:
+ 260 | g8w4:
+ 261 | g8w5:
+ 262 | g8w6:
+ 263 | g8w7:
+ 264 | E g8w8: [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]
+ 265 | E g8w9: [ipv4.srcAddr]
+ 266 | E g8w10: [ipv4.dstAddr]
+ 267 | E g8w11: [tcp.ackNo, udp.length_, udp.checksum]
+ 268 | E g8w12: [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]
+ 269 | E g8w13: [tcp.checksum, tcp.urgentPtr]
+ 270 | E g8w14: [ethernet.dstAddr[39:8]]
+ 271 | E g8w15: [ethernet.srcAddr[31:0]]
272 | g8w16:
273 | g8w17:
274 | g8w18:
@@ -16268,17 +16268,17 @@
288 | I g9w0: [ipv4.version, ipv4.ihl]
289 | I g9w1: [tcp.srcPort[15:8], udp.length_[15:8]]
290 | I g9w2: [tcp.srcPort[7:0], udp.length_[7:0]]
- 291 | g9w3:
- 292 | E g9w4: [ipv4.version, ipv4.ihl]
- 293 | E g9w5: [ipv4.diffserv]
- 294 | E g9w6: [tcp.srcPort[15:8], udp.srcPort[15:8]]
- 295 | E g9w7: [tcp.srcPort[7:0], udp.srcPort[7:0]]
- 296 | E g9w8: [ethernet.dstAddr[47:40]]
- 297 | E g9w9: [ethernet.srcAddr[39:32]]
- 298 | g9w10:
- 299 | g9w11:
- 300 | g9w12:
- 301 | g9w13:
+ 291 | I g9w3: [tcp.dstPort[15:8]]
+ 292 | I g9w4: [tcp.dstPort[7:0]]
+ 293 | g9w5:
+ 294 | g9w6:
+ 295 | g9w7:
+ 296 | E g9w8: [ipv4.version, ipv4.ihl]
+ 297 | E g9w9: [ipv4.diffserv]
+ 298 | E g9w10: [tcp.srcPort[15:8], udp.srcPort[15:8]]
+ 299 | E g9w11: [tcp.srcPort[7:0], udp.srcPort[7:0]]
+ 300 | E g9w12: [ethernet.dstAddr[47:40]]
+ 301 | E g9w13: [ethernet.srcAddr[39:32]]
302 | g9w14:
303 | g9w15:
304 | g9w16:
@@ -16301,25 +16301,25 @@
16 bits
320 | I g10w0: [ipv4.diffserv, ipv4.totalLen[15:8]]
321 | I g10w1: [ipv4.totalLen[7:0], ipv4.identification[15:8]]
- 322 | I g10w2: [tcp.dstPort, udp.checksum]
- 323 | I g10w3: [tcp.seqNo[31:16]]
- 324 | I g10w4: [tcp.seqNo[15:0]]
- 325 | g10w5:
- 326 | E g10w6: [ipv4.totalLen]
- 327 | E g10w7: [ipv4.identification]
- 328 | E g10w8: [ipv4.flags, ipv4.fragOffset]
- 329 | E g10w9: [tcp.dstPort, udp.dstPort]
- 330 | E g10w10: [tcp.seqNo[31:16]]
- 331 | E g10w11: [tcp.seqNo[15:0]]
- 332 | E g10w12: [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]
- 333 | E g10w13: [ethernet.etherType]
- 334 | E g10w14: [packet_out_hdr.egress_port, packet_out_hdr._padding]
- 335 | g10w15:
- 336 | g10w16:
- 337 | g10w17:
- 338 | g10w18:
- 339 | g10w19:
- 340 | g10w20:
+ 322 | I g10w2: [tcp.seqNo[31:16], udp.checksum]
+ 323 | I g10w3: [tcp.seqNo[15:0]]
+ 324 | I g10w4: [tcp.ackNo[31:16]]
+ 325 | I g10w5: [tcp.ackNo[15:0]]
+ 326 | g10w6:
+ 327 | g10w7:
+ 328 | g10w8:
+ 329 | g10w9:
+ 330 | g10w10:
+ 331 | g10w11:
+ 332 | E g10w12: [ipv4.totalLen]
+ 333 | E g10w13: [ipv4.identification]
+ 334 | E g10w14: [ipv4.flags, ipv4.fragOffset]
+ 335 | E g10w15: [tcp.dstPort]
+ 336 | E g10w16: [tcp.seqNo[31:16], udp.dstPort]
+ 337 | E g10w17: [tcp.seqNo[15:0]]
+ 338 | E g10w18: [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]
+ 339 | E g10w19: [ethernet.etherType]
+ 340 | E g10w20: [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]
341 | g10w21:
342 | g10w22:
343 | g10w23:
@@ -16363,6 +16363,7 @@
7: parse_pkt_out
8: <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>
9: start
+ 10: parse_tcp//spilled
Egress:
0: <Shim start state>
1: parse_ethernet
@@ -16371,7 +16372,7 @@
4: parse_udp
5: default_parser
6: parse_pkt_out
- 7: <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
+ 7: <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
8: parse_pkt_in
---------------
POV layout:
@@ -16395,11 +16396,8 @@
6-254 | -
---------------
Bridged metadata:
-Ingress:
-[64, 128]
-Egress:
-[80, 144]
+[None]
---------------
Deparse order:
-Ingress: ['metadata_bridge', '_bridged_intr_md_', 'packet_out_hdr', 'packet_in_hdr', 'ethernet', 'ipv4', 'tcp', 'udp']
-Egress: ['packet_out_hdr', 'packet_in_hdr', 'ethernet', 'ipv4', 'tcp', 'udp']
+Ingress: ['metadata_bridge', '_bridged_intr_md_', 'packet_out_hdr', 'packet_in_hdr', 'ethernet', 'ipv4', 'udp', 'tcp']
+Egress: ['packet_out_hdr', 'packet_in_hdr', 'ethernet', 'ipv4', 'udp', 'tcp']
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.error.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.error.log
index 34ac11a..a2284a1 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.error.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.error.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: parde.error.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.log
index 2a5c0e4..1372924 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parde.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: parde.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
># Begin digest init (pre-PHV)
@@ -14,20 +14,18 @@
># End digest PHV reservations
># Begin digest init (post-PHV)
># End digest init (post-PHV)
-Bridge-MF:ig_intr_md_for_tm.copy_to_cpu
-Bridge-MF:ig_intr_md.ingress_port
Found parser entry point: start
># Begin unroll of HLIR parse graph
>## Create shadow parse graph and find loops
>## Entrypoint 'p4_parse_state.start'
-Creating shadow state: 'p4_parse_state.start' -> 'shadow_state (start, 140208440786448)'
-Creating shadow state: 'p4_parse_state.parse_pkt_in' -> 'shadow_state (parse_pkt_in, 140208440786000)'
-Creating shadow state: 'p4_parse_state.parse_ethernet' -> 'shadow_state (parse_ethernet, 140208440785808)'
-Creating shadow state: 'p4_parse_state.parse_ipv4' -> 'shadow_state (parse_ipv4, 140208442749264)'
-Creating shadow state: 'p4_parse_state.parse_tcp' -> 'shadow_state (parse_tcp, 140208442749456)'
-Creating shadow state: 'p4_parse_state.parse_udp' -> 'shadow_state (parse_udp, 140208442749392)'
-Creating shadow state: 'p4_parse_state.default_parser' -> 'shadow_state (default_parser, 140208442749520)'
-Creating shadow state: 'p4_parse_state.parse_pkt_out' -> 'shadow_state (parse_pkt_out, 140208442749584)'
+Creating shadow state: 'p4_parse_state.start' -> 'shadow_state (start, 139953897373264)'
+Creating shadow state: 'p4_parse_state.parse_pkt_in' -> 'shadow_state (parse_pkt_in, 139953897373136)'
+Creating shadow state: 'p4_parse_state.parse_ethernet' -> 'shadow_state (parse_ethernet, 139953905673296)'
+Creating shadow state: 'p4_parse_state.parse_ipv4' -> 'shadow_state (parse_ipv4, 139953905672656)'
+Creating shadow state: 'p4_parse_state.parse_tcp' -> 'shadow_state (parse_tcp, 139953905673360)'
+Creating shadow state: 'p4_parse_state.parse_udp' -> 'shadow_state (parse_udp, 139953905672272)'
+Creating shadow state: 'p4_parse_state.default_parser' -> 'shadow_state (default_parser, 139953905673424)'
+Creating shadow state: 'p4_parse_state.parse_pkt_out' -> 'shadow_state (parse_pkt_out, 139953905673488)'
># End unroll of HLIR parse graph
># Begin deparser init
>## Create records for gress 0
@@ -50,8 +48,8 @@
>## Build field ordering for record 'packet_in_hdr'
>## Build field ordering for record 'ethernet'
>## Build field ordering for record 'ipv4'
->## Build field ordering for record 'tcp'
>## Build field ordering for record 'udp'
+>## Build field ordering for record 'tcp'
>## Create records for gress 1
Skipping metadata header 'p4_header_instance.standard_metadata'
Skipping intrinsic header 'p4_header_instance.ig_intr_md'
@@ -72,8 +70,8 @@
>## Build field ordering for record 'packet_in_hdr'
>## Build field ordering for record 'ethernet'
>## Build field ordering for record 'ipv4'
->## Build field ordering for record 'tcp'
>## Build field ordering for record 'udp'
+>## Build field ordering for record 'tcp'
Deparse bmeta_ig_intr_md header
>## Create deparser bridge_ig_intr_md record
Add container 128 for ig_intr_md.resubmit_flag to bmeta_ig_intr_md
@@ -82,7 +80,6 @@
Add container 128 for ig_intr_md._pad3 to bmeta_ig_intr_md
Add container 128 for ig_intr_md.ingress_port to bmeta_ig_intr_md
>## Create deparser bridge record
-Bridge contains user-provided data
># End deparser init
Constructing parse graph for entry point start on ingress
Constructing parse graph for entry point start on egress
@@ -92,52 +89,57 @@
Stretch extraction of ingress_port to state <Ingress intrinsic metadata> offset 7
Stretch extraction of ig_intr_md.ingress_port to state <_parse_bridged_ingress_intrinsic_metadata> offset 7
># Begin scraping deparser POV allocation from raw PHV allocation
-PHV layout: [0, 0, 0, 0, 68, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
+PHV layout: [0, 0, 0, 0, 67, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
>## Scraping individual POV records
-POV 37 -> udp
-POV 32 -> packet_in_hdr
-POV 33 -> packet_out_hdr
-POV 34 -> ethernet
-POV 38 -> pov_bmeta
POV 35 -> ipv4
POV 36 -> tcp
+POV 37 -> udp
+POV 32 -> packet_in_hdr
+POV 38 -> pov_bmeta
+POV 33 -> packet_out_hdr
+POV 34 -> ethernet
>## Setting up array bits
># End scraping deparser POV allocation from raw PHV allocation
># Begin parser POV rewrite
>## Filling in POV init state
>## Rewriting parser POV extractions
-POV for metadata_bridge -> PHV 68 |= 0x40
-POV for packet_in_hdr -> PHV 68 |= 0x1
-POV for ethernet -> PHV 68 |= 0x4
-POV for ipv4 -> PHV 68 |= 0x8
-POV for tcp -> PHV 68 |= 0x10
-POV for udp -> PHV 68 |= 0x20
-POV for packet_out_hdr -> PHV 68 |= 0x2
+POV for metadata_bridge -> PHV 67 |= 0x40
+POV for packet_in_hdr -> PHV 67 |= 0x1
+POV for ethernet -> PHV 67 |= 0x4
+POV for ipv4 -> PHV 67 |= 0x8
+POV for tcp -> PHV 67 |= 0x10
+POV for udp -> PHV 67 |= 0x20
+POV for packet_out_hdr -> PHV 67 |= 0x2
POV for ig_intr_md -> dropped (no deparser record)
POV for _bridged_intr_md_ -> PHV 0 |= 0x10000
>## Sampling not detected, deparsing at least 1 POV byte
>## Adding POV containers to metadata bridge: [0]
>## Set POV skip state's shift amount to 32
># Begin scraping deparser POV allocation from raw PHV allocation
-PHV layout: [82, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
+PHV layout: [81, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
>## Scraping individual POV records
+POV 3 -> ipv4
+POV 4 -> tcp
POV 5 -> udp
POV 0 -> packet_in_hdr
POV 1 -> packet_out_hdr
POV 2 -> ethernet
-POV 3 -> ipv4
-POV 4 -> tcp
>## Setting up array bits
># End scraping deparser POV allocation from raw PHV allocation
># Begin parser POV rewrite
>## Filling in POV init state
>## Rewriting parser POV extractions
-POV for packet_in_hdr -> PHV 82 |= 0x1
-POV for ethernet -> PHV 82 |= 0x4
-POV for ipv4 -> PHV 82 |= 0x8
-POV for tcp -> PHV 82 |= 0x10
-POV for udp -> PHV 82 |= 0x20
-POV for packet_out_hdr -> PHV 82 |= 0x2
+POV for packet_in_hdr -> PHV 81 |= 0x1
+POV for ethernet -> PHV 81 |= 0x4
+POV for ipv4 -> PHV 81 |= 0x8
+POV for tcp -> PHV 81 |= 0x10
+POV for udp -> PHV 81 |= 0x20
+POV for packet_out_hdr -> PHV 81 |= 0x2
+Linear Chain parse_tcp -> parse_tcp//spilled
+Try merge parse_tcp <- parse_tcp//spilled
+merge output at offset 24
+Ran out of 8b extractors
+states will not be partially merged since S2 is end of chain
Linear Chain parse_pkt_in -> parse_ethernet
Try merge parse_pkt_in <- parse_ethernet
Multiple paths to state S2 : parse_ethernet <- 3
@@ -197,7 +199,7 @@
Multiple paths to state S2 : start <- 2
Remove state <Ingress intrinsic metadata>
Remove state <Phase 0>
-assign ids to 10 states, dir = 0
+assign ids to 11 states, dir = 0
------
State : <Shim start state>
shift: 0B
@@ -210,7 +212,7 @@
State : parse_pkt_in
shift: 2B
match_reservations: []
-outputs[addr, width]: ([68, 8], [129, 16])
+outputs[addr, width]: ([67, 8], [129, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
parent state start
@@ -219,7 +221,7 @@
State : parse_ethernet
shift: 14B
match_reservations: []
-outputs[addr, width]: ([68, 8], [66, 8], [3, 32], [132, 16], [67, 8], [4, 32], [133, 16])
+outputs[addr, width]: ([67, 8], [65, 8], [3, 32], [132, 16], [66, 8], [4, 32], [133, 16])
branch on = etherType, offset = 96b, dst = parse_ethernet
match_extractions: [match_window(hw_id=0, width=16)]
match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
@@ -232,7 +234,7 @@
State : parse_ipv4
shift: 20B
match_reservations: []
-outputs[addr, width]: ([68, 8], [288, 8], [320, 16], [321, 16], [256, 32], [1, 32], [65, 8], [131, 16], [2, 32])
+outputs[addr, width]: ([67, 8], [288, 8], [320, 16], [321, 16], [256, 32], [1, 32], [64, 8], [131, 16], [2, 32])
branch on = fragOffset, offset = 51b, dst = parse_ipv4
branch on = protocol, offset = 72b, dst = parse_ipv4
match_extractions: [match_window(hw_id=0, width=16), match_window(hw_id=2, width=8)]
@@ -244,17 +246,18 @@
------
State : parse_tcp
-shift: 20B
+shift: 0B
match_reservations: []
-outputs[addr, width]: ([68, 8], [289, 8], [290, 8], [322, 16], [323, 16], [324, 16], [257, 32], [258, 32], [259, 32])
+outputs[addr, width]: ([67, 8], [289, 8], [290, 8], [291, 8], [322, 16], [323, 16], [324, 16], [325, 16], [257, 32], [258, 32])
match_extractions: []
+next state parse_tcp//spilled val 0 mask [False]
parent state parse_ipv4
------
State : parse_udp
shift: 8B
match_reservations: []
-outputs[addr, width]: ([68, 8], [5, 32], [289, 8], [290, 8], [322, 16])
+outputs[addr, width]: ([67, 8], [5, 32], [289, 8], [290, 8], [322, 16])
match_extractions: []
parent state parse_ipv4
@@ -274,7 +277,7 @@
State : parse_pkt_out
shift: 2B
match_reservations: []
-outputs[addr, width]: ([68, 8], [129, 16])
+outputs[addr, width]: ([67, 8], [129, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
parent state default_parser
@@ -297,7 +300,7 @@
State : start
shift: 0B
match_reservations: [match_window(hw_id=0, width=16)]
-outputs[addr, width]: ([68, 8],)
+outputs[addr, width]: ([67, 8],)
branch on = None, offset = 96b, dst = start
match_extractions: [match_window(hw_id=2, width=8)]
match key = [0, 1, 2, 3, 4, 5, 6, 7]
@@ -305,6 +308,14 @@
next state default_parser val 0 mask [False]
parent state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>
+------
+State : parse_tcp//spilled
+shift: 20B
+match_reservations: []
+outputs[addr, width]: ([292, 8],)
+match_extractions: []
+parent state parse_tcp
+
Linear Chain parse_pkt_in -> parse_ethernet
Try merge parse_pkt_in <- parse_ethernet
Multiple paths to state S2 : parse_ethernet <- 3
@@ -326,7 +337,7 @@
S2: State : <Egress intrinsic metadata>
shift: 3B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8])
+outputs[addr, width]: ([144, 16], [80, 8])
branch on = None, offset = 24b, dst = <Egress intrinsic metadata>
match_extractions: []
next state <POV skip> val 0 mask [False]
@@ -340,7 +351,7 @@
S1: State : <POV initialization>_<Egress intrinsic metadata>
shift: 3B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8])
+outputs[addr, width]: ([144, 16], [80, 8])
branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>
match_extractions: []
next state <POV skip> val 0 mask [False]
@@ -352,45 +363,20 @@
match_reservations: []
outputs[addr, width]: ()
match_extractions: []
-next state <Metadata bridge> val 0 mask [False]
+next state <_parse_bridged_ingress_intrinsic_metadata> val 0 mask [False]
parent state <POV initialization>_<Egress intrinsic metadata>
Full merge done <POV initialization>_<Egress intrinsic metadata> <- <POV skip>
-Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <Metadata bridge>
-merge output at offset 0
-merge output at offset 8
-merge_offset = 24, complete_merge = True
+Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <_parse_bridged_ingress_intrinsic_metadata>
+merge_offset = 0, complete_merge = True
Before Merge ------
S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>
shift: 7B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8])
+outputs[addr, width]: ([144, 16], [80, 8])
branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>
match_extractions: []
-next state <Metadata bridge> val 0 mask [False]
-parent state <Shim start state>
-
-
-S2: State : <Metadata bridge>
-shift: 3B
-match_reservations: []
-outputs[addr, width]: ([80, 8], [144, 16])
-match_extractions: []
-next state <_parse_bridged_ingress_intrinsic_metadata> val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>
-
-
-Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <Metadata bridge>
-Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge> <- <_parse_bridged_ingress_intrinsic_metadata>
-merge_offset = 0, complete_merge = True
-Before Merge ------
-S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>
-shift: 10B
-match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8], [80, 8], [144, 16])
-branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>
-match_extractions: []
next state <_parse_bridged_ingress_intrinsic_metadata> val 0 mask [False]
parent state <Shim start state>
@@ -402,19 +388,19 @@
branch promise on = ingress_port, offset = 7b, dst = default_parser
match_extractions: []
next state start val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>
-Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge> <- <_parse_bridged_ingress_intrinsic_metadata>
-Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata> <- start
+Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <_parse_bridged_ingress_intrinsic_metadata>
+Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata> <- start
merge_offset = 0, complete_merge = True
Before Merge ------
-S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>
-shift: 12B
+S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>
+shift: 9B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8], [80, 8], [144, 16])
-branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>
-branch promise on = ingress_port, offset = 87b, dst = default_parser
+outputs[addr, width]: ([144, 16], [80, 8])
+branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>
+branch promise on = ingress_port, offset = 63b, dst = default_parser
match_extractions: []
next state start val 0 mask [False]
parent state <Shim start state>
@@ -428,13 +414,12 @@
match_extractions: []
next state parse_pkt_in val 0 mask [True, True, True, True, True, True, True, True]
next state default_parser val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>
-Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata> <- start
+Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata> <- start
Remove state <Egress intrinsic metadata>
Remove state <POV skip>
-Remove state <Metadata bridge>
Remove state <_parse_bridged_ingress_intrinsic_metadata>
Remove state start
assign ids to 9 states, dir = 1
@@ -444,13 +429,13 @@
match_reservations: []
outputs[addr, width]: ()
match_extractions: []
-next state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start val 0 mask [False]
+next state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start val 0 mask [False]
------
State : parse_ethernet
shift: 14B
match_reservations: []
-outputs[addr, width]: ([82, 8], [296, 8], [266, 32], [332, 16], [297, 8], [267, 32], [333, 16])
+outputs[addr, width]: ([81, 8], [300, 8], [270, 32], [338, 16], [301, 8], [271, 32], [339, 16])
branch on = etherType, offset = 96b, dst = parse_ethernet
match_extractions: [match_window(hw_id=0, width=16)]
match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
@@ -463,7 +448,7 @@
State : parse_ipv4
shift: 20B
match_reservations: []
-outputs[addr, width]: ([82, 8], [292, 8], [293, 8], [326, 16], [327, 16], [328, 16], [260, 32], [261, 32], [262, 32])
+outputs[addr, width]: ([81, 8], [296, 8], [297, 8], [332, 16], [333, 16], [334, 16], [264, 32], [265, 32], [266, 32])
branch on = fragOffset, offset = 51b, dst = parse_ipv4
branch on = protocol, offset = 72b, dst = parse_ipv4
match_extractions: [match_window(hw_id=0, width=16), match_window(hw_id=2, width=8)]
@@ -477,7 +462,7 @@
State : parse_tcp
shift: 20B
match_reservations: []
-outputs[addr, width]: ([82, 8], [294, 8], [295, 8], [329, 16], [330, 16], [331, 16], [263, 32], [264, 32], [265, 32])
+outputs[addr, width]: ([81, 8], [298, 8], [299, 8], [335, 16], [336, 16], [337, 16], [267, 32], [268, 32], [269, 32])
match_extractions: []
parent state parse_ipv4
@@ -485,7 +470,7 @@
State : parse_udp
shift: 8B
match_reservations: []
-outputs[addr, width]: ([82, 8], [294, 8], [295, 8], [329, 16], [263, 32])
+outputs[addr, width]: ([81, 8], [298, 8], [299, 8], [336, 16], [267, 32])
match_extractions: []
parent state parse_ipv4
@@ -494,30 +479,30 @@
shift: 0B
match_reservations: [match_window(hw_id=0, width=16)]
outputs[addr, width]: ()
-branch on = ingress_port, offset = 87b, dst = default_parser
+branch on = ingress_port, offset = 63b, dst = default_parser
match_extractions: [match_window(hw_id=0, width=16)]
match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, None, None, None, None, None, None, None]
next state parse_pkt_out val 320 mask [True, True, True, True, True, True, True, True, True]
next state parse_ethernet val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
------
State : parse_pkt_out
shift: 2B
match_reservations: []
-outputs[addr, width]: ([82, 8], [334, 16])
+outputs[addr, width]: ([81, 8], [340, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
parent state default_parser
------
-State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
-shift: 12B
+State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
+shift: 9B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8], [80, 8], [144, 16])
-branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
-branch on = None, offset = 192b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
-branch promise on = ingress_port, offset = 87b, dst = default_parser
+outputs[addr, width]: ([144, 16], [80, 8])
+branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
+branch on = None, offset = 168b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
+branch promise on = ingress_port, offset = 63b, dst = default_parser
match_extractions: [match_window(hw_id=0, width=16), match_window(hw_id=2, width=8), match_window(hw_id=3, width=8)]
match key = [None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
match key = [8, 9, 10, 11, 12, 13, 14, 15]
@@ -530,8 +515,8 @@
State : parse_pkt_in
shift: 2B
match_reservations: []
-outputs[addr, width]: ([82, 8], [145, 16])
+outputs[addr, width]: ([81, 8], [340, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parser.characterize.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parser.characterize.log
index 2edd52e..31fb1b8 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parser.characterize.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/parser.characterize.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: parser.characterize.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/transform.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/transform.log
index 5930344..5287027 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/transform.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/logs/transform.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: transform.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:48:49 2017 |
+| Created on: Fri Sep 8 08:25:15 2017 |
+---------------------------------------------------------------------+
-------------------------------
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/name_lookup.c b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/name_lookup.c
index f6a37ba..c2c862d 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/name_lookup.c
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/name_lookup.c
@@ -5,7 +5,7 @@
const char * p4_table_name_lookup(int pipe, int stage, int table_index)
{
switch(stage) {
- case 3:
+ case 2:
{
switch(table_index) {
case 0:
@@ -24,22 +24,11 @@
case 0:
{
switch(table_index) {
- case 0:
- {
- return "ingress_pkt";
- }
- break;
case 1:
{
- return "egress_pkt";
+ return "process_packet_out_table";
}
break;
- }
- }
- break;
- case 1:
- {
- switch(table_index) {
case 0:
{
return "table0";
@@ -48,7 +37,7 @@
}
}
break;
- case 2:
+ case 1:
{
switch(table_index) {
case 0:
@@ -103,45 +92,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -188,16 +167,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -208,56 +177,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -276,33 +240,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -318,62 +292,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -414,45 +393,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -499,16 +468,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -519,56 +478,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -587,33 +541,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -629,62 +593,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -725,45 +694,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -810,16 +769,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -830,56 +779,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -898,33 +842,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -940,62 +894,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -1036,45 +995,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -1121,16 +1070,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -1141,56 +1080,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -1209,33 +1143,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -1251,62 +1195,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -1347,45 +1296,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -1432,16 +1371,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -1452,56 +1381,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -1520,33 +1444,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -1562,62 +1496,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -1658,45 +1597,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -1743,16 +1672,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -1763,56 +1682,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -1831,33 +1745,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -1873,62 +1797,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -1969,45 +1898,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -2054,16 +1973,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -2074,56 +1983,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -2142,33 +2046,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -2184,62 +2098,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -2280,45 +2199,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -2365,16 +2274,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -2385,56 +2284,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -2453,33 +2347,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -2495,62 +2399,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -2591,45 +2500,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -2676,16 +2575,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -2696,56 +2585,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -2764,33 +2648,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -2806,62 +2700,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -2902,45 +2801,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -2987,16 +2876,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -3007,56 +2886,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -3075,33 +2949,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -3117,62 +3001,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -3213,45 +3102,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -3298,16 +3177,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -3318,56 +3187,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -3386,33 +3250,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -3428,62 +3302,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -3524,45 +3403,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -3609,16 +3478,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -3629,56 +3488,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -3697,33 +3551,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -3739,62 +3603,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/tofino.bin b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/tofino.bin
index 5129c55..e5bbf3c 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/tofino.bin
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/tofino.bin
Binary files differ
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/deparser.html b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/deparser.html
index cfec6c3..9d8a2b7 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/deparser.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/deparser.html
@@ -102,7 +102,7 @@
<td width=50 style="border: 1px solid black" align=center>120-127</td>
</tr><tr><td width=50 align=right>PHV </td>
<td height=50 colspan=4 align=center bgcolor=#DDDDDD>0</td>
-<td height=50 colspan=1 align=center bgcolor=#DDDDDD>68</td>
+<td height=50 colspan=1 align=center bgcolor=#DDDDDD>67</td>
<td height=50 colspan=11 align=center bgcolor=#FFFFFF>----</td>
</tr></table><br />
<table border=0 style="border: 1px solid black;"><tr><td width=50 align=right>POV </td>
@@ -129,13 +129,13 @@
<tr class=fde_row_0><td height=50 width=50>0-15</td><td>----</td><td> </td><td> </td></tr>
<tr class=fde_row_0><td height=50 width=50>16</td><td>_bridged_intr_md_</td><td>PHV 0 bit 16</td><td>(phv[0] & 0x10000)</td></tr>
<tr class=fde_row_0><td height=50 width=50>17-31</td><td>----</td><td> </td><td> </td></tr>
-<tr class=fde_row_0><td height=50 width=50>32</td><td>packet_in_hdr</td><td>PHV 68 bit 0</td><td>(phv[68] & 0x1)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>33</td><td>packet_out_hdr</td><td>PHV 68 bit 1</td><td>(phv[68] & 0x2)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>34</td><td>ethernet</td><td>PHV 68 bit 2</td><td>(phv[68] & 0x4)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>35</td><td>ipv4</td><td>PHV 68 bit 3</td><td>(phv[68] & 0x8)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>36</td><td>tcp</td><td>PHV 68 bit 4</td><td>(phv[68] & 0x10)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>37</td><td>udp</td><td>PHV 68 bit 5</td><td>(phv[68] & 0x20)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>38</td><td>metadata_bridge</td><td>PHV 68 bit 6</td><td>(phv[68] & 0x40)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>32</td><td>packet_in_hdr</td><td>PHV 67 bit 0</td><td>(phv[67] & 0x1)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>33</td><td>packet_out_hdr</td><td>PHV 67 bit 1</td><td>(phv[67] & 0x2)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>34</td><td>ethernet</td><td>PHV 67 bit 2</td><td>(phv[67] & 0x4)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>35</td><td>ipv4</td><td>PHV 67 bit 3</td><td>(phv[67] & 0x8)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>36</td><td>tcp</td><td>PHV 67 bit 4</td><td>(phv[67] & 0x10)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>37</td><td>udp</td><td>PHV 67 bit 5</td><td>(phv[67] & 0x20)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>38</td><td>metadata_bridge</td><td>PHV 67 bit 6</td><td>(phv[67] & 0x40)</td></tr>
<tr class=fde_row_0><td height=50 width=50>39-254</td><td>----</td><td> </td><td> </td></tr>
</table>
</div></div><br><br>
@@ -154,15 +154,6 @@
<tr class="fde_row_1">
- <td style="border-right: 1px solid black">metadata_bridge (38)</td>
- <td>64</td>
- <td>128</td>
- <td>128</td>
- <td>-</td>
- </tr>
-
-
- <tr class="fde_row_0">
<td style="border-right: 1px solid black">_bridged_intr_md_ (16)</td>
<td>128</td>
<td>128</td>
@@ -171,7 +162,7 @@
</tr>
- <tr class="fde_row_1">
+ <tr class="fde_row_0">
<td style="border-right: 1px solid black">packet_out_hdr (33)</td>
<td>129</td>
<td>129</td>
@@ -180,7 +171,7 @@
</tr>
- <tr class="fde_row_0">
+ <tr class="fde_row_1">
<td style="border-right: 1px solid black">packet_in_hdr (32)</td>
<td>129</td>
<td>129</td>
@@ -189,35 +180,35 @@
</tr>
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">ethernet (34)</td>
+ <td>65</td>
+ <td>3</td>
+ <td>3</td>
+ <td>3</td>
+ </tr>
+
+
<tr class="fde_row_1">
<td style="border-right: 1px solid black">ethernet (34)</td>
+ <td>3</td>
+ <td>132</td>
+ <td>132</td>
<td>66</td>
- <td>3</td>
- <td>3</td>
- <td>3</td>
</tr>
<tr class="fde_row_0">
<td style="border-right: 1px solid black">ethernet (34)</td>
- <td>3</td>
- <td>132</td>
- <td>132</td>
- <td>67</td>
+ <td>4</td>
+ <td>4</td>
+ <td>4</td>
+ <td>4</td>
</tr>
<tr class="fde_row_1">
<td style="border-right: 1px solid black">ethernet (34)</td>
- <td>4</td>
- <td>4</td>
- <td>4</td>
- <td>4</td>
- </tr>
-
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">ethernet (34)</td>
<td>133</td>
<td>133</td>
<td>-</td>
@@ -225,7 +216,7 @@
</tr>
- <tr class="fde_row_1">
+ <tr class="fde_row_0">
<td style="border-right: 1px solid black">ipv4 (35)</td>
<td><font color=#333333><i>288</i></font></td>
<td><font color=#333333><i>320</i></font></td>
@@ -234,7 +225,7 @@
</tr>
- <tr class="fde_row_0">
+ <tr class="fde_row_1">
<td style="border-right: 1px solid black">ipv4 (35)</td>
<td><font color=#333333><i>321</i></font></td>
<td><font color=#333333><i>256</i></font></td>
@@ -243,7 +234,7 @@
</tr>
- <tr class="fde_row_1">
+ <tr class="fde_row_0">
<td style="border-right: 1px solid black">ipv4 (35)</td>
<td><font color=#333333><i>256</i></font></td>
<td>1</td>
@@ -252,16 +243,16 @@
</tr>
- <tr class="fde_row_0">
+ <tr class="fde_row_1">
<td style="border-right: 1px solid black">ipv4 (35)</td>
<td>1</td>
- <td>65</td>
+ <td>64</td>
<td>131</td>
<td>131</td>
</tr>
- <tr class="fde_row_1">
+ <tr class="fde_row_0">
<td style="border-right: 1px solid black">ipv4 (35)</td>
<td>2</td>
<td>2</td>
@@ -270,51 +261,6 @@
</tr>
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">tcp (36)</td>
- <td><font color=#333333><i>289</i></font></td>
- <td><font color=#333333><i>290</i></font></td>
- <td><font color=#333333><i>322</i></font></td>
- <td><font color=#333333><i>322</i></font></td>
- </tr>
-
-
- <tr class="fde_row_1">
- <td style="border-right: 1px solid black">tcp (36)</td>
- <td><font color=#333333><i>323</i></font></td>
- <td><font color=#333333><i>323</i></font></td>
- <td><font color=#333333><i>324</i></font></td>
- <td><font color=#333333><i>324</i></font></td>
- </tr>
-
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">tcp (36)</td>
- <td><font color=#333333><i>257</i></font></td>
- <td><font color=#333333><i>257</i></font></td>
- <td><font color=#333333><i>257</i></font></td>
- <td><font color=#333333><i>257</i></font></td>
- </tr>
-
-
- <tr class="fde_row_1">
- <td style="border-right: 1px solid black">tcp (36)</td>
- <td><font color=#333333><i>258</i></font></td>
- <td><font color=#333333><i>258</i></font></td>
- <td><font color=#333333><i>258</i></font></td>
- <td><font color=#333333><i>258</i></font></td>
- </tr>
-
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">tcp (36)</td>
- <td><font color=#333333><i>259</i></font></td>
- <td><font color=#333333><i>259</i></font></td>
- <td><font color=#333333><i>259</i></font></td>
- <td><font color=#333333><i>259</i></font></td>
- </tr>
-
-
<tr class="fde_row_1">
<td style="border-right: 1px solid black">udp (37)</td>
<td>5</td>
@@ -332,8 +278,53 @@
<td><font color=#333333><i>322</i></font></td>
</tr>
+
+ <tr class="fde_row_1">
+ <td style="border-right: 1px solid black">tcp (36)</td>
+ <td><font color=#333333><i>289</i></font></td>
+ <td><font color=#333333><i>290</i></font></td>
+ <td><font color=#333333><i>291</i></font></td>
+ <td><font color=#333333><i>292</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">tcp (36)</td>
+ <td><font color=#333333><i>322</i></font></td>
+ <td><font color=#333333><i>322</i></font></td>
+ <td><font color=#333333><i>323</i></font></td>
+ <td><font color=#333333><i>323</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_1">
+ <td style="border-right: 1px solid black">tcp (36)</td>
+ <td><font color=#333333><i>324</i></font></td>
+ <td><font color=#333333><i>324</i></font></td>
+ <td><font color=#333333><i>325</i></font></td>
+ <td><font color=#333333><i>325</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">tcp (36)</td>
+ <td><font color=#333333><i>257</i></font></td>
+ <td><font color=#333333><i>257</i></font></td>
+ <td><font color=#333333><i>257</i></font></td>
+ <td><font color=#333333><i>257</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_1">
+ <td style="border-right: 1px solid black">tcp (36)</td>
+ <td><font color=#333333><i>258</i></font></td>
+ <td><font color=#333333><i>258</i></font></td>
+ <td><font color=#333333><i>258</i></font></td>
+ <td><font color=#333333><i>258</i></font></td>
+ </tr>
+
</table>
-<br>21/192 entries populated<br>
+<br>20/192 entries populated<br>
</div></div><br><br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('resub_table');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#resub_table">Resubmit Table</a> <br><br><div id="resub_table" style="display: block;">
@@ -370,7 +361,7 @@
<td width=50 style="border: 1px solid black" align=center>112-119</td>
<td width=50 style="border: 1px solid black" align=center>120-127</td>
</tr><tr><td width=50 align=right>PHV </td>
-<td height=50 colspan=1 align=center bgcolor=#DDDDDD>82</td>
+<td height=50 colspan=1 align=center bgcolor=#DDDDDD>81</td>
<td height=50 colspan=15 align=center bgcolor=#FFFFFF>----</td>
</tr></table><br />
<table border=0 style="border: 1px solid black;"><tr><td width=50 align=right>POV </td>
@@ -394,12 +385,12 @@
<td height=50 colspan=16 align=center bgcolor=#FFFFFF>----</td>
</tr></table><br />
<table border=0 style="text-align: center; border: 1px solid black; border-bottom: 0px; border-spacing: 0px;"><tr><td>POV</td><td>Use</td><td>Location</td><td>Expression</td></tr>
-<tr class=fde_row_0><td height=50 width=50>0</td><td>packet_in_hdr</td><td>PHV 82 bit 0</td><td>(phv[82] & 0x1)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>1</td><td>packet_out_hdr</td><td>PHV 82 bit 1</td><td>(phv[82] & 0x2)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>2</td><td>ethernet</td><td>PHV 82 bit 2</td><td>(phv[82] & 0x4)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>3</td><td>ipv4</td><td>PHV 82 bit 3</td><td>(phv[82] & 0x8)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>4</td><td>tcp</td><td>PHV 82 bit 4</td><td>(phv[82] & 0x10)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>5</td><td>udp</td><td>PHV 82 bit 5</td><td>(phv[82] & 0x20)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>0</td><td>packet_in_hdr</td><td>PHV 81 bit 0</td><td>(phv[81] & 0x1)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>1</td><td>packet_out_hdr</td><td>PHV 81 bit 1</td><td>(phv[81] & 0x2)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>2</td><td>ethernet</td><td>PHV 81 bit 2</td><td>(phv[81] & 0x4)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>3</td><td>ipv4</td><td>PHV 81 bit 3</td><td>(phv[81] & 0x8)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>4</td><td>tcp</td><td>PHV 81 bit 4</td><td>(phv[81] & 0x10)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>5</td><td>udp</td><td>PHV 81 bit 5</td><td>(phv[81] & 0x20)</td></tr>
<tr class=fde_row_0><td height=50 width=50>6-254</td><td>----</td><td> </td><td> </td></tr>
</table>
</div></div><br><br>
@@ -410,8 +401,8 @@
<tr class="fde_row_0">
<td style="border-right: 1px solid black">packet_out_hdr (1)</td>
- <td><font color=#333333><i>334</i></font></td>
- <td><font color=#333333><i>334</i></font></td>
+ <td><font color=#333333><i>340</i></font></td>
+ <td><font color=#333333><i>340</i></font></td>
<td>-</td>
<td>-</td>
</tr>
@@ -419,8 +410,8 @@
<tr class="fde_row_1">
<td style="border-right: 1px solid black">packet_in_hdr (0)</td>
- <td>145</td>
- <td>145</td>
+ <td><font color=#333333><i>340</i></font></td>
+ <td><font color=#333333><i>340</i></font></td>
<td>-</td>
<td>-</td>
</tr>
@@ -428,114 +419,60 @@
<tr class="fde_row_0">
<td style="border-right: 1px solid black">ethernet (2)</td>
+ <td><font color=#333333><i>300</i></font></td>
+ <td><font color=#333333><i>270</i></font></td>
+ <td><font color=#333333><i>270</i></font></td>
+ <td><font color=#333333><i>270</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_1">
+ <td style="border-right: 1px solid black">ethernet (2)</td>
+ <td><font color=#333333><i>270</i></font></td>
+ <td><font color=#333333><i>338</i></font></td>
+ <td><font color=#333333><i>338</i></font></td>
+ <td><font color=#333333><i>301</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">ethernet (2)</td>
+ <td><font color=#333333><i>271</i></font></td>
+ <td><font color=#333333><i>271</i></font></td>
+ <td><font color=#333333><i>271</i></font></td>
+ <td><font color=#333333><i>271</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_1">
+ <td style="border-right: 1px solid black">ethernet (2)</td>
+ <td><font color=#333333><i>339</i></font></td>
+ <td><font color=#333333><i>339</i></font></td>
+ <td>-</td>
+ <td>-</td>
+ </tr>
+
+
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">ipv4 (3)</td>
<td><font color=#333333><i>296</i></font></td>
- <td><font color=#333333><i>266</i></font></td>
- <td><font color=#333333><i>266</i></font></td>
- <td><font color=#333333><i>266</i></font></td>
- </tr>
-
-
- <tr class="fde_row_1">
- <td style="border-right: 1px solid black">ethernet (2)</td>
- <td><font color=#333333><i>266</i></font></td>
- <td><font color=#333333><i>332</i></font></td>
- <td><font color=#333333><i>332</i></font></td>
<td><font color=#333333><i>297</i></font></td>
- </tr>
-
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">ethernet (2)</td>
- <td><font color=#333333><i>267</i></font></td>
- <td><font color=#333333><i>267</i></font></td>
- <td><font color=#333333><i>267</i></font></td>
- <td><font color=#333333><i>267</i></font></td>
+ <td><font color=#333333><i>332</i></font></td>
+ <td><font color=#333333><i>332</i></font></td>
</tr>
<tr class="fde_row_1">
- <td style="border-right: 1px solid black">ethernet (2)</td>
+ <td style="border-right: 1px solid black">ipv4 (3)</td>
<td><font color=#333333><i>333</i></font></td>
<td><font color=#333333><i>333</i></font></td>
- <td>-</td>
- <td>-</td>
+ <td><font color=#333333><i>334</i></font></td>
+ <td><font color=#333333><i>334</i></font></td>
</tr>
<tr class="fde_row_0">
<td style="border-right: 1px solid black">ipv4 (3)</td>
- <td><font color=#333333><i>292</i></font></td>
- <td><font color=#333333><i>293</i></font></td>
- <td><font color=#333333><i>326</i></font></td>
- <td><font color=#333333><i>326</i></font></td>
- </tr>
-
-
- <tr class="fde_row_1">
- <td style="border-right: 1px solid black">ipv4 (3)</td>
- <td><font color=#333333><i>327</i></font></td>
- <td><font color=#333333><i>327</i></font></td>
- <td><font color=#333333><i>328</i></font></td>
- <td><font color=#333333><i>328</i></font></td>
- </tr>
-
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">ipv4 (3)</td>
- <td><font color=#333333><i>260</i></font></td>
- <td><font color=#333333><i>260</i></font></td>
- <td><font color=#333333><i>260</i></font></td>
- <td><font color=#333333><i>260</i></font></td>
- </tr>
-
-
- <tr class="fde_row_1">
- <td style="border-right: 1px solid black">ipv4 (3)</td>
- <td><font color=#333333><i>261</i></font></td>
- <td><font color=#333333><i>261</i></font></td>
- <td><font color=#333333><i>261</i></font></td>
- <td><font color=#333333><i>261</i></font></td>
- </tr>
-
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">ipv4 (3)</td>
- <td><font color=#333333><i>262</i></font></td>
- <td><font color=#333333><i>262</i></font></td>
- <td><font color=#333333><i>262</i></font></td>
- <td><font color=#333333><i>262</i></font></td>
- </tr>
-
-
- <tr class="fde_row_1">
- <td style="border-right: 1px solid black">tcp (4)</td>
- <td><font color=#333333><i>294</i></font></td>
- <td><font color=#333333><i>295</i></font></td>
- <td><font color=#333333><i>329</i></font></td>
- <td><font color=#333333><i>329</i></font></td>
- </tr>
-
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">tcp (4)</td>
- <td><font color=#333333><i>330</i></font></td>
- <td><font color=#333333><i>330</i></font></td>
- <td><font color=#333333><i>331</i></font></td>
- <td><font color=#333333><i>331</i></font></td>
- </tr>
-
-
- <tr class="fde_row_1">
- <td style="border-right: 1px solid black">tcp (4)</td>
- <td><font color=#333333><i>263</i></font></td>
- <td><font color=#333333><i>263</i></font></td>
- <td><font color=#333333><i>263</i></font></td>
- <td><font color=#333333><i>263</i></font></td>
- </tr>
-
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">tcp (4)</td>
<td><font color=#333333><i>264</i></font></td>
<td><font color=#333333><i>264</i></font></td>
<td><font color=#333333><i>264</i></font></td>
@@ -544,7 +481,7 @@
<tr class="fde_row_1">
- <td style="border-right: 1px solid black">tcp (4)</td>
+ <td style="border-right: 1px solid black">ipv4 (3)</td>
<td><font color=#333333><i>265</i></font></td>
<td><font color=#333333><i>265</i></font></td>
<td><font color=#333333><i>265</i></font></td>
@@ -553,20 +490,74 @@
<tr class="fde_row_0">
- <td style="border-right: 1px solid black">udp (5)</td>
- <td><font color=#333333><i>294</i></font></td>
- <td><font color=#333333><i>295</i></font></td>
- <td><font color=#333333><i>329</i></font></td>
- <td><font color=#333333><i>329</i></font></td>
+ <td style="border-right: 1px solid black">ipv4 (3)</td>
+ <td><font color=#333333><i>266</i></font></td>
+ <td><font color=#333333><i>266</i></font></td>
+ <td><font color=#333333><i>266</i></font></td>
+ <td><font color=#333333><i>266</i></font></td>
</tr>
<tr class="fde_row_1">
<td style="border-right: 1px solid black">udp (5)</td>
- <td><font color=#333333><i>263</i></font></td>
- <td><font color=#333333><i>263</i></font></td>
- <td><font color=#333333><i>263</i></font></td>
- <td><font color=#333333><i>263</i></font></td>
+ <td><font color=#333333><i>298</i></font></td>
+ <td><font color=#333333><i>299</i></font></td>
+ <td><font color=#333333><i>336</i></font></td>
+ <td><font color=#333333><i>336</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">udp (5)</td>
+ <td><font color=#333333><i>267</i></font></td>
+ <td><font color=#333333><i>267</i></font></td>
+ <td><font color=#333333><i>267</i></font></td>
+ <td><font color=#333333><i>267</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_1">
+ <td style="border-right: 1px solid black">tcp (4)</td>
+ <td><font color=#333333><i>298</i></font></td>
+ <td><font color=#333333><i>299</i></font></td>
+ <td><font color=#333333><i>335</i></font></td>
+ <td><font color=#333333><i>335</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">tcp (4)</td>
+ <td><font color=#333333><i>336</i></font></td>
+ <td><font color=#333333><i>336</i></font></td>
+ <td><font color=#333333><i>337</i></font></td>
+ <td><font color=#333333><i>337</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_1">
+ <td style="border-right: 1px solid black">tcp (4)</td>
+ <td><font color=#333333><i>267</i></font></td>
+ <td><font color=#333333><i>267</i></font></td>
+ <td><font color=#333333><i>267</i></font></td>
+ <td><font color=#333333><i>267</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">tcp (4)</td>
+ <td><font color=#333333><i>268</i></font></td>
+ <td><font color=#333333><i>268</i></font></td>
+ <td><font color=#333333><i>268</i></font></td>
+ <td><font color=#333333><i>268</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_1">
+ <td style="border-right: 1px solid black">tcp (4)</td>
+ <td><font color=#333333><i>269</i></font></td>
+ <td><font color=#333333><i>269</i></font></td>
+ <td><font color=#333333><i>269</i></font></td>
+ <td><font color=#333333><i>269</i></font></td>
</tr>
</table>
@@ -578,7 +569,7 @@
</div></div><br><br>
</td></tr>
</table>
-<br><i>Created on Thu Sep 7 14:49:10 2017</i>
+<br><i>Created on Fri Sep 8 08:25:36 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/mau.html b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/mau.html
index 4dc6471..3a7379c 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/mau.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/mau.html
@@ -4,7 +4,7 @@
<div id="content" style="width: 100%; height: 100%">
<h1>Pipeline 0 -- ecmp</h1>
-<h3>Stages Occupied: 4</h3>
+<h3>Stages Occupied: 3</h3>
<h3>Resource Usage Summary</h3>
<table border="1">
<tr>
@@ -29,31 +29,11 @@
</tr>
<tr>
<td align="center">0</td>
-<td align="center">2</td>
-<td align="center">0</td>
-<td align="center">2</td>
-<td align="center">0</td>
-<td align="center">2</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">1</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">2</td>
-</tr>
-<tr>
-<td align="center">1</td>
<td align="center">13</td>
<td align="center">16</td>
<td align="center">2</td>
<td align="center">1</td>
-<td align="center">1</td>
+<td align="center">2</td>
<td align="center">4</td>
<td align="center">3</td>
<td align="center">3</td>
@@ -65,10 +45,10 @@
<td align="center">0</td>
<td align="center">4</td>
<td align="center">2</td>
-<td align="center">1</td>
+<td align="center">2</td>
</tr>
<tr>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">4</td>
<td align="center">0</td>
<td align="center">30</td>
@@ -88,7 +68,7 @@
<td align="center">1</td>
</tr>
<tr>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">2</td>
<td align="center">0</td>
<td align="center">9</td>
@@ -108,6 +88,26 @@
<td align="center">2</td>
</tr>
<tr>
+<td align="center">3</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+</tr>
+<tr>
<td align="center">4</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -289,15 +289,15 @@
</tr>
<tr>
<td align="center">Totals</td>
-<td align="center">21</td>
+<td align="center">19</td>
<td align="center">16</td>
-<td align="center">43</td>
+<td align="center">41</td>
<td align="center">1</td>
-<td align="center">5</td>
+<td align="center">4</td>
<td align="center">13</td>
<td align="center">9</td>
<td align="center">3</td>
-<td align="center">6</td>
+<td align="center">5</td>
<td align="center">0</td>
<td align="center">4</td>
<td align="center">0</td>
@@ -305,7 +305,7 @@
<td align="center">0</td>
<td align="center">6</td>
<td align="center">3</td>
-<td align="center">6</td>
+<td align="center">5</td>
</tr>
</table>
<h3>Resource Percentage Summary</h3>
@@ -332,31 +332,11 @@
</tr>
<tr>
<td align="center">0</td>
-<td align="center" bgcolor="#07fe00" >1.56%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#02fe00" >0.48%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#3ffe00" >12.50%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#0ffe00" >3.12%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#3ffe00" >12.50%</td>
-</tr>
-<tr>
-<td align="center">1</td>
<td align="center" bgcolor="#33fe00" >10.16%</td>
<td align="center" bgcolor="#7bfe00" >24.24%</td>
<td align="center" bgcolor="#02fe00" >0.48%</td>
<td align="center" bgcolor="#55fe00" >16.67%</td>
-<td align="center" bgcolor="#1ffe00" >6.25%</td>
+<td align="center" bgcolor="#3ffe00" >12.50%</td>
<td align="center" bgcolor="#19fe00" >5.00%</td>
<td align="center" bgcolor="#1ffe00" >6.25%</td>
<td align="center" bgcolor="#3ffe00" >12.50%</td>
@@ -368,10 +348,10 @@
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#3ffe00" >12.50%</td>
<td align="center" bgcolor="#1ffe00" >6.25%</td>
-<td align="center" bgcolor="#1ffe00" >6.25%</td>
+<td align="center" bgcolor="#3ffe00" >12.50%</td>
</tr>
<tr>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center" bgcolor="#0ffe00" >3.12%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#24fe00" >7.21%</td>
@@ -391,7 +371,7 @@
<td align="center" bgcolor="#1ffe00" >6.25%</td>
</tr>
<tr>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center" bgcolor="#07fe00" >1.56%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#0bfe00" >2.16%</td>
@@ -411,6 +391,26 @@
<td align="center" bgcolor="#3ffe00" >12.50%</td>
</tr>
<tr>
+<td align="center">3</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+</tr>
+<tr>
<td align="center">4</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
@@ -592,15 +592,15 @@
</tr>
<tr>
<td align="center">Average</td>
-<td align="center" bgcolor="#06fe00" >1.37%</td>
+<td align="center" bgcolor="#06fe00" >1.24%</td>
<td align="center" bgcolor="#0afe00" >2.02%</td>
-<td align="center" bgcolor="#04fe00" >0.86%</td>
+<td align="center" bgcolor="#04fe00" >0.82%</td>
<td align="center" bgcolor="#07fe00" >1.39%</td>
-<td align="center" bgcolor="#0dfe00" >2.60%</td>
+<td align="center" bgcolor="#0afe00" >2.08%</td>
<td align="center" bgcolor="#06fe00" >1.35%</td>
<td align="center" bgcolor="#07fe00" >1.56%</td>
<td align="center" bgcolor="#05fe00" >1.04%</td>
-<td align="center" bgcolor="#07fe00" >1.56%</td>
+<td align="center" bgcolor="#06fe00" >1.30%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#2afe00" >8.33%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
@@ -608,7 +608,7 @@
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#07fe00" >1.56%</td>
<td align="center" bgcolor="#03fe00" >0.78%</td>
-<td align="center" bgcolor="#0ffe00" >3.12%</td>
+<td align="center" bgcolor="#0dfe00" >2.60%</td>
</tr>
</table>
<h2>Phase 0 is not in use.</h2>
@@ -618,2680 +618,55 @@
<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
<rect x="16" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 0 in exact Group 0 (parity group 0)
contains:
- {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]} for table _condition_3
-</title></rect>
-<rect x="16" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 1 in exact Group 0 (parity group 0)
-contains:
- {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]} for table _condition_0
-</title></rect>
-<rect x="16" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 2 in exact Group 0 (parity group 0)</title></rect>
-<rect x="16" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 3 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 4 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 5 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 6 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 7 in exact Group 0 (parity group 0)</title></rect>
-<rect x="40" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 8 in exact Group 0 (parity group 1)</title></rect>
-<rect x="40" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 9 in exact Group 0 (parity group 1)</title></rect>
-<rect x="40" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 10 in exact Group 0 (parity group 1)</title></rect>
-<rect x="40" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 11 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 12 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 13 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 14 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 15 in exact Group 0 (parity group 1)</title></rect>
-<rect x="16" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 16 in exact Group 1 (parity group 2)</title></rect>
-<rect x="16" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 17 in exact Group 1 (parity group 2)</title></rect>
-<rect x="16" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 18 in exact Group 1 (parity group 2)</title></rect>
-<rect x="16" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 19 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 20 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 21 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 22 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 23 in exact Group 1 (parity group 2)</title></rect>
-<rect x="40" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 24 in exact Group 1 (parity group 3)</title></rect>
-<rect x="40" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 25 in exact Group 1 (parity group 3)</title></rect>
-<rect x="40" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 26 in exact Group 1 (parity group 3)</title></rect>
-<rect x="40" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 27 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 28 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 29 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 30 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 31 in exact Group 1 (parity group 3)</title></rect>
-<rect x="16" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 32 in exact Group 2 (parity group 4)</title></rect>
-<rect x="16" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 33 in exact Group 2 (parity group 4)</title></rect>
-<rect x="16" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 34 in exact Group 2 (parity group 4)</title></rect>
-<rect x="16" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 35 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 36 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 37 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 38 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 39 in exact Group 2 (parity group 4)</title></rect>
-<rect x="40" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 40 in exact Group 2 (parity group 5)</title></rect>
-<rect x="40" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 41 in exact Group 2 (parity group 5)</title></rect>
-<rect x="40" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 42 in exact Group 2 (parity group 5)</title></rect>
-<rect x="40" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 43 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 44 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 45 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 46 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 47 in exact Group 2 (parity group 5)</title></rect>
-<rect x="16" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 48 in exact Group 3 (parity group 6)</title></rect>
-<rect x="16" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 49 in exact Group 3 (parity group 6)</title></rect>
-<rect x="16" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 50 in exact Group 3 (parity group 6)</title></rect>
-<rect x="16" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 51 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 52 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 53 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 54 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 55 in exact Group 3 (parity group 6)</title></rect>
-<rect x="40" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 56 in exact Group 3 (parity group 7)</title></rect>
-<rect x="40" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 57 in exact Group 3 (parity group 7)</title></rect>
-<rect x="40" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 58 in exact Group 3 (parity group 7)</title></rect>
-<rect x="40" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 59 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 60 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 61 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 62 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 63 in exact Group 3 (parity group 7)</title></rect>
-<rect x="16" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 64 in exact Group 4 (parity group 8)</title></rect>
-<rect x="16" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 65 in exact Group 4 (parity group 8)</title></rect>
-<rect x="16" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 66 in exact Group 4 (parity group 8)</title></rect>
-<rect x="16" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 67 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 68 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 69 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 70 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 71 in exact Group 4 (parity group 8)</title></rect>
-<rect x="40" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 72 in exact Group 4 (parity group 9)</title></rect>
-<rect x="40" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 73 in exact Group 4 (parity group 9)</title></rect>
-<rect x="40" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 74 in exact Group 4 (parity group 9)</title></rect>
-<rect x="40" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 75 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 76 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 77 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 78 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 79 in exact Group 4 (parity group 9)</title></rect>
-<rect x="16" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 80 in exact Group 5 (parity group 10)</title></rect>
-<rect x="16" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 81 in exact Group 5 (parity group 10)</title></rect>
-<rect x="16" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 82 in exact Group 5 (parity group 10)</title></rect>
-<rect x="16" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 83 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 84 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 85 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 86 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 87 in exact Group 5 (parity group 10)</title></rect>
-<rect x="40" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 88 in exact Group 5 (parity group 11)</title></rect>
-<rect x="40" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 89 in exact Group 5 (parity group 11)</title></rect>
-<rect x="40" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 90 in exact Group 5 (parity group 11)</title></rect>
-<rect x="40" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 91 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 92 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 93 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 94 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 95 in exact Group 5 (parity group 11)</title></rect>
-<rect x="16" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 96 in exact Group 6 (parity group 12)</title></rect>
-<rect x="16" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 97 in exact Group 6 (parity group 12)</title></rect>
-<rect x="16" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 98 in exact Group 6 (parity group 12)</title></rect>
-<rect x="16" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 99 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 100 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 101 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 102 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 103 in exact Group 6 (parity group 12)</title></rect>
-<rect x="40" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 104 in exact Group 6 (parity group 13)</title></rect>
-<rect x="40" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 105 in exact Group 6 (parity group 13)</title></rect>
-<rect x="40" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 106 in exact Group 6 (parity group 13)</title></rect>
-<rect x="40" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 107 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 108 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 109 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 110 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 111 in exact Group 6 (parity group 13)</title></rect>
-<rect x="16" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 112 in exact Group 7 (parity group 14)</title></rect>
-<rect x="16" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 113 in exact Group 7 (parity group 14)</title></rect>
-<rect x="16" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 114 in exact Group 7 (parity group 14)</title></rect>
-<rect x="16" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 115 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 116 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 117 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 118 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 119 in exact Group 7 (parity group 14)</title></rect>
-<rect x="40" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 120 in exact Group 7 (parity group 15)</title></rect>
-<rect x="40" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 121 in exact Group 7 (parity group 15)</title></rect>
-<rect x="40" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 122 in exact Group 7 (parity group 15)</title></rect>
-<rect x="40" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 123 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 124 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 125 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 126 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 127 in exact Group 7 (parity group 15)</title></rect>
-<rect x="16" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 128 in ternary Group 0</title></rect>
-<rect x="16" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 129 in ternary Group 0</title></rect>
-<rect x="24" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 130 in ternary Group 0</title></rect>
-<rect x="24" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 131 in ternary Group 0</title></rect>
-<rect x="32" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 132 in ternary Group 0</title></rect>
-<rect x="48" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 133 in ternary Group 0</title></rect>
-<rect x="16" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 134 in ternary Group 1</title></rect>
-<rect x="16" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 135 in ternary Group 1</title></rect>
-<rect x="24" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 136 in ternary Group 1</title></rect>
-<rect x="24" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 137 in ternary Group 1</title></rect>
-<rect x="32" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 138 in ternary Group 1</title></rect>
-<rect x="16" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 139 in ternary Group 2</title></rect>
-<rect x="16" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 140 in ternary Group 2</title></rect>
-<rect x="24" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 141 in ternary Group 2</title></rect>
-<rect x="24" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 142 in ternary Group 2</title></rect>
-<rect x="32" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 143 in ternary Group 2</title></rect>
-<rect x="48" y="432" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 144 in ternary Group 1</title></rect>
-<rect x="16" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 145 in ternary Group 3</title></rect>
-<rect x="16" y="448" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 146 in ternary Group 3</title></rect>
-<rect x="24" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 147 in ternary Group 3</title></rect>
-<rect x="24" y="448" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 148 in ternary Group 3</title></rect>
-<rect x="32" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 149 in ternary Group 3</title></rect>
-<rect x="16" y="464" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 150 in ternary Group 4</title></rect>
-<rect x="16" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 151 in ternary Group 4</title></rect>
-<rect x="24" y="464" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 152 in ternary Group 4</title></rect>
-<rect x="24" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 153 in ternary Group 4</title></rect>
-<rect x="32" y="464" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 154 in ternary Group 4</title></rect>
-<rect x="48" y="480" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 155 in ternary Group 2</title></rect>
-<rect x="16" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 156 in ternary Group 5</title></rect>
-<rect x="16" y="496" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 157 in ternary Group 5</title></rect>
-<rect x="24" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 158 in ternary Group 5</title></rect>
-<rect x="24" y="496" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 159 in ternary Group 5</title></rect>
-<rect x="32" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 160 in ternary Group 5</title></rect>
-<rect x="16" y="512" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 161 in ternary Group 6</title></rect>
-<rect x="16" y="520" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 162 in ternary Group 6</title></rect>
-<rect x="24" y="512" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 163 in ternary Group 6</title></rect>
-<rect x="24" y="520" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 164 in ternary Group 6</title></rect>
-<rect x="32" y="512" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 165 in ternary Group 6</title></rect>
-<rect x="48" y="528" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 166 in ternary Group 3</title></rect>
-<rect x="16" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 167 in ternary Group 7</title></rect>
-<rect x="16" y="544" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 168 in ternary Group 7</title></rect>
-<rect x="24" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 169 in ternary Group 7</title></rect>
-<rect x="24" y="544" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 170 in ternary Group 7</title></rect>
-<rect x="32" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 171 in ternary Group 7</title></rect>
-<rect x="16" y="560" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 172 in ternary Group 8</title></rect>
-<rect x="16" y="568" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 173 in ternary Group 8</title></rect>
-<rect x="24" y="560" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 174 in ternary Group 8</title></rect>
-<rect x="24" y="568" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 175 in ternary Group 8</title></rect>
-<rect x="32" y="560" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 176 in ternary Group 8</title></rect>
-<rect x="48" y="576" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 177 in ternary Group 4</title></rect>
-<rect x="16" y="584" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 178 in ternary Group 9</title></rect>
-<rect x="16" y="592" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 179 in ternary Group 9</title></rect>
-<rect x="24" y="584" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 180 in ternary Group 9</title></rect>
-<rect x="24" y="592" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 181 in ternary Group 9</title></rect>
-<rect x="32" y="584" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 182 in ternary Group 9</title></rect>
-<rect x="16" y="608" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 183 in ternary Group 10</title></rect>
-<rect x="16" y="616" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 184 in ternary Group 10</title></rect>
-<rect x="24" y="608" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 185 in ternary Group 10</title></rect>
-<rect x="24" y="616" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 186 in ternary Group 10</title></rect>
-<rect x="32" y="608" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 187 in ternary Group 10</title></rect>
-<rect x="48" y="624" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 188 in ternary Group 5</title></rect>
-<rect x="16" y="632" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 189 in ternary Group 11</title></rect>
-<rect x="16" y="640" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 190 in ternary Group 11</title></rect>
-<rect x="24" y="632" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 191 in ternary Group 11</title></rect>
-<rect x="24" y="640" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 192 in ternary Group 11</title></rect>
-<rect x="32" y="632" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 193 in ternary Group 11</title></rect>
-<text x="146" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="14" heightAdjust="spacingAndGlyphs" style="fill:black;">SRAMs</text>
-<text x="410" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="14" heightAdjust="spacingAndGlyphs" style="fill:black;">SRAMs</text>
-<rect x="144" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 0 Col: 2
- Unit Number: 2
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="144" y="176" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 1 Col: 2
- Unit Number: 14
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="144" y="152" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 2 Col: 2
- Unit Number: 26
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="144" y="128" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 3 Col: 2
- Unit Number: 38
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="144" y="104" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 4 Col: 2
- Unit Number: 50
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="144" y="80" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 5 Col: 2
- Unit Number: 62
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="144" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 6 Col: 2
- Unit Number: 74
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="144" y="32" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 7 Col: 2
- Unit Number: 86
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="168" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 0 Col: 3
- Unit Number: 3
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="168" y="176" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 1 Col: 3
- Unit Number: 15
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="168" y="152" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 2 Col: 3
- Unit Number: 27
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="168" y="128" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 3 Col: 3
- Unit Number: 39
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="168" y="104" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 4 Col: 3
- Unit Number: 51
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="168" y="80" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 5 Col: 3
- Unit Number: 63
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="168" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 6 Col: 3
- Unit Number: 75
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="168" y="32" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 7 Col: 3
- Unit Number: 87
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="192" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 0 Col: 4
- Unit Number: 4
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="192" y="176" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 1 Col: 4
- Unit Number: 16
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="192" y="152" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 2 Col: 4
- Unit Number: 28
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="192" y="128" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 3 Col: 4
- Unit Number: 40
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="192" y="104" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 4 Col: 4
- Unit Number: 52
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="192" y="80" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 5 Col: 4
- Unit Number: 64
- Entry Bit Width: 128
- Depth: 1024</title></rect>
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- Row: 6 Col: 4
- Unit Number: 76
- Entry Bit Width: 128
- Depth: 1024</title></rect>
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- Row: 7 Col: 4
- Unit Number: 88
- Entry Bit Width: 128
- Depth: 1024</title></rect>
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- Row: 0 Col: 5
- Unit Number: 5
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="216" y="176" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 1 Col: 5
- Unit Number: 17
- Entry Bit Width: 128
- Depth: 1024</title></rect>
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- Row: 2 Col: 5
- Unit Number: 29
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="216" y="128" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 3 Col: 5
- Unit Number: 41
- Entry Bit Width: 128
- Depth: 1024</title></rect>
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- Row: 4 Col: 5
- Unit Number: 53
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="216" y="80" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 5 Col: 5
- Unit Number: 65
- Entry Bit Width: 128
- Depth: 1024</title></rect>
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- Row: 6 Col: 5
- Unit Number: 77
- Entry Bit Width: 128
- Depth: 1024</title></rect>
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- Row: 7 Col: 5
- Unit Number: 89
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="360" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 0 Col: 6
- Unit Number: 6
- Entry Bit Width: 128
- Depth: 1024</title></rect>
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- Row: 1 Col: 6
- Unit Number: 18
- Entry Bit Width: 128
- Depth: 1024</title></rect>
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- Row: 2 Col: 6
- Unit Number: 30
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="360" y="128" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 3 Col: 6
- Unit Number: 42
- Entry Bit Width: 128
- Depth: 1024</title></rect>
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- Row: 4 Col: 6
- Unit Number: 54
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="360" y="80" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 5 Col: 6
- Unit Number: 66
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="360" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 6 Col: 6
- Unit Number: 78
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="360" y="32" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 7 Col: 6
- Unit Number: 90
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="384" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 0 Col: 7
- Unit Number: 7
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="384" y="176" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 1 Col: 7
- Unit Number: 19
- Entry Bit Width: 128
- Depth: 1024</title></rect>
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- Row: 2 Col: 7
- Unit Number: 31
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="384" y="128" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 3 Col: 7
- Unit Number: 43
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="384" y="104" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 4 Col: 7
- Unit Number: 55
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="384" y="80" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 5 Col: 7
- Unit Number: 67
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="384" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 6 Col: 7
- Unit Number: 79
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="384" y="32" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 7 Col: 7
- Unit Number: 91
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="408" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 0 Col: 8
- Unit Number: 8
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="408" y="176" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 1 Col: 8
- Unit Number: 20
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="408" y="152" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 2 Col: 8
- Unit Number: 32
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="408" y="128" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 3 Col: 8
- Unit Number: 44
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="408" y="104" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 4 Col: 8
- Unit Number: 56
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="408" y="80" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 5 Col: 8
- Unit Number: 68
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="408" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 6 Col: 8
- Unit Number: 80
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="408" y="32" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 7 Col: 8
- Unit Number: 92
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="432" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 0 Col: 9
- Unit Number: 9
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="432" y="176" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 1 Col: 9
- Unit Number: 21
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="432" y="152" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 2 Col: 9
- Unit Number: 33
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="432" y="128" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 3 Col: 9
- Unit Number: 45
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="432" y="104" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 4 Col: 9
- Unit Number: 57
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="432" y="80" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 5 Col: 9
- Unit Number: 69
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="432" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 6 Col: 9
- Unit Number: 81
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="432" y="32" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 7 Col: 9
- Unit Number: 93
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="456" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 0 Col: 10
- Unit Number: 10
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="456" y="176" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 1 Col: 10
- Unit Number: 22
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="456" y="152" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 2 Col: 10
- Unit Number: 34
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="456" y="128" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 3 Col: 10
- Unit Number: 46
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="456" y="104" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 4 Col: 10
- Unit Number: 58
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="456" y="80" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 5 Col: 10
- Unit Number: 70
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="456" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 6 Col: 10
- Unit Number: 82
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="456" y="32" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 7 Col: 10
- Unit Number: 94
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 0 Col: 11
- Unit Number: 11
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="176" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 1 Col: 11
- Unit Number: 23
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="152" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 2 Col: 11
- Unit Number: 35
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="128" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 3 Col: 11
- Unit Number: 47
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="104" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 4 Col: 11
- Unit Number: 59
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="80" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 5 Col: 11
- Unit Number: 71
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 6 Col: 11
- Unit Number: 83
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<rect x="480" y="32" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
- Row: 7 Col: 11
- Unit Number: 95
- Entry Bit Width: 128
- Depth: 1024</title></rect>
-<text x="98" y="342" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="14" heightAdjust="spacingAndGlyphs" style="fill:black;">TCAMs</text>
-<rect x="96" y="616" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 0 Col: 0
- Unit Number: 0
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="592" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 1 Col: 0
- Unit Number: 1
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="568" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 2 Col: 0
- Unit Number: 2
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="544" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 3 Col: 0
- Unit Number: 3
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="520" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 4 Col: 0
- Unit Number: 4
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="496" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 5 Col: 0
- Unit Number: 5
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="472" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 6 Col: 0
- Unit Number: 6
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="448" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 7 Col: 0
- Unit Number: 7
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="424" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 8 Col: 0
- Unit Number: 8
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 9 Col: 0
- Unit Number: 9
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 10 Col: 0
- Unit Number: 10
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 11 Col: 0
- Unit Number: 11
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="616" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 0 Col: 1
- Unit Number: 12
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="592" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 1 Col: 1
- Unit Number: 13
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="568" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 2 Col: 1
- Unit Number: 14
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="544" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 3 Col: 1
- Unit Number: 15
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="520" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 4 Col: 1
- Unit Number: 16
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="496" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 5 Col: 1
- Unit Number: 17
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="472" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 6 Col: 1
- Unit Number: 18
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="448" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 7 Col: 1
- Unit Number: 19
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="424" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 8 Col: 1
- Unit Number: 20
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 9 Col: 1
- Unit Number: 21
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 10 Col: 1
- Unit Number: 22
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 11 Col: 1
- Unit Number: 23
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<text x="82" y="254" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Distr.</text>
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- Hash ID: 0
- Group ID: 0
-</title></rect>
-<rect x="88" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 0
- Group ID: 1
-</title></rect>
-<rect x="96" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 0
- Group ID: 2
-</title></rect>
-<rect x="104" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 1
- Group ID: 0
-</title></rect>
-<rect x="112" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 1
- Group ID: 1
-</title></rect>
-<rect x="120" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 1
- Group ID: 2
-</title></rect>
-<text x="170" y="238" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Bits</text>
-<rect x="176" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 0</title></rect>
-<rect x="184" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 0</title></rect>
-<rect x="192" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 0</title></rect>
-<rect x="200" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 0</title></rect>
-<rect x="208" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 0</title></rect>
-<rect x="216" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 0</title></rect>
-<rect x="224" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 0</title></rect>
-<rect x="232" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 0</title></rect>
-<rect x="240" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 0</title></rect>
-<rect x="248" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 0</title></rect>
-<rect x="256" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 0</title></rect>
-<rect x="264" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 0</title></rect>
-<rect x="272" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 0</title></rect>
-<rect x="176" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 0</title></rect>
-<rect x="184" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 0</title></rect>
-<rect x="192" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 0</title></rect>
-<rect x="200" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 0</title></rect>
-<rect x="208" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 0</title></rect>
-<rect x="216" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 0</title></rect>
-<rect x="224" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 0</title></rect>
-<rect x="232" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 0</title></rect>
-<rect x="240" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 0</title></rect>
-<rect x="248" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 0</title></rect>
-<rect x="256" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 0</title></rect>
-<rect x="264" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 0</title></rect>
-<rect x="272" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 0</title></rect>
-<rect x="176" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 0</title></rect>
-<rect x="184" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 0</title></rect>
-<rect x="192" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 0</title></rect>
-<rect x="200" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 0</title></rect>
-<rect x="208" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 0</title></rect>
-<rect x="216" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 0</title></rect>
-<rect x="224" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 0</title></rect>
-<rect x="232" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 0</title></rect>
-<rect x="240" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 0</title></rect>
-<rect x="248" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 0</title></rect>
-<rect x="256" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 0</title></rect>
-<rect x="264" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 0</title></rect>
-<rect x="272" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 0</title></rect>
-<rect x="176" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 0</title></rect>
-<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Hash Bit 40 in hash match group 0
-Occupied by: _condition_3 for ('ig_intr_md_for_tm.copy_to_cpu', 0)</title></rect>
-<rect x="192" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Hash Bit 41 in hash match group 0
-Occupied by: _condition_0 for ('--validity_check--packet_out_hdr', 0)</title></rect>
-<rect x="200" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 0</title></rect>
-<rect x="208" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 0</title></rect>
-<rect x="216" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 0</title></rect>
-<rect x="224" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 0</title></rect>
-<rect x="232" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 0</title></rect>
-<rect x="240" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 0</title></rect>
-<rect x="248" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 0</title></rect>
-<rect x="256" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 0</title></rect>
-<rect x="264" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 0</title></rect>
-<rect x="272" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 0</title></rect>
-<rect x="296" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 1</title></rect>
-<rect x="304" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 1</title></rect>
-<rect x="312" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 1</title></rect>
-<rect x="320" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 1</title></rect>
-<rect x="328" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 1</title></rect>
-<rect x="336" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 1</title></rect>
-<rect x="344" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 1</title></rect>
-<rect x="352" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 1</title></rect>
-<rect x="360" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 1</title></rect>
-<rect x="368" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 1</title></rect>
-<rect x="376" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 1</title></rect>
-<rect x="384" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 1</title></rect>
-<rect x="392" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 1</title></rect>
-<rect x="296" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 1</title></rect>
-<rect x="304" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 1</title></rect>
-<rect x="312" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 1</title></rect>
-<rect x="320" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 1</title></rect>
-<rect x="328" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 1</title></rect>
-<rect x="336" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 1</title></rect>
-<rect x="344" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 1</title></rect>
-<rect x="352" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 1</title></rect>
-<rect x="360" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 1</title></rect>
-<rect x="368" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 1</title></rect>
-<rect x="376" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 1</title></rect>
-<rect x="384" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 1</title></rect>
-<rect x="392" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 1</title></rect>
-<rect x="296" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 1</title></rect>
-<rect x="304" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 1</title></rect>
-<rect x="312" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 1</title></rect>
-<rect x="320" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 1</title></rect>
-<rect x="328" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 1</title></rect>
-<rect x="336" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 1</title></rect>
-<rect x="344" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 1</title></rect>
-<rect x="352" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 1</title></rect>
-<rect x="360" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 1</title></rect>
-<rect x="368" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 1</title></rect>
-<rect x="376" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 1</title></rect>
-<rect x="384" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 1</title></rect>
-<rect x="392" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 1</title></rect>
-<rect x="296" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 1</title></rect>
-<rect x="304" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 1</title></rect>
-<rect x="312" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 1</title></rect>
-<rect x="320" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 1</title></rect>
-<rect x="328" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 1</title></rect>
-<rect x="336" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 1</title></rect>
-<rect x="344" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 1</title></rect>
-<rect x="352" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 1</title></rect>
-<rect x="360" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 1</title></rect>
-<rect x="368" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 1</title></rect>
-<rect x="376" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 1</title></rect>
-<rect x="384" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 1</title></rect>
-<rect x="392" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 1</title></rect>
-<rect x="176" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 2</title></rect>
-<rect x="184" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 2</title></rect>
-<rect x="192" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 2</title></rect>
-<rect x="200" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 2</title></rect>
-<rect x="208" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 2</title></rect>
-<rect x="216" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 2</title></rect>
-<rect x="224" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 2</title></rect>
-<rect x="232" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 2</title></rect>
-<rect x="240" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 2</title></rect>
-<rect x="248" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 2</title></rect>
-<rect x="256" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 2</title></rect>
-<rect x="264" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 2</title></rect>
-<rect x="272" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 2</title></rect>
-<rect x="176" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 2</title></rect>
-<rect x="184" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 2</title></rect>
-<rect x="192" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 2</title></rect>
-<rect x="200" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 2</title></rect>
-<rect x="208" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 2</title></rect>
-<rect x="216" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 2</title></rect>
-<rect x="224" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 2</title></rect>
-<rect x="232" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 2</title></rect>
-<rect x="240" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 2</title></rect>
-<rect x="248" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 2</title></rect>
-<rect x="256" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 2</title></rect>
-<rect x="264" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 2</title></rect>
-<rect x="272" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 2</title></rect>
-<rect x="176" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 2</title></rect>
-<rect x="184" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 2</title></rect>
-<rect x="192" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 2</title></rect>
-<rect x="200" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 2</title></rect>
-<rect x="208" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 2</title></rect>
-<rect x="216" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 2</title></rect>
-<rect x="224" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 2</title></rect>
-<rect x="232" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 2</title></rect>
-<rect x="240" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 2</title></rect>
-<rect x="248" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 2</title></rect>
-<rect x="256" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 2</title></rect>
-<rect x="264" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 2</title></rect>
-<rect x="272" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 2</title></rect>
-<rect x="176" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 2</title></rect>
-<rect x="184" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 2</title></rect>
-<rect x="192" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 2</title></rect>
-<rect x="200" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 2</title></rect>
-<rect x="208" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 2</title></rect>
-<rect x="216" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 2</title></rect>
-<rect x="224" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 2</title></rect>
-<rect x="232" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 2</title></rect>
-<rect x="240" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 2</title></rect>
-<rect x="248" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 2</title></rect>
-<rect x="256" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 2</title></rect>
-<rect x="264" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 2</title></rect>
-<rect x="272" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 2</title></rect>
-<rect x="296" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 3</title></rect>
-<rect x="304" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 3</title></rect>
-<rect x="312" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 3</title></rect>
-<rect x="320" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 3</title></rect>
-<rect x="328" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 3</title></rect>
-<rect x="336" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 3</title></rect>
-<rect x="344" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 3</title></rect>
-<rect x="352" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 3</title></rect>
-<rect x="360" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 3</title></rect>
-<rect x="368" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 3</title></rect>
-<rect x="376" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 3</title></rect>
-<rect x="384" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 3</title></rect>
-<rect x="392" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 3</title></rect>
-<rect x="296" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 3</title></rect>
-<rect x="304" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 3</title></rect>
-<rect x="312" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 3</title></rect>
-<rect x="320" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 3</title></rect>
-<rect x="328" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 3</title></rect>
-<rect x="336" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 3</title></rect>
-<rect x="344" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 3</title></rect>
-<rect x="352" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 3</title></rect>
-<rect x="360" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 3</title></rect>
-<rect x="368" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 3</title></rect>
-<rect x="376" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 3</title></rect>
-<rect x="384" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 3</title></rect>
-<rect x="392" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 3</title></rect>
-<rect x="296" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 3</title></rect>
-<rect x="304" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 3</title></rect>
-<rect x="312" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 3</title></rect>
-<rect x="320" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 3</title></rect>
-<rect x="328" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 3</title></rect>
-<rect x="336" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 3</title></rect>
-<rect x="344" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 3</title></rect>
-<rect x="352" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 3</title></rect>
-<rect x="360" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 3</title></rect>
-<rect x="368" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 3</title></rect>
-<rect x="376" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 3</title></rect>
-<rect x="384" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 3</title></rect>
-<rect x="392" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 3</title></rect>
-<rect x="296" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 3</title></rect>
-<rect x="304" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 3</title></rect>
-<rect x="312" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 3</title></rect>
-<rect x="320" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 3</title></rect>
-<rect x="328" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 3</title></rect>
-<rect x="336" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 3</title></rect>
-<rect x="344" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 3</title></rect>
-<rect x="352" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 3</title></rect>
-<rect x="360" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 3</title></rect>
-<rect x="368" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 3</title></rect>
-<rect x="376" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 3</title></rect>
-<rect x="384" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 3</title></rect>
-<rect x="392" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 3</title></rect>
-<rect x="176" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 4</title></rect>
-<rect x="184" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 4</title></rect>
-<rect x="192" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 4</title></rect>
-<rect x="200" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 4</title></rect>
-<rect x="208" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 4</title></rect>
-<rect x="216" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 4</title></rect>
-<rect x="224" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 4</title></rect>
-<rect x="232" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 4</title></rect>
-<rect x="240" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 4</title></rect>
-<rect x="248" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 4</title></rect>
-<rect x="256" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 4</title></rect>
-<rect x="264" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 4</title></rect>
-<rect x="272" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 4</title></rect>
-<rect x="176" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 4</title></rect>
-<rect x="184" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 4</title></rect>
-<rect x="192" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 4</title></rect>
-<rect x="200" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 4</title></rect>
-<rect x="208" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 4</title></rect>
-<rect x="216" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 4</title></rect>
-<rect x="224" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 4</title></rect>
-<rect x="232" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 4</title></rect>
-<rect x="240" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 4</title></rect>
-<rect x="248" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 4</title></rect>
-<rect x="256" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 4</title></rect>
-<rect x="264" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 4</title></rect>
-<rect x="272" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 4</title></rect>
-<rect x="176" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 4</title></rect>
-<rect x="184" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 4</title></rect>
-<rect x="192" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 4</title></rect>
-<rect x="200" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 4</title></rect>
-<rect x="208" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 4</title></rect>
-<rect x="216" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 4</title></rect>
-<rect x="224" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 4</title></rect>
-<rect x="232" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 4</title></rect>
-<rect x="240" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 4</title></rect>
-<rect x="248" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 4</title></rect>
-<rect x="256" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 4</title></rect>
-<rect x="264" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 4</title></rect>
-<rect x="272" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 4</title></rect>
-<rect x="176" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 4</title></rect>
-<rect x="184" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 4</title></rect>
-<rect x="192" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 4</title></rect>
-<rect x="200" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 4</title></rect>
-<rect x="208" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 4</title></rect>
-<rect x="216" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 4</title></rect>
-<rect x="224" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 4</title></rect>
-<rect x="232" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 4</title></rect>
-<rect x="240" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 4</title></rect>
-<rect x="248" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 4</title></rect>
-<rect x="256" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 4</title></rect>
-<rect x="264" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 4</title></rect>
-<rect x="272" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 4</title></rect>
-<rect x="296" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 5</title></rect>
-<rect x="304" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 5</title></rect>
-<rect x="312" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 5</title></rect>
-<rect x="320" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 5</title></rect>
-<rect x="328" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 5</title></rect>
-<rect x="336" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 5</title></rect>
-<rect x="344" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 5</title></rect>
-<rect x="352" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 5</title></rect>
-<rect x="360" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 5</title></rect>
-<rect x="368" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 5</title></rect>
-<rect x="376" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 5</title></rect>
-<rect x="384" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 5</title></rect>
-<rect x="392" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 5</title></rect>
-<rect x="296" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 5</title></rect>
-<rect x="304" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 5</title></rect>
-<rect x="312" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 5</title></rect>
-<rect x="320" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 5</title></rect>
-<rect x="328" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 5</title></rect>
-<rect x="336" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 5</title></rect>
-<rect x="344" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 5</title></rect>
-<rect x="352" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 5</title></rect>
-<rect x="360" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 5</title></rect>
-<rect x="368" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 5</title></rect>
-<rect x="376" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 5</title></rect>
-<rect x="384" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 5</title></rect>
-<rect x="392" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 5</title></rect>
-<rect x="296" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 5</title></rect>
-<rect x="304" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 5</title></rect>
-<rect x="312" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 5</title></rect>
-<rect x="320" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 5</title></rect>
-<rect x="328" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 5</title></rect>
-<rect x="336" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 5</title></rect>
-<rect x="344" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 5</title></rect>
-<rect x="352" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 5</title></rect>
-<rect x="360" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 5</title></rect>
-<rect x="368" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 5</title></rect>
-<rect x="376" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 5</title></rect>
-<rect x="384" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 5</title></rect>
-<rect x="392" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 5</title></rect>
-<rect x="296" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 5</title></rect>
-<rect x="304" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 5</title></rect>
-<rect x="312" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 5</title></rect>
-<rect x="320" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 5</title></rect>
-<rect x="328" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 5</title></rect>
-<rect x="336" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 5</title></rect>
-<rect x="344" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 5</title></rect>
-<rect x="352" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 5</title></rect>
-<rect x="360" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 5</title></rect>
-<rect x="368" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 5</title></rect>
-<rect x="376" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 5</title></rect>
-<rect x="384" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 5</title></rect>
-<rect x="392" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 5</title></rect>
-<rect x="176" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 6</title></rect>
-<rect x="184" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 6</title></rect>
-<rect x="192" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 6</title></rect>
-<rect x="200" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 6</title></rect>
-<rect x="208" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 6</title></rect>
-<rect x="216" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 6</title></rect>
-<rect x="224" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 6</title></rect>
-<rect x="232" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 6</title></rect>
-<rect x="240" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 6</title></rect>
-<rect x="248" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 6</title></rect>
-<rect x="256" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 6</title></rect>
-<rect x="264" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 6</title></rect>
-<rect x="272" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 6</title></rect>
-<rect x="176" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 6</title></rect>
-<rect x="184" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 6</title></rect>
-<rect x="192" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 6</title></rect>
-<rect x="200" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 6</title></rect>
-<rect x="208" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 6</title></rect>
-<rect x="216" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 6</title></rect>
-<rect x="224" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 6</title></rect>
-<rect x="232" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 6</title></rect>
-<rect x="240" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 6</title></rect>
-<rect x="248" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 6</title></rect>
-<rect x="256" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 6</title></rect>
-<rect x="264" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 6</title></rect>
-<rect x="272" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 6</title></rect>
-<rect x="176" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 6</title></rect>
-<rect x="184" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 6</title></rect>
-<rect x="192" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 6</title></rect>
-<rect x="200" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 6</title></rect>
-<rect x="208" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 6</title></rect>
-<rect x="216" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 6</title></rect>
-<rect x="224" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 6</title></rect>
-<rect x="232" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 6</title></rect>
-<rect x="240" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 6</title></rect>
-<rect x="248" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 6</title></rect>
-<rect x="256" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 6</title></rect>
-<rect x="264" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 6</title></rect>
-<rect x="272" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 6</title></rect>
-<rect x="176" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 6</title></rect>
-<rect x="184" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 6</title></rect>
-<rect x="192" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 6</title></rect>
-<rect x="200" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 6</title></rect>
-<rect x="208" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 6</title></rect>
-<rect x="216" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 6</title></rect>
-<rect x="224" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 6</title></rect>
-<rect x="232" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 6</title></rect>
-<rect x="240" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 6</title></rect>
-<rect x="248" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 6</title></rect>
-<rect x="256" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 6</title></rect>
-<rect x="264" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 6</title></rect>
-<rect x="272" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 6</title></rect>
-<rect x="296" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 7</title></rect>
-<rect x="304" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 7</title></rect>
-<rect x="312" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 7</title></rect>
-<rect x="320" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 7</title></rect>
-<rect x="328" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 7</title></rect>
-<rect x="336" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 7</title></rect>
-<rect x="344" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 7</title></rect>
-<rect x="352" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 7</title></rect>
-<rect x="360" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 7</title></rect>
-<rect x="368" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 7</title></rect>
-<rect x="376" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 7</title></rect>
-<rect x="384" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 7</title></rect>
-<rect x="392" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 7</title></rect>
-<rect x="296" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 7</title></rect>
-<rect x="304" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 7</title></rect>
-<rect x="312" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 7</title></rect>
-<rect x="320" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 7</title></rect>
-<rect x="328" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 7</title></rect>
-<rect x="336" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 7</title></rect>
-<rect x="344" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 7</title></rect>
-<rect x="352" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 7</title></rect>
-<rect x="360" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 7</title></rect>
-<rect x="368" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 7</title></rect>
-<rect x="376" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 7</title></rect>
-<rect x="384" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 7</title></rect>
-<rect x="392" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 7</title></rect>
-<rect x="296" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 7</title></rect>
-<rect x="304" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 7</title></rect>
-<rect x="312" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 7</title></rect>
-<rect x="320" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 7</title></rect>
-<rect x="328" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 7</title></rect>
-<rect x="336" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 7</title></rect>
-<rect x="344" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 7</title></rect>
-<rect x="352" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 7</title></rect>
-<rect x="360" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 7</title></rect>
-<rect x="368" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 7</title></rect>
-<rect x="376" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 7</title></rect>
-<rect x="384" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 7</title></rect>
-<rect x="392" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 7</title></rect>
-<rect x="296" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 7</title></rect>
-<rect x="304" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 7</title></rect>
-<rect x="312" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 7</title></rect>
-<rect x="320" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 7</title></rect>
-<rect x="328" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 7</title></rect>
-<rect x="336" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 7</title></rect>
-<rect x="344" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 7</title></rect>
-<rect x="352" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 7</title></rect>
-<rect x="360" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 7</title></rect>
-<rect x="368" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 7</title></rect>
-<rect x="376" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 7</title></rect>
-<rect x="384" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 7</title></rect>
-<rect x="392" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 7</title></rect>
-<text x="66" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Gateways</text>
-<rect x="72" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 0
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 1
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 2
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 3
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 4
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 5
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 6
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 7
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 8
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 9
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 10
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 11
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 12
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 13
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Gateway Table Gateway:
- Unit: 14
- Entry Bit Width: 44
- Depth: 4
- Occupied By: _condition_0</title></rect>
-<rect x="72" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Gateway Table Gateway:
- Unit: 15
- Entry Bit Width: 44
- Depth: 4
- Occupied By: _condition_3</title></rect>
-<text x="242" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Stashes</text>
-<rect x="248" y="208" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 0
- Unit ID: 0
- Global ID: 0
-</title></rect>
-<rect x="248" y="200" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 0
- Unit ID: 1
- Global ID: 1
-</title></rect>
-<rect x="248" y="184" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 1
- Unit ID: 0
- Global ID: 2
-</title></rect>
-<rect x="248" y="176" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 1
- Unit ID: 1
- Global ID: 3
-</title></rect>
-<rect x="248" y="160" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 2
- Unit ID: 0
- Global ID: 4
-</title></rect>
-<rect x="248" y="152" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 2
- Unit ID: 1
- Global ID: 5
-</title></rect>
-<rect x="248" y="136" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 3
- Unit ID: 0
- Global ID: 6
-</title></rect>
-<rect x="248" y="128" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 3
- Unit ID: 1
- Global ID: 7
-</title></rect>
-<rect x="248" y="112" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 4
- Unit ID: 0
- Global ID: 8
-</title></rect>
-<rect x="248" y="104" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 4
- Unit ID: 1
- Global ID: 9
-</title></rect>
-<rect x="248" y="88" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 5
- Unit ID: 0
- Global ID: 10
-</title></rect>
-<rect x="248" y="80" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 5
- Unit ID: 1
- Global ID: 11
-</title></rect>
-<rect x="248" y="64" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 6
- Unit ID: 0
- Global ID: 12
-</title></rect>
-<rect x="248" y="56" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 6
- Unit ID: 1
- Global ID: 13
-</title></rect>
-<rect x="248" y="40" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 7
- Unit ID: 0
- Global ID: 14
-</title></rect>
-<rect x="248" y="32" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
- Row: 7
- Unit ID: 1
- Global ID: 15
-</title></rect>
-<text x="282" y="22" textLength="38" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Map RAMs</text>
-<rect x="280" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 0
- Unit Number: 0
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 1
- Unit Number: 1
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 2
- Unit Number: 2
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 3
- Unit Number: 3
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 4
- Unit Number: 4
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 0 Unit: 5
- Unit Number: 5
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 0
- Unit Number: 6
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 1
- Unit Number: 7
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 2
- Unit Number: 8
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 3
- Unit Number: 9
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 4
- Unit Number: 10
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 1 Unit: 5
- Unit Number: 11
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 0
- Unit Number: 12
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 1
- Unit Number: 13
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 2
- Unit Number: 14
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 3
- Unit Number: 15
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 4
- Unit Number: 16
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 2 Unit: 5
- Unit Number: 17
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 0
- Unit Number: 18
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 1
- Unit Number: 19
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 2
- Unit Number: 20
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 3
- Unit Number: 21
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="312" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 4
- Unit Number: 22
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="320" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 3 Unit: 5
- Unit Number: 23
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="280" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 0
- Unit Number: 24
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="288" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 1
- Unit Number: 25
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="296" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 2
- Unit Number: 26
- Entry Bit Width: 11
- Depth: 1024</title></rect>
-<rect x="304" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
- Row: 4 Unit: 3
- Unit Number: 27
- Entry Bit Width: 11
- Depth: 1024</title></rect>
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- Byte Number: 4
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- Byte Number: 5
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- Byte Number: 6
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- Byte Number: 10
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- Byte Number: 11
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- Byte Number: 12
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- Byte Number: 13
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- Byte Number: 14
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- Byte Number: 15
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- Byte Number: 16
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- Byte Number: 17
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- Byte Number: 18
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- Byte Number: 19
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- Byte Number: 20
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- Byte Number: 21
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- Byte Number: 22
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- Byte Number: 23
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- Byte Number: 24
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- Byte Number: 25
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- Byte Number: 26
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- Byte Number: 27
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- Byte Number: 28
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- Byte Number: 29
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- Byte Number: 30
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- Byte Number: 31
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- Byte Number: 32
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- Byte Number: 33
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- Byte Number: 34
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- Byte Number: 35
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- Byte Number: 36
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- Byte Number: 37
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- Byte Number: 38
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- Byte Number: 39
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- Byte Number: 40
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- Byte Number: 41
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- Byte Number: 42
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- Byte Number: 43
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- Byte Number: 44
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- Byte Number: 45
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- Byte Number: 48
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- Byte Number: 49
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- Byte Number: 50
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- Byte Number: 55
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- Byte Number: 56
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- Byte Number: 57
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- Byte Number: 58
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- Byte Number: 59
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- Byte Number: 60
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- Byte Number: 61
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- Byte Number: 62
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- Byte Number: 63
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- Byte Number: 64
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- Byte Number: 79
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- Byte Number: 80
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- Byte Number: 84
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- Byte Number: 85
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- Byte Number: 86
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- Byte Number: 87
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- Byte Number: 88
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- Byte Number: 89
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- Byte Number: 90
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- Byte Number: 91
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- Byte Number: 92
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- Byte Number: 93
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- Byte Number: 97
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- Byte Number: 99
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- Byte Number: 100
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- Byte Number: 101
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- Byte Number: 103
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- Byte Number: 104
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- Byte Number: 105
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- Byte Number: 106
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- Byte Number: 107
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- Byte Number: 108
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- Byte Number: 109
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- Byte Number: 110
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- Byte Number: 111
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- Byte Number: 112
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- Byte Number: 113
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- Byte Number: 114
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- Byte Number: 115
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- Byte Number: 116
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- Byte Number: 117
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- Byte Number: 118
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- Byte Number: 119
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- Byte Number: 123
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- Byte Number: 125
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- Byte Number: 126
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- Byte Number: 127
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- Unit: 0</title></rect>
-<rect x="568" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 1</title></rect>
-<rect x="576" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 2</title></rect>
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- Unit: 3</title></rect>
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- Unit: 4</title></rect>
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- Unit: 5</title></rect>
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- Unit: 6</title></rect>
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- Unit: 7</title></rect>
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- Unit: 8</title></rect>
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- Unit: 9</title></rect>
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- Unit: 10</title></rect>
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- Unit: 11</title></rect>
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- Unit: 12</title></rect>
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- Unit: 13</title></rect>
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- Unit: 14</title></rect>
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- Unit: 15</title></rect>
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- Unit: 16</title></rect>
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- Unit: 17</title></rect>
-<rect x="576" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 18</title></rect>
-<rect x="584" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 19</title></rect>
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- Unit: 20</title></rect>
-<rect x="568" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 21</title></rect>
-<rect x="576" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 22</title></rect>
-<rect x="584" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 23</title></rect>
-<rect x="560" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 24</title></rect>
-<rect x="568" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 25</title></rect>
-<rect x="576" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 26</title></rect>
-<rect x="584" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 27</title></rect>
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- Unit: 28</title></rect>
-<rect x="568" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 29</title></rect>
-<rect x="576" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 30</title></rect>
-<rect x="584" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 31</title></rect>
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- Unit: 32</title></rect>
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- Unit: 33</title></rect>
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- Unit: 34</title></rect>
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- Unit: 35</title></rect>
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- Unit: 36</title></rect>
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- Unit: 37</title></rect>
-<rect x="576" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 38</title></rect>
-<rect x="584" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 39</title></rect>
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- Unit: 40</title></rect>
-<rect x="568" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 41</title></rect>
-<rect x="576" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 42</title></rect>
-<rect x="584" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 43</title></rect>
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- Unit: 44</title></rect>
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- Unit: 45</title></rect>
-<rect x="576" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 46</title></rect>
-<rect x="584" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 47</title></rect>
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- Unit: 48</title></rect>
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- Unit: 49</title></rect>
-<rect x="576" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 50</title></rect>
-<rect x="584" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 51</title></rect>
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- Unit: 52</title></rect>
-<rect x="568" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 53</title></rect>
-<rect x="576" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 54</title></rect>
-<rect x="584" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 55</title></rect>
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- Unit: 56</title></rect>
-<rect x="568" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 57</title></rect>
-<rect x="576" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 58</title></rect>
-<rect x="584" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 59</title></rect>
-<rect x="560" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 60</title></rect>
-<rect x="568" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 61</title></rect>
-<rect x="576" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 62</title></rect>
-<rect x="584" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 63</title></rect>
-<rect x="600" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 0</title></rect>
-<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 1</title></rect>
-<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>16-bit ALU:
- Unit: 2
- Occupied By:
-For Match Table ingress_pkt's action _packet_out:
- deposit-field Instruction at PHV Container Number: 130 has bit width 23
-</title></rect>
-<rect x="624" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 3</title></rect>
-<rect x="600" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 4</title></rect>
-<rect x="608" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 5</title></rect>
-<rect x="616" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 6</title></rect>
-<rect x="624" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 7</title></rect>
-<rect x="600" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 8</title></rect>
-<rect x="608" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 9</title></rect>
-<rect x="616" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 10</title></rect>
-<rect x="624" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 11</title></rect>
-<rect x="600" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 12</title></rect>
-<rect x="608" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 13</title></rect>
-<rect x="616" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 14</title></rect>
-<rect x="624" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 15</title></rect>
-<rect x="600" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 16</title></rect>
-<rect x="608" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>16-bit ALU:
- Unit: 17
- Occupied By:
-For Match Table egress_pkt's action add_packet_in_hdr:
- deposit-field Instruction at PHV Container Number: 145 has bit width 23
-</title></rect>
-<rect x="616" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 18</title></rect>
-<rect x="624" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 19</title></rect>
-<rect x="600" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 20</title></rect>
-<rect x="608" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 21</title></rect>
-<rect x="616" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 22</title></rect>
-<rect x="624" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 23</title></rect>
-<rect x="600" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 24</title></rect>
-<rect x="608" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 25</title></rect>
-<rect x="616" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 26</title></rect>
-<rect x="624" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 27</title></rect>
-<rect x="600" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 28</title></rect>
-<rect x="608" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 29</title></rect>
-<rect x="616" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 30</title></rect>
-<rect x="624" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 31</title></rect>
-<rect x="600" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 32</title></rect>
-<rect x="608" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 33</title></rect>
-<rect x="616" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 34</title></rect>
-<rect x="624" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 35</title></rect>
-<rect x="600" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 36</title></rect>
-<rect x="608" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 37</title></rect>
-<rect x="616" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 38</title></rect>
-<rect x="624" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 39</title></rect>
-<rect x="600" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 40</title></rect>
-<rect x="608" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 41</title></rect>
-<rect x="616" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 42</title></rect>
-<rect x="624" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 43</title></rect>
-<rect x="600" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 44</title></rect>
-<rect x="608" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 45</title></rect>
-<rect x="616" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 46</title></rect>
-<rect x="624" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 47</title></rect>
-<rect x="600" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 48</title></rect>
-<rect x="608" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 49</title></rect>
-<rect x="616" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 50</title></rect>
-<rect x="624" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 51</title></rect>
-<rect x="600" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 52</title></rect>
-<rect x="608" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 53</title></rect>
-<rect x="616" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 54</title></rect>
-<rect x="624" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 55</title></rect>
-<rect x="600" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 56</title></rect>
-<rect x="608" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 57</title></rect>
-<rect x="616" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 58</title></rect>
-<rect x="624" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 59</title></rect>
-<rect x="600" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 60</title></rect>
-<rect x="608" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 61</title></rect>
-<rect x="616" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 62</title></rect>
-<rect x="624" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 63</title></rect>
-<rect x="600" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 64</title></rect>
-<rect x="608" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 65</title></rect>
-<rect x="616" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 66</title></rect>
-<rect x="624" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 67</title></rect>
-<rect x="600" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 68</title></rect>
-<rect x="608" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 69</title></rect>
-<rect x="616" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 70</title></rect>
-<rect x="624" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 71</title></rect>
-<rect x="600" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 72</title></rect>
-<rect x="608" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 73</title></rect>
-<rect x="616" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 74</title></rect>
-<rect x="624" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 75</title></rect>
-<rect x="600" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 76</title></rect>
-<rect x="608" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 77</title></rect>
-<rect x="616" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 78</title></rect>
-<rect x="624" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 79</title></rect>
-<rect x="600" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 80</title></rect>
-<rect x="608" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 81</title></rect>
-<rect x="616" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 82</title></rect>
-<rect x="624" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 83</title></rect>
-<rect x="600" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 84</title></rect>
-<rect x="608" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 85</title></rect>
-<rect x="616" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 86</title></rect>
-<rect x="624" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 87</title></rect>
-<rect x="600" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 88</title></rect>
-<rect x="608" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 89</title></rect>
-<rect x="616" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 90</title></rect>
-<rect x="624" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 91</title></rect>
-<rect x="600" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 92</title></rect>
-<rect x="608" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 93</title></rect>
-<rect x="616" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 94</title></rect>
-<rect x="624" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 95</title></rect>
-<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 0</title></rect>
-<rect x="648" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 1</title></rect>
-<rect x="656" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 2</title></rect>
-<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 3</title></rect>
-<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>8-bit ALU:
- Unit: 4
- Occupied By:
-For Match Table ingress_pkt's action _packet_out:
- deposit-field Instruction at PHV Container Number: 68 has bit width 20
-</title></rect>
-<rect x="648" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 5</title></rect>
-<rect x="656" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 6</title></rect>
-<rect x="664" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 7</title></rect>
-<rect x="640" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 8</title></rect>
-<rect x="648" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 9</title></rect>
-<rect x="656" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 10</title></rect>
-<rect x="664" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 11</title></rect>
-<rect x="640" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 12</title></rect>
-<rect x="648" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 13</title></rect>
-<rect x="656" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 14</title></rect>
-<rect x="664" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 15</title></rect>
-<rect x="640" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 16</title></rect>
-<rect x="648" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 17</title></rect>
-<rect x="656" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>8-bit ALU:
- Unit: 18
- Occupied By:
-For Match Table egress_pkt's action add_packet_in_hdr:
- deposit-field Instruction at PHV Container Number: 82 has bit width 20
-</title></rect>
-<rect x="664" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 19</title></rect>
-<rect x="640" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 20</title></rect>
-<rect x="648" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 21</title></rect>
-<rect x="656" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 22</title></rect>
-<rect x="664" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 23</title></rect>
-<rect x="640" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 24</title></rect>
-<rect x="648" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 25</title></rect>
-<rect x="656" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 26</title></rect>
-<rect x="664" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 27</title></rect>
-<rect x="640" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 28</title></rect>
-<rect x="648" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 29</title></rect>
-<rect x="656" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 30</title></rect>
-<rect x="664" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 31</title></rect>
-<rect x="640" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 32</title></rect>
-<rect x="648" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 33</title></rect>
-<rect x="656" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 34</title></rect>
-<rect x="664" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 35</title></rect>
-<rect x="640" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 36</title></rect>
-<rect x="648" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 37</title></rect>
-<rect x="656" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 38</title></rect>
-<rect x="664" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 39</title></rect>
-<rect x="640" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 40</title></rect>
-<rect x="648" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 41</title></rect>
-<rect x="656" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 42</title></rect>
-<rect x="664" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 43</title></rect>
-<rect x="640" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 44</title></rect>
-<rect x="648" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 45</title></rect>
-<rect x="656" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 46</title></rect>
-<rect x="664" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 47</title></rect>
-<rect x="640" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 48</title></rect>
-<rect x="648" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 49</title></rect>
-<rect x="656" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 50</title></rect>
-<rect x="664" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 51</title></rect>
-<rect x="640" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 52</title></rect>
-<rect x="648" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 53</title></rect>
-<rect x="656" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 54</title></rect>
-<rect x="664" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 55</title></rect>
-<rect x="640" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 56</title></rect>
-<rect x="648" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 57</title></rect>
-<rect x="656" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 58</title></rect>
-<rect x="664" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 59</title></rect>
-<rect x="640" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 60</title></rect>
-<rect x="648" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 61</title></rect>
-<rect x="656" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 62</title></rect>
-<rect x="664" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 63</title></rect>
-<text x="570" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
-<text x="738" y="78" style="fill:black; font-weight:bold;">Ingress Tables</text>
-<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>ingress_pkt</title></rect>
-<text x="738" y="102" style="fill:black;">ingress_pkt</text>
-<text x="738" y="126" style="fill:black; font-weight:bold;">Egress Tables</text>
-<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>egress_pkt</title></rect>
-<text x="738" y="150" style="fill:black;">egress_pkt</text>
-<rect x="720" y="168" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
-
-<line x1="720" y1="168" x2="736" y2="184" style="stroke:black; stroke-width:2" />
-<line x1="720" y1="184" x2="736" y2="168" style="stroke:black; stroke-width:2" />
-<text x="738" y="182" style="fill:black;">Unavailable</text>
-<rect x="704" y="24" width="240" height="184" style="stroke:black; stroke-width:1; fill:none""></rect>
-<rect x="712" y="32" width="224" height="168" style="stroke:black; stroke-width:1; fill:none""></rect>
-<text x="978" y="54" style="fill:black;">Totals</text>
-<text x="986" y="78" style="fill:black;">Exact Match Input xbar</text>
-<text x="994" y="102" style="fill:black;"> 2 of 128 (1.56%)</text>
-<text x="986" y="126" style="fill:black;">Ternary Match Input xbar</text>
-<text x="994" y="150" style="fill:black;"> 0 of 66 (0.00%)</text>
-<text x="986" y="174" style="fill:black;">Hash Bit</text>
-<text x="994" y="198" style="fill:black;"> 2 of 416 (0.48%)</text>
-<text x="986" y="222" style="fill:black;">Hash Dist Unit</text>
-<text x="994" y="246" style="fill:black;"> 0 of 6 (0.00%)</text>
-<text x="986" y="270" style="fill:black;">Gateway</text>
-<text x="994" y="294" style="fill:black;"> 2 of 16 (12.50%)</text>
-<text x="986" y="318" style="fill:black;">SRAM</text>
-<text x="994" y="342" style="fill:black;"> 0 of 80 (0.00%)</text>
-<text x="986" y="366" style="fill:black;">Map RAM</text>
-<text x="994" y="390" style="fill:black;"> 0 of 48 (0.00%)</text>
-<text x="986" y="414" style="fill:black;">TCAM</text>
-<text x="994" y="438" style="fill:black;"> 0 of 24 (0.00%)</text>
-<text x="986" y="462" style="fill:black;">VLIW Instr</text>
-<text x="994" y="486" style="fill:black;"> 1 of 32 (3.12%)</text>
-<text x="986" y="510" style="fill:black;">Meter ALU</text>
-<text x="994" y="534" style="fill:black;"> 0 of 4 (0.00%)</text>
-<text x="986" y="558" style="fill:black;">Stats ALU</text>
-<text x="994" y="582" style="fill:black;"> 0 of 4 (0.00%)</text>
-<text x="986" y="606" style="fill:black;">Stash</text>
-<text x="994" y="630" style="fill:black;"> 0 of 16 (0.00%)</text>
-<text x="986" y="654" style="fill:black;">Action Data Bus Bytes</text>
-<text x="994" y="678" style="fill:black;"> 0 of 128 (0.00%)</text>
-<text x="986" y="702" style="fill:black;">Logical TableID</text>
-<text x="994" y="726" style="fill:black;"> 2 of 16 (12.50%)</text>
-<rect x="960" y="24" width="240" height="728" style="stroke:black; stroke-width:1; fill:none""></rect>
-<rect x="968" y="32" width="224" height="712" style="stroke:black; stroke-width:1; fill:none""></rect>
-<rect x="0" y="0" width="680" height="672" style="stroke:black; stroke-width:2; fill:none""></rect>
-</svg><br>
-
-<h2>MAU Stage 1</h2>
-<svg width="95%" height="95%" viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
-<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
-<rect x="16" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 0 in exact Group 0 (parity group 0)
-contains:
{udp.dstPort[7:0]} for table table0__action__
</title></rect>
-<rect x="16" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 1 in exact Group 0 (parity group 0)
+<rect x="16" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 1 in exact Group 0 (parity group 0)
contains:
{udp.dstPort[15:8]} for table table0__action__
</title></rect>
-<rect x="16" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 2 in exact Group 0 (parity group 0)
+<rect x="16" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 2 in exact Group 0 (parity group 0)
contains:
{udp.srcPort[7:0]} for table table0__action__
</title></rect>
-<rect x="16" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 3 in exact Group 0 (parity group 0)
+<rect x="16" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 3 in exact Group 0 (parity group 0)
contains:
{udp.srcPort[15:8]} for table table0__action__
</title></rect>
-<rect x="24" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 4 in exact Group 0 (parity group 0)
+<rect x="24" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 4 in exact Group 0 (parity group 0)
contains:
{ipv4.dstAddr[7:0]} for table table0__action__
</title></rect>
-<rect x="24" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 5 in exact Group 0 (parity group 0)
+<rect x="24" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 5 in exact Group 0 (parity group 0)
contains:
{ipv4.dstAddr[15:8]} for table table0__action__
</title></rect>
-<rect x="24" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 6 in exact Group 0 (parity group 0)
+<rect x="24" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 6 in exact Group 0 (parity group 0)
contains:
{ipv4.dstAddr[23:16]} for table table0__action__
</title></rect>
-<rect x="24" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 7 in exact Group 0 (parity group 0)
+<rect x="24" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 7 in exact Group 0 (parity group 0)
contains:
{ipv4.dstAddr[31:24]} for table table0__action__
</title></rect>
-<rect x="40" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 8 in exact Group 0 (parity group 1)
+<rect x="40" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 8 in exact Group 0 (parity group 1)
contains:
{ipv4.srcAddr[31:24]} for table table0__action__
</title></rect>
-<rect x="40" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 9 in exact Group 0 (parity group 1)
+<rect x="40" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 9 in exact Group 0 (parity group 1)
contains:
{ipv4.srcAddr[15:8]} for table table0__action__
</title></rect>
-<rect x="40" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 10 in exact Group 0 (parity group 1)
+<rect x="40" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 10 in exact Group 0 (parity group 1)
contains:
{ipv4.srcAddr[7:0]} for table table0__action__
</title></rect>
-<rect x="40" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 11 in exact Group 0 (parity group 1)
+<rect x="40" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 11 in exact Group 0 (parity group 1)
contains:
{ipv4.srcAddr[23:16]} for table table0__action__
</title></rect>
-<rect x="48" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 12 in exact Group 0 (parity group 1)
+<rect x="48" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 12 in exact Group 0 (parity group 1)
contains:
- {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]} for table _condition_1
+ {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]} for table _condition_0
</title></rect>
<rect x="48" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 13 in exact Group 0 (parity group 1)</title></rect>
<rect x="48" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 14 in exact Group 0 (parity group 1)</title></rect>
@@ -3408,68 +783,68 @@
<rect x="48" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 125 in exact Group 7 (parity group 15)</title></rect>
<rect x="48" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 126 in exact Group 7 (parity group 15)</title></rect>
<rect x="48" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 127 in exact Group 7 (parity group 15)</title></rect>
-<rect x="16" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 128 in ternary Group 0
+<rect x="16" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 128 in ternary Group 0
contains:
{ethernet.srcAddr[7:0]} for table table0
</title></rect>
-<rect x="16" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 129 in ternary Group 0
+<rect x="16" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 129 in ternary Group 0
contains:
{ethernet.srcAddr[15:8]} for table table0
</title></rect>
-<rect x="24" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 130 in ternary Group 0
+<rect x="24" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 130 in ternary Group 0
contains:
{ethernet.srcAddr[23:16]} for table table0
</title></rect>
-<rect x="24" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 131 in ternary Group 0
+<rect x="24" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 131 in ternary Group 0
contains:
{ethernet.srcAddr[31:24]} for table table0
</title></rect>
-<rect x="32" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 132 in ternary Group 0
+<rect x="32" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 132 in ternary Group 0
contains:
{ethernet.dstAddr[15:8]} for table table0
</title></rect>
-<rect x="48" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 133 in ternary Group 0
+<rect x="48" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 133 in ternary Group 0
contains:
version/valid
{unused[6:0], ig_intr_md.ingress_port[8:8]} for table table0
</title></rect>
-<rect x="16" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 134 in ternary Group 1
+<rect x="16" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 134 in ternary Group 1
contains:
{ethernet.dstAddr[31:24]} for table table0
</title></rect>
-<rect x="16" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 135 in ternary Group 1
+<rect x="16" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 135 in ternary Group 1
contains:
{ethernet.dstAddr[39:32]} for table table0
</title></rect>
-<rect x="24" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 136 in ternary Group 1
+<rect x="24" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 136 in ternary Group 1
contains:
{ethernet.etherType[7:0]} for table table0
</title></rect>
-<rect x="24" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 137 in ternary Group 1
+<rect x="24" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 137 in ternary Group 1
contains:
{ethernet.dstAddr[23:16]} for table table0
</title></rect>
-<rect x="32" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 138 in ternary Group 1
+<rect x="32" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 138 in ternary Group 1
contains:
{ethernet.srcAddr[47:40]} for table table0
</title></rect>
-<rect x="16" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 139 in ternary Group 2
+<rect x="16" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 139 in ternary Group 2
contains:
{ethernet.etherType[15:8]} for table table0
</title></rect>
-<rect x="16" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 140 in ternary Group 2
+<rect x="16" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 140 in ternary Group 2
contains:
{ig_intr_md.ingress_port[7:0]} for table table0
</title></rect>
-<rect x="24" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 141 in ternary Group 2
+<rect x="24" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 141 in ternary Group 2
contains:
{ethernet.dstAddr[7:0]} for table table0
</title></rect>
-<rect x="24" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 142 in ternary Group 2
+<rect x="24" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 142 in ternary Group 2
contains:
{ethernet.srcAddr[39:32]} for table table0
</title></rect>
-<rect x="32" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 143 in ternary Group 2
+<rect x="32" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 143 in ternary Group 2
contains:
{ethernet.dstAddr[47:40]} for table table0
</title></rect>
@@ -3525,7 +900,7 @@
<rect x="32" y="632" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 193 in ternary Group 11</title></rect>
<text x="146" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="14" heightAdjust="spacingAndGlyphs" style="fill:black;">SRAMs</text>
<text x="410" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="14" heightAdjust="spacingAndGlyphs" style="fill:black;">SRAMs</text>
-<rect x="144" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>SRAM:
+<rect x="144" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>SRAM:
Row: 0 Col: 2
Unit Number: 2
Entry Bit Width: 128
@@ -3736,7 +1111,7 @@
Unit Number: 66
Entry Bit Width: 128
Depth: 1024</title></rect>
-<rect x="360" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:burlywood""><title>SRAM:
+<rect x="360" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>SRAM:
Row: 6 Col: 6
Unit Number: 78
Entry Bit Width: 128
@@ -3799,7 +1174,7 @@
Unit Number: 67
Entry Bit Width: 128
Depth: 1024</title></rect>
-<rect x="384" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:burlywood""><title>SRAM:
+<rect x="384" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>SRAM:
Row: 6 Col: 7
Unit Number: 79
Entry Bit Width: 128
@@ -3862,7 +1237,7 @@
Unit Number: 68
Entry Bit Width: 128
Depth: 1024</title></rect>
-<rect x="408" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>SRAM:
+<rect x="408" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>SRAM:
Row: 6 Col: 8
Unit Number: 80
Entry Bit Width: 128
@@ -4140,7 +1515,7 @@
Entry Bit Width: 44
Result Bit width: 1
Depth: 512</title></rect>
-<rect x="120" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>TCAM:
+<rect x="120" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>TCAM:
Row: 9 Col: 1
Unit Number: 21
Entry Bit Width: 44
@@ -4153,7 +1528,7 @@
Entry bits [131:88]
Connected to buses:
Ram Data Bus TcamMatchSearch2 9 left_and_right is 44 bits</title></rect>
-<rect x="120" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>TCAM:
+<rect x="120" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>TCAM:
Row: 10 Col: 1
Unit Number: 22
Entry Bit Width: 44
@@ -4166,7 +1541,7 @@
Entry bits [87:44]
Connected to buses:
Ram Data Bus TcamMatchSearch2 10 left_and_right is 44 bits</title></rect>
-<rect x="120" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>TCAM:
+<rect x="120" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>TCAM:
Row: 11 Col: 1
Unit Number: 23
Entry Bit Width: 44
@@ -4180,7 +1555,7 @@
Connected to buses:
Ram Data Bus TcamMatchSearch2 11 left_and_right is 44 bits</title></rect>
<text x="82" y="254" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Distr.</text>
-<rect x="80" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Hash Distribution Group:
+<rect x="80" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Hash Distribution Group:
Hash ID: 0
Group ID: 0
@@ -4208,7 +1583,7 @@
Group ID: 2
</title></rect>
<text x="170" y="238" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Bits</text>
-<rect x="176" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Hash Bit 0 in hash match group 0
+<rect x="176" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Hash Bit 0 in hash match group 0
Occupied by: table0__action__ for Immediate</title></rect>
<rect x="184" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 0</title></rect>
<rect x="192" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 0</title></rect>
@@ -4249,8 +1624,8 @@
<rect x="264" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 0</title></rect>
<rect x="272" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 0</title></rect>
<rect x="176" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 0</title></rect>
-<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Hash Bit 40 in hash match group 0
-Occupied by: _condition_1 for ('--validity_check--packet_out_hdr', 0)</title></rect>
+<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Hash Bit 40 in hash match group 0
+Occupied by: _condition_0 for ('--validity_check--packet_out_hdr', 0)</title></rect>
<rect x="192" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 0</title></rect>
<rect x="200" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 0</title></rect>
<rect x="208" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 0</title></rect>
@@ -4683,15 +2058,16 @@
Unit: 13
Entry Bit Width: 44
Depth: 4</title></rect>
-<rect x="72" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+<rect x="72" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Gateway Table Gateway:
Unit: 14
Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Gateway Table Gateway:
+ Depth: 4
+ Occupied By: process_packet_out_table_always_true_condition</title></rect>
+<rect x="72" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Gateway Table Gateway:
Unit: 15
Entry Bit Width: 44
Depth: 4
- Occupied By: _condition_1</title></rect>
+ Occupied By: _condition_0</title></rect>
<text x="242" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Stashes</text>
<rect x="248" y="208" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
Row: 0
@@ -4954,7 +2330,7 @@
Unit Number: 35
Entry Bit Width: 11
Depth: 1024</title></rect>
-<rect x="280" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:burlywood""><title>Map RAM:
+<rect x="280" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Map RAM:
Row: 6 Unit: 0
Unit Number: 36
Entry Bit Width: 11
@@ -4962,7 +2338,7 @@
Occupied By: table0_counter
Used For: synthetic two port
</title></rect>
-<rect x="288" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:burlywood""><title>Map RAM:
+<rect x="288" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Map RAM:
Row: 6 Unit: 1
Unit Number: 37
Entry Bit Width: 11
@@ -4990,7 +2366,7 @@
Unit Number: 41
Entry Bit Width: 11
Depth: 1024</title></rect>
-<rect x="280" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Map RAM:
+<rect x="280" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Map RAM:
Row: 7 Unit: 0
Unit Number: 42
Entry Bit Width: 11
@@ -5032,7 +2408,7 @@
Unit: 2 right</title></rect>
<rect x="336" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
Unit: 4 right</title></rect>
-<rect x="336" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:burlywood""><title>128-bit Statistics ALU:
+<rect x="336" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>128-bit Statistics ALU:
Unit: 6 right
Occupied By: table0_counter</title></rect>
<rect x="336" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
@@ -5044,26 +2420,31 @@
<rect x="336" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
Unit: 7 right</title></rect>
<text x="514" y="222" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">VLIW</text>
-<rect x="512" y="232" width="32" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>VLIW Instruction:
+<rect x="512" y="232" width="32" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>VLIW Instruction:
Number: 0
Occupied By: Match Table table0's action set_egress_port
with color 1 and direction ingress
</title></rect>
-<rect x="512" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>VLIW Instruction:
+<rect x="512" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>VLIW Instruction:
Number: 1
Occupied By: Match Table table0's action ecmp_group
with color 0 and direction ingress
</title></rect>
-<rect x="528" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>VLIW Instruction:
+<rect x="528" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>VLIW Instruction:
Number: 1
Occupied By: Match Table table0's action send_to_cpu
with color 1 and direction ingress
</title></rect>
-<rect x="512" y="248" width="32" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>VLIW Instruction:
+<rect x="512" y="248" width="16" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>VLIW Instruction:
Number: 2
Occupied By: Match Table table0's action _drop
with color 0 and direction ingress
</title></rect>
+<rect x="528" y="248" width="16" height="8" style="stroke:black; stroke-width:1; fill:burlywood""><title>VLIW Instruction:
+ Number: 2
+ Occupied By: Match Table process_packet_out_table's action _process_packet_out
+ with color 1 and direction ingress
+</title></rect>
<rect x="512" y="256" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
Number: 3</title></rect>
<rect x="512" y="264" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
@@ -5219,35 +2600,35 @@
<rect x="304" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
Byte Number: 31
</title></rect>
-<rect x="184" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="184" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 32
Occupied By: table0__action__</title></rect>
-<rect x="192" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="192" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 33
Occupied By: table0__action__</title></rect>
-<rect x="200" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="200" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 34
Occupied By: table0__action__</title></rect>
-<rect x="208" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="208" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 35
Occupied By: table0__action__</title></rect>
-<rect x="216" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="216" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 36
Occupied By: table0__action__</title></rect>
-<rect x="224" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="224" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 37
Occupied By: table0__action__</title></rect>
-<rect x="232" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="232" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 38
Occupied By: table0__action__</title></rect>
-<rect x="240" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="240" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 39
Occupied By: table0__action__</title></rect>
@@ -5516,13 +2897,14 @@
Byte Number: 127
</title></rect>
<text x="202" y="590" textLength="78" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Logical Table IDs</text>
-<rect x="184" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Logical Table ID:
+<rect x="184" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Logical Table ID:
ID: 0
Occupied By: table0</title></rect>
-<rect x="192" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+<rect x="192" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:burlywood""><title>Logical Table ID:
ID: 1
-</title></rect>
+
+ Occupied By: process_packet_out_table</title></rect>
<rect x="200" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
ID: 2
</title></rect>
@@ -5696,13 +3078,23 @@
Unit: 63</title></rect>
<rect x="600" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
Unit: 0</title></rect>
-<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 1</title></rect>
-<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>16-bit ALU:
+<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>16-bit ALU:
+ Unit: 1
+ Occupied By:
+For Match Table table0's action send_to_cpu:
+ deposit-field Instruction at PHV Container Number: 129 has bit width 23
+</title></rect>
+<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:burlywood""><title>16-bit ALU:
Unit: 2
Occupied By:
For Match Table table0's action set_egress_port:
deposit-field Instruction at PHV Container Number: 130 has bit width 23
+
+For Match Table table0's action send_to_cpu:
+ deposit-field Instruction at PHV Container Number: 130 has bit width 23
+
+For Match Table process_packet_out_table's action _process_packet_out:
+ deposit-field Instruction at PHV Container Number: 130 has bit width 23
</title></rect>
<rect x="624" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
Unit: 3</title></rect>
@@ -5710,13 +3102,13 @@
Unit: 4</title></rect>
<rect x="608" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
Unit: 5</title></rect>
-<rect x="616" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>16-bit ALU:
+<rect x="616" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>16-bit ALU:
Unit: 6
Occupied By:
For Match Table table0's action ecmp_group:
alu_a Instruction at PHV Container Number: 134 has bit width 23
</title></rect>
-<rect x="624" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>16-bit ALU:
+<rect x="624" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>16-bit ALU:
Unit: 7
Occupied By:
For Match Table table0's action ecmp_group:
@@ -5898,26 +3290,29 @@
Unit: 94</title></rect>
<rect x="624" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
Unit: 95</title></rect>
-<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>8-bit ALU:
- Unit: 0
- Occupied By:
-For Match Table table0's action send_to_cpu:
- deposit-field Instruction at PHV Container Number: 64 has bit width 20
-</title></rect>
+<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 0</title></rect>
<rect x="648" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
Unit: 1</title></rect>
<rect x="656" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
Unit: 2</title></rect>
-<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 3</title></rect>
-<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 4</title></rect>
-<rect x="648" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>8-bit ALU:
- Unit: 5
+<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:burlywood""><title>8-bit ALU:
+ Unit: 3
+ Occupied By:
+For Match Table table0's action send_to_cpu:
+ deposit-field Instruction at PHV Container Number: 67 has bit width 20
+
+For Match Table process_packet_out_table's action _process_packet_out:
+ deposit-field Instruction at PHV Container Number: 67 has bit width 20
+</title></rect>
+<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>8-bit ALU:
+ Unit: 4
Occupied By:
For Match Table table0's action _drop:
- deposit-field Instruction at PHV Container Number: 69 has bit width 20
+ deposit-field Instruction at PHV Container Number: 68 has bit width 20
</title></rect>
+<rect x="648" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 5</title></rect>
<rect x="656" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
Unit: 6</title></rect>
<rect x="664" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
@@ -6038,12 +3433,13 @@
<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
-<text x="738" y="78" style="fill:black; font-weight:bold;">Ingress Tables</text>
-<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>table0</title></rect>
+<rect x="720" y="64" width="16" height="16" style="stroke:black; stroke-width:1; fill:burlywood""><title>process_packet_out_table</title></rect>
+<text x="738" y="78" style="fill:black;">process_packet_out_table</text>
+<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>table0</title></rect>
<text x="738" y="102" style="fill:black;">table0</text>
-<rect x="720" y="112" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>table0__action__</title></rect>
+<rect x="720" y="112" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>table0__action__</title></rect>
<text x="738" y="126" style="fill:black;">table0__action__</text>
-<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:burlywood""><title>table0_counter</title></rect>
+<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>table0_counter</title></rect>
<text x="738" y="150" style="fill:black;">table0_counter</text>
<rect x="720" y="168" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
@@ -6062,7 +3458,7 @@
<text x="986" y="222" style="fill:black;">Hash Dist Unit</text>
<text x="994" y="246" style="fill:black;"> 1 of 6 (16.67%)</text>
<text x="986" y="270" style="fill:black;">Gateway</text>
-<text x="994" y="294" style="fill:black;"> 1 of 16 (6.25%)</text>
+<text x="994" y="294" style="fill:black;"> 2 of 16 (12.50%)</text>
<text x="986" y="318" style="fill:black;">SRAM</text>
<text x="994" y="342" style="fill:black;"> 4 of 80 (5.00%)</text>
<text x="986" y="366" style="fill:black;">Map RAM</text>
@@ -6080,13 +3476,13 @@
<text x="986" y="654" style="fill:black;">Action Data Bus Bytes</text>
<text x="994" y="678" style="fill:black;"> 8 of 128 (6.25%)</text>
<text x="986" y="702" style="fill:black;">Logical TableID</text>
-<text x="994" y="726" style="fill:black;"> 1 of 16 (6.25%)</text>
+<text x="994" y="726" style="fill:black;"> 2 of 16 (12.50%)</text>
<rect x="960" y="24" width="240" height="728" style="stroke:black; stroke-width:1; fill:none""></rect>
<rect x="968" y="32" width="224" height="712" style="stroke:black; stroke-width:1; fill:none""></rect>
<rect x="0" y="0" width="680" height="672" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
-<h2>MAU Stage 2</h2>
+<h2>MAU Stage 1</h2>
<svg width="95%" height="95%" viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
<rect x="16" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:chartreuse""><title>Crossbar Byte 0 in exact Group 0 (parity group 0)
@@ -8804,20 +6200,19 @@
<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
-<text x="738" y="78" style="fill:black; font-weight:bold;">Ingress Tables</text>
-<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:chartreuse""><title>ecmp_group_table</title></rect>
-<text x="738" y="102" style="fill:black;">ecmp_group_table</text>
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-<line x1="720" y1="184" x2="736" y2="168" style="stroke:black; stroke-width:2" />
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-<rect x="712" y="32" width="224" height="168" style="stroke:black; stroke-width:1; fill:none""></rect>
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+<line x1="720" y1="160" x2="736" y2="144" style="stroke:black; stroke-width:2" />
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<text x="978" y="54" style="fill:black;">Totals</text>
<text x="986" y="78" style="fill:black;">Exact Match Input xbar</text>
<text x="994" y="102" style="fill:black;"> 4 of 128 (3.12%)</text>
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</svg><br>
-<h2>MAU Stage 3</h2>
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<svg width="95%" height="95%" viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
<rect x="16" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:cornflowerblue""><title>Crossbar Byte 0 in exact Group 0 (parity group 0)
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<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
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-<line x1="720" y1="208" x2="736" y2="192" style="stroke:black; stroke-width:2" />
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-<rect x="712" y="32" width="224" height="192" style="stroke:black; stroke-width:1; fill:none""></rect>
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+<line x1="720" y1="184" x2="736" y2="168" style="stroke:black; stroke-width:2" />
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<text x="978" y="54" style="fill:black;">Totals</text>
<text x="986" y="78" style="fill:black;">Exact Match Input xbar</text>
<text x="994" y="102" style="fill:black;"> 2 of 128 (1.56%)</text>
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</svg><br>
+<h2>MAU Stage 3</h2>
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+<rect x="40" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 9 in exact Group 0 (parity group 1)</title></rect>
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+<rect x="40" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 11 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 12 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 13 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 14 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 15 in exact Group 0 (parity group 1)</title></rect>
+<rect x="16" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 16 in exact Group 1 (parity group 2)</title></rect>
+<rect x="16" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 17 in exact Group 1 (parity group 2)</title></rect>
+<rect x="16" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 18 in exact Group 1 (parity group 2)</title></rect>
+<rect x="16" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 19 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 20 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 21 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 22 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 23 in exact Group 1 (parity group 2)</title></rect>
+<rect x="40" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 24 in exact Group 1 (parity group 3)</title></rect>
+<rect x="40" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 25 in exact Group 1 (parity group 3)</title></rect>
+<rect x="40" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 26 in exact Group 1 (parity group 3)</title></rect>
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+<rect x="48" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 29 in exact Group 1 (parity group 3)</title></rect>
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+<rect x="48" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 31 in exact Group 1 (parity group 3)</title></rect>
+<rect x="16" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 32 in exact Group 2 (parity group 4)</title></rect>
+<rect x="16" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 33 in exact Group 2 (parity group 4)</title></rect>
+<rect x="16" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 34 in exact Group 2 (parity group 4)</title></rect>
+<rect x="16" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 35 in exact Group 2 (parity group 4)</title></rect>
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+<rect x="24" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 37 in exact Group 2 (parity group 4)</title></rect>
+<rect x="24" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 38 in exact Group 2 (parity group 4)</title></rect>
+<rect x="24" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 39 in exact Group 2 (parity group 4)</title></rect>
+<rect x="40" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 40 in exact Group 2 (parity group 5)</title></rect>
+<rect x="40" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 41 in exact Group 2 (parity group 5)</title></rect>
+<rect x="40" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 42 in exact Group 2 (parity group 5)</title></rect>
+<rect x="40" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 43 in exact Group 2 (parity group 5)</title></rect>
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+<rect x="48" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 45 in exact Group 2 (parity group 5)</title></rect>
+<rect x="48" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 46 in exact Group 2 (parity group 5)</title></rect>
+<rect x="48" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 47 in exact Group 2 (parity group 5)</title></rect>
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+<rect x="16" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 49 in exact Group 3 (parity group 6)</title></rect>
+<rect x="16" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 50 in exact Group 3 (parity group 6)</title></rect>
+<rect x="16" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 51 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 52 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 53 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 54 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 55 in exact Group 3 (parity group 6)</title></rect>
+<rect x="40" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 56 in exact Group 3 (parity group 7)</title></rect>
+<rect x="40" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 57 in exact Group 3 (parity group 7)</title></rect>
+<rect x="40" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 58 in exact Group 3 (parity group 7)</title></rect>
+<rect x="40" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 59 in exact Group 3 (parity group 7)</title></rect>
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+<rect x="48" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 61 in exact Group 3 (parity group 7)</title></rect>
+<rect x="48" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 62 in exact Group 3 (parity group 7)</title></rect>
+<rect x="48" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 63 in exact Group 3 (parity group 7)</title></rect>
+<rect x="16" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 64 in exact Group 4 (parity group 8)</title></rect>
+<rect x="16" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 65 in exact Group 4 (parity group 8)</title></rect>
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+<rect x="24" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 68 in exact Group 4 (parity group 8)</title></rect>
+<rect x="24" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 69 in exact Group 4 (parity group 8)</title></rect>
+<rect x="24" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 70 in exact Group 4 (parity group 8)</title></rect>
+<rect x="24" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 71 in exact Group 4 (parity group 8)</title></rect>
+<rect x="40" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 72 in exact Group 4 (parity group 9)</title></rect>
+<rect x="40" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 73 in exact Group 4 (parity group 9)</title></rect>
+<rect x="40" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 74 in exact Group 4 (parity group 9)</title></rect>
+<rect x="40" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 75 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 76 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 77 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 78 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 79 in exact Group 4 (parity group 9)</title></rect>
+<rect x="16" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 80 in exact Group 5 (parity group 10)</title></rect>
+<rect x="16" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 81 in exact Group 5 (parity group 10)</title></rect>
+<rect x="16" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 82 in exact Group 5 (parity group 10)</title></rect>
+<rect x="16" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 83 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 84 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 85 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 86 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 87 in exact Group 5 (parity group 10)</title></rect>
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+<rect x="40" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 89 in exact Group 5 (parity group 11)</title></rect>
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+<rect x="48" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 94 in exact Group 5 (parity group 11)</title></rect>
+<rect x="48" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 95 in exact Group 5 (parity group 11)</title></rect>
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+<rect x="24" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 102 in exact Group 6 (parity group 12)</title></rect>
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+<rect x="16" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 115 in exact Group 7 (parity group 14)</title></rect>
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+<rect x="24" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 119 in exact Group 7 (parity group 14)</title></rect>
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+<rect x="40" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 123 in exact Group 7 (parity group 15)</title></rect>
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+<rect x="48" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 125 in exact Group 7 (parity group 15)</title></rect>
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+<rect x="24" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 130 in ternary Group 0</title></rect>
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+<rect x="16" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 135 in ternary Group 1</title></rect>
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+<rect x="32" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 138 in ternary Group 1</title></rect>
+<rect x="16" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 139 in ternary Group 2</title></rect>
+<rect x="16" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 140 in ternary Group 2</title></rect>
+<rect x="24" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 141 in ternary Group 2</title></rect>
+<rect x="24" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 142 in ternary Group 2</title></rect>
+<rect x="32" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 143 in ternary Group 2</title></rect>
+<rect x="48" y="432" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 144 in ternary Group 1</title></rect>
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+ Unit Number: 2
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+ Group ID: 0
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+ Group ID: 0
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+ Group ID: 1
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+ Group ID: 2
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+<text x="170" y="238" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Bits</text>
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+<rect x="184" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 0</title></rect>
+<rect x="192" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 0</title></rect>
+<rect x="200" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 0</title></rect>
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+<rect x="240" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 0</title></rect>
+<rect x="248" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 0</title></rect>
+<rect x="256" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 0</title></rect>
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+<rect x="272" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 0</title></rect>
+<rect x="176" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 0</title></rect>
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+<rect x="224" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 0</title></rect>
+<rect x="232" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 0</title></rect>
+<rect x="240" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 0</title></rect>
+<rect x="248" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 0</title></rect>
+<rect x="256" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 0</title></rect>
+<rect x="264" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 0</title></rect>
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+<rect x="176" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 0</title></rect>
+<rect x="184" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 0</title></rect>
+<rect x="192" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 0</title></rect>
+<rect x="200" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 0</title></rect>
+<rect x="208" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 0</title></rect>
+<rect x="216" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 0</title></rect>
+<rect x="224" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 0</title></rect>
+<rect x="232" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 0</title></rect>
+<rect x="240" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 0</title></rect>
+<rect x="248" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 0</title></rect>
+<rect x="256" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 0</title></rect>
+<rect x="264" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 0</title></rect>
+<rect x="272" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 0</title></rect>
+<rect x="176" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 0</title></rect>
+<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 0</title></rect>
+<rect x="192" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 0</title></rect>
+<rect x="200" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 0</title></rect>
+<rect x="208" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 0</title></rect>
+<rect x="216" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 0</title></rect>
+<rect x="224" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 0</title></rect>
+<rect x="232" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 0</title></rect>
+<rect x="240" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 0</title></rect>
+<rect x="248" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 0</title></rect>
+<rect x="256" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 0</title></rect>
+<rect x="264" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 0</title></rect>
+<rect x="272" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 0</title></rect>
+<rect x="296" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 1</title></rect>
+<rect x="304" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 1</title></rect>
+<rect x="312" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 1</title></rect>
+<rect x="320" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 1</title></rect>
+<rect x="328" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 1</title></rect>
+<rect x="336" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 1</title></rect>
+<rect x="344" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 1</title></rect>
+<rect x="352" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 1</title></rect>
+<rect x="360" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 1</title></rect>
+<rect x="368" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 1</title></rect>
+<rect x="376" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 1</title></rect>
+<rect x="384" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 1</title></rect>
+<rect x="392" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 1</title></rect>
+<rect x="296" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 1</title></rect>
+<rect x="304" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 1</title></rect>
+<rect x="312" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 1</title></rect>
+<rect x="320" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 1</title></rect>
+<rect x="328" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 1</title></rect>
+<rect x="336" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 1</title></rect>
+<rect x="344" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 1</title></rect>
+<rect x="352" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 1</title></rect>
+<rect x="360" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 1</title></rect>
+<rect x="368" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 1</title></rect>
+<rect x="376" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 1</title></rect>
+<rect x="384" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 1</title></rect>
+<rect x="392" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 1</title></rect>
+<rect x="296" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 1</title></rect>
+<rect x="304" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 1</title></rect>
+<rect x="312" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 1</title></rect>
+<rect x="320" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 1</title></rect>
+<rect x="328" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 1</title></rect>
+<rect x="336" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 1</title></rect>
+<rect x="344" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 1</title></rect>
+<rect x="352" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 1</title></rect>
+<rect x="360" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 1</title></rect>
+<rect x="368" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 1</title></rect>
+<rect x="376" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 1</title></rect>
+<rect x="384" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 1</title></rect>
+<rect x="392" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 1</title></rect>
+<rect x="296" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 1</title></rect>
+<rect x="304" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 1</title></rect>
+<rect x="312" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 1</title></rect>
+<rect x="320" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 1</title></rect>
+<rect x="328" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 1</title></rect>
+<rect x="336" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 1</title></rect>
+<rect x="344" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 1</title></rect>
+<rect x="352" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 1</title></rect>
+<rect x="360" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 1</title></rect>
+<rect x="368" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 1</title></rect>
+<rect x="376" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 1</title></rect>
+<rect x="384" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 1</title></rect>
+<rect x="392" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 1</title></rect>
+<rect x="176" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 2</title></rect>
+<rect x="184" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 2</title></rect>
+<rect x="192" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 2</title></rect>
+<rect x="200" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 2</title></rect>
+<rect x="208" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 2</title></rect>
+<rect x="216" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 2</title></rect>
+<rect x="224" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 2</title></rect>
+<rect x="232" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 2</title></rect>
+<rect x="240" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 2</title></rect>
+<rect x="248" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 2</title></rect>
+<rect x="256" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 2</title></rect>
+<rect x="264" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 2</title></rect>
+<rect x="272" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 2</title></rect>
+<rect x="176" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 2</title></rect>
+<rect x="184" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 2</title></rect>
+<rect x="192" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 2</title></rect>
+<rect x="200" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 2</title></rect>
+<rect x="208" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 2</title></rect>
+<rect x="216" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 2</title></rect>
+<rect x="224" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 2</title></rect>
+<rect x="232" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 2</title></rect>
+<rect x="240" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 2</title></rect>
+<rect x="248" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 2</title></rect>
+<rect x="256" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 2</title></rect>
+<rect x="264" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 2</title></rect>
+<rect x="272" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 2</title></rect>
+<rect x="176" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 2</title></rect>
+<rect x="184" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 2</title></rect>
+<rect x="192" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 2</title></rect>
+<rect x="200" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 2</title></rect>
+<rect x="208" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 2</title></rect>
+<rect x="216" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 2</title></rect>
+<rect x="224" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 2</title></rect>
+<rect x="232" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 2</title></rect>
+<rect x="240" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 2</title></rect>
+<rect x="248" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 2</title></rect>
+<rect x="256" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 2</title></rect>
+<rect x="264" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 2</title></rect>
+<rect x="272" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 2</title></rect>
+<rect x="176" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 2</title></rect>
+<rect x="184" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 2</title></rect>
+<rect x="192" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 2</title></rect>
+<rect x="200" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 2</title></rect>
+<rect x="208" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 2</title></rect>
+<rect x="216" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 2</title></rect>
+<rect x="224" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 2</title></rect>
+<rect x="232" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 2</title></rect>
+<rect x="240" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 2</title></rect>
+<rect x="248" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 2</title></rect>
+<rect x="256" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 2</title></rect>
+<rect x="264" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 2</title></rect>
+<rect x="272" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 2</title></rect>
+<rect x="296" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 3</title></rect>
+<rect x="304" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 3</title></rect>
+<rect x="312" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 3</title></rect>
+<rect x="320" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 3</title></rect>
+<rect x="328" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 3</title></rect>
+<rect x="336" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 3</title></rect>
+<rect x="344" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 3</title></rect>
+<rect x="352" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 3</title></rect>
+<rect x="360" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 3</title></rect>
+<rect x="368" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 3</title></rect>
+<rect x="376" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 3</title></rect>
+<rect x="384" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 3</title></rect>
+<rect x="392" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 3</title></rect>
+<rect x="296" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 3</title></rect>
+<rect x="304" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 3</title></rect>
+<rect x="312" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 3</title></rect>
+<rect x="320" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 3</title></rect>
+<rect x="328" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 3</title></rect>
+<rect x="336" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 3</title></rect>
+<rect x="344" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 3</title></rect>
+<rect x="352" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 3</title></rect>
+<rect x="360" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 3</title></rect>
+<rect x="368" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 3</title></rect>
+<rect x="376" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 3</title></rect>
+<rect x="384" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 3</title></rect>
+<rect x="392" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 3</title></rect>
+<rect x="296" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 3</title></rect>
+<rect x="304" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 3</title></rect>
+<rect x="312" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 3</title></rect>
+<rect x="320" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 3</title></rect>
+<rect x="328" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 3</title></rect>
+<rect x="336" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 3</title></rect>
+<rect x="344" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 3</title></rect>
+<rect x="352" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 3</title></rect>
+<rect x="360" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 3</title></rect>
+<rect x="368" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 3</title></rect>
+<rect x="376" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 3</title></rect>
+<rect x="384" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 3</title></rect>
+<rect x="392" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 3</title></rect>
+<rect x="296" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 3</title></rect>
+<rect x="304" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 3</title></rect>
+<rect x="312" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 3</title></rect>
+<rect x="320" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 3</title></rect>
+<rect x="328" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 3</title></rect>
+<rect x="336" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 3</title></rect>
+<rect x="344" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 3</title></rect>
+<rect x="352" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 3</title></rect>
+<rect x="360" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 3</title></rect>
+<rect x="368" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 3</title></rect>
+<rect x="376" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 3</title></rect>
+<rect x="384" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 3</title></rect>
+<rect x="392" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 3</title></rect>
+<rect x="176" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 4</title></rect>
+<rect x="184" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 4</title></rect>
+<rect x="192" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 4</title></rect>
+<rect x="200" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 4</title></rect>
+<rect x="208" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 4</title></rect>
+<rect x="216" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 4</title></rect>
+<rect x="224" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 4</title></rect>
+<rect x="232" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 4</title></rect>
+<rect x="240" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 4</title></rect>
+<rect x="248" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 4</title></rect>
+<rect x="256" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 4</title></rect>
+<rect x="264" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 4</title></rect>
+<rect x="272" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 4</title></rect>
+<rect x="176" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 4</title></rect>
+<rect x="184" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 4</title></rect>
+<rect x="192" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 4</title></rect>
+<rect x="200" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 4</title></rect>
+<rect x="208" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 4</title></rect>
+<rect x="216" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 4</title></rect>
+<rect x="224" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 4</title></rect>
+<rect x="232" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 4</title></rect>
+<rect x="240" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 4</title></rect>
+<rect x="248" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 4</title></rect>
+<rect x="256" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 4</title></rect>
+<rect x="264" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 4</title></rect>
+<rect x="272" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 4</title></rect>
+<rect x="176" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 4</title></rect>
+<rect x="184" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 4</title></rect>
+<rect x="192" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 4</title></rect>
+<rect x="200" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 4</title></rect>
+<rect x="208" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 4</title></rect>
+<rect x="216" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 4</title></rect>
+<rect x="224" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 4</title></rect>
+<rect x="232" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 4</title></rect>
+<rect x="240" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 4</title></rect>
+<rect x="248" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 4</title></rect>
+<rect x="256" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 4</title></rect>
+<rect x="264" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 4</title></rect>
+<rect x="272" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 4</title></rect>
+<rect x="176" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 4</title></rect>
+<rect x="184" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 4</title></rect>
+<rect x="192" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 4</title></rect>
+<rect x="200" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 4</title></rect>
+<rect x="208" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 4</title></rect>
+<rect x="216" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 4</title></rect>
+<rect x="224" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 4</title></rect>
+<rect x="232" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 4</title></rect>
+<rect x="240" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 4</title></rect>
+<rect x="248" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 4</title></rect>
+<rect x="256" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 4</title></rect>
+<rect x="264" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 4</title></rect>
+<rect x="272" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 4</title></rect>
+<rect x="296" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 5</title></rect>
+<rect x="304" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 5</title></rect>
+<rect x="312" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 5</title></rect>
+<rect x="320" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 5</title></rect>
+<rect x="328" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 5</title></rect>
+<rect x="336" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 5</title></rect>
+<rect x="344" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 5</title></rect>
+<rect x="352" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 5</title></rect>
+<rect x="360" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 5</title></rect>
+<rect x="368" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 5</title></rect>
+<rect x="376" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 5</title></rect>
+<rect x="384" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 5</title></rect>
+<rect x="392" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 5</title></rect>
+<rect x="296" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 5</title></rect>
+<rect x="304" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 5</title></rect>
+<rect x="312" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 5</title></rect>
+<rect x="320" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 5</title></rect>
+<rect x="328" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 5</title></rect>
+<rect x="336" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 5</title></rect>
+<rect x="344" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 5</title></rect>
+<rect x="352" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 5</title></rect>
+<rect x="360" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 5</title></rect>
+<rect x="368" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 5</title></rect>
+<rect x="376" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 5</title></rect>
+<rect x="384" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 5</title></rect>
+<rect x="392" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 5</title></rect>
+<rect x="296" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 5</title></rect>
+<rect x="304" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 5</title></rect>
+<rect x="312" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 5</title></rect>
+<rect x="320" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 5</title></rect>
+<rect x="328" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 5</title></rect>
+<rect x="336" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 5</title></rect>
+<rect x="344" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 5</title></rect>
+<rect x="352" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 5</title></rect>
+<rect x="360" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 5</title></rect>
+<rect x="368" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 5</title></rect>
+<rect x="376" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 5</title></rect>
+<rect x="384" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 5</title></rect>
+<rect x="392" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 5</title></rect>
+<rect x="296" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 5</title></rect>
+<rect x="304" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 5</title></rect>
+<rect x="312" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 5</title></rect>
+<rect x="320" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 5</title></rect>
+<rect x="328" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 5</title></rect>
+<rect x="336" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 5</title></rect>
+<rect x="344" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 5</title></rect>
+<rect x="352" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 5</title></rect>
+<rect x="360" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 5</title></rect>
+<rect x="368" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 5</title></rect>
+<rect x="376" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 5</title></rect>
+<rect x="384" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 5</title></rect>
+<rect x="392" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 5</title></rect>
+<rect x="176" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 6</title></rect>
+<rect x="184" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 6</title></rect>
+<rect x="192" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 6</title></rect>
+<rect x="200" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 6</title></rect>
+<rect x="208" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 6</title></rect>
+<rect x="216" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 6</title></rect>
+<rect x="224" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 6</title></rect>
+<rect x="232" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 6</title></rect>
+<rect x="240" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 6</title></rect>
+<rect x="248" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 6</title></rect>
+<rect x="256" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 6</title></rect>
+<rect x="264" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 6</title></rect>
+<rect x="272" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 6</title></rect>
+<rect x="176" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 6</title></rect>
+<rect x="184" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 6</title></rect>
+<rect x="192" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 6</title></rect>
+<rect x="200" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 6</title></rect>
+<rect x="208" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 6</title></rect>
+<rect x="216" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 6</title></rect>
+<rect x="224" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 6</title></rect>
+<rect x="232" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 6</title></rect>
+<rect x="240" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 6</title></rect>
+<rect x="248" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 6</title></rect>
+<rect x="256" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 6</title></rect>
+<rect x="264" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 6</title></rect>
+<rect x="272" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 6</title></rect>
+<rect x="176" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 6</title></rect>
+<rect x="184" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 6</title></rect>
+<rect x="192" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 6</title></rect>
+<rect x="200" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 6</title></rect>
+<rect x="208" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 6</title></rect>
+<rect x="216" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 6</title></rect>
+<rect x="224" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 6</title></rect>
+<rect x="232" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 6</title></rect>
+<rect x="240" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 6</title></rect>
+<rect x="248" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 6</title></rect>
+<rect x="256" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 6</title></rect>
+<rect x="264" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 6</title></rect>
+<rect x="272" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 6</title></rect>
+<rect x="176" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 6</title></rect>
+<rect x="184" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 6</title></rect>
+<rect x="192" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 6</title></rect>
+<rect x="200" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 6</title></rect>
+<rect x="208" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 6</title></rect>
+<rect x="216" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 6</title></rect>
+<rect x="224" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 6</title></rect>
+<rect x="232" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 6</title></rect>
+<rect x="240" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 6</title></rect>
+<rect x="248" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 6</title></rect>
+<rect x="256" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 6</title></rect>
+<rect x="264" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 6</title></rect>
+<rect x="272" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 6</title></rect>
+<rect x="296" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 7</title></rect>
+<rect x="304" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 7</title></rect>
+<rect x="312" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 7</title></rect>
+<rect x="320" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 7</title></rect>
+<rect x="328" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 7</title></rect>
+<rect x="336" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 7</title></rect>
+<rect x="344" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 7</title></rect>
+<rect x="352" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 7</title></rect>
+<rect x="360" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 7</title></rect>
+<rect x="368" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 7</title></rect>
+<rect x="376" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 7</title></rect>
+<rect x="384" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 7</title></rect>
+<rect x="392" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 7</title></rect>
+<rect x="296" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 7</title></rect>
+<rect x="304" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 7</title></rect>
+<rect x="312" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 7</title></rect>
+<rect x="320" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 7</title></rect>
+<rect x="328" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 7</title></rect>
+<rect x="336" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 7</title></rect>
+<rect x="344" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 7</title></rect>
+<rect x="352" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 7</title></rect>
+<rect x="360" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 7</title></rect>
+<rect x="368" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 7</title></rect>
+<rect x="376" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 7</title></rect>
+<rect x="384" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 7</title></rect>
+<rect x="392" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 7</title></rect>
+<rect x="296" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 7</title></rect>
+<rect x="304" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 7</title></rect>
+<rect x="312" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 7</title></rect>
+<rect x="320" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 7</title></rect>
+<rect x="328" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 7</title></rect>
+<rect x="336" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 7</title></rect>
+<rect x="344" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 7</title></rect>
+<rect x="352" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 7</title></rect>
+<rect x="360" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 7</title></rect>
+<rect x="368" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 7</title></rect>
+<rect x="376" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 7</title></rect>
+<rect x="384" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 7</title></rect>
+<rect x="392" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 7</title></rect>
+<rect x="296" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 7</title></rect>
+<rect x="304" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 7</title></rect>
+<rect x="312" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 7</title></rect>
+<rect x="320" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 7</title></rect>
+<rect x="328" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 7</title></rect>
+<rect x="336" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 7</title></rect>
+<rect x="344" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 7</title></rect>
+<rect x="352" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 7</title></rect>
+<rect x="360" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 7</title></rect>
+<rect x="368" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 7</title></rect>
+<rect x="376" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 7</title></rect>
+<rect x="384" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 7</title></rect>
+<rect x="392" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 7</title></rect>
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+<rect x="72" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 0
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 1
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 2
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 6
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 7
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 8
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 11
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 13
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
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+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 15
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
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+ Unit ID: 0
+ Global ID: 0
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+<rect x="248" y="200" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
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+<rect x="248" y="184" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
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+ Unit ID: 0
+ Global ID: 2
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+<rect x="248" y="176" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
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+ Global ID: 3
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+<rect x="248" y="160" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
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+ Global ID: 5
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+<rect x="248" y="136" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
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+ Unit ID: 0
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+ Unit ID: 1
+ Global ID: 7
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+<rect x="248" y="112" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
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+ Unit ID: 0
+ Global ID: 8
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+ Global ID: 9
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+ Global ID: 15
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+ Row: 0 Unit: 0
+ Unit Number: 0
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 1
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 2
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 3
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 4
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
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+ Unit Number: 5
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 0
+ Unit Number: 6
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 1
+ Unit Number: 7
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 2
+ Unit Number: 8
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 3
+ Unit Number: 9
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 4
+ Unit Number: 10
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 5
+ Unit Number: 11
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 0
+ Unit Number: 12
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 1
+ Unit Number: 13
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
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+ Row: 2 Unit: 2
+ Unit Number: 14
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+ Byte Number: 17
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+ Byte Number: 18
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+ Byte Number: 19
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+ Byte Number: 20
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+ Byte Number: 21
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+ Byte Number: 22
+</title></rect>
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+ Byte Number: 23
+</title></rect>
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+ Byte Number: 24
+</title></rect>
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+ Byte Number: 25
+</title></rect>
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+ Byte Number: 26
+</title></rect>
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+ Byte Number: 27
+</title></rect>
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+ Byte Number: 28
+</title></rect>
+<rect x="288" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 29
+</title></rect>
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+ Byte Number: 30
+</title></rect>
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+ Byte Number: 31
+</title></rect>
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+ Byte Number: 32
+</title></rect>
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+ Byte Number: 33
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+ Byte Number: 34
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+ Byte Number: 35
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+ Byte Number: 36
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+ Byte Number: 37
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+ Byte Number: 38
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+ Byte Number: 39
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+ Byte Number: 40
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+ Byte Number: 41
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+ Byte Number: 42
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+ Byte Number: 43
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+ Byte Number: 44
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+ Byte Number: 45
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+ Byte Number: 46
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+ Byte Number: 47
+</title></rect>
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+ Byte Number: 48
+</title></rect>
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+ Byte Number: 49
+</title></rect>
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+ Byte Number: 50
+</title></rect>
+<rect x="336" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 51
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+ Byte Number: 60
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+ Byte Number: 64
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+ Byte Number: 65
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+ Byte Number: 66
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+ Byte Number: 67
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+ Byte Number: 68
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+ Byte Number: 69
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+ Byte Number: 70
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+ Byte Number: 71
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+ Byte Number: 72
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+ Byte Number: 73
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+ Byte Number: 74
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+ Byte Number: 75
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+ Byte Number: 76
+</title></rect>
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+ Byte Number: 77
+</title></rect>
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+ Byte Number: 78
+</title></rect>
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+ Byte Number: 79
+</title></rect>
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+ Byte Number: 80
+</title></rect>
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+ Byte Number: 81
+</title></rect>
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+ Byte Number: 82
+</title></rect>
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+ Byte Number: 83
+</title></rect>
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+ Byte Number: 84
+</title></rect>
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+ Byte Number: 85
+</title></rect>
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+ Byte Number: 86
+</title></rect>
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+ Byte Number: 87
+</title></rect>
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+ Byte Number: 88
+</title></rect>
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+ Byte Number: 89
+</title></rect>
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+ Byte Number: 90
+</title></rect>
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+ Byte Number: 91
+</title></rect>
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+ Byte Number: 92
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+ Byte Number: 93
+</title></rect>
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+ Byte Number: 94
+</title></rect>
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+ Byte Number: 95
+</title></rect>
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+ Byte Number: 96
+</title></rect>
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+ Byte Number: 97
+</title></rect>
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+ Byte Number: 98
+</title></rect>
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+ Byte Number: 99
+</title></rect>
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+ Byte Number: 100
+</title></rect>
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+ Byte Number: 101
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+ Byte Number: 102
+</title></rect>
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+ Byte Number: 103
+</title></rect>
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+ Byte Number: 104
+</title></rect>
+<rect x="256" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 105
+</title></rect>
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+ Byte Number: 106
+</title></rect>
+<rect x="272" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 107
+</title></rect>
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+ Byte Number: 108
+</title></rect>
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+ Byte Number: 109
+</title></rect>
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+ Byte Number: 110
+</title></rect>
+<rect x="304" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 111
+</title></rect>
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+ Byte Number: 112
+</title></rect>
+<rect x="320" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 113
+</title></rect>
+<rect x="328" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 114
+</title></rect>
+<rect x="336" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 115
+</title></rect>
+<rect x="344" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 116
+</title></rect>
+<rect x="352" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 117
+</title></rect>
+<rect x="360" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 118
+</title></rect>
+<rect x="368" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 119
+</title></rect>
+<rect x="376" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 120
+</title></rect>
+<rect x="384" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 121
+</title></rect>
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+ Byte Number: 122
+</title></rect>
+<rect x="400" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 123
+</title></rect>
+<rect x="408" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 124
+</title></rect>
+<rect x="416" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 125
+</title></rect>
+<rect x="424" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 126
+</title></rect>
+<rect x="432" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
+ Byte Number: 127
+</title></rect>
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+</title></rect>
+<rect x="192" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
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+</title></rect>
+<rect x="200" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
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+</title></rect>
+<rect x="208" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
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+</title></rect>
+<rect x="216" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
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+</title></rect>
+<rect x="224" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 5
+</title></rect>
+<rect x="232" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 6
+</title></rect>
+<rect x="240" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 7
+</title></rect>
+<rect x="248" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 8
+</title></rect>
+<rect x="256" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 9
+</title></rect>
+<rect x="264" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 10
+</title></rect>
+<rect x="272" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 11
+</title></rect>
+<rect x="280" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 12
+</title></rect>
+<rect x="288" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 13
+</title></rect>
+<rect x="296" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 14
+</title></rect>
+<rect x="304" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 15
+</title></rect>
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+<rect x="560" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 0</title></rect>
+<rect x="568" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 1</title></rect>
+<rect x="576" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 2</title></rect>
+<rect x="584" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 3</title></rect>
+<rect x="560" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 4</title></rect>
+<rect x="568" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 5</title></rect>
+<rect x="576" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 6</title></rect>
+<rect x="584" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 7</title></rect>
+<rect x="560" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 8</title></rect>
+<rect x="568" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 9</title></rect>
+<rect x="576" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 10</title></rect>
+<rect x="584" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 11</title></rect>
+<rect x="560" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 12</title></rect>
+<rect x="568" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 13</title></rect>
+<rect x="576" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 14</title></rect>
+<rect x="584" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 15</title></rect>
+<rect x="560" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 16</title></rect>
+<rect x="568" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 17</title></rect>
+<rect x="576" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 18</title></rect>
+<rect x="584" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 19</title></rect>
+<rect x="560" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 20</title></rect>
+<rect x="568" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 21</title></rect>
+<rect x="576" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 22</title></rect>
+<rect x="584" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 23</title></rect>
+<rect x="560" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 24</title></rect>
+<rect x="568" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 25</title></rect>
+<rect x="576" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 26</title></rect>
+<rect x="584" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 27</title></rect>
+<rect x="560" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 28</title></rect>
+<rect x="568" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 29</title></rect>
+<rect x="576" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 30</title></rect>
+<rect x="584" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 31</title></rect>
+<rect x="560" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 32</title></rect>
+<rect x="568" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 33</title></rect>
+<rect x="576" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 34</title></rect>
+<rect x="584" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 35</title></rect>
+<rect x="560" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 36</title></rect>
+<rect x="568" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 37</title></rect>
+<rect x="576" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 38</title></rect>
+<rect x="584" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 39</title></rect>
+<rect x="560" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 40</title></rect>
+<rect x="568" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 41</title></rect>
+<rect x="576" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 42</title></rect>
+<rect x="584" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 43</title></rect>
+<rect x="560" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 44</title></rect>
+<rect x="568" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 45</title></rect>
+<rect x="576" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 46</title></rect>
+<rect x="584" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 47</title></rect>
+<rect x="560" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 48</title></rect>
+<rect x="568" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 49</title></rect>
+<rect x="576" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 50</title></rect>
+<rect x="584" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 51</title></rect>
+<rect x="560" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 52</title></rect>
+<rect x="568" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 53</title></rect>
+<rect x="576" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 54</title></rect>
+<rect x="584" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 55</title></rect>
+<rect x="560" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 56</title></rect>
+<rect x="568" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 57</title></rect>
+<rect x="576" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 58</title></rect>
+<rect x="584" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 59</title></rect>
+<rect x="560" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 60</title></rect>
+<rect x="568" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 61</title></rect>
+<rect x="576" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 62</title></rect>
+<rect x="584" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 63</title></rect>
+<rect x="600" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 0</title></rect>
+<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 1</title></rect>
+<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 2</title></rect>
+<rect x="624" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 3</title></rect>
+<rect x="600" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 4</title></rect>
+<rect x="608" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 5</title></rect>
+<rect x="616" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 6</title></rect>
+<rect x="624" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 7</title></rect>
+<rect x="600" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 8</title></rect>
+<rect x="608" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 9</title></rect>
+<rect x="616" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 10</title></rect>
+<rect x="624" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 11</title></rect>
+<rect x="600" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 12</title></rect>
+<rect x="608" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 13</title></rect>
+<rect x="616" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 14</title></rect>
+<rect x="624" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 15</title></rect>
+<rect x="600" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 16</title></rect>
+<rect x="608" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 17</title></rect>
+<rect x="616" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 18</title></rect>
+<rect x="624" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 19</title></rect>
+<rect x="600" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 20</title></rect>
+<rect x="608" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 21</title></rect>
+<rect x="616" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 22</title></rect>
+<rect x="624" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 23</title></rect>
+<rect x="600" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 24</title></rect>
+<rect x="608" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 25</title></rect>
+<rect x="616" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 26</title></rect>
+<rect x="624" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 27</title></rect>
+<rect x="600" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 28</title></rect>
+<rect x="608" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 29</title></rect>
+<rect x="616" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 30</title></rect>
+<rect x="624" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 31</title></rect>
+<rect x="600" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 32</title></rect>
+<rect x="608" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 33</title></rect>
+<rect x="616" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 34</title></rect>
+<rect x="624" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 35</title></rect>
+<rect x="600" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 36</title></rect>
+<rect x="608" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 37</title></rect>
+<rect x="616" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 38</title></rect>
+<rect x="624" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 39</title></rect>
+<rect x="600" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 40</title></rect>
+<rect x="608" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 41</title></rect>
+<rect x="616" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 42</title></rect>
+<rect x="624" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 43</title></rect>
+<rect x="600" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 44</title></rect>
+<rect x="608" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 45</title></rect>
+<rect x="616" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 46</title></rect>
+<rect x="624" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 47</title></rect>
+<rect x="600" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 48</title></rect>
+<rect x="608" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 49</title></rect>
+<rect x="616" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 50</title></rect>
+<rect x="624" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 51</title></rect>
+<rect x="600" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 52</title></rect>
+<rect x="608" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 53</title></rect>
+<rect x="616" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 54</title></rect>
+<rect x="624" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 55</title></rect>
+<rect x="600" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 56</title></rect>
+<rect x="608" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 57</title></rect>
+<rect x="616" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 58</title></rect>
+<rect x="624" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 59</title></rect>
+<rect x="600" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 60</title></rect>
+<rect x="608" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 61</title></rect>
+<rect x="616" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 62</title></rect>
+<rect x="624" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 63</title></rect>
+<rect x="600" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 64</title></rect>
+<rect x="608" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 65</title></rect>
+<rect x="616" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 66</title></rect>
+<rect x="624" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 67</title></rect>
+<rect x="600" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 68</title></rect>
+<rect x="608" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 69</title></rect>
+<rect x="616" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 70</title></rect>
+<rect x="624" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 71</title></rect>
+<rect x="600" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 72</title></rect>
+<rect x="608" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 73</title></rect>
+<rect x="616" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 74</title></rect>
+<rect x="624" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 75</title></rect>
+<rect x="600" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 76</title></rect>
+<rect x="608" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 77</title></rect>
+<rect x="616" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 78</title></rect>
+<rect x="624" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 79</title></rect>
+<rect x="600" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 80</title></rect>
+<rect x="608" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 81</title></rect>
+<rect x="616" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 82</title></rect>
+<rect x="624" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 83</title></rect>
+<rect x="600" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 84</title></rect>
+<rect x="608" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 85</title></rect>
+<rect x="616" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 86</title></rect>
+<rect x="624" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 87</title></rect>
+<rect x="600" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 88</title></rect>
+<rect x="608" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 89</title></rect>
+<rect x="616" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 90</title></rect>
+<rect x="624" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 91</title></rect>
+<rect x="600" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 92</title></rect>
+<rect x="608" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 93</title></rect>
+<rect x="616" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 94</title></rect>
+<rect x="624" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 95</title></rect>
+<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 0</title></rect>
+<rect x="648" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 1</title></rect>
+<rect x="656" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 2</title></rect>
+<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 3</title></rect>
+<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 4</title></rect>
+<rect x="648" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 5</title></rect>
+<rect x="656" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 6</title></rect>
+<rect x="664" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 7</title></rect>
+<rect x="640" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 8</title></rect>
+<rect x="648" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 9</title></rect>
+<rect x="656" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 10</title></rect>
+<rect x="664" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 11</title></rect>
+<rect x="640" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 12</title></rect>
+<rect x="648" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 13</title></rect>
+<rect x="656" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 14</title></rect>
+<rect x="664" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 15</title></rect>
+<rect x="640" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 16</title></rect>
+<rect x="648" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 17</title></rect>
+<rect x="656" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 18</title></rect>
+<rect x="664" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 19</title></rect>
+<rect x="640" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 20</title></rect>
+<rect x="648" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 21</title></rect>
+<rect x="656" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 22</title></rect>
+<rect x="664" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 23</title></rect>
+<rect x="640" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 24</title></rect>
+<rect x="648" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 25</title></rect>
+<rect x="656" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 26</title></rect>
+<rect x="664" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 27</title></rect>
+<rect x="640" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 28</title></rect>
+<rect x="648" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 29</title></rect>
+<rect x="656" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 30</title></rect>
+<rect x="664" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 31</title></rect>
+<rect x="640" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 32</title></rect>
+<rect x="648" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 33</title></rect>
+<rect x="656" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 34</title></rect>
+<rect x="664" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 35</title></rect>
+<rect x="640" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 36</title></rect>
+<rect x="648" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 37</title></rect>
+<rect x="656" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 38</title></rect>
+<rect x="664" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 39</title></rect>
+<rect x="640" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 40</title></rect>
+<rect x="648" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 41</title></rect>
+<rect x="656" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 42</title></rect>
+<rect x="664" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 43</title></rect>
+<rect x="640" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 44</title></rect>
+<rect x="648" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 45</title></rect>
+<rect x="656" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 46</title></rect>
+<rect x="664" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 47</title></rect>
+<rect x="640" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 48</title></rect>
+<rect x="648" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 49</title></rect>
+<rect x="656" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 50</title></rect>
+<rect x="664" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 51</title></rect>
+<rect x="640" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 52</title></rect>
+<rect x="648" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 53</title></rect>
+<rect x="656" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 54</title></rect>
+<rect x="664" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 55</title></rect>
+<rect x="640" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 56</title></rect>
+<rect x="648" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 57</title></rect>
+<rect x="656" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 58</title></rect>
+<rect x="664" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 59</title></rect>
+<rect x="640" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 60</title></rect>
+<rect x="648" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 61</title></rect>
+<rect x="656" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 62</title></rect>
+<rect x="664" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 63</title></rect>
+<text x="570" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
+<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
+<rect x="720" y="72" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
+
+<line x1="720" y1="72" x2="736" y2="88" style="stroke:black; stroke-width:2" />
+<line x1="720" y1="88" x2="736" y2="72" style="stroke:black; stroke-width:2" />
+<text x="738" y="86" style="fill:black;">Unavailable</text>
+<rect x="704" y="24" width="240" height="88" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="712" y="32" width="224" height="72" style="stroke:black; stroke-width:1; fill:none""></rect>
+<text x="978" y="54" style="fill:black;">Totals</text>
+<text x="986" y="78" style="fill:black;">Exact Match Input xbar</text>
+<text x="994" y="102" style="fill:black;"> 0 of 128 (0.00%)</text>
+<text x="986" y="126" style="fill:black;">Ternary Match Input xbar</text>
+<text x="994" y="150" style="fill:black;"> 0 of 66 (0.00%)</text>
+<text x="986" y="174" style="fill:black;">Hash Bit</text>
+<text x="994" y="198" style="fill:black;"> 0 of 416 (0.00%)</text>
+<text x="986" y="222" style="fill:black;">Hash Dist Unit</text>
+<text x="994" y="246" style="fill:black;"> 0 of 6 (0.00%)</text>
+<text x="986" y="270" style="fill:black;">Gateway</text>
+<text x="994" y="294" style="fill:black;"> 0 of 16 (0.00%)</text>
+<text x="986" y="318" style="fill:black;">SRAM</text>
+<text x="994" y="342" style="fill:black;"> 0 of 80 (0.00%)</text>
+<text x="986" y="366" style="fill:black;">Map RAM</text>
+<text x="994" y="390" style="fill:black;"> 0 of 48 (0.00%)</text>
+<text x="986" y="414" style="fill:black;">TCAM</text>
+<text x="994" y="438" style="fill:black;"> 0 of 24 (0.00%)</text>
+<text x="986" y="462" style="fill:black;">VLIW Instr</text>
+<text x="994" y="486" style="fill:black;"> 0 of 32 (0.00%)</text>
+<text x="986" y="510" style="fill:black;">Meter ALU</text>
+<text x="994" y="534" style="fill:black;"> 0 of 4 (0.00%)</text>
+<text x="986" y="558" style="fill:black;">Stats ALU</text>
+<text x="994" y="582" style="fill:black;"> 0 of 4 (0.00%)</text>
+<text x="986" y="606" style="fill:black;">Stash</text>
+<text x="994" y="630" style="fill:black;"> 0 of 16 (0.00%)</text>
+<text x="986" y="654" style="fill:black;">Action Data Bus Bytes</text>
+<text x="994" y="678" style="fill:black;"> 0 of 128 (0.00%)</text>
+<text x="986" y="702" style="fill:black;">Logical TableID</text>
+<text x="994" y="726" style="fill:black;"> 0 of 16 (0.00%)</text>
+<rect x="960" y="24" width="240" height="728" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="968" y="32" width="224" height="712" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="0" y="0" width="680" height="672" style="stroke:black; stroke-width:2; fill:none""></rect>
+</svg><br>
+
<h2>MAU Stage 4</h2>
<svg width="95%" height="95%" viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
@@ -32247,7 +32224,7 @@
</svg><br>
-<br><i>Created on Thu Sep 7 14:49:06 2017</i>
+<br><i>Created on Fri Sep 8 08:25:32 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
</div>
</body>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/parser.egress.html b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/parser.egress.html
index 5b18554..dc489b5 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/parser.egress.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/parser.egress.html
@@ -625,7 +625,7 @@
<tr><td id="row255" class="row_cell">
<a href="#row255">Row 255</a> <br><br>
-State <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start (from state <Shim start state>)<br />
+State <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start (from state <Shim start state>)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_255');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_255">Raw register data</a> <br><br><div id="reg_data_255" style="display: none;">
@@ -684,18 +684,18 @@
<tr>
<td><center>0</center></td>
<td><center>ff</center></td>
-<td><center>c</center></td>
+<td><center>9</center></td>
<td><center>7</center></td>
-<td><center>18</center></td>
+<td><center>15</center></td>
<td><center>0</center></td>
<td><center>3</center></td>
<td><center>1</center></td>
<td><center>1</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
-<td><center>a</center></td>
+<td><center>7</center></td>
<td><center>0</center></td>
-<td><center>19</center></td>
+<td><center>16</center></td>
</tr>
</table> <br>
Action: <table border=1>
@@ -772,7 +772,7 @@
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>90</center></td>
-<td><center>92</center></td>
+<td><center>1ff</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -781,13 +781,13 @@
<td><center>1ff</center></td>
<td><center>1ff</center></td>
<td><center>50</center></td>
-<td><center>51</center></td>
+<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>8</center></td>
+<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1ff</center></td>
@@ -822,8 +822,8 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
+<td><center>0</center></td>
<td><center>2</center></td>
-<td><center>7</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
</tr>
@@ -851,12 +851,6 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
<div class="tcam_arrow" style="width:54px; bottom: 0px;">16</div>
</td>
<td height=1 style="position: relative">
@@ -902,6 +896,12 @@
</td>
<td height=1 style="position: relative">
</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
<td height=40></td></tr><tr>
<td align=right><font size=-3>Bytes </font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
@@ -912,10 +912,10 @@
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>8</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>11</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>13</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>14</center></font></td>
@@ -926,9 +926,9 @@
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>19</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>20</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>21</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>22</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>23</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>24</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
@@ -939,18 +939,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">146</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">81</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">144</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -958,7 +947,16 @@
<div class="extr_arrow" style="width:27px; top: 0px;">80</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">144</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
</td>
@@ -1171,19 +1169,19 @@
<td><center>0</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
-<td><center>148</center></td>
+<td><center>14e</center></td>
<td><center>0</center></td>
-<td><center>146</center></td>
-<td><center>147</center></td>
-<td><center>104</center></td>
+<td><center>14c</center></td>
+<td><center>14d</center></td>
+<td><center>108</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>125</center></td>
+<td><center>129</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
-<td><center>124</center></td>
+<td><center>51</center></td>
+<td><center>128</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -1204,9 +1202,9 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>105</center></td>
+<td><center>109</center></td>
<td><center>0</center></td>
-<td><center>106</center></td>
+<td><center>10a</center></td>
<td><center>c</center></td>
<td><center>8</center></td>
<td><center>0</center></td>
@@ -1340,28 +1338,28 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">292</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">296</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">293</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">297</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">326</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">332</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">327</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">333</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">328</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">334</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">260</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">264</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -1370,7 +1368,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">261</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">265</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -1379,7 +1377,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">262</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">266</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -1413,7 +1411,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x8<br>
+PHV 81 <font size=+1>|=</font> 0x8<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -1973,19 +1971,19 @@
<td><center>0</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
-<td><center>14b</center></td>
+<td><center>151</center></td>
<td><center>0</center></td>
-<td><center>149</center></td>
-<td><center>14a</center></td>
-<td><center>107</center></td>
+<td><center>14f</center></td>
+<td><center>150</center></td>
+<td><center>10b</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>127</center></td>
+<td><center>12b</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
-<td><center>126</center></td>
+<td><center>51</center></td>
+<td><center>12a</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -2006,9 +2004,9 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>108</center></td>
+<td><center>10c</center></td>
<td><center>0</center></td>
-<td><center>109</center></td>
+<td><center>10d</center></td>
<td><center>c</center></td>
<td><center>8</center></td>
<td><center>0</center></td>
@@ -2140,28 +2138,28 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">294</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">298</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">295</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">299</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">329</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">335</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">330</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">336</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">331</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">337</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">263</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">267</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -2170,7 +2168,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">264</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">268</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -2179,7 +2177,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">265</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">269</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -2213,7 +2211,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x10<br>
+PHV 81 <font size=+1>|=</font> 0x10<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -2372,17 +2370,17 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
-<td><center>149</center></td>
+<td><center>150</center></td>
<td><center>1ff</center></td>
-<td><center>107</center></td>
+<td><center>10b</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>127</center></td>
+<td><center>12b</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
-<td><center>126</center></td>
+<td><center>51</center></td>
+<td><center>12a</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -2537,18 +2535,18 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">294</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">298</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">295</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">299</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">329</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">336</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">263</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">267</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -2606,7 +2604,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x20<br>
+PHV 81 <font size=+1>|=</font> 0x20<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3152,7 +3150,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
-<td><center>14e</center></td>
+<td><center>154</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
@@ -3161,7 +3159,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -3317,7 +3315,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">334</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">340</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -3383,7 +3381,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x2<br>
+PHV 81 <font size=+1>|=</font> 0x2<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3548,17 +3546,17 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
-<td><center>14c</center></td>
-<td><center>14d</center></td>
-<td><center>10a</center></td>
+<td><center>152</center></td>
+<td><center>153</center></td>
+<td><center>10e</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>129</center></td>
+<td><center>12d</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
-<td><center>128</center></td>
+<td><center>51</center></td>
+<td><center>12c</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -3579,7 +3577,7 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>10b</center></td>
+<td><center>10f</center></td>
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>8</center></td>
@@ -3714,10 +3712,10 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">296</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">300</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">266</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">270</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -3726,15 +3724,15 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">332</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">338</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">297</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">301</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">267</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">271</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -3743,7 +3741,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">333</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">339</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -3785,7 +3783,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x4<br>
+PHV 81 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3954,17 +3952,17 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
-<td><center>14c</center></td>
-<td><center>14d</center></td>
-<td><center>10a</center></td>
+<td><center>152</center></td>
+<td><center>153</center></td>
+<td><center>10e</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>129</center></td>
+<td><center>12d</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
-<td><center>128</center></td>
+<td><center>51</center></td>
+<td><center>12c</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -3985,7 +3983,7 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>10b</center></td>
+<td><center>10f</center></td>
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>8</center></td>
@@ -4120,10 +4118,10 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">296</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">300</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">266</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">270</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -4132,15 +4130,15 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">332</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">338</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">297</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">301</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">267</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">271</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -4149,7 +4147,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">333</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">339</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -4191,7 +4189,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x4<br>
+PHV 81 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -4214,7 +4212,7 @@
<tr><td id="row246" class="row_cell">
<a href="#row246">Row 246</a> <br><br>
-State parse_pkt_in (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
+State parse_pkt_in (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_246');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_246">Raw register data</a> <br><br><div id="reg_data_246" style="display: none;">
@@ -4360,7 +4358,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
-<td><center>91</center></td>
+<td><center>154</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
@@ -4369,7 +4367,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -4525,7 +4523,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">145</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">340</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -4591,7 +4589,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x1<br>
+PHV 81 <font size=+1>|=</font> 0x1<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -4610,7 +4608,7 @@
<tr><td id="row245" class="row_cell">
<a href="#row245">Row 245</a> <br><br>
-State default_parser (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
+State default_parser (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_245">Raw register data</a> <br><br><div id="reg_data_245" style="display: none;">
@@ -5158,17 +5156,17 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
-<td><center>14c</center></td>
-<td><center>14d</center></td>
-<td><center>10a</center></td>
+<td><center>152</center></td>
+<td><center>153</center></td>
+<td><center>10e</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>129</center></td>
+<td><center>12d</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
-<td><center>128</center></td>
+<td><center>51</center></td>
+<td><center>12c</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -5189,7 +5187,7 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>10b</center></td>
+<td><center>10f</center></td>
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>8</center></td>
@@ -5324,10 +5322,10 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">296</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">300</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">266</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">270</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -5336,15 +5334,15 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">332</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">338</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">297</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">301</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">267</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">271</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -5353,7 +5351,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">333</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">339</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -5395,7 +5393,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x4<br>
+PHV 81 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -6641,7 +6639,7 @@
<br></td></tr>
</table>
-<br><i>Created on Thu Sep 7 14:49:10 2017</i>
+<br><i>Created on Fri Sep 8 08:25:36 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/parser.ingress.html b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/parser.ingress.html
index 022cd8f..1f9247e 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/parser.ingress.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/parser.ingress.html
@@ -1013,7 +1013,7 @@
<tr>
<th> </th></tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row245">Row 245 (state start)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row244">Row 244 (state start)</a></td>
</tr>
</table>
</div></div><br><br>
@@ -1174,10 +1174,10 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>43</center></td>
-<td><center>1ff</center></td>
-<td><center>44</center></td>
<td><center>42</center></td>
+<td><center>1ff</center></td>
+<td><center>43</center></td>
+<td><center>41</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -1333,7 +1333,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">3</div>
@@ -1350,7 +1350,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">67</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">4</div>
@@ -1404,7 +1404,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x4<br>
+PHV 67 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -1421,7 +1421,7 @@
</tr>
</table>
<br>Previous states:
-<a href="#row244">Row 244</a><br>
+<a href="#row243">Row 243</a><br>
</div></div><br><br>
</td></tr>
@@ -1582,8 +1582,8 @@
<td><center>0</center></td>
<td><center>120</center></td>
<td><center>1ff</center></td>
-<td><center>44</center></td>
-<td><center>41</center></td>
+<td><center>43</center></td>
+<td><center>40</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -1771,7 +1771,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">64</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:54px; top: 0px;">131</div>
@@ -1813,7 +1813,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x8<br>
+PHV 67 <font size=+1>|=</font> 0x8<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -1836,7 +1836,7 @@
</tr>
</table>
<br>Previous states:
-<a href="#row254">Row 254</a>, <a href="#row246">Row 246</a>, <a href="#row247">Row 247</a><br>
+<a href="#row254">Row 254</a>, <a href="#row245">Row 245</a>, <a href="#row246">Row 246</a><br>
</div></div><br><br>
</td></tr>
@@ -2223,7 +2223,7 @@
[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_252');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_252">Transitions</a> <br><br><div id="transitions_252" style="display: block;">
End<br>
<br>Previous states:
-<a href="#row254">Row 254</a>, <a href="#row246">Row 246</a>, <a href="#row247">Row 247</a><br>
+<a href="#row254">Row 254</a>, <a href="#row245">Row 245</a>, <a href="#row246">Row 246</a><br>
</div></div><br><br>
</td></tr>
@@ -2287,8 +2287,9 @@
</tr>
<tr>
<td><center>0</center></td>
+<td><center>ff</center></td>
<td><center>0</center></td>
-<td><center>14</center></td>
+<td><center>4</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2296,7 +2297,6 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>1</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>14</center></td>
@@ -2383,19 +2383,19 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>122</center></td>
-<td><center>1ff</center></td>
-<td><center>44</center></td>
+<td><center>123</center></td>
+<td><center>43</center></td>
<td><center>121</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
-<td><center>4</center></td>
-<td><center>2</center></td>
-<td><center>0</center></td>
<td><center>6</center></td>
-<td><center>1ff</center></td>
-<td><center>10</center></td>
+<td><center>4</center></td>
+<td><center>a</center></td>
+<td><center>8</center></td>
+<td><center>145</center></td>
+<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2408,9 +2408,9 @@
<td><center>0</center></td>
<td><center>102</center></td>
<td><center>0</center></td>
-<td><center>103</center></td>
+<td><center>1ff</center></td>
+<td><center>10</center></td>
<td><center>c</center></td>
-<td><center>8</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2420,7 +2420,7 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>0</center></td>
+<td><center>2</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2524,7 +2524,7 @@
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>16</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>17</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>18</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>19</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>19</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
@@ -2546,6 +2546,11 @@
<div class="extr_arrow" style="width:27px; top: 0px;">290</div>
</td>
<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">291</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
<div class="extr_arrow" style="width:54px; top: 0px;">322</div>
</td>
<td height=1 style="position: relative">
@@ -2561,6 +2566,11 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">325</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">257</div>
</td>
<td height=1 style="position: relative">
@@ -2579,15 +2589,6 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">259</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
</td>
@@ -2613,12 +2614,18 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x10<br>
+PHV 67 <font size=+1>|=</font> 0x10<br>
<br>
</div></div><br><br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_251');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_251">Transitions</a> <br><br><div id="transitions_251" style="display: block;">
-End<br>
+<table border=0 id="transitions_table_251" class="draggable transitions_table">
+<tr>
+<th> </th></tr>
+<td>Default</td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row248">Row 248 (state parse_tcp//spilled)</a></td>
+</tr>
+</table>
<br>Previous states:
<a href="#row253">Row 253</a><br>
</div></div><br><br>
@@ -2781,7 +2788,7 @@
<td><center>0</center></td>
<td><center>122</center></td>
<td><center>1ff</center></td>
-<td><center>44</center></td>
+<td><center>43</center></td>
<td><center>121</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -3006,7 +3013,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x20<br>
+PHV 67 <font size=+1>|=</font> 0x20<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3406,7 +3413,7 @@
<tr><td id="row248" class="row_cell">
<a href="#row248">Row 248</a> <br><br>
-State parse_pkt_out (from state default_parser)<br />
+State parse_tcp//spilled (from state parse_tcp)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_248">Raw register data</a> <br><br><div id="reg_data_248" style="display: none;">
@@ -3424,6 +3431,394 @@
</tr>
<tr>
<td><center>value</center></td>
+<td><center>4</center></td>
+<td><center>ffff</center></td>
+<td><center>ff</center></td>
+<td><center>ff</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+</tr>
+<tr>
+<td><center>mask</center></td>
+<td><center>ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+</tr>
+</table> <br>
+Early action: <table border=1>
+<tr>
+<td><center><font size=-3>ctr_amt_idx</font></center></td>
+<td><center><font size=-3>nxt_state_mask</font></center></td>
+<td><center><font size=-3>shift_amt</font></center></td>
+<td><center><font size=-3>nxt_state</font></center></td>
+<td><center><font size=-3>lookup_offset_8[1]</font></center></td>
+<td><center><font size=-3>ctr_ld_src</font></center></td>
+<td><center><font size=-3>lookup_offset_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_16</font></center></td>
+<td><center><font size=-3>ld_lookup_8[1]</font></center></td>
+<td><center><font size=-3>done</font></center></td>
+<td><center><font size=-3>lookup_offset_16</font></center></td>
+<td><center><font size=-3>ctr_load</font></center></td>
+<td><center><font size=-3>buf_req</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>14</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>14</center></td>
+</tr>
+</table> <br>
+Action: <table border=1>
+<tr>
+<td><center><font size=-3>phv_8b_src_type_3</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_2</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_0</font></center></td>
+<td><center><font size=-3>csum_addr[1]</font></center></td>
+<td><center><font size=-3>phv_16b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_dst_1</font></center></td>
+<td><center><font size=-3>pri_upd_en_shr</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_1</font></center></td>
+<td><center><font size=-3>dst_offset_rst</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_3</font></center></td>
+<td><center><font size=-3>phv_16b_src_2</font></center></td>
+<td><center><font size=-3>phv_16b_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_src_2</font></center></td>
+<td><center><font size=-3>pri_upd_src</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>csum_en[1]</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>dst_offset_inc</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>csum_addr[0]</font></center></td>
+<td><center><font size=-3>pri_upd_type</font></center></td>
+<td><center><font size=-3>phv_32b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_3</font></center></td>
+<td><center><font size=-3>phv_32b_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_src_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_0</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_2</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_32b_dst_3</font></center></td>
+<td><center><font size=-3>pri_upd_val_mask</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_3</font></center></td>
+<td><center><font size=-3>csum_en[0]</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_2</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>1ff</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>1ff</center></td>
+<td><center>124</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>3</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+</tr>
+</table> <br>
+</div></div><br><br>
+
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_248">Input buffer</a> <br><br><div id="input_buffer_248" style="display: block;">
+<div style="min-width: 1060;"></div>
+<table border=0><tr>
+<td valign=bottom align=right><font size=-3>Matches </font></td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=20></td></tr><tr>
+<td align=right><font size=-3>Bytes </font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>1</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>2</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>3</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>4</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>13</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>14</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>15</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>16</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>17</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>18</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>19</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>28</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>29</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>30</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>31</center></font></td>
+</tr><tr>
+<td valign=top align=right><font size=-3>Extractions </font></td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">292</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+</tr></table>
+<div style="height:40px;"> </div>
+</div></div><br><br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_248">Transitions</a> <br><br><div id="transitions_248" style="display: block;">
+End<br>
+<br>Previous states:
+<a href="#row251">Row 251</a><br>
+</div></div><br><br>
+</td></tr>
+
+<tr><td id="row247" class="row_cell">
+<a href="#row247">Row 247</a> <br><br>
+State parse_pkt_out (from state default_parser)<br />
+<br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_247">Raw register data</a> <br><br><div id="reg_data_247" style="display: none;">
+TCAM word: <table border=1>
+<tr>
+<td><center><font size=-3></font></center></td>
+<td><center><font size=-3>curr_state</font></center></td>
+<td><center><font size=-3>lookup_16</font></center></td>
+<td><center><font size=-3>lookup_8[1]</font></center></td>
+<td><center><font size=-3>lookup_8[0]</font></center></td>
+<td><center><font size=-3>ver_1</font></center></td>
+<td><center><font size=-3>ver_0</font></center></td>
+<td><center><font size=-3>ctr_zero</font></center></td>
+<td><center><font size=-3>ctr_neg</font></center></td>
+</tr>
+<tr>
+<td><center>value</center></td>
<td><center>6</center></td>
<td><center>ff40</center></td>
<td><center>ff</center></td>
@@ -3561,7 +3956,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>44</center></td>
+<td><center>43</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -3612,7 +4007,7 @@
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_248">Input buffer</a> <br><br><div id="input_buffer_248" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_247">Input buffer</a> <br><br><div id="input_buffer_247" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -3783,29 +4178,29 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x2<br>
+PHV 67 <font size=+1>|=</font> 0x2<br>
<br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_248">Transitions</a> <br><br><div id="transitions_248" style="display: block;">
-<table border=0 id="transitions_table_248" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_247">Transitions</a> <br><br><div id="transitions_247" style="display: block;">
+<table border=0 id="transitions_table_247" class="draggable transitions_table">
<tr>
<th> </th></tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row246">Row 246 (state parse_ethernet)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row245">Row 245 (state parse_ethernet)</a></td>
</tr>
</table>
<br>Previous states:
-<a href="#row243">Row 243</a><br>
+<a href="#row242">Row 242</a><br>
</div></div><br><br>
</td></tr>
-<tr><td id="row247" class="row_cell">
-<a href="#row247">Row 247</a> <br><br>
+<tr><td id="row246" class="row_cell">
+<a href="#row246">Row 246</a> <br><br>
State parse_ethernet (from state default_parser)<br />
<br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_247">Raw register data</a> <br><br><div id="reg_data_247" style="display: none;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_246');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_246">Raw register data</a> <br><br><div id="reg_data_246" style="display: none;">
TCAM word: <table border=1>
<tr>
<td><center><font size=-3></font></center></td>
@@ -3955,416 +4350,10 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>43</center></td>
-<td><center>1ff</center></td>
-<td><center>44</center></td>
<td><center>42</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>c</center></td>
-<td><center>5</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
<td><center>1ff</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>4</center></td>
-<td><center>0</center></td>
-<td><center>1ff</center></td>
-<td><center>8</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1ff</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>4</center></td>
-<td><center>0</center></td>
-<td><center>7</center></td>
-</tr>
-</table> <br>
-</div></div><br><br>
-
-<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_247">Input buffer</a> <br><br><div id="input_buffer_247" style="display: block;">
-<div style="min-width: 1060;"></div>
-<table border=0><tr>
-<td valign=bottom align=right><font size=-3>Matches </font></td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="tcam_arrow" style="width:54px; bottom: 0px;">16</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=40></td></tr><tr>
-<td align=right><font size=-3>Bytes </font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>1</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>2</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>3</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>4</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>13</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>14</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>15</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>16</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>17</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>18</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>19</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>28</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>29</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>30</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>31</center></font></td>
-</tr><tr>
-<td valign=top align=right><font size=-3>Extractions </font></td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">3</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">132</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">67</div>
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">4</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">133</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-</tr></table>
-<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x4<br>
-<br>
-</div></div><br><br>
-<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_247">Transitions</a> <br><br><div id="transitions_247" style="display: block;">
-<table border=0 id="transitions_table_247" class="draggable transitions_table">
-<tr>
-<th>16b</th>
-<th> </th></tr>
-<td>0800</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row253">Row 253 (state parse_ipv4)</a></td>
-</tr>
-<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row252">Row 252 (state <leaf>)</a></td>
-</tr>
-</table>
-<br>Previous states:
-<a href="#row243">Row 243</a><br>
-</div></div><br><br>
-</td></tr>
-
-<tr><td id="row246" class="row_cell">
-<a href="#row246">Row 246</a> <br><br>
-State parse_ethernet (from state parse_pkt_out)<br />
-<br>
-<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_246');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_246">Raw register data</a> <br><br><div id="reg_data_246" style="display: none;">
-TCAM word: <table border=1>
-<tr>
-<td><center><font size=-3></font></center></td>
-<td><center><font size=-3>curr_state</font></center></td>
-<td><center><font size=-3>lookup_16</font></center></td>
-<td><center><font size=-3>lookup_8[1]</font></center></td>
-<td><center><font size=-3>lookup_8[0]</font></center></td>
-<td><center><font size=-3>ver_1</font></center></td>
-<td><center><font size=-3>ver_0</font></center></td>
-<td><center><font size=-3>ctr_zero</font></center></td>
-<td><center><font size=-3>ctr_neg</font></center></td>
-</tr>
-<tr>
-<td><center>value</center></td>
-<td><center>7</center></td>
-<td><center>ffff</center></td>
-<td><center>ff</center></td>
-<td><center>ff</center></td>
-<td><center>1</center></td>
-<td><center>1</center></td>
-<td><center>1</center></td>
-<td><center>1</center></td>
-</tr>
-<tr>
-<td><center>mask</center></td>
-<td><center>ff</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-</tr>
-</table> <br>
-Early action: <table border=1>
-<tr>
-<td><center><font size=-3>ctr_amt_idx</font></center></td>
-<td><center><font size=-3>nxt_state_mask</font></center></td>
-<td><center><font size=-3>shift_amt</font></center></td>
-<td><center><font size=-3>nxt_state</font></center></td>
-<td><center><font size=-3>lookup_offset_8[1]</font></center></td>
-<td><center><font size=-3>ctr_ld_src</font></center></td>
-<td><center><font size=-3>lookup_offset_8[0]</font></center></td>
-<td><center><font size=-3>ld_lookup_8[0]</font></center></td>
-<td><center><font size=-3>ld_lookup_16</font></center></td>
-<td><center><font size=-3>ld_lookup_8[1]</font></center></td>
-<td><center><font size=-3>done</font></center></td>
-<td><center><font size=-3>lookup_offset_16</font></center></td>
-<td><center><font size=-3>ctr_load</font></center></td>
-<td><center><font size=-3>buf_req</font></center></td>
-</tr>
-<tr>
-<td><center>0</center></td>
-<td><center>ff</center></td>
-<td><center>e</center></td>
-<td><center>2</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>c</center></td>
-<td><center>0</center></td>
-<td><center>e</center></td>
-</tr>
-</table> <br>
-Action: <table border=1>
-<tr>
-<td><center><font size=-3>phv_8b_src_type_3</font></center></td>
-<td><center><font size=-3>phv_8b_src_type_2</font></center></td>
-<td><center><font size=-3>phv_8b_src_type_1</font></center></td>
-<td><center><font size=-3>phv_8b_src_type_0</font></center></td>
-<td><center><font size=-3>csum_addr[1]</font></center></td>
-<td><center><font size=-3>phv_16b_dst_2</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_0</font></center></td>
-<td><center><font size=-3>phv_16b_dst_0</font></center></td>
-<td><center><font size=-3>phv_16b_dst_1</font></center></td>
-<td><center><font size=-3>phv_32b_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_1</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_3</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_2</font></center></td>
-<td><center><font size=-3>phv_8b_dst_2</font></center></td>
-<td><center><font size=-3>phv_8b_dst_3</font></center></td>
-<td><center><font size=-3>phv_8b_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_dst_1</font></center></td>
-<td><center><font size=-3>pri_upd_en_shr</font></center></td>
-<td><center><font size=-3>phv_32b_src_type_1</font></center></td>
-<td><center><font size=-3>dst_offset_rst</font></center></td>
-<td><center><font size=-3>phv_32b_src_type_0</font></center></td>
-<td><center><font size=-3>phv_16b_src_1</font></center></td>
-<td><center><font size=-3>phv_16b_src_0</font></center></td>
-<td><center><font size=-3>phv_16b_src_3</font></center></td>
-<td><center><font size=-3>phv_16b_src_2</font></center></td>
-<td><center><font size=-3>phv_16b_dst_3</font></center></td>
-<td><center><font size=-3>phv_32b_src_2</font></center></td>
-<td><center><font size=-3>pri_upd_src</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_3</font></center></td>
-<td><center><font size=-3>phv_16b_offset_rot_imm_1</font></center></td>
-<td><center><font size=-3>csum_en[1]</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_1</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_0</font></center></td>
-<td><center><font size=-3>dst_offset_inc</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_2</font></center></td>
-<td><center><font size=-3>csum_addr[0]</font></center></td>
-<td><center><font size=-3>pri_upd_type</font></center></td>
-<td><center><font size=-3>phv_32b_dst_1</font></center></td>
-<td><center><font size=-3>phv_32b_src_3</font></center></td>
-<td><center><font size=-3>phv_32b_dst_2</font></center></td>
-<td><center><font size=-3>phv_32b_src_1</font></center></td>
-<td><center><font size=-3>phv_32b_src_0</font></center></td>
-<td><center><font size=-3>phv_32b_offset_rot_imm_1</font></center></td>
-<td><center><font size=-3>phv_32b_offset_rot_imm_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_3</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_2</font></center></td>
-<td><center><font size=-3>phv_16b_offset_rot_imm_0</font></center></td>
-<td><center><font size=-3>phv_32b_dst_3</font></center></td>
-<td><center><font size=-3>pri_upd_val_mask</font></center></td>
-<td><center><font size=-3>phv_16b_src_type_1</font></center></td>
-<td><center><font size=-3>phv_16b_src_type_0</font></center></td>
-<td><center><font size=-3>phv_8b_src_3</font></center></td>
-<td><center><font size=-3>csum_en[0]</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_3</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_2</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_1</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_src_1</font></center></td>
-<td><center><font size=-3>phv_8b_src_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_1</font></center></td>
-<td><center><font size=-3>phv_8b_src_2</font></center></td>
-</tr>
-<tr>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>1ff</center></td>
-<td><center>0</center></td>
-<td><center>84</center></td>
-<td><center>85</center></td>
-<td><center>3</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
<td><center>43</center></td>
-<td><center>1ff</center></td>
-<td><center>44</center></td>
-<td><center>42</center></td>
+<td><center>41</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -4520,7 +4509,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">3</div>
@@ -4537,7 +4526,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">67</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">4</div>
@@ -4591,7 +4580,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x4<br>
+PHV 67 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -4608,13 +4597,13 @@
</tr>
</table>
<br>Previous states:
-<a href="#row248">Row 248</a><br>
+<a href="#row242">Row 242</a><br>
</div></div><br><br>
</td></tr>
<tr><td id="row245" class="row_cell">
<a href="#row245">Row 245</a> <br><br>
-State start (from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>)<br />
+State parse_ethernet (from state parse_pkt_out)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_245">Raw register data</a> <br><br><div id="reg_data_245" style="display: none;">
@@ -4632,6 +4621,412 @@
</tr>
<tr>
<td><center>value</center></td>
+<td><center>7</center></td>
+<td><center>ffff</center></td>
+<td><center>ff</center></td>
+<td><center>ff</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+</tr>
+<tr>
+<td><center>mask</center></td>
+<td><center>ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+</tr>
+</table> <br>
+Early action: <table border=1>
+<tr>
+<td><center><font size=-3>ctr_amt_idx</font></center></td>
+<td><center><font size=-3>nxt_state_mask</font></center></td>
+<td><center><font size=-3>shift_amt</font></center></td>
+<td><center><font size=-3>nxt_state</font></center></td>
+<td><center><font size=-3>lookup_offset_8[1]</font></center></td>
+<td><center><font size=-3>ctr_ld_src</font></center></td>
+<td><center><font size=-3>lookup_offset_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_16</font></center></td>
+<td><center><font size=-3>ld_lookup_8[1]</font></center></td>
+<td><center><font size=-3>done</font></center></td>
+<td><center><font size=-3>lookup_offset_16</font></center></td>
+<td><center><font size=-3>ctr_load</font></center></td>
+<td><center><font size=-3>buf_req</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>ff</center></td>
+<td><center>e</center></td>
+<td><center>2</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>c</center></td>
+<td><center>0</center></td>
+<td><center>e</center></td>
+</tr>
+</table> <br>
+Action: <table border=1>
+<tr>
+<td><center><font size=-3>phv_8b_src_type_3</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_2</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_0</font></center></td>
+<td><center><font size=-3>csum_addr[1]</font></center></td>
+<td><center><font size=-3>phv_16b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_dst_1</font></center></td>
+<td><center><font size=-3>pri_upd_en_shr</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_1</font></center></td>
+<td><center><font size=-3>dst_offset_rst</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_3</font></center></td>
+<td><center><font size=-3>phv_16b_src_2</font></center></td>
+<td><center><font size=-3>phv_16b_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_src_2</font></center></td>
+<td><center><font size=-3>pri_upd_src</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>csum_en[1]</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>dst_offset_inc</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>csum_addr[0]</font></center></td>
+<td><center><font size=-3>pri_upd_type</font></center></td>
+<td><center><font size=-3>phv_32b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_3</font></center></td>
+<td><center><font size=-3>phv_32b_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_src_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_0</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_2</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_32b_dst_3</font></center></td>
+<td><center><font size=-3>pri_upd_val_mask</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_3</font></center></td>
+<td><center><font size=-3>csum_en[0]</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_2</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>84</center></td>
+<td><center>85</center></td>
+<td><center>3</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>42</center></td>
+<td><center>1ff</center></td>
+<td><center>43</center></td>
+<td><center>41</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>c</center></td>
+<td><center>5</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>4</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>8</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>4</center></td>
+<td><center>0</center></td>
+<td><center>7</center></td>
+</tr>
+</table> <br>
+</div></div><br><br>
+
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_245">Input buffer</a> <br><br><div id="input_buffer_245" style="display: block;">
+<div style="min-width: 1060;"></div>
+<table border=0><tr>
+<td valign=bottom align=right><font size=-3>Matches </font></td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="tcam_arrow" style="width:54px; bottom: 0px;">16</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=40></td></tr><tr>
+<td align=right><font size=-3>Bytes </font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>1</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>2</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>3</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>4</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>13</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>14</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>15</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>16</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>17</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>18</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>19</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>28</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>29</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>30</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>31</center></font></td>
+</tr><tr>
+<td valign=top align=right><font size=-3>Extractions </font></td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:108px; top: 0px;">3</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">132</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:108px; top: 0px;">4</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">133</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+</tr></table>
+<div style="height:40px;"> </div>
+PHV 67 <font size=+1>|=</font> 0x4<br>
+<br>
+</div></div><br><br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_245">Transitions</a> <br><br><div id="transitions_245" style="display: block;">
+<table border=0 id="transitions_table_245" class="draggable transitions_table">
+<tr>
+<th>16b</th>
+<th> </th></tr>
+<td>0800</td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row253">Row 253 (state parse_ipv4)</a></td>
+</tr>
+<td>Default</td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row252">Row 252 (state <leaf>)</a></td>
+</tr>
+</table>
+<br>Previous states:
+<a href="#row247">Row 247</a><br>
+</div></div><br><br>
+</td></tr>
+
+<tr><td id="row244" class="row_cell">
+<a href="#row244">Row 244</a> <br><br>
+State start (from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>)<br />
+<br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_244">Raw register data</a> <br><br><div id="reg_data_244" style="display: none;">
+TCAM word: <table border=1>
+<tr>
+<td><center><font size=-3></font></center></td>
+<td><center><font size=-3>curr_state</font></center></td>
+<td><center><font size=-3>lookup_16</font></center></td>
+<td><center><font size=-3>lookup_8[1]</font></center></td>
+<td><center><font size=-3>lookup_8[0]</font></center></td>
+<td><center><font size=-3>ver_1</font></center></td>
+<td><center><font size=-3>ver_0</font></center></td>
+<td><center><font size=-3>ctr_zero</font></center></td>
+<td><center><font size=-3>ctr_neg</font></center></td>
+</tr>
+<tr>
+<td><center>value</center></td>
<td><center>8</center></td>
<td><center>ffff</center></td>
<td><center>ff</center></td>
@@ -4769,7 +5164,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>44</center></td>
+<td><center>43</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -4820,7 +5215,7 @@
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_245">Input buffer</a> <br><br><div id="input_buffer_245" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_244">Input buffer</a> <br><br><div id="input_buffer_244" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -4991,20 +5386,20 @@
</td>
</tr></table>
<div style="height:20px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x40<br>
+PHV 67 <font size=+1>|=</font> 0x40<br>
<br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_245">Transitions</a> <br><br><div id="transitions_245" style="display: block;">
-<table border=0 id="transitions_table_245" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_244">Transitions</a> <br><br><div id="transitions_244" style="display: block;">
+<table border=0 id="transitions_table_244" class="draggable transitions_table">
<tr>
<th>8b[0]</th>
<th> </th></tr>
<td>00</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row244">Row 244 (state parse_pkt_in)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row243">Row 243 (state parse_pkt_in)</a></td>
</tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row243">Row 243 (state default_parser)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row242">Row 242 (state default_parser)</a></td>
</tr>
</table>
<br>Previous states:
@@ -5012,12 +5407,12 @@
</div></div><br><br>
</td></tr>
-<tr><td id="row244" class="row_cell">
-<a href="#row244">Row 244</a> <br><br>
+<tr><td id="row243" class="row_cell">
+<a href="#row243">Row 243</a> <br><br>
State parse_pkt_in (from state start)<br />
<br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_244">Raw register data</a> <br><br><div id="reg_data_244" style="display: none;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_243">Raw register data</a> <br><br><div id="reg_data_243" style="display: none;">
TCAM word: <table border=1>
<tr>
<td><center><font size=-3></font></center></td>
@@ -5169,7 +5564,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>44</center></td>
+<td><center>43</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -5220,7 +5615,7 @@
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_244">Input buffer</a> <br><br><div id="input_buffer_244" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_243">Input buffer</a> <br><br><div id="input_buffer_243" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -5391,12 +5786,12 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x1<br>
+PHV 67 <font size=+1>|=</font> 0x1<br>
<br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_244">Transitions</a> <br><br><div id="transitions_244" style="display: block;">
-<table border=0 id="transitions_table_244" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_243">Transitions</a> <br><br><div id="transitions_243" style="display: block;">
+<table border=0 id="transitions_table_243" class="draggable transitions_table">
<tr>
<th> </th></tr>
<td>Default</td>
@@ -5404,16 +5799,16 @@
</tr>
</table>
<br>Previous states:
-<a href="#row245">Row 245</a><br>
+<a href="#row244">Row 244</a><br>
</div></div><br><br>
</td></tr>
-<tr><td id="row243" class="row_cell">
-<a href="#row243">Row 243</a> <br><br>
+<tr><td id="row242" class="row_cell">
+<a href="#row242">Row 242</a> <br><br>
State default_parser (from state start)<br />
<br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_243">Raw register data</a> <br><br><div id="reg_data_243" style="display: none;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_242">Raw register data</a> <br><br><div id="reg_data_242" style="display: none;">
TCAM word: <table border=1>
<tr>
<td><center><font size=-3></font></center></td>
@@ -5615,13 +6010,13 @@
</table> <br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('saved_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#saved_243">Saved matches</a> <br><br><div id="saved_243" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('saved_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#saved_242">Saved matches</a> <br><br><div id="saved_242" style="display: block;">
16b
<font size=+1><-</font>
<a href="#row255">Row 255</a><br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_243">Input buffer</a> <br><br><div id="input_buffer_243" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_242">Input buffer</a> <br><br><div id="input_buffer_242" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -5793,28 +6188,23 @@
<div style="height:20px;"> </div>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_243">Transitions</a> <br><br><div id="transitions_243" style="display: block;">
-<table border=0 id="transitions_table_243" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_242">Transitions</a> <br><br><div id="transitions_242" style="display: block;">
+<table border=0 id="transitions_table_242" class="draggable transitions_table">
<tr>
<th>16b</th>
<th> </th></tr>
<td>0140 && 01ff</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row248">Row 248 (state parse_pkt_out)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row247">Row 247 (state parse_pkt_out)</a></td>
</tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row247">Row 247 (state parse_ethernet)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row246">Row 246 (state parse_ethernet)</a></td>
</tr>
</table>
<br>Previous states:
-<a href="#row245">Row 245</a><br>
+<a href="#row244">Row 244</a><br>
</div></div><br><br>
</td></tr>
-<tr><td id="row242" class="row_cell">
-<a href="#row242">Row 242</a> <br><br>
-Unmatchable
-</td></tr>
-
<tr><td id="row241" class="row_cell">
<a href="#row241">Row 241</a> <br><br>
Unmatchable
@@ -7026,11 +7416,11 @@
</td></tr>
<tr><td class="row_cell">
-Matchable row occupancy: 13/256 (5.08%)
+Matchable row occupancy: 14/256 (5.47%)
<br></td></tr>
</table>
-<br><i>Created on Thu Sep 7 14:49:10 2017</i>
+<br><i>Created on Fri Sep 8 08:25:36 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/phv_allocation.html b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/phv_allocation.html
index f8becc0..1347f5a 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/phv_allocation.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/phv_allocation.html
@@ -21,2676 +21,6 @@
ipv4.hdrChecksum[15:0] in container bits [23:8]
ipv4.srcAddr[31:24] in container bits [7:0]
-</title></rect>
-<rect x="9" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 2
-
-ipv4.dstAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="9" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 3
-
-ethernet.dstAddr[39:8] in container bits [31:0]
-
-</title></rect>
-<rect x="9" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 4
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="9" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 5
-
-udp.srcPort[15:0] in container bits [31:16]
-udp.dstPort[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="9" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 6
-
-
-</title></rect>
-<rect x="9" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 7
-
-
-</title></rect>
-<rect x="27" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 8
-
-
-</title></rect>
-<rect x="27" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 9
-
-
-</title></rect>
-<rect x="27" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 10
-
-
-</title></rect>
-<rect x="27" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 11
-
-
-</title></rect>
-<rect x="27" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 12
-
-
-</title></rect>
-<rect x="27" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 13
-
-
-</title></rect>
-<rect x="27" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 14
-
-
-</title></rect>
-<rect x="27" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 15
-
-
-</title></rect>
-<text x="20" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="54" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 16
-
-
-</title></rect>
-<rect x="54" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 17
-
-
-</title></rect>
-<rect x="54" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 18
-
-
-</title></rect>
-<rect x="54" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 19
-
-
-</title></rect>
-<rect x="54" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 20
-
-
-</title></rect>
-<rect x="54" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 21
-
-
-</title></rect>
-<rect x="54" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 22
-
-
-</title></rect>
-<rect x="54" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 23
-
-
-</title></rect>
-<rect x="72" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 24
-
-
-</title></rect>
-<rect x="72" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 25
-
-
-</title></rect>
-<rect x="72" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 26
-
-
-</title></rect>
-<rect x="72" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 27
-
-
-</title></rect>
-<rect x="72" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 28
-
-
-</title></rect>
-<rect x="72" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 29
-
-
-</title></rect>
-<rect x="72" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 30
-
-
-</title></rect>
-<rect x="72" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 31
-
-
-</title></rect>
-<text x="65" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="99" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 32
-
-
-</title></rect>
-<rect x="99" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 33
-
-
-</title></rect>
-<rect x="99" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 34
-
-
-</title></rect>
-<rect x="99" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 35
-
-
-</title></rect>
-<rect x="99" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 36
-
-
-</title></rect>
-<rect x="99" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 37
-
-
-</title></rect>
-<rect x="99" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 38
-
-
-</title></rect>
-<rect x="99" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 39
-
-
-</title></rect>
-<rect x="117" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 40
-
-
-</title></rect>
-<rect x="117" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 41
-
-
-</title></rect>
-<rect x="117" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 42
-
-
-</title></rect>
-<rect x="117" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 43
-
-
-</title></rect>
-<rect x="117" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 44
-
-
-</title></rect>
-<rect x="117" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 45
-
-
-</title></rect>
-<rect x="117" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 46
-
-
-</title></rect>
-<rect x="117" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 47
-
-
-</title></rect>
-<text x="110" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="144" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 48
-
-
-</title></rect>
-<rect x="144" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 49
-
-
-</title></rect>
-<rect x="144" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 50
-
-
-</title></rect>
-<rect x="144" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 51
-
-
-</title></rect>
-<rect x="144" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 52
-
-
-</title></rect>
-<rect x="144" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 53
-
-
-</title></rect>
-<rect x="144" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 54
-
-
-</title></rect>
-<rect x="144" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 55
-
-
-</title></rect>
-<rect x="162" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 56
-
-
-</title></rect>
-<rect x="162" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 57
-
-
-</title></rect>
-<rect x="162" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 58
-
-
-</title></rect>
-<rect x="162" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 59
-
-
-</title></rect>
-<rect x="162" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 60
-
-
-</title></rect>
-<rect x="162" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 61
-
-
-</title></rect>
-<rect x="162" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 62
-
-
-</title></rect>
-<rect x="162" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
- Unassigned
- Container Bit Width: 32
- Container Address: 63
-
-
-</title></rect>
-<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 64
-
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 65
-
-ipv4.srcAddr[23:16] in container bits [7:0]
-
-</title></rect>
-<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 66
-
-ethernet.dstAddr[47:40] in container bits [7:0]
-
-</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 67
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 68
-
-POV.POV[39:32] in container bits [7:0]
-
-Field --validity_check--packet_out_hdr read by table ingress_pkt for a gateway expression
-Field --validity_check--packet_out_hdr written by table ingress_pkt's action _packet_out
-</title></rect>
-<text x="191" y="97" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">RW<title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 68
-
-POV.POV[39:32] in container bits [7:0]
-
-Field --validity_check--packet_out_hdr read by table ingress_pkt for a gateway expression
-Field --validity_check--packet_out_hdr written by table ingress_pkt's action _packet_out
-</title></text>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 69
-
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
-
-</title></rect>
-<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 70
-
-
-</title></rect>
-<rect x="189" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 71
-
-
-</title></rect>
-<rect x="207" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 72
-
-
-</title></rect>
-<rect x="207" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 73
-
-
-</title></rect>
-<rect x="207" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 74
-
-
-</title></rect>
-<rect x="207" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 75
-
-
-</title></rect>
-<rect x="207" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 76
-
-
-</title></rect>
-<rect x="207" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 77
-
-
-</title></rect>
-<rect x="207" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 78
-
-
-</title></rect>
-<rect x="207" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
- Unassigned
- Container Bit Width: 8
- Container Address: 79
-
-
-</title></rect>
-<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 80
-
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-Field ig_intr_md_for_tm.copy_to_cpu read by table egress_pkt for a gateway expression
-</title></rect>
-<text x="236" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 80
-
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-Field ig_intr_md_for_tm.copy_to_cpu read by table egress_pkt for a gateway expression
-</title></text>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
-eg_intr_md._pad7[4:0] in container bits [7:3]
-eg_intr_md.egress_cos[2:0] in container bits [2:0]
-
-</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 82
-
-POV.POV[7:0] in container bits [7:0]
-
-Field --validity_check--packet_in_hdr written by table egress_pkt's action add_packet_in_hdr
-</title></rect>
-<text x="236" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 82
-
-POV.POV[7:0] in container bits [7:0]
-
-Field --validity_check--packet_in_hdr written by table egress_pkt's action add_packet_in_hdr
-</title></text>
-<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 83
-
-
-</title></rect>
-<rect x="234" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 84
-
-
-</title></rect>
-<rect x="234" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 85
-
-
-</title></rect>
-<rect x="234" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 86
-
-
-</title></rect>
-<rect x="234" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 87
-
-
-</title></rect>
-<rect x="252" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 88
-
-
-</title></rect>
-<rect x="252" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 89
-
-
-</title></rect>
-<rect x="252" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 90
-
-
-</title></rect>
-<rect x="252" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 91
-
-
-</title></rect>
-<rect x="252" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 92
-
-
-</title></rect>
-<rect x="252" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 93
-
-
-</title></rect>
-<rect x="252" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 94
-
-
-</title></rect>
-<rect x="252" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
- Container Bit Width: 8
- Container Address: 95
-
-
-</title></rect>
-<text x="245" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
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- Unassigned
- Container Bit Width: 8
- Container Address: 96
-
-
-</title></rect>
-<rect x="279" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 97
-
-
-</title></rect>
-<rect x="279" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 98
-
-
-</title></rect>
-<rect x="279" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 99
-
-
-</title></rect>
-<rect x="279" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 100
-
-
-</title></rect>
-<rect x="279" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 101
-
-
-</title></rect>
-<rect x="279" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 102
-
-
-</title></rect>
-<rect x="279" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 103
-
-
-</title></rect>
-<rect x="297" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 104
-
-
-</title></rect>
-<rect x="297" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 105
-
-
-</title></rect>
-<rect x="297" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 106
-
-
-</title></rect>
-<rect x="297" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 107
-
-
-</title></rect>
-<rect x="297" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 108
-
-
-</title></rect>
-<rect x="297" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 109
-
-
-</title></rect>
-<rect x="297" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 110
-
-
-</title></rect>
-<rect x="297" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
- Unassigned
- Container Bit Width: 8
- Container Address: 111
-
-
-</title></rect>
-<text x="290" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="324" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 112
-
-
-</title></rect>
-<rect x="324" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 113
-
-
-</title></rect>
-<rect x="324" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 114
-
-
-</title></rect>
-<rect x="324" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 115
-
-
-</title></rect>
-<rect x="324" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 116
-
-
-</title></rect>
-<rect x="324" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 117
-
-
-</title></rect>
-<rect x="324" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 118
-
-
-</title></rect>
-<rect x="324" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 119
-
-
-</title></rect>
-<rect x="342" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 120
-
-
-</title></rect>
-<rect x="342" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 121
-
-
-</title></rect>
-<rect x="342" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 122
-
-
-</title></rect>
-<rect x="342" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 123
-
-
-</title></rect>
-<rect x="342" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 124
-
-
-</title></rect>
-<rect x="342" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 125
-
-
-</title></rect>
-<rect x="342" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 126
-
-
-</title></rect>
-<rect x="342" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
- Unassigned
- Container Bit Width: 8
- Container Address: 127
-
-
-</title></rect>
-<text x="335" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="369" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 128
-
-ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
-ig_intr_md._pad1[0:0] in container bits [14:14]
-ig_intr_md._pad2[1:0] in container bits [13:12]
-ig_intr_md._pad3[2:0] in container bits [11:9]
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-</title></rect>
-<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 129
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_out_hdr.egress_port read by table ingress_pkt's action _packet_out
-</title></rect>
-<text x="371" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 129
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_out_hdr.egress_port read by table ingress_pkt's action _packet_out
-</title></text>
-<rect x="369" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 130
-
-ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md_for_tm.ucast_egress_port written by table ingress_pkt's action _packet_out
-</title></rect>
-<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 130
-
-ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md_for_tm.ucast_egress_port written by table ingress_pkt's action _packet_out
-</title></text>
-<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 131
-
-ipv4.srcAddr[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="369" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 132
-
-ethernet.dstAddr[7:0] in container bits [15:8]
-ethernet.srcAddr[47:40] in container bits [7:0]
-
-</title></rect>
-<rect x="369" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 133
-
-ethernet.etherType[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="369" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:goldenrod""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 134
-
-ecmp_metadata.groupId[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="369" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:goldenrod""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 135
-
-ecmp_metadata.selector[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="387" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 136
-
-
-</title></rect>
-<rect x="387" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 137
-
-
-</title></rect>
-<rect x="387" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 138
-
-
-</title></rect>
-<rect x="387" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 139
-
-
-</title></rect>
-<rect x="387" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 140
-
-
-</title></rect>
-<rect x="387" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 141
-
-
-</title></rect>
-<rect x="387" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 142
-
-
-</title></rect>
-<rect x="387" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 143
-
-
-</title></rect>
-<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 144
-
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md.ingress_port read by table egress_pkt's action add_packet_in_hdr
-</title></rect>
-<text x="416" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 144
-
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md.ingress_port read by table egress_pkt's action add_packet_in_hdr
-</title></text>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 145
-
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_in_hdr.ingress_port written by table egress_pkt's action add_packet_in_hdr
-</title></rect>
-<text x="416" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 145
-
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_in_hdr.ingress_port written by table egress_pkt's action add_packet_in_hdr
-</title></text>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 146
-
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
-
-</title></rect>
-<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 147
-
-
-</title></rect>
-<rect x="414" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 148
-
-
-</title></rect>
-<rect x="414" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 149
-
-
-</title></rect>
-<rect x="414" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 150
-
-
-</title></rect>
-<rect x="414" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 151
-
-
-</title></rect>
-<rect x="432" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 152
-
-
-</title></rect>
-<rect x="432" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 153
-
-
-</title></rect>
-<rect x="432" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 154
-
-
-</title></rect>
-<rect x="432" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 155
-
-
-</title></rect>
-<rect x="432" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 156
-
-
-</title></rect>
-<rect x="432" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 157
-
-
-</title></rect>
-<rect x="432" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 158
-
-
-</title></rect>
-<rect x="432" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 159
-
-
-</title></rect>
-<text x="425" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="459" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 160
-
-
-</title></rect>
-<rect x="459" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 161
-
-
-</title></rect>
-<rect x="459" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 162
-
-
-</title></rect>
-<rect x="459" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 163
-
-
-</title></rect>
-<rect x="459" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 164
-
-
-</title></rect>
-<rect x="459" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 165
-
-
-</title></rect>
-<rect x="459" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 166
-
-
-</title></rect>
-<rect x="459" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 167
-
-
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- Tag-Along Space
-
-ipv4.identification[7:0] in container bits [31:24]
-ipv4.flags[2:0] in container bits [23:21]
-ipv4.fragOffset[12:0] in container bits [20:8]
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-
-tcp.ackNo[31:0] in container bits [31:0]
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- Tag-Along Space
-
-tcp.dataOffset[3:0] in container bits [31:28]
-tcp.res[2:0] in container bits [27:25]
-tcp.ecn[2:0] in container bits [24:22]
-tcp.ctrl[5:0] in container bits [21:16]
-tcp.window[15:0] in container bits [15:0]
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- Tag-Along Space
-
-tcp.checksum[15:0] in container bits [31:16]
-tcp.urgentPtr[15:0] in container bits [15:0]
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- Tag-Along Space
-
-ipv4.ttl[7:0] in container bits [31:24]
-ipv4.protocol[7:0] in container bits [23:16]
-ipv4.hdrChecksum[15:0] in container bits [15:0]
-
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- Tag-Along Space
-
-ipv4.srcAddr[31:0] in container bits [31:0]
-
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- Tag-Along Space
-
-ipv4.dstAddr[31:0] in container bits [31:0]
-
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- Assigned to Egress
- Container Bit Width: 32
- Container Address: 263
- Tag-Along Space
-
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
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- Tag-Along Space
-
-tcp.dataOffset[3:0] in container bits [31:28]
-tcp.res[2:0] in container bits [27:25]
-tcp.ecn[2:0] in container bits [24:22]
-tcp.ctrl[5:0] in container bits [21:16]
-tcp.window[15:0] in container bits [15:0]
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- Tag-Along Space
-
-tcp.checksum[15:0] in container bits [31:16]
-tcp.urgentPtr[15:0] in container bits [15:0]
-
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- Tag-Along Space
-
-ethernet.dstAddr[39:8] in container bits [31:0]
-
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- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
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- Tag-Along Space
-
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- Tag-Along Space
-
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- Tag-Along Space
-
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- Tag-Along Space
-
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- Tag-Along Space
-
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- Tag-Along Space
-
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- Tag-Along Space
-
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- Tag-Along Space
-
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-
-
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- Tag-Along Space
-
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- Tag-Along Space
-
-
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-
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- Tag-Along Space
-
-
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- Tag-Along Space
-
-
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- Tag-Along Space
-
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-
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- Tag-Along Space
-
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-
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-
-
-</title></rect>
-<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 288
- Tag-Along Space
-
-ipv4.version[3:0] in container bits [7:4]
-ipv4.ihl[3:0] in container bits [3:0]
-
-</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 289
- Tag-Along Space
-
-tcp.srcPort[15:8] in container bits [7:0]
-udp.length_[15:8] in container bits [7:0]
-
-</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 290
- Tag-Along Space
-
-tcp.srcPort[7:0] in container bits [7:0]
-udp.length_[7:0] in container bits [7:0]
-
-</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 291
- Tag-Along Space
-
-
-</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 292
- Tag-Along Space
-
-ipv4.version[3:0] in container bits [7:4]
-ipv4.ihl[3:0] in container bits [3:0]
-
-</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 293
- Tag-Along Space
-
-ipv4.diffserv[7:0] in container bits [7:0]
-
-</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 294
- Tag-Along Space
-
-tcp.srcPort[15:8] in container bits [7:0]
-udp.srcPort[15:8] in container bits [7:0]
-
-</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 295
- Tag-Along Space
-
-tcp.srcPort[7:0] in container bits [7:0]
-udp.srcPort[7:0] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 296
- Tag-Along Space
-
-ethernet.dstAddr[47:40] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 301
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 302
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 303
- Tag-Along Space
-
-
-</title></rect>
-<text x="830" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="864" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 304
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 305
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 306
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 307
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 308
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 309
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 310
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 311
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 312
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 313
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 314
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 315
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 316
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 317
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 318
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 319
- Tag-Along Space
-
-
-</title></rect>
-<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 320
- Tag-Along Space
-
-ipv4.diffserv[7:0] in container bits [15:8]
-ipv4.totalLen[15:8] in container bits [7:0]
-
-</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 321
- Tag-Along Space
-
-ipv4.totalLen[7:0] in container bits [15:8]
-ipv4.identification[15:8] in container bits [7:0]
-
-</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 322
- Tag-Along Space
-
-tcp.dstPort[15:0] in container bits [15:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 323
- Tag-Along Space
-
-tcp.seqNo[31:16] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 324
- Tag-Along Space
-
-tcp.seqNo[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 325
- Tag-Along Space
-
-
-</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 326
- Tag-Along Space
-
-ipv4.totalLen[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 327
- Tag-Along Space
-
-ipv4.identification[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 328
- Tag-Along Space
-
-ipv4.flags[2:0] in container bits [15:13]
-ipv4.fragOffset[12:0] in container bits [12:0]
-
-</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 329
- Tag-Along Space
-
-tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 330
- Tag-Along Space
-
-tcp.seqNo[31:16] in container bits [15:0]
-
-</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 331
- Tag-Along Space
-
-tcp.seqNo[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 332
- Tag-Along Space
-
-ethernet.dstAddr[7:0] in container bits [15:8]
-ethernet.srcAddr[47:40] in container bits [7:0]
-
-</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 333
- Tag-Along Space
-
-ethernet.etherType[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 340
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 341
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 342
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 343
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 344
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 345
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 346
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 347
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 348
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 349
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 350
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 351
- Tag-Along Space
-
-
-</title></rect>
-<text x="965" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="999" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 352
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 353
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 354
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 355
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 356
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 357
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 358
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 359
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 360
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 361
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 362
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 363
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 364
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 365
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 366
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 367
- Tag-Along Space
-
-
-</title></rect>
-<text x="1010" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="0" y="0" width="1053" height="198" style="stroke:black; stroke-width:2; fill:none""></rect>
-</svg><br>
-<h2>Stage 1</h2>
-<svg viewBox="0 0 1280 200" preserveAspectRatio="xmlMidYMid meet">
-<rect x="9" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 0
-
-POV.POV[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="9" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 1
-
-ipv4.protocol[7:0] in container bits [31:24]
-ipv4.hdrChecksum[15:0] in container bits [23:8]
-ipv4.srcAddr[31:24] in container bits [7:0]
-
Field ipv4.srcAddr read by table table0 for Immediate.
Field ipv4.srcAddr read by table table0's action ecmp_group (for field list)
</title></rect>
@@ -3208,116 +538,109 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-Field ig_intr_md_for_tm.copy_to_cpu written by table table0's action send_to_cpu
-</title></rect>
-<text x="191" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 64
-
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-Field ig_intr_md_for_tm.copy_to_cpu written by table table0's action send_to_cpu
-</title></text>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 65
-
ipv4.srcAddr[23:16] in container bits [7:0]
Field ipv4.srcAddr read by table table0 for Immediate.
Field ipv4.srcAddr read by table table0's action ecmp_group (for field list)
</title></rect>
+<text x="191" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
+ Assigned to Ingress
+ Container Bit Width: 8
+ Container Address: 64
+
+ipv4.srcAddr[23:16] in container bits [7:0]
+
+Field ipv4.srcAddr read by table table0 for Immediate.
+Field ipv4.srcAddr read by table table0's action ecmp_group (for field list)
+</title></text>
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+ Assigned to Ingress
+ Container Bit Width: 8
+ Container Address: 65
+
+ethernet.dstAddr[47:40] in container bits [7:0]
+
+Field ethernet.dstAddr read by table table0 for a match key
+</title></rect>
<text x="191" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
-Field ipv4.srcAddr read by table table0 for Immediate.
-Field ipv4.srcAddr read by table table0's action ecmp_group (for field list)
+Field ethernet.dstAddr read by table table0 for a match key
</title></text>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
-Field ethernet.dstAddr read by table table0 for a match key
+Field ethernet.srcAddr read by table table0 for a match key
</title></rect>
<text x="191" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
-
-Field ethernet.dstAddr read by table table0 for a match key
-</title></text>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 67
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-Field ethernet.srcAddr read by table table0 for a match key
-</title></rect>
-<text x="191" y="79" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 67
-
ethernet.srcAddr[39:32] in container bits [7:0]
Field ethernet.srcAddr read by table table0 for a match key
</title></text>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 68
+ Container Address: 67
POV.POV[39:32] in container bits [7:0]
Field --validity_check--packet_out_hdr read by table table0 for a gateway expression
+Field --validity_check--packet_out_hdr written by table process_packet_out_table's action _process_packet_out
+Field --validity_check--packet_in_hdr written by table table0's action send_to_cpu
</title></rect>
-<text x="191" y="97" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
+<text x="191" y="79" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">RW<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 68
+ Container Address: 67
POV.POV[39:32] in container bits [7:0]
Field --validity_check--packet_out_hdr read by table table0 for a gateway expression
+Field --validity_check--packet_out_hdr written by table process_packet_out_table's action _process_packet_out
+Field --validity_check--packet_in_hdr written by table table0's action send_to_cpu
</title></text>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 69
+ Container Address: 68
ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
Field ig_intr_md_for_tm.drop_ctl written by table table0's action _drop
</title></rect>
-<text x="191" y="115" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 4
+<text x="191" y="97" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 69
+ Container Address: 68
ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
Field ig_intr_md_for_tm.drop_ctl written by table table0's action _drop
</title></text>
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 69
+
+
+</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
Unassigned
Container Bit Width: 8
@@ -3389,29 +712,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -3744,6 +1066,7 @@
ig_intr_md.ingress_port[8:0] in container bits [8:0]
Field ig_intr_md.ingress_port read by table table0 for a match key
+Field ig_intr_md.ingress_port read by table table0's action send_to_cpu
</title></rect>
<text x="371" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
Assigned to Ingress
@@ -3757,6 +1080,7 @@
ig_intr_md.ingress_port[8:0] in container bits [8:0]
Field ig_intr_md.ingress_port read by table table0 for a match key
+Field ig_intr_md.ingress_port read by table table0's action send_to_cpu
</title></text>
<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 8
Assigned to Ingress
@@ -3768,7 +1092,22 @@
packet_out_hdr._padding[6:0] in container bits [6:0]
packet_in_hdr._padding[6:0] in container bits [6:0]
+Field packet_out_hdr.egress_port read by table process_packet_out_table's action _process_packet_out
+Field packet_in_hdr.ingress_port written by table table0's action send_to_cpu
</title></rect>
+<text x="371" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">RW<title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 129
+
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
+
+Field packet_out_hdr.egress_port read by table process_packet_out_table's action _process_packet_out
+Field packet_in_hdr.ingress_port written by table table0's action send_to_cpu
+</title></text>
<rect x="369" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -3776,7 +1115,9 @@
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+Field ig_intr_md_for_tm.ucast_egress_port written by table process_packet_out_table's action _process_packet_out
Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action set_egress_port
+Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action send_to_cpu
</title></rect>
<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 8
Assigned to Ingress
@@ -3785,7 +1126,9 @@
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+Field ig_intr_md_for_tm.ucast_egress_port written by table process_packet_out_table's action _process_packet_out
Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action set_egress_port
+Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action send_to_cpu
</title></text>
<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 8
Assigned to Ingress
@@ -3942,30 +1285,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -4524,21 +1864,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -4546,49 +1877,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -4596,10 +1967,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -4609,64 +1980,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -4809,7 +2148,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -4819,7 +2158,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -4829,101 +2168,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -5092,174 +2433,2800 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 340
+ Tag-Along Space
+
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
+
+</title></rect>
+<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 341
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="954" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 342
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="954" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 343
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 344
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 345
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 346
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 347
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 348
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 349
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 350
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 351
+ Tag-Along Space
+
+
+</title></rect>
+<text x="965" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="999" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 352
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 353
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 354
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 355
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 356
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 357
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 358
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 359
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 360
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 361
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 362
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 363
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 364
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 365
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 366
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 367
+ Tag-Along Space
+
+
+</title></rect>
+<text x="1010" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="0" y="0" width="1053" height="198" style="stroke:black; stroke-width:2; fill:none""></rect>
+</svg><br>
+<h2>Stage 1</h2>
+<svg viewBox="0 0 1280 200" preserveAspectRatio="xmlMidYMid meet">
+<rect x="9" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 0
+ Assigned to Ingress
+ Container Bit Width: 32
+ Container Address: 0
+
+POV.POV[31:0] in container bits [31:0]
+
+</title></rect>
+<rect x="9" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 0
+ Assigned to Ingress
+ Container Bit Width: 32
+ Container Address: 1
+
+ipv4.protocol[7:0] in container bits [31:24]
+ipv4.hdrChecksum[15:0] in container bits [23:8]
+ipv4.srcAddr[31:24] in container bits [7:0]
+
+</title></rect>
+<rect x="9" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 0
+ Assigned to Ingress
+ Container Bit Width: 32
+ Container Address: 2
+
+ipv4.dstAddr[31:0] in container bits [31:0]
+
+</title></rect>
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+ Container Bit Width: 8
+ Container Address: 97
+
+
+</title></rect>
+<rect x="279" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 98
+
+
+</title></rect>
+<rect x="279" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 99
+
+
+</title></rect>
+<rect x="279" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 100
+
+
+</title></rect>
+<rect x="279" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
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+ Container Bit Width: 8
+ Container Address: 101
+
+
+</title></rect>
+<rect x="279" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 102
+
+
+</title></rect>
+<rect x="279" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 103
+
+
+</title></rect>
+<rect x="297" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 104
+
+
+</title></rect>
+<rect x="297" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 105
+
+
+</title></rect>
+<rect x="297" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 106
+
+
+</title></rect>
+<rect x="297" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 107
+
+
+</title></rect>
+<rect x="297" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 108
+
+
+</title></rect>
+<rect x="297" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 109
+
+
+</title></rect>
+<rect x="297" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 110
+
+
+</title></rect>
+<rect x="297" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 111
+
+
+</title></rect>
+<text x="290" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="324" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 112
+
+
+</title></rect>
+<rect x="324" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 113
+
+
+</title></rect>
+<rect x="324" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 114
+
+
+</title></rect>
+<rect x="324" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 115
+
+
+</title></rect>
+<rect x="324" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 116
+
+
+</title></rect>
+<rect x="324" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 117
+
+
+</title></rect>
+<rect x="324" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 118
+
+
+</title></rect>
+<rect x="324" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 119
+
+
+</title></rect>
+<rect x="342" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 120
+
+
+</title></rect>
+<rect x="342" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 121
+
+
+</title></rect>
+<rect x="342" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 122
+
+
+</title></rect>
+<rect x="342" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 123
+
+
+</title></rect>
+<rect x="342" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 124
+
+
+</title></rect>
+<rect x="342" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 125
+
+
+</title></rect>
+<rect x="342" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 126
+
+
+</title></rect>
+<rect x="342" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 127
+
+
+</title></rect>
+<text x="335" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="369" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 128
+
+ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
+ig_intr_md._pad1[0:0] in container bits [14:14]
+ig_intr_md._pad2[1:0] in container bits [13:12]
+ig_intr_md._pad3[2:0] in container bits [11:9]
+ig_intr_md.ingress_port[8:0] in container bits [8:0]
+
+</title></rect>
+<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 129
+
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
+
+</title></rect>
+<rect x="369" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 130
+
+ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+
+Field ig_intr_md_for_tm.ucast_egress_port written by table ecmp_group_table's action set_egress_port
+</title></rect>
+<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 130
+
+ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+
+Field ig_intr_md_for_tm.ucast_egress_port written by table ecmp_group_table's action set_egress_port
+</title></text>
+<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 131
+
+ipv4.srcAddr[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="369" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 132
+
+ethernet.dstAddr[7:0] in container bits [15:8]
+ethernet.srcAddr[47:40] in container bits [7:0]
+
+</title></rect>
+<rect x="369" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 133
+
+ethernet.etherType[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="369" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:goldenrod""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 134
+
+ecmp_metadata.groupId[15:0] in container bits [15:0]
+
+Field ecmp_metadata.groupId read by table ecmp_group_table for a match key
+</title></rect>
+<text x="371" y="133" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 134
+
+ecmp_metadata.groupId[15:0] in container bits [15:0]
+
+Field ecmp_metadata.groupId read by table ecmp_group_table for a match key
+</title></text>
+<rect x="369" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:goldenrod""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 135
+
+ecmp_metadata.selector[15:0] in container bits [15:0]
+
+Field ecmp_metadata.selector read by table ecmp_group_table for a match key
+</title></rect>
+<text x="371" y="151" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 135
+
+ecmp_metadata.selector[15:0] in container bits [15:0]
+
+Field ecmp_metadata.selector read by table ecmp_group_table for a match key
+</title></text>
+<rect x="387" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 136
+
+
+</title></rect>
+<rect x="387" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 137
+
+
+</title></rect>
+<rect x="387" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 138
+
+
+</title></rect>
+<rect x="387" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 139
+
+
+</title></rect>
+<rect x="387" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 140
+
+
+</title></rect>
+<rect x="387" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 141
+
+
+</title></rect>
+<rect x="387" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 142
+
+
+</title></rect>
+<rect x="387" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 143
+
+
+</title></rect>
+<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 144
+
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
+
+</title></rect>
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 145
+
+
+</title></rect>
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 146
+
+
+</title></rect>
+<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 147
+
+
+</title></rect>
+<rect x="414" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 148
+
+
+</title></rect>
+<rect x="414" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 149
+
+
+</title></rect>
+<rect x="414" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 150
+
+
+</title></rect>
+<rect x="414" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 151
+
+
+</title></rect>
+<rect x="432" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 152
+
+
+</title></rect>
+<rect x="432" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 153
+
+
+</title></rect>
+<rect x="432" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 154
+
+
+</title></rect>
+<rect x="432" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 155
+
+
+</title></rect>
+<rect x="432" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 156
+
+
+</title></rect>
+<rect x="432" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 157
+
+
+</title></rect>
+<rect x="432" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
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+ Container Address: 158
+
+
+</title></rect>
+<rect x="432" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 159
+
+
+</title></rect>
+<text x="425" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
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+ Unassigned
+ Container Bit Width: 16
+ Container Address: 160
+
+
+</title></rect>
+<rect x="459" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 161
+
+
+</title></rect>
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+ Unassigned
+ Container Bit Width: 16
+ Container Address: 162
+
+
+</title></rect>
+<rect x="459" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 163
+
+
+</title></rect>
+<rect x="459" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
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+ Container Address: 164
+
+
+</title></rect>
+<rect x="459" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 165
+
+
+</title></rect>
+<rect x="459" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 166
+
+
+</title></rect>
+<rect x="459" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 167
+
+
+</title></rect>
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+ Unassigned
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+ Container Address: 168
+
+
+</title></rect>
+<rect x="477" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
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+ Container Address: 169
+
+
+</title></rect>
+<rect x="477" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 170
+
+
+</title></rect>
+<rect x="477" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
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+ Container Address: 171
+
+
+</title></rect>
+<rect x="477" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 172
+
+
+</title></rect>
+<rect x="477" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 173
+
+
+</title></rect>
+<rect x="477" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 174
+
+
+</title></rect>
+<rect x="477" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 175
+
+
+</title></rect>
+<text x="470" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="504" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 176
+
+
+</title></rect>
+<rect x="504" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 177
+
+
+</title></rect>
+<rect x="504" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 178
+
+
+</title></rect>
+<rect x="504" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 179
+
+
+</title></rect>
+<rect x="504" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 180
+
+
+</title></rect>
+<rect x="504" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 181
+
+
+</title></rect>
+<rect x="504" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 182
+
+
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+ipv4.identification[7:0] in container bits [31:24]
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+</title></rect>
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+</title></rect>
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+tcp.checksum[15:0] in container bits [31:16]
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+</title></rect>
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+ipv4.ttl[7:0] in container bits [31:24]
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+ipv4.srcAddr[31:0] in container bits [31:0]
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+ipv4.dstAddr[31:0] in container bits [31:0]
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+udp.length_[15:0] in container bits [31:16]
+tcp.ackNo[31:0] in container bits [31:0]
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+</title></rect>
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+tcp.dataOffset[3:0] in container bits [31:28]
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+</title></rect>
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+tcp.checksum[15:0] in container bits [31:16]
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+ethernet.dstAddr[39:8] in container bits [31:0]
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+ethernet.srcAddr[31:0] in container bits [31:0]
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+ipv4.version[3:0] in container bits [7:4]
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+tcp.srcPort[15:8] in container bits [7:0]
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+tcp.srcPort[7:0] in container bits [7:0]
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+</title></rect>
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+tcp.dstPort[15:8] in container bits [7:0]
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+tcp.dstPort[7:0] in container bits [7:0]
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+ Container Bit Width: 8
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+ipv4.version[3:0] in container bits [7:4]
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+ipv4.diffserv[7:0] in container bits [7:0]
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+ Tag-Along Space
+
+tcp.srcPort[15:8] in container bits [7:0]
+udp.srcPort[15:8] in container bits [7:0]
+
+</title></rect>
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 299
+ Tag-Along Space
+
+tcp.srcPort[7:0] in container bits [7:0]
+udp.srcPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 300
+ Tag-Along Space
+
+ethernet.dstAddr[47:40] in container bits [7:0]
+
+</title></rect>
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 301
+ Tag-Along Space
+
+ethernet.srcAddr[39:32] in container bits [7:0]
+
+</title></rect>
+<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 302
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 303
+ Tag-Along Space
+
+
+</title></rect>
+<text x="830" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="864" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 304
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 305
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 306
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 307
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 308
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 309
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 310
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 311
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 312
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 313
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 314
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 315
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 316
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 317
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 318
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 319
+ Tag-Along Space
+
+
+</title></rect>
+<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 320
+ Tag-Along Space
+
+ipv4.diffserv[7:0] in container bits [15:8]
+ipv4.totalLen[15:8] in container bits [7:0]
+
+</title></rect>
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 321
+ Tag-Along Space
+
+ipv4.totalLen[7:0] in container bits [15:8]
+ipv4.identification[15:8] in container bits [7:0]
+
+</title></rect>
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 322
+ Tag-Along Space
+
+tcp.seqNo[31:16] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 323
+ Tag-Along Space
+
+tcp.seqNo[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 324
+ Tag-Along Space
+
+tcp.ackNo[31:16] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 325
+ Tag-Along Space
+
+tcp.ackNo[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 326
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
+ipv4.totalLen[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 333
+ Tag-Along Space
+
+ipv4.identification[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
Tag-Along Space
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
+ipv4.flags[2:0] in container bits [15:13]
+ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Egress
Container Bit Width: 16
Container Address: 335
Tag-Along Space
+tcp.dstPort[15:0] in container bits [15:0]
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
+ Assigned to Egress
Container Bit Width: 16
Container Address: 336
Tag-Along Space
+tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
+ Assigned to Egress
Container Bit Width: 16
Container Address: 337
Tag-Along Space
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
+ Assigned to Egress
Container Bit Width: 16
Container Address: 338
Tag-Along Space
+ethernet.dstAddr[7:0] in container bits [15:8]
+ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
+ Assigned to Egress
Container Bit Width: 16
Container Address: 339
Tag-Along Space
+ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
+ Assigned to Egress
Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -5945,20 +5912,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -5966,31 +5933,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -6064,29 +6030,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -6418,7 +6383,21 @@
ig_intr_md._pad3[2:0] in container bits [11:9]
ig_intr_md.ingress_port[8:0] in container bits [8:0]
+Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
</title></rect>
+<text x="371" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 128
+
+ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
+ig_intr_md._pad1[0:0] in container bits [14:14]
+ig_intr_md._pad2[1:0] in container bits [13:12]
+ig_intr_md._pad3[2:0] in container bits [11:9]
+ig_intr_md.ingress_port[8:0] in container bits [8:0]
+
+Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
+</title></text>
<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -6437,16 +6416,18 @@
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-Field ig_intr_md_for_tm.ucast_egress_port written by table ecmp_group_table's action set_egress_port
+Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
+Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
</title></rect>
-<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 8
+<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
Container Address: 130
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-Field ig_intr_md_for_tm.ucast_egress_port written by table ecmp_group_table's action set_egress_port
+Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
+Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
</title></text>
<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 8
Assigned to Ingress
@@ -6480,17 +6461,7 @@
ecmp_metadata.groupId[15:0] in container bits [15:0]
-Field ecmp_metadata.groupId read by table ecmp_group_table for a match key
</title></rect>
-<text x="371" y="133" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 134
-
-ecmp_metadata.groupId[15:0] in container bits [15:0]
-
-Field ecmp_metadata.groupId read by table ecmp_group_table for a match key
-</title></text>
<rect x="369" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:goldenrod""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -6498,17 +6469,7 @@
ecmp_metadata.selector[15:0] in container bits [15:0]
-Field ecmp_metadata.selector read by table ecmp_group_table for a match key
</title></rect>
-<text x="371" y="151" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 135
-
-ecmp_metadata.selector[15:0] in container bits [15:0]
-
-Field ecmp_metadata.selector read by table ecmp_group_table for a match key
-</title></text>
<rect x="387" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
Unassigned
Container Bit Width: 16
@@ -6566,30 +6527,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -7148,21 +7106,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -7170,49 +7119,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -7220,10 +7209,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -7233,64 +7222,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -7433,7 +7390,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -7443,7 +7400,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -7453,101 +7410,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -7716,174 +7675,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -8569,20 +8531,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -8590,31 +8552,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -8688,29 +8649,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -9042,21 +9002,7 @@
ig_intr_md._pad3[2:0] in container bits [11:9]
ig_intr_md.ingress_port[8:0] in container bits [8:0]
-Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
</title></rect>
-<text x="371" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 128
-
-ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
-ig_intr_md._pad1[0:0] in container bits [14:14]
-ig_intr_md._pad2[1:0] in container bits [13:12]
-ig_intr_md._pad3[2:0] in container bits [11:9]
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
-</title></text>
<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -9075,19 +9021,7 @@
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
-Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
</title></rect>
-<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 130
-
-ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
-Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
-</title></text>
<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -9186,30 +9120,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -9768,21 +9699,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -9790,49 +9712,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -9840,10 +9802,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -9853,64 +9815,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -10053,7 +9983,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -10063,7 +9993,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -10073,101 +10003,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -10336,174 +10268,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -11189,20 +11124,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -11210,31 +11145,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -11308,29 +11242,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -11780,30 +11713,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -12362,21 +12292,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -12384,49 +12305,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -12434,10 +12395,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -12447,64 +12408,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -12647,7 +12576,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -12657,7 +12586,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -12667,101 +12596,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -12930,174 +12861,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -13783,20 +13717,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -13804,31 +13738,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -13902,29 +13835,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -14374,30 +14306,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -14956,21 +14885,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -14978,49 +14898,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -15028,10 +14988,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -15041,64 +15001,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -15241,7 +15169,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -15251,7 +15179,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -15261,101 +15189,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -15524,174 +15454,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -16377,20 +16310,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -16398,31 +16331,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -16496,29 +16428,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -16968,30 +16899,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -17550,21 +17478,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -17572,49 +17491,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -17622,10 +17581,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -17635,64 +17594,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -17835,7 +17762,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -17845,7 +17772,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -17855,101 +17782,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -18118,174 +18047,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -18971,20 +18903,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -18992,31 +18924,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -19090,29 +19021,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -19562,30 +19492,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -20144,21 +20071,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -20166,49 +20084,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -20216,10 +20174,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -20229,64 +20187,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -20429,7 +20355,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -20439,7 +20365,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -20449,101 +20375,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -20712,174 +20640,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -21565,20 +21496,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -21586,31 +21517,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -21684,29 +21614,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -22156,30 +22085,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -22738,21 +22664,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -22760,49 +22677,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -22810,10 +22767,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -22823,64 +22780,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -23023,7 +22948,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -23033,7 +22958,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -23043,101 +22968,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -23306,174 +23233,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -24159,20 +24089,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -24180,31 +24110,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -24278,29 +24207,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -24750,30 +24678,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -25332,21 +25257,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -25354,49 +25270,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -25404,10 +25360,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -25417,64 +25373,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -25617,7 +25541,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -25627,7 +25551,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -25637,101 +25561,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -25900,174 +25826,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -26753,20 +26682,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -26774,31 +26703,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -26872,29 +26800,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -27344,30 +27271,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -27926,21 +27850,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -27948,49 +27863,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -27998,10 +27953,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -28011,64 +27966,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -28211,7 +28134,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -28221,7 +28144,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -28231,101 +28154,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -28494,174 +28419,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -29347,20 +29275,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -29368,31 +29296,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -29466,29 +29393,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -29938,30 +29864,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -30520,21 +30443,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -30542,49 +30456,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -30592,10 +30546,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -30605,64 +30559,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -30805,7 +30727,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -30815,7 +30737,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -30825,101 +30747,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -31088,174 +31012,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -31478,7 +31405,7 @@
<text x="1010" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
<rect x="0" y="0" width="1053" height="198" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
-<br><i>Created on Thu Sep 7 14:49:07 2017</i>
+<br><i>Created on Fri Sep 8 08:25:33 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
</body>
</html>
\ No newline at end of file
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/table_placement.html b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/table_placement.html
index 34e69c5..62c6594 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/table_placement.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/mavericks/visualization/table_placement.html
@@ -4,10 +4,13 @@
<h2>Pipeline 0</h2>
<svg viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
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-<rect x="39" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="0" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:aquamarine""><title>SRAM for table0__action__</title></rect>
+<rect x="0" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:blue""><title>TCAM for table0</title></rect>
+<rect x="13" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:blue""><title>TCAM for table0</title></rect>
+<rect x="26" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:blue""><title>TCAM for table0</title></rect>
+<rect x="13" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:blue""><title>SRAM for table0</title></rect>
+<rect x="26" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:blueviolet""><title>SRAM for table0_counter</title></rect>
+<rect x="39" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:blueviolet""><title>SRAM for table0_counter</title></rect>
<rect x="52" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
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<rect x="78" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
@@ -84,9 +87,6 @@
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<rect x="91" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
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<rect x="39" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="52" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="65" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
@@ -110,14 +110,11 @@
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<text x="41" y="245" textLength="24" lengthAdjust="spacingAndGlyphs" textHeight="24" heightAdjust="spacingAndGlyphs" style="fill:black;">0</text>
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-<rect x="169" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="117" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chartreuse""><title>SRAM for ecmp_group_table</title></rect>
+<rect x="130" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chartreuse""><title>SRAM for ecmp_group_table</title></rect>
+<rect x="143" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chartreuse""><title>SRAM for ecmp_group_table</title></rect>
+<rect x="156" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chocolate""><title>SRAM for ecmp_group_table_counter</title></rect>
+<rect x="169" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chocolate""><title>SRAM for ecmp_group_table_counter</title></rect>
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<rect x="208" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="117" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
+<rect x="130" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
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<rect x="156" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
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+<rect x="832" y="104" width="26" height="26" style="stroke:black; stroke-width:1; fill:chartreuse""><title>ecmp_group_table</title></rect>
+<text x="860" y="128" style="fill:black;">ecmp_group_table</text>
+<rect x="832" y="143" width="26" height="26" style="stroke:black; stroke-width:1; fill:chocolate""><title>ecmp_group_table_counter</title></rect>
+<text x="860" y="167" style="fill:black;">ecmp_group_table_counter</text>
+<rect x="832" y="182" width="26" height="26" style="stroke:black; stroke-width:1; fill:cyan""><title>egress_port_counter</title></rect>
+<text x="860" y="206" style="fill:black;">egress_port_counter</text>
+<rect x="832" y="221" width="26" height="26" style="stroke:black; stroke-width:1; fill:crimson""><title>ingress_port_counter</title></rect>
+<text x="860" y="245" style="fill:black;">ingress_port_counter</text>
+<rect x="832" y="260" width="26" height="26" style="stroke:black; stroke-width:1; fill:blue""><title>table0</title></rect>
+<text x="860" y="284" style="fill:black;">table0</text>
+<rect x="832" y="299" width="26" height="26" style="stroke:black; stroke-width:1; fill:aquamarine""><title>table0__action__</title></rect>
+<text x="860" y="323" style="fill:black;">table0__action__</text>
+<rect x="832" y="338" width="26" height="26" style="stroke:black; stroke-width:1; fill:blueviolet""><title>table0_counter</title></rect>
+<text x="860" y="362" style="fill:black;">table0_counter</text>
+<rect x="806" y="39" width="390" height="364" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="819" y="52" width="364" height="338" style="stroke:black; stroke-width:1; fill:none""></rect>
<rect x="0" y="0" width="754" height="728" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
<table border="1">
@@ -1322,19 +1321,7 @@
<td align="center">0</td>
</tr>
<tr>
-<td align="center">_condition_3</td>
-<td align="center">0</td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-</tr>
-<tr>
-<td align="center">ingress_pkt__action__</td>
+<td align="center">process_packet_out_table__action__</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1346,56 +1333,20 @@
<td align="center">0</td>
</tr>
<tr>
-<td align="center">ingress_pkt</td>
+<td align="center">process_packet_out_table</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">1</td>
-</tr>
-<tr>
-<td align="center">egress_pkt__action__</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-</tr>
-<tr>
-<td align="center">egress_pkt</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">1</td>
-</tr>
-<tr>
-<td align="center">_condition_1</td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center">1</td>
<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
-<td align="center">0</td>
+<td align="center">1</td>
</tr>
<tr>
<td align="center">table0__action__</td>
-<td align="center">1</td>
+<td align="center">0</td>
<td align="center">12</td>
<td align="center">1</td>
<td align="center">0</td>
@@ -1407,7 +1358,7 @@
</tr>
<tr>
<td align="center">table0</td>
-<td align="center">1</td>
+<td align="center">0</td>
<td align="center">16</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1419,7 +1370,7 @@
</tr>
<tr>
<td align="center">table0_counter</td>
-<td align="center">1</td>
+<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1431,7 +1382,7 @@
</tr>
<tr>
<td align="center">ecmp_group_table__action__</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1443,7 +1394,7 @@
</tr>
<tr>
<td align="center">ecmp_group_table</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">4</td>
<td align="center">30</td>
<td align="center">0</td>
@@ -1455,7 +1406,7 @@
</tr>
<tr>
<td align="center">ecmp_group_table_counter</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1467,7 +1418,7 @@
</tr>
<tr>
<td align="center">_condition_2</td>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">2</td>
<td align="center">9</td>
<td align="center">1</td>
@@ -1479,7 +1430,7 @@
</tr>
<tr>
<td align="center">ingress_port_count_table__action__</td>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1491,7 +1442,7 @@
</tr>
<tr>
<td align="center">ingress_port_count_table</td>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1503,7 +1454,7 @@
</tr>
<tr>
<td align="center">egress_port_count_table__action__</td>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1515,7 +1466,7 @@
</tr>
<tr>
<td align="center">egress_port_count_table</td>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">1</td>
@@ -1527,7 +1478,7 @@
</tr>
<tr>
<td align="center">ingress_port_counter</td>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1539,7 +1490,7 @@
</tr>
<tr>
<td align="center">egress_port_counter</td>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1550,7 +1501,7 @@
<td align="center">0</td>
</tr>
</table>
-<br><i>Created on Thu Sep 7 14:49:07 2017</i>
+<br><i>Created on Fri Sep 8 08:25:32 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
</body>
</html>
\ No newline at end of file
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/context.json b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/context.json
index 6c8e3b9..4f05f0a 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/context.json
@@ -1,5 +1,5 @@
{
- "build_date": "Thu Sep 7 14:49:59 2017",
+ "build_date": "Fri Sep 8 08:26:24 2017",
"phv_allocation": [
{
"ingress": [
@@ -26,7 +26,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -50,7 +50,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -67,7 +67,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -84,7 +84,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -101,7 +101,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -118,7 +118,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -130,7 +130,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -147,24 +147,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -177,11 +160,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -194,11 +177,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -211,7 +194,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -221,37 +204,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -266,11 +249,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -287,7 +270,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -328,7 +311,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -345,7 +328,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -362,7 +345,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -379,7 +362,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -391,7 +374,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -425,7 +408,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -442,7 +425,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -459,7 +442,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -483,7 +466,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -495,7 +478,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -512,24 +495,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -541,7 +507,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -553,567 +519,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -1137,7 +543,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1150,7 +556,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -1166,7 +572,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1179,45 +585,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -1242,7 +614,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -1259,11 +1225,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1275,7 +1241,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1288,11 +1254,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -1304,7 +1270,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -1317,11 +1283,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -1334,11 +1300,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -1351,11 +1317,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1368,11 +1334,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1385,7 +1351,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -1414,11 +1380,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1427,10 +1393,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1443,28 +1426,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1477,11 +1443,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -1493,7 +1459,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -1506,11 +1472,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1523,7 +1489,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -1536,6 +1502,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -1567,7 +1545,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -1591,7 +1569,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -1608,7 +1586,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -1625,7 +1603,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -1642,7 +1620,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -1659,7 +1637,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -1671,7 +1649,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1688,24 +1666,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -1718,11 +1679,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -1735,11 +1696,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -1752,7 +1713,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -1762,37 +1723,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -1807,11 +1768,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -1828,7 +1789,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -1869,7 +1830,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -1886,7 +1847,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -1903,7 +1864,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1920,7 +1881,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -1932,7 +1893,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -1966,7 +1927,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -1983,7 +1944,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2000,7 +1961,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -2024,7 +1985,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -2036,7 +1997,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -2053,24 +2014,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -2082,7 +2026,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -2094,567 +2038,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
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- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
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- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -2678,7 +2062,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2691,7 +2075,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -2707,7 +2091,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2720,45 +2104,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -2783,7 +2133,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -2800,11 +2744,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2816,7 +2760,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2829,11 +2773,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -2845,7 +2789,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -2858,11 +2802,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -2875,11 +2819,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -2892,11 +2836,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2909,11 +2853,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2926,7 +2870,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -2955,11 +2899,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2968,10 +2912,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -2984,28 +2945,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3018,11 +2962,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -3034,7 +2978,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -3047,11 +2991,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3064,7 +3008,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -3077,6 +3021,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -3108,7 +3064,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -3132,7 +3088,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -3149,7 +3105,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -3166,7 +3122,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -3183,7 +3139,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -3200,7 +3156,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -3212,7 +3168,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3229,24 +3185,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -3259,11 +3198,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -3276,11 +3215,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -3293,7 +3232,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -3303,37 +3242,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -3348,11 +3287,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -3369,7 +3308,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -3410,7 +3349,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -3427,7 +3366,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -3444,7 +3383,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3461,7 +3400,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -3473,7 +3412,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -3507,7 +3446,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3524,7 +3463,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -3541,7 +3480,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -3565,7 +3504,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -3577,7 +3516,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -3594,24 +3533,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -3623,7 +3545,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -3635,567 +3557,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
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- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -4219,7 +3581,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4232,7 +3594,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -4248,7 +3610,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4261,45 +3623,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -4324,7 +3652,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -4341,11 +4263,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4357,7 +4279,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4370,11 +4292,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -4386,7 +4308,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -4399,11 +4321,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -4416,11 +4338,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -4433,11 +4355,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4450,11 +4372,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4467,7 +4389,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -4496,11 +4418,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4509,10 +4431,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4525,28 +4464,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4559,11 +4481,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -4575,7 +4497,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -4588,11 +4510,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4605,7 +4527,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -4618,6 +4540,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -4649,7 +4583,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -4673,7 +4607,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -4690,7 +4624,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -4707,7 +4641,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -4724,7 +4658,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -4741,7 +4675,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -4753,7 +4687,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -4770,24 +4704,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -4800,11 +4717,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -4817,11 +4734,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -4834,7 +4751,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -4844,37 +4761,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -4889,11 +4806,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -4910,7 +4827,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -4951,7 +4868,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -4968,7 +4885,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -4985,7 +4902,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5002,7 +4919,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -5014,7 +4931,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -5048,7 +4965,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5065,7 +4982,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5082,7 +4999,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -5106,7 +5023,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -5118,7 +5035,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -5135,24 +5052,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -5164,7 +5064,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -5176,567 +5076,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
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- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
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- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
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- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -5760,7 +5100,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5773,7 +5113,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -5789,7 +5129,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5802,45 +5142,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -5865,7 +5171,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -5882,11 +5782,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5898,7 +5798,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5911,11 +5811,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -5927,7 +5827,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -5940,11 +5840,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -5957,11 +5857,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -5974,11 +5874,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -5991,11 +5891,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6008,7 +5908,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -6037,11 +5937,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6050,10 +5950,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6066,28 +5983,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6100,11 +6000,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -6116,7 +6016,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -6129,11 +6029,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6146,7 +6046,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -6159,6 +6059,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -6190,7 +6102,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -6214,7 +6126,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -6231,7 +6143,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -6248,7 +6160,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -6265,7 +6177,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -6282,7 +6194,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -6294,7 +6206,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6311,24 +6223,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -6341,11 +6236,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -6358,11 +6253,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -6375,7 +6270,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -6385,37 +6280,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -6430,11 +6325,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -6451,7 +6346,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -6492,7 +6387,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -6509,7 +6404,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -6526,7 +6421,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6543,7 +6438,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -6555,7 +6450,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -6589,7 +6484,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6606,7 +6501,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -6623,7 +6518,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -6647,7 +6542,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -6659,7 +6554,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -6676,24 +6571,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -6705,7 +6583,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -6717,567 +6595,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
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- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
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- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -7301,7 +6619,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7314,7 +6632,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -7330,7 +6648,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7343,45 +6661,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -7406,7 +6690,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -7423,11 +7301,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7439,7 +7317,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7452,11 +7330,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -7468,7 +7346,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -7481,11 +7359,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -7498,11 +7376,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -7515,11 +7393,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7532,11 +7410,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7549,7 +7427,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -7578,11 +7456,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7591,10 +7469,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7607,28 +7502,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7641,11 +7519,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -7657,7 +7535,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -7670,11 +7548,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7687,7 +7565,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -7700,6 +7578,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -7731,7 +7621,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -7755,7 +7645,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -7772,7 +7662,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -7789,7 +7679,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -7806,7 +7696,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -7823,7 +7713,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -7835,7 +7725,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -7852,24 +7742,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -7882,11 +7755,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -7899,11 +7772,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -7916,7 +7789,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -7926,37 +7799,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -7971,11 +7844,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -7992,7 +7865,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -8033,7 +7906,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -8050,7 +7923,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -8067,7 +7940,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8084,7 +7957,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -8096,7 +7969,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -8130,7 +8003,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8147,7 +8020,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8164,7 +8037,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -8188,7 +8061,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -8200,7 +8073,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -8217,24 +8090,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -8246,7 +8102,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -8258,567 +8114,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
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- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
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- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
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- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
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- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
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- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
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- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
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- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
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- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
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- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
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- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
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- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
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- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
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- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -8842,7 +8138,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8855,7 +8151,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -8871,7 +8167,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8884,45 +8180,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -8947,7 +8209,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -8964,11 +8820,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8980,7 +8836,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -8993,11 +8849,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -9009,7 +8865,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -9022,11 +8878,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -9039,11 +8895,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -9056,11 +8912,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9073,11 +8929,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9090,7 +8946,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -9119,11 +8975,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9132,10 +8988,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9148,28 +9021,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9182,11 +9038,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -9198,7 +9054,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -9211,11 +9067,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9228,7 +9084,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -9241,6 +9097,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -9272,7 +9140,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -9296,7 +9164,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -9313,7 +9181,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -9330,7 +9198,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -9347,7 +9215,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -9364,7 +9232,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -9376,7 +9244,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9393,24 +9261,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -9423,11 +9274,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -9440,11 +9291,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -9457,7 +9308,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -9467,37 +9318,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -9512,11 +9363,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -9533,7 +9384,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -9574,7 +9425,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -9591,7 +9442,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -9608,7 +9459,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9625,7 +9476,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -9637,7 +9488,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -9671,7 +9522,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9688,7 +9539,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -9705,7 +9556,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -9729,7 +9580,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -9741,7 +9592,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -9758,24 +9609,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -9787,7 +9621,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -9799,567 +9633,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
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- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
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- "phv_msb": 7,
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- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
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- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
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- },
- {
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- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
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- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
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- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
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- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
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- "position_offset": 64,
- "phv_lsb": 8,
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- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
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- {
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- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
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- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
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- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
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- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
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- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
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- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
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- "is_pov": true,
- "pov_headers": [
- {
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- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
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- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
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- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
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- "records": [
- {
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- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
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- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
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- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
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- "records": [
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- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
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- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
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- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
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- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
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- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -10383,7 +9657,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10396,7 +9670,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -10412,7 +9686,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10425,45 +9699,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -10488,7 +9728,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -10505,11 +10339,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10521,7 +10355,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10534,11 +10368,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -10550,7 +10384,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -10563,11 +10397,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -10580,11 +10414,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -10597,11 +10431,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10614,11 +10448,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10631,7 +10465,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -10660,11 +10494,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10673,10 +10507,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10689,28 +10540,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10723,11 +10557,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -10739,7 +10573,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -10752,11 +10586,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10769,7 +10603,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -10782,6 +10616,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -10813,7 +10659,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -10837,7 +10683,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -10854,7 +10700,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -10871,7 +10717,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -10888,7 +10734,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -10905,7 +10751,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -10917,7 +10763,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -10934,24 +10780,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -10964,11 +10793,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -10981,11 +10810,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -10998,7 +10827,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -11008,37 +10837,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -11053,11 +10882,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -11074,7 +10903,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -11115,7 +10944,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -11132,7 +10961,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -11149,7 +10978,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11166,7 +10995,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -11178,7 +11007,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -11212,7 +11041,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11229,7 +11058,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11246,7 +11075,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -11270,7 +11099,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -11282,7 +11111,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -11299,24 +11128,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -11328,7 +11140,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -11340,567 +11152,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
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- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
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- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
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- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
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- "position_offset": 18,
- "phv_lsb": 0,
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- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
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- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
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- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
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- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
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- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
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- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
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- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
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- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -11924,7 +11176,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11937,7 +11189,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -11953,7 +11205,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -11966,45 +11218,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -12029,7 +11247,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -12046,11 +11858,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12062,7 +11874,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12075,11 +11887,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -12091,7 +11903,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -12104,11 +11916,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -12121,11 +11933,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -12138,11 +11950,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12155,11 +11967,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12172,7 +11984,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -12201,11 +12013,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12214,10 +12026,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12230,28 +12059,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12264,11 +12076,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -12280,7 +12092,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -12293,11 +12105,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12310,7 +12122,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -12323,6 +12135,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -12354,7 +12178,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -12378,7 +12202,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12395,7 +12219,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12412,7 +12236,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -12429,7 +12253,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -12446,7 +12270,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -12458,7 +12282,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12475,24 +12299,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -12505,11 +12312,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -12522,11 +12329,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -12539,7 +12346,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -12549,37 +12356,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -12594,11 +12401,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -12615,7 +12422,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -12656,7 +12463,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -12673,7 +12480,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -12690,7 +12497,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12707,7 +12514,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -12719,7 +12526,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -12753,7 +12560,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12770,7 +12577,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -12787,7 +12594,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -12811,7 +12618,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -12823,7 +12630,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -12840,24 +12647,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -12869,7 +12659,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -12881,567 +12671,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
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- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -13465,7 +12695,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13478,7 +12708,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -13494,7 +12724,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13507,45 +12737,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -13570,7 +12766,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -13587,11 +13377,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13603,7 +13393,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13616,11 +13406,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -13632,7 +13422,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -13645,11 +13435,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -13662,11 +13452,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -13679,11 +13469,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13696,11 +13486,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13713,7 +13503,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -13742,11 +13532,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13755,10 +13545,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13771,28 +13578,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13805,11 +13595,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -13821,7 +13611,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -13834,11 +13624,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -13851,7 +13641,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -13864,6 +13654,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -13895,7 +13697,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -13919,7 +13721,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -13936,7 +13738,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -13953,7 +13755,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -13970,7 +13772,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -13987,7 +13789,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -13999,7 +13801,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14016,24 +13818,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -14046,11 +13831,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -14063,11 +13848,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -14080,7 +13865,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -14090,37 +13875,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -14135,11 +13920,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -14156,7 +13941,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -14197,7 +13982,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -14214,7 +13999,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -14231,7 +14016,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14248,7 +14033,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -14260,7 +14045,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -14294,7 +14079,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14311,7 +14096,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -14328,7 +14113,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -14352,7 +14137,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -14364,7 +14149,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -14381,24 +14166,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -14410,7 +14178,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -14422,567 +14190,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
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- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
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- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
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- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
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- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -15006,7 +14214,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15019,7 +14227,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -15035,7 +14243,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15048,45 +14256,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -15111,7 +14285,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -15128,11 +14896,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15144,7 +14912,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15157,11 +14925,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -15173,7 +14941,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -15186,11 +14954,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -15203,11 +14971,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -15220,11 +14988,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15237,11 +15005,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15254,7 +15022,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -15283,11 +15051,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15296,10 +15064,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15312,28 +15097,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15346,11 +15114,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -15362,7 +15130,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -15375,11 +15143,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15392,7 +15160,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -15405,6 +15173,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -15436,7 +15216,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -15460,7 +15240,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15477,7 +15257,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15494,7 +15274,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -15511,7 +15291,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -15528,7 +15308,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -15540,7 +15320,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15557,24 +15337,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -15587,11 +15350,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -15604,11 +15367,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -15621,7 +15384,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -15631,37 +15394,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -15676,11 +15439,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -15697,7 +15460,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -15738,7 +15501,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -15755,7 +15518,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -15772,7 +15535,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15789,7 +15552,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -15801,7 +15564,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -15835,7 +15598,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15852,7 +15615,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -15869,7 +15632,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -15893,7 +15656,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -15905,7 +15668,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -15922,24 +15685,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -15951,7 +15697,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -15963,567 +15709,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
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- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
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- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -16547,7 +15733,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16560,7 +15746,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -16576,7 +15762,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16589,45 +15775,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -16652,7 +15804,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -16669,11 +16415,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16685,7 +16431,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16698,11 +16444,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -16714,7 +16460,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -16727,11 +16473,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -16744,11 +16490,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -16761,11 +16507,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16778,11 +16524,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16795,7 +16541,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -16824,11 +16570,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16837,10 +16583,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16853,28 +16616,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16887,11 +16633,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -16903,7 +16649,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -16916,11 +16662,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -16933,7 +16679,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -16946,6 +16692,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -16977,7 +16735,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 20,
+ "position_offset": 19,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -17001,7 +16759,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -17018,7 +16776,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 58,
+ "position_offset": 57,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -17035,7 +16793,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -17052,7 +16810,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 31,
@@ -17069,7 +16827,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 67,
+ "position_offset": 66,
"phv_lsb": 16,
"is_pov": false,
"field_msb": 15,
@@ -17081,7 +16839,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 56,
+ "position_offset": 55,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17098,24 +16856,7 @@
"records": [
{
"word_bit_width": 8,
- "position_offset": 12,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 65,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 23,
@@ -17128,11 +16869,11 @@
]
},
{
- "phv_number": 66,
+ "phv_number": 65,
"records": [
{
"word_bit_width": 8,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -17145,11 +16886,11 @@
]
},
{
- "phv_number": 67,
+ "phv_number": 66,
"records": [
{
"word_bit_width": 8,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -17162,7 +16903,7 @@
]
},
{
- "phv_number": 68,
+ "phv_number": 67,
"records": [
{
"word_bit_width": 8,
@@ -17172,37 +16913,37 @@
"pov_headers": [
{
"bit_index": 0,
- "position_offset": 81,
+ "position_offset": 80,
"header_name": "packet_in_hdr",
"hidden": false
},
{
"bit_index": 1,
- "position_offset": 82,
+ "position_offset": 81,
"header_name": "packet_out_hdr",
"hidden": false
},
{
"bit_index": 2,
- "position_offset": 83,
+ "position_offset": 82,
"header_name": "ethernet",
"hidden": false
},
{
"bit_index": 3,
- "position_offset": 84,
+ "position_offset": 83,
"header_name": "ipv4",
"hidden": false
},
{
"bit_index": 4,
- "position_offset": 85,
+ "position_offset": 84,
"header_name": "tcp",
"hidden": false
},
{
"bit_index": 5,
- "position_offset": 86,
+ "position_offset": 85,
"header_name": "udp",
"hidden": false
}
@@ -17217,11 +16958,11 @@
]
},
{
- "phv_number": 69,
+ "phv_number": 68,
"records": [
{
"word_bit_width": 8,
- "position_offset": 52,
+ "position_offset": 51,
"phv_lsb": 5,
"is_pov": false,
"field_msb": 2,
@@ -17238,7 +16979,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 33,
+ "position_offset": 32,
"phv_lsb": 15,
"is_pov": false,
"field_msb": 0,
@@ -17279,7 +17020,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 34,
+ "position_offset": 33,
"phv_lsb": 7,
"is_pov": false,
"field_msb": 8,
@@ -17296,7 +17037,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 41,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 8,
@@ -17313,7 +17054,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 14,
+ "position_offset": 13,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17330,7 +17071,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 23,
+ "position_offset": 22,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -17342,7 +17083,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 71,
+ "position_offset": 70,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -17376,7 +17117,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 21,
+ "position_offset": 20,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17393,7 +17134,7 @@
"records": [
{
"word_bit_width": 16,
- "position_offset": 62,
+ "position_offset": 61,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -17410,7 +17151,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 50,
+ "position_offset": 49,
"phv_lsb": 24,
"is_pov": false,
"field_msb": 7,
@@ -17434,7 +17175,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 45,
+ "position_offset": 44,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 12,
@@ -17446,7 +17187,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 55,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -17463,24 +17204,7 @@
"records": [
{
"word_bit_width": 32,
- "position_offset": 29,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 258,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 43,
"phv_lsb": 28,
"is_pov": false,
"field_msb": 3,
@@ -17492,7 +17216,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 49,
+ "position_offset": 48,
"phv_lsb": 25,
"is_pov": false,
"field_msb": 2,
@@ -17504,567 +17228,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 13,
- "phv_lsb": 22,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 24,
- "is_compiler_generated": false,
- "field_name": "tcp_ecn",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 38,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 5,
- "phv_msb": 21,
- "is_compiler_generated": false,
- "field_name": "tcp_ctrl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 47,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_window",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 259,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 2,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_checksum",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_urgentPtr",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 288,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 66,
- "phv_lsb": 4,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_version",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 41,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 3,
- "is_compiler_generated": false,
- "field_name": "ipv4_ihl",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 289,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 8
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 290,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 39,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "tcp_srcPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 8,
- "position_offset": 18,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 320,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 4,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_diffserv",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 321,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 8,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_totalLen",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 50,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "ipv4_identification",
- "field_width": 2,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 322,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 36,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_dstPort",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 16,
- "position_offset": 69,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 323,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 324,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 77,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- }
- ],
- "egress": [
- {
- "phv_number": 80,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 13,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 0,
- "phv_msb": 0,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_for_tm_copy_to_cpu",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 81,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 7,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 2,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_cos",
- "field_width": 1,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 82,
- "records": [
- {
- "word_bit_width": 8,
- "position_offset": 0,
- "phv_lsb": 0,
- "is_pov": true,
- "pov_headers": [
- {
- "bit_index": 0,
- "position_offset": 76,
- "header_name": "packet_in_hdr",
- "hidden": false
- },
- {
- "bit_index": 1,
- "position_offset": 77,
- "header_name": "packet_out_hdr",
- "hidden": false
- },
- {
- "bit_index": 2,
- "position_offset": 78,
- "header_name": "ethernet",
- "hidden": false
- },
- {
- "bit_index": 3,
- "position_offset": 79,
- "header_name": "ipv4",
- "hidden": false
- },
- {
- "bit_index": 4,
- "position_offset": 80,
- "header_name": "tcp",
- "hidden": false
- },
- {
- "bit_index": 5,
- "position_offset": 81,
- "header_name": "udp",
- "hidden": false
- }
- ],
- "field_msb": 7,
- "phv_msb": 7,
- "is_compiler_generated": false,
- "field_name": "POV",
- "field_width": 0,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 144,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 9,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "ig_intr_md_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 145,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 33,
- "phv_lsb": 7,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "packet_in_hdr_ingress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 146,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 64,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 8,
- "phv_msb": 8,
- "is_compiler_generated": false,
- "field_name": "eg_intr_md_egress_port",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 260,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 50,
- "phv_lsb": 24,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_ttl",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 21,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 7,
- "phv_msb": 23,
- "is_compiler_generated": false,
- "field_name": "ipv4_protocol",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 11,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "ipv4_hdrChecksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 261,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 15,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_srcAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 262,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 53,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ipv4_dstAddr",
- "field_width": 4,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 263,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 28,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_ackNo",
- "field_width": 4,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 19,
- "phv_lsb": 16,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "udp_length_",
- "field_width": 2,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 62,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 15,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "udp_checksum",
- "field_width": 2,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 264,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 41,
- "phv_lsb": 28,
- "is_pov": false,
- "field_msb": 3,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "tcp_dataOffset",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 61,
- "phv_lsb": 25,
- "is_pov": false,
- "field_msb": 2,
- "phv_msb": 27,
- "is_compiler_generated": false,
- "field_name": "tcp_res",
- "field_width": 1,
- "field_lsb": 0
- },
- {
- "word_bit_width": 32,
- "position_offset": 14,
+ "position_offset": 12,
"phv_lsb": 22,
"is_pov": false,
"field_msb": 2,
@@ -18088,7 +17252,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 44,
+ "position_offset": 46,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18101,7 +17265,7 @@
]
},
{
- "phv_number": 265,
+ "phv_number": 258,
"records": [
{
"word_bit_width": 32,
@@ -18117,7 +17281,7 @@
},
{
"word_bit_width": 32,
- "position_offset": 48,
+ "position_offset": 52,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18130,45 +17294,11 @@
]
},
{
- "phv_number": 266,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 22,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 39,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_dstAddr",
- "field_width": 6,
- "field_lsb": 8
- }
- ]
- },
- {
- "phv_number": 267,
- "records": [
- {
- "word_bit_width": 32,
- "position_offset": 66,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 31,
- "is_compiler_generated": false,
- "field_name": "ethernet_srcAddr",
- "field_width": 6,
- "field_lsb": 0
- }
- ]
- },
- {
- "phv_number": 292,
+ "phv_number": 288,
"records": [
{
"word_bit_width": 8,
- "position_offset": 32,
+ "position_offset": 65,
"phv_lsb": 4,
"is_pov": false,
"field_msb": 3,
@@ -18193,7 +17323,601 @@
]
},
{
- "phv_number": 293,
+ "phv_number": 289,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 8
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 290,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 38,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_srcPort",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 17,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 291,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 292,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 35,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dstPort",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 320,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 4,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_diffserv",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 321,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 63,
+ "phv_lsb": 8,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_totalLen",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 49,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_identification",
+ "field_width": 2,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 322,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 68,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 323,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 76,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 324,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 16
+ }
+ ]
+ },
+ {
+ "phv_number": 325,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 28,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ }
+ ],
+ "egress": [
+ {
+ "phv_number": 80,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 7,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 2,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_cos",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 81,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 0,
+ "phv_lsb": 0,
+ "is_pov": true,
+ "pov_headers": [
+ {
+ "bit_index": 0,
+ "position_offset": 73,
+ "header_name": "packet_in_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 1,
+ "position_offset": 74,
+ "header_name": "packet_out_hdr",
+ "hidden": false
+ },
+ {
+ "bit_index": 2,
+ "position_offset": 75,
+ "header_name": "ethernet",
+ "hidden": false
+ },
+ {
+ "bit_index": 3,
+ "position_offset": 76,
+ "header_name": "ipv4",
+ "hidden": false
+ },
+ {
+ "bit_index": 4,
+ "position_offset": 77,
+ "header_name": "tcp",
+ "hidden": false
+ },
+ {
+ "bit_index": 5,
+ "position_offset": 78,
+ "header_name": "udp",
+ "hidden": false
+ }
+ ],
+ "field_msb": 7,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "POV",
+ "field_width": 0,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 144,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 61,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 8,
+ "is_compiler_generated": false,
+ "field_name": "eg_intr_md_egress_port",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 264,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 47,
+ "phv_lsb": 24,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ttl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 18,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 7,
+ "phv_msb": 23,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_protocol",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 9,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_hdrChecksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 265,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 12,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_srcAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 266,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 50,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_dstAddr",
+ "field_width": 4,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 267,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 25,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ackNo",
+ "field_width": 4,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 16,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "udp_length_",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 59,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "udp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 268,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 38,
+ "phv_lsb": 28,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_dataOffset",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 58,
+ "phv_lsb": 25,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 27,
+ "is_compiler_generated": false,
+ "field_name": "tcp_res",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 11,
+ "phv_lsb": 22,
+ "is_pov": false,
+ "field_msb": 2,
+ "phv_msb": 24,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ecn",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 34,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 5,
+ "phv_msb": 21,
+ "is_compiler_generated": false,
+ "field_name": "tcp_ctrl",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 41,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_window",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 269,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 2,
+ "phv_lsb": 16,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "tcp_checksum",
+ "field_width": 2,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 32,
+ "position_offset": 45,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 15,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_urgentPtr",
+ "field_width": 2,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 270,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 19,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 39,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_dstAddr",
+ "field_width": 6,
+ "field_lsb": 8
+ }
+ ]
+ },
+ {
+ "phv_number": 271,
+ "records": [
+ {
+ "word_bit_width": 32,
+ "position_offset": 63,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 31,
+ "is_compiler_generated": false,
+ "field_name": "ethernet_srcAddr",
+ "field_width": 6,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 296,
+ "records": [
+ {
+ "word_bit_width": 8,
+ "position_offset": 29,
+ "phv_lsb": 4,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 7,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_version",
+ "field_width": 1,
+ "field_lsb": 0
+ },
+ {
+ "word_bit_width": 8,
+ "position_offset": 37,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 3,
+ "phv_msb": 3,
+ "is_compiler_generated": false,
+ "field_name": "ipv4_ihl",
+ "field_width": 1,
+ "field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 297,
"records": [
{
"word_bit_width": 8,
@@ -18210,11 +17934,11 @@
]
},
{
- "phv_number": 294,
+ "phv_number": 298,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18226,7 +17950,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18239,11 +17963,11 @@
]
},
{
- "phv_number": 295,
+ "phv_number": 299,
"records": [
{
"word_bit_width": 8,
- "position_offset": 38,
+ "position_offset": 35,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -18255,7 +17979,7 @@
},
{
"word_bit_width": 8,
- "position_offset": 59,
+ "position_offset": 56,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 7,
@@ -18268,11 +17992,11 @@
]
},
{
- "phv_number": 296,
+ "phv_number": 300,
"records": [
{
"word_bit_width": 8,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -18285,11 +18009,11 @@
]
},
{
- "phv_number": 297,
+ "phv_number": 301,
"records": [
{
"word_bit_width": 8,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 39,
@@ -18302,11 +18026,11 @@
]
},
{
- "phv_number": 326,
+ "phv_number": 332,
"records": [
{
"word_bit_width": 16,
- "position_offset": 57,
+ "position_offset": 54,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18319,11 +18043,11 @@
]
},
{
- "phv_number": 327,
+ "phv_number": 333,
"records": [
{
"word_bit_width": 16,
- "position_offset": 46,
+ "position_offset": 43,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18336,7 +18060,7 @@
]
},
{
- "phv_number": 328,
+ "phv_number": 334,
"records": [
{
"word_bit_width": 16,
@@ -18365,11 +18089,11 @@
]
},
{
- "phv_number": 329,
+ "phv_number": 335,
"records": [
{
"word_bit_width": 16,
- "position_offset": 35,
+ "position_offset": 32,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18378,10 +18102,27 @@
"field_name": "tcp_dstPort",
"field_width": 2,
"field_lsb": 0
+ }
+ ]
+ },
+ {
+ "phv_number": 336,
+ "records": [
+ {
+ "word_bit_width": 16,
+ "position_offset": 69,
+ "phv_lsb": 0,
+ "is_pov": false,
+ "field_msb": 31,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "tcp_seqNo",
+ "field_width": 4,
+ "field_lsb": 16
},
{
"word_bit_width": 16,
- "position_offset": 51,
+ "position_offset": 48,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18394,28 +18135,11 @@
]
},
{
- "phv_number": 330,
+ "phv_number": 337,
"records": [
{
"word_bit_width": 16,
- "position_offset": 72,
- "phv_lsb": 0,
- "is_pov": false,
- "field_msb": 31,
- "phv_msb": 15,
- "is_compiler_generated": false,
- "field_name": "tcp_seqNo",
- "field_width": 4,
- "field_lsb": 16
- }
- ]
- },
- {
- "phv_number": 331,
- "records": [
- {
- "word_bit_width": 16,
- "position_offset": 72,
+ "position_offset": 69,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18428,11 +18152,11 @@
]
},
{
- "phv_number": 332,
+ "phv_number": 338,
"records": [
{
"word_bit_width": 16,
- "position_offset": 22,
+ "position_offset": 19,
"phv_lsb": 8,
"is_pov": false,
"field_msb": 7,
@@ -18444,7 +18168,7 @@
},
{
"word_bit_width": 16,
- "position_offset": 66,
+ "position_offset": 63,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 47,
@@ -18457,11 +18181,11 @@
]
},
{
- "phv_number": 333,
+ "phv_number": 339,
"records": [
{
"word_bit_width": 16,
- "position_offset": 42,
+ "position_offset": 39,
"phv_lsb": 0,
"is_pov": false,
"field_msb": 15,
@@ -18474,7 +18198,7 @@
]
},
{
- "phv_number": 334,
+ "phv_number": 340,
"records": [
{
"word_bit_width": 16,
@@ -18487,6 +18211,18 @@
"field_name": "packet_out_hdr_egress_port",
"field_width": 2,
"field_lsb": 0
+ },
+ {
+ "word_bit_width": 16,
+ "position_offset": 30,
+ "phv_lsb": 7,
+ "is_pov": false,
+ "field_msb": 8,
+ "phv_msb": 15,
+ "is_compiler_generated": false,
+ "field_name": "packet_in_hdr_ingress_port",
+ "field_width": 2,
+ "field_lsb": 0
}
]
}
@@ -18529,7 +18265,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "action_data",
"size": 0
}
@@ -18593,12 +18329,12 @@
"match_attributes": {
"stage_tables": [
{
- "default_next_table": 49,
+ "default_next_table": 33,
"action_format": [
{
"vliw_instruction_full": 64,
"next_table": 0,
- "next_table_full": 49,
+ "next_table_full": 33,
"action_handle": 536870914,
"action_name": "count_ingress",
"table_name": "egress_port_count_table",
@@ -18619,7 +18355,7 @@
1
],
"logical_table_id": 0,
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "match_with_no_key",
"size": 1
}
@@ -18666,7 +18402,7 @@
}
],
"logical_table_id": 1,
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "action_data",
"size": 0
}
@@ -18756,7 +18492,7 @@
0
],
"logical_table_id": 1,
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "match_with_no_key",
"size": 1
}
@@ -18773,7 +18509,7 @@
{
"direction": "ingress",
"handle": 33554435,
- "name": "ingress_pkt__action__",
+ "name": "process_packet_out_table__action__",
"table_type": "action",
"stage_tables": [
{
@@ -18802,137 +18538,6 @@
"number_memory_units_per_table_word": 1
}
],
- "logical_table_id": 0,
- "stage_number": 0,
- "stage_table_type": "action_data",
- "size": 0
- }
- ],
- "actions": [
- {
- "p4_parameters": [],
- "handle": 536870919,
- "name": "_packet_out",
- "indirect_resources": [],
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "allowed_as_default_action": true,
- "override_stat_addr_pfe": false,
- "override_stateful_addr_pfe": false,
- "override_meter_full_addr": 0,
- "override_stat_addr": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "override_meter_addr": false
- }
- ],
- "how_referenced": "direct",
- "size": 1024
- },
- {
- "direction": "ingress",
- "handle": 16777219,
- "name": "ingress_pkt",
- "is_resource_controllable": true,
- "table_type": "match",
- "ap_bind_indirect_res_to_match": [],
- "statistics_table_refs": [],
- "actions": [
- {
- "p4_parameters": [],
- "handle": 536870919,
- "name": "_packet_out",
- "indirect_resources": [],
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "allowed_as_default_action": true,
- "override_stat_addr_pfe": false,
- "override_stateful_addr_pfe": false,
- "override_meter_full_addr": 0,
- "override_stat_addr": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "override_meter_addr": false
- }
- ],
- "meter_table_refs": [],
- "default_action_handle": 536870919,
- "uses_range": false,
- "match_attributes": {
- "stage_tables": [
- {
- "default_next_table": 16,
- "action_format": [
- {
- "vliw_instruction_full": 65,
- "next_table": 0,
- "next_table_full": 16,
- "action_handle": 536870919,
- "action_name": "_packet_out",
- "table_name": "_condition_1",
- "immediate_fields": [],
- "vliw_instruction": 1
- }
- ],
- "memory_resource_allocation": null,
- "pack_format": [
- {
- "memory_word_width": 0,
- "entries_per_table_word": 1,
- "table_word_width": 0,
- "number_memory_units_per_table_word": 0
- }
- ],
- "result_physical_buses": [
- 1
- ],
- "logical_table_id": 0,
- "stage_number": 0,
- "stage_table_type": "match_with_no_key",
- "size": 1
- }
- ],
- "match_type": "match_with_no_key"
- },
- "stateful_table_refs": [],
- "default_next_table_mask": 0,
- "selection_table_refs": [],
- "action_data_table_refs": [],
- "match_key_fields": [],
- "size": 1024
- },
- {
- "direction": "egress",
- "handle": 33554436,
- "name": "egress_pkt__action__",
- "table_type": "action",
- "stage_tables": [
- {
- "memory_resource_allocation": null,
- "pack_format": [
- {
- "entries_per_table_word": 1,
- "action_handle": 536870922,
- "memory_word_width": 128,
- "table_word_width": 128,
- "entries": [
- {
- "entry_number": 0,
- "fields": [
- {
- "start_bit": 0,
- "field_width": 0,
- "lsb_mem_word_idx": 1,
- "source": "zero",
- "lsb_mem_word_offset": 0,
- "field_name": "--padding--"
- }
- ]
- }
- ],
- "number_memory_units_per_table_word": 1
- }
- ],
"logical_table_id": 1,
"stage_number": 0,
"stage_table_type": "action_data",
@@ -18942,8 +18547,8 @@
"actions": [
{
"p4_parameters": [],
- "handle": 536870922,
- "name": "add_packet_in_hdr",
+ "handle": 536870919,
+ "name": "_process_packet_out",
"indirect_resources": [],
"override_stat_full_addr": 0,
"override_meter_addr_pfe": false,
@@ -18961,9 +18566,9 @@
"size": 1024
},
{
- "direction": "egress",
- "handle": 16777220,
- "name": "egress_pkt",
+ "direction": "ingress",
+ "handle": 16777219,
+ "name": "process_packet_out_table",
"is_resource_controllable": true,
"table_type": "match",
"ap_bind_indirect_res_to_match": [],
@@ -18971,8 +18576,8 @@
"actions": [
{
"p4_parameters": [],
- "handle": 536870922,
- "name": "add_packet_in_hdr",
+ "handle": 536870919,
+ "name": "_process_packet_out",
"indirect_resources": [],
"override_stat_full_addr": 0,
"override_meter_addr_pfe": false,
@@ -18987,22 +18592,22 @@
}
],
"meter_table_refs": [],
- "default_action_handle": 536870922,
+ "default_action_handle": 536870919,
"uses_range": false,
"match_attributes": {
"stage_tables": [
{
- "default_next_table": 255,
+ "default_next_table": 32,
"action_format": [
{
- "vliw_instruction_full": 65,
+ "vliw_instruction_full": 69,
"next_table": 0,
- "next_table_full": 255,
- "action_handle": 536870922,
- "action_name": "add_packet_in_hdr",
- "table_name": "--END_OF_PIPELINE--",
+ "next_table_full": 32,
+ "action_handle": 536870919,
+ "action_name": "_process_packet_out",
+ "table_name": "_condition_2",
"immediate_fields": [],
- "vliw_instruction": 1
+ "vliw_instruction": 0
}
],
"memory_resource_allocation": null,
@@ -19015,7 +18620,7 @@
}
],
"result_physical_buses": [
- 0
+ 1
],
"logical_table_id": 1,
"stage_number": 0,
@@ -19034,7 +18639,7 @@
},
{
"direction": "ingress",
- "handle": 33554437,
+ "handle": 33554436,
"name": "table0__action__",
"table_type": "action",
"stage_tables": [
@@ -19056,7 +18661,7 @@
"pack_format": [
{
"entries_per_table_word": 8,
- "action_handle": 536870924,
+ "action_handle": 536870921,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -19233,7 +18838,7 @@
},
{
"entries_per_table_word": 8,
- "action_handle": 536870927,
+ "action_handle": 536870924,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -19346,7 +18951,7 @@
},
{
"entries_per_table_word": 8,
- "action_handle": 536870929,
+ "action_handle": 536870928,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -19355,11 +18960,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 112,
+ "lsb_mem_word_offset": 121,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 192,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 112,
+ "field_name": "--constant-0--"
}
]
},
@@ -19368,11 +18989,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 96,
+ "lsb_mem_word_offset": 105,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 192,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 96,
+ "field_name": "--constant-0--"
}
]
},
@@ -19381,11 +19018,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 80,
+ "lsb_mem_word_offset": 89,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 192,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 80,
+ "field_name": "--constant-0--"
}
]
},
@@ -19394,11 +19047,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 64,
+ "lsb_mem_word_offset": 73,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 192,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 64,
+ "field_name": "--constant-0--"
}
]
},
@@ -19407,11 +19076,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 48,
+ "lsb_mem_word_offset": 57,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 192,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 48,
+ "field_name": "--constant-0--"
}
]
},
@@ -19420,11 +19105,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 32,
+ "lsb_mem_word_offset": 41,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 192,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 32,
+ "field_name": "--constant-0--"
}
]
},
@@ -19433,11 +19134,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 16,
+ "lsb_mem_word_offset": 25,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 192,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 16,
+ "field_name": "--constant-0--"
}
]
},
@@ -19446,11 +19163,27 @@
"fields": [
{
"start_bit": 0,
- "field_width": 16,
+ "field_width": 7,
"lsb_mem_word_idx": 0,
"source": "zero",
- "lsb_mem_word_offset": 0,
+ "lsb_mem_word_offset": 9,
"field_name": "--padding--"
+ },
+ {
+ "start_bit": 0,
+ "immediate_name": "--constant-0--",
+ "field_width": 9,
+ "lsb_mem_word_idx": 0,
+ "const_tuples": [
+ {
+ "dest_start": 0,
+ "value": 192,
+ "dest_width": 9
+ }
+ ],
+ "source": "constant",
+ "lsb_mem_word_offset": 0,
+ "field_name": "--constant-0--"
}
]
}
@@ -19459,7 +19192,7 @@
},
{
"entries_per_table_word": 8,
- "action_handle": 536870931,
+ "action_handle": 536870930,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -19572,7 +19305,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "action_data",
"size": 8192
}
@@ -19587,7 +19320,7 @@
"bit_width": 9
}
],
- "handle": 536870924,
+ "handle": 536870921,
"name": "set_egress_port",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19611,7 +19344,7 @@
}
],
"disallowed_as_default_action_reason": "USES_HASH_DIST",
- "handle": 536870927,
+ "handle": 536870924,
"name": "ecmp_group",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19627,7 +19360,7 @@
},
{
"p4_parameters": [],
- "handle": 536870929,
+ "handle": 536870928,
"name": "send_to_cpu",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19643,7 +19376,7 @@
},
{
"p4_parameters": [],
- "handle": 536870931,
+ "handle": 536870930,
"name": "_drop",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19663,7 +19396,7 @@
},
{
"direction": "ingress",
- "handle": 16777221,
+ "handle": 16777220,
"name": "table0",
"is_resource_controllable": true,
"table_type": "match",
@@ -19685,7 +19418,7 @@
"bit_width": 9
}
],
- "handle": 536870924,
+ "handle": 536870921,
"name": "set_egress_port",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19709,7 +19442,7 @@
}
],
"disallowed_as_default_action_reason": "USES_HASH_DIST",
- "handle": 536870927,
+ "handle": 536870924,
"name": "ecmp_group",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19725,7 +19458,7 @@
},
{
"p4_parameters": [],
- "handle": 536870929,
+ "handle": 536870928,
"name": "send_to_cpu",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19741,7 +19474,7 @@
},
{
"p4_parameters": [],
- "handle": 536870931,
+ "handle": 536870930,
"name": "_drop",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -19761,7 +19494,7 @@
"match_attributes": {
"stage_tables": [
{
- "default_next_table": 48,
+ "default_next_table": 32,
"memory_resource_allocation": {
"memory_units_and_vpns": [
{
@@ -20018,7 +19751,7 @@
"two_way_notification": true,
"disable_notification": false,
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "idletime",
"size": 2048
},
@@ -20027,8 +19760,8 @@
{
"vliw_instruction_full": 65,
"next_table": 0,
- "next_table_full": 48,
- "action_handle": 536870924,
+ "next_table_full": 32,
+ "action_handle": 536870921,
"action_name": "set_egress_port",
"table_name": "_condition_2",
"immediate_fields": [],
@@ -20037,8 +19770,8 @@
{
"vliw_instruction_full": 66,
"next_table": 1,
- "next_table_full": 32,
- "action_handle": 536870927,
+ "next_table_full": 16,
+ "action_handle": 536870924,
"action_name": "ecmp_group",
"table_name": "ecmp_group_table",
"immediate_fields": [],
@@ -20047,8 +19780,8 @@
{
"vliw_instruction_full": 67,
"next_table": 0,
- "next_table_full": 48,
- "action_handle": 536870929,
+ "next_table_full": 32,
+ "action_handle": 536870928,
"action_name": "send_to_cpu",
"table_name": "_condition_2",
"immediate_fields": [],
@@ -20057,8 +19790,8 @@
{
"vliw_instruction_full": 68,
"next_table": 0,
- "next_table_full": 48,
- "action_handle": 536870931,
+ "next_table_full": 32,
+ "action_handle": 536870930,
"action_name": "_drop",
"table_name": "_condition_2",
"immediate_fields": [],
@@ -20650,7 +20383,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_indirection",
"size": 16384
},
@@ -20658,7 +20391,7 @@
0
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_match",
"size": 512
}
@@ -20671,7 +20404,7 @@
"action_data_table_refs": [
{
"how_referenced": "direct",
- "handle": 33554437,
+ "handle": 33554436,
"name": "table0__action__"
}
],
@@ -20713,7 +20446,7 @@
},
{
"direction": "ingress",
- "handle": 33554438,
+ "handle": 33554437,
"name": "ecmp_group_table__action__",
"table_type": "action",
"stage_tables": [
@@ -20722,7 +20455,7 @@
"pack_format": [
{
"entries_per_table_word": 1,
- "action_handle": 536870933,
+ "action_handle": 536870932,
"memory_word_width": 128,
"table_word_width": 128,
"entries": [
@@ -20744,7 +20477,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "action_data",
"size": 0
}
@@ -20759,7 +20492,7 @@
"bit_width": 9
}
],
- "handle": 536870933,
+ "handle": 536870932,
"name": "set_egress_port",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -20779,7 +20512,7 @@
},
{
"direction": "ingress",
- "handle": 16777222,
+ "handle": 16777221,
"name": "ecmp_group_table",
"is_resource_controllable": true,
"table_type": "match",
@@ -20801,7 +20534,7 @@
"bit_width": 9
}
],
- "handle": 536870933,
+ "handle": 536870932,
"name": "set_egress_port",
"indirect_resources": [],
"override_stat_full_addr": 0,
@@ -20821,13 +20554,13 @@
"match_attributes": {
"stage_tables": [
{
- "default_next_table": 48,
+ "default_next_table": 32,
"action_format": [
{
"vliw_instruction_full": 65,
"next_table": 0,
- "next_table_full": 48,
- "action_handle": 536870933,
+ "next_table_full": 32,
+ "action_handle": 536870932,
"action_name": "set_egress_port",
"table_name": "_condition_2",
"immediate_fields": [
@@ -23251,7 +22984,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_way",
"size": 1024
},
@@ -23337,7 +23070,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_way",
"size": 1024
},
@@ -23423,7 +23156,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_way",
"size": 1024
}
@@ -23432,7 +23165,7 @@
14
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_match",
"size": 3072
}
@@ -23496,7 +23229,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "statistics",
"size": 4096
}
@@ -23505,7 +23238,7 @@
"packet_counter_resolution": 32,
"pfe_bit_position": 19,
"how_referenced": "indirect",
- "size": 254
+ "size": 510
},
{
"direction": "ingress",
@@ -23539,7 +23272,7 @@
}
],
"logical_table_id": 1,
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "statistics",
"size": 4096
}
@@ -23548,7 +23281,7 @@
"packet_counter_resolution": 32,
"pfe_bit_position": 19,
"how_referenced": "indirect",
- "size": 254
+ "size": 510
},
{
"direction": "ingress",
@@ -23582,7 +23315,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "statistics",
"size": 4096
}
@@ -23625,7 +23358,7 @@
}
],
"logical_table_id": 0,
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "statistics",
"size": 4096
}
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/mau.context.json b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/mau.context.json
index 8f0d809..33c3d94 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/mau.context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/mau.context.json
@@ -1,7 +1,7 @@
{
"ProgramInfo": {
"ProgramName": "ecmp",
- "BuildDate": "Thu Sep 7 14:49:59 2017",
+ "BuildDate": "Fri Sep 8 08:26:24 2017",
"CompilerVersion": "5.1.0"
},
"HashJsonNode": {
@@ -9,7 +9,7 @@
"ProxyTables": {},
"AllTables": {
"ecmp_group_table": {
- "2": [
+ "1": [
{
"0": [
{
@@ -1938,7 +1938,7 @@
]
}
],
- "Handle": 16777222
+ "Handle": 16777221
}
},
"HashFieldCount": 1
@@ -1947,7 +1947,7 @@
"ExmEntryFormat": {
"AllExmTables": [
{
- "ExmTableHandle": 16777222,
+ "ExmTableHandle": 16777221,
"ExmTableName": "ecmp_group_table",
"ExmTableFormat": [
{
@@ -2260,7 +2260,7 @@
"OVERRIDE_STAT_ADDR_PFE": false,
"IMMEDIATE": {
"instr": 0,
- "next_tbl_full": 48,
+ "next_tbl_full": 32,
"action_name": "set_egress_port",
"table_name": "_condition_2",
"next_tbl": 0,
@@ -2281,7 +2281,7 @@
"OVERRIDE_METER_FULL_ADDR": 0,
"ImmediateCount": 1,
"OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870933,
+ "ACTION_HDL": 536870932,
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR": false,
"NEXTTBL": 0,
@@ -2289,12 +2289,12 @@
}
],
"ExmMatchWayCount": 3,
- "Stage": 2
+ "Stage": 1
}
]
}
],
- "TotalExmTables": 6
+ "TotalExmTables": 5
},
"Phase0EntryFormat": {
"Phase0Action": [],
@@ -2309,7 +2309,7 @@
"SPECFORMAT": []
},
{
- "TableHandle": 16777221,
+ "TableHandle": 16777220,
"SPECFORMAT": [
{
"MATCHTYPE": "ternary",
@@ -2338,7 +2338,7 @@
]
},
{
- "TableHandle": 16777222,
+ "TableHandle": 16777221,
"SPECFORMAT": [
{
"MATCHTYPE": "exact",
@@ -2355,10 +2355,6 @@
]
},
{
- "TableHandle": 16777220,
- "SPECFORMAT": []
- },
- {
"TableHandle": 16777219,
"SPECFORMAT": []
},
@@ -2372,7 +2368,7 @@
"AllTindTables": [
{
"TindTableName": "table0",
- "TindTableHandle": 16777221,
+ "TindTableHandle": 16777220,
"TindTableFormat": [
{
"TindMatchEntryFormat": [
@@ -3254,34 +3250,14 @@
"table_name": "_condition_2",
"action_name": "send_to_cpu",
"next_tbl": 0,
- "next_tbl_full": 48,
+ "next_tbl_full": 32,
"instr": 11
},
"OVERRIDE_STATEFUL_ADDR_PFE": false,
"OVERRIDE_METER_FULL_ADDR": 0,
"ImmediateCount": 0,
"OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870929,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR": false,
- "OVERRIDE_STATEFUL_ADDR": false
- },
- {
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "IMMEDIATE": {
- "table_name": "_condition_2",
- "action_name": "_drop",
- "next_tbl": 0,
- "next_tbl_full": 48,
- "instr": 12
- },
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "ImmediateCount": 0,
- "OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870931,
+ "ACTION_HDL": 536870928,
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR": false,
"OVERRIDE_STATEFUL_ADDR": false
@@ -3294,14 +3270,34 @@
"table_name": "_condition_2",
"action_name": "set_egress_port",
"next_tbl": 0,
- "next_tbl_full": 48,
+ "next_tbl_full": 32,
"instr": 9
},
"OVERRIDE_STATEFUL_ADDR_PFE": false,
"OVERRIDE_METER_FULL_ADDR": 0,
"ImmediateCount": 0,
"OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870924,
+ "ACTION_HDL": 536870921,
+ "OVERRIDE_STATEFUL_FULL_ADDR": 0,
+ "OVERRIDE_METER_ADDR": false,
+ "OVERRIDE_STATEFUL_ADDR": false
+ },
+ {
+ "OVERRIDE_STAT_FULL_ADDR": 0,
+ "OVERRIDE_METER_ADDR_PFE": false,
+ "OVERRIDE_STAT_ADDR_PFE": false,
+ "IMMEDIATE": {
+ "table_name": "_condition_2",
+ "action_name": "_drop",
+ "next_tbl": 0,
+ "next_tbl_full": 32,
+ "instr": 12
+ },
+ "OVERRIDE_STATEFUL_ADDR_PFE": false,
+ "OVERRIDE_METER_FULL_ADDR": 0,
+ "ImmediateCount": 0,
+ "OVERRIDE_STAT_ADDR": false,
+ "ACTION_HDL": 536870930,
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR": false,
"OVERRIDE_STATEFUL_ADDR": false
@@ -3314,20 +3310,20 @@
"table_name": "ecmp_group_table",
"action_name": "ecmp_group",
"next_tbl": 1,
- "next_tbl_full": 32,
+ "next_tbl_full": 16,
"instr": 10
},
"OVERRIDE_STATEFUL_ADDR_PFE": false,
"OVERRIDE_METER_FULL_ADDR": 0,
"ImmediateCount": 0,
"OVERRIDE_STAT_ADDR": false,
- "ACTION_HDL": 536870927,
+ "ACTION_HDL": 536870924,
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR": false,
"OVERRIDE_STATEFUL_ADDR": false
}
],
- "Stage": 1
+ "Stage": 0
}
]
}
@@ -3346,16 +3342,11 @@
},
{
"ActionHandle": 536870919,
- "action_function": "_packet_out",
+ "action_function": "_process_packet_out",
"ACTIONSPECFORMAT": []
},
{
- "ActionHandle": 536870922,
- "action_function": "add_packet_in_hdr",
- "ACTIONSPECFORMAT": []
- },
- {
- "ActionHandle": 536870924,
+ "ActionHandle": 536870921,
"action_function": "set_egress_port",
"ACTIONSPECFORMAT": [
{
@@ -3366,7 +3357,7 @@
]
},
{
- "ActionHandle": 536870927,
+ "ActionHandle": 536870924,
"action_function": "ecmp_group",
"ACTIONSPECFORMAT": [
{
@@ -3377,17 +3368,17 @@
]
},
{
- "ActionHandle": 536870929,
+ "ActionHandle": 536870928,
"action_function": "send_to_cpu",
"ACTIONSPECFORMAT": []
},
{
- "ActionHandle": 536870931,
+ "ActionHandle": 536870930,
"action_function": "_drop",
"ACTIONSPECFORMAT": []
},
{
- "ActionHandle": 536870933,
+ "ActionHandle": 536870932,
"action_function": "set_egress_port",
"ACTIONSPECFORMAT": [
{
@@ -3401,7 +3392,7 @@
"TernEntryFormat": {
"AllTernTables": [
{
- "TernTableHandle": 16777221,
+ "TernTableHandle": 16777220,
"TernTableName": "table0",
"TernTableFormat": [
{
@@ -3791,12 +3782,12 @@
}
],
"TernEntryFieldCount": 22,
- "Stage": 1
+ "Stage": 0
}
]
}
],
- "TotalTernTables": 6
+ "TotalTernTables": 5
},
"AdtEntryFormat": {
"AllActionDataTables": [
@@ -3831,7 +3822,7 @@
}
],
"ActFuncEntryCount": 1,
- "Stage": 3
+ "Stage": 2
}
]
}
@@ -3872,7 +3863,7 @@
}
],
"ActFuncEntryCount": 1,
- "Stage": 3
+ "Stage": 2
}
]
}
@@ -3887,7 +3878,7 @@
"ActFuncTotalEntries": 1,
"ActionDataTableFormat": [
{
- "ActFuncName": "_packet_out",
+ "ActFuncName": "_process_packet_out",
"ActFuncHandle": 536870919,
"ActFuncStageCount": 1,
"ActFuncFormat": [
@@ -3924,70 +3915,47 @@
"ActionDataTableHandle": 33554435
},
{
- "ActFuncTotalStageCount": 1,
- "ActFuncTotalEntries": 1,
- "ActionDataTableFormat": [
- {
- "ActFuncName": "add_packet_in_hdr",
- "ActFuncHandle": 536870922,
- "ActFuncStageCount": 1,
- "ActFuncFormat": [
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- "ActionDataTableHandle": 33554436
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- {
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"ActFuncTotalEntries": 32,
"ActionDataTableFormat": [
{
"ActFuncName": "send_to_cpu",
- "ActFuncHandle": 536870929,
+ "ActFuncHandle": 536870928,
"ActFuncStageCount": 1,
"ActFuncFormat": [
{
"ActFuncEntryFormat": [
{
"Entry": 0,
- "EntryFieldCount": 1,
- "EntryConstTupCount": 0,
+ "EntryFieldCount": 2,
+ "EntryConstTupCount": 1,
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+ "FIELDWIDTH": 7,
"SOURCENAME": "ZERO",
"SHIFT": 0,
"WORDINDEX": 0,
"MASKBITOFFSET": "NULL",
"SOURCEOFFSET": 0,
"FIELDNAME": "--padding--",
+ "FIELDOFFSET": 9,
+ "SOURCEWIDTH": 0
+ },
+ {
+ "FIELDWIDTH": 9,
+ "CONSTTUPLELIST": [
+ {
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+ "CONSTANT": 192,
+ "DSTWIDTH": 9
+ }
+ ],
+ "SOURCENAME": "CONSTANT",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--constant-0--",
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}
@@ -3995,17 +3963,35 @@
},
{
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"SOURCENAME": "ZERO",
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"SOURCEOFFSET": 0,
"FIELDNAME": "--padding--",
+ "FIELDOFFSET": 25,
+ "SOURCEWIDTH": 0
+ },
+ {
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+ "CONSTTUPLELIST": [
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+ "CONSTANT": 192,
+ "DSTWIDTH": 9
+ }
+ ],
+ "SOURCENAME": "CONSTANT",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--constant-0--",
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}
@@ -4013,17 +3999,35 @@
},
{
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"SOURCENAME": "ZERO",
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"FIELDNAME": "--padding--",
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+ "SOURCEWIDTH": 0
+ },
+ {
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+ "CONSTTUPLELIST": [
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+ "CONSTANT": 192,
+ "DSTWIDTH": 9
+ }
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+ "SOURCENAME": "CONSTANT",
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+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
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+ "FIELDNAME": "--constant-0--",
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}
@@ -4031,17 +4035,35 @@
},
{
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"SOURCENAME": "ZERO",
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"MASKBITOFFSET": "NULL",
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"FIELDNAME": "--padding--",
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+ "SOURCEWIDTH": 0
+ },
+ {
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+ "CONSTTUPLELIST": [
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+ "CONSTANT": 192,
+ "DSTWIDTH": 9
+ }
+ ],
+ "SOURCENAME": "CONSTANT",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--constant-0--",
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"SOURCEWIDTH": 0
}
@@ -4049,17 +4071,35 @@
},
{
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+ "EntryFieldCount": 2,
+ "EntryConstTupCount": 1,
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+ "FIELDWIDTH": 7,
"SOURCENAME": "ZERO",
"SHIFT": 0,
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"MASKBITOFFSET": "NULL",
"SOURCEOFFSET": 0,
"FIELDNAME": "--padding--",
+ "FIELDOFFSET": 73,
+ "SOURCEWIDTH": 0
+ },
+ {
+ "FIELDWIDTH": 9,
+ "CONSTTUPLELIST": [
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+ "CONSTANT": 192,
+ "DSTWIDTH": 9
+ }
+ ],
+ "SOURCENAME": "CONSTANT",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--constant-0--",
"FIELDOFFSET": 64,
"SOURCEWIDTH": 0
}
@@ -4067,17 +4107,35 @@
},
{
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+ "EntryFieldCount": 2,
+ "EntryConstTupCount": 1,
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+ "FIELDWIDTH": 7,
"SOURCENAME": "ZERO",
"SHIFT": 0,
"WORDINDEX": 0,
"MASKBITOFFSET": "NULL",
"SOURCEOFFSET": 0,
"FIELDNAME": "--padding--",
+ "FIELDOFFSET": 89,
+ "SOURCEWIDTH": 0
+ },
+ {
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+ "CONSTTUPLELIST": [
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+ "CONSTANT": 192,
+ "DSTWIDTH": 9
+ }
+ ],
+ "SOURCENAME": "CONSTANT",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--constant-0--",
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"SOURCEWIDTH": 0
}
@@ -4085,17 +4143,35 @@
},
{
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+ "EntryFieldCount": 2,
+ "EntryConstTupCount": 1,
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+ "FIELDWIDTH": 7,
"SOURCENAME": "ZERO",
"SHIFT": 0,
"WORDINDEX": 0,
"MASKBITOFFSET": "NULL",
"SOURCEOFFSET": 0,
"FIELDNAME": "--padding--",
+ "FIELDOFFSET": 105,
+ "SOURCEWIDTH": 0
+ },
+ {
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+ "CONSTTUPLELIST": [
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+ "CONSTANT": 192,
+ "DSTWIDTH": 9
+ }
+ ],
+ "SOURCENAME": "CONSTANT",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--constant-0--",
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"SOURCEWIDTH": 0
}
@@ -4103,17 +4179,35 @@
},
{
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- "EntryFieldCount": 1,
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+ "EntryFieldCount": 2,
+ "EntryConstTupCount": 1,
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+ "FIELDWIDTH": 7,
"SOURCENAME": "ZERO",
"SHIFT": 0,
"WORDINDEX": 0,
"MASKBITOFFSET": "NULL",
"SOURCEOFFSET": 0,
"FIELDNAME": "--padding--",
+ "FIELDOFFSET": 121,
+ "SOURCEWIDTH": 0
+ },
+ {
+ "FIELDWIDTH": 9,
+ "CONSTTUPLELIST": [
+ {
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+ "CONSTANT": 192,
+ "DSTWIDTH": 9
+ }
+ ],
+ "SOURCENAME": "CONSTANT",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--constant-0--",
"FIELDOFFSET": 112,
"SOURCEWIDTH": 0
}
@@ -4121,170 +4215,13 @@
}
],
"ActFuncEntryCount": 8,
- "Stage": 1
- }
- ]
- },
- {
- "ActFuncName": "_drop",
- "ActFuncHandle": 536870931,
- "ActFuncStageCount": 1,
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- "FIELDNAME": "--padding--",
- "FIELDOFFSET": 112,
- "SOURCEWIDTH": 0
- }
- ]
- }
- ],
- "ActFuncEntryCount": 8,
- "Stage": 1
+ "Stage": 0
}
]
},
{
"ActFuncName": "set_egress_port",
- "ActFuncHandle": 536870924,
+ "ActFuncHandle": 536870921,
"ActFuncStageCount": 1,
"ActFuncFormat": [
{
@@ -4523,13 +4460,170 @@
}
],
"ActFuncEntryCount": 8,
- "Stage": 1
+ "Stage": 0
+ }
+ ]
+ },
+ {
+ "ActFuncName": "_drop",
+ "ActFuncHandle": 536870930,
+ "ActFuncStageCount": 1,
+ "ActFuncFormat": [
+ {
+ "ActFuncEntryFormat": [
+ {
+ "Entry": 0,
+ "EntryFieldCount": 1,
+ "EntryConstTupCount": 0,
+ "EntryFormat": [
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+ "FIELDWIDTH": 16,
+ "SOURCENAME": "ZERO",
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+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--padding--",
+ "FIELDOFFSET": 0,
+ "SOURCEWIDTH": 0
+ }
+ ]
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+ "EntryFieldCount": 1,
+ "EntryConstTupCount": 0,
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+ "SOURCENAME": "ZERO",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
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+ "FIELDNAME": "--padding--",
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+ "SOURCEWIDTH": 0
+ }
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+ "SOURCENAME": "ZERO",
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+ "FIELDNAME": "--padding--",
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+ "SOURCEWIDTH": 0
+ }
+ ]
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+ {
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+ "EntryFieldCount": 1,
+ "EntryConstTupCount": 0,
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+ "FIELDWIDTH": 16,
+ "SOURCENAME": "ZERO",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--padding--",
+ "FIELDOFFSET": 48,
+ "SOURCEWIDTH": 0
+ }
+ ]
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+ {
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+ "EntryFieldCount": 1,
+ "EntryConstTupCount": 0,
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+ "FIELDWIDTH": 16,
+ "SOURCENAME": "ZERO",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--padding--",
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+ "SOURCEWIDTH": 0
+ }
+ ]
+ },
+ {
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+ "EntryFieldCount": 1,
+ "EntryConstTupCount": 0,
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+ "SOURCENAME": "ZERO",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--padding--",
+ "FIELDOFFSET": 80,
+ "SOURCEWIDTH": 0
+ }
+ ]
+ },
+ {
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+ "EntryFieldCount": 1,
+ "EntryConstTupCount": 0,
+ "EntryFormat": [
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+ "SOURCENAME": "ZERO",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--padding--",
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+ "SOURCEWIDTH": 0
+ }
+ ]
+ },
+ {
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+ "EntryFieldCount": 1,
+ "EntryConstTupCount": 0,
+ "EntryFormat": [
+ {
+ "FIELDWIDTH": 16,
+ "SOURCENAME": "ZERO",
+ "SHIFT": 0,
+ "WORDINDEX": 0,
+ "MASKBITOFFSET": "NULL",
+ "SOURCEOFFSET": 0,
+ "FIELDNAME": "--padding--",
+ "FIELDOFFSET": 112,
+ "SOURCEWIDTH": 0
+ }
+ ]
+ }
+ ],
+ "ActFuncEntryCount": 8,
+ "Stage": 0
}
]
},
{
"ActFuncName": "ecmp_group",
- "ActFuncHandle": 536870927,
+ "ActFuncHandle": 536870924,
"ActFuncStageCount": 1,
"ActFuncFormat": [
{
@@ -4680,15 +4774,15 @@
}
],
"ActFuncEntryCount": 8,
- "Stage": 1
+ "Stage": 0
}
]
}
],
"ActFuncHandleTotalCount": 4,
- "ActFuncTotalEntryFieldCount": 40,
- "ActFuncTotalConstTupleList": 0,
- "ActionDataTableHandle": 33554437
+ "ActFuncTotalEntryFieldCount": 48,
+ "ActFuncTotalConstTupleList": 8,
+ "ActionDataTableHandle": 33554436
},
{
"ActFuncTotalStageCount": 1,
@@ -4696,7 +4790,7 @@
"ActionDataTableFormat": [
{
"ActFuncName": "set_egress_port",
- "ActFuncHandle": 536870933,
+ "ActFuncHandle": 536870932,
"ActFuncStageCount": 1,
"ActFuncFormat": [
{
@@ -4721,7 +4815,7 @@
}
],
"ActFuncEntryCount": 1,
- "Stage": 2
+ "Stage": 1
}
]
}
@@ -4729,17 +4823,17 @@
"ActFuncHandleTotalCount": 1,
"ActFuncTotalEntryFieldCount": 1,
"ActFuncTotalConstTupleList": 0,
- "ActionDataTableHandle": 33554438
+ "ActionDataTableHandle": 33554437
}
],
- "TotalAdTables": 6
+ "TotalAdTables": 5
},
"SnapShot": {
"PhvDetails": [
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -4758,7 +4852,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -4775,7 +4869,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -4795,7 +4889,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -4810,7 +4904,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -4825,7 +4919,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -4840,7 +4934,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -4855,7 +4949,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -4865,7 +4959,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -4880,7 +4974,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -4905,7 +4999,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -4914,13 +5008,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -4935,7 +5029,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -4960,7 +5054,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -4975,7 +5069,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -4995,7 +5089,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -5005,7 +5099,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -5030,7 +5124,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -5045,7 +5139,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -5060,7 +5154,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -5070,7 +5164,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -5100,7 +5194,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -5110,7 +5204,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -5125,7 +5219,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -5135,7 +5229,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -5150,7 +5244,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -5160,7 +5254,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -5169,13 +5263,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -5183,426 +5307,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
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"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
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- "PHVNAME": "ipv4_srcAddr",
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- }
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- },
- {
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- "PHVNAME": "ethernet_dstAddr",
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- }
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- },
- {
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- "PHVNAME": "ethernet_srcAddr",
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- }
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- },
- {
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- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
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- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
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- },
- {
- "HEADER": "tcp",
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- "HIDDEN": false,
- "POSITIONOFFSET": 86
- },
- {
- "HEADER": "udp",
- "POVBIT": 5,
- "HIDDEN": false,
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- }
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- },
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- }
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- },
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- {
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- },
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- },
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- },
- {
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- "PHVNAME": "tcp_window",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 47
- }
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- },
- {
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- },
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- }
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- },
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- "PHVNAME": "tcp_urgentPtr",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
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- },
- {
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- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 77
- }
- ],
- "PHVNUMBER": 323
- }
- ],
- "TOTALINGRESSPHVS": 32
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- "EGRESSPHVS": [
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- },
- {
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- "PHVLSB": 0,
- "POSITIONOFFSET": 11
- }
- ],
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- },
- {
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- }
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- },
- {
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- "FIELDMSB": 31,
- "PHVNAME": "ipv4_dstAddr",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
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- },
- {
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- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
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- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
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- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
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- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
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- "PHVLSB": 0,
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- }
- ],
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- },
- {
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- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -5622,10 +5354,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -5647,7 +5530,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -5655,6 +5634,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -5662,10 +5771,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -5677,40 +5786,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -5722,10 +5801,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -5737,7 +5816,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -5747,10 +5826,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -5765,7 +5844,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -5777,7 +5856,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -5787,10 +5866,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -5802,7 +5881,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -5812,10 +5891,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -5827,10 +5906,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -5842,10 +5921,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -5857,10 +5936,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -5872,10 +5951,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -5900,7 +5979,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -5912,120 +5991,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -6040,7 +6009,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -6056,53 +6025,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 0
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -6121,7 +6195,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -6138,7 +6212,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -6158,7 +6232,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -6173,7 +6247,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -6188,7 +6262,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -6203,7 +6277,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -6218,7 +6292,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -6228,7 +6302,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -6243,7 +6317,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -6268,7 +6342,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -6277,13 +6351,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -6298,7 +6372,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -6323,7 +6397,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -6338,7 +6412,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -6358,7 +6432,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -6368,7 +6442,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -6393,7 +6467,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -6408,7 +6482,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -6423,7 +6497,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -6433,7 +6507,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -6463,7 +6537,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -6473,7 +6547,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -6488,7 +6562,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -6498,7 +6572,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -6513,7 +6587,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -6523,7 +6597,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -6532,13 +6606,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -6546,426 +6650,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
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- }
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- ],
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- "PHVNAME": "tcp_seqNo",
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- "PHVLSB": 0,
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- ],
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- "TOTALINGRESSPHVS": 32
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- },
- {
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- {
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- ],
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- {
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- "PHVLSB": 0,
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- }
- ],
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- },
- {
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- "FIELDMSB": 31,
- "PHVNAME": "ipv4_dstAddr",
- "CONTAINERWIDTH": 32,
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- }
- ],
- "PHVNUMBER": 262
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- {
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- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
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- "PHVLSB": 0,
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- },
- {
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- "PHVNAME": "udp_length_",
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- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
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- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 62
- }
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- "PHVNUMBER": 263
- },
- {
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- {
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- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
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- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -6985,10 +6697,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
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+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -7010,7 +6873,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -7018,6 +6977,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -7025,10 +7114,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -7040,40 +7129,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -7085,10 +7144,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -7100,7 +7159,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -7110,10 +7169,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -7128,7 +7187,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -7140,7 +7199,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -7150,10 +7209,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -7165,7 +7224,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -7175,10 +7234,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -7190,10 +7249,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -7205,10 +7264,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -7220,10 +7279,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -7235,10 +7294,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -7263,7 +7322,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -7275,120 +7334,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -7403,7 +7352,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -7419,53 +7368,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 1
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -7484,7 +7538,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -7501,7 +7555,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -7521,7 +7575,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -7536,7 +7590,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -7551,7 +7605,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -7566,7 +7620,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -7581,7 +7635,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -7591,7 +7645,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -7606,7 +7660,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -7631,7 +7685,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -7640,13 +7694,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -7661,7 +7715,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -7686,7 +7740,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -7701,7 +7755,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -7721,7 +7775,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -7731,7 +7785,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -7756,7 +7810,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -7771,7 +7825,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -7786,7 +7840,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -7796,7 +7850,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -7826,7 +7880,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -7836,7 +7890,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -7851,7 +7905,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -7861,7 +7915,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -7876,7 +7930,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -7886,7 +7940,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -7895,13 +7949,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -7909,426 +7993,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 7,
- "FIELDMSB": 23,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 14
- }
- ],
- "PHVNUMBER": 65
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 71
- }
- ],
- "PHVNUMBER": 67
- },
- {
- "PHVRECORD": [
- {
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "POV",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
- {
- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
- "POSITIONOFFSET": 85
- },
- {
- "HEADER": "tcp",
- "POVBIT": 4,
- "HIDDEN": false,
- "POSITIONOFFSET": 86
- },
- {
- "HEADER": "udp",
- "POVBIT": 5,
- "HIDDEN": false,
- "POSITIONOFFSET": 87
- }
- ]
- }
- ],
- "PHVNUMBER": 68
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 7,
- "FIELDMSB": 2,
- "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 5,
- "POSITIONOFFSET": 52
- }
- ],
- "PHVNUMBER": 69
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 44
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 49
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 13
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 21,
- "FIELDMSB": 5,
- "PHVNAME": "tcp_ctrl",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 38
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_window",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 47
- }
- ],
- "PHVNUMBER": 258
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- "PHVNAME": "tcp_dataOffset",
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- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
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- "FIELDLSB": 0,
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- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
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- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
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- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -8348,10 +8040,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
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+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
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+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
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+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -8373,7 +8216,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -8381,6 +8320,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -8388,10 +8457,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -8403,40 +8472,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
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- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -8448,10 +8487,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -8463,7 +8502,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -8473,10 +8512,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -8491,7 +8530,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -8503,7 +8542,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -8513,10 +8552,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -8528,7 +8567,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -8538,10 +8577,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -8553,10 +8592,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -8568,10 +8607,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -8583,10 +8622,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -8598,10 +8637,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -8626,7 +8665,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -8638,120 +8677,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
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- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -8766,7 +8695,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -8782,53 +8711,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 2
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -8847,7 +8881,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -8864,7 +8898,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -8884,7 +8918,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -8899,7 +8933,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -8914,7 +8948,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -8929,7 +8963,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -8944,7 +8978,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -8954,7 +8988,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -8969,7 +9003,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -8994,7 +9028,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -9003,13 +9037,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -9024,7 +9058,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -9049,7 +9083,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -9064,7 +9098,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -9084,7 +9118,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -9094,7 +9128,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -9119,7 +9153,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -9134,7 +9168,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -9149,7 +9183,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -9159,7 +9193,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -9189,7 +9223,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -9199,7 +9233,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -9214,7 +9248,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -9224,7 +9258,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -9239,7 +9273,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -9249,7 +9283,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -9258,13 +9292,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -9272,426 +9336,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 7,
- "FIELDMSB": 23,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 14
- }
- ],
- "PHVNUMBER": 65
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 71
- }
- ],
- "PHVNUMBER": 67
- },
- {
- "PHVRECORD": [
- {
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "POV",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
- {
- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
- "POSITIONOFFSET": 85
- },
- {
- "HEADER": "tcp",
- "POVBIT": 4,
- "HIDDEN": false,
- "POSITIONOFFSET": 86
- },
- {
- "HEADER": "udp",
- "POVBIT": 5,
- "HIDDEN": false,
- "POSITIONOFFSET": 87
- }
- ]
- }
- ],
- "PHVNUMBER": 68
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 7,
- "FIELDMSB": 2,
- "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 5,
- "POSITIONOFFSET": 52
- }
- ],
- "PHVNUMBER": 69
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 44
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 49
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 13
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 21,
- "FIELDMSB": 5,
- "PHVNAME": "tcp_ctrl",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 38
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_window",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 47
- }
- ],
- "PHVNUMBER": 258
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 36
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 69
- }
- ],
- "PHVNUMBER": 322
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 77
- }
- ],
- "PHVNUMBER": 323
- }
- ],
- "TOTALINGRESSPHVS": 32
- },
- {
- "PHVDIRECTION": 1,
- "EGRESSPHVS": [
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_ttl",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 24,
- "POSITIONOFFSET": 50
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 23,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_protocol",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 21
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_hdrChecksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 11
- }
- ],
- "PHVNUMBER": 260
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 15
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_dstAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 262
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 62
- }
- ],
- "PHVNUMBER": 263
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -9711,10 +9383,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -9736,7 +9559,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -9744,6 +9663,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -9751,10 +9800,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -9766,40 +9815,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -9811,10 +9830,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -9826,7 +9845,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -9836,10 +9855,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -9854,7 +9873,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -9866,7 +9885,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -9876,10 +9895,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -9891,7 +9910,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -9901,10 +9920,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -9916,10 +9935,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -9931,10 +9950,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -9946,10 +9965,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -9961,10 +9980,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -9989,7 +10008,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -10001,120 +10020,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -10129,7 +10038,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -10145,53 +10054,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 3
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -10210,7 +10224,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -10227,7 +10241,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -10247,7 +10261,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -10262,7 +10276,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -10277,7 +10291,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -10292,7 +10306,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -10307,7 +10321,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -10317,7 +10331,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -10332,7 +10346,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -10357,7 +10371,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -10366,13 +10380,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -10387,7 +10401,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -10412,7 +10426,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -10427,7 +10441,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
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@@ -10447,7 +10461,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
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@@ -10457,7 +10471,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -10482,7 +10496,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -10497,7 +10511,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -10512,7 +10526,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -10522,7 +10536,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -10552,7 +10566,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
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@@ -10562,7 +10576,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -10577,7 +10591,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
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@@ -10587,7 +10601,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -10602,7 +10616,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
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@@ -10612,7 +10626,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -10621,13 +10635,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -10635,426 +10679,34 @@
{
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{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
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- {
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- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
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- "FIELDMSB": 15,
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- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
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- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
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+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
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},
{
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@@ -11074,10 +10726,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
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+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
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+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
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+ "FIELDLSB": 8,
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+ "PHVNAME": "ipv4_identification",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
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+ },
+ {
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+ "PHVMSB": 7,
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+ "PHVNAME": "ipv4_srcAddr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
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+ },
+ {
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+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
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+ },
+ {
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+ "PHVNAME": "ethernet_srcAddr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
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+ "PHVNAME": "POV",
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+ "PHVLSB": 0,
+ "HEADERNAMES": [
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+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
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+ "PHVNUMBER": 67
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+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
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+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
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@@ -11099,7 +10902,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
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+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
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+ "EGRESSPHVS": [
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+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
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+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
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+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
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+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -11107,6 +11006,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -11114,10 +11143,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -11129,40 +11158,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -11174,10 +11173,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -11189,7 +11188,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -11199,10 +11198,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -11217,7 +11216,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -11229,7 +11228,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -11239,10 +11238,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -11254,7 +11253,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -11264,10 +11263,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -11279,10 +11278,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -11294,10 +11293,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -11309,10 +11308,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -11324,10 +11323,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -11352,7 +11351,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -11364,120 +11363,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -11492,7 +11381,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -11508,53 +11397,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 4
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -11573,7 +11567,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -11590,7 +11584,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -11610,7 +11604,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -11625,7 +11619,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -11640,7 +11634,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -11655,7 +11649,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -11670,7 +11664,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -11680,7 +11674,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -11695,7 +11689,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -11720,7 +11714,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -11729,13 +11723,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -11750,7 +11744,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -11775,7 +11769,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -11790,7 +11784,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -11810,7 +11804,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -11820,7 +11814,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -11845,7 +11839,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -11860,7 +11854,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -11875,7 +11869,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -11885,7 +11879,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -11915,7 +11909,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -11925,7 +11919,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -11940,7 +11934,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -11950,7 +11944,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -11965,7 +11959,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -11975,7 +11969,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -11984,13 +11978,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -11998,426 +12022,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
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- "PHVMSB": 7,
- "FIELDMSB": 23,
- "PHVNAME": "ipv4_srcAddr",
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- "POSITIONOFFSET": 14
- }
- ],
- "PHVNUMBER": 65
- },
- {
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- "PHVNAME": "ethernet_dstAddr",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
- "PHVRECORD": [
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- "PHVNAME": "ethernet_srcAddr",
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- }
- ],
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- },
- {
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- "PHVNAME": "POV",
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- "HEADERNAMES": [
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- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
- "POSITIONOFFSET": 85
- },
- {
- "HEADER": "tcp",
- "POVBIT": 4,
- "HIDDEN": false,
- "POSITIONOFFSET": 86
- },
- {
- "HEADER": "udp",
- "POVBIT": 5,
- "HIDDEN": false,
- "POSITIONOFFSET": 87
- }
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- "PHVNUMBER": 68
- },
- {
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- "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 5,
- "POSITIONOFFSET": 52
- }
- ],
- "PHVNUMBER": 69
- },
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- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
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- "PHVLSB": 28,
- "POSITIONOFFSET": 44
- },
- {
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- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
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- },
- {
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- "POSITIONOFFSET": 13
- },
- {
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- "FIELDMSB": 5,
- "PHVNAME": "tcp_ctrl",
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- "PHVLSB": 16,
- "POSITIONOFFSET": 38
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
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- "PHVNAME": "tcp_window",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 47
- }
- ],
- "PHVNUMBER": 258
- },
- {
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- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
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- "POSITIONOFFSET": 36
- },
- {
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- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 69
- }
- ],
- "PHVNUMBER": 322
- },
- {
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- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
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- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
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- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 77
- }
- ],
- "PHVNUMBER": 323
- }
- ],
- "TOTALINGRESSPHVS": 32
- },
- {
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- "EGRESSPHVS": [
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- "FIELDMSB": 7,
- "PHVNAME": "ipv4_ttl",
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- "PHVLSB": 24,
- "POSITIONOFFSET": 50
- },
- {
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- "FIELDMSB": 7,
- "PHVNAME": "ipv4_protocol",
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- "PHVLSB": 16,
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- },
- {
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- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_hdrChecksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 11
- }
- ],
- "PHVNUMBER": 260
- },
- {
- "PHVRECORD": [
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- "FIELDMSB": 31,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 15
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_dstAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 262
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
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- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 62
- }
- ],
- "PHVNUMBER": 263
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -12437,10 +12069,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -12462,7 +12245,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -12470,6 +12349,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -12477,10 +12486,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -12492,40 +12501,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -12537,10 +12516,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -12552,7 +12531,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -12562,10 +12541,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -12580,7 +12559,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -12592,7 +12571,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -12602,10 +12581,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -12617,7 +12596,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -12627,10 +12606,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -12642,10 +12621,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -12657,10 +12636,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -12672,10 +12651,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -12687,10 +12666,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -12715,7 +12694,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -12727,120 +12706,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -12855,7 +12724,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -12871,53 +12740,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 5
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -12936,7 +12910,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -12953,7 +12927,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -12973,7 +12947,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -12988,7 +12962,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -13003,7 +12977,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -13018,7 +12992,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -13033,7 +13007,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -13043,7 +13017,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -13058,7 +13032,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -13083,7 +13057,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -13092,13 +13066,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -13113,7 +13087,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -13138,7 +13112,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -13153,7 +13127,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -13173,7 +13147,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -13183,7 +13157,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -13208,7 +13182,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -13223,7 +13197,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -13238,7 +13212,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -13248,7 +13222,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -13278,7 +13252,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -13288,7 +13262,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -13303,7 +13277,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -13313,7 +13287,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -13328,7 +13302,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -13338,7 +13312,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -13347,13 +13321,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -13361,426 +13365,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 7,
- "FIELDMSB": 23,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 14
- }
- ],
- "PHVNUMBER": 65
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 71
- }
- ],
- "PHVNUMBER": 67
- },
- {
- "PHVRECORD": [
- {
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "POV",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
- {
- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
- "POSITIONOFFSET": 85
- },
- {
- "HEADER": "tcp",
- "POVBIT": 4,
- "HIDDEN": false,
- "POSITIONOFFSET": 86
- },
- {
- "HEADER": "udp",
- "POVBIT": 5,
- "HIDDEN": false,
- "POSITIONOFFSET": 87
- }
- ]
- }
- ],
- "PHVNUMBER": 68
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 7,
- "FIELDMSB": 2,
- "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 5,
- "POSITIONOFFSET": 52
- }
- ],
- "PHVNUMBER": 69
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 44
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
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- },
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- }
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- "FIELDMSB": 31,
- "PHVNAME": "ipv4_dstAddr",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 262
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- {
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- "PHVNAME": "tcp_ackNo",
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- "PHVLSB": 0,
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- },
- {
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- "PHVNAME": "udp_length_",
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- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
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- "PHVNAME": "udp_checksum",
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- "PHVLSB": 0,
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- }
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- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
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- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
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- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
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- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -13800,10 +13412,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -13825,7 +13588,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -13833,6 +13692,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -13840,10 +13829,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -13855,40 +13844,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -13900,10 +13859,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -13915,7 +13874,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -13925,10 +13884,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -13943,7 +13902,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -13955,7 +13914,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -13965,10 +13924,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -13980,7 +13939,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -13990,10 +13949,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -14005,10 +13964,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -14020,10 +13979,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -14035,10 +13994,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -14050,10 +14009,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -14078,7 +14037,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -14090,120 +14049,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -14218,7 +14067,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -14234,53 +14083,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 6
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -14299,7 +14253,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -14316,7 +14270,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -14336,7 +14290,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -14351,7 +14305,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -14366,7 +14320,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -14381,7 +14335,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -14396,7 +14350,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -14406,7 +14360,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -14421,7 +14375,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -14446,7 +14400,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -14455,13 +14409,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -14476,7 +14430,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -14501,7 +14455,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -14516,7 +14470,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -14536,7 +14490,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -14546,7 +14500,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -14571,7 +14525,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -14586,7 +14540,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -14601,7 +14555,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -14611,7 +14565,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -14641,7 +14595,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -14651,7 +14605,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -14666,7 +14620,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -14676,7 +14630,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -14691,7 +14645,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -14701,7 +14655,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -14710,13 +14664,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -14724,426 +14708,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
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"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 16,
- "PHVMSB": 7,
- "FIELDMSB": 23,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 14
- }
- ],
- "PHVNUMBER": 65
- },
- {
- "PHVRECORD": [
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- "PHVMSB": 7,
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- "PHVNAME": "ethernet_dstAddr",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
- "PHVRECORD": [
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- "FIELDMSB": 39,
- "PHVNAME": "ethernet_srcAddr",
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- "POSITIONOFFSET": 71
- }
- ],
- "PHVNUMBER": 67
- },
- {
- "PHVRECORD": [
- {
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- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "POV",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
- {
- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
- "POSITIONOFFSET": 85
- },
- {
- "HEADER": "tcp",
- "POVBIT": 4,
- "HIDDEN": false,
- "POSITIONOFFSET": 86
- },
- {
- "HEADER": "udp",
- "POVBIT": 5,
- "HIDDEN": false,
- "POSITIONOFFSET": 87
- }
- ]
- }
- ],
- "PHVNUMBER": 68
- },
- {
- "PHVRECORD": [
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- "FIELDMSB": 2,
- "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 5,
- "POSITIONOFFSET": 52
- }
- ],
- "PHVNUMBER": 69
- },
- {
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- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
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- "PHVLSB": 28,
- "POSITIONOFFSET": 44
- },
- {
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- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
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- "PHVLSB": 25,
- "POSITIONOFFSET": 49
- },
- {
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- "PHVNAME": "tcp_ecn",
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- "PHVLSB": 22,
- "POSITIONOFFSET": 13
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
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- "FIELDMSB": 5,
- "PHVNAME": "tcp_ctrl",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 38
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_window",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 47
- }
- ],
- "PHVNUMBER": 258
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
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- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 36
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 69
- }
- ],
- "PHVNUMBER": 322
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 0,
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- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
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- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
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- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
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- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 77
- }
- ],
- "PHVNUMBER": 323
- }
- ],
- "TOTALINGRESSPHVS": 32
- },
- {
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- "EGRESSPHVS": [
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- "FIELDMSB": 7,
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- },
- {
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- },
- {
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- "PHVNAME": "ipv4_hdrChecksum",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 11
- }
- ],
- "PHVNUMBER": 260
- },
- {
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- },
- {
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- }
- ],
- "PHVNUMBER": 262
- },
- {
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- },
- {
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- },
- {
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- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -15163,10 +14755,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -15188,7 +14931,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -15196,6 +15035,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -15203,10 +15172,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -15218,40 +15187,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -15263,10 +15202,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -15278,7 +15217,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -15288,10 +15227,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -15306,7 +15245,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -15318,7 +15257,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -15328,10 +15267,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -15343,7 +15282,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -15353,10 +15292,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -15368,10 +15307,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -15383,10 +15322,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -15398,10 +15337,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -15413,10 +15352,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -15441,7 +15380,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -15453,120 +15392,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -15581,7 +15410,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -15597,53 +15426,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 7
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -15662,7 +15596,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -15679,7 +15613,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
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+ "POSITIONOFFSET": 19
},
{
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@@ -15699,7 +15633,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
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+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -15714,7 +15648,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -15729,7 +15663,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
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+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -15744,7 +15678,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -15759,7 +15693,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
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@@ -15769,7 +15703,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -15784,7 +15718,7 @@
"PHVNAME": "ecmp_metadata_groupId",
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"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -15809,7 +15743,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
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"PHVLSB": 7,
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+ "POSITIONOFFSET": 33
}
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@@ -15818,13 +15752,13 @@
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{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
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+ "POSITIONOFFSET": 28
}
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@@ -15839,7 +15773,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
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+ "POSITIONOFFSET": 32
},
{
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@@ -15864,7 +15798,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
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"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
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@@ -15879,7 +15813,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
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+ "POSITIONOFFSET": 49
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{
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@@ -15899,7 +15833,7 @@
"PHVNAME": "ipv4_fragOffset",
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+ "POSITIONOFFSET": 44
},
{
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@@ -15909,7 +15843,7 @@
"PHVNAME": "ipv4_ttl",
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"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
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@@ -15934,7 +15868,7 @@
"PHVNAME": "ipv4_totalLen",
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+ "POSITIONOFFSET": 63
}
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@@ -15949,7 +15883,7 @@
"PHVNAME": "ipv4_srcAddr",
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"PHVLSB": 0,
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+ "POSITIONOFFSET": 13
}
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@@ -15964,7 +15898,7 @@
"PHVNAME": "ethernet_dstAddr",
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"PHVLSB": 8,
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+ "POSITIONOFFSET": 22
},
{
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@@ -15974,7 +15908,7 @@
"PHVNAME": "ethernet_srcAddr",
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+ "POSITIONOFFSET": 70
}
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@@ -16004,7 +15938,7 @@
"PHVNAME": "ipv4_version",
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"PHVLSB": 4,
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+ "POSITIONOFFSET": 65
},
{
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@@ -16014,7 +15948,7 @@
"PHVNAME": "ipv4_ihl",
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"PHVLSB": 0,
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+ "POSITIONOFFSET": 40
}
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@@ -16029,7 +15963,7 @@
"PHVNAME": "tcp_srcPort",
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+ "POSITIONOFFSET": 38
},
{
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@@ -16039,7 +15973,7 @@
"PHVNAME": "udp_length_",
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"PHVLSB": 0,
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+ "POSITIONOFFSET": 17
}
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@@ -16054,7 +15988,7 @@
"PHVNAME": "tcp_srcPort",
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+ "POSITIONOFFSET": 38
},
{
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@@ -16064,7 +15998,7 @@
"PHVNAME": "udp_length_",
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+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -16073,13 +16007,43 @@
"PHVRECORD": [
{
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+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
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"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
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+ "POSITIONOFFSET": 61
}
],
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@@ -16087,426 +16051,34 @@
{
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{
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+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
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{
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+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
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+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
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},
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@@ -16526,10 +16098,161 @@
"PHVNAME": "tcp_window",
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"PHVLSB": 0,
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+ "POSITIONOFFSET": 46
}
],
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+ "PHVNUMBER": 257
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+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
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+ "PHVLSB": 8,
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+ },
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+ "PHVNAME": "ipv4_identification",
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+ }
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+ "PHVNAME": "ipv4_srcAddr",
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+ }
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+ }
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+ "PHVNAME": "ethernet_srcAddr",
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+ "POSITIONOFFSET": 70
+ }
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+ },
+ {
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+ "PHVNAME": "POV",
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+ "PHVLSB": 0,
+ "HEADERNAMES": [
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+ "HIDDEN": false,
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+ },
+ {
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+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
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+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
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+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
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+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
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+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
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+ },
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+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
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+ }
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+ "PHVNUMBER": 325
},
{
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@@ -16551,7 +16274,103 @@
"PHVNAME": "tcp_urgentPtr",
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- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
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+ },
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+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
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+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -16559,6 +16378,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -16566,10 +16515,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -16581,40 +16530,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -16626,10 +16545,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -16641,7 +16560,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -16651,10 +16570,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -16669,7 +16588,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -16681,7 +16600,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -16691,10 +16610,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -16706,7 +16625,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -16716,10 +16635,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -16731,10 +16650,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -16746,10 +16665,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -16761,10 +16680,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -16776,10 +16695,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -16804,7 +16723,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -16816,120 +16735,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -16944,7 +16753,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -16960,53 +16769,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 8
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -17025,7 +16939,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -17042,7 +16956,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -17062,7 +16976,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -17077,7 +16991,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -17092,7 +17006,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -17107,7 +17021,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -17122,7 +17036,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -17132,7 +17046,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -17147,7 +17061,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -17172,7 +17086,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -17181,13 +17095,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -17202,7 +17116,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -17227,7 +17141,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -17242,7 +17156,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -17262,7 +17176,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -17272,7 +17186,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -17297,7 +17211,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -17312,7 +17226,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -17327,7 +17241,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -17337,7 +17251,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -17367,7 +17281,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -17377,7 +17291,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -17392,7 +17306,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -17402,7 +17316,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -17417,7 +17331,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -17427,7 +17341,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -17436,13 +17350,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -17450,426 +17394,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 7,
- "FIELDMSB": 23,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 14
- }
- ],
- "PHVNUMBER": 65
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 71
- }
- ],
- "PHVNUMBER": 67
- },
- {
- "PHVRECORD": [
- {
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "POV",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
- {
- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
- "POSITIONOFFSET": 85
- },
- {
- "HEADER": "tcp",
- "POVBIT": 4,
- "HIDDEN": false,
- "POSITIONOFFSET": 86
- },
- {
- "HEADER": "udp",
- "POVBIT": 5,
- "HIDDEN": false,
- "POSITIONOFFSET": 87
- }
- ]
- }
- ],
- "PHVNUMBER": 68
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 7,
- "FIELDMSB": 2,
- "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 5,
- "POSITIONOFFSET": 52
- }
- ],
- "PHVNUMBER": 69
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 44
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 49
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 13
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 21,
- "FIELDMSB": 5,
- "PHVNAME": "tcp_ctrl",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 38
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_window",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 47
- }
- ],
- "PHVNUMBER": 258
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 36
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 69
- }
- ],
- "PHVNUMBER": 322
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 2
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_urgentPtr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 259
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 77
- }
- ],
- "PHVNUMBER": 323
- }
- ],
- "TOTALINGRESSPHVS": 32
- },
- {
- "PHVDIRECTION": 1,
- "EGRESSPHVS": [
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_ttl",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 24,
- "POSITIONOFFSET": 50
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 23,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_protocol",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 21
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_hdrChecksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 11
- }
- ],
- "PHVNUMBER": 260
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 15
- }
- ],
- "PHVNUMBER": 261
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "ipv4_dstAddr",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 53
- }
- ],
- "PHVNUMBER": 262
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 28
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 15,
- "PHVNAME": "udp_length_",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 16,
- "POSITIONOFFSET": 19
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_checksum",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 62
- }
- ],
- "PHVNUMBER": 263
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 31,
- "FIELDMSB": 3,
- "PHVNAME": "tcp_dataOffset",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 28,
- "POSITIONOFFSET": 41
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 27,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_res",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 24,
- "FIELDMSB": 2,
- "PHVNAME": "tcp_ecn",
- "CONTAINERWIDTH": 32,
- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
"FIELDWIDTH": 1,
@@ -17889,10 +17441,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDLSB": 32,
+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -17914,7 +17617,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -17922,6 +17721,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -17929,10 +17858,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -17944,40 +17873,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -17989,10 +17888,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -18004,7 +17903,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -18014,10 +17913,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -18032,7 +17931,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -18044,7 +17943,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -18054,10 +17953,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -18069,7 +17968,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -18079,10 +17978,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -18094,10 +17993,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -18109,10 +18008,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -18124,10 +18023,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -18139,10 +18038,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -18167,7 +18066,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -18179,120 +18078,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 331
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 22
- },
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 66
- }
- ],
- "PHVNUMBER": 332
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 42
- }
- ],
- "PHVNUMBER": 333
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_out_hdr_egress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 0
- }
- ],
- "PHVNUMBER": 334
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 1,
- "FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -18307,7 +18096,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -18323,53 +18112,158 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 9
},
{
"TOTALPOVHEADERS": 13,
- "TOTALSTAGEPHVS": 61,
- "TOTALPHVRECORDS": 96,
+ "TOTALSTAGEPHVS": 59,
+ "TOTALPHVRECORDS": 95,
"Phvs": [
{
"PHVDIRECTION": 0,
@@ -18388,7 +18282,7 @@
"HEADER": "--pov_reserved--_0",
"POVBIT": 0,
"HIDDEN": true,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 80
}
]
}
@@ -18405,7 +18299,7 @@
"PHVNAME": "ipv4_protocol",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 20
+ "POSITIONOFFSET": 19
},
{
"FIELDWIDTH": 2,
@@ -18425,7 +18319,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 1
@@ -18440,7 +18334,7 @@
"PHVNAME": "ipv4_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 58
+ "POSITIONOFFSET": 57
}
],
"PHVNUMBER": 2
@@ -18455,7 +18349,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
}
],
"PHVNUMBER": 3
@@ -18470,7 +18364,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 4
@@ -18485,7 +18379,7 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 16,
- "POSITIONOFFSET": 67
+ "POSITIONOFFSET": 66
},
{
"FIELDWIDTH": 2,
@@ -18495,7 +18389,7 @@
"PHVNAME": "udp_dstPort",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 56
+ "POSITIONOFFSET": 55
}
],
"PHVNUMBER": 5
@@ -18510,7 +18404,7 @@
"PHVNAME": "ecmp_metadata_groupId",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 21
+ "POSITIONOFFSET": 20
}
],
"PHVNUMBER": 134
@@ -18535,7 +18429,7 @@
"PHVNAME": "packet_in_hdr_ingress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 7,
- "POSITIONOFFSET": 34
+ "POSITIONOFFSET": 33
}
],
"PHVNUMBER": 129
@@ -18544,13 +18438,13 @@
"PHVRECORD": [
{
"FIELDWIDTH": 4,
- "FIELDLSB": 0,
+ "FIELDLSB": 16,
"PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "tcp_seqNo",
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 28
}
],
"PHVNUMBER": 324
@@ -18565,7 +18459,7 @@
"PHVNAME": "ig_intr_md_resubmit_flag",
"CONTAINERWIDTH": 16,
"PHVLSB": 15,
- "POSITIONOFFSET": 33
+ "POSITIONOFFSET": 32
},
{
"FIELDWIDTH": 2,
@@ -18590,7 +18484,7 @@
"PHVNAME": "ig_intr_md_for_tm_ucast_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 42
+ "POSITIONOFFSET": 41
}
],
"PHVNUMBER": 130
@@ -18605,7 +18499,7 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 32,
"PHVLSB": 24,
- "POSITIONOFFSET": 50
+ "POSITIONOFFSET": 49
},
{
"FIELDWIDTH": 1,
@@ -18625,7 +18519,7 @@
"PHVNAME": "ipv4_fragOffset",
"CONTAINERWIDTH": 32,
"PHVLSB": 8,
- "POSITIONOFFSET": 45
+ "POSITIONOFFSET": 44
},
{
"FIELDWIDTH": 1,
@@ -18635,7 +18529,7 @@
"PHVNAME": "ipv4_ttl",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 55
+ "POSITIONOFFSET": 54
}
],
"PHVNUMBER": 256
@@ -18660,7 +18554,7 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 63
}
],
"PHVNUMBER": 320
@@ -18675,7 +18569,7 @@
"PHVNAME": "ipv4_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 14
+ "POSITIONOFFSET": 13
}
],
"PHVNUMBER": 131
@@ -18690,7 +18584,7 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 8,
- "POSITIONOFFSET": 23
+ "POSITIONOFFSET": 22
},
{
"FIELDWIDTH": 6,
@@ -18700,7 +18594,7 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 71
+ "POSITIONOFFSET": 70
}
],
"PHVNUMBER": 132
@@ -18730,7 +18624,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 65
},
{
"FIELDWIDTH": 1,
@@ -18740,7 +18634,7 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 41
+ "POSITIONOFFSET": 40
}
],
"PHVNUMBER": 288
@@ -18755,7 +18649,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -18765,7 +18659,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 289
@@ -18780,7 +18674,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 39
+ "POSITIONOFFSET": 38
},
{
"FIELDWIDTH": 2,
@@ -18790,7 +18684,7 @@
"PHVNAME": "udp_length_",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 18
+ "POSITIONOFFSET": 17
}
],
"PHVNUMBER": 290
@@ -18799,13 +18693,43 @@
"PHVRECORD": [
{
"FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 291
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 7,
+ "PHVNAME": "tcp_dstPort",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 35
+ }
+ ],
+ "PHVNUMBER": 292
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
"FIELDLSB": 0,
"PHVMSB": 15,
"FIELDMSB": 15,
"PHVNAME": "ecmp_metadata_selector",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 62
+ "POSITIONOFFSET": 61
}
],
"PHVNUMBER": 135
@@ -18813,426 +18737,34 @@
{
"PHVRECORD": [
{
- "FIELDWIDTH": 4,
+ "FIELDWIDTH": 1,
"FIELDLSB": 0,
"PHVMSB": 31,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_ackNo",
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
"CONTAINERWIDTH": 32,
- "PHVLSB": 0,
- "POSITIONOFFSET": 29
- }
- ],
- "PHVNUMBER": 257
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 7,
- "PHVNAME": "ipv4_totalLen",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 8,
- "POSITIONOFFSET": 64
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 43
},
{
- "FIELDWIDTH": 2,
- "FIELDLSB": 8,
- "PHVMSB": 7,
- "FIELDMSB": 15,
- "PHVNAME": "ipv4_identification",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 50
- }
- ],
- "PHVNUMBER": 321
- },
- {
- "PHVRECORD": [
- {
"FIELDWIDTH": 1,
"FIELDLSB": 0,
- "PHVMSB": 0,
- "FIELDMSB": 0,
- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 48
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
"POSITIONOFFSET": 12
- }
- ],
- "PHVNUMBER": 64
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 7,
- "FIELDMSB": 23,
- "PHVNAME": "ipv4_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 14
- }
- ],
- "PHVNUMBER": 65
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 40,
- "PHVMSB": 7,
- "FIELDMSB": 47,
- "PHVNAME": "ethernet_dstAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 23
- }
- ],
- "PHVNUMBER": 66
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 6,
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "ethernet_srcAddr",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 71
- }
- ],
- "PHVNUMBER": 67
- },
- {
- "PHVRECORD": [
- {
- "FIELDLSB": 32,
- "PHVMSB": 7,
- "FIELDMSB": 39,
- "PHVNAME": "POV",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "HEADERNAMES": [
- {
- "HEADER": "packet_in_hdr",
- "POVBIT": 0,
- "HIDDEN": false,
- "POSITIONOFFSET": 82
- },
- {
- "HEADER": "packet_out_hdr",
- "POVBIT": 1,
- "HIDDEN": false,
- "POSITIONOFFSET": 83
- },
- {
- "HEADER": "ethernet",
- "POVBIT": 2,
- "HIDDEN": false,
- "POSITIONOFFSET": 84
- },
- {
- "HEADER": "ipv4",
- "POVBIT": 3,
- "HIDDEN": false,
- "POSITIONOFFSET": 85
- },
- {
- "HEADER": "tcp",
- "POVBIT": 4,
- "HIDDEN": false,
- "POSITIONOFFSET": 86
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- "PHVNAME": "ipv4_dstAddr",
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- "PHVNAME": "tcp_dataOffset",
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- "PHVLSB": 28,
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- },
- {
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- "PHVNAME": "tcp_res",
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- "PHVLSB": 25,
- "POSITIONOFFSET": 61
- },
- {
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- "PHVNAME": "tcp_ecn",
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- "PHVLSB": 22,
- "POSITIONOFFSET": 14
},
{
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@@ -19252,10 +18784,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
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+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 16,
+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
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+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
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+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
+ ],
+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
+ ]
+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
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+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -19277,7 +18960,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -19285,6 +19064,136 @@
{
"PHVRECORD": [
{
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
"FIELDWIDTH": 6,
"FIELDLSB": 8,
"PHVMSB": 31,
@@ -19292,10 +19201,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
"PHVRECORD": [
@@ -19307,40 +19216,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 267
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 8,
- "FIELDMSB": 8,
- "PHVNAME": "ig_intr_md_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 9
- }
- ],
- "PHVNUMBER": 144
- },
- {
- "PHVRECORD": [
- {
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- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 8,
- "PHVNAME": "packet_in_hdr_ingress_port",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
"PHVRECORD": [
@@ -19352,10 +19231,10 @@
"PHVNAME": "eg_intr_md_egress_port",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 64
+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
"PHVRECORD": [
@@ -19367,7 +19246,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
"FIELDWIDTH": 1,
@@ -19377,10 +19256,10 @@
"PHVNAME": "ipv4_ihl",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 40
+ "POSITIONOFFSET": 37
}
],
- "PHVNUMBER": 292
+ "PHVNUMBER": 296
},
{
"PHVRECORD": [
@@ -19395,7 +19274,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -19407,7 +19286,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -19417,10 +19296,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
"PHVRECORD": [
@@ -19432,7 +19311,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
"FIELDWIDTH": 2,
@@ -19442,10 +19321,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
"PHVRECORD": [
@@ -19457,10 +19336,10 @@
"PHVNAME": "ethernet_dstAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -19472,10 +19351,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
"PHVRECORD": [
@@ -19487,10 +19366,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
"PHVRECORD": [
@@ -19502,10 +19381,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -19530,7 +19409,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -19542,120 +19421,10 @@
"PHVNAME": "tcp_dstPort",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 35
- },
- {
- "FIELDWIDTH": 2,
- "FIELDLSB": 0,
- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
- "PHVNUMBER": 329
- },
- {
- "PHVRECORD": [
- {
- "FIELDWIDTH": 4,
- "FIELDLSB": 16,
- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
- "PHVNUMBER": 330
- },
- {
- "PHVRECORD": [
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{
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@@ -19670,7 +19439,7 @@
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}
],
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{
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@@ -19686,53 +19455,158 @@
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{
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{
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{
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}
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{
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{
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@@ -19751,7 +19625,7 @@
"HEADER": "--pov_reserved--_0",
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}
]
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@@ -19768,7 +19642,7 @@
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{
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@@ -19788,7 +19662,7 @@
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}
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@@ -19803,7 +19677,7 @@
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}
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@@ -19818,7 +19692,7 @@
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@@ -19833,7 +19707,7 @@
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}
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@@ -19848,7 +19722,7 @@
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{
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@@ -19858,7 +19732,7 @@
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}
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@@ -19873,7 +19747,7 @@
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@@ -19898,7 +19772,7 @@
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@@ -19907,13 +19781,13 @@
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{
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@@ -19928,7 +19802,7 @@
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{
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@@ -19968,7 +19842,7 @@
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{
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@@ -19988,7 +19862,7 @@
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{
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@@ -19998,7 +19872,7 @@
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@@ -20023,7 +19897,7 @@
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@@ -20038,7 +19912,7 @@
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@@ -20053,7 +19927,7 @@
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{
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@@ -20063,7 +19937,7 @@
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@@ -20093,7 +19967,7 @@
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{
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@@ -20103,7 +19977,7 @@
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@@ -20118,7 +19992,7 @@
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@@ -20128,7 +20002,7 @@
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@@ -20143,7 +20017,7 @@
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@@ -20162,13 +20036,43 @@
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{
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@@ -20176,426 +20080,34 @@
{
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- "PHVLSB": 22,
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},
{
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@@ -20615,10 +20127,161 @@
"PHVNAME": "tcp_window",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 44
+ "POSITIONOFFSET": 46
}
],
- "PHVNUMBER": 264
+ "PHVNUMBER": 257
+ },
+ {
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+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_totalLen",
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+ "PHVLSB": 8,
+ "POSITIONOFFSET": 63
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 8,
+ "PHVMSB": 7,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_identification",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 49
+ }
+ ],
+ "PHVNUMBER": 321
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "PHVMSB": 7,
+ "FIELDMSB": 23,
+ "PHVNAME": "ipv4_srcAddr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 13
+ }
+ ],
+ "PHVNUMBER": 64
+ },
+ {
+ "PHVRECORD": [
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+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_dstAddr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 22
+ }
+ ],
+ "PHVNUMBER": 65
+ },
+ {
+ "PHVRECORD": [
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+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "ethernet_srcAddr",
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+ "PHVLSB": 0,
+ "POSITIONOFFSET": 70
+ }
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+ "PHVNUMBER": 66
+ },
+ {
+ "PHVRECORD": [
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+ "PHVMSB": 7,
+ "FIELDMSB": 39,
+ "PHVNAME": "POV",
+ "CONTAINERWIDTH": 8,
+ "PHVLSB": 0,
+ "HEADERNAMES": [
+ {
+ "HEADER": "packet_in_hdr",
+ "POVBIT": 0,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 81
+ },
+ {
+ "HEADER": "packet_out_hdr",
+ "POVBIT": 1,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 82
+ },
+ {
+ "HEADER": "ethernet",
+ "POVBIT": 2,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 83
+ },
+ {
+ "HEADER": "ipv4",
+ "POVBIT": 3,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 84
+ },
+ {
+ "HEADER": "tcp",
+ "POVBIT": 4,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 85
+ },
+ {
+ "HEADER": "udp",
+ "POVBIT": 5,
+ "HIDDEN": false,
+ "POSITIONOFFSET": 86
+ }
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+ }
+ ],
+ "PHVNUMBER": 67
+ },
+ {
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+ "PHVMSB": 7,
+ "FIELDMSB": 2,
+ "PHVNAME": "ig_intr_md_for_tm_drop_ctl",
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+ "PHVLSB": 5,
+ "POSITIONOFFSET": 51
+ }
+ ],
+ "PHVNUMBER": 68
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 28
+ }
+ ],
+ "PHVNUMBER": 325
},
{
"PHVRECORD": [
@@ -20640,7 +20303,103 @@
"PHVNAME": "tcp_urgentPtr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 48
+ "POSITIONOFFSET": 52
+ }
+ ],
+ "PHVNUMBER": 258
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 68
+ }
+ ],
+ "PHVNUMBER": 322
+ },
+ {
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+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 76
+ }
+ ],
+ "PHVNUMBER": 323
+ }
+ ],
+ "TOTALINGRESSPHVS": 33
+ },
+ {
+ "PHVDIRECTION": 1,
+ "EGRESSPHVS": [
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+ "PHVMSB": 31,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_ttl",
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+ "PHVLSB": 24,
+ "POSITIONOFFSET": 47
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 23,
+ "FIELDMSB": 7,
+ "PHVNAME": "ipv4_protocol",
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+ "PHVLSB": 16,
+ "POSITIONOFFSET": 18
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ipv4_hdrChecksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 9
+ }
+ ],
+ "PHVNUMBER": 264
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_srcAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 12
}
],
"PHVNUMBER": 265
@@ -20648,6 +20407,136 @@
{
"PHVRECORD": [
{
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "ipv4_dstAddr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 50
+ }
+ ],
+ "PHVNUMBER": 266
+ },
+ {
+ "PHVRECORD": [
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_ackNo",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 25
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_length_",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 16
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 59
+ }
+ ],
+ "PHVNUMBER": 267
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 3,
+ "PHVNAME": "tcp_dataOffset",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 28,
+ "POSITIONOFFSET": 38
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 27,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_res",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 25,
+ "POSITIONOFFSET": 58
+ },
+ {
+ "FIELDWIDTH": 1,
+ "FIELDLSB": 0,
+ "PHVMSB": 24,
+ "FIELDMSB": 2,
+ "PHVNAME": "tcp_ecn",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 22,
+ "POSITIONOFFSET": 11
+ },
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 21,
+ "FIELDMSB": 5,
+ "PHVNAME": "tcp_ctrl",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 34
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_window",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 41
+ }
+ ],
+ "PHVNUMBER": 268
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 31,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_checksum",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 16,
+ "POSITIONOFFSET": 2
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_urgentPtr",
+ "CONTAINERWIDTH": 32,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 45
+ }
+ ],
+ "PHVNUMBER": 269
+ },
+ {
+ "PHVRECORD": [
+ {
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"FIELDLSB": 8,
"PHVMSB": 31,
@@ -20655,10 +20544,10 @@
"PHVNAME": "ethernet_dstAddr",
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"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 266
+ "PHVNUMBER": 270
},
{
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@@ -20670,40 +20559,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 32,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
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- },
- {
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- "PHVNAME": "packet_in_hdr_ingress_port",
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- "PHVLSB": 7,
- "POSITIONOFFSET": 33
- }
- ],
- "PHVNUMBER": 145
+ "PHVNUMBER": 271
},
{
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@@ -20715,10 +20574,10 @@
"PHVNAME": "eg_intr_md_egress_port",
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"PHVLSB": 0,
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+ "POSITIONOFFSET": 61
}
],
- "PHVNUMBER": 146
+ "PHVNUMBER": 144
},
{
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@@ -20730,7 +20589,7 @@
"PHVNAME": "ipv4_version",
"CONTAINERWIDTH": 8,
"PHVLSB": 4,
- "POSITIONOFFSET": 32
+ "POSITIONOFFSET": 29
},
{
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@@ -20740,10 +20599,10 @@
"PHVNAME": "ipv4_ihl",
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"PHVLSB": 0,
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+ "POSITIONOFFSET": 37
}
],
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+ "PHVNUMBER": 296
},
{
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@@ -20758,7 +20617,7 @@
"POSITIONOFFSET": 4
}
],
- "PHVNUMBER": 293
+ "PHVNUMBER": 297
},
{
"PHVRECORD": [
@@ -20770,7 +20629,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
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@@ -20780,10 +20639,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 294
+ "PHVNUMBER": 298
},
{
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@@ -20795,7 +20654,7 @@
"PHVNAME": "tcp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 38
+ "POSITIONOFFSET": 35
},
{
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@@ -20805,10 +20664,10 @@
"PHVNAME": "udp_srcPort",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 59
+ "POSITIONOFFSET": 56
}
],
- "PHVNUMBER": 295
+ "PHVNUMBER": 299
},
{
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@@ -20820,10 +20679,10 @@
"PHVNAME": "ethernet_dstAddr",
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"PHVLSB": 0,
- "POSITIONOFFSET": 22
+ "POSITIONOFFSET": 19
}
],
- "PHVNUMBER": 296
+ "PHVNUMBER": 300
},
{
"PHVRECORD": [
@@ -20835,10 +20694,10 @@
"PHVNAME": "ethernet_srcAddr",
"CONTAINERWIDTH": 8,
"PHVLSB": 0,
- "POSITIONOFFSET": 66
+ "POSITIONOFFSET": 63
}
],
- "PHVNUMBER": 297
+ "PHVNUMBER": 301
},
{
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@@ -20850,10 +20709,10 @@
"PHVNAME": "ipv4_totalLen",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 57
+ "POSITIONOFFSET": 54
}
],
- "PHVNUMBER": 326
+ "PHVNUMBER": 332
},
{
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@@ -20865,10 +20724,10 @@
"PHVNAME": "ipv4_identification",
"CONTAINERWIDTH": 16,
"PHVLSB": 0,
- "POSITIONOFFSET": 46
+ "POSITIONOFFSET": 43
}
],
- "PHVNUMBER": 327
+ "PHVNUMBER": 333
},
{
"PHVRECORD": [
@@ -20893,7 +20752,7 @@
"POSITIONOFFSET": 5
}
],
- "PHVNUMBER": 328
+ "PHVNUMBER": 334
},
{
"PHVRECORD": [
@@ -20905,120 +20764,10 @@
"PHVNAME": "tcp_dstPort",
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"PHVLSB": 0,
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- },
- {
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- "PHVMSB": 15,
- "FIELDMSB": 15,
- "PHVNAME": "udp_dstPort",
- "CONTAINERWIDTH": 16,
- "PHVLSB": 0,
- "POSITIONOFFSET": 51
+ "POSITIONOFFSET": 32
}
],
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- },
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- "PHVMSB": 15,
- "FIELDMSB": 31,
- "PHVNAME": "tcp_seqNo",
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- "POSITIONOFFSET": 72
- }
- ],
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- },
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- "PHVNAME": "tcp_seqNo",
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- "PHVLSB": 0,
- "POSITIONOFFSET": 72
- }
- ],
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- "PHVNAME": "ethernet_dstAddr",
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- },
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- "PHVMSB": 7,
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- "PHVNAME": "ethernet_srcAddr",
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- "POSITIONOFFSET": 66
- }
- ],
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- "FIELDMSB": 15,
- "PHVNAME": "ethernet_etherType",
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- "PHVLSB": 0,
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- }
- ],
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- "PHVNAME": "packet_out_hdr_egress_port",
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- "PHVLSB": 7,
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- }
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- "PHVNAME": "ig_intr_md_for_tm_copy_to_cpu",
- "CONTAINERWIDTH": 8,
- "PHVLSB": 0,
- "POSITIONOFFSET": 13
- }
- ],
- "PHVNUMBER": 80
+ "PHVNUMBER": 335
},
{
"PHVRECORD": [
@@ -21033,7 +20782,7 @@
"POSITIONOFFSET": 7
}
],
- "PHVNUMBER": 81
+ "PHVNUMBER": 80
},
{
"PHVRECORD": [
@@ -21049,45 +20798,150 @@
"HEADER": "packet_in_hdr",
"POVBIT": 0,
"HIDDEN": false,
- "POSITIONOFFSET": 76
+ "POSITIONOFFSET": 73
},
{
"HEADER": "packet_out_hdr",
"POVBIT": 1,
"HIDDEN": false,
- "POSITIONOFFSET": 77
+ "POSITIONOFFSET": 74
},
{
"HEADER": "ethernet",
"POVBIT": 2,
"HIDDEN": false,
- "POSITIONOFFSET": 78
+ "POSITIONOFFSET": 75
},
{
"HEADER": "ipv4",
"POVBIT": 3,
"HIDDEN": false,
- "POSITIONOFFSET": 79
+ "POSITIONOFFSET": 76
},
{
"HEADER": "tcp",
"POVBIT": 4,
"HIDDEN": false,
- "POSITIONOFFSET": 80
+ "POSITIONOFFSET": 77
},
{
"HEADER": "udp",
"POVBIT": 5,
"HIDDEN": false,
- "POSITIONOFFSET": 81
+ "POSITIONOFFSET": 78
}
]
}
],
- "PHVNUMBER": 82
+ "PHVNUMBER": 81
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 7,
+ "PHVNAME": "ethernet_dstAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 8,
+ "POSITIONOFFSET": 19
+ },
+ {
+ "FIELDWIDTH": 6,
+ "FIELDLSB": 40,
+ "PHVMSB": 7,
+ "FIELDMSB": 47,
+ "PHVNAME": "ethernet_srcAddr",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 63
+ }
+ ],
+ "PHVNUMBER": 338
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "ethernet_etherType",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 39
+ }
+ ],
+ "PHVNUMBER": 339
+ },
+ {
+ "PHVRECORD": [
+ {
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+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_out_hdr_egress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 0
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 8,
+ "PHVNAME": "packet_in_hdr_ingress_port",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 7,
+ "POSITIONOFFSET": 30
+ }
+ ],
+ "PHVNUMBER": 340
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 16,
+ "PHVMSB": 15,
+ "FIELDMSB": 31,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ },
+ {
+ "FIELDWIDTH": 2,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "udp_dstPort",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 48
+ }
+ ],
+ "PHVNUMBER": 336
+ },
+ {
+ "PHVRECORD": [
+ {
+ "FIELDWIDTH": 4,
+ "FIELDLSB": 0,
+ "PHVMSB": 15,
+ "FIELDMSB": 15,
+ "PHVNAME": "tcp_seqNo",
+ "CONTAINERWIDTH": 16,
+ "PHVLSB": 0,
+ "POSITIONOFFSET": 69
+ }
+ ],
+ "PHVNUMBER": 337
}
],
- "TOTALEGRESSPHVS": 29
+ "TOTALEGRESSPHVS": 26
}
],
"Stage": 11
@@ -21098,61 +20952,13 @@
"DIRECTION": 0,
"TABLETYPE": "SRAM",
"PHYSICALBUSES": [
- 14
- ],
- "TABLENAME": "ecmp_group_table",
- "ID": 32,
- "TableHandle": 16777222,
- "TCAMADDRSHIFT": 0,
- "Stage": 2
- },
- {
- "DIRECTION": 0,
- "TABLETYPE": "TCAM",
- "PHYSICALBUSES": [
- 0
- ],
- "TABLENAME": "table0",
- "ID": 16,
- "TableHandle": 16777221,
- "TCAMADDRSHIFT": 1,
- "Stage": 1
- },
- {
- "DIRECTION": 0,
- "TABLETYPE": "SRAM",
- "PHYSICALBUSES": [
- 1
- ],
- "TABLENAME": "ingress_pkt",
- "ID": 0,
- "TableHandle": 16777219,
- "TCAMADDRSHIFT": 0,
- "Stage": 0
- },
- {
- "DIRECTION": 1,
- "TABLETYPE": "SRAM",
- "PHYSICALBUSES": [
- 0
- ],
- "TABLENAME": "egress_pkt",
- "ID": 1,
- "TableHandle": 16777220,
- "TCAMADDRSHIFT": 0,
- "Stage": 0
- },
- {
- "DIRECTION": 0,
- "TABLETYPE": "SRAM",
- "PHYSICALBUSES": [
1
],
"TABLENAME": "ingress_port_count_table",
- "ID": 48,
+ "ID": 32,
"TableHandle": 16777217,
"TCAMADDRSHIFT": 0,
- "Stage": 3
+ "Stage": 2
},
{
"DIRECTION": 0,
@@ -21161,16 +20967,52 @@
0
],
"TABLENAME": "egress_port_count_table",
- "ID": 49,
+ "ID": 33,
"TableHandle": 16777218,
"TCAMADDRSHIFT": 0,
- "Stage": 3
+ "Stage": 2
+ },
+ {
+ "DIRECTION": 0,
+ "TABLETYPE": "SRAM",
+ "PHYSICALBUSES": [
+ 14
+ ],
+ "TABLENAME": "ecmp_group_table",
+ "ID": 16,
+ "TableHandle": 16777221,
+ "TCAMADDRSHIFT": 0,
+ "Stage": 1
+ },
+ {
+ "DIRECTION": 0,
+ "TABLETYPE": "TCAM",
+ "PHYSICALBUSES": [
+ 0
+ ],
+ "TABLENAME": "table0",
+ "ID": 0,
+ "TableHandle": 16777220,
+ "TCAMADDRSHIFT": 1,
+ "Stage": 0
+ },
+ {
+ "DIRECTION": 0,
+ "TABLETYPE": "SRAM",
+ "PHYSICALBUSES": [
+ 1
+ ],
+ "TABLENAME": "process_packet_out_table",
+ "ID": 1,
+ "TableHandle": 16777219,
+ "TCAMADDRSHIFT": 0,
+ "Stage": 0
}
]
},
"AlpmFormat": [],
"DefaultEntryFormat": {
- "TotalTables": 6,
+ "TotalTables": 5,
"DefaultEntries": [
{
"TotalActionFields": 0,
@@ -21190,7 +21032,7 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 49,
+ "next_tbl": 33,
"act_name": "reset_default_action"
}
},
@@ -21208,7 +21050,7 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 49,
+ "next_tbl": 33,
"act_name": "count_ingress"
}
}
@@ -21225,7 +21067,7 @@
"SelectorCount": 0,
"TableHandle": 16777217,
"LogicalId": 0,
- "Stage": 3
+ "Stage": 2
},
{
"TotalActionFields": 0,
@@ -21280,7 +21122,7 @@
"SelectorCount": 0,
"TableHandle": 16777218,
"LogicalId": 1,
- "Stage": 3
+ "Stage": 2
},
{
"TotalActionFields": 0,
@@ -21300,14 +21142,14 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 16,
+ "next_tbl": 32,
"act_name": "reset_default_action"
}
},
{
"ActionHandle": 536870919,
"ActionFunction": {
- "instr": 65,
+ "instr": 69,
"OVERRIDE_STAT_FULL_ADDR": 0,
"OVERRIDE_METER_ADDR_PFE": false,
"OVERRIDE_STAT_ADDR_PFE": false,
@@ -21318,8 +21160,8 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 16,
- "act_name": "_packet_out"
+ "next_tbl": 32,
+ "act_name": "_process_packet_out"
}
}
],
@@ -21334,61 +21176,6 @@
"TotalActionHandles": 2,
"SelectorCount": 0,
"TableHandle": 16777219,
- "LogicalId": 0,
- "Stage": 0
- },
- {
- "TotalActionFields": 0,
- "Actions": [
- {
- "ActionHandle": 0,
- "ActionFunction": {
- "instr": 0,
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "OVERRIDE_STAT_ADDR": false,
- "tbl_name": "None",
- "OVERRIDE_STATEFUL_ADDR": false,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "tbl_mask": 0,
- "OVERRIDE_METER_ADDR": false,
- "next_tbl": 255,
- "act_name": "reset_default_action"
- }
- },
- {
- "ActionHandle": 536870922,
- "ActionFunction": {
- "instr": 65,
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "OVERRIDE_STAT_ADDR": false,
- "OVERRIDE_STATEFUL_ADDR": false,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "tbl_mask": 0,
- "OVERRIDE_METER_ADDR": false,
- "next_tbl": 255,
- "act_name": "add_packet_in_hdr"
- }
- }
- ],
- "Immediate": [
- {
- "ActionHandle": 0
- },
- {
- "ActionHandle": 536870922
- }
- ],
- "TotalActionHandles": 2,
- "SelectorCount": 0,
- "TableHandle": 16777220,
"LogicalId": 1,
"Stage": 0
},
@@ -21396,26 +21183,7 @@
"TotalActionFields": 0,
"Actions": [
{
- "ActionHandle": 0,
- "ActionFunction": {
- "instr": 0,
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "OVERRIDE_STAT_ADDR": false,
- "tbl_name": "None",
- "OVERRIDE_STATEFUL_ADDR": false,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "tbl_mask": 1,
- "OVERRIDE_METER_ADDR": false,
- "next_tbl": 48,
- "act_name": "reset_default_action"
- }
- },
- {
- "ActionHandle": 536870929,
+ "ActionHandle": 536870928,
"ActionFunction": {
"instr": 67,
"OVERRIDE_STAT_FULL_ADDR": 0,
@@ -21428,30 +21196,12 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 1,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 48,
+ "next_tbl": 32,
"act_name": "send_to_cpu"
}
},
{
- "ActionHandle": 536870931,
- "ActionFunction": {
- "instr": 68,
- "OVERRIDE_STAT_FULL_ADDR": 0,
- "OVERRIDE_METER_ADDR_PFE": false,
- "OVERRIDE_STAT_ADDR_PFE": false,
- "OVERRIDE_STATEFUL_ADDR_PFE": false,
- "OVERRIDE_METER_FULL_ADDR": 0,
- "OVERRIDE_STAT_ADDR": false,
- "OVERRIDE_STATEFUL_ADDR": false,
- "OVERRIDE_STATEFUL_FULL_ADDR": 0,
- "tbl_mask": 1,
- "OVERRIDE_METER_ADDR": false,
- "next_tbl": 48,
- "act_name": "_drop"
- }
- },
- {
- "ActionHandle": 536870924,
+ "ActionHandle": 536870921,
"ActionFunction": {
"instr": 65,
"OVERRIDE_STAT_FULL_ADDR": 0,
@@ -21464,12 +21214,30 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 1,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 48,
+ "next_tbl": 32,
"act_name": "set_egress_port"
}
},
{
- "ActionHandle": 536870927,
+ "ActionHandle": 536870930,
+ "ActionFunction": {
+ "instr": 68,
+ "OVERRIDE_STAT_FULL_ADDR": 0,
+ "OVERRIDE_METER_ADDR_PFE": false,
+ "OVERRIDE_STAT_ADDR_PFE": false,
+ "OVERRIDE_STATEFUL_ADDR_PFE": false,
+ "OVERRIDE_METER_FULL_ADDR": 0,
+ "OVERRIDE_STAT_ADDR": false,
+ "OVERRIDE_STATEFUL_ADDR": false,
+ "OVERRIDE_STATEFUL_FULL_ADDR": 0,
+ "tbl_mask": 1,
+ "OVERRIDE_METER_ADDR": false,
+ "next_tbl": 32,
+ "act_name": "_drop"
+ }
+ },
+ {
+ "ActionHandle": 536870924,
"ActionFunction": {
"instr": 66,
"OVERRIDE_STAT_FULL_ADDR": 0,
@@ -21482,33 +21250,52 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 1,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 32,
+ "next_tbl": 16,
"act_name": "ecmp_group"
}
+ },
+ {
+ "ActionHandle": 0,
+ "ActionFunction": {
+ "instr": 0,
+ "OVERRIDE_STAT_FULL_ADDR": 0,
+ "OVERRIDE_METER_ADDR_PFE": false,
+ "OVERRIDE_STAT_ADDR_PFE": false,
+ "OVERRIDE_STATEFUL_ADDR_PFE": false,
+ "OVERRIDE_METER_FULL_ADDR": 0,
+ "OVERRIDE_STAT_ADDR": false,
+ "tbl_name": "None",
+ "OVERRIDE_STATEFUL_ADDR": false,
+ "OVERRIDE_STATEFUL_FULL_ADDR": 0,
+ "tbl_mask": 1,
+ "OVERRIDE_METER_ADDR": false,
+ "next_tbl": 32,
+ "act_name": "reset_default_action"
+ }
}
],
"Immediate": [
{
- "ActionHandle": 0
+ "ActionHandle": 536870928
},
{
- "ActionHandle": 536870929
+ "ActionHandle": 536870921
},
{
- "ActionHandle": 536870931
+ "ActionHandle": 536870930
},
{
"ActionHandle": 536870924
},
{
- "ActionHandle": 536870927
+ "ActionHandle": 0
}
],
"TotalActionHandles": 5,
"SelectorCount": 0,
- "TableHandle": 16777221,
+ "TableHandle": 16777220,
"LogicalId": 0,
- "Stage": 1
+ "Stage": 0
},
{
"TotalActionFields": 1,
@@ -21528,12 +21315,12 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 48,
+ "next_tbl": 32,
"act_name": "reset_default_action"
}
},
{
- "ActionHandle": 536870933,
+ "ActionHandle": 536870932,
"ActionFunction": {
"instr": 65,
"OVERRIDE_STAT_FULL_ADDR": 0,
@@ -21546,7 +21333,7 @@
"OVERRIDE_STATEFUL_FULL_ADDR": 0,
"tbl_mask": 0,
"OVERRIDE_METER_ADDR": false,
- "next_tbl": 48,
+ "next_tbl": 32,
"act_name": "set_egress_port"
}
}
@@ -21556,7 +21343,7 @@
"ActionHandle": 0
},
{
- "ActionHandle": 536870933,
+ "ActionHandle": 536870932,
"ActionFunctionFields": [
{
"DSTSTART": 0,
@@ -21573,9 +21360,9 @@
],
"TotalActionHandles": 2,
"SelectorCount": 0,
- "TableHandle": 16777222,
+ "TableHandle": 16777221,
"LogicalId": 0,
- "Stage": 2
+ "Stage": 1
}
]
}
@@ -21593,7 +21380,8 @@
"6": "default_parser",
"7": "parse_pkt_out",
"8": "<POV initialization>_<Ingress intrinsic metadata>_<Phase 0>",
- "9": "start"
+ "9": "start",
+ "10": "parse_tcp//spilled"
},
"parser_value_set": []
},
@@ -21607,7 +21395,7 @@
"4": "parse_udp",
"5": "default_parser",
"6": "parse_pkt_out",
- "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"8": "parse_pkt_in"
},
"parser_value_set": []
@@ -21623,7 +21411,7 @@
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "match_with_no_key",
"number_entries": 1,
"pack_format_length": 1,
@@ -21646,7 +21434,7 @@
"stage_table_type_handle": 0,
"stage_idletime_table": null,
"stage_gateway_table": {
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "gateway",
"number_entries": 0,
"pack_format_length": 0,
@@ -21759,12 +21547,12 @@
"536870914": {
"next_table_address_to_use": 0,
"action_name": "count_ingress",
- "next_table_full_address": 49,
+ "next_table_full_address": 33,
"next_table_name": "egress_port_count_table"
}
},
"default_next_table_modifiable": false,
- "default_next_table": 49,
+ "default_next_table": 33,
"action_to_immediate_mapping": {
"536870914": [
[]
@@ -21882,7 +21670,7 @@
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "match_with_no_key",
"number_entries": 1,
"pack_format_length": 1,
@@ -21905,7 +21693,7 @@
"stage_table_type_handle": 1,
"stage_idletime_table": null,
"stage_gateway_table": {
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "gateway",
"number_entries": 0,
"pack_format_length": 0,
@@ -22116,7 +21904,7 @@
"ap_bind_indirect_res_to_match": []
},
{
- "name": "ingress_pkt",
+ "name": "process_packet_out_table",
"handle": 16777219,
"direction": "ingress",
"number_entries": 1024,
@@ -22142,7 +21930,7 @@
}
],
"memory_resource_allocation": null,
- "stage_table_handle": 0,
+ "stage_table_handle": 1,
"stage_table_type_handle": 0,
"stage_idletime_table": null,
"stage_gateway_table": {
@@ -22173,10 +21961,8 @@
16
]
],
- "match_group_key_bit_width": 8,
- "match_group_phv_bit_scrambling": {
- "--validity_check--packet_out_hdr[0]": 9
- },
+ "match_group_key_bit_width": 0,
+ "match_group_phv_bit_scrambling": {},
"match_group_match_bit_scrambling": {},
"seed": [
0,
@@ -22235,14 +22021,14 @@
"hash_match_group_id_for_hash_bits": 0,
"hash_match_group_id_for_data_bits": 0
},
- "use_condition_from_program": true
+ "use_condition_from_program": false
},
"match_group_resource_allocation": [],
"vliw_resource_allocation": {
"536870919": {
- "address_to_use": 1,
- "full_address": 65,
- "vliw_instruction_number": 0,
+ "address_to_use": 0,
+ "full_address": 69,
+ "vliw_instruction_number": 2,
"color": 1,
"direction": "ingress"
}
@@ -22250,13 +22036,13 @@
"action_to_next_table_mapping": {
"536870919": {
"next_table_address_to_use": 0,
- "action_name": "_packet_out",
- "next_table_full_address": 16,
- "next_table_name": "_condition_1"
+ "action_name": "_process_packet_out",
+ "next_table_full_address": 32,
+ "next_table_name": "_condition_2"
}
},
"default_next_table_modifiable": false,
- "default_next_table": 16,
+ "default_next_table": 32,
"action_to_immediate_mapping": {
"536870919": [
[]
@@ -22267,19 +22053,11 @@
],
"match_key_fields": [],
"match_fields_type_dictionary": {},
- "gateway_fields": [
- {
- "name": "--validity_check--packet_out_hdr",
- "start_offset": 0,
- "start_bit": 0,
- "bit_width": 1,
- "range_field": false
- }
- ],
+ "gateway_fields": [],
"preferred_match_type": "exact",
"actions": [
{
- "name": "_packet_out",
+ "name": "_process_packet_out",
"handle": 536870919,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
@@ -22325,14 +22103,14 @@
"phv_word_address": 130
},
{
- "phv_word_address": 68
+ "phv_word_address": 67
}
],
"indirect_resources": []
}
],
"default_action": {
- "name": "_packet_out",
+ "name": "_process_packet_out",
"handle": 536870919,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
@@ -22378,294 +22156,7 @@
"phv_word_address": 130
},
{
- "phv_word_address": 68
- }
- ]
- },
- "default_action_parameters": {},
- "default_only_action": null,
- "p4_action_data_tables": [],
- "p4_statistics_tables": [],
- "p4_meter_tables": [],
- "p4_stateful_tables": [],
- "p4_selection_tables": [],
- "include_idletime": false,
- "performs_hash_action": false,
- "uses_range": false,
- "number_entries_with_ranges": 0,
- "uses_versioning": true,
- "tcam_error_detect": false,
- "dynamic_match_key_masks": false,
- "uses_static_entries": false,
- "match_type": "exact",
- "action_profile": null,
- "timeout": false,
- "ap_bind_indirect_res_to_match": []
- },
- {
- "name": "egress_pkt",
- "handle": 16777220,
- "direction": "egress",
- "number_entries": 1024,
- "stage_tables_length": 1,
- "stage_tables": [
- {
- "stage_number": 0,
- "stage_table_type": "match_with_no_key",
- "number_entries": 1,
- "pack_format_length": 1,
- "pack_format": [
- {
- "table_word_width": 0,
- "memory_word_width": 0,
- "entries_per_table_word": 1,
- "number_memory_units_per_table_word": 0,
- "entry_list": [
- {
- "entry_number": 0,
- "field_list": []
- }
- ]
- }
- ],
- "memory_resource_allocation": null,
- "stage_table_handle": 1,
- "stage_table_type_handle": 1,
- "stage_idletime_table": null,
- "stage_gateway_table": {
- "stage_number": 0,
- "stage_table_type": "gateway",
- "number_entries": 0,
- "pack_format_length": 0,
- "pack_format": [],
- "memory_resource_allocation": {
- "memory_type": "gateway",
- "memory_units_depth": 1,
- "memory_units_width": 1,
- "memory_units_and_vpns": [
- {
- "memory_units": [
- 15
- ],
- "vpns": [
- null
- ]
- }
- ]
- },
- "gateway_match_group_resource_allocation": {
- "match_groups": [
- [
- 0,
- 16
- ]
- ],
- "match_group_key_bit_width": 8,
- "match_group_phv_bit_scrambling": {
- "ig_intr_md_for_tm.copy_to_cpu[0]": 0
- },
- "match_group_match_bit_scrambling": {},
- "seed": [
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0
- ],
- "hash_match_group_id_for_hash_bits": 0,
- "hash_match_group_id_for_data_bits": 0
- },
- "use_condition_from_program": true
- },
- "match_group_resource_allocation": [],
- "vliw_resource_allocation": {
- "536870922": {
- "address_to_use": 1,
- "full_address": 65,
- "vliw_instruction_number": 0,
- "color": 1,
- "direction": "egress"
- }
- },
- "action_to_next_table_mapping": {
- "536870922": {
- "next_table_address_to_use": 0,
- "action_name": "add_packet_in_hdr",
- "next_table_full_address": 255,
- "next_table_name": "--END_OF_PIPELINE--"
- }
- },
- "default_next_table_modifiable": false,
- "default_next_table": 255,
- "action_to_immediate_mapping": {
- "536870922": [
- []
- ]
- },
- "stage_table_type_handle_type": "exact"
- }
- ],
- "match_key_fields": [],
- "match_fields_type_dictionary": {},
- "gateway_fields": [
- {
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "start_offset": 35,
- "start_bit": 0,
- "bit_width": 1,
- "range_field": false
- }
- ],
- "preferred_match_type": "exact",
- "actions": [
- {
- "name": "add_packet_in_hdr",
- "handle": 536870922,
- "allowed_to_be_default_action": true,
- "disallowed_as_default_action_reason": null,
- "override_stat_addr_pfe": false,
- "override_stat_addr": false,
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "override_meter_addr": false,
- "override_meter_full_addr": 0,
- "override_stateful_addr_pfe": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "p4_parameters": [],
- "p4_primitives": [
- {
- "handle": 536870920,
- "header_instance": "packet_in_hdr"
- },
- {
- "handle": 536870921,
- "destination_field": {
- "name": "packet_in_hdr.ingress_port",
- "start_offset": 0,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "source_value": {
- "name": "ig_intr_md.ingress_port",
- "start_offset": 7,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "mask": {
- "value": 511,
- "signed": false
- }
- }
- ],
- "stage_primitives": [
- {
- "phv_word_address": 82
- },
- {
- "phv_word_address": 145
- }
- ],
- "indirect_resources": []
- }
- ],
- "default_action": {
- "name": "add_packet_in_hdr",
- "handle": 536870922,
- "allowed_to_be_default_action": true,
- "disallowed_as_default_action_reason": null,
- "override_stat_addr_pfe": false,
- "override_stat_addr": false,
- "override_stat_full_addr": 0,
- "override_meter_addr_pfe": false,
- "override_meter_addr": false,
- "override_meter_full_addr": 0,
- "override_stateful_addr_pfe": false,
- "override_stateful_addr": false,
- "override_stateful_full_addr": 0,
- "p4_parameters": [],
- "p4_primitives": [
- {
- "handle": 536870920,
- "header_instance": "packet_in_hdr"
- },
- {
- "handle": 536870921,
- "destination_field": {
- "name": "packet_in_hdr.ingress_port",
- "start_offset": 0,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "source_value": {
- "name": "ig_intr_md.ingress_port",
- "start_offset": 7,
- "start_bit": 0,
- "bit_width": 9,
- "range_field": false
- },
- "mask": {
- "value": 511,
- "signed": false
- }
- }
- ],
- "stage_primitives": [
- {
- "phv_word_address": 82
- },
- {
- "phv_word_address": 145
+ "phv_word_address": 67
}
]
},
@@ -22691,13 +22182,13 @@
},
{
"name": "table0__action__",
- "handle": 33554437,
+ "handle": 33554436,
"direction": "ingress",
"number_entries": 512,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "action_data",
"number_entries": 8192,
"pack_format_length": 4,
@@ -22979,7 +22470,14 @@
"name": "--padding--",
"start_offset": 0,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 7,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -22991,7 +22489,14 @@
"name": "--padding--",
"start_offset": 16,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 23,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -23003,7 +22508,14 @@
"name": "--padding--",
"start_offset": 32,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 39,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -23015,7 +22527,14 @@
"name": "--padding--",
"start_offset": 48,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 55,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -23027,7 +22546,14 @@
"name": "--padding--",
"start_offset": 64,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 71,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -23039,7 +22565,14 @@
"name": "--padding--",
"start_offset": 80,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 87,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -23051,7 +22584,14 @@
"name": "--padding--",
"start_offset": 96,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 103,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -23063,7 +22603,14 @@
"name": "--padding--",
"start_offset": 112,
"start_bit": 0,
- "bit_width": 16,
+ "bit_width": 7,
+ "range_field": false
+ },
+ {
+ "name": "--constant-0--",
+ "start_offset": 119,
+ "start_bit": 0,
+ "bit_width": 9,
"range_field": false
}
]
@@ -23194,10 +22741,10 @@
"how_referenced": "direct",
"default_lower_huffman_bits_included": 2,
"action_pack_format_map": {
- "536870924": 0,
- "536870927": 1,
- "536870929": 2,
- "536870931": 3
+ "536870921": 0,
+ "536870924": 1,
+ "536870928": 2,
+ "536870930": 3
},
"action_parameter_map": {
"1": [
@@ -23253,7 +22800,7 @@
]
},
"stage_action_parameter_map": {
- "5": [
+ "3": [
{
"parameter_name": "port",
"location": "action_table",
@@ -23270,7 +22817,7 @@
"field_most_significant_bit": 8
}
],
- "6": [
+ "4": [
{
"parameter_name": "groupId",
"location": "action_table",
@@ -23287,7 +22834,24 @@
"field_most_significant_bit": 15
}
],
- "7": [
+ "6": [
+ {
+ "parameter_name": "--constant-0--",
+ "location": "action_table",
+ "parameter_least_significant_bit": 0,
+ "parameter_most_significant_bit": 8,
+ "entry_least_significant_bit": 0,
+ "entry_most_significant_bit": 8,
+ "action_slot_offset": 0,
+ "ram_entry_slot_bit_width": 16,
+ "right_shift_adjust_for_smaller_allocation": 0,
+ "constant_size": 16,
+ "constant_slot_number": 0,
+ "field_least_significant_bit": 0,
+ "field_most_significant_bit": 8
+ }
+ ],
+ "5": [
{
"parameter_name": "--hash_parameter_3--",
"location": "match_entry",
@@ -23306,17 +22870,29 @@
]
},
"action_to_constant_mapping": {
+ "536870921": [],
"536870924": [],
- "536870927": [],
- "536870929": [],
- "536870931": []
+ "536870928": [
+ {
+ "name": "--constant-0--",
+ "constant_least_significant_bit": 0,
+ "constant_most_significant_bit": 8,
+ "immediate_field_least_significant_bit": 0,
+ "immediate_field_most_significant_bit": 8,
+ "location": "action_table",
+ "type": "constant",
+ "value": 192,
+ "constant_field_called": "--constant-0--"
+ }
+ ],
+ "536870930": []
}
}
],
"actions": [
{
"name": "set_egress_port",
- "handle": 536870924,
+ "handle": 536870921,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -23342,7 +22918,7 @@
],
"p4_primitives": [
{
- "handle": 536870923,
+ "handle": 536870920,
"destination_field": {
"name": "ig_intr_md_for_tm.ucast_egress_port",
"start_offset": 7,
@@ -23374,7 +22950,7 @@
},
{
"name": "ecmp_group",
- "handle": 536870927,
+ "handle": 536870924,
"allowed_to_be_default_action": false,
"disallowed_as_default_action_reason": "USES_HASH_DIST",
"override_stat_addr_pfe": false,
@@ -23400,7 +22976,7 @@
],
"p4_primitives": [
{
- "handle": 536870925,
+ "handle": 536870922,
"destination_field": {
"name": "ecmp_metadata.groupId",
"start_offset": 0,
@@ -23424,7 +23000,7 @@
}
},
{
- "handle": 536870926,
+ "handle": 536870923,
"destination_field": {
"name": "ecmp_metadata.selector",
"start_offset": 16,
@@ -23458,7 +23034,7 @@
},
{
"name": "send_to_cpu",
- "handle": 536870929,
+ "handle": 536870928,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -23473,33 +23049,64 @@
"p4_parameters": [],
"p4_primitives": [
{
- "handle": 536870928,
+ "handle": 536870925,
"destination_field": {
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "start_offset": 35,
+ "name": "ig_intr_md_for_tm.ucast_egress_port",
+ "start_offset": 7,
"start_bit": 0,
- "bit_width": 1,
+ "bit_width": 9,
"range_field": false
},
"source_value": {
- "value": 1,
+ "value": 192,
"signed": false
},
"mask": {
- "value": 1,
+ "value": 511,
+ "signed": false
+ }
+ },
+ {
+ "handle": 536870926,
+ "header_instance": "packet_in_hdr"
+ },
+ {
+ "handle": 536870927,
+ "destination_field": {
+ "name": "packet_in_hdr.ingress_port",
+ "start_offset": 0,
+ "start_bit": 0,
+ "bit_width": 9,
+ "range_field": false
+ },
+ "source_value": {
+ "name": "ig_intr_md.ingress_port",
+ "start_offset": 7,
+ "start_bit": 0,
+ "bit_width": 9,
+ "range_field": false
+ },
+ "mask": {
+ "value": 511,
"signed": false
}
}
],
"stage_primitives": [
{
- "phv_word_address": 64
+ "phv_word_address": 130
+ },
+ {
+ "phv_word_address": 67
+ },
+ {
+ "phv_word_address": 129
}
]
},
{
"name": "_drop",
- "handle": 536870931,
+ "handle": 536870930,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -23514,13 +23121,13 @@
"p4_parameters": [],
"p4_primitives": [
{
- "handle": 536870930,
+ "handle": 536870929,
"table_direction": "ingress"
}
],
"stage_primitives": [
{
- "phv_word_address": 69
+ "phv_word_address": 68
}
]
}
@@ -23535,13 +23142,13 @@
},
{
"name": "table0",
- "handle": 16777221,
+ "handle": 16777220,
"direction": "ingress",
"number_entries": 512,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_match",
"number_entries": 512,
"pack_format_length": 0,
@@ -23734,7 +23341,7 @@
"stage_table_handle": 0,
"stage_table_type_handle": 0,
"stage_idletime_table": {
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "idletime",
"number_entries": 2048,
"pack_format_length": 1,
@@ -23815,7 +23422,7 @@
"idletime_per_flow_idletime": true
},
"stage_gateway_table": {
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "gateway",
"number_entries": 0,
"pack_format_length": 0,
@@ -24180,28 +23787,28 @@
}
],
"vliw_resource_allocation": {
- "536870924": {
+ "536870921": {
"address_to_use": 9,
"full_address": 65,
"vliw_instruction_number": 0,
"color": 1,
"direction": "ingress"
},
- "536870927": {
+ "536870924": {
"address_to_use": 10,
"full_address": 66,
"vliw_instruction_number": 1,
"color": 0,
"direction": "ingress"
},
- "536870929": {
+ "536870928": {
"address_to_use": 11,
"full_address": 67,
"vliw_instruction_number": 1,
"color": 1,
"direction": "ingress"
},
- "536870931": {
+ "536870930": {
"address_to_use": 12,
"full_address": 68,
"vliw_instruction_number": 2,
@@ -24210,48 +23817,48 @@
}
},
"action_to_next_table_mapping": {
- "536870924": {
+ "536870921": {
"next_table_address_to_use": 0,
"action_name": "set_egress_port",
- "next_table_full_address": 48,
+ "next_table_full_address": 32,
"next_table_name": "_condition_2"
},
- "536870927": {
+ "536870924": {
"next_table_address_to_use": 1,
"action_name": "ecmp_group",
- "next_table_full_address": 32,
+ "next_table_full_address": 16,
"next_table_name": "ecmp_group_table"
},
- "536870929": {
+ "536870928": {
"next_table_address_to_use": 0,
"action_name": "send_to_cpu",
- "next_table_full_address": 48,
+ "next_table_full_address": 32,
"next_table_name": "_condition_2"
},
- "536870931": {
+ "536870930": {
"next_table_address_to_use": 0,
"action_name": "_drop",
- "next_table_full_address": 48,
+ "next_table_full_address": 32,
"next_table_name": "_condition_2"
}
},
- "default_next_table": 48,
+ "default_next_table": 32,
"action_to_immediate_mapping": {
+ "536870921": [
+ []
+ ],
"536870924": [
[]
],
- "536870927": [
+ "536870928": [
[]
],
- "536870929": [
- []
- ],
- "536870931": [
+ "536870930": [
[]
]
},
"ternary_indirection_table": {
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "ternary_indirection",
"number_entries": 16384,
"pack_format_length": 1,
@@ -24748,7 +24355,7 @@
"actions": [
{
"name": "set_egress_port",
- "handle": 536870924,
+ "handle": 536870921,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -24774,7 +24381,7 @@
],
"p4_primitives": [
{
- "handle": 536870923,
+ "handle": 536870920,
"destination_field": {
"name": "ig_intr_md_for_tm.ucast_egress_port",
"start_offset": 7,
@@ -24807,7 +24414,7 @@
},
{
"name": "ecmp_group",
- "handle": 536870927,
+ "handle": 536870924,
"allowed_to_be_default_action": false,
"disallowed_as_default_action_reason": "USES_HASH_DIST",
"override_stat_addr_pfe": false,
@@ -24833,7 +24440,7 @@
],
"p4_primitives": [
{
- "handle": 536870925,
+ "handle": 536870922,
"destination_field": {
"name": "ecmp_metadata.groupId",
"start_offset": 0,
@@ -24857,7 +24464,7 @@
}
},
{
- "handle": 536870926,
+ "handle": 536870923,
"destination_field": {
"name": "ecmp_metadata.selector",
"start_offset": 16,
@@ -24892,7 +24499,7 @@
},
{
"name": "send_to_cpu",
- "handle": 536870929,
+ "handle": 536870928,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -24907,34 +24514,65 @@
"p4_parameters": [],
"p4_primitives": [
{
- "handle": 536870928,
+ "handle": 536870925,
"destination_field": {
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "start_offset": 35,
+ "name": "ig_intr_md_for_tm.ucast_egress_port",
+ "start_offset": 7,
"start_bit": 0,
- "bit_width": 1,
+ "bit_width": 9,
"range_field": false
},
"source_value": {
- "value": 1,
+ "value": 192,
"signed": false
},
"mask": {
- "value": 1,
+ "value": 511,
+ "signed": false
+ }
+ },
+ {
+ "handle": 536870926,
+ "header_instance": "packet_in_hdr"
+ },
+ {
+ "handle": 536870927,
+ "destination_field": {
+ "name": "packet_in_hdr.ingress_port",
+ "start_offset": 0,
+ "start_bit": 0,
+ "bit_width": 9,
+ "range_field": false
+ },
+ "source_value": {
+ "name": "ig_intr_md.ingress_port",
+ "start_offset": 7,
+ "start_bit": 0,
+ "bit_width": 9,
+ "range_field": false
+ },
+ "mask": {
+ "value": 511,
"signed": false
}
}
],
"stage_primitives": [
{
- "phv_word_address": 64
+ "phv_word_address": 130
+ },
+ {
+ "phv_word_address": 67
+ },
+ {
+ "phv_word_address": 129
}
],
"indirect_resources": []
},
{
"name": "_drop",
- "handle": 536870931,
+ "handle": 536870930,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -24949,13 +24587,13 @@
"p4_parameters": [],
"p4_primitives": [
{
- "handle": 536870930,
+ "handle": 536870929,
"table_direction": "ingress"
}
],
"stage_primitives": [
{
- "phv_word_address": 69
+ "phv_word_address": 68
}
],
"indirect_resources": []
@@ -24967,7 +24605,7 @@
"p4_action_data_tables": [
{
"name": "table0__action__",
- "handle_reference": 33554437,
+ "handle_reference": 33554436,
"how_referenced": "direct"
}
],
@@ -24996,13 +24634,13 @@
},
{
"name": "ecmp_group_table",
- "handle": 16777222,
+ "handle": 16777221,
"direction": "ingress",
"number_entries": 1024,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_match",
"number_entries": 3072,
"pack_format_length": 1,
@@ -25197,7 +24835,7 @@
}
],
"vliw_resource_allocation": {
- "536870933": {
+ "536870932": {
"address_to_use": 0,
"full_address": 65,
"vliw_instruction_number": 0,
@@ -25206,17 +24844,17 @@
}
},
"action_to_next_table_mapping": {
- "536870933": {
+ "536870932": {
"next_table_address_to_use": 0,
"action_name": "set_egress_port",
- "next_table_full_address": 48,
+ "next_table_full_address": 32,
"next_table_name": "_condition_2"
}
},
"default_next_table_modifiable": false,
- "default_next_table": 48,
+ "default_next_table": 32,
"action_to_immediate_mapping": {
- "536870933": [
+ "536870932": [
[
{
"name": "port",
@@ -25236,7 +24874,7 @@
"number_hash_ways": 3,
"way_stage_tables": [
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_way",
"number_entries": 1024,
"pack_format_length": 1,
@@ -25320,7 +24958,7 @@
"stash_resource_allocation": null
},
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_way",
"number_entries": 1024,
"pack_format_length": 1,
@@ -25404,7 +25042,7 @@
"stash_resource_allocation": null
},
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "hash_way",
"number_entries": 1024,
"pack_format_length": 1,
@@ -25941,7 +25579,7 @@
"actions": [
{
"name": "set_egress_port",
- "handle": 536870933,
+ "handle": 536870932,
"allowed_to_be_default_action": true,
"disallowed_as_default_action_reason": null,
"override_stat_addr_pfe": false,
@@ -25967,7 +25605,7 @@
],
"p4_primitives": [
{
- "handle": 536870932,
+ "handle": 536870931,
"destination_field": {
"name": "ig_intr_md_for_tm.ucast_egress_port",
"start_offset": 7,
@@ -26030,11 +25668,11 @@
"name": "ingress_port_counter",
"handle": 67108865,
"direction": "ingress",
- "number_entries": 254,
+ "number_entries": 510,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "statistics",
"number_entries": 4096,
"pack_format_length": 1,
@@ -26138,11 +25776,11 @@
"name": "egress_port_counter",
"handle": 67108866,
"direction": "ingress",
- "number_entries": 254,
+ "number_entries": 510,
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 3,
+ "stage_number": 2,
"stage_table_type": "statistics",
"number_entries": 4096,
"pack_format_length": 1,
@@ -26250,7 +25888,7 @@
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 1,
+ "stage_number": 0,
"stage_table_type": "statistics",
"number_entries": 4096,
"pack_format_length": 1,
@@ -26358,7 +25996,7 @@
"stage_tables_length": 1,
"stage_tables": [
{
- "stage_number": 2,
+ "stage_number": 1,
"stage_table_type": "statistics",
"number_entries": 4096,
"pack_format_length": 1,
@@ -26469,7 +26107,6 @@
"ipv4_flags": 1,
"ig_intr_md_ingress_port": 2,
"ipv4_hdrChecksum": 2,
- "ig_intr_md_for_tm_copy_to_cpu": 1,
"tcp_ecn": 1,
"ipv4_srcAddr": 4,
"udp_length_": 2,
@@ -26509,9 +26146,7 @@
"ipv4_fragOffset": 2,
"eg_intr_md_egress_cos": 1,
"ipv4_flags": 1,
- "ig_intr_md_ingress_port": 2,
"ipv4_hdrChecksum": 2,
- "ig_intr_md_for_tm_copy_to_cpu": 1,
"tcp_ecn": 1,
"ipv4_srcAddr": 4,
"udp_length_": 2,
@@ -26543,7 +26178,7 @@
},
{
"0": {
- "68": {
+ "67": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
@@ -26553,7 +26188,7 @@
}
},
"1": {
- "82": {
+ "81": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/p4_name_lookup.json b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/p4_name_lookup.json
index 275d643..713c01d 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/p4_name_lookup.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/p4_name_lookup.json
@@ -11,13 +11,14 @@
"6": "default_parser",
"7": "parse_pkt_out",
"8": "<POV initialization>",
- "9": "start"
+ "9": "start",
+ "10": "parse_tcp"
},
"pov": {
"0": {
"0": "--pov_reserved--_0"
},
- "68": {
+ "67": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
@@ -40,7 +41,7 @@
"8": "parse_pkt_in"
},
"pov": {
- "82": {
+ "81": {
"0": "packet_in_hdr",
"1": "packet_out_hdr",
"2": "ethernet",
@@ -60,15 +61,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -77,218 +76,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
- },
- "logical_tables": {
- "0": {
- "actions": {
- "_packet_out": {
- "direction": 0,
- "primitives": [
- {
- "dst": {
- "name": "ig_intr_md_for_tm.ucast_egress_port",
- "phv_allocation": [
- {
- "field_instance_least_significant_bit": 0,
- "field_instance_most_significant_bit": 8,
- "phv_container_least_significant_bit": 0,
- "phv_container_most_significant_bit": 8,
- "word_address": 130
- }
- ],
- "type": "phv"
- },
- "name": "ModifyFieldPrimitive",
- "src": [
- {
- "name": "packet_out_hdr.egress_port",
- "phv_allocation": [
- {
- "field_instance_least_significant_bit": 0,
- "field_instance_most_significant_bit": 8,
- "phv_container_least_significant_bit": 7,
- "phv_container_most_significant_bit": 15,
- "word_address": 129
- }
- ],
- "type": "phv"
- }
- ]
- },
- {
- "dst": {
- "name": "packet_out_hdr",
- "type": "header"
- },
- "name": "RemoveHeaderPrimitive"
- }
- ],
- "table_name": "ingress_pkt"
- }
- },
- "instruction_addresses": {
- "65": "_packet_out"
- },
- "match_fields": {},
- "table_name": "ingress_pkt"
- },
- "1": {
- "actions": {
- "add_packet_in_hdr": {
- "direction": 1,
- "primitives": [
- {
- "dst": {
- "name": "packet_in_hdr",
- "type": "header"
- },
- "name": "AddHeaderPrimitive"
- },
- {
- "dst": {
- "name": "packet_in_hdr.ingress_port",
- "phv_allocation": [
- {
- "field_instance_least_significant_bit": 0,
- "field_instance_most_significant_bit": 8,
- "phv_container_least_significant_bit": 7,
- "phv_container_most_significant_bit": 15,
- "word_address": 145
- }
- ],
- "type": "phv"
- },
- "name": "ModifyFieldPrimitive",
- "src": [
- {
- "name": "ig_intr_md.ingress_port",
- "phv_allocation": [
- {
- "field_instance_least_significant_bit": 0,
- "field_instance_most_significant_bit": 8,
- "phv_container_least_significant_bit": 0,
- "phv_container_most_significant_bit": 8,
- "word_address": 144
- }
- ],
- "type": "phv"
- }
- ]
- }
- ],
- "table_name": "egress_pkt"
- }
- },
- "instruction_addresses": {
- "65": "add_packet_in_hdr"
- },
- "match_fields": {},
- "table_name": "egress_pkt"
- }
- },
- "stateful_tables": []
- },
- "1": {
- "containers": {
- "0": "I [POV[31:0]]",
- "1": "I [ipv4.protocol, ipv4.hdrChecksum, ipv4.srcAddr[31:24]]",
- "2": "I [ipv4.dstAddr]",
- "3": "I [ethernet.dstAddr[39:8]]",
- "4": "I [ethernet.srcAddr[31:0]]",
- "5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
- "128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
- "129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "130": "I [ig_intr_md_for_tm.ucast_egress_port]",
- "131": "I [ipv4.srcAddr[15:0]]",
- "132": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "133": "I [ethernet.etherType]",
- "134": "I [ecmp_metadata.groupId]",
- "135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
- "256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
- "288": "I [ipv4.version, ipv4.ihl]",
- "289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
- "290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
- "320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
- "321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {
"0": {
@@ -351,14 +176,14 @@
"primitives": [
{
"dst": {
- "name": "ig_intr_md_for_tm.copy_to_cpu",
+ "name": "ig_intr_md_for_tm.ucast_egress_port",
"phv_allocation": [
{
"field_instance_least_significant_bit": 0,
- "field_instance_most_significant_bit": 0,
+ "field_instance_most_significant_bit": 8,
"phv_container_least_significant_bit": 0,
- "phv_container_most_significant_bit": 0,
- "word_address": 64
+ "phv_container_most_significant_bit": 8,
+ "word_address": 130
}
],
"type": "phv"
@@ -366,10 +191,48 @@
"name": "ModifyFieldPrimitive",
"src": [
{
- "name": 1,
+ "name": 192,
"type": "immediate"
}
]
+ },
+ {
+ "dst": {
+ "name": "packet_in_hdr",
+ "type": "header"
+ },
+ "name": "AddHeaderPrimitive"
+ },
+ {
+ "dst": {
+ "name": "packet_in_hdr.ingress_port",
+ "phv_allocation": [
+ {
+ "field_instance_least_significant_bit": 0,
+ "field_instance_most_significant_bit": 8,
+ "phv_container_least_significant_bit": 7,
+ "phv_container_most_significant_bit": 15,
+ "word_address": 129
+ }
+ ],
+ "type": "phv"
+ },
+ "name": "ModifyFieldPrimitive",
+ "src": [
+ {
+ "name": "ig_intr_md.ingress_port",
+ "phv_allocation": [
+ {
+ "field_instance_least_significant_bit": 0,
+ "field_instance_most_significant_bit": 8,
+ "phv_container_least_significant_bit": 0,
+ "phv_container_most_significant_bit": 8,
+ "word_address": 128
+ }
+ ],
+ "type": "phv"
+ }
+ ]
}
],
"table_name": "table0"
@@ -416,7 +279,7 @@
"field_instance_most_significant_bit": 47,
"phv_container_least_significant_bit": 0,
"phv_container_most_significant_bit": 7,
- "word_address": 66
+ "word_address": 65
},
{
"field_instance_least_significant_bit": 8,
@@ -455,7 +318,7 @@
"field_instance_most_significant_bit": 39,
"phv_container_least_significant_bit": 0,
"phv_container_most_significant_bit": 7,
- "word_address": 67
+ "word_address": 66
},
{
"field_instance_least_significant_bit": 0,
@@ -476,11 +339,64 @@
]
},
"table_name": "table0"
+ },
+ "1": {
+ "actions": {
+ "_process_packet_out": {
+ "direction": 0,
+ "primitives": [
+ {
+ "dst": {
+ "name": "ig_intr_md_for_tm.ucast_egress_port",
+ "phv_allocation": [
+ {
+ "field_instance_least_significant_bit": 0,
+ "field_instance_most_significant_bit": 8,
+ "phv_container_least_significant_bit": 0,
+ "phv_container_most_significant_bit": 8,
+ "word_address": 130
+ }
+ ],
+ "type": "phv"
+ },
+ "name": "ModifyFieldPrimitive",
+ "src": [
+ {
+ "name": "packet_out_hdr.egress_port",
+ "phv_allocation": [
+ {
+ "field_instance_least_significant_bit": 0,
+ "field_instance_most_significant_bit": 8,
+ "phv_container_least_significant_bit": 7,
+ "phv_container_most_significant_bit": 15,
+ "word_address": 129
+ }
+ ],
+ "type": "phv"
+ }
+ ]
+ },
+ {
+ "dst": {
+ "name": "packet_out_hdr",
+ "type": "header"
+ },
+ "name": "RemoveHeaderPrimitive"
+ }
+ ],
+ "table_name": "process_packet_out_table"
+ }
+ },
+ "instruction_addresses": {
+ "69": "_process_packet_out"
+ },
+ "match_fields": {},
+ "table_name": "process_packet_out_table"
}
},
"stateful_tables": []
},
- "2": {
+ "1": {
"containers": {
"0": "I [POV[31:0]]",
"1": "I [ipv4.protocol, ipv4.hdrChecksum, ipv4.srcAddr[31:24]]",
@@ -488,15 +404,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -505,44 +419,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {
"0": {
@@ -604,7 +518,7 @@
},
"stateful_tables": []
},
- "3": {
+ "2": {
"containers": {
"0": "I [POV[31:0]]",
"1": "I [ipv4.protocol, ipv4.hdrChecksum, ipv4.srcAddr[31:24]]",
@@ -612,15 +526,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -629,44 +541,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {
"0": {
@@ -716,7 +628,7 @@
},
"stateful_tables": []
},
- "4": {
+ "3": {
"containers": {
"0": "I [POV[31:0]]",
"1": "I [ipv4.protocol, ipv4.hdrChecksum, ipv4.srcAddr[31:24]]",
@@ -724,15 +636,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -741,44 +651,109 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
+ },
+ "logical_tables": {},
+ "stateful_tables": []
+ },
+ "4": {
+ "containers": {
+ "0": "I [POV[31:0]]",
+ "1": "I [ipv4.protocol, ipv4.hdrChecksum, ipv4.srcAddr[31:24]]",
+ "2": "I [ipv4.dstAddr]",
+ "3": "I [ethernet.dstAddr[39:8]]",
+ "4": "I [ethernet.srcAddr[31:0]]",
+ "5": "I [udp.srcPort, udp.dstPort]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
+ "128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
+ "129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
+ "130": "I [ig_intr_md_for_tm.ucast_egress_port]",
+ "131": "I [ipv4.srcAddr[15:0]]",
+ "132": "I [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "133": "I [ethernet.etherType]",
+ "134": "I [ecmp_metadata.groupId]",
+ "135": "I [ecmp_metadata.selector]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
+ "288": "I [ipv4.version, ipv4.ihl]",
+ "289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
+ "290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
+ "320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
+ "321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -791,15 +766,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -808,44 +781,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -858,15 +831,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -875,44 +846,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -925,15 +896,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -942,44 +911,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -992,15 +961,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -1009,44 +976,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -1059,15 +1026,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -1076,44 +1041,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -1126,15 +1091,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -1143,44 +1106,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
@@ -1193,15 +1156,13 @@
"3": "I [ethernet.dstAddr[39:8]]",
"4": "I [ethernet.srcAddr[31:0]]",
"5": "I [udp.srcPort, udp.dstPort]",
- "64": "I [ig_intr_md_for_tm.copy_to_cpu]",
- "65": "I [ipv4.srcAddr[23:16]]",
- "66": "I [ethernet.dstAddr[47:40]]",
- "67": "I [ethernet.srcAddr[39:32]]",
- "68": "I [POV[39:32]]",
- "69": "I [ig_intr_md_for_tm.drop_ctl]",
- "80": "E [ig_intr_md_for_tm.copy_to_cpu]",
- "81": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
- "82": "E [POV[7:0]]",
+ "64": "I [ipv4.srcAddr[23:16]]",
+ "65": "I [ethernet.dstAddr[47:40]]",
+ "66": "I [ethernet.srcAddr[39:32]]",
+ "67": "I [POV[39:32]]",
+ "68": "I [ig_intr_md_for_tm.drop_ctl]",
+ "80": "E [eg_intr_md._pad7, eg_intr_md.egress_cos]",
+ "81": "E [POV[7:0]]",
"128": "I [ig_intr_md.resubmit_flag, ig_intr_md._pad1, ig_intr_md._pad2, ig_intr_md._pad3, ig_intr_md.ingress_port]",
"129": "I [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]",
"130": "I [ig_intr_md_for_tm.ucast_egress_port]",
@@ -1210,44 +1171,44 @@
"133": "I [ethernet.etherType]",
"134": "I [ecmp_metadata.groupId]",
"135": "I [ecmp_metadata.selector]",
- "144": "E [ig_intr_md.ingress_port]",
- "145": "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]",
- "146": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
+ "144": "E [eg_intr_md._pad0, eg_intr_md.egress_port]",
"256": "I [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]",
- "257": "I [tcp.ackNo]",
- "258": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "259": "I [tcp.checksum, tcp.urgentPtr]",
- "260": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
- "261": "E [ipv4.srcAddr]",
- "262": "E [ipv4.dstAddr]",
- "263": "E [tcp.ackNo, udp.length_, udp.checksum]",
- "264": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
- "265": "E [tcp.checksum, tcp.urgentPtr]",
- "266": "E [ethernet.dstAddr[39:8]]",
- "267": "E [ethernet.srcAddr[31:0]]",
+ "257": "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "258": "I [tcp.checksum, tcp.urgentPtr]",
+ "264": "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]",
+ "265": "E [ipv4.srcAddr]",
+ "266": "E [ipv4.dstAddr]",
+ "267": "E [tcp.ackNo, udp.length_, udp.checksum]",
+ "268": "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]",
+ "269": "E [tcp.checksum, tcp.urgentPtr]",
+ "270": "E [ethernet.dstAddr[39:8]]",
+ "271": "E [ethernet.srcAddr[31:0]]",
"288": "I [ipv4.version, ipv4.ihl]",
"289": "I [tcp.srcPort[15:8], udp.length_[15:8]]",
"290": "I [tcp.srcPort[7:0], udp.length_[7:0]]",
- "292": "E [ipv4.version, ipv4.ihl]",
- "293": "E [ipv4.diffserv]",
- "294": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
- "295": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
- "296": "E [ethernet.dstAddr[47:40]]",
- "297": "E [ethernet.srcAddr[39:32]]",
+ "291": "I [tcp.dstPort[15:8]]",
+ "292": "I [tcp.dstPort[7:0]]",
+ "296": "E [ipv4.version, ipv4.ihl]",
+ "297": "E [ipv4.diffserv]",
+ "298": "E [tcp.srcPort[15:8], udp.srcPort[15:8]]",
+ "299": "E [tcp.srcPort[7:0], udp.srcPort[7:0]]",
+ "300": "E [ethernet.dstAddr[47:40]]",
+ "301": "E [ethernet.srcAddr[39:32]]",
"320": "I [ipv4.diffserv, ipv4.totalLen[15:8]]",
"321": "I [ipv4.totalLen[7:0], ipv4.identification[15:8]]",
- "322": "I [tcp.dstPort, udp.checksum]",
- "323": "I [tcp.seqNo[31:16]]",
- "324": "I [tcp.seqNo[15:0]]",
- "326": "E [ipv4.totalLen]",
- "327": "E [ipv4.identification]",
- "328": "E [ipv4.flags, ipv4.fragOffset]",
- "329": "E [tcp.dstPort, udp.dstPort]",
- "330": "E [tcp.seqNo[31:16]]",
- "331": "E [tcp.seqNo[15:0]]",
- "332": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
- "333": "E [ethernet.etherType]",
- "334": "E [packet_out_hdr.egress_port, packet_out_hdr._padding]"
+ "322": "I [tcp.seqNo[31:16], udp.checksum]",
+ "323": "I [tcp.seqNo[15:0]]",
+ "324": "I [tcp.ackNo[31:16]]",
+ "325": "I [tcp.ackNo[15:0]]",
+ "332": "E [ipv4.totalLen]",
+ "333": "E [ipv4.identification]",
+ "334": "E [ipv4.flags, ipv4.fragOffset]",
+ "335": "E [tcp.dstPort]",
+ "336": "E [tcp.seqNo[31:16], udp.dstPort]",
+ "337": "E [tcp.seqNo[15:0]]",
+ "338": "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]",
+ "339": "E [ethernet.etherType]",
+ "340": "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]"
},
"logical_tables": {},
"stateful_tables": []
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/parser.context.json b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/parser.context.json
index b06a1fc..d35269e 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/parser.context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/parser.context.json
@@ -243,7 +243,6 @@
null,
null,
null,
- null,
{
"origin": "start",
"origin-case": 0,
@@ -281,6 +280,12 @@
"origin-mask": 511
},
{
+ "origin": "parse_tcp",
+ "origin-case": 0,
+ "state": "parse_tcp//spilled",
+ "origin-mask": 0
+ },
+ {
"origin": "parse_ipv4",
"origin-case": 0,
"state": "<leaf>",
@@ -334,7 +339,8 @@
"6": "default_parser",
"7": "parse_pkt_out",
"8": "<POV initialization>_<Ingress intrinsic metadata>_<Phase 0>",
- "9": "start"
+ "9": "start",
+ "10": "parse_tcp//spilled"
}
},
"egress": {
@@ -590,13 +596,13 @@
"origin-mask": 0
},
{
- "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"origin-case": 0,
"state": "default_parser",
"origin-mask": 0
},
{
- "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "origin": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"origin-case": 0,
"state": "parse_pkt_in",
"origin-mask": 255
@@ -652,7 +658,7 @@
{
"origin": "<Shim start state>",
"origin-case": 0,
- "state": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "state": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"origin-mask": 0
}
],
@@ -665,7 +671,7 @@
"4": "parse_udp",
"5": "default_parser",
"6": "parse_pkt_out",
- "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start",
+ "7": "<POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start",
"8": "parse_pkt_in"
}
}
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/phv.context.json b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/phv.context.json
index c3a266c..2cfaaae 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/phv.context.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/context/phv.context.json
@@ -393,19 +393,6 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 0,
- "data_msb": 0,
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "container_lsb": 0,
- "container_msb": 0
- }
- ],
- "address": 64
- },
- {
- "pipeline": "ingress",
- "data": [
- {
"data_lsb": 16,
"data_msb": 23,
"name": "ipv4.srcAddr",
@@ -413,7 +400,7 @@
"container_msb": 7
}
],
- "address": 65
+ "address": 64
},
{
"pipeline": "ingress",
@@ -426,7 +413,7 @@
"container_msb": 7
}
],
- "address": 66
+ "address": 65
},
{
"pipeline": "ingress",
@@ -439,7 +426,7 @@
"container_msb": 7
}
],
- "address": 67
+ "address": 66
},
{
"pipeline": "ingress",
@@ -452,7 +439,7 @@
"container_msb": 7
}
],
- "address": 68
+ "address": 67
},
{
"pipeline": "ingress",
@@ -465,6 +452,11 @@
"container_msb": 7
}
],
+ "address": 68
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 69
},
{
@@ -522,19 +514,6 @@
"data": [
{
"data_lsb": 0,
- "data_msb": 0,
- "name": "ig_intr_md_for_tm.copy_to_cpu",
- "container_lsb": 0,
- "container_msb": 0
- }
- ],
- "address": 80
- },
- {
- "pipeline": "egress",
- "data": [
- {
- "data_lsb": 0,
"data_msb": 4,
"name": "eg_intr_md._pad7",
"container_lsb": 3,
@@ -548,7 +527,7 @@
"container_msb": 2
}
],
- "address": 81
+ "address": 80
},
{
"pipeline": "egress",
@@ -561,6 +540,11 @@
"container_msb": 7
}
],
+ "address": 81
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 82
},
{
@@ -993,39 +977,6 @@
"data": [
{
"data_lsb": 0,
- "data_msb": 8,
- "name": "ig_intr_md.ingress_port",
- "container_lsb": 0,
- "container_msb": 8
- }
- ],
- "address": 144
- },
- {
- "pipeline": "egress",
- "data": [
- {
- "data_lsb": 0,
- "data_msb": 8,
- "name": "packet_in_hdr.ingress_port",
- "container_lsb": 7,
- "container_msb": 15
- },
- {
- "data_lsb": 0,
- "data_msb": 6,
- "name": "packet_in_hdr._padding",
- "container_lsb": 0,
- "container_msb": 6
- }
- ],
- "address": 145
- },
- {
- "pipeline": "egress",
- "data": [
- {
- "data_lsb": 0,
"data_msb": 6,
"name": "eg_intr_md._pad0",
"container_lsb": 9,
@@ -1039,6 +990,16 @@
"container_msb": 8
}
],
+ "address": 144
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 145
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 146
},
{
@@ -1497,19 +1458,6 @@
"data": [
{
"data_lsb": 0,
- "data_msb": 31,
- "name": "tcp.ackNo",
- "container_lsb": 0,
- "container_msb": 31
- }
- ],
- "address": 257
- },
- {
- "pipeline": "ingress",
- "data": [
- {
- "data_lsb": 0,
"data_msb": 3,
"name": "tcp.dataOffset",
"container_lsb": 28,
@@ -1544,7 +1492,7 @@
"container_msb": 15
}
],
- "address": 258
+ "address": 257
},
{
"pipeline": "ingress",
@@ -1564,9 +1512,34 @@
"container_msb": 15
}
],
+ "address": 258
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
"address": 259
},
{
+ "pipeline": "unused",
+ "data": [],
+ "address": 260
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 261
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 262
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 263
+ },
+ {
"pipeline": "egress",
"data": [
{
@@ -1591,7 +1564,7 @@
"container_msb": 15
}
],
- "address": 260
+ "address": 264
},
{
"pipeline": "egress",
@@ -1604,7 +1577,7 @@
"container_msb": 31
}
],
- "address": 261
+ "address": 265
},
{
"pipeline": "egress",
@@ -1617,7 +1590,7 @@
"container_msb": 31
}
],
- "address": 262
+ "address": 266
},
{
"pipeline": "egress",
@@ -1644,7 +1617,7 @@
"container_msb": 15
}
],
- "address": 263
+ "address": 267
},
{
"pipeline": "egress",
@@ -1685,7 +1658,7 @@
"container_msb": 15
}
],
- "address": 264
+ "address": 268
},
{
"pipeline": "egress",
@@ -1705,7 +1678,7 @@
"container_msb": 15
}
],
- "address": 265
+ "address": 269
},
{
"pipeline": "egress",
@@ -1718,7 +1691,7 @@
"container_msb": 31
}
],
- "address": 266
+ "address": 270
},
{
"pipeline": "egress",
@@ -1731,26 +1704,6 @@
"container_msb": 31
}
],
- "address": 267
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 268
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 269
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 270
- },
- {
- "pipeline": "unused",
- "data": [],
"address": 271
},
{
@@ -1894,9 +1847,45 @@
"address": 290
},
{
+ "pipeline": "ingress",
+ "data": [
+ {
+ "data_lsb": 8,
+ "data_msb": 15,
+ "name": "tcp.dstPort",
+ "container_lsb": 0,
+ "container_msb": 7
+ }
+ ],
+ "address": 291
+ },
+ {
+ "pipeline": "ingress",
+ "data": [
+ {
+ "data_lsb": 0,
+ "data_msb": 7,
+ "name": "tcp.dstPort",
+ "container_lsb": 0,
+ "container_msb": 7
+ }
+ ],
+ "address": 292
+ },
+ {
"pipeline": "unused",
"data": [],
- "address": 291
+ "address": 293
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 294
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 295
},
{
"pipeline": "egress",
@@ -1916,7 +1905,7 @@
"container_msb": 3
}
],
- "address": 292
+ "address": 296
},
{
"pipeline": "egress",
@@ -1929,7 +1918,7 @@
"container_msb": 7
}
],
- "address": 293
+ "address": 297
},
{
"pipeline": "egress",
@@ -1949,7 +1938,7 @@
"container_msb": 7
}
],
- "address": 294
+ "address": 298
},
{
"pipeline": "egress",
@@ -1969,7 +1958,7 @@
"container_msb": 7
}
],
- "address": 295
+ "address": 299
},
{
"pipeline": "egress",
@@ -1982,7 +1971,7 @@
"container_msb": 7
}
],
- "address": 296
+ "address": 300
},
{
"pipeline": "egress",
@@ -1995,26 +1984,6 @@
"container_msb": 7
}
],
- "address": 297
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 298
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 299
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 300
- },
- {
- "pipeline": "unused",
- "data": [],
"address": 301
},
{
@@ -2151,9 +2120,9 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 0,
- "data_msb": 15,
- "name": "tcp.dstPort",
+ "data_lsb": 16,
+ "data_msb": 31,
+ "name": "tcp.seqNo",
"container_lsb": 0,
"container_msb": 15
},
@@ -2171,8 +2140,8 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 16,
- "data_msb": 31,
+ "data_lsb": 0,
+ "data_msb": 15,
"name": "tcp.seqNo",
"container_lsb": 0,
"container_msb": 15
@@ -2184,9 +2153,9 @@
"pipeline": "ingress",
"data": [
{
- "data_lsb": 0,
- "data_msb": 15,
- "name": "tcp.seqNo",
+ "data_lsb": 16,
+ "data_msb": 31,
+ "name": "tcp.ackNo",
"container_lsb": 0,
"container_msb": 15
}
@@ -2194,9 +2163,47 @@
"address": 324
},
{
+ "pipeline": "ingress",
+ "data": [
+ {
+ "data_lsb": 0,
+ "data_msb": 15,
+ "name": "tcp.ackNo",
+ "container_lsb": 0,
+ "container_msb": 15
+ }
+ ],
+ "address": 325
+ },
+ {
"pipeline": "unused",
"data": [],
- "address": 325
+ "address": 326
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 327
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 328
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 329
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 330
+ },
+ {
+ "pipeline": "unused",
+ "data": [],
+ "address": 331
},
{
"pipeline": "egress",
@@ -2209,7 +2216,7 @@
"container_msb": 15
}
],
- "address": 326
+ "address": 332
},
{
"pipeline": "egress",
@@ -2222,7 +2229,7 @@
"container_msb": 15
}
],
- "address": 327
+ "address": 333
},
{
"pipeline": "egress",
@@ -2242,7 +2249,7 @@
"container_msb": 12
}
],
- "address": 328
+ "address": 334
},
{
"pipeline": "egress",
@@ -2253,6 +2260,19 @@
"name": "tcp.dstPort",
"container_lsb": 0,
"container_msb": 15
+ }
+ ],
+ "address": 335
+ },
+ {
+ "pipeline": "egress",
+ "data": [
+ {
+ "data_lsb": 16,
+ "data_msb": 31,
+ "name": "tcp.seqNo",
+ "container_lsb": 0,
+ "container_msb": 15
},
{
"data_lsb": 0,
@@ -2262,20 +2282,7 @@
"container_msb": 15
}
],
- "address": 329
- },
- {
- "pipeline": "egress",
- "data": [
- {
- "data_lsb": 16,
- "data_msb": 31,
- "name": "tcp.seqNo",
- "container_lsb": 0,
- "container_msb": 15
- }
- ],
- "address": 330
+ "address": 336
},
{
"pipeline": "egress",
@@ -2288,7 +2295,7 @@
"container_msb": 15
}
],
- "address": 331
+ "address": 337
},
{
"pipeline": "egress",
@@ -2308,7 +2315,7 @@
"container_msb": 7
}
],
- "address": 332
+ "address": 338
},
{
"pipeline": "egress",
@@ -2321,7 +2328,7 @@
"container_msb": 15
}
],
- "address": 333
+ "address": 339
},
{
"pipeline": "egress",
@@ -2339,38 +2346,22 @@
"name": "packet_out_hdr._padding",
"container_lsb": 0,
"container_msb": 6
+ },
+ {
+ "data_lsb": 0,
+ "data_msb": 8,
+ "name": "packet_in_hdr.ingress_port",
+ "container_lsb": 7,
+ "container_msb": 15
+ },
+ {
+ "data_lsb": 0,
+ "data_msb": 6,
+ "name": "packet_in_hdr._padding",
+ "container_lsb": 0,
+ "container_msb": 6
}
],
- "address": 334
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 335
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 336
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 337
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 338
- },
- {
- "pipeline": "unused",
- "data": [],
- "address": 339
- },
- {
- "pipeline": "unused",
- "data": [],
"address": 340
},
{
@@ -2527,7 +2518,7 @@
"data_lsb": 0,
"data_msb": 5,
"container_lsb": 16,
- "address": 258
+ "address": 257
}
],
"udp.length_": [
@@ -2561,7 +2552,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 16,
- "address": 259
+ "address": 258
}
],
"tcp.srcPort": [
@@ -2582,11 +2573,18 @@
],
"tcp.ackNo": [
{
- "container_msb": 31,
- "data_lsb": 0,
+ "container_msb": 15,
+ "data_lsb": 16,
"data_msb": 31,
"container_lsb": 0,
- "address": 257
+ "address": 324
+ },
+ {
+ "container_msb": 15,
+ "data_lsb": 0,
+ "data_msb": 15,
+ "container_lsb": 0,
+ "address": 325
}
],
"ethernet.etherType": [
@@ -2627,11 +2625,18 @@
],
"tcp.dstPort": [
{
- "container_msb": 15,
- "data_lsb": 0,
+ "container_msb": 7,
+ "data_lsb": 8,
"data_msb": 15,
"container_lsb": 0,
- "address": 322
+ "address": 291
+ },
+ {
+ "container_msb": 7,
+ "data_lsb": 0,
+ "data_msb": 7,
+ "container_lsb": 0,
+ "address": 292
}
],
"ig_intr_md._pad1": [
@@ -2676,7 +2681,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 5,
- "address": 69
+ "address": 68
}
],
"POV": [
@@ -2692,7 +2697,7 @@
"data_lsb": 32,
"data_msb": 39,
"container_lsb": 0,
- "address": 68
+ "address": 67
}
],
"tcp.res": [
@@ -2701,7 +2706,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 25,
- "address": 258
+ "address": 257
}
],
"ethernet.dstAddr": [
@@ -2717,7 +2722,7 @@
"data_lsb": 40,
"data_msb": 47,
"container_lsb": 0,
- "address": 66
+ "address": 65
},
{
"container_msb": 15,
@@ -2754,15 +2759,6 @@
"address": 129
}
],
- "ipv4.version": [
- {
- "container_msb": 7,
- "data_lsb": 0,
- "data_msb": 3,
- "container_lsb": 4,
- "address": 288
- }
- ],
"ethernet.srcAddr": [
{
"container_msb": 31,
@@ -2776,7 +2772,7 @@
"data_lsb": 32,
"data_msb": 39,
"container_lsb": 0,
- "address": 67
+ "address": 66
},
{
"container_msb": 7,
@@ -2869,14 +2865,14 @@
"data_lsb": 16,
"data_msb": 31,
"container_lsb": 0,
- "address": 323
+ "address": 322
},
{
"container_msb": 15,
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 324
+ "address": 323
}
],
"ipv4.ttl": [
@@ -2906,13 +2902,13 @@
"address": 5
}
],
- "ig_intr_md_for_tm.copy_to_cpu": [
+ "ipv4.version": [
{
- "container_msb": 0,
+ "container_msb": 7,
"data_lsb": 0,
- "data_msb": 0,
- "container_lsb": 0,
- "address": 64
+ "data_msb": 3,
+ "container_lsb": 4,
+ "address": 288
}
],
"ipv4.srcAddr": [
@@ -2928,7 +2924,7 @@
"data_lsb": 16,
"data_msb": 23,
"container_lsb": 0,
- "address": 65
+ "address": 64
},
{
"container_msb": 15,
@@ -2944,7 +2940,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 22,
- "address": 258
+ "address": 257
}
],
"tcp.window": [
@@ -2953,7 +2949,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 258
+ "address": 257
}
],
"ig_intr_md.ingress_port": [
@@ -2971,7 +2967,7 @@
"data_lsb": 0,
"data_msb": 3,
"container_lsb": 28,
- "address": 258
+ "address": 257
}
],
"ipv4.fragOffset": [
@@ -2998,7 +2994,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 259
+ "address": 258
}
]
},
@@ -3009,7 +3005,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 260
+ "address": 264
}
],
"packet_in_hdr.ingress_port": [
@@ -3018,16 +3014,7 @@
"data_lsb": 0,
"data_msb": 8,
"container_lsb": 7,
- "address": 145
- }
- ],
- "tcp.checksum": [
- {
- "container_msb": 31,
- "data_lsb": 0,
- "data_msb": 15,
- "container_lsb": 16,
- "address": 265
+ "address": 340
}
],
"tcp.srcPort": [
@@ -3036,14 +3023,14 @@
"data_lsb": 8,
"data_msb": 15,
"container_lsb": 0,
- "address": 294
+ "address": 298
},
{
"container_msb": 7,
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 0,
- "address": 295
+ "address": 299
}
],
"udp.dstPort": [
@@ -3052,7 +3039,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 329
+ "address": 336
}
],
"ethernet.etherType": [
@@ -3061,7 +3048,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 333
+ "address": 339
}
],
"tcp.ctrl": [
@@ -3070,7 +3057,7 @@
"data_lsb": 0,
"data_msb": 5,
"container_lsb": 16,
- "address": 264
+ "address": 268
}
],
"packet_out_hdr._padding": [
@@ -3079,7 +3066,7 @@
"data_lsb": 0,
"data_msb": 6,
"container_lsb": 0,
- "address": 334
+ "address": 340
}
],
"tcp.dstPort": [
@@ -3088,7 +3075,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 329
+ "address": 335
}
],
"eg_intr_md._pad0": [
@@ -3097,7 +3084,7 @@
"data_lsb": 0,
"data_msb": 6,
"container_lsb": 9,
- "address": 146
+ "address": 144
}
],
"eg_intr_md.egress_cos": [
@@ -3106,7 +3093,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 0,
- "address": 81
+ "address": 80
}
],
"eg_intr_md._pad7": [
@@ -3115,7 +3102,7 @@
"data_lsb": 0,
"data_msb": 4,
"container_lsb": 3,
- "address": 81
+ "address": 80
}
],
"POV": [
@@ -3124,7 +3111,7 @@
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 0,
- "address": 82
+ "address": 81
}
],
"tcp.res": [
@@ -3133,7 +3120,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 25,
- "address": 264
+ "address": 268
}
],
"ethernet.dstAddr": [
@@ -3142,21 +3129,21 @@
"data_lsb": 8,
"data_msb": 39,
"container_lsb": 0,
- "address": 266
+ "address": 270
},
{
"container_msb": 7,
"data_lsb": 40,
"data_msb": 47,
"container_lsb": 0,
- "address": 296
+ "address": 300
},
{
"container_msb": 15,
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 8,
- "address": 332
+ "address": 338
}
],
"ipv4.ihl": [
@@ -3165,7 +3152,7 @@
"data_lsb": 0,
"data_msb": 3,
"container_lsb": 0,
- "address": 292
+ "address": 296
}
],
"ipv4.dstAddr": [
@@ -3174,57 +3161,7 @@
"data_lsb": 0,
"data_msb": 31,
"container_lsb": 0,
- "address": 262
- }
- ],
- "packet_in_hdr._padding": [
- {
- "container_msb": 6,
- "data_lsb": 0,
- "data_msb": 6,
- "container_lsb": 0,
- "address": 145
- }
- ],
- "ipv4.totalLen": [
- {
- "container_msb": 15,
- "data_lsb": 0,
- "data_msb": 15,
- "container_lsb": 0,
- "address": 326
- }
- ],
- "ipv4.version": [
- {
- "container_msb": 7,
- "data_lsb": 0,
- "data_msb": 3,
- "container_lsb": 4,
- "address": 292
- }
- ],
- "ethernet.srcAddr": [
- {
- "container_msb": 31,
- "data_lsb": 0,
- "data_msb": 31,
- "container_lsb": 0,
- "address": 267
- },
- {
- "container_msb": 7,
- "data_lsb": 32,
- "data_msb": 39,
- "container_lsb": 0,
- "address": 297
- },
- {
- "container_msb": 7,
- "data_lsb": 40,
- "data_msb": 47,
- "container_lsb": 0,
- "address": 332
+ "address": 266
}
],
"ipv4.diffserv": [
@@ -3233,7 +3170,48 @@
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 0,
- "address": 293
+ "address": 297
+ }
+ ],
+ "ipv4.totalLen": [
+ {
+ "container_msb": 15,
+ "data_lsb": 0,
+ "data_msb": 15,
+ "container_lsb": 0,
+ "address": 332
+ }
+ ],
+ "ethernet.srcAddr": [
+ {
+ "container_msb": 31,
+ "data_lsb": 0,
+ "data_msb": 31,
+ "container_lsb": 0,
+ "address": 271
+ },
+ {
+ "container_msb": 7,
+ "data_lsb": 32,
+ "data_msb": 39,
+ "container_lsb": 0,
+ "address": 301
+ },
+ {
+ "container_msb": 7,
+ "data_lsb": 40,
+ "data_msb": 47,
+ "container_lsb": 0,
+ "address": 338
+ }
+ ],
+ "packet_in_hdr._padding": [
+ {
+ "container_msb": 6,
+ "data_lsb": 0,
+ "data_msb": 6,
+ "container_lsb": 0,
+ "address": 340
}
],
"ipv4.flags": [
@@ -3242,7 +3220,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 13,
- "address": 328
+ "address": 334
}
],
"ipv4.identification": [
@@ -3251,7 +3229,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 327
+ "address": 333
}
],
"eg_intr_md.egress_port": [
@@ -3260,7 +3238,7 @@
"data_lsb": 0,
"data_msb": 8,
"container_lsb": 0,
- "address": 146
+ "address": 144
}
],
"packet_out_hdr.egress_port": [
@@ -3269,7 +3247,7 @@
"data_lsb": 0,
"data_msb": 8,
"container_lsb": 7,
- "address": 334
+ "address": 340
}
],
"ipv4.protocol": [
@@ -3278,7 +3256,7 @@
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 16,
- "address": 260
+ "address": 264
}
],
"udp.checksum": [
@@ -3287,7 +3265,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 263
+ "address": 267
}
],
"tcp.seqNo": [
@@ -3296,14 +3274,14 @@
"data_lsb": 16,
"data_msb": 31,
"container_lsb": 0,
- "address": 330
+ "address": 336
},
{
"container_msb": 15,
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 331
+ "address": 337
}
],
"udp.length_": [
@@ -3312,7 +3290,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 16,
- "address": 263
+ "address": 267
}
],
"udp.srcPort": [
@@ -3321,14 +3299,14 @@
"data_lsb": 8,
"data_msb": 15,
"container_lsb": 0,
- "address": 294
+ "address": 298
},
{
"container_msb": 7,
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 0,
- "address": 295
+ "address": 299
}
],
"tcp.ackNo": [
@@ -3337,16 +3315,16 @@
"data_lsb": 0,
"data_msb": 31,
"container_lsb": 0,
- "address": 263
+ "address": 267
}
],
- "ig_intr_md_for_tm.copy_to_cpu": [
+ "ipv4.version": [
{
- "container_msb": 0,
+ "container_msb": 7,
"data_lsb": 0,
- "data_msb": 0,
- "container_lsb": 0,
- "address": 80
+ "data_msb": 3,
+ "container_lsb": 4,
+ "address": 296
}
],
"ipv4.srcAddr": [
@@ -3355,7 +3333,7 @@
"data_lsb": 0,
"data_msb": 31,
"container_lsb": 0,
- "address": 261
+ "address": 265
}
],
"tcp.ecn": [
@@ -3364,7 +3342,7 @@
"data_lsb": 0,
"data_msb": 2,
"container_lsb": 22,
- "address": 264
+ "address": 268
}
],
"tcp.window": [
@@ -3373,16 +3351,16 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 264
+ "address": 268
}
],
- "ig_intr_md.ingress_port": [
+ "tcp.checksum": [
{
- "container_msb": 8,
+ "container_msb": 31,
"data_lsb": 0,
- "data_msb": 8,
- "container_lsb": 0,
- "address": 144
+ "data_msb": 15,
+ "container_lsb": 16,
+ "address": 269
}
],
"tcp.dataOffset": [
@@ -3391,7 +3369,7 @@
"data_lsb": 0,
"data_msb": 3,
"container_lsb": 28,
- "address": 264
+ "address": 268
}
],
"ipv4.fragOffset": [
@@ -3400,7 +3378,7 @@
"data_lsb": 0,
"data_msb": 12,
"container_lsb": 0,
- "address": 328
+ "address": 334
}
],
"ipv4.ttl": [
@@ -3409,7 +3387,7 @@
"data_lsb": 0,
"data_msb": 7,
"container_lsb": 24,
- "address": 260
+ "address": 264
}
],
"tcp.urgentPtr": [
@@ -3418,7 +3396,7 @@
"data_lsb": 0,
"data_msb": 15,
"container_lsb": 0,
- "address": 265
+ "address": 269
}
]
}
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/ecmp.json b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/ecmp.json
index e53756f..470c7b8 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/ecmp.json
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/ecmp.json
@@ -522,45 +522,10 @@
"learn_lists" : [],
"actions" : [
{
- "name" : "add_packet_in_hdr",
+ "name" : "NoAction",
"id" : 0,
"runtime_data" : [],
- "primitives" : [
- {
- "op" : "add_header",
- "parameters" : [
- {
- "type" : "header",
- "value" : "packet_in_hdr"
- }
- ],
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 25,
- "column" : 4,
- "source_fragment" : "add_header(packet_in_hdr)"
- }
- },
- {
- "op" : "assign",
- "parameters" : [
- {
- "type" : "field",
- "value" : ["packet_in_hdr", "ingress_port"]
- },
- {
- "type" : "field",
- "value" : ["ig_intr_md", "ingress_port"]
- }
- ],
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 26,
- "column" : 4,
- "source_fragment" : "modify_field(packet_in_hdr.ingress_port, ig_intr_md.ingress_port)"
- }
- }
- ]
+ "primitives" : []
},
{
"name" : "NoAction",
@@ -569,10 +534,35 @@
"primitives" : []
},
{
- "name" : "NoAction",
+ "name" : "set_egress_port",
"id" : 2,
- "runtime_data" : [],
- "primitives" : []
+ "runtime_data" : [
+ {
+ "name" : "port",
+ "bitwidth" : 9
+ }
+ ],
+ "primitives" : [
+ {
+ "op" : "assign",
+ "parameters" : [
+ {
+ "type" : "field",
+ "value" : ["ig_intr_md", "egress_spec"]
+ },
+ {
+ "type" : "runtime_data",
+ "value" : 0
+ }
+ ],
+ "source_info" : {
+ "filename" : "include/actions.p4",
+ "line" : 5,
+ "column" : 23,
+ "source_fragment" : "port) { ..."
+ }
+ }
+ ]
},
{
"name" : "set_egress_port",
@@ -606,39 +596,8 @@
]
},
{
- "name" : "set_egress_port",
- "id" : 4,
- "runtime_data" : [
- {
- "name" : "port",
- "bitwidth" : 9
- }
- ],
- "primitives" : [
- {
- "op" : "assign",
- "parameters" : [
- {
- "type" : "field",
- "value" : ["ig_intr_md", "egress_spec"]
- },
- {
- "type" : "runtime_data",
- "value" : 0
- }
- ],
- "source_info" : {
- "filename" : "include/actions.p4",
- "line" : 5,
- "column" : 23,
- "source_fragment" : "port) { ..."
- }
- }
- ]
- },
- {
"name" : "ecmp_group",
- "id" : 5,
+ "id" : 4,
"runtime_data" : [
{
"name" : "groupId",
@@ -696,7 +655,7 @@
},
{
"name" : "send_to_cpu",
- "id" : 6,
+ "id" : 5,
"runtime_data" : [],
"primitives" : [
{
@@ -713,16 +672,50 @@
],
"source_info" : {
"filename" : "include/actions.p4",
- "line" : 21,
+ "line" : 18,
"column" : 4,
"source_fragment" : "modify_field(ig_intr_md.egress_spec, 255)"
}
+ },
+ {
+ "op" : "add_header",
+ "parameters" : [
+ {
+ "type" : "header",
+ "value" : "packet_in_hdr"
+ }
+ ],
+ "source_info" : {
+ "filename" : "include/actions.p4",
+ "line" : 19,
+ "column" : 4,
+ "source_fragment" : "add_header(packet_in_hdr)"
+ }
+ },
+ {
+ "op" : "assign",
+ "parameters" : [
+ {
+ "type" : "field",
+ "value" : ["packet_in_hdr", "ingress_port"]
+ },
+ {
+ "type" : "field",
+ "value" : ["ig_intr_md", "ingress_port"]
+ }
+ ],
+ "source_info" : {
+ "filename" : "include/actions.p4",
+ "line" : 20,
+ "column" : 4,
+ "source_fragment" : "modify_field(packet_in_hdr.ingress_port, ig_intr_md.ingress_port)"
+ }
}
]
},
{
"name" : "_drop",
- "id" : 7,
+ "id" : 6,
"runtime_data" : [],
"primitives" : [
{
@@ -747,8 +740,8 @@
]
},
{
- "name" : "_packet_out",
- "id" : 8,
+ "name" : "_process_packet_out",
+ "id" : 7,
"runtime_data" : [],
"primitives" : [
{
@@ -789,7 +782,7 @@
},
{
"name" : "count_egress",
- "id" : 9,
+ "id" : 8,
"runtime_data" : [],
"primitives" : [
{
@@ -841,7 +834,7 @@
},
{
"name" : "count_ingress",
- "id" : 10,
+ "id" : 9,
"runtime_data" : [],
"primitives" : [
{
@@ -899,37 +892,8 @@
"init_table" : "node_2",
"tables" : [
{
- "name" : "ingress_pkt",
- "id" : 0,
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 11,
- "column" : 0,
- "source_fragment" : "table ingress_pkt { ..."
- },
- "key" : [],
- "match_type" : "exact",
- "type" : "simple",
- "max_size" : 1024,
- "with_counters" : false,
- "support_timeout" : false,
- "direct_meters" : null,
- "action_ids" : [8],
- "actions" : ["_packet_out"],
- "base_default_next" : "node_4",
- "next_tables" : {
- "_packet_out" : "node_4"
- },
- "default_entry" : {
- "action_id" : 8,
- "action_const" : false,
- "action_data" : [],
- "action_entry_const" : false
- }
- },
- {
"name" : "table0",
- "id" : 1,
+ "id" : 0,
"source_info" : {
"filename" : "ecmp.p4",
"line" : 47,
@@ -964,18 +928,18 @@
"with_counters" : true,
"support_timeout" : false,
"direct_meters" : null,
- "action_ids" : [4, 5, 6, 7, 2],
+ "action_ids" : [3, 4, 5, 6, 1],
"actions" : ["set_egress_port", "ecmp_group", "send_to_cpu", "_drop", "NoAction"],
- "base_default_next" : "node_7",
+ "base_default_next" : "node_5",
"next_tables" : {
"ecmp_group" : "ecmp_group_table",
- "set_egress_port" : "node_7",
- "send_to_cpu" : "node_7",
- "_drop" : "node_7",
- "NoAction" : "node_7"
+ "set_egress_port" : "node_5",
+ "send_to_cpu" : "node_5",
+ "_drop" : "node_5",
+ "NoAction" : "node_5"
},
"default_entry" : {
- "action_id" : 2,
+ "action_id" : 1,
"action_const" : false,
"action_data" : [],
"action_entry_const" : false
@@ -983,7 +947,7 @@
},
{
"name" : "ecmp_group_table",
- "id" : 2,
+ "id" : 1,
"source_info" : {
"filename" : "ecmp.p4",
"line" : 63,
@@ -1008,15 +972,44 @@
"with_counters" : true,
"support_timeout" : false,
"direct_meters" : null,
- "action_ids" : [3, 1],
+ "action_ids" : [2, 0],
"actions" : ["set_egress_port", "NoAction"],
- "base_default_next" : "node_7",
+ "base_default_next" : "node_5",
"next_tables" : {
- "set_egress_port" : "node_7",
- "NoAction" : "node_7"
+ "set_egress_port" : "node_5",
+ "NoAction" : "node_5"
},
"default_entry" : {
- "action_id" : 1,
+ "action_id" : 0,
+ "action_const" : false,
+ "action_data" : [],
+ "action_entry_const" : false
+ }
+ },
+ {
+ "name" : "process_packet_out_table",
+ "id" : 2,
+ "source_info" : {
+ "filename" : "include/packet_io.p4",
+ "line" : 11,
+ "column" : 0,
+ "source_fragment" : "table process_packet_out_table { ..."
+ },
+ "key" : [],
+ "match_type" : "exact",
+ "type" : "simple",
+ "max_size" : 1024,
+ "with_counters" : false,
+ "support_timeout" : false,
+ "direct_meters" : null,
+ "action_ids" : [7],
+ "actions" : ["_process_packet_out"],
+ "base_default_next" : "node_7",
+ "next_tables" : {
+ "_process_packet_out" : "node_7"
+ },
+ "default_entry" : {
+ "action_id" : 7,
"action_const" : false,
"action_data" : [],
"action_entry_const" : false
@@ -1038,14 +1031,14 @@
"with_counters" : false,
"support_timeout" : false,
"direct_meters" : null,
- "action_ids" : [10],
+ "action_ids" : [9],
"actions" : ["count_ingress"],
"base_default_next" : "egress_port_count_table",
"next_tables" : {
"count_ingress" : "egress_port_count_table"
},
"default_entry" : {
- "action_id" : 10,
+ "action_id" : 9,
"action_const" : false,
"action_data" : [],
"action_entry_const" : false
@@ -1067,14 +1060,14 @@
"with_counters" : false,
"support_timeout" : false,
"direct_meters" : null,
- "action_ids" : [9],
+ "action_ids" : [8],
"actions" : ["count_egress"],
"base_default_next" : null,
"next_tables" : {
"count_egress" : null
},
"default_entry" : {
- "action_id" : 9,
+ "action_id" : 8,
"action_const" : false,
"action_data" : [],
"action_entry_const" : false
@@ -1087,6 +1080,32 @@
"name" : "node_2",
"id" : 0,
"source_info" : {
+ "filename" : "ecmp.p4",
+ "line" : 86,
+ "column" : 12,
+ "source_fragment" : "valid(packet_out_hdr)"
+ },
+ "expression" : {
+ "type" : "expression",
+ "value" : {
+ "op" : "!=",
+ "left" : {
+ "type" : "field",
+ "value" : ["packet_out_hdr", "$valid$"]
+ },
+ "right" : {
+ "type" : "hexstr",
+ "value" : "0x01"
+ }
+ }
+ },
+ "true_next" : "table0",
+ "false_next" : "node_5"
+ },
+ {
+ "name" : "node_5",
+ "id" : 1,
+ "source_info" : {
"filename" : "include/packet_io.p4",
"line" : 19,
"column" : 8,
@@ -1106,33 +1125,7 @@
}
}
},
- "true_next" : "ingress_pkt",
- "false_next" : "node_4"
- },
- {
- "name" : "node_4",
- "id" : 1,
- "source_info" : {
- "filename" : "ecmp.p4",
- "line" : 87,
- "column" : 12,
- "source_fragment" : "valid(packet_out_hdr)"
- },
- "expression" : {
- "type" : "expression",
- "value" : {
- "op" : "!=",
- "left" : {
- "type" : "field",
- "value" : ["packet_out_hdr", "$valid$"]
- },
- "right" : {
- "type" : "hexstr",
- "value" : "0x01"
- }
- }
- },
- "true_next" : "table0",
+ "true_next" : "process_packet_out_table",
"false_next" : "node_7"
},
{
@@ -1166,67 +1159,10 @@
{
"name" : "egress",
"id" : 1,
- "init_table" : "node_12",
- "tables" : [
- {
- "name" : "egress_pkt",
- "id" : 5,
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 29,
- "column" : 0,
- "source_fragment" : "table egress_pkt { ..."
- },
- "key" : [],
- "match_type" : "exact",
- "type" : "simple",
- "max_size" : 1024,
- "with_counters" : false,
- "support_timeout" : false,
- "direct_meters" : null,
- "action_ids" : [0],
- "actions" : ["add_packet_in_hdr"],
- "base_default_next" : null,
- "next_tables" : {
- "add_packet_in_hdr" : null
- },
- "default_entry" : {
- "action_id" : 0,
- "action_const" : false,
- "action_data" : [],
- "action_entry_const" : false
- }
- }
- ],
+ "init_table" : null,
+ "tables" : [],
"action_profiles" : [],
- "conditionals" : [
- {
- "name" : "node_12",
- "id" : 3,
- "source_info" : {
- "filename" : "include/packet_io.p4",
- "line" : 40,
- "column" : 39,
- "source_fragment" : "=="
- },
- "expression" : {
- "type" : "expression",
- "value" : {
- "op" : "==",
- "left" : {
- "type" : "field",
- "value" : ["ig_intr_md", "ingress_port"]
- },
- "right" : {
- "type" : "hexstr",
- "value" : "0x00ff"
- }
- }
- },
- "false_next" : null,
- "true_next" : "egress_pkt"
- }
- ]
+ "conditionals" : []
}
],
"checksums" : [],
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/ecmp.p4info b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/ecmp.p4info
index 3c338f0..f5f1111 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/ecmp.p4info
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/ecmp.p4info
@@ -78,12 +78,12 @@
}
tables {
preamble {
- id: 33560548
- name: "ingress_pkt"
- alias: "ingress_pkt"
+ id: 33607247
+ name: "process_packet_out_table"
+ alias: "process_packet_out_table"
}
action_refs {
- id: 16835928
+ id: 16798653
}
size: 1024
}
@@ -109,17 +109,6 @@
}
size: 1024
}
-tables {
- preamble {
- id: 33608529
- name: "egress_pkt"
- alias: "egress_pkt"
- }
- action_refs {
- id: 16835663
- }
- size: 1024
-}
actions {
preamble {
id: 16800567
@@ -167,9 +156,9 @@
}
actions {
preamble {
- id: 16835928
- name: "_packet_out"
- alias: "_packet_out"
+ id: 16798653
+ name: "_process_packet_out"
+ alias: "_process_packet_out"
}
}
actions {
@@ -186,13 +175,6 @@
alias: "count_ingress"
}
}
-actions {
- preamble {
- id: 16835663
- name: "add_packet_in_hdr"
- alias: "add_packet_in_hdr"
- }
-}
counters {
preamble {
id: 302008596
@@ -263,4 +245,4 @@
name: "egress_port"
bitwidth: 9
}
-}
+}
\ No newline at end of file
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/asm.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/asm.log
index 0ddc790..30d3dc5 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/asm.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/asm.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: asm.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.characterize.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.characterize.log
index 31219ad..5ecbe0e 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.characterize.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.characterize.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: mau.characterize.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
Match+Action Resource Usage
@@ -16,19 +16,16 @@
| | | | | | | | | | ver/vld | | | | | | | | Units | Units | | | |
| | | | | | | | | | | | | | | | | | (bits) | (bits) | | | |
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
-| ingress_pkt | ingress | 0 | | - | 0 (0/0/0/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| egress_pkt | egress | 0 | | - | 0 (0/0/0/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| stage 0 totals | - | - | - | - | 0 (0/0/0/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| table0 | ingress | 0 | ternary | tcam | 4 (0/1/2/0/1) | 3 | 512 / 512 (0) | 121 / 121 (0) | 4 | 5 | 1/4/0/0/0/0/0/0 | 0 / 0 (0) | 125 / 132 (7) | 5 / 8 (3) | 16 | 16 / 16 (0) | 1 in 3 (132) | 1 in 3 (132) | 91.7% / 91.7% | - / - | 100.0% / 100.0% |
+| process_packet_out_table | ingress | 0 | | - | 0 (0/0/0/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
+| stage 0 totals | - | - | - | - | 4 (0/1/2/0/1) | 3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| | | | | | | | | | | | | | | | | | | | | | |
-| table0 | ingress | 1 | ternary | tcam | 4 (0/1/2/0/1) | 3 | 512 / 512 (0) | 121 / 121 (0) | 4 | 5 | 1/4/0/0/0/0/0/0 | 0 / 0 (0) | 125 / 132 (7) | 5 / 8 (3) | 16 | 16 / 16 (0) | 1 in 3 (132) | 1 in 3 (132) | 91.7% / 91.7% | - / - | 100.0% / 100.0% |
-| stage 1 totals | - | - | - | - | 4 (0/1/2/0/1) | 3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| ecmp_group_table | ingress | 1 | exact | sram | 5 (3/0/2/0/0) | 0 | 1024 / 3072 (2048) | 32 / 22 (-10) | 0 | 20 | 0/0/0/0/0/0/4/16 | 9 / 16 (7) | 0 / 0 (0) | 52 / 42 (-10) | 9 | 0 / 0 (0) | 3 in 1 (128) | 1 in 1 (128) | - / - | 96.1% / 29.7% | - / - |
+| stage 1 totals | - | - | - | - | 5 (3/0/2/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| | | | | | | | | | | | | | | | | | | | | | |
-| ecmp_group_table | ingress | 2 | exact | sram | 5 (3/0/2/0/0) | 0 | 1024 / 3072 (2048) | 32 / 22 (-10) | 0 | 20 | 0/0/0/0/0/0/4/16 | 9 / 16 (7) | 0 / 0 (0) | 52 / 42 (-10) | 9 | 0 / 0 (0) | 3 in 1 (128) | 1 in 1 (128) | - / - | 96.1% / 29.7% | - / - |
-| stage 2 totals | - | - | - | - | 5 (3/0/2/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
-| | | | | | | | | | | | | | | | | | | | | | |
-| ingress_port_count_table | ingress | 3 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| egress_port_count_table | ingress | 3 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
-| stage 3 totals | - | - | - | - | 4 (0/0/4/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| ingress_port_count_table | ingress | 2 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
+| egress_port_count_table | ingress | 2 | | - | 2 (0/0/2/0/0) | 0 | 1024 / 1 (-1023) | 0 / 0 (0) | 0 | 0 | 0/0/0/0/0/0/0/0 | 0 / 0 (0) | 0 / 0 (0) | 0 / 0 (0) | 0 | 0 / 0 (0) | 0 in 0 (0) | 1 in 0 (0) | - / - | - / - | - / - |
+| stage 2 totals | - | - | - | - | 4 (0/0/4/0/0) | 0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
| | | | | | | | | | | | | | | | | | | | | | |
| overall totals | - | - | - | - | 13 (3/1/8/0/1) | 3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
@@ -77,19 +74,11 @@
Total bits: 20
+----------------------------------------------------------------+
- ingress_pkt
+ process_packet_out_table
+----------------------------------------------------------------+
Match Overhead:
- Field --instruction_address-- [1:0] (2 bits)
- Total bits: 2
-+----------------------------------------------------------------+
- egress_pkt
-+----------------------------------------------------------------+
-Match Overhead:
- Field --instruction_address-- [1:0] (2 bits)
-
- Total bits: 2
+ Total bits: 0
+----------------------------------------------------------------+
table0
+----------------------------------------------------------------+
@@ -148,28 +137,10 @@
]
+----------------------------------------------------------------+
- ingress_pkt__action__:
+ process_packet_out_table__action__:
+----------------------------------------------------------------+
-Action _packet_out:
----------------------------
-Pack Format:
- table_word_width: 128
- memory_word_width: 128
- entries_per_table_word: 1
- number_memory_units_per_table_word: 1
- entry_list: [
- entry_number : 0
- field_list : [
- ]
- Field --padding-- is 0 bits : in bits [127:0]
-]
-
-+----------------------------------------------------------------+
- egress_pkt__action__:
-+----------------------------------------------------------------+
-
-Action add_packet_in_hdr:
+Action _process_packet_out:
---------------------------
Pack Format:
table_word_width: 128
@@ -292,35 +263,43 @@
entry_number : 7
field_list : [
]
- Field --padding-- [15:0] : in bits [127:112]
+ Field --padding-- [6:0] : in bits [127:121]
+ Field --constant-0-- [8:0] : in bits [120:112]
entry_number : 6
field_list : [
]
- Field --padding-- [15:0] : in bits [111:96]
+ Field --padding-- [6:0] : in bits [111:105]
+ Field --constant-0-- [8:0] : in bits [104:96]
entry_number : 5
field_list : [
]
- Field --padding-- [15:0] : in bits [95:80]
+ Field --padding-- [6:0] : in bits [95:89]
+ Field --constant-0-- [8:0] : in bits [88:80]
entry_number : 4
field_list : [
]
- Field --padding-- [15:0] : in bits [79:64]
+ Field --padding-- [6:0] : in bits [79:73]
+ Field --constant-0-- [8:0] : in bits [72:64]
entry_number : 3
field_list : [
]
- Field --padding-- [15:0] : in bits [63:48]
+ Field --padding-- [6:0] : in bits [63:57]
+ Field --constant-0-- [8:0] : in bits [56:48]
entry_number : 2
field_list : [
]
- Field --padding-- [15:0] : in bits [47:32]
+ Field --padding-- [6:0] : in bits [47:41]
+ Field --constant-0-- [8:0] : in bits [40:32]
entry_number : 1
field_list : [
]
- Field --padding-- [15:0] : in bits [31:16]
+ Field --padding-- [6:0] : in bits [31:25]
+ Field --constant-0-- [8:0] : in bits [24:16]
entry_number : 0
field_list : [
]
- Field --padding-- [15:0] : in bits [15:0]
+ Field --padding-- [6:0] : in bits [15:9]
+ Field --constant-0-- [8:0] : in bits [8:0]
]
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.config.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.config.log
index 8edd27c..498c30d 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.config.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.config.log
@@ -1,14 +1,14 @@
+---------------------------------------------------------------------+
| Log file: mau.config.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
Final Stage dependencies are:
(0, 'ingress') : match
(1, 'ingress') : match
(2, 'ingress') : match
- (3, 'ingress') : match
+ (3, 'ingress') : concurrent
(4, 'ingress') : concurrent
(5, 'ingress') : concurrent
(6, 'ingress') : match
@@ -29,7 +29,7 @@
(9, 'egress') : concurrent
(10, 'egress') : concurrent
(11, 'egress') : concurrent
-Action/Concurrent chaining in ingress consists of [4, 5]
+Action/Concurrent chaining in ingress consists of [3, 4, 5]
Action/Concurrent chaining in ingress consists of [7, 8, 9, 10, 11]
Action/Concurrent chaining in egress consists of [1, 2, 3, 4, 5]
Action/Concurrent chaining in egress consists of [7, 8, 9, 10, 11]
@@ -48,322 +48,13 @@
Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=0].mau_match_input_xbar_exact_match_enable to be 0x1. (old value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=0].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=1].match_input_xbar_816b_ctl_address to be 4.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=1].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 1 to come from 8-bit PHV container 4.
- That PHV byte contains {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x10. (previous value = 0x0 OR new value = 0x10)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.hash.galois_field_matrix[byte_pair_index=0][hash_bit_index=41].byte1 to be 0x2.
-Configuring dp.hashout_ctl.hash_group_ingress_enable to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_logical_table to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_thread to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_matchdata_xor_en.gateway_table_matchdata_xor_en to be 0x0
-Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid0 to be 0x3
-Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid1 to be 0x3
-Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][0] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][1] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][0] to be 0xfffffd
-Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][1] to be 0xffffff
-Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0x8
-Configuring rams.match.merge.gateway_next_table_lut[0][3] to be 0x10
-Configuring rams.match.merge.gateway_en.gateway_en to be 0x1
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_select to be 0xe
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_enable to be 0x1
-allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_logical_select to be 0x0
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_inhibit_enable to be 0x1
-Configuring rams.match.merge.gateway_payload_exact_pbus[0].gateway_payload_exact_pbus to be 0x2
-Configuring rams.match.merge.gateway_payload_data[0][1][0][0].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][1][1][0].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_data[0][1][0][1].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][1][1][1].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_match_adr[0][1][0].gateway_payload_match_adr to be 0x7ffff
-Configuring rams.match.merge.gateway_payload_match_adr[0][1][1].gateway_payload_match_adr to be 0x7ffff
-
-+------------------------------------------------------------------------
-| Working on table _condition_3 in stage 0 ---
-+------------------------------------------------------------------------
---> Stage Gateway Table for condition _condition_3 in stage 0
-Configuring rams.match.merge.predication_ctl[direction_index=1].table_thread to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring dp.imem_table_addr_egress to be 0x2 (previous_value = 0x0 OR new_value = 0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=0].adr_dist_table_thread to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=1].adr_dist_table_thread to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_egress to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_egress to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_egress to be 0x2 (previous_value=0x0 OR new_value=0x2).
-Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=1].mau_match_input_xbar_exact_match_enable to be 0x1. (old value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=1].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=2][output_byte=0].match_input_xbar_816b_ctl_address to be 0.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=2][output_byte=0].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 0 to come from 8-bit PHV container 16.
- That PHV byte contains {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]}.
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=6].match_input_xbar_din_power_ctl to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x1. (previous value = 0x1 OR new value = 0x1)
-Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.hash.galois_field_matrix[byte_pair_index=0][hash_bit_index=40].byte0 to be 0x1.
-Configuring dp.hashout_ctl.hash_group_egress_enable to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring rams.array.row[row=7].vh_xbar[search_bus_index=0].exactmatch_row_vh_xbar_ctl.exactmatch_row_vh_xbar_select to be 0.
-Configuring rams.array.row[row=7].vh_xbar[search_bus_index=0].exactmatch_row_vh_xbar_ctl.exactmatch_row_vh_xbar_enable to be 1.
-Configuring rams.array.row[row=7].vh_adr_xbar.exactmatch_row_hashadr_xbar_ctl[search_bus_index=0].enabled_3bit_muxctl_select to be 0.
-Configuring rams.array.row[row=7].vh_adr_xbar.exactmatch_row_hashadr_xbar_ctl[search_bus_index=0].enabled_3bit_muxctl_enable to be 1.
-Configuring cfg_regs.mau_cfg_lt_thread.mau_cfg_lt_thread to be 0x2. (previous value = 0x0 OR new value = 0x2)
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_data0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_data1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_hash0_select to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_input_hash1_select to be 0x0
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_logical_table to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_ctl.gateway_table_thread to be 0x1
-Configuring rams.array.row[7].gateway_table[1].gateway_table_matchdata_xor_en.gateway_table_matchdata_xor_en to be 0x0
-Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[3].gateway_table_entry_versionvalid0 to be 0x3
-Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[3].gateway_table_entry_versionvalid1 to be 0x3
-Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[3][0] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[3][1] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][0] to be 0xfffffe
-Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][1] to be 0xffffff
-Configuring rams.match.merge.gateway_inhibit_lut[1] to be 0x8
-Configuring rams.match.merge.gateway_next_table_lut[1][3] to be 0xff
-Configuring rams.match.merge.gateway_en.gateway_en to be 0x3 (previous value 0x1 OR new value 0x2)
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_select to be 0xf
-Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_enable to be 0x1
-allocated_result_bus = Ram Data Bus MatchResult1R 0 left_and_right is 83 bits
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[0].exact_logical_select to be 0x1
-Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[0].exact_inhibit_enable to be 0x1
-Configuring rams.match.merge.gateway_payload_exact_pbus[0].gateway_payload_exact_pbus to be 0x3 (previous value 0x2 OR new value 0x1)
-Configuring rams.match.merge.gateway_payload_data[0][0][0][0].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][0][1][0].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_data[0][0][0][1].gateway_payload_data to be 0x1
-Configuring rams.match.merge.gateway_payload_data[0][0][1][1].gateway_payload_data to be 0x0
-Configuring rams.match.merge.gateway_payload_match_adr[0][0][0].gateway_payload_match_adr to be 0x7ffff
-Configuring rams.match.merge.gateway_payload_match_adr[0][0][1].gateway_payload_match_adr to be 0x7ffff
-
-+------------------------------------------------------------------------
-| Working on table ingress_pkt__action__ in stage 0 ---
-+------------------------------------------------------------------------
---> Action Data Table ingress_pkt__action__ with logical_table_id 0 that is reference type is 'direct'
-
-+------------------------------------------------------------------------
-| Working on table ingress_pkt in stage 0 ---
-+------------------------------------------------------------------------
---> Match Table with no key ingress_pkt with logical_table_id 0
-allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
-Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_select to be 0 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_select to be 0 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.mau_action_instruction_adr_default[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_default to be 0x0.
-Configuring rams.match.merge.mau_action_instruction_adr_mask[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_mask to be 0x1.
-Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x10.
-Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=0][entry_index=0].mau_action_instruction_adr_map_data to be 0x2080.
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=0][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
-Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=0].imem_subword16_instr to be 0x74412.
-Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=0].imem_subword16_color to be 1.
-Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=0].imem_subword16_parity to be 0.
-Micro instruction added in VLIW 0 for 16-bit position 2 for table ingress_pkt.
- Assembled as 0x74412 (or decimal 476178)
- Micro Instruction deposit-field for PHV Container 130 has bit width 23
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-
-Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=0].imem_subword8_instr to be 0x74d84.
-Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=0].imem_subword8_color to be 1.
-Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=0].imem_subword8_parity to be 0.
-Micro instruction added in VLIW 0 for 8-bit position 4 for table ingress_pkt.
- Assembled as 0x74d84 (or decimal 478596)
- Micro Instruction deposit-field for PHV Container 68 has bit width 20
- Field Src2 [3:0] : 0x4 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x10. (previous value = 0x0 OR new value = 0x10)
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x6. (previous value = 0x0 OR new value = 0x6)
-Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=1].action_instruction_adr_payload_shifter_en to be 1.
-
-+------------------------------------------------------------------------
-| Working on table egress_pkt__action__ in stage 0 ---
-+------------------------------------------------------------------------
---> Action Data Table egress_pkt__action__ with logical_table_id 1 that is reference type is 'direct'
-
-+------------------------------------------------------------------------
-| Working on table egress_pkt in stage 0 ---
-+------------------------------------------------------------------------
---> Match Table with no key egress_pkt with logical_table_id 1
-allocated_result_bus = Ram Data Bus MatchResult1R 0 left_and_right is 83 bits
-Configuring dp.imem_table_addr_egress to be 0x2 (previous_value = 0x2 OR new_value = 0x2).
-Configuring rams.match.merge.predication_ctl[direction_index=1].table_thread to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_egress to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_egress to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_egress to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=0].adr_dist_table_thread to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=1][copy_index=1].adr_dist_table_thread to be 0x2 (previous_value=0x2 OR new_value=0x2).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=0].enabled_4bit_muxctl_select to be 1 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=0].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=0].enabled_4bit_muxctl_select to be 1 (logical table id).
-Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=0].enabled_4bit_muxctl_enable to be 1.
-Configuring rams.match.merge.mau_action_instruction_adr_default[table_type_index=0][physical_result_bus=0].mau_action_instruction_adr_default to be 0x0.
-Configuring rams.match.merge.mau_action_instruction_adr_mask[table_type_index=0][physical_result_bus=0].mau_action_instruction_adr_mask to be 0x1.
-Configuring rams.match.merge.next_table_format_data[logical_table_id=1].match_next_table_adr_miss_value to be 0xff.
-Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x3 (previous_value=0x1 OR new_value=0x2).
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=0].mau_action_instruction_adr_map_data to be 0x2080.
-Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
-Configuring dp.imem.imem_subword8[unit_number=18][vliw_instruction_number=0].imem_subword8_instr to be 0x592.
-Configuring dp.imem.imem_subword8[unit_number=18][vliw_instruction_number=0].imem_subword8_color to be 1.
-Configuring dp.imem.imem_subword8[unit_number=18][vliw_instruction_number=0].imem_subword8_parity to be 0.
-Micro instruction added in VLIW 0 for 8-bit position 18 for table egress_pkt.
- Assembled as 0x592 (or decimal 1426)
- Micro Instruction deposit-field for PHV Container 82 has bit width 20
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x0 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x0 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-Configuring dp.imem.imem_subword16[unit_number=17][vliw_instruction_number=0].imem_subword16_instr to be 0x39fc01.
-Configuring dp.imem.imem_subword16[unit_number=17][vliw_instruction_number=0].imem_subword16_color to be 1.
-Configuring dp.imem.imem_subword16[unit_number=17][vliw_instruction_number=0].imem_subword16_parity to be 0.
-Micro instruction added in VLIW 0 for 16-bit position 17 for table egress_pkt.
- Assembled as 0x39fc01 (or decimal 3800065)
- Micro Instruction deposit-field for PHV Container 145 has bit width 23
- Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
-
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=6].actionmux_din_power_ctl to be 0x4. (previous value = 0x0 OR new value = 0x4)
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=10].actionmux_din_power_ctl to be 0x3. (previous value = 0x0 OR new value = 0x3)
-Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=0].action_instruction_adr_payload_shifter_en to be 1.
-+------------------------------------------------------------------------
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 10.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 0.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 1.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 10.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay1 to be 0.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 1.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=0].adr_dist_pipe_delay to be 0.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=1].adr_dist_pipe_delay to be 0.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=0].adr_dist_pipe_delay to be 0.
-Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=1].adr_dist_pipe_delay to be 0.
-Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x3.
-Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=1].exact_match_phys_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x3.
-Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=1].exact_match_phys_result_en to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=0].exact_match_phys_result_thread to be 0x1.
-Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=1].exact_match_phys_result_thread to be 0x0.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_internal_delay_fifo to be 14.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_output_delay_fifo to be 19.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_delay_fifo_en to be 1.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_internal_delay_fifo to be 14.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_output_delay_fifo to be 0.
-Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_delay_fifo_en to be 1.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_ingress to be 0x0.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_egress to be 0x0.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_ingress to be 0x0.
-Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_egress to be 0x0.
---------------------------------------------
-Configuration for unused statistics ALUs.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=0].mau_cfg_stats_alu_lt to be 0xf.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=1].mau_cfg_stats_alu_lt to be 0xf.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=2].mau_cfg_stats_alu_lt to be 0xf.
-Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=3].mau_cfg_stats_alu_lt to be 0xf.
-+------------------------------------------------------------------------
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
-Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_delay to be 0.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_delay to be 0.
-Configuring rams.match.merge.tcam_match_error_ctl[dir=1].tcam_match_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.tind_ecc_error_ctl[dir=1].tind_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_o_err_en to be 1.
-Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_delay to be 0.
-Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_delay to be 0.
-+------------------------------------------------------------------------
-Configuring dp.action_output_delay[direction_index=0].action_output_delay to be 17.
-Configuring dp.pipelength_added_stages[direction_index=0].pipelength_added_stages to be 0.
-Configuring dp.cur_stage_dependency_on_prev[direction_index=0].cur_stage_dependency_on_prev to be 0.
-Configuring dp.next_stage_dependency_on_cur[direction_index=0].next_stage_dependency_on_cur to be 0.
-Configuring dp.action_output_delay[direction_index=1].action_output_delay to be 17.
-Configuring dp.pipelength_added_stages[direction_index=1].pipelength_added_stages to be 0.
-Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 0.
-Configuring dp.next_stage_dependency_on_cur[direction_index=1].next_stage_dependency_on_cur to be 2.
-Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 0.
-Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 0.
-Configuring dp.phv_fifo_enable.phv_fifo_ingress_action_output_enable to be 1.
-Configuring dp.phv_fifo_enable.phv_fifo_ingress_final_output_enable to be 0.
-Configuring dp.phv_fifo_enable.phv_fifo_egress_action_output_enable to be 1.
-Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
-
-+------------------------------------------------------------------------
-| MAU Stage 1
-+------------------------------------------------------------------------
-
-+------------------------------------------------------------------------
-| Working on table _condition_1 in stage 1 ---
-+------------------------------------------------------------------------
---> Stage Gateway Table for condition _condition_1 in stage 1
-Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=0].mau_match_input_xbar_exact_match_enable to be 0x2. (old value = 0x0 OR new value = 0x2)
Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=0].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=12].match_input_xbar_816b_ctl_address to be 4.
+Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=12].match_input_xbar_816b_ctl_address to be 3.
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=12].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 12 to come from 8-bit PHV container 4.
+Configuring match input crossbar byte 12 to come from 8-bit PHV container 3.
That PHV byte contains {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x10. (previous value = 0x0 OR new value = 0x10)
+Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x8. (previous value = 0x0 OR new value = 0x8)
Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x2. (previous value = 0x0 OR new value = 0x2)
Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
Configuring dp.xbar_hash.hash.galois_field_matrix[byte_pair_index=6][hash_bit_index=40].byte0 to be 0x2.
@@ -386,7 +77,7 @@
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][0] to be 0xffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][1] to be 0xfffffe
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0x10
-Configuring rams.match.merge.gateway_next_table_lut[0][4] to be 0x30
+Configuring rams.match.merge.gateway_next_table_lut[0][4] to be 0x1
Configuring rams.match.merge.gateway_en.gateway_en to be 0x1
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_select to be 0xf
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_enable to be 0x1
@@ -396,7 +87,110 @@
Configuring rams.match.merge.gateway_payload_match_adr[0][0][1].gateway_payload_match_adr to be 0x7ffff
+------------------------------------------------------------------------
-| Working on table table0__action__ in stage 1 ---
+| Working on table process_packet_out_table__action__ in stage 0 ---
++------------------------------------------------------------------------
+--> Action Data Table process_packet_out_table__action__ with logical_table_id 1 that is reference type is 'direct'
+
++------------------------------------------------------------------------
+| Working on table process_packet_out_table in stage 0 ---
++------------------------------------------------------------------------
+--> Match Table with no key process_packet_out_table with logical_table_id 1
+allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
+Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x1 OR new_value=0x2).
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_select to be 1 (logical table id).
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=0][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_select to be 1 (logical table id).
+Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=2][result_bus_number=1].enabled_4bit_muxctl_enable to be 1.
+Configuring rams.match.merge.mau_action_instruction_adr_default[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_default to be 0x40.
+Configuring rams.match.merge.mau_action_instruction_adr_mask[table_type_index=0][physical_result_bus=1].mau_action_instruction_adr_mask to be 0x0.
+Configuring rams.match.merge.next_table_format_data[logical_table_id=1].match_next_table_adr_miss_value to be 0x20.
+Configuring rams.match.merge.next_table_format_data[logical_table_id=1].match_next_table_adr_default to be 0x20.
+Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x2 (previous_value=0x0 OR new_value=0x2).
+Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=0].mau_action_instruction_adr_map_data to be 0x45.
+Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=2].imem_subword16_instr to be 0x74412.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=2].imem_subword16_color to be 1.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=2].imem_subword16_parity to be 0.
+Micro instruction added in VLIW 2 for 16-bit position 2 for table process_packet_out_table.
+ Assembled as 0x74412 (or decimal 476178)
+ Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=2].imem_subword8_instr to be 0x74d83.
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=2].imem_subword8_color to be 1.
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=2].imem_subword8_parity to be 1.
+Micro instruction added in VLIW 2 for 8-bit position 3 for table process_packet_out_table.
+ Assembled as 0x74d83 (or decimal 478595)
+ Micro Instruction deposit-field for PHV Container 67 has bit width 20
+ Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
+ Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
+ Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
+ Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
+
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x8. (previous value = 0x0 OR new value = 0x8)
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x6. (previous value = 0x0 OR new value = 0x6)
+--> Stage Gateway Table for condition process_packet_out_table_always_true_condition in stage 0
+Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x2).
+Configuring dp.mau_match_input_xbar_exact_match_enable[direction_index=0].mau_match_input_xbar_exact_match_enable to be 0x2. (old value = 0x2 OR new value = 0x0)
+Configuring dp.xbar_hash.xbar.mau_match_input_xbar_ternary_match_enable[direction_index=0].mau_match_input_xbar_ternary_match_enable to be 0x0. (old value = 0x0 OR new value = 0x0)
+Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x2. (previous value = 0x2 OR new value = 0x0)
+Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=1].parity_group_mask to be 0x0. (previous value = 0x0 OR new value = 0x0)
+Configuring dp.hashout_ctl.hash_group_ingress_enable to be 0x1. (previous value = 0x1 OR new value = 0x1)
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data0_select to be 0x1
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_data1_select to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash0_select to be 0x1
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_input_hash1_select to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_logical_table to be 0x1
+Configuring rams.array.row[7].gateway_table[0].gateway_table_ctl.gateway_table_thread to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_matchdata_xor_en.gateway_table_matchdata_xor_en to be 0x0
+Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid0 to be 0x3
+Configuring rams.array.row[7].gateway_table[0].gateway_table_vv_entry[3].gateway_table_entry_versionvalid1 to be 0x3
+Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][0] to be 0xffffffff
+Configuring rams.array.row[7].gateway_table[0].gateway_table_entry_matchdata[3][1] to be 0xffffffff
+Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][0] to be 0xffffff
+Configuring rams.array.row[7].gateway_table[0].gateway_table_data_entry[3][1] to be 0xffffff
+Configuring rams.match.merge.gateway_inhibit_lut[1] to be 0x8
+Configuring rams.match.merge.gateway_next_table_lut[1][3] to be 0x20
+Configuring rams.match.merge.gateway_inhibit_lut[1] to be 0x18 (previous value 0x8 OR new value 0x10)
+Configuring rams.match.merge.gateway_next_table_lut[1][4] to be 0x20
+Configuring rams.match.merge.gateway_en.gateway_en to be 0x3 (previous value 0x1 OR new value 0x2)
+Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_select to be 0xe
+Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[1].enabled_4bit_muxctl_enable to be 0x1
+allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
+Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_logical_select to be 0x1
+Configuring rams.match.merge.gateway_to_pbus_xbar_ctl[1].exact_inhibit_enable to be 0x1
+Configuring rams.match.merge.gateway_payload_exact_pbus[0].gateway_payload_exact_pbus to be 0x2
+Configuring rams.match.merge.gateway_payload_data[0][1][0][0].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_data[0][1][1][0].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_data[0][1][0][1].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_data[0][1][1][1].gateway_payload_data to be 0x0
+Configuring rams.match.merge.gateway_payload_match_adr[0][1][0].gateway_payload_match_adr to be 0x7ffff
+Configuring rams.match.merge.gateway_payload_match_adr[0][1][1].gateway_payload_match_adr to be 0x7ffff
+Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=1].action_instruction_adr_payload_shifter_en to be 1.
+
++------------------------------------------------------------------------
+| Working on table table0__action__ in stage 0 ---
+------------------------------------------------------------------------
--> Action Data Table table0__action__ with logical_table_id 0 that is reference type is 'direct'
Configuring rams.array.row[row=6].action_hv_xbar.action_hv_ixbar_input_bytemask[array_half=1].action_hv_ixbar_input_bytemask to be 0x3.
@@ -465,12 +259,12 @@
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=10].match_input_xbar_816b_ctl_enable to be 1.
Configuring match input crossbar byte 10 to come from 16-bit PHV container 3.
That PHV byte contains {ipv4.srcAddr[7:0]}.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=11].match_input_xbar_816b_ctl_address to be 1.
+Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=11].match_input_xbar_816b_ctl_address to be 0.
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=11].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 11 to come from 8-bit PHV container 1.
+Configuring match input crossbar byte 11 to come from 8-bit PHV container 0.
That PHV byte contains {ipv4.srcAddr[23:16]}.
Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=0].match_input_xbar_din_power_ctl to be 0x26. (previous value = 0x0 OR new value = 0x26)
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x12. (previous value = 0x10 OR new value = 0x2)
+Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x9. (previous value = 0x8 OR new value = 0x1)
Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=8].match_input_xbar_din_power_ctl to be 0x8. (previous value = 0x0 OR new value = 0x8)
Configuring dp.xbar_hash.hash.hash_seed[output_bit=0].hash_seed to be 0x1 (previous value = 0x0 OR new value = 0x1)
Configuring dp.xbar_hash.hash.parity_group_mask[parity_group_mask_index=0][byte_number=0].parity_group_mask to be 0x3. (previous value = 0x2 OR new value = 0x3)
@@ -496,15 +290,15 @@
Configuring rams.match.merge.mau_hash_group_xbar_ctl[output_type_index=1][control_group_index=0].mau_hash_group_xbar_ctl to be 0x8 (old value = 0x0 OR new value = 0x8).
+------------------------------------------------------------------------
-| Working on table table0 in stage 1 ---
+| Working on table table0 in stage 0 ---
+------------------------------------------------------------------------
--> Ternary Match Table table0 with logical_table_id 0
-Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
-Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x1 OR new_value=0x1).
+Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.merge.logical_table_thread[copy_index=0].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.merge.logical_table_thread[copy_index=1].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.merge.logical_table_thread[copy_index=2].logical_table_thread_ingress to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x1).
+Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x1).
Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=1][result_bus_number=0].enabled_4bit_muxctl_select to be 0 (logical table id).
Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=1][result_bus_number=0].enabled_4bit_muxctl_enable to be 1.
Configuring rams.match.merge.match_to_logical_table_ixbar_outputmap[match_index=3][result_bus_number=0].enabled_4bit_muxctl_select to be 0 (logical table id).
@@ -517,9 +311,9 @@
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=1][logical_table=0][entry_index=0].mau_action_instruction_adr_map_data to be 0x870a080.
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=1][logical_table=0][entry_index=1].mau_action_instruction_adr_map_data to be 0x44.
Configuring rams.match.merge.next_table_map_en to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data0 to be 0x30.
-Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data1 to be 0x20.
-Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x30.
+Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data0 to be 0x20.
+Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data1 to be 0x10.
+Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x20.
Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_mask to be 0x1.
Configuring rams.match.merge.mau_immediate_data_mask[table_type_index=1][result_bus_number=0].mau_immediate_data_mask to be 0x0.
Configuring rams.match.merge.mau_stats_adr_mask[table_type_index=1][result_bus_number=0].mau_stats_adr_mask to be 0xffffe.
@@ -583,19 +377,19 @@
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=141].match_input_xbar_816b_ctl_enable to be 1.
Configuring match input crossbar byte 141 to come from 16-bit PHV container 4.
That PHV byte contains {ethernet.dstAddr[7:0]}.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=142].match_input_xbar_816b_ctl_address to be 3.
+Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=142].match_input_xbar_816b_ctl_address to be 2.
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=142].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 142 to come from 8-bit PHV container 3.
+Configuring match input crossbar byte 142 to come from 8-bit PHV container 2.
That PHV byte contains {ethernet.srcAddr[39:32]}.
-Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=143].match_input_xbar_816b_ctl_address to be 2.
+Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=143].match_input_xbar_816b_ctl_address to be 1.
Configuring dp.xbar_hash.xbar.match_input_xbar_816b_ctl[word_group=0][output_byte=143].match_input_xbar_816b_ctl_enable to be 1.
-Configuring match input crossbar byte 143 to come from 8-bit PHV container 2.
+Configuring match input crossbar byte 143 to come from 8-bit PHV container 1.
That PHV byte contains {ethernet.dstAddr[47:40]}.
Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=0].match_input_xbar_din_power_ctl to be 0x3e. (previous value = 0x26 OR new value = 0x18)
-Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0x1e. (previous value = 0x12 OR new value = 0xc)
+Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=4].match_input_xbar_din_power_ctl to be 0xf. (previous value = 0x9 OR new value = 0x6)
Configuring dp.match_input_xbar_din_power_ctl[14_byte_group=0][byte_position=8].match_input_xbar_din_power_ctl to be 0x39. (previous value = 0x8 OR new value = 0x31)
---> Idletime Table for match table table0 in stage 1
+--> Idletime Table for match table table0 in stage 0
Looking at Map RAM: Row 7 Unit 0
Configuring rams.map_alu.row[row=7].vh_xbars.adr_dist_idletime_adr_xbar_ctl[map_ram_index=0].enabled_4bit_muxctl_select to be select of 0.
Configuring rams.map_alu.row[row=7].vh_xbars.adr_dist_idletime_adr_xbar_ctl[map_ram_index=0].enabled_4bit_muxctl_select to be select of 1.
@@ -652,7 +446,7 @@
Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x4. (previous value = 0x0 OR new value = 0x4)
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x6. (previous value = 0x6 OR new value = 0x4)
Configuring dp.imem.imem_subword16[unit_number=6][vliw_instruction_number=1].imem_subword16_instr to be 0xc7a06.
Configuring dp.imem.imem_subword16[unit_number=6][vliw_instruction_number=1].imem_subword16_color to be 0.
Configuring dp.imem.imem_subword16[unit_number=6][vliw_instruction_number=1].imem_subword16_parity to be 1.
@@ -677,13 +471,28 @@
Field opcode [9:0] : 0x31e (10 bits in instruction bits [19:10])
Field unused [2:0] : 0x0 (3 bits in instruction bits [22:20])
-Configuring dp.imem.imem_subword8[unit_number=0][vliw_instruction_number=1].imem_subword8_instr to be 0x590.
-Configuring dp.imem.imem_subword8[unit_number=0][vliw_instruction_number=1].imem_subword8_color to be 1.
-Configuring dp.imem.imem_subword8[unit_number=0][vliw_instruction_number=1].imem_subword8_parity to be 1.
-Micro instruction added in VLIW 1 for 8-bit position 0 for table table0.
- Assembled as 0x590 (or decimal 1424)
- Micro Instruction deposit-field for PHV Container 64 has bit width 20
- Field Src2 [3:0] : 0x0 (4 bits in instruction bits [3:0])
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=1].imem_subword16_instr to be 0x4602.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=1].imem_subword16_color to be 1.
+Configuring dp.imem.imem_subword16[unit_number=2][vliw_instruction_number=1].imem_subword16_parity to be 1.
+Micro instruction added in VLIW 1 for 16-bit position 2 for table table0.
+ Assembled as 0x4602 (or decimal 17922)
+ Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=1].imem_subword8_instr to be 0x593.
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=1].imem_subword8_color to be 1.
+Configuring dp.imem.imem_subword8[unit_number=3][vliw_instruction_number=1].imem_subword8_parity to be 1.
+Micro instruction added in VLIW 1 for 8-bit position 3 for table table0.
+ Assembled as 0x593 (or decimal 1427)
+ Micro Instruction deposit-field for PHV Container 67 has bit width 20
+ Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -692,14 +501,30 @@
Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring dp.imem.imem_subword8[unit_number=5][vliw_instruction_number=2].imem_subword8_instr to be 0xb7d95.
-Configuring dp.imem.imem_subword8[unit_number=5][vliw_instruction_number=2].imem_subword8_color to be 0.
-Configuring dp.imem.imem_subword8[unit_number=5][vliw_instruction_number=2].imem_subword8_parity to be 1.
-Micro instruction added in VLIW 2 for 8-bit position 5 for table table0.
- Assembled as 0xb7d95 (or decimal 753045)
- Micro Instruction deposit-field for PHV Container 69 has bit width 20
- Field Src2 [3:0] : 0x5 (4 bits in instruction bits [3:0])
+Configuring dp.imem.imem_subword16[unit_number=1][vliw_instruction_number=1].imem_subword16_instr to be 0x39fc01.
+Configuring dp.imem.imem_subword16[unit_number=1][vliw_instruction_number=1].imem_subword16_color to be 1.
+Configuring dp.imem.imem_subword16[unit_number=1][vliw_instruction_number=1].imem_subword16_parity to be 0.
+Micro instruction added in VLIW 1 for 16-bit position 1 for table table0.
+ Assembled as 0x39fc01 (or decimal 3800065)
+ Micro Instruction deposit-field for PHV Container 129 has bit width 23
+ Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
+
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x8. (previous value = 0x8 OR new value = 0x8)
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=8].actionmux_din_power_ctl to be 0x7. (previous value = 0x6 OR new value = 0x7)
+Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=2].imem_subword8_instr to be 0xb7d94.
+Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=2].imem_subword8_color to be 0.
+Configuring dp.imem.imem_subword8[unit_number=4][vliw_instruction_number=2].imem_subword8_parity to be 0.
+Micro instruction added in VLIW 2 for 8-bit position 4 for table table0.
+ Assembled as 0xb7d94 (or decimal 753044)
+ Micro Instruction deposit-field for PHV Container 68 has bit width 20
+ Field Src2 [3:0] : 0x4 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -708,7 +533,7 @@
Field right_rotate [2:0] : 0x3 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x1 (1 bits in instruction bits [19:19])
-Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x21. (previous value = 0x1 OR new value = 0x20)
+Configuring dp.actionmux_din_power_ctl[14_byte_group=0][byte_position=4].actionmux_din_power_ctl to be 0x18. (previous value = 0x8 OR new value = 0x10)
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=1][result_bus=0].idletime_adr_payload_shifter_en to be 1.
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=1][result_bus=0].stats_adr_payload_shifter_en to be 1.
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=1][result_bus=0].actiondata_adr_payload_shifter_en to be 1.
@@ -822,7 +647,7 @@
Configuring cfg_regs.mau_cfg_movereg_tcam_only.mau_cfg_movereg_tcam_only to be 0x1. (previous value = 0x0 OR new value = 0x1)
+------------------------------------------------------------------------
-| Working on table table0_counter in stage 1 ---
+| Working on table table0_counter in stage 0 ---
+------------------------------------------------------------------------
Configuring rams.array.switchbox.row[row=6].ctl.r_stats_alu_o_mux_select.r_stats_alu_o_sel_stats_rd_r_i to be 1.
Configuring rams.array.row[row=6].ram[col=6].unit_ram_ctl.match_ram_write_data_mux_select to be select of 0.
@@ -908,24 +733,24 @@
Configuring rams.match.adrdist.movereg_ad_stats_alu_to_logical_xbar_ctl[logical_index=0].movereg_ad_stats_alu_to_logical_xbar_ctl be 0x7. ( previous value = 0x0 OR new value = 0x7)
Configuring rams.match.adrdist.mau_ad_stats_virt_lt[meter_alu_index=3].mau_ad_stats_virt_lt be 0x1.
+------------------------------------------------------------------------
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 21.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 9.
-Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 3.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 12.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 1.
Configuring rams.match.merge.exact_match_delay_thread[copy_index=0].exact_match_delay_thread to be 0x1. (previous value = 0x0 OR new value = 0x1)
Configuring rams.match.merge.exact_match_delay_thread[copy_index=1].exact_match_delay_thread to be 0x1. (previous value = 0x0 OR new value = 0x1)
Configuring rams.match.merge.exact_match_delay_thread[copy_index=2].exact_match_delay_thread to be 0x1. (previous value = 0x0 OR new value = 0x1)
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 10.
Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay1 to be 0.
-Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 1.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=0].adr_dist_pipe_delay to be 0.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=1].adr_dist_pipe_delay to be 0.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=0].adr_dist_pipe_delay to be 0.
Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=1].adr_dist_pipe_delay to be 0.
-Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x1.
-Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x3.
+Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x2.
+Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x2.
Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=1].exact_match_phys_result_delay to be 0x0.
-Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x2.
Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=1].exact_match_phys_result_en to be 0x0.
Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=0].exact_match_phys_result_thread to be 0x0.
Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=1].exact_match_phys_result_thread to be 0x0.
@@ -948,18 +773,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -979,28 +804,28 @@
Configuring dp.next_stage_dependency_on_cur[direction_index=0].next_stage_dependency_on_cur to be 0.
Configuring dp.action_output_delay[direction_index=1].action_output_delay to be 17.
Configuring dp.pipelength_added_stages[direction_index=1].pipelength_added_stages to be 0.
-Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 2.
+Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 0.
Configuring dp.next_stage_dependency_on_cur[direction_index=1].next_stage_dependency_on_cur to be 2.
-Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 1.
-Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 2.
+Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 0.
+Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 0.
Configuring dp.phv_fifo_enable.phv_fifo_ingress_action_output_enable to be 1.
Configuring dp.phv_fifo_enable.phv_fifo_ingress_final_output_enable to be 0.
Configuring dp.phv_fifo_enable.phv_fifo_egress_action_output_enable to be 1.
Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+------------------------------------------------------------------------
-| MAU Stage 2
+| MAU Stage 1
+------------------------------------------------------------------------
+------------------------------------------------------------------------
-| Working on table ecmp_group_table__action__ in stage 2 ---
+| Working on table ecmp_group_table__action__ in stage 1 ---
+------------------------------------------------------------------------
--> Action Data Table ecmp_group_table__action__ with logical_table_id 0 that is reference type is 'direct'
Configuring rams.match.adrdist.immediate_data_16b_ixbar_ctl[logical_table_concat_hi_lo_half=0].enabled_4bit_muxctl_select to be 4.
Configuring rams.match.adrdist.immediate_data_16b_ixbar_ctl[logical_table_concat_hi_lo_half=0].enabled_4bit_muxctl_enable to be 1.
+------------------------------------------------------------------------
-| Working on table ecmp_group_table in stage 2 ---
+| Working on table ecmp_group_table in stage 1 ---
+------------------------------------------------------------------------
--> Hash Match Table ecmp_group_table with logical_table_id 0
Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
@@ -1020,8 +845,8 @@
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=0][entry_index=0].mau_action_instruction_adr_map_data to be 0x41.
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=0][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
Configuring rams.match.merge.next_table_map_en to be 0x1 (previous_value=0x0 OR new_value=0x1).
-Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data0 to be 0x30.
-Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x30.
+Configuring rams.match.merge.next_table_map_data[logical_table_id=0][entry_index=0].next_table_map_data0 to be 0x20.
+Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_miss_value to be 0x20.
Configuring rams.match.merge.next_table_format_data[logical_table_id=0].match_next_table_adr_mask to be 0x0.
Configuring rams.match.merge.mau_immediate_data_mask[table_type_index=0][result_bus_number=14].mau_immediate_data_mask to be 0xffff.
Configuring rams.match.merge.mau_stats_adr_mask[table_type_index=0][result_bus_number=14].mau_stats_adr_mask to be 0xffffe.
@@ -1818,7 +1643,7 @@
Configuring rams.match.merge.col[col_number=4].hitmap_output_map[hit_signal=14].enabled_4bit_muxctl_enable to be 1.
+------------------------------------------------------------------------
-| Working on table ecmp_group_table_counter in stage 2 ---
+| Working on table ecmp_group_table_counter in stage 1 ---
+------------------------------------------------------------------------
Configuring rams.array.switchbox.row[row=6].ctl.r_stats_alu_o_mux_select.r_stats_alu_o_sel_stats_rd_r_i to be 1.
Configuring rams.array.row[row=6].ram[col=6].unit_ram_ctl.match_ram_write_data_mux_select to be select of 0.
@@ -1940,18 +1765,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -1981,13 +1806,13 @@
Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+------------------------------------------------------------------------
-| MAU Stage 3
+| MAU Stage 2
+------------------------------------------------------------------------
+------------------------------------------------------------------------
-| Working on table _condition_2 in stage 3 ---
+| Working on table _condition_2 in stage 2 ---
+------------------------------------------------------------------------
---> Stage Gateway Table for condition _condition_2 in stage 3
+--> Stage Gateway Table for condition _condition_2 in stage 2
Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x1 (previous_value=0x0 OR new_value=0x1).
@@ -2036,7 +1861,7 @@
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][0] to be 0xffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[3][1] to be 0xffff3f
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0x8
-Configuring rams.match.merge.gateway_next_table_lut[0][3] to be 0x31
+Configuring rams.match.merge.gateway_next_table_lut[0][3] to be 0x21
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[2].gateway_table_entry_versionvalid0 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[2].gateway_table_entry_versionvalid1 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[2][0] to be 0xffffffff
@@ -2044,15 +1869,15 @@
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[2][0] to be 0xffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[2][1] to be 0xff7fff
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0xc (previous value 0x8 OR new value 0x4)
-Configuring rams.match.merge.gateway_next_table_lut[0][2] to be 0x31
+Configuring rams.match.merge.gateway_next_table_lut[0][2] to be 0x21
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[1].gateway_table_entry_versionvalid0 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_vv_entry[1].gateway_table_entry_versionvalid1 to be 0x3
Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[1][0] to be 0xffffffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_entry_matchdata[1][1] to be 0xffffffff
-Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[1][0] to be 0xffff
+Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[1][0] to be 0x1ffff
Configuring rams.array.row[7].gateway_table[1].gateway_table_data_entry[1][1] to be 0xffff
Configuring rams.match.merge.gateway_inhibit_lut[0] to be 0xe (previous value 0xc OR new value 0x2)
-Configuring rams.match.merge.gateway_next_table_lut[0][1] to be 0x31
+Configuring rams.match.merge.gateway_next_table_lut[0][1] to be 0x21
Configuring rams.match.merge.gateway_en.gateway_en to be 0x1
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_select to be 0xf
Configuring rams.match.merge.gateway_to_logicaltable_xbar_ctl[0].enabled_4bit_muxctl_enable to be 0x1
@@ -2068,12 +1893,12 @@
Configuring rams.match.merge.gateway_payload_match_adr[0][1][1].gateway_payload_match_adr to be 0x7ffff
+------------------------------------------------------------------------
-| Working on table ingress_port_count_table__action__ in stage 3 ---
+| Working on table ingress_port_count_table__action__ in stage 2 ---
+------------------------------------------------------------------------
--> Action Data Table ingress_port_count_table__action__ with logical_table_id 0 that is reference type is 'direct'
+------------------------------------------------------------------------
-| Working on table ingress_port_count_table in stage 3 ---
+| Working on table ingress_port_count_table in stage 2 ---
+------------------------------------------------------------------------
--> Match Table with no key ingress_port_count_table with logical_table_id 0
allocated_result_bus = Ram Data Bus MatchResult2R 0 left_and_right is 83 bits
@@ -2099,12 +1924,12 @@
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=1].action_instruction_adr_payload_shifter_en to be 1.
+------------------------------------------------------------------------
-| Working on table egress_port_count_table__action__ in stage 3 ---
+| Working on table egress_port_count_table__action__ in stage 2 ---
+------------------------------------------------------------------------
--> Action Data Table egress_port_count_table__action__ with logical_table_id 1 that is reference type is 'direct'
+------------------------------------------------------------------------
-| Working on table egress_port_count_table in stage 3 ---
+| Working on table egress_port_count_table in stage 2 ---
+------------------------------------------------------------------------
--> Match Table with no key egress_port_count_table with logical_table_id 1
allocated_result_bus = Ram Data Bus MatchResult1R 0 left_and_right is 83 bits
@@ -2126,7 +1951,7 @@
Configuring rams.match.merge.mau_action_instruction_adr_map_en[table_type_index=0].mau_action_instruction_adr_map_en to be 0x3 (previous_value=0x1 OR new_value=0x2).
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=0].mau_action_instruction_adr_map_data to be 0x40.
Configuring rams.match.merge.mau_action_instruction_adr_map_data[table_type_index=0][logical_table=1][entry_index=1].mau_action_instruction_adr_map_data to be 0x0.
---> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 3
+--> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 2
Configuring rams.match.merge.predication_ctl[direction_index=0].table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=0].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
Configuring rams.match.adrdist.adr_dist_table_thread[direction_index=0][copy_index=1].adr_dist_table_thread to be 0x3 (previous_value=0x3 OR new_value=0x2).
@@ -2171,7 +1996,7 @@
Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=0].action_instruction_adr_payload_shifter_en to be 1.
+------------------------------------------------------------------------
-| Working on table ingress_port_counter in stage 3 ---
+| Working on table ingress_port_counter in stage 2 ---
+------------------------------------------------------------------------
Configuring rams.array.switchbox.row[row=4].ctl.r_stats_alu_o_mux_select.r_stats_alu_o_sel_stats_rd_r_i to be 1.
Configuring rams.array.row[row=4].ram[col=6].unit_ram_ctl.match_ram_write_data_mux_select to be select of 0.
@@ -2255,7 +2080,7 @@
Configuring rams.match.adrdist.mau_ad_stats_virt_lt[meter_alu_index=2].mau_ad_stats_virt_lt be 0x1.
+------------------------------------------------------------------------
-| Working on table egress_port_counter in stage 3 ---
+| Working on table egress_port_counter in stage 2 ---
+------------------------------------------------------------------------
Configuring rams.array.switchbox.row[row=6].ctl.r_stats_alu_o_mux_select.r_stats_alu_o_sel_stats_rd_r_i to be 1.
Configuring rams.array.row[row=6].ram[col=6].unit_ram_ctl.match_ram_write_data_mux_select to be select of 0.
@@ -2374,18 +2199,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2415,6 +2240,88 @@
Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+------------------------------------------------------------------------
+| MAU Stage 3
++------------------------------------------------------------------------
++------------------------------------------------------------------------
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay0 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_delay1 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=0].start_table_fifo_enable to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay0 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_delay1 to be 0.
+Configuring rams.match.merge.predication_ctl[direction_index=1].start_table_fifo_enable to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=0].adr_dist_pipe_delay to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=0][copy_index=1].adr_dist_pipe_delay to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=0].adr_dist_pipe_delay to be 0.
+Configuring rams.match.adrdist.adr_dist_pipe_delay[direction_index=1][copy_index=1].adr_dist_pipe_delay to be 0.
+Configuring rams.match.merge.exact_match_logical_result_delay.exact_match_logical_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_logical_result_en.exact_match_logical_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=0].exact_match_phys_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_delay[array_half_index=1].exact_match_phys_result_delay to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=0].exact_match_phys_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_en[array_half_index=1].exact_match_phys_result_en to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=0].exact_match_phys_result_thread to be 0x0.
+Configuring rams.match.merge.exact_match_phys_result_thread[array_half_index=1].exact_match_phys_result_thread to be 0x0.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_internal_delay_fifo to be 14.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_output_delay_fifo to be 0.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=0].eop_delay_fifo_en to be 1.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_internal_delay_fifo to be 14.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_output_delay_fifo to be 0.
+Configuring rams.match.adrdist.deferred_eop_bus_delay[direction_index=1].eop_delay_fifo_en to be 1.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_ingress to be 0x0.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=0].meter_alu_thread_egress to be 0x0.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_ingress to be 0x0.
+Configuring rams.match.merge.meter_alu_thread[duplication_index=1].meter_alu_thread_egress to be 0x0.
+--------------------------------------------
+Configuration for unused statistics ALUs.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=0].mau_cfg_stats_alu_lt to be 0xf.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=1].mau_cfg_stats_alu_lt to be 0xf.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=2].mau_cfg_stats_alu_lt to be 0xf.
+Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=3].mau_cfg_stats_alu_lt to be 0xf.
++------------------------------------------------------------------------
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
+Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_delay to be 0.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=0].emm_ecc_error_ctl_delay to be 0.
+Configuring rams.match.merge.tcam_match_error_ctl[dir=1].tcam_match_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.tind_ecc_error_ctl[dir=1].tind_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_o_err_en to be 1.
+Configuring rams.match.merge.gfm_parity_error_ctl[dir=1].gfm_parity_error_ctl_delay to be 0.
+Configuring rams.match.merge.emm_ecc_error_ctl[dir=1].emm_ecc_error_ctl_delay to be 0.
++------------------------------------------------------------------------
+Configuring dp.action_output_delay[direction_index=0].action_output_delay to be 17.
+Configuring dp.pipelength_added_stages[direction_index=0].pipelength_added_stages to be 0.
+Configuring dp.cur_stage_dependency_on_prev[direction_index=0].cur_stage_dependency_on_prev to be 2.
+Configuring dp.next_stage_dependency_on_cur[direction_index=0].next_stage_dependency_on_cur to be 2.
+Configuring dp.action_output_delay[direction_index=1].action_output_delay to be 17.
+Configuring dp.pipelength_added_stages[direction_index=1].pipelength_added_stages to be 0.
+Configuring dp.cur_stage_dependency_on_prev[direction_index=1].cur_stage_dependency_on_prev to be 2.
+Configuring dp.next_stage_dependency_on_cur[direction_index=1].next_stage_dependency_on_cur to be 2.
+Configuring dp.match_ie_input_mux_sel.match_ie_input_mux_sel to be 0.
+Configuring dp.stage_concurrent_with_prev.stage_concurrent_with_prev to be 3.
+Configuring dp.phv_fifo_enable.phv_fifo_ingress_action_output_enable to be 1.
+Configuring dp.phv_fifo_enable.phv_fifo_ingress_final_output_enable to be 0.
+Configuring dp.phv_fifo_enable.phv_fifo_egress_action_output_enable to be 1.
+Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+
++------------------------------------------------------------------------
| MAU Stage 4
+------------------------------------------------------------------------
+------------------------------------------------------------------------
@@ -2456,18 +2363,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2538,18 +2445,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2620,18 +2527,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2702,18 +2609,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2784,18 +2691,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2866,18 +2773,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -2948,18 +2855,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -3030,18 +2937,18 @@
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=0].phv_ingress_thread to be 0x3f.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=0].phv_ingress_thread_alu to be 0x3f.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=0].phv_ingress_thread_imem to be 0x3f.
-Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x3f.
-Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x3f.
-Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x3f.
+Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=4].phv_ingress_thread to be 0x1f.
+Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=4].phv_ingress_thread_alu to be 0x1f.
+Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=4].phv_ingress_thread_imem to be 0x1f.
Configuring dp.phv_ingress_thread[14_byte_group=0][byte_position=8].phv_ingress_thread to be 0xff.
Configuring dp.phv_ingress_thread_alu[14_byte_group=0][byte_position=8].phv_ingress_thread_alu to be 0xff.
Configuring dp.phv_ingress_thread_imem[14_byte_group=0][byte_position=8].phv_ingress_thread_imem to be 0xff.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x7.
-Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x7.
-Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x7.
-Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x7.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=6].phv_egress_thread to be 0x3.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=6].phv_egress_thread_alu to be 0x3.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=6].phv_egress_thread_imem to be 0x3.
+Configuring dp.phv_egress_thread[14_byte_group=0][byte_position=10].phv_egress_thread to be 0x1.
+Configuring dp.phv_egress_thread_alu[14_byte_group=0][byte_position=10].phv_egress_thread_alu to be 0x1.
+Configuring dp.phv_egress_thread_imem[14_byte_group=0][byte_position=10].phv_egress_thread_imem to be 0x1.
Configuring rams.match.merge.tcam_match_error_ctl[dir=0].tcam_match_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.tind_ecc_error_ctl[dir=0].tind_ecc_error_ctl_o_err_en to be 1.
Configuring rams.match.merge.gfm_parity_error_ctl[dir=0].gfm_parity_error_ctl_o_err_en to be 1.
@@ -3071,7 +2978,7 @@
Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
+------------------------------------------------------------------------
-| Number of configuration field values set in Match-Action Stages: 2168
+| Number of configuration field values set in Match-Action Stages: 2100
+------------------------------------------------------------------------
+------------------------------------------------------------------------
@@ -3084,10 +2991,10 @@
| Stage Number | Exact | Ternary | Statistics | Meter | Selector | Stateful | Dependency |
| | | | | LPF | (max words) | | to Previous |
-----------------------------------------------------------------------------------------------
-| 0 | Yes | No | No | No | No (0) | No | match |
-| 1 | No | Yes | Yes | No | No (0) | No | match |
+| 0 | Yes | Yes | Yes | No | No (0) | No | match |
+| 1 | Yes | No | Yes | No | No (0) | No | match |
| 2 | Yes | No | Yes | No | No (0) | No | match |
-| 3 | Yes | No | Yes | No | No (0) | No | match |
+| 3 | Yes* | No | Yes* | No | No (0) | No | concurrent |
| 4 | Yes* | No | Yes* | No | No (0) | No | concurrent |
| 5 | Yes* | No | Yes* | No | No (0) | No | concurrent |
| 6 | No | No | No | No | No (0) | No | match |
@@ -3106,12 +3013,12 @@
| Stage Number | Exact | Ternary | Statistics | Meter | Selector | Stateful | Dependency |
| | | | | LPF | (max words) | | to Previous |
-----------------------------------------------------------------------------------------------
-| 0 | Yes | No | No | No | No (0) | No | match |
-| 1 | Yes* | No | No | No | No (0) | No | concurrent |
-| 2 | Yes* | No | No | No | No (0) | No | concurrent |
-| 3 | Yes* | No | No | No | No (0) | No | concurrent |
-| 4 | Yes* | No | No | No | No (0) | No | concurrent |
-| 5 | Yes* | No | No | No | No (0) | No | concurrent |
+| 0 | No | No | No | No | No (0) | No | match |
+| 1 | No | No | No | No | No (0) | No | concurrent |
+| 2 | No | No | No | No | No (0) | No | concurrent |
+| 3 | No | No | No | No | No (0) | No | concurrent |
+| 4 | No | No | No | No | No (0) | No | concurrent |
+| 5 | No | No | No | No | No (0) | No | concurrent |
| 6 | No | No | No | No | No (0) | No | match |
| 7 | No | No | No | No | No (0) | No | concurrent |
| 8 | No | No | No | No | No (0) | No | concurrent |
@@ -3131,10 +3038,10 @@
-----------------------------------------------------------------------------------------------------
| Stage Number | Clock Cycles | Predication Cycle | Dependency To Previous | Cycles Add To Latency |
-----------------------------------------------------------------------------------------------------
-| 0 | 20 | 11 | match | 20 |
-| 1 | 22 | 13 | match | 22 |
+| 0 | 22 | 13 | match | 22 |
+| 1 | 20 | 11 | match | 20 |
| 2 | 20 | 11 | match | 20 |
-| 3 | 20 | 11 | match | 20 |
+| 3 | 20 | 11 | concurrent | 1 |
| 4 | 20 | 11 | concurrent | 1 |
| 5 | 20 | 11 | concurrent | 1 |
| 6 | 20 | 11 | match | 20 |
@@ -3145,7 +3052,7 @@
| 11 | 20 | 11 | concurrent | 1 |
-----------------------------------------------------------------------------------------------------
-Total latency for ingress: 113
+Total latency for ingress: 94
Clock Cycles Per Stage For egress:
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.gateway.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.gateway.log
index 570947f..abe1470 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.gateway.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.gateway.log
@@ -1,9 +1,24 @@
+---------------------------------------------------------------------+
| Log file: mau.gateway.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
+
+========================================================
+ Run Gateway Placement on Request List of size 0
+========================================================
+
+
+========================================================
+ Run Gateway Placement on Request List of size 0
+========================================================
+
+
+========================================================
+ Run Gateway Placement on Request List of size 0
+========================================================
+
valid:
f = packet_out_hdr
const:
@@ -110,7 +125,7 @@
match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
Search bus 0 on row 7
- final_parity_group_ids = [(0, []), (1, [])]
+ final_parity_group_ids = [(0, [0]), (1, [0])]
open_parity_group_ids = [0, 1]
----------------------------
@@ -120,13 +135,13 @@
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (68, 0)
+ (67, 0)
Byte Position 1
- (68, 0)
+ (67, 0)
Byte Position 2
- (68, 0)
+ (67, 0)
Byte Position 3
- (68, 0)
+ (67, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -245,7 +260,7 @@
[42] = None
[43] = None
Hash Bit Mapping:
- (0, 1) --> 40
+ (12, 1) --> 40
Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
Allocating: Gateway 15 in stage 0 for _condition_0.
@@ -341,7 +356,7 @@
match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
Search bus 0 on row 7
- final_parity_group_ids = [(0, []), (1, [])]
+ final_parity_group_ids = [(0, [0]), (1, [0])]
open_parity_group_ids = [0, 1]
----------------------------
@@ -351,13 +366,13 @@
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (68, 0)
+ (67, 0)
Byte Position 1
- (68, 0)
+ (67, 0)
Byte Position 2
- (68, 0)
+ (67, 0)
Byte Position 3
- (68, 0)
+ (67, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -476,42 +491,26 @@
[42] = None
[43] = None
Hash Bit Mapping:
- (0, 1) --> 40
+ (12, 1) --> 40
Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
Allocating: Gateway 15 in stage 0 for _condition_0.
-
-========================================================
- Run Gateway Placement on Request List of size 0
-========================================================
-
-
-========================================================
- Run Gateway Placement on Request List of size 0
-========================================================
-
-
-========================================================
- Run Gateway Placement on Request List of size 0
-========================================================
-
valid:
- f = packet_out_hdr
const:
xor:
-Gateway Resource Request for P4 table _condition_1 with handle 117440514 in stage 1
+Gateway Resource Request for P4 table process_packet_out_table_always_true_condition with handle -1 in stage 0
Validity checks:
- Field --validity_check--packet_out_hdr [0:0]
+ <none>
Fields to check against constants:
<none>
Field pairs to compare to each other:
<none>
-Gateway Resource Request for table _condition_1 needs access to 1 input bits
+Gateway Resource Request for table process_packet_out_table_always_true_condition needs access to 0 input bits
========================================================
- Run Gateway Placement on Request List of size 1
+ Run Gateway Placement on Request List of size 2
========================================================
Available Gateways are: (16)
@@ -605,19 +604,19 @@
open_parity_group_ids = [0, 1]
----------------------------
- Trying to place Gateway Resource Request for table _condition_1 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
+ Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
----------------------------
--------------
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (68, 0)
+ (67, 0)
Byte Position 1
- (68, 0)
+ (67, 0)
Byte Position 2
- (68, 0)
+ (67, 0)
Byte Position 3
- (68, 0)
+ (67, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -738,11 +737,149 @@
Hash Bit Mapping:
(12, 1) --> 40
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
-Allocating: Gateway 15 in stage 1 for _condition_1.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
+Allocating: Gateway 15 in stage 0 for _condition_0.
+Available Gateways are: (15)
+Gateway 0
+Gateway 1
+Gateway 2
+Gateway 3
+Gateway 4
+Gateway 5
+Gateway 6
+Gateway 7
+Gateway 8
+Gateway 9
+Gateway 10
+Gateway 11
+Gateway 12
+Gateway 13
+Gateway 14
+------- Phase 0 -------------
+Looking at gateway table 14
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [1], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f7a2415a190>, 0)])), (1, (None, [], None, [], []))])
+Search bus 0 on row 7
+----------------------------
+ Trying to place Gateway Resource Request for table process_packet_out_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [1]) and hash group 0 for gateway 14.
+----------------------------
+Gateway data search bus packing is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ [44] = None
+ [45] = None
+ [46] = None
+ [47] = None
+ [48] = None
+ [49] = None
+ [50] = None
+ [51] = None
+ [52] = None
+ [53] = None
+ [54] = None
+ [55] = None
+ [56] = None
+ [57] = None
+ [58] = None
+ [59] = None
+ [60] = None
+ [61] = None
+ [62] = None
+ [63] = None
+ Move Byte Mapping:
+
+Final Gateway Key is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ Hash Bit Mapping:
+
+Allocating: Gateway 14 in stage 0 for process_packet_out_table_always_true_condition.
========================================================
- Run Gateway Placement on Request List of size 1
+ Run Gateway Placement on Request List of size 2
========================================================
Available Gateways are: (16)
@@ -836,19 +973,19 @@
open_parity_group_ids = [0, 1]
----------------------------
- Trying to place Gateway Resource Request for table _condition_1 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
+ Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
----------------------------
--------------
Call to _place_fields_for_constant_comparison
constant_match_key_partition is:
Byte Position 0
- (68, 0)
+ (67, 0)
Byte Position 1
- (68, 0)
+ (67, 0)
Byte Position 2
- (68, 0)
+ (67, 0)
Byte Position 3
- (68, 0)
+ (67, 0)
Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
Available data bytes for constants are [0, 1, 2, 3]
@@ -969,8 +1106,146 @@
Hash Bit Mapping:
(12, 1) --> 40
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1 for gateway
-Allocating: Gateway 15 in stage 1 for _condition_1.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
+Allocating: Gateway 15 in stage 0 for _condition_0.
+Available Gateways are: (15)
+Gateway 0
+Gateway 1
+Gateway 2
+Gateway 3
+Gateway 4
+Gateway 5
+Gateway 6
+Gateway 7
+Gateway 8
+Gateway 9
+Gateway 10
+Gateway 11
+Gateway 12
+Gateway 13
+Gateway 14
+------- Phase 0 -------------
+Looking at gateway table 14
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [1], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f7a2370eb50>, 0)])), (1, (None, [], None, [], []))])
+Search bus 0 on row 7
+----------------------------
+ Trying to place Gateway Resource Request for table process_packet_out_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [1]) and hash group 0 for gateway 14.
+----------------------------
+Gateway data search bus packing is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ [44] = None
+ [45] = None
+ [46] = None
+ [47] = None
+ [48] = None
+ [49] = None
+ [50] = None
+ [51] = None
+ [52] = None
+ [53] = None
+ [54] = None
+ [55] = None
+ [56] = None
+ [57] = None
+ [58] = None
+ [59] = None
+ [60] = None
+ [61] = None
+ [62] = None
+ [63] = None
+ Move Byte Mapping:
+
+Final Gateway Key is:
+ [0] = None
+ [1] = None
+ [2] = None
+ [3] = None
+ [4] = None
+ [5] = None
+ [6] = None
+ [7] = None
+ [8] = None
+ [9] = None
+ [10] = None
+ [11] = None
+ [12] = None
+ [13] = None
+ [14] = None
+ [15] = None
+ [16] = None
+ [17] = None
+ [18] = None
+ [19] = None
+ [20] = None
+ [21] = None
+ [22] = None
+ [23] = None
+ [24] = None
+ [25] = None
+ [26] = None
+ [27] = None
+ [28] = None
+ [29] = None
+ [30] = None
+ [31] = None
+ [32] = None
+ [33] = None
+ [34] = None
+ [35] = None
+ [36] = None
+ [37] = None
+ [38] = None
+ [39] = None
+ [40] = None
+ [41] = None
+ [42] = None
+ [43] = None
+ Hash Bit Mapping:
+
+Allocating: Gateway 14 in stage 0 for process_packet_out_table_always_true_condition.
========================================================
Run Gateway Placement on Request List of size 0
@@ -990,7 +1265,7 @@
const:
f = ig_intr_md_for_tm.ucast_egress_port
xor:
-Gateway Resource Request for P4 table _condition_2 with handle 117440515 in stage 3
+Gateway Resource Request for P4 table _condition_2 with handle 117440514 in stage 2
Validity checks:
<none>
Fields to check against constants:
@@ -1245,8 +1520,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 3 for gateway
-Allocating: Gateway 15 in stage 3 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
+Allocating: Gateway 15 in stage 2 for _condition_2.
========================================================
Run Gateway Placement on Request List of size 1
@@ -1492,8 +1767,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 3 for gateway
-Allocating: Gateway 15 in stage 3 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
+Allocating: Gateway 15 in stage 2 for _condition_2.
========================================================
Run Gateway Placement on Request List of size 1
@@ -1739,12 +2014,12 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 3 for gateway
-Allocating: Gateway 15 in stage 3 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
+Allocating: Gateway 15 in stage 2 for _condition_2.
valid:
const:
xor:
-Gateway Resource Request for P4 table egress_port_count_table_always_true_condition with handle -1 in stage 3
+Gateway Resource Request for P4 table egress_port_count_table_always_true_condition with handle -1 in stage 2
Validity checks:
<none>
Fields to check against constants:
@@ -1999,8 +2274,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 3 for gateway
-Allocating: Gateway 15 in stage 3 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
+Allocating: Gateway 15 in stage 2 for _condition_2.
Available Gateways are: (15)
Gateway 0
Gateway 1
@@ -2019,7 +2294,7 @@
Gateway 14
------- Phase 0 -------------
Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f4523770f50>, 0)])), (1, (None, [], None, [], []))])
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f7a27906250>, 0)])), (1, (None, [], None, [], []))])
Search bus 0 on row 7
----------------------------
Trying to place Gateway Resource Request for table egress_port_count_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
@@ -2138,7 +2413,7 @@
[43] = None
Hash Bit Mapping:
-Allocating: Gateway 14 in stage 3 for egress_port_count_table_always_true_condition.
+Allocating: Gateway 14 in stage 2 for egress_port_count_table_always_true_condition.
========================================================
Run Gateway Placement on Request List of size 2
@@ -2384,8 +2659,8 @@
(0, 6) --> 47
(0, 7) --> 48
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 3 for gateway
-Allocating: Gateway 15 in stage 3 for _condition_2.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2 for gateway
+Allocating: Gateway 15 in stage 2 for _condition_2.
Available Gateways are: (15)
Gateway 0
Gateway 1
@@ -2404,7 +2679,7 @@
Gateway 14
------- Phase 0 -------------
Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f451ff9a750>, 0)])), (1, (None, [], None, [], []))])
+match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f7a23e259d0>, 0)])), (1, (None, [], None, [], []))])
Search bus 0 on row 7
----------------------------
Trying to place Gateway Resource Request for table egress_port_count_table_always_true_condition needs access to 0 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
@@ -2523,798 +2798,4 @@
[43] = None
Hash Bit Mapping:
-Allocating: Gateway 14 in stage 3 for egress_port_count_table_always_true_condition.
-valid:
-const:
- f = ig_intr_md_for_tm.copy_to_cpu
-xor:
-Gateway Resource Request for P4 table _condition_3 with handle 117440516 in stage 0
- Validity checks:
- <none>
- Fields to check against constants:
- Field ig_intr_md_for_tm.copy_to_cpu [0:0]
- Field pairs to compare to each other:
- <none>
-
-Gateway Resource Request for table _condition_3 needs access to 1 input bits
-
-
-========================================================
- Run Gateway Placement on Request List of size 2
-========================================================
-
-Available Gateways are: (16)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-Gateway 15
-------- Phase 0 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 13
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 12
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 11
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 10
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 9
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 8
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 7
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 6
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 5
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 4
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 3
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 2
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 1
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-Looking at gateway table 0
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-------- Phase 1 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-
- final_parity_group_ids = [(0, []), (1, [])]
-
- open_parity_group_ids = [0, 1]
-----------------------------
- Trying to place Gateway Resource Request for table _condition_3 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (80, 0)
-Byte Position 1
- (80, 0)
-Byte Position 2
- (80, 0)
-Byte Position 3
- (80, 0)
-
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 40 in hash match group 0 for ('ig_intr_md_for_tm.copy_to_cpu', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = (('ig_intr_md_for_tm.copy_to_cpu', 0), 'exact')
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (0, 0) --> 40
-
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
-Allocating: Gateway 15 in stage 0 for _condition_3.
-Available Gateways are: (15)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-------- Phase 0 -------------
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f4524221d10>, 0)])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-----------------------------
- Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (68, 0)
-Byte Position 1
- (68, 0)
-Byte Position 2
- (68, 0)
-Byte Position 3
- (68, 0)
-
-Removing available byte Byte 8 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 10 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 14 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 41 in hash match group 0 for ('--validity_check--packet_out_hdr', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = (('--validity_check--packet_out_hdr', 0), 'exact')
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (1, 1) --> 41
-
-Allocating: Gateway 14 in stage 0 for _condition_0.
-
-========================================================
- Run Gateway Placement on Request List of size 2
-========================================================
-
-Available Gateways are: (16)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-Gateway 15
-------- Phase 0 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-Search bus 1 on row 7
-Looking at gateway table 13
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 12
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 6
-Search bus 1 on row 6
-Looking at gateway table 11
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 10
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 5
-Search bus 1 on row 5
-Looking at gateway table 9
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 8
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 4
-Search bus 1 on row 4
-Looking at gateway table 7
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 6
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 3
-Search bus 1 on row 3
-Looking at gateway table 5
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 4
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 2
-Search bus 1 on row 2
-Looking at gateway table 3
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 2
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 1
-Search bus 1 on row 1
-Looking at gateway table 1
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-Looking at gateway table 0
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 0
-Search bus 1 on row 0
-------- Phase 1 -------------
-Looking at gateway table 15
-match_groups_attached_to_gateway = OrderedDict([(0, (None, [], None, [], [])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-
- final_parity_group_ids = [(0, []), (1, [])]
-
- open_parity_group_ids = [0, 1]
-----------------------------
- Trying to place Gateway Resource Request for table _condition_3 needs access to 1 input bits in exact match group 0 (parity groups [0, 1]) and hash group 0 for gateway 15.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (80, 0)
-Byte Position 1
- (80, 0)
-Byte Position 2
- (80, 0)
-Byte Position 3
- (80, 0)
-
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 40 in hash match group 0 for ('ig_intr_md_for_tm.copy_to_cpu', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = (('ig_intr_md_for_tm.copy_to_cpu', 0), 'exact')
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (0, 0) --> 40
-
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 0 for gateway
-Allocating: Gateway 15 in stage 0 for _condition_3.
-Available Gateways are: (15)
-Gateway 0
-Gateway 1
-Gateway 2
-Gateway 3
-Gateway 4
-Gateway 5
-Gateway 6
-Gateway 7
-Gateway 8
-Gateway 9
-Gateway 10
-Gateway 11
-Gateway 12
-Gateway 13
-Gateway 14
-------- Phase 0 -------------
-Looking at gateway table 14
-match_groups_attached_to_gateway = OrderedDict([(0, (0, [0], 0, [0], [(<p4c_tofino.target.tofino.device.pipeline.mau.match_keys.packed_gateway_key.PackedGatewayKey object at 0x7f451fb32a10>, 0)])), (1, (None, [], None, [], []))])
-Search bus 0 on row 7
-----------------------------
- Trying to place Gateway Resource Request for table _condition_0 needs access to 1 input bits in exact match group 0 (parity groups [0]) and hash group 0 for gateway 14.
-----------------------------
---------------
-Call to _place_fields_for_constant_comparison
-constant_match_key_partition is:
-Byte Position 0
- (68, 0)
-Byte Position 1
- (68, 0)
-Byte Position 2
- (68, 0)
-Byte Position 3
- (68, 0)
-
-Removing available byte Byte 8 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 10 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Removing available byte Byte 14 is of type exact and member of group 0 (parity group 1) with 16 bytes. because not in available parity group(s) [0]
-Available bytes in ram word is [0, 1, 2, 3, 4, 5, 6, 7]
-Available data bytes for constants are [0, 1, 2, 3]
-Put all gateway constant field bits into the hash bits.
-Allocating: Hash Bit 41 in hash match group 0 for ('--validity_check--packet_out_hdr', 0).
-Gateway data search bus packing is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = None
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- [44] = None
- [45] = None
- [46] = None
- [47] = None
- [48] = None
- [49] = None
- [50] = None
- [51] = None
- [52] = None
- [53] = None
- [54] = None
- [55] = None
- [56] = None
- [57] = None
- [58] = None
- [59] = None
- [60] = None
- [61] = None
- [62] = None
- [63] = None
- Move Byte Mapping:
-
-Final Gateway Key is:
- [0] = None
- [1] = None
- [2] = None
- [3] = None
- [4] = None
- [5] = None
- [6] = None
- [7] = None
- [8] = None
- [9] = None
- [10] = None
- [11] = None
- [12] = None
- [13] = None
- [14] = None
- [15] = None
- [16] = None
- [17] = None
- [18] = None
- [19] = None
- [20] = None
- [21] = None
- [22] = None
- [23] = None
- [24] = None
- [25] = None
- [26] = None
- [27] = None
- [28] = None
- [29] = None
- [30] = None
- [31] = None
- [32] = None
- [33] = (('--validity_check--packet_out_hdr', 0), 'exact')
- [34] = None
- [35] = None
- [36] = None
- [37] = None
- [38] = None
- [39] = None
- [40] = None
- [41] = None
- [42] = None
- [43] = None
- Hash Bit Mapping:
- (1, 1) --> 41
-
-Allocating: Gateway 14 in stage 0 for _condition_0.
+Allocating: Gateway 14 in stage 2 for egress_port_count_table_always_true_condition.
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.gw.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.gw.log
index 82dead8..cb1e05b 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.gw.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.gw.log
@@ -1,124 +1,79 @@
+---------------------------------------------------------------------+
| Log file: mau.gw.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
-cond _condition_0: valid packet_out_hdr
- valid packet_out_hdr
- ! not valid packet_out_hdr
-cond _condition_0 can be gateway (1+0)x1
-cond !_condition_0 can be gateway (1+0)x1
-_condition_0 is gateway for ingress_pkt
-cond _condition_1: not valid packet_out_hdr
+cond _condition_0: not valid packet_out_hdr
not valid packet_out_hdr
! not not valid packet_out_hdr
-cond _condition_1 can be gateway (1+0)x1
-cond !_condition_1 can be gateway (1+0)x1
-_condition_1 is gateway for table0
-cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 254
- ig_intr_md_for_tm.ucast_egress_port < 254
- ! ig_intr_md_for_tm.ucast_egress_port >= 254
+cond _condition_0 can be gateway (1+0)x1
+cond !_condition_0 can be gateway (1+0)x1
+_condition_0 is gateway for table0
+cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 510
+ ig_intr_md_for_tm.ucast_egress_port < 510
+ ! ig_intr_md_for_tm.ucast_egress_port >= 510
cond _condition_2 can be gateway (9+0)x1
cond !_condition_2 can be gateway (9+0)x1
_condition_2 is gateway for ingress_port_count_table
-cond _condition_3: ig_intr_md_for_tm.copy_to_cpu == 1
- ig_intr_md_for_tm.copy_to_cpu == 1
- ! ig_intr_md_for_tm.copy_to_cpu != 1
-cond _condition_3 can be gateway (0+1)x1
-cond !_condition_3 can be gateway (0+1)x2
-_condition_3 is gateway for egress_pkt
-fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f4524612110>]) and and xor_fields is OrderedSet()
+fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f7a28437c10>]) and and xor_fields is OrderedSet()
fields = OrderedSet() and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f45246123d0>])
-fields = OrderedSet() and and xor_fields is OrderedSet()
-cond _condition_0: valid packet_out_hdr
- valid packet_out_hdr
- ! not valid packet_out_hdr
-cond _condition_0 can be gateway (1+0)x1
-cond !_condition_0 can be gateway (1+0)x1
-_condition_0 is gateway for ingress_pkt
-cond _condition_1: not valid packet_out_hdr
+cond _condition_0: not valid packet_out_hdr
not valid packet_out_hdr
! not not valid packet_out_hdr
-cond _condition_1 can be gateway (1+0)x1
-cond !_condition_1 can be gateway (1+0)x1
-_condition_1 is gateway for table0
-cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 254
- ig_intr_md_for_tm.ucast_egress_port < 254
- ! ig_intr_md_for_tm.ucast_egress_port >= 254
+cond _condition_0 can be gateway (1+0)x1
+cond !_condition_0 can be gateway (1+0)x1
+_condition_0 is gateway for table0
+cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 510
+ ig_intr_md_for_tm.ucast_egress_port < 510
+ ! ig_intr_md_for_tm.ucast_egress_port >= 510
cond _condition_2 can be gateway (9+0)x1
cond !_condition_2 can be gateway (9+0)x1
_condition_2 is gateway for ingress_port_count_table
-cond _condition_3: ig_intr_md_for_tm.copy_to_cpu == 1
- ig_intr_md_for_tm.copy_to_cpu == 1
- ! ig_intr_md_for_tm.copy_to_cpu != 1
-cond _condition_3 can be gateway (0+1)x1
-cond !_condition_3 can be gateway (0+1)x2
-_condition_3 is gateway for egress_pkt
-fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f4524612110>]) and and xor_fields is OrderedSet()
+fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f7a28437c10>]) and and xor_fields is OrderedSet()
fields = OrderedSet() and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f45246123d0>])
-fields = OrderedSet() and and xor_fields is OrderedSet()
-cond _condition_0: valid packet_out_hdr
- valid packet_out_hdr
- ! not valid packet_out_hdr
-cond _condition_0 can be gateway (1+0)x1
-cond !_condition_0 can be gateway (1+0)x1
-_condition_0 is gateway for ingress_pkt
-cond _condition_1: not valid packet_out_hdr
+cond _condition_0: not valid packet_out_hdr
not valid packet_out_hdr
! not not valid packet_out_hdr
-cond _condition_1 can be gateway (1+0)x1
-cond !_condition_1 can be gateway (1+0)x1
-_condition_1 is gateway for table0
-cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 254
- ig_intr_md_for_tm.ucast_egress_port < 254
- ! ig_intr_md_for_tm.ucast_egress_port >= 254
+cond _condition_0 can be gateway (1+0)x1
+cond !_condition_0 can be gateway (1+0)x1
+_condition_0 is gateway for table0
+cond _condition_2: ig_intr_md_for_tm.ucast_egress_port < 510
+ ig_intr_md_for_tm.ucast_egress_port < 510
+ ! ig_intr_md_for_tm.ucast_egress_port >= 510
cond _condition_2 can be gateway (9+0)x1
cond !_condition_2 can be gateway (9+0)x1
_condition_2 is gateway for ingress_port_count_table
-cond _condition_3: ig_intr_md_for_tm.copy_to_cpu == 1
- ig_intr_md_for_tm.copy_to_cpu == 1
- ! ig_intr_md_for_tm.copy_to_cpu != 1
-cond _condition_3 can be gateway (0+1)x1
-cond !_condition_3 can be gateway (0+1)x2
-_condition_3 is gateway for egress_pkt
-fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f4524612110>]) and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet()
-fields = OrderedSet() and and xor_fields is OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f45246123d0>])
+fields = OrderedSet([<p4_hlir.hlir.p4_headers.p4_field object at 0x7f7a28437c10>]) and and xor_fields is OrderedSet()
fields = OrderedSet() and and xor_fields is OrderedSet()
cond _always_true: True == True
True
! False
+cond _always_true: True == True
+ True
+ ! False
--> Stage Gateway Table for condition _condition_0 in stage 0
-T -> ingress_pkt(0), F -> _condition_1(16)
-building tcam for GatewayTest('valid packet_out_hdr')
- adding line (match=200000000 mask=200000000 T)
-tcam data: [(match=200000000 mask=200000000 T)]
-final.tcam: [(match=200000000 mask=200000000 T)], miss=False
---> Stage Gateway Table for condition _condition_3 in stage 0
-T -> egress_pkt(1), F -> None(255)
-building tcam for GatewayTest('ig_intr_md_for_tm.copy_to_cpu == 1')
- adding line (match=100000000 mask=100000000 T)
-tcam data: [(match=100000000 mask=100000000 T)]
-final.tcam: [(match=100000000 mask=100000000 T)], miss=False
---> Stage Gateway Table for condition _condition_1 in stage 1
-T -> table0(16), F -> _condition_2(48)
+T -> table0(0), F -> process_packet_out_table(1)
building tcam for GatewayTest('not valid packet_out_hdr')
adding line (match=0 mask=100000000 T)
tcam data: [(match=0 mask=100000000 T)]
final.tcam: [(match=0 mask=100000000 T)], miss=False
---> Stage Gateway Table for condition _condition_2 in stage 3
-T -> ingress_port_count_table(48), F -> None(255)
-building tcam for GatewayTest('ig_intr_md_for_tm.ucast_egress_port < 254')
+--> Stage Gateway Table for condition process_packet_out_table_always_true_condition in stage 0
+T -> process_packet_out_table(1), F -> process_packet_out_table(1)
+building tcam for GatewayTest('True')
+ adding line (match=0 mask=0 T)
+tcam data: [(match=0 mask=0 T)]
+final.tcam: [(match=0 mask=0 T)], miss=False
+--> Stage Gateway Table for condition _condition_2 in stage 2
+T -> ingress_port_count_table(32), F -> None(255)
+building tcam for GatewayTest('ig_intr_md_for_tm.ucast_egress_port < 510')
adding line (range=[ffff ffff 3fff] match=0 mask=0 T)
adding line (range=[ffff 7fff ffff] match=0 mask=0 T)
- adding line (range=[0 ffff ffff] match=0 mask=0 T)
-tcam data: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[0 ffff ffff] match=0 mask=0 T)]
-final.tcam: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[0 ffff ffff] match=0 mask=0 T)], miss=False
---> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 3
-T -> egress_port_count_table(49), F -> egress_port_count_table(49)
+ adding line (range=[1 ffff ffff] match=0 mask=0 T)
+tcam data: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[1 ffff ffff] match=0 mask=0 T)]
+final.tcam: [(range=[ffff ffff 3fff] match=0 mask=0 T), (range=[ffff 7fff ffff] match=0 mask=0 T), (range=[1 ffff ffff] match=0 mask=0 T)], miss=False
+--> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 2
+T -> egress_port_count_table(33), F -> egress_port_count_table(33)
building tcam for GatewayTest('True')
adding line (match=0 mask=0 T)
tcam data: [(match=0 mask=0 T)]
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.log
index 8b5f74c..4628e6b 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.log
@@ -1,27 +1,27 @@
+---------------------------------------------------------------------+
| Log file: mau.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
Match Table table0 did not specify the number of entries required. A default value (512) will be used.
Match Table ecmp_group_table did not specify the number of entries required. A default value (1024) will be used.
Match Entry Table table0 has already been associated with stat Table table0_counter.
Match Entry Table ecmp_group_table has already been associated with stat Table ecmp_group_table_counter.
-Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
+Cannot implement table0 in phase 0 resources because table uses side effect tables.
Match Table table0 did not specify the number of entries required. A default value (512) will be used.
Match Table ecmp_group_table did not specify the number of entries required. A default value (1024) will be used.
Match Entry Table table0 has already been associated with stat Table table0_counter.
Match Entry Table ecmp_group_table has already been associated with stat Table ecmp_group_table_counter.
-Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
+Cannot implement table0 in phase 0 resources because table uses side effect tables.
Match Table table0 did not specify the number of entries required. A default value (512) will be used.
Match Table ecmp_group_table did not specify the number of entries required. A default value (1024) will be used.
-POV/metadata bridge containers added between ingress/egress: [0, 64, 128]
+POV/metadata bridge containers added between ingress/egress: [0]
Metadata bridge_ingress_intrinsic containers added between ingress/egress: [128]
Match Entry Table table0 has already been associated with stat Table table0_counter.
Match Entry Table ecmp_group_table has already been associated with stat Table ecmp_group_table_counter.
Match table ingress_port_count_table has no match key fields
-Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 254.
+Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 510.
##########################################
Call to decide_action_data_placement(stage=0, table=ingress_port_count_table)
@@ -83,7 +83,7 @@
Best Ram Usage is 97 rams
Best Immediate placement is 0 bits
Match table egress_port_count_table has no match key fields
-Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 254.
+Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 510.
##########################################
Call to decide_action_data_placement(stage=0, table=egress_port_count_table)
@@ -146,16 +146,16 @@
Best Immediate placement is 0 bits
##########################################
- Call to decide_action_data_placement(stage=0, table=ingress_pkt)
+ Call to decide_action_data_placement(stage=0, table=process_packet_out_table)
##########################################
Max immediate bits used in any action is 0 bits.
-Overhead bit width for table ingress_pkt is 2 bits.
+Overhead bit width for table process_packet_out_table is 0 bits.
Bits available in overhead for non-essential immediate data is 32 bits.
~~~~~~~~~~~~~~~~~~~~~
Examining placing 0 bits in match overhead
-Overhead bit width for table ingress_pkt is 2 bits.
+Overhead bit width for table process_packet_out_table is 0 bits.
Overhead SRAMs to use = 97
Entries requested = 1024 and match entries get = 0
ram_size_matrix =
@@ -172,73 +172,13 @@
total action ram packing size = [0, 0, 0]
action_ram_packing:
- action _packet_out has []
+ action _process_packet_out has []
total action ram packing size = [0, 0, 0]
action_ram_packing:
- action _packet_out has []
+ action _process_packet_out has []
total action ram packing size = [0, 0, 0]
action_ram_packing:
- action _packet_out has []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-Action Data SRAMs to use = 0
-TODO: Total RAMs use when put 0 bits in match overhead: 97
-TODO: Total RAMs use when put 0 bits in match overhead: 97
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 8 bits in match overhead
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 16 bits in match overhead
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 24 bits in match overhead
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 32 bits in match overhead
-
-##########################################
-
-Best Ram Usage is 97 rams
-Best Immediate placement is 0 bits
-
-##########################################
- Call to decide_action_data_placement(stage=0, table=egress_pkt)
-##########################################
-
-
-Max immediate bits used in any action is 0 bits.
-Overhead bit width for table egress_pkt is 2 bits.
-Bits available in overhead for non-essential immediate data is 32 bits.
-~~~~~~~~~~~~~~~~~~~~~
- Examining placing 0 bits in match overhead
-Overhead bit width for table egress_pkt is 2 bits.
-Overhead SRAMs to use = 97
- Entries requested = 1024 and match entries get = 0
-ram_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-immediate_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-hash_to_phv_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
+ action _process_packet_out has []
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
@@ -501,100 +441,18 @@
Best Ram Usage is 3 rams
Best Immediate placement is 16 bits
-Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
-
-----------------------------------------------
-Call to Allocate P4 Table with table ingress_pkt__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-ram_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-immediate_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-hash_to_phv_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action _packet_out has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action _packet_out has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action _packet_out has []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-Allocating Action Logical Table ID 0 in stage 0
-
-----------------------------------------------
-Call to Allocate P4 Table with table ingress_pkt, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-Logical Table ID in stage 0 was not supplied by table placement for table ingress_pkt.
-Allocating Logical Table ID 0 in stage 0
-Allocating Table Type ID 0 of type exact in stage 0
-Match Overhead:
- Field --version_valid-- [3:0] (4 bits)
- Field --instruction_address-- [1:0] (2 bits)
-
-Logical Table ID in stage 0 was not supplied by table placement for table ingress_pkt.
-Allocating Logical Table ID 0 in stage 0
-Allocating Table Type ID 0 of type exact in stage 0
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Match Table Resource Request is:
-SRAM Resource Request for table ingress_pkt (of type match), with 0 ways wants 0 rams.
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-For action _packet_out, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 130 has bit width 23
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-
-For action _packet_out, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 68 has bit width 20
- Field Src2 [3:0] : 0x4 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-Allocating Action ALU 2 (16 bits) in stage 0 for match table ingress_pkt's action _packet_out
-Allocating Action ALU 4 (8 bits) in stage 0 for match table ingress_pkt's action _packet_out
-Allocating VLIW Instruction : 0 in stage 0 for match table ingress_pkt's action _packet_out
+Cannot implement table0 in phase 0 resources because table uses side effect tables.
----------------------------------------------
Call to Allocate P4 Table with table table0__action__, number_entries = 512, table id = None, and match type = exact
- Allocating in stage 1
+ Allocating in stage 0
----------------------------------------------
ram_size_matrix =
(8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
0 0 0 1 0 0 0 0 # 0
0 0 0 1 0 0 0 0 # 1
- 0 0 0 0 0 0 0 0 # 2
+ 0 0 0 1 0 0 0 0 # 2
0 0 0 0 0 0 0 0 # 3
immediate_size_matrix =
@@ -615,7 +473,7 @@
action_ram_packing:
action set_egress_port has [(16, 16, False)]
action ecmp_group has [(16, 16, False)]
- action send_to_cpu has []
+ action send_to_cpu has [(16, 16, False)]
action _drop has []
total action ram packing size = [16, 0, 0]
action_ram_packing:
@@ -630,14 +488,14 @@
action send_to_cpu has [(16, 0, False)]
action _drop has [(16, 0, False)]
byte_enables = [1, 1]
-Allocating Action Parameter Bus Byte 32 in stage 1 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 33 in stage 1 for Byte 1 of 16-bit constant
-Allocating Action Parameter Bus Byte 34 in stage 1 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 35 in stage 1 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 32 in stage 0 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 33 in stage 0 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 34 in stage 0 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 35 in stage 0 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)]
final packing is [(16, 16, False)]
final packing is [(16, 16, False)]
-final packing is []
+final packing is [(16, 16, False)]
final packing is []
byte_enables = []
After allocation of 32s, available_slots is []
@@ -646,10 +504,10 @@
final packing is []
final packing is []
byte_enables = [1, 1]
-Allocating Action Parameter Bus Byte 36 in stage 1 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 37 in stage 1 for Byte 1 of 16-bit constant
-Allocating Action Parameter Bus Byte 38 in stage 1 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 39 in stage 1 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 36 in stage 0 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 37 in stage 0 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 38 in stage 0 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 39 in stage 0 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 2, 0), (32, 9, 0), (16, 3, 16)]
final packing is [(16, 0, False)]
final packing is [(16, 16, False)]
@@ -688,8 +546,8 @@
hash_bits_in_units = OrderedDict([(0, [0])])
address_left_shift = 0
-------------------
-Allocating Hash Distribution Group 0/0 for table table0__action__ in stage 1.
-Allocating Hash Bit 0 in hash match group 0 for table table0__action__ in stage 1.
+Allocating Hash Distribution Group 0/0 for table table0__action__ in stage 0.
+Allocating Hash Bit 0 in hash match group 0 for table table0__action__ in stage 0.
seed = 0x7bd5c66f
set the seed to be [1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]
Hash Function 0
@@ -746,17 +604,17 @@
hash_bit_50 = 0
hash_bit_51 = 0
-Allocating Action Logical Table ID 0 in stage 1
+Allocating Action Logical Table ID 0 in stage 0
----------------------------------------------
Call to Allocate P4 Table with table table0_counter, number_entries = 512, table id = None, and match type = exact
- Allocating in stage 1
+ Allocating in stage 0
----------------------------------------------
stat_stage_table referenced: direct
stat Table Resource Request is:
SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
-Sram Resource Request for P4 table table0_counter with handle 67108867 of type statistics in stage 1
+Sram Resource Request for P4 table table0_counter with handle 67108867 of type statistics in stage 0
table_type : statistics
rams_for_width : 1
use_stash : False
@@ -772,12 +630,12 @@
----------------------------------------------
Call to Allocate P4 Table with table table0, number_entries = 512, table id = None, and match type = ternary
- Allocating in stage 1
+ Allocating in stage 0
----------------------------------------------
-Logical Table ID in stage 1 was not supplied by table placement for table table0.
-Allocating Logical Table ID 0 in stage 1
-Allocating Table Type ID 0 of type ternary in stage 1
+Logical Table ID in stage 0 was not supplied by table placement for table table0.
+Allocating Logical Table ID 0 in stage 0
+Allocating Table Type ID 0 of type ternary in stage 0
-----------------------------------------
Call to allocate_ternary_match_key_2
@@ -806,9 +664,9 @@
{--unused--[3:0], ethernet.dstAddr[47:40], ethernet.srcAddr[39:32], ethernet.dstAddr[7:0], ig_intr_md.ingress_port[7:0], ethernet.etherType[15:8], --version--[1:0], --unused--[1:0], ethernet.srcAddr[47:40], ethernet.dstAddr[23:16], ethernet.etherType[7:0], ethernet.dstAddr[39:24], --unused--[2:0], ig_intr_md.ingress_port[8:8], ethernet.dstAddr[15:8], ethernet.srcAddr[31:0]}
---------------------------------------------
-Call to can_any_match_key_fields_be_shared(stage=1, table=table0)
+Call to can_any_match_key_fields_be_shared(stage=0, table=table0)
---------------------------------------------
-Decided way to allocate for table table0 in stage 1 WAS non_shared
+Decided way to allocate for table table0 in stage 0 WAS non_shared
-----------------------------------------
Call to allocate_ternary_match_key_2
@@ -849,8 +707,8 @@
Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-Allocating Action ALU 2 (16 bits) in stage 1 for match table table0's action set_egress_port
-Allocating VLIW Instruction : 0 in stage 1 for match table table0's action set_egress_port
+Allocating Action ALU 2 (16 bits) in stage 0 for match table table0's action set_egress_port
+Allocating VLIW Instruction : 0 in stage 0 for match table table0's action set_egress_port
For action ecmp_group, formed micro_instruction:
Micro Instruction alu_a for PHV Container 134 has bit width 23
Field Src2 [3:0] : 0x6 (4 bits in instruction bits [3:0])
@@ -867,12 +725,23 @@
Field opcode [9:0] : 0x31e (10 bits in instruction bits [19:10])
Field unused [2:0] : 0x0 (3 bits in instruction bits [22:20])
-Allocating Action ALU 6 (16 bits) in stage 1 for match table table0's action ecmp_group
-Allocating Action ALU 7 (16 bits) in stage 1 for match table table0's action ecmp_group
-Allocating VLIW Instruction : 1 in stage 1 for match table table0's action ecmp_group
+Allocating Action ALU 6 (16 bits) in stage 0 for match table table0's action ecmp_group
+Allocating Action ALU 7 (16 bits) in stage 0 for match table table0's action ecmp_group
+Allocating VLIW Instruction : 1 in stage 0 for match table table0's action ecmp_group
For action send_to_cpu, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 64 has bit width 20
- Field Src2 [3:0] : 0x0 (4 bits in instruction bits [3:0])
+Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x1 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+For action send_to_cpu, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 67 has bit width 20
+ Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -881,11 +750,24 @@
Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-Allocating Action ALU 0 (8 bits) in stage 1 for match table table0's action send_to_cpu
-Allocating VLIW Instruction : 1 in stage 1 for match table table0's action send_to_cpu
+For action send_to_cpu, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 129 has bit width 23
+ Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
+
+Allocating Action ALU 2 (16 bits) in stage 0 for match table table0's action send_to_cpu
+Allocating Action ALU 3 (8 bits) in stage 0 for match table table0's action send_to_cpu
+Allocating Action ALU 1 (16 bits) in stage 0 for match table table0's action send_to_cpu
+Allocating VLIW Instruction : 1 in stage 0 for match table table0's action send_to_cpu
For action _drop, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 69 has bit width 20
- Field Src2 [3:0] : 0x5 (4 bits in instruction bits [3:0])
+Micro Instruction deposit-field for PHV Container 68 has bit width 20
+ Field Src2 [3:0] : 0x4 (4 bits in instruction bits [3:0])
Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
@@ -894,8 +776,8 @@
Field right_rotate [2:0] : 0x3 (3 bits in instruction bits [18:16])
Field low_bit_hi [0:0] : 0x1 (1 bits in instruction bits [19:19])
-Allocating Action ALU 5 (8 bits) in stage 1 for match table table0's action _drop
-Allocating VLIW Instruction : 2 in stage 1 for match table table0's action _drop
+Allocating Action ALU 4 (8 bits) in stage 0 for match table table0's action _drop
+Allocating VLIW Instruction : 2 in stage 0 for match table table0's action _drop
Ternary table Pack Format =
Pack Format:
table_word_width: 141
@@ -932,8 +814,89 @@
----------------------------------------------
+Call to Allocate P4 Table with table process_packet_out_table__action__, number_entries = 1024, table id = None, and match type = exact
+ Allocating in stage 0
+----------------------------------------------
+
+ram_size_matrix =
+ (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
+ 0 0 0 0 0 0 0 0 # 0
+
+immediate_size_matrix =
+ (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
+ 0 0 0 0 0 0 0 0 # 0
+
+hash_to_phv_matrix =
+ (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
+ 0 0 0 0 0 0 0 0 # 0
+
+total action ram packing size = [0, 0, 0]
+action_ram_packing:
+ action _process_packet_out has []
+total action ram packing size = [0, 0, 0]
+action_ram_packing:
+ action _process_packet_out has []
+total action ram packing size = [0, 0, 0]
+action_ram_packing:
+ action _process_packet_out has []
+byte_enables = []
+After allocation of 32s, available_slots is []
+final packing is []
+byte_enables = []
+After allocation of 32s, available_slots is []
+final packing is []
+byte_enables = []
+After allocation of 32s, available_slots is []
+final packing is []
+Allocating Action Logical Table ID 1 in stage 0
+
+----------------------------------------------
+Call to Allocate P4 Table with table process_packet_out_table, number_entries = 1024, table id = None, and match type = exact
+ Allocating in stage 0
+----------------------------------------------
+
+Logical Table ID in stage 0 was not supplied by table placement for table process_packet_out_table.
+Allocating Logical Table ID 1 in stage 0
+Allocating Table Type ID 0 of type exact in stage 0
+Match Overhead:
+ Field --version_valid-- [3:0] (4 bits)
+
+Logical Table ID in stage 0 was not supplied by table placement for table process_packet_out_table.
+Allocating Logical Table ID 1 in stage 0
+Allocating Table Type ID 0 of type exact in stage 0
+Allocating: Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
+Match Table Resource Request is:
+SRAM Resource Request for table process_packet_out_table (of type match), with 0 ways wants 0 rams.
+Allocating: Byte 12 is of type exact and member of group 0 (parity group 1) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
+For action _process_packet_out, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 130 has bit width 23
+ Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x1 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [3:0] : 0x8 (4 bits in instruction bits [14:11])
+ Field low_bit_lo [0:0] : 0x0 (1 bits in instruction bits [15:15])
+ Field right_rotate [3:0] : 0x7 (4 bits in instruction bits [19:16])
+ Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
+
+For action _process_packet_out, formed micro_instruction:
+Micro Instruction deposit-field for PHV Container 67 has bit width 20
+ Field Src2 [3:0] : 0x3 (4 bits in instruction bits [3:0])
+ Field Src1 [4:0] : 0x18 (5 bits in instruction bits [8:4])
+ Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
+ Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
+ Field high_bit [2:0] : 0x1 (3 bits in instruction bits [13:11])
+ Field low_bit_lo [1:0] : 0x1 (2 bits in instruction bits [15:14])
+ Field right_rotate [2:0] : 0x7 (3 bits in instruction bits [18:16])
+ Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
+
+Allocating Action ALU 2 (16 bits) in stage 0 for match table process_packet_out_table's action _process_packet_out
+Allocating Action ALU 3 (8 bits) in stage 0 for match table process_packet_out_table's action _process_packet_out
+Allocating VLIW Instruction : 2 in stage 0 for match table process_packet_out_table's action _process_packet_out
+
+----------------------------------------------
Call to Allocate P4 Table with table ecmp_group_table__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 2
+ Allocating in stage 1
----------------------------------------------
ram_size_matrix =
@@ -961,26 +924,26 @@
After allocation of 32s, available_slots is []
final packing is []
byte_enables = [1, 1]
-Allocating Action Parameter Bus Byte 32 in stage 2 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 33 in stage 2 for Byte 1 of 16-bit constant
-Allocating Action Parameter Bus Byte 34 in stage 2 for Byte 0 of 16-bit constant
-Allocating Action Parameter Bus Byte 35 in stage 2 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 32 in stage 1 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 33 in stage 1 for Byte 1 of 16-bit constant
+Allocating Action Parameter Bus Byte 34 in stage 1 for Byte 0 of 16-bit constant
+Allocating Action Parameter Bus Byte 35 in stage 1 for Byte 1 of 16-bit constant
After allocation of 32s, available_slots is [(16, 0, 0), (32, 8, 0), (16, 1, 16)]
final packing is [(16, 16, False)]
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
-Allocating Action Logical Table ID 0 in stage 2
+Allocating Action Logical Table ID 0 in stage 1
----------------------------------------------
Call to Allocate P4 Table with table ecmp_group_table_counter, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 2
+ Allocating in stage 1
----------------------------------------------
stat_stage_table referenced: direct
stat Table Resource Request is:
SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
-Sram Resource Request for P4 table ecmp_group_table_counter with handle 67108868 of type statistics in stage 2
+Sram Resource Request for P4 table ecmp_group_table_counter with handle 67108868 of type statistics in stage 1
table_type : statistics
rams_for_width : 1
use_stash : False
@@ -996,12 +959,12 @@
----------------------------------------------
Call to Allocate P4 Table with table ecmp_group_table, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 2
+ Allocating in stage 1
----------------------------------------------
-Logical Table ID in stage 2 was not supplied by table placement for table ecmp_group_table.
-Allocating Logical Table ID 0 in stage 2
-Allocating Table Type ID 0 of type exact in stage 2
+Logical Table ID in stage 1 was not supplied by table placement for table ecmp_group_table.
+Allocating Logical Table ID 0 in stage 1
+Allocating Table Type ID 0 of type exact in stage 1
Match Overhead:
Field --version_valid-- [3:0] (4 bits)
Field --immediate-- [15:0] (16 bits)
@@ -1012,9 +975,9 @@
Allocating: Byte 3 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[15:8]}.
---------------------------------------------
-Call to can_any_match_key_fields_be_shared(stage=2, table=ecmp_group_table)
+Call to can_any_match_key_fields_be_shared(stage=1, table=ecmp_group_table)
---------------------------------------------
-Decided way to allocate for table ecmp_group_table in stage 2 WAS non_shared
+Decided way to allocate for table ecmp_group_table in stage 1 WAS non_shared
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.selector[15:8]}.
Allocating: Byte 2 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ecmp_metadata.groupId[7:0]}.
@@ -1139,12 +1102,12 @@
Field right_rotate [3:0] : 0x0 (4 bits in instruction bits [19:16])
Field low_bit_hi [2:0] : 0x0 (3 bits in instruction bits [22:20])
-Allocating Action ALU 2 (16 bits) in stage 2 for match table ecmp_group_table's action set_egress_port
-Allocating VLIW Instruction : 0 in stage 2 for match table ecmp_group_table's action set_egress_port
+Allocating Action ALU 2 (16 bits) in stage 1 for match table ecmp_group_table's action set_egress_port
+Allocating VLIW Instruction : 0 in stage 1 for match table ecmp_group_table's action set_egress_port
----------------------------------------------
Call to Allocate P4 Table with table ingress_port_count_table__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 3
+ Allocating in stage 2
----------------------------------------------
ram_size_matrix =
@@ -1177,17 +1140,17 @@
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
-Allocating Action Logical Table ID 0 in stage 3
+Allocating Action Logical Table ID 0 in stage 2
----------------------------------------------
-Call to Allocate P4 Table with table ingress_port_counter, number_entries = 254, table id = None, and match type = exact
- Allocating in stage 3
+Call to Allocate P4 Table with table ingress_port_counter, number_entries = 510, table id = None, and match type = exact
+ Allocating in stage 2
----------------------------------------------
stat_stage_table referenced: indirect
stat Table Resource Request is:
SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
-Sram Resource Request for P4 table ingress_port_counter with handle 67108865 of type statistics in stage 3
+Sram Resource Request for P4 table ingress_port_counter with handle 67108865 of type statistics in stage 2
table_type : statistics
rams_for_width : 1
use_stash : False
@@ -1203,20 +1166,20 @@
----------------------------------------------
Call to Allocate P4 Table with table ingress_port_count_table, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 3
+ Allocating in stage 2
----------------------------------------------
-Logical Table ID in stage 3 was not supplied by table placement for table ingress_port_count_table.
-Allocating Logical Table ID 0 in stage 3
-Allocating Table Type ID 0 of type exact in stage 3
+Logical Table ID in stage 2 was not supplied by table placement for table ingress_port_count_table.
+Allocating Logical Table ID 0 in stage 2
+Allocating Table Type ID 0 of type exact in stage 2
Match Overhead:
Field --version_valid-- [3:0] (4 bits)
Field --instruction_address-- [1:0] (2 bits)
Field --statistics_pointer-- [19:0] (20 bits)
-Logical Table ID in stage 3 was not supplied by table placement for table ingress_port_count_table.
-Allocating Logical Table ID 0 in stage 3
-Allocating Table Type ID 0 of type exact in stage 3
+Logical Table ID in stage 2 was not supplied by table placement for table ingress_port_count_table.
+Allocating Logical Table ID 0 in stage 2
+Allocating Table Type ID 0 of type exact in stage 2
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
Match Table Resource Request is:
@@ -1224,12 +1187,12 @@
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
No micro instructions needed for action count_ingress executed from table ingress_port_count_table.
-Allocating Action ALU 0 (32 bits) in stage 3 for match table ingress_port_count_table's action count_ingress
-Allocating VLIW Instruction : 0 in stage 3 for match table ingress_port_count_table's action count_ingress
+Allocating Action ALU 0 (32 bits) in stage 2 for match table ingress_port_count_table's action count_ingress
+Allocating VLIW Instruction : 0 in stage 2 for match table ingress_port_count_table's action count_ingress
----------------------------------------------
Call to Allocate P4 Table with table egress_port_count_table__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 3
+ Allocating in stage 2
----------------------------------------------
ram_size_matrix =
@@ -1262,17 +1225,17 @@
byte_enables = []
After allocation of 32s, available_slots is []
final packing is []
-Allocating Action Logical Table ID 1 in stage 3
+Allocating Action Logical Table ID 1 in stage 2
----------------------------------------------
-Call to Allocate P4 Table with table egress_port_counter, number_entries = 254, table id = None, and match type = exact
- Allocating in stage 3
+Call to Allocate P4 Table with table egress_port_counter, number_entries = 510, table id = None, and match type = exact
+ Allocating in stage 2
----------------------------------------------
stat_stage_table referenced: indirect
stat Table Resource Request is:
SRAM Resource Request for table egress_port_counter (of type statistics), with 1 ways wants 2 rams.
-Sram Resource Request for P4 table egress_port_counter with handle 67108866 of type statistics in stage 3
+Sram Resource Request for P4 table egress_port_counter with handle 67108866 of type statistics in stage 2
table_type : statistics
rams_for_width : 1
use_stash : False
@@ -1290,19 +1253,19 @@
----------------------------------------------
Call to Allocate P4 Table with table egress_port_count_table, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 3
+ Allocating in stage 2
----------------------------------------------
-Logical Table ID in stage 3 was not supplied by table placement for table egress_port_count_table.
-Allocating Logical Table ID 1 in stage 3
-Allocating Table Type ID 1 of type exact in stage 3
+Logical Table ID in stage 2 was not supplied by table placement for table egress_port_count_table.
+Allocating Logical Table ID 1 in stage 2
+Allocating Table Type ID 1 of type exact in stage 2
Match Overhead:
Field --version_valid-- [3:0] (4 bits)
Field --statistics_pointer-- [19:0] (20 bits)
-Logical Table ID in stage 3 was not supplied by table placement for table egress_port_count_table.
-Allocating Logical Table ID 1 in stage 3
-Allocating Table Type ID 1 of type exact in stage 3
+Logical Table ID in stage 2 was not supplied by table placement for table egress_port_count_table.
+Allocating Logical Table ID 1 in stage 2
+Allocating Table Type ID 1 of type exact in stage 2
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
Match Table Resource Request is:
@@ -1310,102 +1273,32 @@
Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {ig_intr_md_for_tm.ucast_egress_port[7:0]}.
Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.ucast_egress_port[8:8]}.
No micro instructions needed for action count_egress executed from table egress_port_count_table.
-Allocating Action ALU 0 (32 bits) in stage 3 for match table egress_port_count_table's action count_egress
-Allocating VLIW Instruction : 0 in stage 3 for match table egress_port_count_table's action count_egress
-
-----------------------------------------------
-Call to Allocate P4 Table with table egress_pkt__action__, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-ram_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-immediate_size_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-hash_to_phv_matrix =
- (8, 8, False) (8, 8, True) (8, 32, False) (16, 16, False) (16, 16, True) (16, 32, False) (32, 32, False) (32, 32, True)
- 0 0 0 0 0 0 0 0 # 0
-
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-total action ram packing size = [0, 0, 0]
-action_ram_packing:
- action add_packet_in_hdr has []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-byte_enables = []
-After allocation of 32s, available_slots is []
-final packing is []
-Allocating Action Logical Table ID 1 in stage 0
-
-----------------------------------------------
-Call to Allocate P4 Table with table egress_pkt, number_entries = 1024, table id = None, and match type = exact
- Allocating in stage 0
-----------------------------------------------
-
-Logical Table ID in stage 0 was not supplied by table placement for table egress_pkt.
-Allocating Logical Table ID 1 in stage 0
-Allocating Table Type ID 1 of type exact in stage 0
-Match Overhead:
- Field --version_valid-- [3:0] (4 bits)
- Field --instruction_address-- [1:0] (2 bits)
-
-Logical Table ID in stage 0 was not supplied by table placement for table egress_pkt.
-Allocating Logical Table ID 1 in stage 0
-Allocating Table Type ID 1 of type exact in stage 0
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]}.
-Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-Match Table Resource Request is:
-SRAM Resource Request for table egress_pkt (of type match), with 0 ways wants 0 rams.
-Allocating: Byte 0 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]}.
-Allocating: Byte 1 is of type exact and member of group 0 (parity group 0) with 16 bytes. for {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]}.
-For action add_packet_in_hdr, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 82 has bit width 20
- Field Src2 [3:0] : 0x2 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x19 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [2:0] : 0x0 (3 bits in instruction bits [13:11])
- Field low_bit_lo [1:0] : 0x0 (2 bits in instruction bits [15:14])
- Field right_rotate [2:0] : 0x0 (3 bits in instruction bits [18:16])
- Field low_bit_hi [0:0] : 0x0 (1 bits in instruction bits [19:19])
-
-For action add_packet_in_hdr, formed micro_instruction:
-Micro Instruction deposit-field for PHV Container 145 has bit width 23
- Field Src2 [3:0] : 0x1 (4 bits in instruction bits [3:0])
- Field Src1 [4:0] : 0x0 (5 bits in instruction bits [8:4])
- Field Src1i [0:0] : 0x0 (1 bits in instruction bits [9:9])
- Field opcode [0:0] : 0x1 (1 bits in instruction bits [10:10])
- Field high_bit [3:0] : 0xf (4 bits in instruction bits [14:11])
- Field low_bit_lo [0:0] : 0x1 (1 bits in instruction bits [15:15])
- Field right_rotate [3:0] : 0x9 (4 bits in instruction bits [19:16])
- Field low_bit_hi [2:0] : 0x3 (3 bits in instruction bits [22:20])
-
-Allocating Action ALU 18 (8 bits) in stage 0 for match table egress_pkt's action add_packet_in_hdr
-Allocating Action ALU 17 (16 bits) in stage 0 for match table egress_pkt's action add_packet_in_hdr
-Allocating VLIW Instruction : 0 in stage 0 for match table egress_pkt's action add_packet_in_hdr
+Allocating Action ALU 0 (32 bits) in stage 2 for match table egress_port_count_table's action count_egress
+Allocating VLIW Instruction : 0 in stage 2 for match table egress_port_count_table's action count_egress
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
+Cannot find table object for 'egress_port_count_table_always_true_condition'.
+Cannot find table object for 'process_packet_out_table_always_true_condition'.
Skipping p4_primitive StageModifyFieldFromHashBitsPrimitive from overhead calculation.
Action ecmp_group for table table0 cannot be used as a default action (table miss action). The action requires the use of hash distribution, which is not available when a table misses.
Field ig_intr_md_for_tm.ucast_egress_port not contiguous on gateway input
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.resources.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.resources.log
index 7bd2c13..cf8d0f1 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.resources.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.resources.log
@@ -1,17 +1,17 @@
+---------------------------------------------------------------------+
| Log file: mau.resources.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
| Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
-| 0 | 2 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 |
-| 1 | 13 | 16 | 2 | 1 | 1 | 4 | 3 | 3 | 3 | 0 | 1 | 0 | 8 | 0 | 4 | 2 | 1 |
-| 2 | 4 | 0 | 30 | 0 | 0 | 5 | 2 | 0 | 1 | 0 | 1 | 0 | 4 | 0 | 2 | 1 | 1 |
-| 3 | 2 | 0 | 9 | 0 | 2 | 4 | 4 | 0 | 1 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2 |
+| 0 | 13 | 16 | 2 | 1 | 2 | 4 | 3 | 3 | 3 | 0 | 1 | 0 | 8 | 0 | 4 | 2 | 2 |
+| 1 | 4 | 0 | 30 | 0 | 0 | 5 | 2 | 0 | 1 | 0 | 1 | 0 | 4 | 0 | 2 | 1 | 1 |
+| 2 | 2 | 0 | 9 | 0 | 2 | 4 | 4 | 0 | 1 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2 |
+| 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
@@ -21,17 +21,17 @@
| 10 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 11 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| | | | | | | | | | | | | | | | | | |
-| Totals | 21 | 16 | 43 | 1 | 5 | 13 | 9 | 3 | 6 | 0 | 4 | 0 | 12 | 0 | 6 | 3 | 6 |
+| Totals | 19 | 16 | 41 | 1 | 4 | 13 | 9 | 3 | 5 | 0 | 4 | 0 | 12 | 0 | 6 | 3 | 5 |
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
| Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
-| 0 | 1.56% | 0.00% | 0.48% | 0.00% | 12.50% | 0.00% | 0.00% | 0.00% | 3.12% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
-| 1 | 10.16% | 24.24% | 0.48% | 16.67% | 6.25% | 5.00% | 6.25% | 12.50% | 9.38% | 0.00% | 25.00% | 0.00% | 6.25% | 0.00% | 12.50% | 6.25% | 6.25% |
-| 2 | 3.12% | 0.00% | 7.21% | 0.00% | 0.00% | 6.25% | 4.17% | 0.00% | 3.12% | 0.00% | 25.00% | 0.00% | 3.12% | 0.00% | 6.25% | 3.12% | 6.25% |
-| 3 | 1.56% | 0.00% | 2.16% | 0.00% | 12.50% | 5.00% | 8.33% | 0.00% | 3.12% | 0.00% | 50.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
+| 0 | 10.16% | 24.24% | 0.48% | 16.67% | 12.50% | 5.00% | 6.25% | 12.50% | 9.38% | 0.00% | 25.00% | 0.00% | 6.25% | 0.00% | 12.50% | 6.25% | 12.50% |
+| 1 | 3.12% | 0.00% | 7.21% | 0.00% | 0.00% | 6.25% | 4.17% | 0.00% | 3.12% | 0.00% | 25.00% | 0.00% | 3.12% | 0.00% | 6.25% | 3.12% | 6.25% |
+| 2 | 1.56% | 0.00% | 2.16% | 0.00% | 12.50% | 5.00% | 8.33% | 0.00% | 3.12% | 0.00% | 50.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
+| 3 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 4 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 5 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 6 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
@@ -41,7 +41,7 @@
| 10 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| 11 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
| | | | | | | | | | | | | | | | | | |
-| Average | 1.37% | 2.02% | 0.86% | 1.39% | 2.60% | 1.35% | 1.56% | 1.04% | 1.56% | 0.00% | 8.33% | 0.00% | 0.78% | 0.00% | 1.56% | 0.78% | 3.12% |
+| Average | 1.24% | 2.02% | 0.82% | 1.39% | 2.08% | 1.35% | 1.56% | 1.04% | 1.30% | 0.00% | 8.33% | 0.00% | 0.78% | 0.00% | 1.56% | 0.78% | 2.60% |
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
@@ -53,24 +53,20 @@
| | | | | | | | | Bytes | |
--------------------------------------------------------------------------------------------------------------------
| _condition_0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
-| _condition_3 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
-| ingress_pkt__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| ingress_pkt | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
-| egress_pkt__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| egress_pkt | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
-| _condition_1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
-| table0__action__ | 1 | 12 | 1 | 0 | 1 | 0 | 0 | 8 | 0 |
-| table0 | 1 | 16 | 0 | 0 | 1 | 3 | 1 | 0 | 4 |
-| table0_counter | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
-| ecmp_group_table__action__ | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
-| ecmp_group_table | 2 | 4 | 30 | 0 | 3 | 0 | 0 | 0 | 1 |
-| ecmp_group_table_counter | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
-| _condition_2 | 3 | 2 | 9 | 1 | 0 | 0 | 0 | 0 | 0 |
-| ingress_port_count_table__action__ | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| ingress_port_count_table | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
-| egress_port_count_table__action__ | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
-| egress_port_count_table | 3 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
-| ingress_port_counter | 3 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
-| egress_port_counter | 3 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| process_packet_out_table__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| process_packet_out_table | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
+| table0__action__ | 0 | 12 | 1 | 0 | 1 | 0 | 0 | 8 | 0 |
+| table0 | 0 | 16 | 0 | 0 | 1 | 3 | 1 | 0 | 4 |
+| table0_counter | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| ecmp_group_table__action__ | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
+| ecmp_group_table | 1 | 4 | 30 | 0 | 3 | 0 | 0 | 0 | 1 |
+| ecmp_group_table_counter | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| _condition_2 | 2 | 2 | 9 | 1 | 0 | 0 | 0 | 0 | 0 |
+| ingress_port_count_table__action__ | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| ingress_port_count_table | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
+| egress_port_count_table__action__ | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| egress_port_count_table | 2 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
+| ingress_port_counter | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| egress_port_counter | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
--------------------------------------------------------------------------------------------------------------------
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.rf.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.rf.log
index 7762fa0..9107514 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.rf.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.rf.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: mau.rf.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.sram.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.sram.log
index bae8896..072047b 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.sram.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.sram.log
@@ -1,60 +1,13 @@
+---------------------------------------------------------------------+
| Log file: mau.sram.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
=======================================================
- calling allocate and add with SRAM Resource Request for table ingress_pkt (of type match), with 0 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 0 RAMs and have 80 available.
-Requesting to use 0 Map RAMs and have 48 available.
-
-========================================================
- Run Placement on Request List of size 1 in stage 0
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 0
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 0
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 0
-columns for width is 0
-other columns is 0
-reserved columns is 10
-reserved columns for tind 0
-reserved columns for stateful 0
-Ternary Indirection Rams Need is 0
-Depth sorted requested
-Requesting to use 0 RAMs and have 32 available.
-Result bus only needs (1):
- ingress_pkt
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 0
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 0 RAMs and have 80 available.
-Depth sorted idletime requests:
-
-
-=======================================================
-
calling allocate and add with SRAM Resource Request for table table0__action__ (of type action), with 1 ways wants 1 rams. (open-all=False, synth_two_port_first=False)
=======================================================
@@ -62,7 +15,7 @@
Requesting to use 0 Map RAMs and have 48 available.
========================================================
- Run Placement on Request List of size 1 in stage 1
+ Run Placement on Request List of size 1 in stage 0
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -99,8 +52,8 @@
NO Spill Required off of logical row 15 for SRAM Resource Request for table table0__action__ (of type action), with 1 ways wants 1 rams.
call to place_table_on_logical_row --- logical row 15 and rams to place is 1 and depth index is 0
-Allocating: SRAM: Row 7 Col 6 in stage 1 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Ram Data Bus ActionR 7 right is 128 bits in stage 1 for table0__action__.
+Allocating: SRAM: Row 7 Col 6 in stage 0 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Ram Data Bus ActionR 7 right is 128 bits in stage 0 for table0__action__.
Depth sorted idletime requests:
@@ -113,7 +66,7 @@
Requesting to use 0 Map RAMs and have 48 available.
========================================================
- Run Placement on Request List of size 2 in stage 1
+ Run Placement on Request List of size 2 in stage 0
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -151,17 +104,17 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table table0_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 1 for table0_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 1 for table0_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
call to place_table_on_logical_row --- logical row 13 and rams to place is 1 and depth index is 0
-Allocating: SRAM: Row 6 Col 8 in stage 1 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Ram Data Bus ActionR 6 right is 128 bits in stage 1
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for table0_counter.
+Allocating: SRAM: Row 6 Col 8 in stage 0 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Ram Data Bus ActionR 6 right is 128 bits in stage 0
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
Depth sorted idletime requests:
@@ -174,7 +127,7 @@
Requesting to use 0 Map RAMs and have 46 available.
========================================================
- Run Placement on Request List of size 3 in stage 1
+ Run Placement on Request List of size 3 in stage 0
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -200,7 +153,7 @@
Ternary Indirection Rams Need is 1
Depth sorted requested
Group 0
-Sram Resource Request for P4 table table0 with handle 16777221 of type ternary_indirection in stage 1
+Sram Resource Request for P4 table table0 with handle 16777220 of type ternary_indirection in stage 0
table_type : ternary_indirection
rams_for_width : 1
use_stash : False
@@ -214,8 +167,8 @@
ram_enable_select_bits : 0
Requesting to use 1 RAMs and have 32 available.
-Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 1
-Allocating: SRAM: Row 0 Col 2 in stage 1 for table table0's ternary indirection word range Words 0 to 1023.
+Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 0
+Allocating: SRAM: Row 0 Col 2 in stage 0 for table table0's ternary indirection word range Words 0 to 1023.
Result bus only needs (0):
+=========================================
@@ -228,17 +181,17 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table table0_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 1 for table0_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 1 for table0_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
call to place_table_on_logical_row --- logical row 13 and rams to place is 1 and depth index is 0
-Allocating: SRAM: Row 6 Col 8 in stage 1 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Ram Data Bus ActionR 6 right is 128 bits in stage 1
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for table0_counter.
+Allocating: SRAM: Row 6 Col 8 in stage 0 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Ram Data Bus ActionR 6 right is 128 bits in stage 0
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
Depth sorted idletime requests:
@@ -251,7 +204,7 @@
Requesting to use 1 Map RAMs and have 46 available.
========================================================
- Run Placement on Request List of size 4 in stage 1
+ Run Placement on Request List of size 4 in stage 0
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -277,7 +230,7 @@
Ternary Indirection Rams Need is 1
Depth sorted requested
Group 0
-Sram Resource Request for P4 table table0 with handle 16777221 of type ternary_indirection in stage 1
+Sram Resource Request for P4 table table0 with handle 16777220 of type ternary_indirection in stage 0
table_type : ternary_indirection
rams_for_width : 1
use_stash : False
@@ -291,8 +244,8 @@
ram_enable_select_bits : 0
Requesting to use 1 RAMs and have 32 available.
-Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 1
-Allocating: SRAM: Row 0 Col 2 in stage 1 for table table0's ternary indirection word range Words 0 to 1023.
+Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 0
+Allocating: SRAM: Row 0 Col 2 in stage 0 for table table0's ternary indirection word range Words 0 to 1023.
Result bus only needs (0):
+=========================================
@@ -305,19 +258,19 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table table0_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 1 for table0_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 1 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 1 for table0_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
call to place_table_on_logical_row --- logical row 13 and rams to place is 1 and depth index is 0
-Allocating: SRAM: Row 6 Col 8 in stage 1 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Ram Data Bus ActionR 6 right is 128 bits in stage 1
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for table0_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for table0_counter.
+Allocating: SRAM: Row 6 Col 8 in stage 0 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Ram Data Bus ActionR 6 right is 128 bits in stage 0
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
Depth sorted idletime requests:
-Sram Resource Request for P4 table table0 with handle 16777221 of type idletime in stage 1
+Sram Resource Request for P4 table table0 with handle 16777220 of type idletime in stage 0
table_type : idletime
rams_for_width : 0
use_stash : False
@@ -335,8 +288,107 @@
bottom_cnt = 0 and num requests = 0
Working on idletime request SRAM Resource Request for table table0 (of type idletime), with 1 ways wants 0 rams.
>> wants 1 map rams
-Allocating: Map RAM: Row 7 Unit 0 in stage 1 for table0.
-Allocating: Ram Data Bus IdletimeHalfLogicalRow 0 top is 19 bits in stage 1 for table0.
+Allocating: Map RAM: Row 7 Unit 0 in stage 0 for table0.
+Allocating: Ram Data Bus IdletimeHalfLogicalRow 0 top is 19 bits in stage 0 for table0.
+
+
+=======================================================
+
+ calling allocate and add with SRAM Resource Request for table process_packet_out_table (of type match), with 0 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
+=======================================================
+
+Requesting to use 0 RAMs and have 76 available.
+Requesting to use 0 Map RAMs and have 45 available.
+
+========================================================
+ Run Placement on Request List of size 5 in stage 0
+ open_up_all_for_match=False
+ synth_two_port_first=False
+========================================================
+
+Match Rams Need is 0
+Algorithmic TCAM Match RAMs Need is 0
+Other Rams Need is 4
+
++=========================================
+| Placing algorithmic tcam
++=========================================
+
+sorted algorithmic tcam requests: (0)
+
+
+-------------------------------------
+Columns need for match is 0
+columns for width is 0
+other columns is 1
+reserved columns is 9
+reserved columns for tind 1
+reserved columns for stateful 1
+Ternary Indirection Rams Need is 1
+Depth sorted requested
+Group 0
+Sram Resource Request for P4 table table0 with handle 16777220 of type ternary_indirection in stage 0
+ table_type : ternary_indirection
+ rams_for_width : 1
+ use_stash : False
+ number_ways : 1
+ way #0
+ SRAM Request Group 0
+ rams_for_depth : 1
+ map_rams : 0
+ way_number : 0
+ ram_word_select_bits : 0
+ ram_enable_select_bits : 0
+
+Requesting to use 1 RAMs and have 32 available.
+Allocating: Ram Data Bus TernaryIndirection1R 0 left is 64 bits in stage 0
+Allocating: SRAM: Row 0 Col 2 in stage 0 for table table0's ternary indirection word range Words 0 to 1023.
+Result bus only needs (1):
+ process_packet_out_table
+Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 0
+
++=========================================
+| Placing action/stats/meters/selection
++=========================================
+
+Requesting to use 3 RAMs and have 79 available.
+SRAM Resource Request for table table0__action__ (of type action), with 1 ways wants 1 rams.
+SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+NO Spill Required off of logical row 13 for SRAM Resource Request for table table0_counter (of type statistics), with 1 ways wants 2 rams.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
+Allocating: Statistics ALU 6 on right (128 bits) in stage 0 for table table0_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 0 for table0_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 0 for table table0_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 0 for table0_counter.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 1 and depth index is 0
+Allocating: SRAM: Row 6 Col 8 in stage 0 for table table0__action__'s entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Ram Data Bus ActionR 6 right is 128 bits in stage 0
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 0 for table0_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 0 for table0_counter.
+Depth sorted idletime requests:
+Sram Resource Request for P4 table table0 with handle 16777220 of type idletime in stage 0
+ table_type : idletime
+ rams_for_width : 0
+ use_stash : False
+ number_ways : 1
+ way #0
+ SRAM Request Group 0
+ rams_for_depth : 0
+ map_rams : 1
+ way_number : 0
+ ram_word_select_bits : 0
+ ram_enable_select_bits : 0
+
+Requesting to use 1 RAMs and have 46 available.
+top_cnt = 1 and num requests = 1
+bottom_cnt = 0 and num requests = 0
+Working on idletime request SRAM Resource Request for table table0 (of type idletime), with 1 ways wants 0 rams.
+>> wants 1 map rams
+Allocating: Map RAM: Row 7 Unit 0 in stage 0 for table0.
+Allocating: Ram Data Bus IdletimeHalfLogicalRow 0 top is 19 bits in stage 0 for table0.
=======================================================
@@ -348,6 +400,125 @@
Requesting to use 0 Map RAMs and have 48 available.
========================================================
+ Run Placement on Request List of size 1 in stage 1
+ open_up_all_for_match=False
+ synth_two_port_first=False
+========================================================
+
+Match Rams Need is 0
+Algorithmic TCAM Match RAMs Need is 0
+Other Rams Need is 2
+
++=========================================
+| Placing algorithmic tcam
++=========================================
+
+sorted algorithmic tcam requests: (0)
+
+
+-------------------------------------
+Columns need for match is 0
+columns for width is 0
+other columns is 1
+reserved columns is 9
+reserved columns for tind 0
+reserved columns for stateful 1
+Ternary Indirection Rams Need is 0
+Depth sorted requested
+Requesting to use 0 RAMs and have 32 available.
+Result bus only needs (0):
+
++=========================================
+| Placing action/stats/meters/selection
++=========================================
+
+Requesting to use 2 RAMs and have 80 available.
+SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
+NO Spill Required off of logical row 13 for SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
+Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table ecmp_group_table_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 1 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 1 for ecmp_group_table_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 1 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 1 for ecmp_group_table_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for ecmp_group_table_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for ecmp_group_table_counter.
+Depth sorted idletime requests:
+
+
+=======================================================
+
+ calling allocate and add with SRAM Resource Request for table ecmp_group_table (of type match), with 3 ways wants 3 rams. (open-all=False, synth_two_port_first=False)
+=======================================================
+
+Requesting to use 3 RAMs and have 78 available.
+Requesting to use 0 Map RAMs and have 46 available.
+
+========================================================
+ Run Placement on Request List of size 2 in stage 1
+ open_up_all_for_match=False
+ synth_two_port_first=False
+========================================================
+
+Match Rams Need is 3
+Algorithmic TCAM Match RAMs Need is 0
+Other Rams Need is 2
+
++=========================================
+| Placing algorithmic tcam
++=========================================
+
+sorted algorithmic tcam requests: (0)
+
+
+-------------------------------------
+Columns need for match is 1
+columns for width is 1
+other columns is 1
+reserved columns is 9
+reserved columns for tind 0
+reserved columns for stateful 1
+For group request 0
+ Dealing with way that starts at 0 of match request SRAM Resource Request for table ecmp_group_table (of type match), with 3 ways wants 3 rams.
+Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 1
+Allocating: Ram Data Bus MatchResult1R 7 left_and_right is 83 bits in stage 1
+Allocating: SRAM: Row 7 Col 2 in stage 1 for table ecmp_group_table's match way 0 for entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: SRAM: Row 7 Col 3 in stage 1 for table ecmp_group_table's match way 1 for entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: SRAM: Row 7 Col 4 in stage 1 for table ecmp_group_table's match way 2 for entry Entry bits [127: 0] and word range Words 0 to 1023.
+Ternary Indirection Rams Need is 0
+Depth sorted requested
+Requesting to use 0 RAMs and have 29 available.
+Result bus only needs (0):
+
++=========================================
+| Placing action/stats/meters/selection
++=========================================
+
+Requesting to use 2 RAMs and have 77 available.
+SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
+NO Spill Required off of logical row 13 for SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
+
+call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
+Allocating: Statistics ALU 6 on right (128 bits) in stage 1 for table ecmp_group_table_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 1 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 1 for ecmp_group_table_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 1 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 1 for ecmp_group_table_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 1 for ecmp_group_table_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 1 for ecmp_group_table_counter.
+Depth sorted idletime requests:
+
+
+=======================================================
+
+ calling allocate and add with SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams. (open-all=False, synth_two_port_first=False)
+=======================================================
+
+Requesting to use 2 RAMs and have 80 available.
+Requesting to use 0 Map RAMs and have 48 available.
+
+========================================================
Run Placement on Request List of size 1 in stage 2
open_up_all_for_match=False
synth_two_port_first=False
@@ -381,136 +552,17 @@
+=========================================
Requesting to use 2 RAMs and have 80 available.
-SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
-NO Spill Required off of logical row 13 for SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
-
-call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table ecmp_group_table_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 2 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 2 for ecmp_group_table_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 2 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 2 for ecmp_group_table_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for ecmp_group_table_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for ecmp_group_table_counter.
-Depth sorted idletime requests:
-
-
-=======================================================
-
- calling allocate and add with SRAM Resource Request for table ecmp_group_table (of type match), with 3 ways wants 3 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 3 RAMs and have 78 available.
-Requesting to use 0 Map RAMs and have 46 available.
-
-========================================================
- Run Placement on Request List of size 2 in stage 2
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 3
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 2
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 1
-columns for width is 1
-other columns is 1
-reserved columns is 9
-reserved columns for tind 0
-reserved columns for stateful 1
-For group request 0
- Dealing with way that starts at 0 of match request SRAM Resource Request for table ecmp_group_table (of type match), with 3 ways wants 3 rams.
-Allocating: Ram Data Bus MatchSearch1 7 left_and_right is 128 bits in stage 2
-Allocating: Ram Data Bus MatchResult1R 7 left_and_right is 83 bits in stage 2
-Allocating: SRAM: Row 7 Col 2 in stage 2 for table ecmp_group_table's match way 0 for entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: SRAM: Row 7 Col 3 in stage 2 for table ecmp_group_table's match way 1 for entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: SRAM: Row 7 Col 4 in stage 2 for table ecmp_group_table's match way 2 for entry Entry bits [127: 0] and word range Words 0 to 1023.
-Ternary Indirection Rams Need is 0
-Depth sorted requested
-Requesting to use 0 RAMs and have 29 available.
-Result bus only needs (0):
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 2 RAMs and have 77 available.
-SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
-NO Spill Required off of logical row 13 for SRAM Resource Request for table ecmp_group_table_counter (of type statistics), with 1 ways wants 2 rams.
-
-call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table ecmp_group_table_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 2 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 2 for ecmp_group_table_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 2 for table ecmp_group_table_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 2 for ecmp_group_table_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for ecmp_group_table_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for ecmp_group_table_counter.
-Depth sorted idletime requests:
-
-
-=======================================================
-
- calling allocate and add with SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 2 RAMs and have 80 available.
-Requesting to use 0 Map RAMs and have 48 available.
-
-========================================================
- Run Placement on Request List of size 1 in stage 3
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 0
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 2
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 0
-columns for width is 0
-other columns is 1
-reserved columns is 9
-reserved columns for tind 0
-reserved columns for stateful 1
-Ternary Indirection Rams Need is 0
-Depth sorted requested
-Requesting to use 0 RAMs and have 32 available.
-Result bus only needs (0):
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 2 RAMs and have 80 available.
SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
NO Spill Required off of logical row 13 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 3 for table ingress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 3 for ingress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 3 for ingress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table ingress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 2 for ingress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for ingress_port_counter.
Depth sorted idletime requests:
@@ -523,7 +575,7 @@
Requesting to use 0 Map RAMs and have 46 available.
========================================================
- Run Placement on Request List of size 2 in stage 3
+ Run Placement on Request List of size 2 in stage 2
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -551,7 +603,7 @@
Requesting to use 0 RAMs and have 32 available.
Result bus only needs (1):
ingress_port_count_table
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 3
+Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 2
+=========================================
| Placing action/stats/meters/selection
@@ -562,13 +614,13 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 3 for table ingress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 3 for ingress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 3 for ingress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table ingress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 2 for ingress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for ingress_port_counter.
Depth sorted idletime requests:
@@ -581,7 +633,7 @@
Requesting to use 0 Map RAMs and have 46 available.
========================================================
- Run Placement on Request List of size 3 in stage 3
+ Run Placement on Request List of size 3 in stage 2
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -609,7 +661,7 @@
Requesting to use 0 RAMs and have 32 available.
Result bus only needs (1):
ingress_port_count_table
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 3
+Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 2
+=========================================
| Placing action/stats/meters/selection
@@ -621,23 +673,23 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table egress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 3 for table egress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 3 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 3 for egress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 3 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 3 for egress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 3 for egress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 3 for egress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table egress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 2 for egress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 2 for egress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for egress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for egress_port_counter.
NO Spill Required off of logical row 9 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 9 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 4 on right (128 bits) in stage 3 for table ingress_port_counter.
-Allocating: SRAM: Row 4 Col 6 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 4 Unit 0 in stage 3 for ingress_port_counter.
-Allocating: SRAM: Row 4 Col 7 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 4 Unit 1 in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 3 for ingress_port_counter.
+Allocating: Statistics ALU 4 on right (128 bits) in stage 2 for table ingress_port_counter.
+Allocating: SRAM: Row 4 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 4 Unit 0 in stage 2 for ingress_port_counter.
+Allocating: SRAM: Row 4 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 4 Unit 1 in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 2 for ingress_port_counter.
Depth sorted idletime requests:
@@ -650,7 +702,7 @@
Requesting to use 0 Map RAMs and have 44 available.
========================================================
- Run Placement on Request List of size 4 in stage 3
+ Run Placement on Request List of size 4 in stage 2
open_up_all_for_match=False
synth_two_port_first=False
========================================================
@@ -679,8 +731,8 @@
Result bus only needs (2):
egress_port_count_table
ingress_port_count_table
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 3
-Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 3
+Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 2
+Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 2
+=========================================
| Placing action/stats/meters/selection
@@ -692,70 +744,21 @@
NO Spill Required off of logical row 13 for SRAM Resource Request for table egress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 13 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 6 on right (128 bits) in stage 3 for table egress_port_counter.
-Allocating: SRAM: Row 6 Col 6 in stage 3 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 6 Unit 0 in stage 3 for egress_port_counter.
-Allocating: SRAM: Row 6 Col 7 in stage 3 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 6 Unit 1 in stage 3 for egress_port_counter.
-Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 3 for egress_port_counter.
-Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 3 for egress_port_counter.
+Allocating: Statistics ALU 6 on right (128 bits) in stage 2 for table egress_port_counter.
+Allocating: SRAM: Row 6 Col 6 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 6 Unit 0 in stage 2 for egress_port_counter.
+Allocating: SRAM: Row 6 Col 7 in stage 2 for table egress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 6 Unit 1 in stage 2 for egress_port_counter.
+Allocating: Ram Data Bus StatsR 6 right is 128 bits in stage 2 for egress_port_counter.
+Allocating: Ram Data Bus StatsW 6 right is 128 bits in stage 2 for egress_port_counter.
NO Spill Required off of logical row 9 for SRAM Resource Request for table ingress_port_counter (of type statistics), with 1 ways wants 2 rams.
call to place_table_on_logical_row --- logical row 9 and rams to place is 2 and depth index is 0
-Allocating: Statistics ALU 4 on right (128 bits) in stage 3 for table ingress_port_counter.
-Allocating: SRAM: Row 4 Col 6 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
-Allocating: Map RAM: Row 4 Unit 0 in stage 3 for ingress_port_counter.
-Allocating: SRAM: Row 4 Col 7 in stage 3 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
-Allocating: Map RAM: Row 4 Unit 1 in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 3 for ingress_port_counter.
-Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 3 for ingress_port_counter.
-Depth sorted idletime requests:
-
-
-=======================================================
-
- calling allocate and add with SRAM Resource Request for table egress_pkt (of type match), with 0 ways wants 0 rams. (open-all=False, synth_two_port_first=False)
-=======================================================
-
-Requesting to use 0 RAMs and have 80 available.
-Requesting to use 0 Map RAMs and have 48 available.
-
-========================================================
- Run Placement on Request List of size 2 in stage 0
- open_up_all_for_match=False
- synth_two_port_first=False
-========================================================
-
-Match Rams Need is 0
-Algorithmic TCAM Match RAMs Need is 0
-Other Rams Need is 0
-
-+=========================================
-| Placing algorithmic tcam
-+=========================================
-
-sorted algorithmic tcam requests: (0)
-
-
--------------------------------------
-Columns need for match is 0
-columns for width is 0
-other columns is 0
-reserved columns is 10
-reserved columns for tind 0
-reserved columns for stateful 0
-Ternary Indirection Rams Need is 0
-Depth sorted requested
-Requesting to use 0 RAMs and have 32 available.
-Result bus only needs (2):
- egress_pkt
- ingress_pkt
-Allocating: Ram Data Bus MatchResult1R 0 left_and_right is 83 bits in stage 0
-Allocating: Ram Data Bus MatchResult2R 0 left_and_right is 83 bits in stage 0
-
-+=========================================
-| Placing action/stats/meters/selection
-+=========================================
-
-Requesting to use 0 RAMs and have 80 available.
+Allocating: Statistics ALU 4 on right (128 bits) in stage 2 for table ingress_port_counter.
+Allocating: SRAM: Row 4 Col 6 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 0 to 1023.
+Allocating: Map RAM: Row 4 Unit 0 in stage 2 for ingress_port_counter.
+Allocating: SRAM: Row 4 Col 7 in stage 2 for table ingress_port_counter's entry Entry bits [127: 0] and word range Words 1024 to 2047.
+Allocating: Map RAM: Row 4 Unit 1 in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsR 4 right is 128 bits in stage 2 for ingress_port_counter.
+Allocating: Ram Data Bus StatsW 4 right is 128 bits in stage 2 for ingress_port_counter.
Depth sorted idletime requests:
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.tcam.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.tcam.log
index 1b3ac07..b2d4dcc 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.tcam.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.tcam.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: mau.tcam.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
@@ -17,9 +17,9 @@
Run Placement on Request List of size 1
========================================================
-Allocating: TCAM: Row 11 Col 1 in stage 1 for table table0 for entries Entry bits [43:0] and word range Words 0 to 511.
-Allocating: TCAM: Row 10 Col 1 in stage 1 for table table0 for entries Entry bits [87:44] and word range Words 0 to 511.
-Allocating: TCAM: Row 9 Col 1 in stage 1 for table table0 for entries Entry bits [131:88] and word range Words 0 to 511.
-Allocating: Ram Data Bus TcamMatchSearch2 11 left_and_right is 44 bits in stage 1
-Allocating: Ram Data Bus TcamMatchSearch2 10 left_and_right is 44 bits in stage 1
-Allocating: Ram Data Bus TcamMatchSearch2 9 left_and_right is 44 bits in stage 1
+Allocating: TCAM: Row 11 Col 1 in stage 0 for table table0 for entries Entry bits [43:0] and word range Words 0 to 511.
+Allocating: TCAM: Row 10 Col 1 in stage 0 for table table0 for entries Entry bits [87:44] and word range Words 0 to 511.
+Allocating: TCAM: Row 9 Col 1 in stage 0 for table table0 for entries Entry bits [131:88] and word range Words 0 to 511.
+Allocating: Ram Data Bus TcamMatchSearch2 11 left_and_right is 44 bits in stage 0
+Allocating: Ram Data Bus TcamMatchSearch2 10 left_and_right is 44 bits in stage 0
+Allocating: Ram Data Bus TcamMatchSearch2 9 left_and_right is 44 bits in stage 0
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.tp.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.tp.log
index 6608591..61320e1 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.tp.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/mau.tp.log
@@ -1,35 +1,48 @@
+---------------------------------------------------------------------+
| Log file: mau.tp.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
----- Stage 0 ------
_condition_0
- ingress_pkt
------ Stage 1 ------
- _condition_1
+ process_packet_out_table
table0
------ Stage 2 ------
+----- Stage 1 ------
ecmp_group_table
------ Stage 3 ------
+----- Stage 2 ------
_condition_2
ingress_port_count_table
egress_port_count_table
----- Stage 0 ------
- _condition_3
- egress_pkt
+ _condition_0
+ process_packet_out_table
+ table0
+----- Stage 1 ------
+ ecmp_group_table
+----- Stage 2 ------
+ _condition_2
+ ingress_port_count_table
+ egress_port_count_table
+----- Stage 0 ------
+ _condition_0
+ process_packet_out_table
+ table0
+----- Stage 1 ------
+ ecmp_group_table
+----- Stage 2 ------
+ _condition_2
+ ingress_port_count_table
+ egress_port_count_table
------------------------------------------
Running Table Placement 4
------------------------------------------
Cannot use hash action for table ingress_port_count_table.
-Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 254.
+Cannot use hash-action for table ingress_port_count_table with no key because the number of entries required by side-effect table ingress_port_counter is not a power of 2 -- 510.
Cannot use hash action for table egress_port_count_table.
-Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 254.
-Cannot use hash action for table ingress_pkt.
-Table ingress_pkt has no side effect tables.
-Cannot use hash action for table egress_pkt.
-Table egress_pkt has no side effect tables.
+Cannot use hash-action for table egress_port_count_table with no key because the number of entries required by side-effect table egress_port_counter is not a power of 2 -- 510.
+Cannot use hash action for table process_packet_out_table.
+Table process_packet_out_table has no side effect tables.
User requested to not attempt to place action data parameters in the match overhead.
Cannot use hash action for table table0.
Cannot use hash-action for table table0 because it requires a ternary-style match for field ig_intr_md.ingress_port.
@@ -38,68 +51,70 @@
------------------------------------------
Table Groups
------------------------------------------
-Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (254)]
-Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (254)]
-Table Grouping (ingress) with match table ingress_pkt (1024) [ingress_pkt__action__ (1024)]
-Table Grouping (egress) with match table egress_pkt (1024) [egress_pkt__action__ (1024)]
+Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (510)]
+Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (510)]
+Table Grouping (ingress) with match table process_packet_out_table (1024) [process_packet_out_table__action__ (1024)]
Table Grouping (ingress) with match table table0 (512) [table0__action__ (512), table0_counter (512)]
Table Grouping (ingress) with match table ecmp_group_table (1024) [ecmp_group_table__action__ (1024), ecmp_group_table_counter (1024)]
Table Grouping (ingress) with condition table _condition_0 (0) []
-Table Grouping (ingress) with condition table _condition_1 (0) []
Table Grouping (ingress) with condition table _condition_2 (0) []
-Table Grouping (egress) with condition table _condition_3 (0) []
-Phase 0 possible? False Cannot implement ingress_pkt in phase 0 resources because table does not have the correct condition
+Phase 0 possible? False Cannot implement table0 in phase 0 resources because table uses side effect tables.
------------------------------------
Starting placement pass 0
------------------------------------
Nodes could place:
_condition_0 (2)
->> choose Table Grouping (ingress) with match table ingress_pkt (1024) [ingress_pkt__action__ (1024)]
-Earliest stage can place: 0
-Placing table: ingress_pkt__action__ with 1024 entries
-Table ingress_pkt__action__ with 0 entries is directly referenced
-Match Table ingress_pkt has a total of 1 entries in stage 0
- Direct mapped table ingress_pkt__action__ has 0 entries
->> set ingress_pkt (9) to placed
->> set _condition_0 (2) to placed
-
-Nodes could place:
- _condition_1 (3)
>> choose Table Grouping (ingress) with match table table0 (512) [table0__action__ (512), table0_counter (512)]
-Earliest stage can place: 1
+Earliest stage can place: 0
Placing table: table0__action__ with 512 entries
Placing table: table0_counter with 512 entries
Table table0__action__ with 8192 entries is directly referenced
Table table0_counter with 4096 entries is directly referenced
-Match Table table0 has a total of 512 entries in stage 1
+Match Table table0 has a total of 512 entries in stage 0
Direct mapped table table0__action__ has 8192 entries
Direct mapped table table0_counter has 4096 entries
>> set table0 (7) to placed
->> set _condition_1 (3) to placed
+>> set _condition_0 (2) to placed
+
+Nodes could place:
+ process_packet_out_table (3)
+ ecmp_group_table (8)
+process_packet_out_table and _condition_0 not mutually exclusive
+ >> earliest stage can place Table Grouping (ingress) with match table process_packet_out_table (1024) [process_packet_out_table__action__ (1024)] is 0
+ >> earliest stage can place Table Grouping (ingress) with match table ecmp_group_table (1024) [ecmp_group_table__action__ (1024), ecmp_group_table_counter (1024)] is 1
+process_packet_out_table and _condition_0 not mutually exclusive
+>> choose Table Grouping (ingress) with match table process_packet_out_table (1024) [process_packet_out_table__action__ (1024)]
+Earliest stage can place: 0
+process_packet_out_table and _condition_0 not mutually exclusive
+Placing table: process_packet_out_table__action__ with 1024 entries
+Table process_packet_out_table__action__ with 0 entries is directly referenced
+Match Table process_packet_out_table has a total of 1 entries in stage 0
+ Direct mapped table process_packet_out_table__action__ has 0 entries
+>> set process_packet_out_table (3) to placed
Nodes could place:
ecmp_group_table (8)
>> choose Table Grouping (ingress) with match table ecmp_group_table (1024) [ecmp_group_table__action__ (1024), ecmp_group_table_counter (1024)]
-Earliest stage can place: 2
+Earliest stage can place: 1
Placing table: ecmp_group_table__action__ with 1024 entries
Placing table: ecmp_group_table_counter with 1024 entries
Table ecmp_group_table__action__ with 0 entries is directly referenced
Table ecmp_group_table_counter with 4096 entries is directly referenced
-Match Table ecmp_group_table has a total of 3072 entries in stage 2
+Match Table ecmp_group_table has a total of 3072 entries in stage 1
Direct mapped table ecmp_group_table__action__ has 0 entries
Direct mapped table ecmp_group_table_counter has 4096 entries
>> set ecmp_group_table (8) to placed
Nodes could place:
_condition_2 (4)
->> choose Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (254)]
-Earliest stage can place: 3
+>> choose Table Grouping (ingress) with match table ingress_port_count_table (1024) [ingress_port_count_table__action__ (1024), ingress_port_counter (510)]
+Earliest stage can place: 2
Placing table: ingress_port_count_table__action__ with 1024 entries
-Placing table: ingress_port_counter with 254 entries
+Placing table: ingress_port_counter with 510 entries
Table ingress_port_count_table__action__ with 0 entries is directly referenced
Table ingress_port_counter with 4096 entries is indirectly referenced
-Match Table ingress_port_count_table has a total of 1 entries in stage 3
+Match Table ingress_port_count_table has a total of 1 entries in stage 2
Direct mapped table ingress_port_count_table__action__ has 0 entries
>> set ingress_port_count_table (5) to placed
>> set _condition_2 (4) to placed
@@ -108,43 +123,27 @@
egress_port_count_table (6)
egress_port_count_table and _condition_2 not mutually exclusive
egress_port_count_table and ingress_port_count_table not mutually exclusive
->> choose Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (254)]
-Earliest stage can place: 3
+>> choose Table Grouping (ingress) with match table egress_port_count_table (1024) [egress_port_count_table__action__ (1024), egress_port_counter (510)]
+Earliest stage can place: 2
egress_port_count_table and _condition_2 not mutually exclusive
egress_port_count_table and ingress_port_count_table not mutually exclusive
Placing table: egress_port_count_table__action__ with 1024 entries
-Placing table: egress_port_counter with 254 entries
+Placing table: egress_port_counter with 510 entries
Table egress_port_count_table__action__ with 0 entries is directly referenced
Table egress_port_counter with 4096 entries is indirectly referenced
-Match Table egress_port_count_table has a total of 1 entries in stage 3
+Match Table egress_port_count_table has a total of 1 entries in stage 2
Direct mapped table egress_port_count_table__action__ has 0 entries
>> set egress_port_count_table (6) to placed
-------------------------------------
- Starting placement pass 1
-------------------------------------
-
-Nodes could place:
- _condition_3 (2)
->> choose Table Grouping (egress) with match table egress_pkt (1024) [egress_pkt__action__ (1024)]
-Earliest stage can place: 0
-Placing table: egress_pkt__action__ with 1024 entries
-Table egress_pkt__action__ with 0 entries is directly referenced
-Match Table egress_pkt has a total of 1 entries in stage 0
- Direct mapped table egress_pkt__action__ has 0 entries
->> set egress_pkt (3) to placed
->> set _condition_3 (2) to placed
------------------------------------------
Logical Table IDs
------------------------------------------
Logical Table IDs in stage 0 are:
- 0 : ingress_pkt
- 1 : egress_pkt
-Logical Table IDs in stage 1 are:
0 : table0
-Logical Table IDs in stage 2 are:
+ 1 : process_packet_out_table
+Logical Table IDs in stage 1 are:
0 : ecmp_group_table
-Logical Table IDs in stage 3 are:
+Logical Table IDs in stage 2 are:
0 : ingress_port_count_table
1 : egress_port_count_table
@@ -154,10 +153,8 @@
count_ingress -> egress_port_count_table
action mapping for egress_port_count_table
count_egress -> --END_OF_PIPELINE--
-action mapping for ingress_pkt
- _packet_out -> _condition_1
-action mapping for egress_pkt
- add_packet_in_hdr -> --END_OF_PIPELINE--
+action mapping for process_packet_out_table
+ _process_packet_out -> _condition_2
action mapping for table0
set_egress_port -> _condition_2
ecmp_group -> ecmp_group_table
@@ -166,14 +163,8 @@
action mapping for ecmp_group_table
set_egress_port -> _condition_2
true/false mapping for _condition_0
- False -> _condition_1
- True -> ingress_pkt
-true/false mapping for _condition_1
- False -> _condition_2
+ False -> process_packet_out_table
True -> table0
true/false mapping for _condition_2
False -> --END_OF_PIPELINE--
True -> ingress_port_count_table
-true/false mapping for _condition_3
- False -> --END_OF_PIPELINE--
- True -> egress_pkt
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.characterize.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.characterize.log
index f772a5e..2e1efbd 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.characterize.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.characterize.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: pa.characterize.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
Program: ecmp
@@ -14,16 +14,16 @@
| phv1 | ingress | | SH | | | | | | | | | | | | | | | |
| [31:24] | ingress | ipv4.protocol[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [23:8] | ingress | ipv4.hdrChecksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [7:0] | ingress | ipv4.srcAddr[31:24] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [7:0] | ingress | ipv4.srcAddr[31:24] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv2 | ingress | | | | | | | | | | | | | | | | | |
-| [31:0] | ingress | ipv4.dstAddr[31:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [31:0] | ingress | ipv4.dstAddr[31:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv3 | ingress | | | | | | | | | | | | | | | | | |
-| [31:0] | ingress | ethernet.dstAddr[39:8] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [31:0] | ingress | ethernet.dstAddr[39:8] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv4 | ingress | | | | | | | | | | | | | | | | | |
-| [31:0] | ingress | ethernet.srcAddr[31:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [31:0] | ingress | ethernet.srcAddr[31:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv5 | ingress | | SH | | | | | | | | | | | | | | | |
-| [31:16] | ingress | udp.srcPort[15:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [15:0] | ingress | udp.dstPort[15:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [31:16] | ingress | udp.srcPort[15:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:0] | ingress | udp.dstPort[15:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv6 | - | | | | | | | | | | | | | | | | | |
| phv7 | - | | | | | | | | | | | | | | | | | |
| phv8 | - | | | | | | | | | | | | | | | | | |
@@ -86,25 +86,23 @@
| phv62 | - | | | | | | | | | | | | | | | | | |
| phv63 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
-| phv64 | ingress | | SH | | | | | | | | | | | | | | | |
-| [7:1] | ingress | -pad-0-[6:0] | meta | | | | | | | | | | | | | | | |
-| [0:0] | ingress | ig_intr_md_for_tm.copy_to_cpu[0:0] | imeta | | | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv64 | ingress | | | | | | | | | | | | | | | | | |
+| [7:0] | ingress | ipv4.srcAddr[23:16] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv65 | ingress | | | | | | | | | | | | | | | | | |
-| [7:0] | ingress | ipv4.srcAddr[23:16] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [7:0] | ingress | ethernet.dstAddr[47:40] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv66 | ingress | | | | | | | | | | | | | | | | | |
-| [7:0] | ingress | ethernet.dstAddr[47:40] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv67 | ingress | | | | | | | | | | | | | | | | | |
-| [7:0] | ingress | ethernet.srcAddr[39:32] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv68 | ingress | | SH | | | | | | | | | | | | | | | |
+| [7:0] | ingress | ethernet.srcAddr[39:32] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv67 | ingress | | SH | | | | | | | | | | | | | | | |
| [6:6] | ingress | --validity_check--metadata_bridge[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [5:5] | ingress | --validity_check--udp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [4:4] | ingress | --validity_check--tcp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [3:3] | ingress | --validity_check--ipv4[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [2:2] | ingress | --validity_check--ethernet[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [1:1] | ingress | --validity_check--packet_out_hdr[0:0] | pov | | W | RW | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [0:0] | ingress | --validity_check--packet_in_hdr[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv69 | ingress | | | | | | | | | | | | | | | | | |
-| [7:5] | ingress | ig_intr_md_for_tm.drop_ctl[2:0] | imeta | | | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [1:1] | ingress | --validity_check--packet_out_hdr[0:0] | pov | | W | RW | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [0:0] | ingress | --validity_check--packet_in_hdr[0:0] | pov | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv68 | ingress | | | | | | | | | | | | | | | | | |
+| [7:5] | ingress | ig_intr_md_for_tm.drop_ctl[2:0] | imeta | | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv69 | - | | | | | | | | | | | | | | | | | |
| phv70 | - | | | | | | | | | | | | | | | | | |
| phv71 | - | | | | | | | | | | | | | | | | | |
| phv72 | - | | | | | | | | | | | | | | | | | |
@@ -117,18 +115,16 @@
| phv79 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| phv80 | egress | | SH | | | | | | | | | | | | | | | |
-| [7:1] | egress | -pad-0-[6:0] | meta | | | | | | | | | | | | | | | |
-| [0:0] | egress | ig_intr_md_for_tm.copy_to_cpu[0:0] | imeta | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv81 | egress | | SH | | | | | | | | | | | | | | | |
| [7:3] | egress | eg_intr_md._pad7[4:0] | imeta | | W | | | | | | | | | | | | | |
| [2:0] | egress | eg_intr_md.egress_cos[2:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv82 | egress | | SH | | | | | | | | | | | | | | | |
+| phv81 | egress | | SH | | | | | | | | | | | | | | | |
| [5:5] | egress | --validity_check--udp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [4:4] | egress | --validity_check--tcp[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [3:3] | egress | --validity_check--ipv4[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [2:2] | egress | --validity_check--ethernet[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [1:1] | egress | --validity_check--packet_out_hdr[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [0:0] | egress | --validity_check--packet_in_hdr[0:0] | pov | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [0:0] | egress | --validity_check--packet_in_hdr[0:0] | pov | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv82 | - | | | | | | | | | | | | | | | | | |
| phv83 | - | | | | | | | | | | | | | | | | | |
| phv84 | - | | | | | | | | | | | | | | | | | |
| phv85 | - | | | | | | | | | | | | | | | | | |
@@ -178,29 +174,29 @@
| phv127 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| phv128 | ingress | | SH | | | | | | | | | | | | | | | |
-| [15:15] | ingress | ig_intr_md.resubmit_flag[0:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [14:14] | ingress | ig_intr_md._pad1[0:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [13:12] | ingress | ig_intr_md._pad2[1:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [11:9] | ingress | ig_intr_md._pad3[2:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [8:0] | ingress | ig_intr_md.ingress_port[8:0] | imeta | | W | ~ | R | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:15] | ingress | ig_intr_md.resubmit_flag[0:0] | imeta | | W | | | | | | | | | | | | | |
+| [14:14] | ingress | ig_intr_md._pad1[0:0] | imeta | | W | | | | | | | | | | | | | |
+| [13:12] | ingress | ig_intr_md._pad2[1:0] | imeta | | W | | | | | | | | | | | | | |
+| [11:9] | ingress | ig_intr_md._pad3[2:0] | imeta | | W | | | | | | | | | | | | | |
+| [8:0] | ingress | ig_intr_md.ingress_port[8:0] | imeta | | W | R | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv129 | ingress | | OL,SH | | | | | | | | | | | | | | | |
| [15:7] | ingress | packet_out_hdr.egress_port[8:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [15:7] | ingress | packet_in_hdr.ingress_port[8:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:7] | ingress | packet_in_hdr.ingress_port[8:0] | pkt | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [6:0] | ingress | packet_out_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [6:0] | ingress | packet_in_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv130 | ingress | | | | | | | | | | | | | | | | | |
-| [8:0] | ingress | ig_intr_md_for_tm.ucast_egress_port[8:0] | imeta | | | W | W | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [8:0] | ingress | ig_intr_md_for_tm.ucast_egress_port[8:0] | imeta | | | W | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv131 | ingress | | | | | | | | | | | | | | | | | |
-| [15:0] | ingress | ipv4.srcAddr[15:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:0] | ingress | ipv4.srcAddr[15:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv132 | ingress | | SH | | | | | | | | | | | | | | | |
-| [15:8] | ingress | ethernet.dstAddr[7:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [7:0] | ingress | ethernet.srcAddr[47:40] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:8] | ingress | ethernet.dstAddr[7:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [7:0] | ingress | ethernet.srcAddr[47:40] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv133 | ingress | | | | | | | | | | | | | | | | | |
-| [15:0] | ingress | ethernet.etherType[15:0] | pkt | | W | ~ | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:0] | ingress | ethernet.etherType[15:0] | pkt | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv134 | ingress | | | | | | | | | | | | | | | | | |
-| [15:0] | ingress | ecmp_metadata.groupId[15:0] | meta | | | | W | R | | | | | | | | | | |
+| [15:0] | ingress | ecmp_metadata.groupId[15:0] | meta | | | W | R | | | | | | | | | | | |
| phv135 | ingress | | | | | | | | | | | | | | | | | |
-| [15:0] | ingress | ecmp_metadata.selector[15:0] | meta | | | | W | R | | | | | | | | | | |
+| [15:0] | ingress | ecmp_metadata.selector[15:0] | meta | | | W | R | | | | | | | | | | | |
| phv136 | - | | | | | | | | | | | | | | | | | |
| phv137 | - | | | | | | | | | | | | | | | | | |
| phv138 | - | | | | | | | | | | | | | | | | | |
@@ -211,14 +207,10 @@
| phv143 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| phv144 | egress | | SH | | | | | | | | | | | | | | | |
-| [15:9] | egress | -pad-1-[6:0] | meta | | | | | | | | | | | | | | | |
-| [8:0] | egress | ig_intr_md.ingress_port[8:0] | imeta | | W | R | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv145 | egress | | SH | | | | | | | | | | | | | | | |
-| [15:7] | egress | packet_in_hdr.ingress_port[8:0] | pkt | | W | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [6:0] | egress | packet_in_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv146 | egress | | SH | | | | | | | | | | | | | | | |
| [15:9] | egress | eg_intr_md._pad0[6:0] | imeta | | W | | | | | | | | | | | | | |
| [8:0] | egress | eg_intr_md.egress_port[8:0] | imeta | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv145 | - | | | | | | | | | | | | | | | | | |
+| phv146 | - | | | | | | | | | | | | | | | | | |
| phv147 | - | | | | | | | | | | | | | | | | | |
| phv148 | - | | | | | | | | | | | | | | | | | |
| phv149 | - | | | | | | | | | | | | | | | | | |
@@ -306,46 +298,45 @@
| [23:21] | ingress | ipv4.flags[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [20:8] | ingress | ipv4.fragOffset[12:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [7:0] | ingress | ipv4.ttl[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv257 | ingress | | | | | | | | | | | | | | | | | |
-| [31:0] | ingress | tcp.ackNo[31:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv258 | ingress | | SH | | | | | | | | | | | | | | | |
+| phv257 | ingress | | SH | | | | | | | | | | | | | | | |
| [31:28] | ingress | tcp.dataOffset[3:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [27:25] | ingress | tcp.res[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [24:22] | ingress | tcp.ecn[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [21:16] | ingress | tcp.ctrl[5:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | ingress | tcp.window[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv259 | ingress | | SH | | | | | | | | | | | | | | | |
+| phv258 | ingress | | SH | | | | | | | | | | | | | | | |
| [31:16] | ingress | tcp.checksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | ingress | tcp.urgentPtr[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv260 | egress | | SH | | | | | | | | | | | | | | | |
+| phv259 | - | | | | | | | | | | | | | | | | | |
+| phv260 | - | | | | | | | | | | | | | | | | | |
+| phv261 | - | | | | | | | | | | | | | | | | | |
+| phv262 | - | | | | | | | | | | | | | | | | | |
+| phv263 | - | | | | | | | | | | | | | | | | | |
+| phv264 | egress | | SH | | | | | | | | | | | | | | | |
| [31:24] | egress | ipv4.ttl[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [23:16] | egress | ipv4.protocol[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | egress | ipv4.hdrChecksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv261 | egress | | | | | | | | | | | | | | | | | |
+| phv265 | egress | | | | | | | | | | | | | | | | | |
| [31:0] | egress | ipv4.srcAddr[31:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv262 | egress | | | | | | | | | | | | | | | | | |
+| phv266 | egress | | | | | | | | | | | | | | | | | |
| [31:0] | egress | ipv4.dstAddr[31:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv263 | egress | | OL,SH | | | | | | | | | | | | | | | |
+| phv267 | egress | | OL,SH | | | | | | | | | | | | | | | |
| [31:16] | egress | udp.length_[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [31:0] | egress | tcp.ackNo[31:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | egress | udp.checksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv264 | egress | | SH | | | | | | | | | | | | | | | |
+| phv268 | egress | | SH | | | | | | | | | | | | | | | |
| [31:28] | egress | tcp.dataOffset[3:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [27:25] | egress | tcp.res[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [24:22] | egress | tcp.ecn[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [21:16] | egress | tcp.ctrl[5:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | egress | tcp.window[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv265 | egress | | SH | | | | | | | | | | | | | | | |
+| phv269 | egress | | SH | | | | | | | | | | | | | | | |
| [31:16] | egress | tcp.checksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | egress | tcp.urgentPtr[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv266 | egress | | | | | | | | | | | | | | | | | |
+| phv270 | egress | | | | | | | | | | | | | | | | | |
| [31:0] | egress | ethernet.dstAddr[39:8] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv267 | egress | | | | | | | | | | | | | | | | | |
+| phv271 | egress | | | | | | | | | | | | | | | | | |
| [31:0] | egress | ethernet.srcAddr[31:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv268 | - | | | | | | | | | | | | | | | | | |
-| phv269 | - | | | | | | | | | | | | | | | | | |
-| phv270 | - | | | | | | | | | | | | | | | | | |
-| phv271 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
| phv272 | - | | | | | | | | | | | | | | | | | |
| phv273 | - | | | | | | | | | | | | | | | | | |
@@ -373,26 +364,28 @@
| phv290 | ingress | | OL,SH | | | | | | | | | | | | | | | |
| [7:0] | ingress | tcp.srcPort[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [7:0] | ingress | udp.length_[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv291 | - | | | | | | | | | | | | | | | | | |
-| phv292 | egress | | SH | | | | | | | | | | | | | | | |
+| phv291 | ingress | | | | | | | | | | | | | | | | | |
+| [7:0] | ingress | tcp.dstPort[15:8] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv292 | ingress | | | | | | | | | | | | | | | | | |
+| [7:0] | ingress | tcp.dstPort[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv293 | - | | | | | | | | | | | | | | | | | |
+| phv294 | - | | | | | | | | | | | | | | | | | |
+| phv295 | - | | | | | | | | | | | | | | | | | |
+| phv296 | egress | | SH | | | | | | | | | | | | | | | |
| [7:4] | egress | ipv4.version[3:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [3:0] | egress | ipv4.ihl[3:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv293 | egress | | | | | | | | | | | | | | | | | |
+| phv297 | egress | | | | | | | | | | | | | | | | | |
| [7:0] | egress | ipv4.diffserv[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv294 | egress | | OL,SH | | | | | | | | | | | | | | | |
+| phv298 | egress | | OL,SH | | | | | | | | | | | | | | | |
| [7:0] | egress | tcp.srcPort[15:8] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [7:0] | egress | udp.srcPort[15:8] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv295 | egress | | OL,SH | | | | | | | | | | | | | | | |
+| phv299 | egress | | OL,SH | | | | | | | | | | | | | | | |
| [7:0] | egress | tcp.srcPort[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [7:0] | egress | udp.srcPort[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv296 | egress | | | | | | | | | | | | | | | | | |
+| phv300 | egress | | | | | | | | | | | | | | | | | |
| [7:0] | egress | ethernet.dstAddr[47:40] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv297 | egress | | | | | | | | | | | | | | | | | |
+| phv301 | egress | | | | | | | | | | | | | | | | | |
| [7:0] | egress | ethernet.srcAddr[39:32] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv298 | - | | | | | | | | | | | | | | | | | |
-| phv299 | - | | | | | | | | | | | | | | | | | |
-| phv300 | - | | | | | | | | | | | | | | | | | |
-| phv301 | - | | | | | | | | | | | | | | | | | |
| phv302 | - | | | | | | | | | | | | | | | | | |
| phv303 | - | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | |
@@ -420,42 +413,45 @@
| [15:8] | ingress | ipv4.totalLen[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [7:0] | ingress | ipv4.identification[15:8] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv322 | ingress | | OL,SH | | | | | | | | | | | | | | | |
-| [15:0] | ingress | tcp.dstPort[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:0] | ingress | tcp.seqNo[31:16] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [15:0] | ingress | udp.checksum[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv323 | ingress | | | | | | | | | | | | | | | | | |
-| [15:0] | ingress | tcp.seqNo[31:16] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv324 | ingress | | | | | | | | | | | | | | | | | |
| [15:0] | ingress | tcp.seqNo[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv325 | - | | | | | | | | | | | | | | | | | |
-| phv326 | egress | | | | | | | | | | | | | | | | | |
+| phv324 | ingress | | | | | | | | | | | | | | | | | |
+| [15:0] | ingress | tcp.ackNo[31:16] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv325 | ingress | | | | | | | | | | | | | | | | | |
+| [15:0] | ingress | tcp.ackNo[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv326 | - | | | | | | | | | | | | | | | | | |
+| phv327 | - | | | | | | | | | | | | | | | | | |
+| phv328 | - | | | | | | | | | | | | | | | | | |
+| phv329 | - | | | | | | | | | | | | | | | | | |
+| phv330 | - | | | | | | | | | | | | | | | | | |
+| phv331 | - | | | | | | | | | | | | | | | | | |
+| phv332 | egress | | | | | | | | | | | | | | | | | |
| [15:0] | egress | ipv4.totalLen[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv327 | egress | | | | | | | | | | | | | | | | | |
+| phv333 | egress | | | | | | | | | | | | | | | | | |
| [15:0] | egress | ipv4.identification[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv328 | egress | | SH | | | | | | | | | | | | | | | |
+| phv334 | egress | | SH | | | | | | | | | | | | | | | |
| [15:13] | egress | ipv4.flags[2:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [12:0] | egress | ipv4.fragOffset[12:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv329 | egress | | OL,SH | | | | | | | | | | | | | | | |
+| phv335 | egress | | | | | | | | | | | | | | | | | |
| [15:0] | egress | tcp.dstPort[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| [15:0] | egress | udp.dstPort[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv330 | egress | | | | | | | | | | | | | | | | | |
+| | | | | | | | | | | | | | | | | | | |
+| phv336 | egress | | OL,SH | | | | | | | | | | | | | | | |
| [15:0] | egress | tcp.seqNo[31:16] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv331 | egress | | | | | | | | | | | | | | | | | |
+| [15:0] | egress | udp.dstPort[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| phv337 | egress | | | | | | | | | | | | | | | | | |
| [15:0] | egress | tcp.seqNo[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv332 | egress | | SH | | | | | | | | | | | | | | | |
+| phv338 | egress | | SH | | | | | | | | | | | | | | | |
| [15:8] | egress | ethernet.dstAddr[7:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [7:0] | egress | ethernet.srcAddr[47:40] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv333 | egress | | | | | | | | | | | | | | | | | |
+| phv339 | egress | | | | | | | | | | | | | | | | | |
| [15:0] | egress | ethernet.etherType[15:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv334 | egress | | SH | | | | | | | | | | | | | | | |
+| phv340 | egress | | OL,SH | | | | | | | | | | | | | | | |
| [15:7] | egress | packet_out_hdr.egress_port[8:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
+| [15:7] | egress | packet_in_hdr.ingress_port[8:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| [6:0] | egress | packet_out_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
-| phv335 | - | | | | | | | | | | | | | | | | | |
-| | | | | | | | | | | | | | | | | | | |
-| phv336 | - | | | | | | | | | | | | | | | | | |
-| phv337 | - | | | | | | | | | | | | | | | | | |
-| phv338 | - | | | | | | | | | | | | | | | | | |
-| phv339 | - | | | | | | | | | | | | | | | | | |
-| phv340 | - | | | | | | | | | | | | | | | | | |
+| [6:0] | egress | packet_in_hdr._padding[6:0] | pkt | | W | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | ~ | R |
| phv341 | - | | | | | | | | | | | | | | | | | |
| phv342 | - | | | | | | | | | | | | | | | | | |
| phv343 | - | | | | | | | | | | | | | | | | | |
@@ -487,9 +483,9 @@
-----------------------------------------------------------------------------------------------------------------------------------------
-Containers used: 61
-Containers with data overlayed: 8 (13.11%)
-Containers shared: 33 (54.10%)
+Containers used: 59
+Containers with data overlayed: 9 (15.25%)
+Containers shared: 29 (49.15%)
------------------------
Legend:
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.constraints.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.constraints.log
index e1c7d39..f45834a 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.constraints.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.constraints.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: pa.constraints.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
To populate this log file, include --print-pa-constraints as a compiler argument.
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.liveness.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.liveness.log
index 093c21a..0401716 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.liveness.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.liveness.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: pa.liveness.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.log
index 9fd69a8f..4cab7bd 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: pa.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
HLIR Version: 0.10.5
@@ -60,7 +60,7 @@
-----------------------------------------------
-----------------------------------------------
- Eliminating unused metadata (99 instances)
+ Eliminating unused metadata (100 instances)
-----------------------------------------------
Removing standard_metadata.ingress_port in ingress
Removing standard_metadata.packet_length in ingress
@@ -80,6 +80,7 @@
Removing ig_intr_md_for_tm.qid in ingress
Removing ig_intr_md_for_tm.icos_for_copy_to_cpu in ingress
Removing ig_intr_md_for_tm._pad2 in ingress
+Removing ig_intr_md_for_tm.copy_to_cpu in ingress
Removing ig_intr_md_for_tm.packet_color in ingress
Removing ig_intr_md_for_tm.disable_ucast_cutthru in ingress
Removing ig_intr_md_for_tm.enable_mcast_cutthru in ingress
@@ -175,10 +176,10 @@
--------------------------------------------
ingress field instance bit width histogram
--------------------------------------------
- Total fields: 51
+ Total fields: 50
Max value: 15
- 1 : xxxxxxxxxx (10)
+ 1 : xxxxxxxxx (9)
2 : x (1)
3 : xxxxx (5)
4 : xxx (3)
@@ -194,17 +195,17 @@
--------------------------------------------
egress field instance bit width histogram
--------------------------------------------
- Total fields: 46
+ Total fields: 44
Max value: 13
- 1 : xxxxxxx (7)
+ 1 : xxxxxx (6)
3 : xxxx (4)
4 : xxx (3)
5 : x (1)
6 : x (1)
7 : xxx (3)
8 : xxx (3)
- 9 : xxxx (4)
+ 9 : xxx (3)
13 : x (1)
16 : xxxxxxxxxxxxx (13)
32 : xxxx (4)
@@ -266,7 +267,7 @@
-----------------------------------------------
-----------------------------------------------
- Eliminating unused metadata (99 instances)
+ Eliminating unused metadata (100 instances)
-----------------------------------------------
Removing standard_metadata.ingress_port in ingress
Removing standard_metadata.packet_length in ingress
@@ -286,6 +287,7 @@
Removing ig_intr_md_for_tm.qid in ingress
Removing ig_intr_md_for_tm.icos_for_copy_to_cpu in ingress
Removing ig_intr_md_for_tm._pad2 in ingress
+Removing ig_intr_md_for_tm.copy_to_cpu in ingress
Removing ig_intr_md_for_tm.packet_color in ingress
Removing ig_intr_md_for_tm.disable_ucast_cutthru in ingress
Removing ig_intr_md_for_tm.enable_mcast_cutthru in ingress
@@ -381,10 +383,10 @@
--------------------------------------------
ingress field instance bit width histogram
--------------------------------------------
- Total fields: 51
+ Total fields: 50
Max value: 15
- 1 : xxxxxxxxxx (10)
+ 1 : xxxxxxxxx (9)
2 : x (1)
3 : xxxxx (5)
4 : xxx (3)
@@ -400,17 +402,17 @@
--------------------------------------------
egress field instance bit width histogram
--------------------------------------------
- Total fields: 46
+ Total fields: 44
Max value: 13
- 1 : xxxxxxx (7)
+ 1 : xxxxxx (6)
3 : xxxx (4)
4 : xxx (3)
5 : x (1)
6 : x (1)
7 : xxx (3)
8 : xxx (3)
- 9 : xxxx (4)
+ 9 : xxx (3)
13 : x (1)
16 : xxxxxxxxxxxxx (13)
32 : xxxx (4)
@@ -421,7 +423,7 @@
---------------------------------------------------------------------------------------------------------------------------------
| --validity_check--ethernet | 1 | egress | x | x | | | |
| --validity_check--ipv4 | 1 | egress | x | x | | | |
-| --validity_check--packet_in_hdr | 1 | egress | x | x | | | x |
+| --validity_check--packet_in_hdr | 1 | egress | x | x | | | |
| --validity_check--packet_out_hdr | 1 | egress | x | x | | | |
| --validity_check--tcp | 1 | egress | x | x | | | |
| --validity_check--udp | 1 | egress | x | x | | | |
@@ -432,8 +434,6 @@
| ethernet.dstAddr | 48 | egress | x | x | | | |
| ethernet.etherType | 16 | egress | x | x | | | |
| ethernet.srcAddr | 48 | egress | x | x | | | |
-| ig_intr_md.ingress_port | 9 | egress | x | | x | x | |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | egress | x | | x | x | |
| ipv4.diffserv | 8 | egress | x | x | | | |
| ipv4.dstAddr | 32 | egress | x | x | | | |
| ipv4.flags | 3 | egress | x | x | | | |
@@ -447,7 +447,7 @@
| ipv4.ttl | 8 | egress | x | x | | | |
| ipv4.version | 4 | egress | x | x | | | |
| packet_in_hdr._padding | 7 | egress | x | x | | | |
-| packet_in_hdr.ingress_port | 9 | egress | x | x | | | x |
+| packet_in_hdr.ingress_port | 9 | egress | x | x | | | |
| packet_out_hdr._padding | 7 | egress | x | x | | | |
| packet_out_hdr.egress_port | 9 | egress | x | x | | | |
| tcp.ackNo | 32 | egress | x | x | | | |
@@ -468,7 +468,7 @@
| --validity_check--ethernet | 1 | ingress | x | x | | | |
| --validity_check--ipv4 | 1 | ingress | x | x | | | |
| --validity_check--metadata_bridge | 1 | ingress | x | x | | | |
-| --validity_check--packet_in_hdr | 1 | ingress | x | x | | | |
+| --validity_check--packet_in_hdr | 1 | ingress | x | x | | | x |
| --validity_check--packet_out_hdr | 1 | ingress | x | x | | x | x |
| --validity_check--tcp | 1 | ingress | x | x | | | |
| --validity_check--udp | 1 | ingress | x | x | | | |
@@ -482,7 +482,6 @@
| ig_intr_md._pad3 | 3 | ingress | x | | x | | |
| ig_intr_md.ingress_port | 9 | ingress | x | x | x | x | |
| ig_intr_md.resubmit_flag | 1 | ingress | x | | x | | |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | ingress | | x | x | | x |
| ig_intr_md_for_tm.drop_ctl | 3 | ingress | | x | x | | x |
| ig_intr_md_for_tm.ucast_egress_port | 9 | ingress | | x | x | x | x |
| ipv4.diffserv | 8 | ingress | x | x | | | |
@@ -498,7 +497,7 @@
| ipv4.ttl | 8 | ingress | x | x | | | |
| ipv4.version | 4 | ingress | x | x | | | |
| packet_in_hdr._padding | 7 | ingress | x | x | | | |
-| packet_in_hdr.ingress_port | 9 | ingress | x | x | | | |
+| packet_in_hdr.ingress_port | 9 | ingress | x | x | | | x |
| packet_out_hdr._padding | 7 | ingress | x | x | | | |
| packet_out_hdr.egress_port | 9 | ingress | x | x | | x | |
| tcp.ackNo | 32 | ingress | x | x | | | |
@@ -554,19 +553,19 @@
parse_pkt_in and parse_pkt_out are exclusive parse states
parse_tcp and parse_udp are exclusive parse states
->>Event 'pa_init' at time 1504795781.21
+>>Event 'pa_init' at time 1504859166.85
Took 0.01 seconds
--------------------------------------------
-PHV MAU Groups: 95
+PHV MAU Groups: 92
--------------------------------------------
Phv Mau Group (ingress) -- 2 instances for total bit width of 18.
+ ig_intr_md.ingress_port <9 bits ingress parsed imeta R>
+ packet_in_hdr.ingress_port <9 bits ingress parsed W>
+
+Phv Mau Group (ingress) -- 2 instances for total bit width of 18.
ig_intr_md_for_tm.ucast_egress_port <9 bits ingress imeta R W>
packet_out_hdr.egress_port <9 bits ingress parsed R>
-Phv Mau Group (egress) -- 2 instances for total bit width of 18.
- packet_in_hdr.ingress_port <9 bits egress parsed W>
- ig_intr_md.ingress_port <9 bits egress parsed imeta R>
-
Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
ig_intr_md.resubmit_flag <1 bits ingress parsed imeta>
@@ -579,20 +578,11 @@
Phv Mau Group (ingress) -- 1 instance for total bit width of 3.
ig_intr_md._pad3 <3 bits ingress parsed imeta>
-Phv Mau Group (ingress) -- 1 instance for total bit width of 9.
- ig_intr_md.ingress_port <9 bits ingress parsed imeta R>
-
Phv Mau Group (ingress) -- 1 instance for total bit width of 3.
ig_intr_md_for_tm.drop_ctl <3 bits ingress imeta W>
Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
- ig_intr_md_for_tm.copy_to_cpu <1 bits ingress imeta W>
-
-Phv Mau Group (ingress) -- 1 instance for total bit width of 9.
- packet_in_hdr.ingress_port <9 bits ingress parsed tagalong>
-
-Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
- --validity_check--packet_in_hdr <1 bits ingress parsed pov>
+ --validity_check--packet_in_hdr <1 bits ingress parsed pov W>
Phv Mau Group (ingress) -- 1 instance for total bit width of 7.
packet_in_hdr._padding <7 bits ingress parsed tagalong>
@@ -714,8 +704,11 @@
Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
--validity_check--metadata_bridge <1 bits ingress parsed pov>
+Phv Mau Group (egress) -- 1 instance for total bit width of 9.
+ packet_in_hdr.ingress_port <9 bits egress parsed tagalong>
+
Phv Mau Group (egress) -- 1 instance for total bit width of 1.
- --validity_check--packet_in_hdr <1 bits egress parsed pov W>
+ --validity_check--packet_in_hdr <1 bits egress parsed pov>
Phv Mau Group (egress) -- 1 instance for total bit width of 7.
packet_in_hdr._padding <7 bits egress parsed tagalong>
@@ -831,9 +824,6 @@
Phv Mau Group (egress) -- 1 instance for total bit width of 16.
udp.checksum <16 bits egress parsed tagalong>
-Phv Mau Group (egress) -- 1 instance for total bit width of 1.
- ig_intr_md_for_tm.copy_to_cpu <1 bits egress parsed imeta R>
-
Phv Mau Group (egress) -- 1 instance for total bit width of 7.
eg_intr_md._pad0 <7 bits egress parsed imeta>
@@ -847,7 +837,7 @@
eg_intr_md.egress_cos <3 bits egress parsed imeta>
->>Event 'pa_resv' at time 1504795781.21
+>>Event 'pa_resv' at time 1504859166.85
Took 0.00 seconds
-----------------------------------------------
@@ -889,239 +879,14 @@
Group 2 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv32
Group 3 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv48
Reserving 32-bit container for ingress: phv0
->>Event 'pa_bridge' at time 1504795781.25
+>>Event 'pa_bridge' at time 1504859166.89
Took 0.04 seconds
-----------------------------------------------
Allocating fields related to bridged metadata
-----------------------------------------------
Allocation Step
- ig_intr_md.ingress_port <9 bits ingress parsed imeta R> and ig_intr_md.ingress_port <9 bits egress parsed imeta R>
- ig_intr_md_for_tm.copy_to_cpu <1 bits ingress imeta W> and ig_intr_md_for_tm.copy_to_cpu <1 bits egress parsed imeta R>
-
-
-Allowed alignment for fields:
- ig_intr_md.ingress_port -> [0, 8, 16, 24]
- ig_intr_md_for_tm.copy_to_cpu -> [0, 1, 2, 3, 4, 5, 6, 7]
-
-Required packing for bridged metadata: 1
- ig_intr_md.ingress_port (ingress)
- phv[15:15] = ig_intr_md.resubmit_flag[0:0]
- phv[14:14] = ig_intr_md._pad1[0:0]
- phv[13:12] = ig_intr_md._pad2[1:0]
- phv[11:9] = ig_intr_md._pad3[2:0]
- phv[8:0] = ig_intr_md.ingress_port[8:0]
-ig_intr_md_for_tm.copy_to_cpu cannot share with any fields: total bits 1
-
-
-All combinations = 1
-Valid combinations = 1
-Choosing to pack non-byte multiple metadata as below, which wastes 0 bits
-
-Sharing capabilities of groups: (2)
-Group ['ig_intr_md.resubmit_flag', 'ig_intr_md._pad1', 'ig_intr_md._pad2', 'ig_intr_md._pad3', 'ig_intr_md.ingress_port'] can share with 0 other groups:
-Group ['ig_intr_md_for_tm.copy_to_cpu'] can share with 0 other groups:
-
-Merged sharing capabilities of groups: (2)
-Group ['ig_intr_md.resubmit_flag', 'ig_intr_md._pad1', 'ig_intr_md._pad2', 'ig_intr_md._pad3', 'ig_intr_md.ingress_port'] can share with 0 other groups (16 bits):
-Group ['ig_intr_md_for_tm.copy_to_cpu'] can share with 0 other groups (1 bits):
-
-Final group packing:
-Group 0:
- ['ig_intr_md_for_tm.copy_to_cpu']
-Group 1:
- ['ig_intr_md.resubmit_flag', 'ig_intr_md._pad1', 'ig_intr_md._pad2', 'ig_intr_md._pad3', 'ig_intr_md.ingress_port']
-Preferred packing is [8, 16]
-
-Final ingress bridged metadata packing: 24 bits (3 bytes)
- -pad-0- / 7 bits
- ig_intr_md_for_tm.copy_to_cpu / 1 bits
- ig_intr_md.resubmit_flag / 1 bits
- ig_intr_md._pad1 / 1 bits
- ig_intr_md._pad2 / 2 bits
- ig_intr_md._pad3 / 3 bits
- ig_intr_md.ingress_port / 9 bits
-
-Final egress bridged metadata packing: 24 bits (3 bytes)
- -pad-0- / 7 bits
- ig_intr_md_for_tm.copy_to_cpu / 1 bits
- -pad-1- / 7 bits
- ig_intr_md.ingress_port / 9 bits
-
--------------------------------------------
-Allocating parsed header: pkt fields (7) / meta fields (0) using extraction bandwidth 224
--------------------------------------------
-Extracted bits: 24
-Set metadata bits: 0
-Gress: ingress
-bits_will_need_to_parse = 24
-unused_metadata_container_bits = 0
-min_parse_states = 1
-bits_per_state = 24
-Parse state 0 (24 bits)
- -pad-0- [6:0]
- ig_intr_md_for_tm.copy_to_cpu [0:0]
- ig_intr_md.resubmit_flag [0:0]
- ig_intr_md._pad1 [0:0]
- ig_intr_md._pad2 [1:0]
- ig_intr_md._pad3 [2:0]
- ig_intr_md.ingress_port [8:0]
-----------------------------------------------------------------------------------------------------
-| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-----------------------------------------------------------------------------------------------------
-| -pad-0- | 7 | True | - | - | - | None | 1 |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | False | - | - | - | 1 | 1 |
-| ig_intr_md.resubmit_flag | 1 | False | - | - | - | 1 | 1 |
-| ig_intr_md._pad1 | 1 | False | - | - | - | 1 | 1 |
-| ig_intr_md._pad2 | 2 | False | - | - | - | 1 | 1 |
-| ig_intr_md._pad3 | 3 | False | - | - | - | 1 | 1 |
-| ig_intr_md.ingress_port | 9 | False | - | - | - | 2 | 1 |
-----------------------------------------------------------------------------------------------------
-
-Packing options: 5
-MAU containers available:
- 8-bit: 48
- 16-bit: 80
- 32-bit: 47
-Tagalong containers available:
- 8-bit: 32
- 16-bit: 48
- 32-bit: 32
-Initial packing options: 5
-
-Packing option 0: [8, 16]
-MAU containers after:
- 8-bit: 47
- 16-bit: 79
- 32-bit: 47
-+----------------------------------------+
-| -pad-0- [6:0] |
-| ig_intr_md_for_tm.copy_to_cpu [0:0] |
-+----------------------------------------+
-| ig_intr_md.resubmit_flag [0:0] |
-| ig_intr_md._pad1 [0:0] |
-| ig_intr_md._pad2 [1:0] |
-| ig_intr_md._pad3 [2:0] |
-| ig_intr_md.ingress_port [8:0] |
-+----------------------------------------+
-
-Looking at -pad-0- (ingress) [6:0], with test_alloc = False
-Looking at ig_intr_md_for_tm.copy_to_cpu (ingress) [0:0], with test_alloc = True
-----> ig_intr_md_for_tm.copy_to_cpu (ingress) is allocated? False
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 3
- Group 4 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv64
- Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
- Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
-***Allocating phv64[7:1] for -pad-0-[6:0]
-***Allocating phv64[0:0] for ig_intr_md_for_tm.copy_to_cpu[0:0]
-Looking at ig_intr_md.resubmit_flag (ingress) [0:0], with test_alloc = True
-----> ig_intr_md.resubmit_flag (ingress) is allocated? False
-Looking at ig_intr_md._pad1 (ingress) [0:0], with test_alloc = True
-Looking at ig_intr_md._pad2 (ingress) [1:0], with test_alloc = True
-Looking at ig_intr_md._pad3 (ingress) [2:0], with test_alloc = True
-Looking at ig_intr_md.ingress_port (ingress) [8:0], with test_alloc = True
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 5
- Group 8 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv128
- Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv160
- Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv176
- Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv192
- Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
-***Allocating phv128[15:15] for ig_intr_md.resubmit_flag[0:0]
-***Allocating phv128[14:14] for ig_intr_md._pad1[0:0]
-***Allocating phv128[13:12] for ig_intr_md._pad2[1:0]
-***Allocating phv128[11:9] for ig_intr_md._pad3[2:0]
-***Allocating phv128[8:0] for ig_intr_md.ingress_port[8:0]
-Packing options tried: 1
-Packing options skipped: 0
-
-
--------------------------------------------
-Allocating parsed header: pkt fields (4) / meta fields (0) using extraction bandwidth 224
--------------------------------------------
-Extracted bits: 24
-Set metadata bits: 0
-Gress: egress
-bits_will_need_to_parse = 24
-unused_metadata_container_bits = 0
-min_parse_states = 1
-bits_per_state = 24
-Parse state 0 (24 bits)
- -pad-0- [6:0]
- ig_intr_md_for_tm.copy_to_cpu [0:0]
- -pad-1- [6:0]
- ig_intr_md.ingress_port [8:0]
-----------------------------------------------------------------------------------------------------
-| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-----------------------------------------------------------------------------------------------------
-| -pad-0- | 7 | True | - | - | - | None | 1 |
-| ig_intr_md_for_tm.copy_to_cpu | 1 | False | - | - | - | None | 1 |
-| -pad-1- | 7 | True | - | - | - | None | 1 |
-| ig_intr_md.ingress_port | 9 | False | - | - | [32] | None | 2 |
-----------------------------------------------------------------------------------------------------
-
-Packing options: 5
-MAU containers available:
- 8-bit: 48
- 16-bit: 80
- 32-bit: 48
-Tagalong containers available:
- 8-bit: 32
- 16-bit: 48
- 32-bit: 32
-Initial packing options: 5
-
-Packing option 0: [8, 16]
-MAU containers after:
- 8-bit: 47
- 16-bit: 78
- 32-bit: 48
-+----------------------------------------+
-| -pad-0- [6:0] |
-| ig_intr_md_for_tm.copy_to_cpu [0:0] |
-+----------------------------------------+
-| -pad-1- [6:0] |
-| ig_intr_md.ingress_port [8:0] |
-+----------------------------------------+
-
-Looking at -pad-0- (egress) [6:0], with test_alloc = False
-Looking at ig_intr_md_for_tm.copy_to_cpu (egress) [0:0], with test_alloc = True
-----> ig_intr_md_for_tm.copy_to_cpu (egress) is allocated? False
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 3
- Group 5 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv80
- Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv96
- Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv112
-***Allocating phv80[7:1] for -pad-0-[6:0]
-***Allocating phv80[0:0] for ig_intr_md_for_tm.copy_to_cpu[0:0]
-Looking at -pad-1- (egress) [6:0], with test_alloc = False
-Looking at ig_intr_md.ingress_port (egress) [8:0], with test_alloc = True
-----> ig_intr_md.ingress_port (egress) is allocated? False
-Checking if can overlay metadata field.
-No required PHV group.
-Could not find container to overlay in.
-
-MAU groups: 5
- Group 9 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv144
- Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv160
- Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv176
- Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv192
- Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv208
-***Allocating phv144[15:9] for -pad-1-[6:0]
-***Allocating phv144[8:0] for ig_intr_md.ingress_port[8:0]
-Packing options tried: 1
-Packing options skipped: 0
-
+ No bridged metadata field instances required
After allocating bridged metadata:
Allocation state: Final Allocation
@@ -1135,19 +900,19 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 1 (1.56%) | 32 (1.56%) | 2048 |
| | | | |
-| 4 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
-| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 4 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 5 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 2 (3.12%) | 16 (3.12%) | 512 |
+| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 512 |
| | | | |
-| 8 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
-| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 8 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 9 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 2 (2.08%) | 32 (2.08%) | 1536 |
+| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 1536 |
| | | | |
| 14 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
@@ -1162,13 +927,13 @@
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 768 |
| | | | |
-| MAU total | 5 (2.23%) | 80 (1.95%) | 4096 |
+| MAU total | 1 (0.45%) | 32 (0.78%) | 4096 |
| Tagalong total | 0 (0.00%) | 0 (0.00%) | 2048 |
-| Overall total | 5 (1.49%) | 80 (1.30%) | 6144 |
+| Overall total | 1 (0.30%) | 32 (0.52%) | 6144 |
---------------------------------------------------------------------------
->>Event 'pa_phase0' at time 1504795781.66
- Took 0.41 seconds
+>>Event 'pa_phase0' at time 1504859166.89
+ Took 0.00 seconds
-----------------------------------------------
Allocating Phase 0-related metadata
@@ -1188,19 +953,19 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 1 (1.56%) | 32 (1.56%) | 2048 |
| | | | |
-| 4 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
-| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 4 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 5 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 2 (3.12%) | 16 (3.12%) | 512 |
+| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 512 |
| | | | |
-| 8 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
-| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 8 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 9 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 2 (2.08%) | 32 (2.08%) | 1536 |
+| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 1536 |
| | | | |
| 14 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
@@ -1215,12 +980,12 @@
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 768 |
| | | | |
-| MAU total | 5 (2.23%) | 80 (1.95%) | 4096 |
+| MAU total | 1 (0.45%) | 32 (0.78%) | 4096 |
| Tagalong total | 0 (0.00%) | 0 (0.00%) | 2048 |
-| Overall total | 5 (1.49%) | 80 (1.30%) | 6144 |
+| Overall total | 1 (0.30%) | 32 (0.52%) | 6144 |
---------------------------------------------------------------------------
->>Event 'pa_critical' at time 1504795781.66
+>>Event 'pa_critical' at time 1504859166.90
Took 0.00 seconds
-----------------------------------------------
@@ -1229,6 +994,7 @@
Allocation Step
All Sorted parse nodes:
+ ingress_intrinsic_metadata (ingress) with bits = 16 and max = 2
parse_pkt_out (ingress) with bits = 16 and max = 2
parse_ipv4 (ingress) with bits = 160 and max = 1
parse_tcp (ingress) with bits = 160 and max = 1
@@ -1237,7 +1003,6 @@
parse_ethernet (ingress) with bits = 112 and max = 1
parse_ethernet (egress) with bits = 112 and max = 1
egress_intrinsic_metadata (egress) with bits = 24 and max = 1
- ingress_intrinsic_metadata (ingress) with bits = 16 and max = 1
parse_pkt_out (egress) with bits = 16 and max = 1
start () with bits = 0 and max = 0
default_parser () with bits = 0 and max = 0
@@ -1249,6 +1014,85 @@
Total packet bits: 936
Total meta bits: 0
Total bits: 936
+Working on parse node ingress_intrinsic_metadata (9) (ingress)
+
+-------------------------------------------
+Allocating parsed header: pkt fields (5) / meta fields (0) using extraction bandwidth 224
+-------------------------------------------
+Extracted bits: 16
+Set metadata bits: 0
+Gress: ingress
+bits_will_need_to_parse = 16
+unused_metadata_container_bits = 0
+min_parse_states = 1
+bits_per_state = 16
+Parse state 0 (16 bits)
+ ig_intr_md.resubmit_flag [0:0]
+ ig_intr_md._pad1 [0:0]
+ ig_intr_md._pad2 [1:0]
+ ig_intr_md._pad3 [2:0]
+ ig_intr_md.ingress_port [8:0]
+-----------------------------------------------------------------------------------------------
+| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
+-----------------------------------------------------------------------------------------------
+| ig_intr_md.resubmit_flag | 1 | False | - | - | - | 1 | 1 |
+| ig_intr_md._pad1 | 1 | False | - | - | - | 1 | 1 |
+| ig_intr_md._pad2 | 2 | False | - | - | - | 1 | 1 |
+| ig_intr_md._pad3 | 3 | False | - | - | - | 1 | 1 |
+| ig_intr_md.ingress_port | 9 | False | - | - | [32] | 2 | 2 |
+-----------------------------------------------------------------------------------------------
+
+min_extracts[8] = 1
+min_extracts[16] = 1
+min_extracts[32] = 1
+Packing options: 2
+MAU containers available:
+ 8-bit: 48
+ 16-bit: 80
+ 32-bit: 47
+Tagalong containers available:
+ 8-bit: 32
+ 16-bit: 48
+ 32-bit: 32
+Initial packing options: 2
+
+Packing option 0: [16]
+MAU containers after:
+ 8-bit: 48
+ 16-bit: 78
+ 32-bit: 47
++-----------------------------------+
+| ig_intr_md.resubmit_flag [0:0] |
+| ig_intr_md._pad1 [0:0] |
+| ig_intr_md._pad2 [1:0] |
+| ig_intr_md._pad3 [2:0] |
+| ig_intr_md.ingress_port [8:0] |
++-----------------------------------+
+
+Looking at ig_intr_md.resubmit_flag (ingress) [0:0], with test_alloc = True
+----> ig_intr_md.resubmit_flag (ingress) is allocated? False
+Looking at ig_intr_md._pad1 (ingress) [0:0], with test_alloc = True
+Looking at ig_intr_md._pad2 (ingress) [1:0], with test_alloc = True
+Looking at ig_intr_md._pad3 (ingress) [2:0], with test_alloc = True
+Looking at ig_intr_md.ingress_port (ingress) [8:0], with test_alloc = True
+Checking if can overlay metadata field.
+No required PHV group.
+Could not find container to overlay in.
+
+MAU groups: 5
+ Group 8 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv128
+ Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv160
+ Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv176
+ Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv192
+ Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
+***Allocating phv128[15:15] for ig_intr_md.resubmit_flag[0:0]
+***Allocating phv128[14:14] for ig_intr_md._pad1[0:0]
+***Allocating phv128[13:12] for ig_intr_md._pad2[1:0]
+***Allocating phv128[11:9] for ig_intr_md._pad3[2:0]
+***Allocating phv128[8:0] for ig_intr_md.ingress_port[8:0]
+Packing options tried: 1
+Packing options skipped: 0
+
Working on parse node parse_pkt_out (4) (ingress)
-------------------------------------------
@@ -1276,8 +1120,8 @@
min_extracts[32] = 1
Packing options: 2
MAU containers available:
- 8-bit: 47
- 16-bit: 79
+ 8-bit: 48
+ 16-bit: 78
32-bit: 47
Tagalong containers available:
8-bit: 32
@@ -1287,8 +1131,8 @@
Packing option 0: [16]
MAU containers after:
- 8-bit: 47
- 16-bit: 77
+ 8-bit: 48
+ 16-bit: 76
32-bit: 47
+-------------------------------------+
| packet_out_hdr.egress_port [8:0] |
@@ -1298,6 +1142,7 @@
Looking at packet_out_hdr.egress_port (ingress) [8:0], with test_alloc = True
----> packet_out_hdr.egress_port (ingress) is allocated? False
Looking at packet_out_hdr._padding (ingress) [6:0], with test_alloc = True
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
MAU groups: 5
Group 8 16 bits -- avail 15 -- ingress avail 15 and remain 13 and promised 2 and req 2 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv129
@@ -1357,7 +1202,7 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 47
+ 8-bit: 48
16-bit: 77
32-bit: 47
Tagalong containers available:
@@ -1368,7 +1213,7 @@
Packing option 0: [8, 16, 16, 32, 32, 8, 16, 32]
MAU containers after:
- 8-bit: 46
+ 8-bit: 47
16-bit: 76
32-bit: 45
+------------------------------+
@@ -1437,10 +1282,10 @@
----> ipv4.srcAddr (ingress) is allocated? False
MAU groups: 3
- Group 4 8 bits -- avail 15 -- ingress avail 15 and remain 14 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv65
+ Group 4 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv64
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
-***Allocating phv65[7:0] for ipv4.srcAddr[23:16]
+***Allocating phv64[7:0] for ipv4.srcAddr[23:16]
Looking at ipv4.srcAddr (ingress) [15:0], with test_alloc = True
----> ipv4.srcAddr (ingress) is allocated? False
@@ -1507,7 +1352,7 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 46
+ 8-bit: 47
16-bit: 76
32-bit: 45
Tagalong containers available:
@@ -1516,9 +1361,9 @@
32-bit: 31
Initial packing options: 5196
-Packing option 0: [8, 8, 16, 16, 16, 32, 32, 32]
+Packing option 0: [8, 8, 8, 8, 16, 16, 16, 16, 32, 32]
MAU containers after:
- 8-bit: 46
+ 8-bit: 47
16-bit: 76
32-bit: 45
+-------------------------+
@@ -1526,13 +1371,17 @@
+-------------------------+
| tcp.srcPort [7:0] |
+-------------------------+
-| tcp.dstPort [15:0] |
+| tcp.dstPort [15:8] |
++-------------------------+
+| tcp.dstPort [7:0] |
+-------------------------+
| tcp.seqNo [31:16] |
+-------------------------+
| tcp.seqNo [15:0] |
+-------------------------+
-| tcp.ackNo [31:0] |
+| tcp.ackNo [31:16] |
++-------------------------+
+| tcp.ackNo [15:0] |
+-------------------------+
| tcp.dataOffset [3:0] |
| tcp.res [2:0] |
@@ -1550,34 +1399,40 @@
Looking at tcp.srcPort (ingress) [7:0], with test_alloc = True
----> tcp.srcPort (ingress) is allocated? False
***Allocating phv290[7:0] for tcp.srcPort[7:0]
-Looking at tcp.dstPort (ingress) [15:0], with test_alloc = True
+Looking at tcp.dstPort (ingress) [15:8], with test_alloc = True
----> tcp.dstPort (ingress) is allocated? False
-***Allocating phv322[15:0] for tcp.dstPort[15:0]
+***Allocating phv291[7:0] for tcp.dstPort[15:8]
+Looking at tcp.dstPort (ingress) [7:0], with test_alloc = True
+----> tcp.dstPort (ingress) is allocated? False
+***Allocating phv292[7:0] for tcp.dstPort[7:0]
Looking at tcp.seqNo (ingress) [31:16], with test_alloc = True
----> tcp.seqNo (ingress) is allocated? False
-***Allocating phv323[15:0] for tcp.seqNo[31:16]
+***Allocating phv322[15:0] for tcp.seqNo[31:16]
Looking at tcp.seqNo (ingress) [15:0], with test_alloc = True
----> tcp.seqNo (ingress) is allocated? False
-***Allocating phv324[15:0] for tcp.seqNo[15:0]
-Looking at tcp.ackNo (ingress) [31:0], with test_alloc = True
+***Allocating phv323[15:0] for tcp.seqNo[15:0]
+Looking at tcp.ackNo (ingress) [31:16], with test_alloc = True
----> tcp.ackNo (ingress) is allocated? False
-***Allocating phv257[31:0] for tcp.ackNo[31:0]
+***Allocating phv324[15:0] for tcp.ackNo[31:16]
+Looking at tcp.ackNo (ingress) [15:0], with test_alloc = True
+----> tcp.ackNo (ingress) is allocated? False
+***Allocating phv325[15:0] for tcp.ackNo[15:0]
Looking at tcp.dataOffset (ingress) [3:0], with test_alloc = True
----> tcp.dataOffset (ingress) is allocated? False
Looking at tcp.res (ingress) [2:0], with test_alloc = True
Looking at tcp.ecn (ingress) [2:0], with test_alloc = True
Looking at tcp.ctrl (ingress) [5:0], with test_alloc = True
Looking at tcp.window (ingress) [15:0], with test_alloc = True
-***Allocating phv258[31:28] for tcp.dataOffset[3:0]
-***Allocating phv258[27:25] for tcp.res[2:0]
-***Allocating phv258[24:22] for tcp.ecn[2:0]
-***Allocating phv258[21:16] for tcp.ctrl[5:0]
-***Allocating phv258[15:0] for tcp.window[15:0]
+***Allocating phv257[31:28] for tcp.dataOffset[3:0]
+***Allocating phv257[27:25] for tcp.res[2:0]
+***Allocating phv257[24:22] for tcp.ecn[2:0]
+***Allocating phv257[21:16] for tcp.ctrl[5:0]
+***Allocating phv257[15:0] for tcp.window[15:0]
Looking at tcp.checksum (ingress) [15:0], with test_alloc = True
----> tcp.checksum (ingress) is allocated? False
Looking at tcp.urgentPtr (ingress) [15:0], with test_alloc = True
-***Allocating phv259[31:16] for tcp.checksum[15:0]
-***Allocating phv259[15:0] for tcp.urgentPtr[15:0]
+***Allocating phv258[31:16] for tcp.checksum[15:0]
+***Allocating phv258[15:0] for tcp.urgentPtr[15:0]
Packing options tried: 1
Packing options skipped: 0
@@ -1628,19 +1483,19 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
- 8-bit: 28
- 16-bit: 42
- 32-bit: 28
+ 8-bit: 24
+ 16-bit: 36
+ 32-bit: 24
Initial packing options: 5196
Packing option 0: [8, 8, 16, 16, 16, 32, 32, 32]
MAU containers after:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
+------------------------------+
| ipv4.version [3:0] |
@@ -1667,35 +1522,35 @@
Looking at ipv4.version (egress) [3:0], with test_alloc = True
----> ipv4.version (egress) is allocated? False
Looking at ipv4.ihl (egress) [3:0], with test_alloc = True
-***Allocating phv292[7:4] for ipv4.version[3:0]
-***Allocating phv292[3:0] for ipv4.ihl[3:0]
+***Allocating phv296[7:4] for ipv4.version[3:0]
+***Allocating phv296[3:0] for ipv4.ihl[3:0]
Looking at ipv4.diffserv (egress) [7:0], with test_alloc = True
----> ipv4.diffserv (egress) is allocated? False
-***Allocating phv293[7:0] for ipv4.diffserv[7:0]
+***Allocating phv297[7:0] for ipv4.diffserv[7:0]
Looking at ipv4.totalLen (egress) [15:0], with test_alloc = True
----> ipv4.totalLen (egress) is allocated? False
-***Allocating phv326[15:0] for ipv4.totalLen[15:0]
+***Allocating phv332[15:0] for ipv4.totalLen[15:0]
Looking at ipv4.identification (egress) [15:0], with test_alloc = True
----> ipv4.identification (egress) is allocated? False
-***Allocating phv327[15:0] for ipv4.identification[15:0]
+***Allocating phv333[15:0] for ipv4.identification[15:0]
Looking at ipv4.flags (egress) [2:0], with test_alloc = True
----> ipv4.flags (egress) is allocated? False
Looking at ipv4.fragOffset (egress) [12:0], with test_alloc = True
-***Allocating phv328[15:13] for ipv4.flags[2:0]
-***Allocating phv328[12:0] for ipv4.fragOffset[12:0]
+***Allocating phv334[15:13] for ipv4.flags[2:0]
+***Allocating phv334[12:0] for ipv4.fragOffset[12:0]
Looking at ipv4.ttl (egress) [7:0], with test_alloc = True
----> ipv4.ttl (egress) is allocated? False
Looking at ipv4.protocol (egress) [7:0], with test_alloc = True
Looking at ipv4.hdrChecksum (egress) [15:0], with test_alloc = True
-***Allocating phv260[31:24] for ipv4.ttl[7:0]
-***Allocating phv260[23:16] for ipv4.protocol[7:0]
-***Allocating phv260[15:0] for ipv4.hdrChecksum[15:0]
+***Allocating phv264[31:24] for ipv4.ttl[7:0]
+***Allocating phv264[23:16] for ipv4.protocol[7:0]
+***Allocating phv264[15:0] for ipv4.hdrChecksum[15:0]
Looking at ipv4.srcAddr (egress) [31:0], with test_alloc = True
----> ipv4.srcAddr (egress) is allocated? False
-***Allocating phv261[31:0] for ipv4.srcAddr[31:0]
+***Allocating phv265[31:0] for ipv4.srcAddr[31:0]
Looking at ipv4.dstAddr (egress) [31:0], with test_alloc = True
----> ipv4.dstAddr (egress) is allocated? False
-***Allocating phv262[31:0] for ipv4.dstAddr[31:0]
+***Allocating phv266[31:0] for ipv4.dstAddr[31:0]
Packing options tried: 1
Packing options skipped: 0
@@ -1744,19 +1599,19 @@
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
- 8-bit: 26
- 16-bit: 39
- 32-bit: 25
+ 8-bit: 22
+ 16-bit: 33
+ 32-bit: 21
Initial packing options: 5196
Packing option 0: [8, 8, 16, 16, 16, 32, 32, 32]
MAU containers after:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
+-------------------------+
| tcp.srcPort [15:8] |
@@ -1783,38 +1638,38 @@
Looking at tcp.srcPort (egress) [15:8], with test_alloc = True
----> tcp.srcPort (egress) is allocated? False
-***Allocating phv294[7:0] for tcp.srcPort[15:8]
+***Allocating phv298[7:0] for tcp.srcPort[15:8]
Looking at tcp.srcPort (egress) [7:0], with test_alloc = True
----> tcp.srcPort (egress) is allocated? False
-***Allocating phv295[7:0] for tcp.srcPort[7:0]
+***Allocating phv299[7:0] for tcp.srcPort[7:0]
Looking at tcp.dstPort (egress) [15:0], with test_alloc = True
----> tcp.dstPort (egress) is allocated? False
-***Allocating phv329[15:0] for tcp.dstPort[15:0]
+***Allocating phv335[15:0] for tcp.dstPort[15:0]
Looking at tcp.seqNo (egress) [31:16], with test_alloc = True
----> tcp.seqNo (egress) is allocated? False
-***Allocating phv330[15:0] for tcp.seqNo[31:16]
+***Allocating phv336[15:0] for tcp.seqNo[31:16]
Looking at tcp.seqNo (egress) [15:0], with test_alloc = True
----> tcp.seqNo (egress) is allocated? False
-***Allocating phv331[15:0] for tcp.seqNo[15:0]
+***Allocating phv337[15:0] for tcp.seqNo[15:0]
Looking at tcp.ackNo (egress) [31:0], with test_alloc = True
----> tcp.ackNo (egress) is allocated? False
-***Allocating phv263[31:0] for tcp.ackNo[31:0]
+***Allocating phv267[31:0] for tcp.ackNo[31:0]
Looking at tcp.dataOffset (egress) [3:0], with test_alloc = True
----> tcp.dataOffset (egress) is allocated? False
Looking at tcp.res (egress) [2:0], with test_alloc = True
Looking at tcp.ecn (egress) [2:0], with test_alloc = True
Looking at tcp.ctrl (egress) [5:0], with test_alloc = True
Looking at tcp.window (egress) [15:0], with test_alloc = True
-***Allocating phv264[31:28] for tcp.dataOffset[3:0]
-***Allocating phv264[27:25] for tcp.res[2:0]
-***Allocating phv264[24:22] for tcp.ecn[2:0]
-***Allocating phv264[21:16] for tcp.ctrl[5:0]
-***Allocating phv264[15:0] for tcp.window[15:0]
+***Allocating phv268[31:28] for tcp.dataOffset[3:0]
+***Allocating phv268[27:25] for tcp.res[2:0]
+***Allocating phv268[24:22] for tcp.ecn[2:0]
+***Allocating phv268[21:16] for tcp.ctrl[5:0]
+***Allocating phv268[15:0] for tcp.window[15:0]
Looking at tcp.checksum (egress) [15:0], with test_alloc = True
----> tcp.checksum (egress) is allocated? False
Looking at tcp.urgentPtr (egress) [15:0], with test_alloc = True
-***Allocating phv265[31:16] for tcp.checksum[15:0]
-***Allocating phv265[15:0] for tcp.urgentPtr[15:0]
+***Allocating phv269[31:16] for tcp.checksum[15:0]
+***Allocating phv269[15:0] for tcp.urgentPtr[15:0]
Packing options tried: 1
Packing options skipped: 0
@@ -1847,18 +1702,18 @@
min_extracts[32] = 1
Packing options: 604
MAU containers available:
- 8-bit: 46
+ 8-bit: 47
16-bit: 76
32-bit: 45
Tagalong containers available:
- 8-bit: 21
- 16-bit: 31
- 32-bit: 20
+ 8-bit: 19
+ 16-bit: 30
+ 32-bit: 21
Initial packing options: 604
Packing option 0: [8, 32, 16, 8, 32, 16]
MAU containers after:
- 8-bit: 44
+ 8-bit: 45
16-bit: 74
32-bit: 43
+-----------------------------+
@@ -1880,10 +1735,10 @@
----> ethernet.dstAddr (ingress) is allocated? False
MAU groups: 3
- Group 4 8 bits -- avail 14 -- ingress avail 14 and remain 13 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv66
+ Group 4 8 bits -- avail 15 -- ingress avail 15 and remain 14 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv65
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
-***Allocating phv66[7:0] for ethernet.dstAddr[47:40]
+***Allocating phv65[7:0] for ethernet.dstAddr[47:40]
Looking at ethernet.dstAddr (ingress) [39:8], with test_alloc = True
----> ethernet.dstAddr (ingress) is allocated? False
@@ -1908,10 +1763,10 @@
----> ethernet.srcAddr (ingress) is allocated? False
MAU groups: 3
- Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
+ Group 4 8 bits -- avail 14 -- ingress avail 14 and remain 13 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv66
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
-***Allocating phv67[7:0] for ethernet.srcAddr[39:32]
+***Allocating phv66[7:0] for ethernet.srcAddr[39:32]
Looking at ethernet.srcAddr (ingress) [31:0], with test_alloc = True
----> ethernet.srcAddr (ingress) is allocated? False
@@ -1962,19 +1817,19 @@
min_extracts[32] = 1
Packing options: 604
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
- 8-bit: 24
- 16-bit: 36
- 32-bit: 22
+ 8-bit: 20
+ 16-bit: 30
+ 32-bit: 18
Initial packing options: 604
Packing option 0: [8, 32, 16, 8, 32, 16]
MAU containers after:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
+-----------------------------+
| ethernet.dstAddr [47:40] |
@@ -1993,24 +1848,24 @@
Looking at ethernet.dstAddr (egress) [47:40], with test_alloc = True
----> ethernet.dstAddr (egress) is allocated? False
-***Allocating phv296[7:0] for ethernet.dstAddr[47:40]
+***Allocating phv300[7:0] for ethernet.dstAddr[47:40]
Looking at ethernet.dstAddr (egress) [39:8], with test_alloc = True
----> ethernet.dstAddr (egress) is allocated? False
-***Allocating phv266[31:0] for ethernet.dstAddr[39:8]
+***Allocating phv270[31:0] for ethernet.dstAddr[39:8]
Looking at ethernet.dstAddr (egress) [7:0], with test_alloc = True
----> ethernet.dstAddr (egress) is allocated? False
Looking at ethernet.srcAddr (egress) [47:40], with test_alloc = True
-***Allocating phv332[15:8] for ethernet.dstAddr[7:0]
-***Allocating phv332[7:0] for ethernet.srcAddr[47:40]
+***Allocating phv338[15:8] for ethernet.dstAddr[7:0]
+***Allocating phv338[7:0] for ethernet.srcAddr[47:40]
Looking at ethernet.srcAddr (egress) [39:32], with test_alloc = True
----> ethernet.srcAddr (egress) is allocated? False
-***Allocating phv297[7:0] for ethernet.srcAddr[39:32]
+***Allocating phv301[7:0] for ethernet.srcAddr[39:32]
Looking at ethernet.srcAddr (egress) [31:0], with test_alloc = True
----> ethernet.srcAddr (egress) is allocated? False
-***Allocating phv267[31:0] for ethernet.srcAddr[31:0]
+***Allocating phv271[31:0] for ethernet.srcAddr[31:0]
Looking at ethernet.etherType (egress) [15:0], with test_alloc = True
----> ethernet.etherType (egress) is allocated? False
-***Allocating phv333[15:0] for ethernet.etherType[15:0]
+***Allocating phv339[15:0] for ethernet.etherType[15:0]
Packing options tried: 1
Packing options skipped: 0
@@ -2045,19 +1900,19 @@
min_extracts[32] = 1
Packing options: 3
MAU containers available:
- 8-bit: 47
- 16-bit: 78
+ 8-bit: 48
+ 16-bit: 80
32-bit: 48
Tagalong containers available:
- 8-bit: 22
- 16-bit: 34
- 32-bit: 20
+ 8-bit: 18
+ 16-bit: 28
+ 32-bit: 16
Initial packing options: 3
Packing option 1: [16, 8]
MAU containers after:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
+---------------------------------+
| eg_intr_md._pad0 [6:0] |
@@ -2072,31 +1927,29 @@
Looking at eg_intr_md.egress_port (egress) [8:0], with test_alloc = True
Checking if can overlay metadata field.
No required PHV group.
- Group 9 16 bits -- deparsed True -- avail 15 and promised 2 -- ingress promised 0 and remain 0 and req 8 -- egress promised 2 and remain 13 and req 2 -- act like deparsed True -- container_to_use phv146 -- fails False
Could not find container to overlay in.
MAU groups: 5
- Group 9 16 bits -- avail 15 -- ingress avail 8 and remain 8 and promised 0 and req 0 -- egress avail 15 and remain 13 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv146
+ Group 9 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv144
Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv160
Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv176
Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv192
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv208
-***Allocating phv146[15:9] for eg_intr_md._pad0[6:0]
-***Allocating phv146[8:0] for eg_intr_md.egress_port[8:0]
+***Allocating phv144[15:9] for eg_intr_md._pad0[6:0]
+***Allocating phv144[8:0] for eg_intr_md.egress_port[8:0]
Looking at eg_intr_md._pad7 (egress) [4:0], with test_alloc = True
----> eg_intr_md._pad7 (egress) is allocated? False
Looking at eg_intr_md.egress_cos (egress) [2:0], with test_alloc = True
Checking if can overlay metadata field.
No required PHV group.
- Group 5 8 bits -- deparsed True -- avail 15 and promised 1 -- ingress promised 0 and remain 0 and req 8 -- egress promised 1 and remain 14 and req 1 -- act like deparsed True -- container_to_use phv81 -- fails False
Could not find container to overlay in.
MAU groups: 3
- Group 5 8 bits -- avail 15 -- ingress avail 8 and remain 8 and promised 0 and req 0 -- egress avail 15 and remain 14 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv81
+ Group 5 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv80
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv112
-***Allocating phv81[7:3] for eg_intr_md._pad7[4:0]
-***Allocating phv81[2:0] for eg_intr_md.egress_cos[2:0]
+***Allocating phv80[7:3] for eg_intr_md._pad7[4:0]
+***Allocating phv80[2:0] for eg_intr_md.egress_cos[2:0]
Packing options tried: 2
Packing options skipped: 0
Failure Reasons:
@@ -2109,86 +1962,6 @@
ContainerAlignment Constraint: eg_intr_md.egress_cos <3 bits egress parsed imeta> -- field_bit: 0 -- bits_list: [0, 1, 2, 3, 4, 5, 6, 7]
]
-Working on parse node ingress_intrinsic_metadata (9) (ingress)
-
--------------------------------------------
-Allocating parsed header: pkt fields (5) / meta fields (0) using extraction bandwidth 224
--------------------------------------------
-Extracted bits: 16
-Set metadata bits: 0
-Gress: ingress
-bits_will_need_to_parse = 16
-unused_metadata_container_bits = 0
-min_parse_states = 1
-bits_per_state = 16
-Already allocated? ig_intr_md.resubmit_flag (ingress)
-Already allocated? ig_intr_md._pad1 (ingress)
-Already allocated? ig_intr_md._pad2 (ingress)
-Already allocated? ig_intr_md._pad3 (ingress)
-Already allocated? ig_intr_md.ingress_port (ingress)
-Already allocated? ig_intr_md.ingress_port (ingress)
-Parse state 0 (16 bits)
- ig_intr_md.resubmit_flag [0:0]
- ig_intr_md._pad1 [0:0]
- ig_intr_md._pad2 [1:0]
- ig_intr_md._pad3 [2:0]
- ig_intr_md.ingress_port [8:0]
------------------------------------------------------------------------------------------------------
-| Name | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
------------------------------------------------------------------------------------------------------
-| ig_intr_md.resubmit_flag | 1 | False | [(16, 1)] | - | - | 1 | 1 |
-| ig_intr_md._pad1 | 1 | False | [(16, 1)] | - | - | 1 | 1 |
-| ig_intr_md._pad2 | 2 | False | [(16, 2)] | - | - | 1 | 1 |
-| ig_intr_md._pad3 | 3 | False | [(16, 3)] | - | - | 1 | 1 |
-| ig_intr_md.ingress_port | 9 | False | [(16, 9)] | - | - | 2 | 1 |
------------------------------------------------------------------------------------------------------
-
-min_extracts[8] = 1
-min_extracts[16] = 6
-min_extracts[32] = 1
-Packing options: 2
-MAU containers available:
- 8-bit: 44
- 16-bit: 74
- 32-bit: 43
-Tagalong containers available:
- 8-bit: 21
- 16-bit: 31
- 32-bit: 20
-Initial packing options: 2
-
-Packing option 0: [16]
-MAU containers after:
- 8-bit: 44
- 16-bit: 74
- 32-bit: 43
-+-----------------------------------+
-| ig_intr_md.resubmit_flag [0:0] |
-| ig_intr_md._pad1 [0:0] |
-| ig_intr_md._pad2 [1:0] |
-| ig_intr_md._pad3 [2:0] |
-| ig_intr_md.ingress_port [8:0] |
-+-----------------------------------+
-
-Looking at ig_intr_md.resubmit_flag (ingress) [0:0], with test_alloc = True
-----> ig_intr_md.resubmit_flag (ingress) is allocated? True
-Looking at ig_intr_md._pad1 (ingress) [0:0], with test_alloc = True
-----> ig_intr_md._pad1 (ingress) is allocated? True
-Looking at ig_intr_md._pad2 (ingress) [1:0], with test_alloc = True
-----> ig_intr_md._pad2 (ingress) is allocated? True
-Looking at ig_intr_md._pad3 (ingress) [2:0], with test_alloc = True
-----> ig_intr_md._pad3 (ingress) is allocated? True
-Looking at ig_intr_md.ingress_port (ingress) [8:0], with test_alloc = True
-----> ig_intr_md.ingress_port (ingress) is allocated? True
-Fields for container 16 at index 0 already allocated. No need to overlay or allocate new.
- ig_intr_md.resubmit_flag[0:0]
- ig_intr_md._pad1[0:0]
- ig_intr_md._pad2[1:0]
- ig_intr_md._pad3[2:0]
- ig_intr_md.ingress_port[8:0]
-Packing options tried: 1
-Packing options skipped: 0
-
Working on parse node parse_pkt_out (4) (egress)
-------------------------------------------
@@ -2216,19 +1989,19 @@
min_extracts[32] = 1
Packing options: 2
MAU containers available:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
Tagalong containers available:
- 8-bit: 22
- 16-bit: 34
- 32-bit: 20
+ 8-bit: 18
+ 16-bit: 28
+ 32-bit: 16
Initial packing options: 2
Packing option 0: [16]
MAU containers after:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
+-------------------------------------+
| packet_out_hdr.egress_port [8:0] |
@@ -2238,8 +2011,8 @@
Looking at packet_out_hdr.egress_port (egress) [8:0], with test_alloc = True
----> packet_out_hdr.egress_port (egress) is allocated? False
Looking at packet_out_hdr._padding (egress) [6:0], with test_alloc = True
-***Allocating phv334[15:7] for packet_out_hdr.egress_port[8:0]
-***Allocating phv334[6:0] for packet_out_hdr._padding[6:0]
+***Allocating phv340[15:7] for packet_out_hdr.egress_port[8:0]
+***Allocating phv340[6:0] for packet_out_hdr._padding[6:0]
Packing options tried: 1
Packing options skipped: 0
@@ -2253,50 +2026,50 @@
After allocating critical parse paths:
Allocation state: Final Allocation
-------------------------------------------------------------------------------
-| PHV Group | Containers Used | Bits Used | Bits Available |
-| (container bit widths) | (% used) | (% used) | |
-------------------------------------------------------------------------------
-| 0 (32) | 5 (31.25%) | 160 (31.25%) | 512 |
-| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 5 (7.81%) | 160 (7.81%) | 2048 |
-| | | | |
-| 4 (8) | 4 (25.00%) | 32 (25.00%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
-| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 6 (9.38%) | 48 (9.38%) | 512 |
-| | | | |
-| 8 (16) | 5 (31.25%) | 80 (31.25%) | 256 |
-| 9 (16) | 2 (12.50%) | 32 (12.50%) | 256 |
-| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 7 (7.29%) | 112 (7.29%) | 1536 |
-| | | | |
-| 14 (32) T | 12 (75.00%) | 384 (75.00%) | 512 |
-| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 12 (37.50%) | 384 (37.50%) | 1024 |
-| | | | |
-| 16 (8) T | 9 (56.25%) | 72 (56.25%) | 128 |
-| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 9 (28.12%) | 72 (28.12%) | 256 |
-| | | | |
-| 18 (16) T | 14 (87.50%) | 224 (87.50%) | 256 |
-| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 14 (29.17%) | 224 (29.17%) | 768 |
-| | | | |
-| MAU total | 18 (8.04%) | 320 (7.81%) | 4096 |
-| Tagalong total | 35 (31.25%) | 680 (33.20%) | 2048 |
-| Overall total | 53 (15.77%) | 1000 (16.28%) | 6144 |
-------------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+| PHV Group | Containers Used | Bits Used | Bits Available |
+| (container bit widths) | (% used) | (% used) | |
+-----------------------------------------------------------------------------
+| 0 (32) | 5 (31.25%) | 160 (31.25%) | 512 |
+| 1 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 2 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 5 (7.81%) | 160 (7.81%) | 2048 |
+| | | | |
+| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
+| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 4 (6.25%) | 32 (6.25%) | 512 |
+| | | | |
+| 8 (16) | 5 (31.25%) | 80 (31.25%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 6 (6.25%) | 96 (6.25%) | 1536 |
+| | | | |
+| 14 (32) T | 11 (68.75%) | 352 (68.75%) | 512 |
+| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
+| Total for 32 bit | 11 (34.38%) | 352 (34.38%) | 1024 |
+| | | | |
+| 16 (8) T | 11 (68.75%) | 88 (68.75%) | 128 |
+| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
+| Total for 8 bit | 11 (34.38%) | 88 (34.38%) | 256 |
+| | | | |
+| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
+| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
+| | | | |
+| MAU total | 15 (6.70%) | 288 (7.03%) | 4096 |
+| Tagalong total | 37 (33.04%) | 680 (33.20%) | 2048 |
+| Overall total | 52 (15.48%) | 968 (15.76%) | 6144 |
+-----------------------------------------------------------------------------
->>Event 'pa_overlay' at time 1504795790.67
- Took 9.01 seconds
+>>Event 'pa_overlay' at time 1504859175.96
+ Took 9.06 seconds
-----------------------------------------------
Allocating remaining parsed fields
@@ -2304,21 +2077,21 @@
Allocation Step
All Sorted parse nodes (non-critical):
- parse_pkt_in (egress) with bits = 16 and max = 2
+ parse_pkt_in (ingress) with bits = 16 and max = 2
parse_udp (ingress) with bits = 64 and max = 1
parse_udp (egress) with bits = 64 and max = 1
- parse_pkt_in (ingress) with bits = 16 and max = 1
+ parse_pkt_in (egress) with bits = 16 and max = 1
Total packet bits: 160
Total meta bits: 0
Total bits: 160
-Working on parse node parse_pkt_in (2) (egress)
+Working on parse node parse_pkt_in (2) (ingress)
-------------------------------------------
Overlaying parsed header: pkt fields (2) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 16
Set metadata bits: 0
-Gress: egress
+Gress: ingress
bits_will_need_to_parse = 16
unused_metadata_container_bits = 0
min_parse_states = 1
@@ -2334,19 +2107,19 @@
-------------------------------------------------------------------------------------------------------
MAU containers available:
- 8-bit: 46
- 16-bit: 77
- 32-bit: 48
+ 8-bit: 45
+ 16-bit: 74
+ 32-bit: 43
Packing options: 2
Initial packing options: 2
Packing option 0: [16]
->>Can pack using [16] if open up 1 new containers.
-Packing options tried: 2
+>>Can pack using [16] if open up 0 new containers.
+Packing options tried: 1
Packing options skipped: 0
Trying to place using best packing [16]
-***Allocating phv145[15:7] for packet_in_hdr.ingress_port[8:0]
-***Allocating phv145[6:0] for packet_in_hdr._padding[6:0]
+***Allocating phv129[15:7] for packet_in_hdr.ingress_port[8:0]
+***Allocating phv129[6:0] for packet_in_hdr._padding[6:0]
Working on parse node parse_udp (8) (ingress)
-------------------------------------------
@@ -2374,7 +2147,7 @@
-----------------------------------------------------------------------------------
MAU containers available:
- 8-bit: 44
+ 8-bit: 45
16-bit: 74
32-bit: 43
Packing options: 47
@@ -2383,12 +2156,12 @@
Packing option 0: [8, 8, 16, 32]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
MAU groups: 3
- Group 4 8 bits -- avail 11 -- ingress avail 11 and remain 10 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv69
+ Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2403,12 +2176,12 @@
Packing option 1: [8, 8, 32, 16]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
MAU groups: 3
- Group 4 8 bits -- avail 11 -- ingress avail 11 and remain 10 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv69
+ Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2421,7 +2194,7 @@
Packing option 2: [8, 16, 8, 32]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2433,7 +2206,7 @@
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
MAU groups: 3
- Group 4 8 bits -- avail 11 -- ingress avail 11 and remain 10 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv69
+ Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
>>Can pack using [8, 16, 8, 32] if open up 3 new containers.
@@ -2441,7 +2214,7 @@
Packing option 3: [8, 16, 32, 8]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2461,7 +2234,7 @@
Packing option 4: [8, 32, 8, 16]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2474,7 +2247,7 @@
Packing option 5: [8, 32, 16, 8]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2494,12 +2267,12 @@
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
MAU groups: 3
- Group 4 8 bits -- avail 11 -- ingress avail 11 and remain 10 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv69
+ Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
>>Can pack using [16, 8, 8, 32] if open up 3 new containers.
@@ -2514,7 +2287,7 @@
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2606,12 +2379,12 @@
Packing option 15: [8, 8, 16, 16, 16]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
MAU groups: 3
- Group 4 8 bits -- avail 11 -- ingress avail 11 and remain 10 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv69
+ Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2626,7 +2399,7 @@
Packing option 16: [8, 16, 8, 16, 16]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2638,7 +2411,7 @@
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
MAU groups: 3
- Group 4 8 bits -- avail 11 -- ingress avail 11 and remain 10 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv69
+ Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
>>Can pack using [8, 16, 8, 16, 16] if open up 3 new containers.
@@ -2646,7 +2419,7 @@
Packing option 17: [8, 16, 16, 8, 16]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2668,7 +2441,7 @@
Packing option 18: [8, 16, 16, 16, 8]
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2697,12 +2470,12 @@
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
MAU groups: 3
- Group 4 8 bits -- avail 11 -- ingress avail 11 and remain 10 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv69
+ Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
>>Can pack using [16, 8, 8, 16, 16] if open up 3 new containers.
@@ -2717,7 +2490,7 @@
Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
MAU groups: 3
- Group 4 8 bits -- avail 12 -- ingress avail 12 and remain 11 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv68
+ Group 4 8 bits -- avail 13 -- ingress avail 13 and remain 12 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv67
Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
@@ -2769,8 +2542,8 @@
-----------------------------------------------------------------------------------
MAU containers available:
- 8-bit: 46
- 16-bit: 77
+ 8-bit: 47
+ 16-bit: 79
32-bit: 48
Packing options: 47
Initial packing options: 47
@@ -2780,19 +2553,19 @@
Packing options tried: 1
Packing options skipped: 0
Trying to place using best packing [8, 8, 16, 32]
-***Allocating phv294[7:0] for udp.srcPort[15:8]
-***Allocating phv295[7:0] for udp.srcPort[7:0]
-***Allocating phv329[15:0] for udp.dstPort[15:0]
-***Allocating phv263[31:16] for udp.length_[15:0]
-***Allocating phv263[15:0] for udp.checksum[15:0]
-Working on parse node parse_pkt_in (2) (ingress)
+***Allocating phv298[7:0] for udp.srcPort[15:8]
+***Allocating phv299[7:0] for udp.srcPort[7:0]
+***Allocating phv336[15:0] for udp.dstPort[15:0]
+***Allocating phv267[31:16] for udp.length_[15:0]
+***Allocating phv267[15:0] for udp.checksum[15:0]
+Working on parse node parse_pkt_in (2) (egress)
-------------------------------------------
Overlaying parsed header: pkt fields (2) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 16
Set metadata bits: 0
-Gress: ingress
+Gress: egress
bits_will_need_to_parse = 16
unused_metadata_container_bits = 0
min_parse_states = 1
@@ -2808,9 +2581,9 @@
-------------------------------------------------------------------------------------------------
MAU containers available:
- 8-bit: 44
- 16-bit: 74
- 32-bit: 42
+ 8-bit: 47
+ 16-bit: 79
+ 32-bit: 48
Packing options: 2
Initial packing options: 2
@@ -2819,8 +2592,8 @@
Packing options tried: 1
Packing options skipped: 0
Trying to place using best packing [16]
-***Allocating phv129[15:7] for packet_in_hdr.ingress_port[8:0]
-***Allocating phv129[6:0] for packet_in_hdr._padding[6:0]
+***Allocating phv340[15:7] for packet_in_hdr.ingress_port[8:0]
+***Allocating phv340[6:0] for packet_in_hdr._padding[6:0]
After allocating remaining parse nodes:
Allocation state: Final Allocation
@@ -2834,36 +2607,36 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 6 (9.38%) | 192 (9.38%) | 2048 |
| | | | |
-| 4 (8) | 4 (25.00%) | 32 (25.00%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
+| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 6 (9.38%) | 48 (9.38%) | 512 |
+| Total for 8 bit | 4 (6.25%) | 32 (6.25%) | 512 |
| | | | |
| 8 (16) | 5 (31.25%) | 80 (31.25%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 8 (8.33%) | 128 (8.33%) | 1536 |
+| Total for 16 bit | 6 (6.25%) | 96 (6.25%) | 1536 |
| | | | |
-| 14 (32) T | 12 (75.00%) | 384 (75.00%) | 512 |
+| 14 (32) T | 11 (68.75%) | 352 (68.75%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 12 (37.50%) | 384 (37.50%) | 1024 |
+| Total for 32 bit | 11 (34.38%) | 352 (34.38%) | 1024 |
| | | | |
-| 16 (8) T | 9 (56.25%) | 72 (56.25%) | 128 |
+| 16 (8) T | 11 (68.75%) | 88 (68.75%) | 128 |
| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 9 (28.12%) | 72 (28.12%) | 256 |
+| Total for 8 bit | 11 (34.38%) | 88 (34.38%) | 256 |
| | | | |
-| 18 (16) T | 14 (87.50%) | 224 (87.50%) | 256 |
-| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 14 (29.17%) | 224 (29.17%) | 768 |
+| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
| | | | |
-| MAU total | 20 (8.93%) | 368 (8.98%) | 4096 |
-| Tagalong total | 35 (31.25%) | 680 (33.20%) | 2048 |
-| Overall total | 55 (16.37%) | 1048 (17.06%) | 6144 |
+| MAU total | 16 (7.14%) | 320 (7.81%) | 4096 |
+| Tagalong total | 37 (33.04%) | 680 (33.20%) | 2048 |
+| Overall total | 53 (15.77%) | 1000 (16.28%) | 6144 |
------------------------------------------------------------------------------
@@ -2887,12 +2660,12 @@
| Total for 8 bit | 0 (0.00%) | 0 (0.00%) | 512 |
| | | | |
| 8 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
+| 9 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 1 (1.04%) | 16 (1.04%) | 1536 |
+| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 1536 |
| | | | |
| 14 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
@@ -2907,21 +2680,36 @@
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
| Total for 16 bit | 0 (0.00%) | 0 (0.00%) | 768 |
| | | | |
-| MAU total | 2 (0.89%) | 48 (1.17%) | 4096 |
+| MAU total | 1 (0.45%) | 32 (0.78%) | 4096 |
| Tagalong total | 0 (0.00%) | 0 (0.00%) | 2048 |
-| Overall total | 2 (0.60%) | 48 (0.78%) | 6144 |
+| Overall total | 1 (0.30%) | 32 (0.52%) | 6144 |
---------------------------------------------------------------------------
->>Event 'pa_meta1' at time 1504795794.53
- Took 3.85 seconds
+>>Event 'pa_meta1' at time 1504859179.69
+ Took 3.73 seconds
-----------------------------------------------
Allocating metadata (pass 1)
-----------------------------------------------
Allocation Step
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md.resubmit_flag (ingress) will require table injection to initialize.
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md._pad1 (ingress) will require table injection to initialize.
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md._pad2 (ingress) will require table injection to initialize.
+@@@ overlaying ig_intr_md_for_tm.drop_ctl (ingress) and ig_intr_md._pad3 (ingress) will require table injection to initialize.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
+$$$ initialization at table table0 will expand the table layout due to adding a default action.
Total metadata field instances to allocate: 4 / 44 bits (44 ingress bits and 0 egress bits)
Promised metadata field instances to allocate: 1 / 9 bits (9 ingress bits and 0 egress bits)
- 0: ig_intr_md_for_tm.ucast_egress_port (ingress) (highly=0, mau_group_size=2, max_overlay=0, max_share=0, max_split=1, bit_width=9, initial_usage_read=3, earliest_use=0, latest_use=12)
+ 0: ig_intr_md_for_tm.ucast_egress_port (ingress) (highly=0, mau_group_size=2, max_overlay=0, max_share=0, max_split=1, bit_width=9, initial_usage_read=2, earliest_use=0, latest_use=12)
--------------
Working on:
@@ -2976,36 +2764,36 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 6 (9.38%) | 192 (9.38%) | 2048 |
| | | | |
-| 4 (8) | 4 (25.00%) | 32 (25.00%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
+| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 6 (9.38%) | 48 (9.38%) | 512 |
+| Total for 8 bit | 4 (6.25%) | 32 (6.25%) | 512 |
| | | | |
| 8 (16) | 6 (37.50%) | 89 (34.77%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 9 (9.38%) | 137 (8.92%) | 1536 |
+| Total for 16 bit | 7 (7.29%) | 105 (6.84%) | 1536 |
| | | | |
-| 14 (32) T | 12 (75.00%) | 384 (75.00%) | 512 |
+| 14 (32) T | 11 (68.75%) | 352 (68.75%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 12 (37.50%) | 384 (37.50%) | 1024 |
+| Total for 32 bit | 11 (34.38%) | 352 (34.38%) | 1024 |
| | | | |
-| 16 (8) T | 9 (56.25%) | 72 (56.25%) | 128 |
+| 16 (8) T | 11 (68.75%) | 88 (68.75%) | 128 |
| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 9 (28.12%) | 72 (28.12%) | 256 |
+| Total for 8 bit | 11 (34.38%) | 88 (34.38%) | 256 |
| | | | |
-| 18 (16) T | 14 (87.50%) | 224 (87.50%) | 256 |
-| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 14 (29.17%) | 224 (29.17%) | 768 |
+| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
| | | | |
-| MAU total | 21 (9.38%) | 377 (9.20%) | 4096 |
-| Tagalong total | 35 (31.25%) | 680 (33.20%) | 2048 |
-| Overall total | 56 (16.67%) | 1057 (17.20%) | 6144 |
+| MAU total | 17 (7.59%) | 329 (8.03%) | 4096 |
+| Tagalong total | 37 (33.04%) | 680 (33.20%) | 2048 |
+| Overall total | 54 (16.07%) | 1009 (16.42%) | 6144 |
------------------------------------------------------------------------------
Allocation state difference after promised meta allocated:
@@ -3053,8 +2841,8 @@
--------------------------------------------------------------------------
Sorted metadata field instances to allocate: 0 / 0 bits (0 ingress bits and 0 egress bits)
->>Event 'pa_pov' at time 1504795794.58
- Took 0.06 seconds
+>>Event 'pa_pov' at time 1504859179.79
+ Took 0.10 seconds
-----------------------------------------------
Allocating POV
@@ -3071,36 +2859,36 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 6 (9.38%) | 192 (9.38%) | 2048 |
| | | | |
-| 4 (8) | 4 (25.00%) | 32 (25.00%) | 128 |
-| 5 (8) | 2 (12.50%) | 16 (12.50%) | 128 |
+| 4 (8) | 3 (18.75%) | 24 (18.75%) | 128 |
+| 5 (8) | 1 (6.25%) | 8 (6.25%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 6 (9.38%) | 48 (9.38%) | 512 |
+| Total for 8 bit | 4 (6.25%) | 32 (6.25%) | 512 |
| | | | |
| 8 (16) | 6 (37.50%) | 89 (34.77%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 9 (9.38%) | 137 (8.92%) | 1536 |
+| Total for 16 bit | 7 (7.29%) | 105 (6.84%) | 1536 |
| | | | |
-| 14 (32) T | 12 (75.00%) | 384 (75.00%) | 512 |
+| 14 (32) T | 11 (68.75%) | 352 (68.75%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 12 (37.50%) | 384 (37.50%) | 1024 |
+| Total for 32 bit | 11 (34.38%) | 352 (34.38%) | 1024 |
| | | | |
-| 16 (8) T | 9 (56.25%) | 72 (56.25%) | 128 |
+| 16 (8) T | 11 (68.75%) | 88 (68.75%) | 128 |
| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 9 (28.12%) | 72 (28.12%) | 256 |
+| Total for 8 bit | 11 (34.38%) | 88 (34.38%) | 256 |
| | | | |
-| 18 (16) T | 14 (87.50%) | 224 (87.50%) | 256 |
-| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 14 (29.17%) | 224 (29.17%) | 768 |
+| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
| | | | |
-| MAU total | 21 (9.38%) | 377 (9.20%) | 4096 |
-| Tagalong total | 35 (31.25%) | 680 (33.20%) | 2048 |
-| Overall total | 56 (16.67%) | 1057 (17.20%) | 6144 |
+| MAU total | 17 (7.59%) | 329 (8.03%) | 4096 |
+| Tagalong total | 37 (33.04%) | 680 (33.20%) | 2048 |
+| Overall total | 54 (16.07%) | 1009 (16.42%) | 6144 |
------------------------------------------------------------------------------
Sorted POV field instances to allocate (with best pack): 13
@@ -3119,25 +2907,25 @@
12: --validity_check--udp (egress) -- max pov share 5 / best pack 4
Working on
---validity_check--packet_in_hdr <1 bits ingress parsed pov>
+--validity_check--packet_in_hdr <1 bits ingress parsed pov W>
Call to _allocate_pov_helper for:
--validity_check--packet_in_hdr (ingress)
Best pack group: (6)
Looking for container to share POV bit in from already allocated containers for POV.
-Container availability (not used yet for POV): total 192 / partial 1
+Container availability (not used yet for POV): total 193 / partial 1
Looking for container to share POV bit in from already allocated containers that have not been used for POV.
->>Choose container phv68, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 7).
+>>Choose container phv67, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 7).
>> Decided to allocate new container
-Required container phv68
-***Allocating phv68[0:0] for --validity_check--packet_in_hdr[0:0]
-***Allocating phv68[1:1] for --validity_check--packet_out_hdr[0:0]
-***Allocating phv68[2:2] for --validity_check--ethernet[0:0]
-***Allocating phv68[3:3] for --validity_check--ipv4[0:0]
-***Allocating phv68[4:4] for --validity_check--tcp[0:0]
-***Allocating phv68[5:5] for --validity_check--udp[0:0]
-***Allocating phv68[6:6] for --validity_check--metadata_bridge[0:0]
+Required container phv67
+***Allocating phv67[0:0] for --validity_check--packet_in_hdr[0:0]
+***Allocating phv67[1:1] for --validity_check--packet_out_hdr[0:0]
+***Allocating phv67[2:2] for --validity_check--ethernet[0:0]
+***Allocating phv67[3:3] for --validity_check--ipv4[0:0]
+***Allocating phv67[4:4] for --validity_check--tcp[0:0]
+***Allocating phv67[5:5] for --validity_check--udp[0:0]
+***Allocating phv67[6:6] for --validity_check--metadata_bridge[0:0]
Working on
--validity_check--packet_out_hdr <1 bits ingress parsed pov R W>
@@ -3164,24 +2952,24 @@
Already allocated.
Working on
---validity_check--packet_in_hdr <1 bits egress parsed pov W>
+--validity_check--packet_in_hdr <1 bits egress parsed pov>
Call to _allocate_pov_helper for:
--validity_check--packet_in_hdr (egress)
Best pack group: (5)
Looking for container to share POV bit in from already allocated containers for POV.
-Container availability (not used yet for POV): total 195 / partial 0
+Container availability (not used yet for POV): total 198 / partial 0
Looking for container to share POV bit in from already allocated containers that have not been used for POV.
->>Choose container phv82, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 6).
+>>Choose container phv81, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 6).
>> Decided to allocate new container
-Required container phv82
-***Allocating phv82[0:0] for --validity_check--packet_in_hdr[0:0]
-***Allocating phv82[1:1] for --validity_check--packet_out_hdr[0:0]
-***Allocating phv82[2:2] for --validity_check--ethernet[0:0]
-***Allocating phv82[3:3] for --validity_check--ipv4[0:0]
-***Allocating phv82[4:4] for --validity_check--tcp[0:0]
-***Allocating phv82[5:5] for --validity_check--udp[0:0]
+Required container phv81
+***Allocating phv81[0:0] for --validity_check--packet_in_hdr[0:0]
+***Allocating phv81[1:1] for --validity_check--packet_out_hdr[0:0]
+***Allocating phv81[2:2] for --validity_check--ethernet[0:0]
+***Allocating phv81[3:3] for --validity_check--ipv4[0:0]
+***Allocating phv81[4:4] for --validity_check--tcp[0:0]
+***Allocating phv81[5:5] for --validity_check--udp[0:0]
Working on
--validity_check--packet_out_hdr <1 bits egress parsed pov>
@@ -3205,12 +2993,12 @@
Sum of container bit widths POVs found in: 16
ingress
- phv68 (8 bits)
+ phv67 (8 bits)
>> 8 total bits
egress
- phv82 (8 bits)
+ phv81 (8 bits)
>> 8 total bits
->>Event 'pa_meta2' at time 1504795794.70
+>>Event 'pa_meta2' at time 1504859179.91
Took 0.12 seconds
-----------------------------------------------
@@ -3231,36 +3019,36 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 6 (9.38%) | 192 (9.38%) | 2048 |
| | | | |
-| 4 (8) | 5 (31.25%) | 39 (30.47%) | 128 |
-| 5 (8) | 3 (18.75%) | 22 (17.19%) | 128 |
+| 4 (8) | 4 (25.00%) | 31 (24.22%) | 128 |
+| 5 (8) | 2 (12.50%) | 14 (10.94%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 8 (12.50%) | 61 (11.91%) | 512 |
+| Total for 8 bit | 6 (9.38%) | 45 (8.79%) | 512 |
| | | | |
| 8 (16) | 6 (37.50%) | 89 (34.77%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 9 (9.38%) | 137 (8.92%) | 1536 |
+| Total for 16 bit | 7 (7.29%) | 105 (6.84%) | 1536 |
| | | | |
-| 14 (32) T | 12 (75.00%) | 384 (75.00%) | 512 |
+| 14 (32) T | 11 (68.75%) | 352 (68.75%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 12 (37.50%) | 384 (37.50%) | 1024 |
+| Total for 32 bit | 11 (34.38%) | 352 (34.38%) | 1024 |
| | | | |
-| 16 (8) T | 9 (56.25%) | 72 (56.25%) | 128 |
+| 16 (8) T | 11 (68.75%) | 88 (68.75%) | 128 |
| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 9 (28.12%) | 72 (28.12%) | 256 |
+| Total for 8 bit | 11 (34.38%) | 88 (34.38%) | 256 |
| | | | |
-| 18 (16) T | 14 (87.50%) | 224 (87.50%) | 256 |
-| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 14 (29.17%) | 224 (29.17%) | 768 |
+| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
| | | | |
-| MAU total | 23 (10.27%) | 390 (9.52%) | 4096 |
-| Tagalong total | 35 (31.25%) | 680 (33.20%) | 2048 |
-| Overall total | 58 (17.26%) | 1070 (17.42%) | 6144 |
+| MAU total | 19 (8.48%) | 342 (8.35%) | 4096 |
+| Tagalong total | 37 (33.04%) | 680 (33.20%) | 2048 |
+| Overall total | 56 (16.67%) | 1022 (16.63%) | 6144 |
------------------------------------------------------------------------------
Allocation state difference after promised meta allocated:
@@ -3308,9 +3096,9 @@
--------------------------------------------------------------------------
Sorted metadata field instances to allocate: 3 / 35 bits (35 ingress bits and 0 egress bits)
- 0: ecmp_metadata.groupId (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=1, best_share_pack=0, max_split=16, bit_width=16, initial_usage_read=1, earliest_use=1, latest_use=2)
- 1: ecmp_metadata.selector (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=1, best_share_pack=0, max_split=16, bit_width=16, initial_usage_read=1, earliest_use=1, latest_use=2)
- 2: ig_intr_md_for_tm.drop_ctl (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=2, best_share_pack=0, max_split=1, bit_width=3, initial_usage_read=2, earliest_use=1, latest_use=12)
+ 0: ecmp_metadata.groupId (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=1, best_share_pack=0, max_split=16, bit_width=16, initial_usage_read=1, earliest_use=0, latest_use=1)
+ 1: ecmp_metadata.selector (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=1, best_share_pack=0, max_split=16, bit_width=16, initial_usage_read=1, earliest_use=0, latest_use=1)
+ 2: ig_intr_md_for_tm.drop_ctl (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=2, best_share_pack=0, max_split=1, bit_width=3, initial_usage_read=2, earliest_use=0, latest_use=12)
---------------------------------------
Working on:
@@ -3337,12 +3125,12 @@
Group 1 32 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 2 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv32 -- fails False
Group 3 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv48 -- fails False
- Group 4 8 bits -- avail 11 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
- Group 5 8 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 4 8 bits -- avail 12 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 5 8 bits -- avail 14 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 6 8 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 7 8 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 8 16 bits -- avail 10 and promised 1 -- ingress promised 1 and remain 9 and req 0 -- egress promised 0 and remain 8 and req 0 -- as if deparsed False -- container_to_use phv134 -- fails False
- Group 9 16 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 9 16 bits -- avail 15 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 10 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv160 -- fails False
Group 11 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv176 -- fails False
Group 12 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv192 -- fails False
@@ -3378,12 +3166,12 @@
Group 1 32 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 2 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv32 -- fails False
Group 3 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv48 -- fails False
- Group 4 8 bits -- avail 11 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
- Group 5 8 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 4 8 bits -- avail 12 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 5 8 bits -- avail 14 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 6 8 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 7 8 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 8 16 bits -- avail 9 and promised 1 -- ingress promised 1 and remain 8 and req 0 -- egress promised 0 and remain 8 and req 0 -- as if deparsed False -- container_to_use phv135 -- fails False
- Group 9 16 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 9 16 bits -- avail 15 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 10 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv160 -- fails False
Group 11 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv176 -- fails False
Group 12 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 0 -- egress promised 0 and remain 15 and req 0 -- as if deparsed False -- container_to_use phv192 -- fails False
@@ -3419,12 +3207,12 @@
Group 1 32 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 2 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 12 and req 0 -- as if deparsed True -- container_to_use phv32 -- fails False
Group 3 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 12 and req 0 -- as if deparsed True -- container_to_use phv48 -- fails False
- Group 4 8 bits -- avail 11 and promised 1 -- ingress promised 1 and remain 10 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv69 -- fails False
- Group 5 8 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 4 8 bits -- avail 12 and promised 1 -- ingress promised 1 and remain 11 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv68 -- fails False
+ Group 5 8 bits -- avail 14 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 6 8 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv96 -- fails False
Group 7 8 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv112 -- fails False
Group 8 16 bits -- avail 8 and promised 1 -- ingress promised 1 and remain 7 and req 1 -- egress promised 0 and remain 0 and req 0 -- as if deparsed True -- container_to_use phv136 -- fails False
- Group 9 16 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
+ Group 9 16 bits -- avail 15 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
Group 10 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv160 -- fails False
Group 11 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv176 -- fails False
Group 12 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv192 -- fails False
@@ -3436,8 +3224,8 @@
case 2: looking at allowed start bits [0, 1, 2, 3, 4, 5, 6, 7]
final start_bit = 5
(1) msb_offset = 8
-***Allocating phv69[7:5] for ig_intr_md_for_tm.drop_ctl[2:0]
->>Event 'pa_meta_init' at time 1504795794.87
+***Allocating phv68[7:5] for ig_intr_md_for_tm.drop_ctl[2:0]
+>>Event 'pa_meta_init' at time 1504859180.07
Took 0.16 seconds
-----------------------------------------------
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.results.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.results.log
index 7ce05d7..8a7bb15 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.results.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/pa.results.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: pa.results.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
Program: ecmp
@@ -17,36 +17,36 @@
| 3 (32) | 0 (0.00%) | 0 (0.00%) | 512 |
| Total for 32 bit | 6 (9.38%) | 192 (9.38%) | 2048 |
| | | | |
-| 4 (8) | 6 (37.50%) | 42 (32.81%) | 128 |
-| 5 (8) | 3 (18.75%) | 22 (17.19%) | 128 |
+| 4 (8) | 5 (31.25%) | 34 (26.56%) | 128 |
+| 5 (8) | 2 (12.50%) | 14 (10.94%) | 128 |
| 6 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
| 7 (8) | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 9 (14.06%) | 64 (12.50%) | 512 |
+| Total for 8 bit | 7 (10.94%) | 48 (9.38%) | 512 |
| | | | |
| 8 (16) | 8 (50.00%) | 121 (47.27%) | 256 |
-| 9 (16) | 3 (18.75%) | 48 (18.75%) | 256 |
+| 9 (16) | 1 (6.25%) | 16 (6.25%) | 256 |
| 10 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 11 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 12 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
| 13 (16) | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 11 (11.46%) | 169 (11.00%) | 1536 |
+| Total for 16 bit | 9 (9.38%) | 137 (8.92%) | 1536 |
| | | | |
-| 14 (32) T | 12 (75.00%) | 384 (75.00%) | 512 |
+| 14 (32) T | 11 (68.75%) | 352 (68.75%) | 512 |
| 15 (32) T | 0 (0.00%) | 0 (0.00%) | 512 |
-| Total for 32 bit | 12 (37.50%) | 384 (37.50%) | 1024 |
+| Total for 32 bit | 11 (34.38%) | 352 (34.38%) | 1024 |
| | | | |
-| 16 (8) T | 9 (56.25%) | 72 (56.25%) | 128 |
+| 16 (8) T | 11 (68.75%) | 88 (68.75%) | 128 |
| 17 (8) T | 0 (0.00%) | 0 (0.00%) | 128 |
-| Total for 8 bit | 9 (28.12%) | 72 (28.12%) | 256 |
+| Total for 8 bit | 11 (34.38%) | 88 (34.38%) | 256 |
| | | | |
-| 18 (16) T | 14 (87.50%) | 224 (87.50%) | 256 |
-| 19 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
+| 18 (16) T | 10 (62.50%) | 160 (62.50%) | 256 |
+| 19 (16) T | 5 (31.25%) | 80 (31.25%) | 256 |
| 20 (16) T | 0 (0.00%) | 0 (0.00%) | 256 |
-| Total for 16 bit | 14 (29.17%) | 224 (29.17%) | 768 |
+| Total for 16 bit | 15 (31.25%) | 240 (31.25%) | 768 |
| | | | |
-| MAU total | 26 (11.61%) | 425 (10.38%) | 4096 |
-| Tagalong total | 35 (31.25%) | 680 (33.20%) | 2048 |
-| Overall total | 61 (18.15%) | 1105 (17.99%) | 6144 |
+| MAU total | 22 (9.82%) | 377 (9.20%) | 4096 |
+| Tagalong total | 37 (33.04%) | 680 (33.20%) | 2048 |
+| Overall total | 59 (17.56%) | 1057 (17.20%) | 6144 |
------------------------------------------------------------------------------
--------------------------------------------
@@ -66,42 +66,38 @@
>> 6 in ingress and 0 in egress
Allocations in Group 4 8 bits
- 8-bit PHV 64 (ingress): phv64[7:1] = -pad-0-[6:0] (tagalong capable)
- 8-bit PHV 64 (ingress): phv64[0:0] = ig_intr_md_for_tm.copy_to_cpu[0:0] (deparsed)
- 8-bit PHV 65 (ingress): phv65[7:0] = ipv4.srcAddr[23:16] (deparsed)
- 8-bit PHV 66 (ingress): phv66[7:0] = ethernet.dstAddr[47:40] (deparsed)
- 8-bit PHV 67 (ingress): phv67[7:0] = ethernet.srcAddr[39:32] (deparsed)
- 8-bit PHV 68 (ingress): phv68[6:6] = --validity_check--metadata_bridge[0:0] (deparsed)
- 8-bit PHV 68 (ingress): phv68[5:5] = --validity_check--udp[0:0] (deparsed)
- 8-bit PHV 68 (ingress): phv68[4:4] = --validity_check--tcp[0:0] (deparsed)
- 8-bit PHV 68 (ingress): phv68[3:3] = --validity_check--ipv4[0:0] (deparsed)
- 8-bit PHV 68 (ingress): phv68[2:2] = --validity_check--ethernet[0:0] (deparsed)
- 8-bit PHV 68 (ingress): phv68[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
- 8-bit PHV 68 (ingress): phv68[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
- 8-bit PHV 69 (ingress): phv69[7:5] = ig_intr_md_for_tm.drop_ctl[2:0] (deparsed)
- >> 6 in ingress and 0 in egress
+ 8-bit PHV 64 (ingress): phv64[7:0] = ipv4.srcAddr[23:16] (deparsed)
+ 8-bit PHV 65 (ingress): phv65[7:0] = ethernet.dstAddr[47:40] (deparsed)
+ 8-bit PHV 66 (ingress): phv66[7:0] = ethernet.srcAddr[39:32] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[6:6] = --validity_check--metadata_bridge[0:0] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[5:5] = --validity_check--udp[0:0] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[4:4] = --validity_check--tcp[0:0] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[3:3] = --validity_check--ipv4[0:0] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[2:2] = --validity_check--ethernet[0:0] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
+ 8-bit PHV 67 (ingress): phv67[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
+ 8-bit PHV 68 (ingress): phv68[7:5] = ig_intr_md_for_tm.drop_ctl[2:0] (deparsed)
+ >> 5 in ingress and 0 in egress
Allocations in Group 5 8 bits
- 8-bit PHV 80 (egress): phv80[7:1] = -pad-0-[6:0] (tagalong capable)
- 8-bit PHV 80 (egress): phv80[0:0] = ig_intr_md_for_tm.copy_to_cpu[0:0] (deparsed)
- 8-bit PHV 81 (egress): phv81[7:3] = eg_intr_md._pad7[4:0]
- 8-bit PHV 81 (egress): phv81[2:0] = eg_intr_md.egress_cos[2:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[5:5] = --validity_check--udp[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[4:4] = --validity_check--tcp[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[3:3] = --validity_check--ipv4[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[2:2] = --validity_check--ethernet[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
- 8-bit PHV 82 (egress): phv82[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
- >> 0 in ingress and 3 in egress
+ 8-bit PHV 80 (egress): phv80[7:3] = eg_intr_md._pad7[4:0]
+ 8-bit PHV 80 (egress): phv80[2:0] = eg_intr_md.egress_cos[2:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[5:5] = --validity_check--udp[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[4:4] = --validity_check--tcp[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[3:3] = --validity_check--ipv4[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[2:2] = --validity_check--ethernet[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[1:1] = --validity_check--packet_out_hdr[0:0] (deparsed)
+ 8-bit PHV 81 (egress): phv81[0:0] = --validity_check--packet_in_hdr[0:0] (deparsed)
+ >> 0 in ingress and 2 in egress
Allocations in Group 8 16 bits
- 16-bit PHV 128 (ingress): phv128[15:15] = ig_intr_md.resubmit_flag[0:0] (deparsed)
- 16-bit PHV 128 (ingress): phv128[14:14] = ig_intr_md._pad1[0:0] (deparsed)
- 16-bit PHV 128 (ingress): phv128[13:12] = ig_intr_md._pad2[1:0] (deparsed)
- 16-bit PHV 128 (ingress): phv128[11:9] = ig_intr_md._pad3[2:0] (deparsed)
+ 16-bit PHV 128 (ingress): phv128[15:15] = ig_intr_md.resubmit_flag[0:0]
+ 16-bit PHV 128 (ingress): phv128[14:14] = ig_intr_md._pad1[0:0]
+ 16-bit PHV 128 (ingress): phv128[13:12] = ig_intr_md._pad2[1:0]
+ 16-bit PHV 128 (ingress): phv128[11:9] = ig_intr_md._pad3[2:0]
16-bit PHV 128 (ingress): phv128[8:0] = ig_intr_md.ingress_port[8:0] (deparsed)
16-bit PHV 129 (ingress): phv129[15:7] = packet_out_hdr.egress_port[8:0] (deparsed)
- 16-bit PHV 129 (ingress): phv129[15:7] = packet_in_hdr.ingress_port[8:0] (tagalong capable) (deparsed)
+ 16-bit PHV 129 (ingress): phv129[15:7] = packet_in_hdr.ingress_port[8:0] (deparsed)
16-bit PHV 129 (ingress): phv129[6:0] = packet_out_hdr._padding[6:0] (tagalong capable) (deparsed)
16-bit PHV 129 (ingress): phv129[6:0] = packet_in_hdr._padding[6:0] (tagalong capable) (deparsed)
16-bit PHV 130 (ingress): phv130[8:0] = ig_intr_md_for_tm.ucast_egress_port[8:0] (deparsed)
@@ -114,45 +110,40 @@
>> 8 in ingress and 0 in egress
Allocations in Group 9 16 bits
- 16-bit PHV 144 (egress): phv144[15:9] = -pad-1-[6:0] (tagalong capable)
- 16-bit PHV 144 (egress): phv144[8:0] = ig_intr_md.ingress_port[8:0] (deparsed)
- 16-bit PHV 145 (egress): phv145[15:7] = packet_in_hdr.ingress_port[8:0] (deparsed)
- 16-bit PHV 145 (egress): phv145[6:0] = packet_in_hdr._padding[6:0] (tagalong capable) (deparsed)
- 16-bit PHV 146 (egress): phv146[15:9] = eg_intr_md._pad0[6:0]
- 16-bit PHV 146 (egress): phv146[8:0] = eg_intr_md.egress_port[8:0] (deparsed)
- >> 0 in ingress and 3 in egress
+ 16-bit PHV 144 (egress): phv144[15:9] = eg_intr_md._pad0[6:0]
+ 16-bit PHV 144 (egress): phv144[8:0] = eg_intr_md.egress_port[8:0] (deparsed)
+ >> 0 in ingress and 1 in egress
Allocations in Group 14 32 bits (tagalong)
32-bit PHV 256 (ingress): phv256[31:24] = ipv4.identification[7:0] (tagalong capable) (deparsed)
32-bit PHV 256 (ingress): phv256[23:21] = ipv4.flags[2:0] (tagalong capable) (deparsed)
32-bit PHV 256 (ingress): phv256[20:8] = ipv4.fragOffset[12:0] (tagalong capable) (deparsed)
32-bit PHV 256 (ingress): phv256[7:0] = ipv4.ttl[7:0] (tagalong capable) (deparsed)
- 32-bit PHV 257 (ingress): phv257[31:0] = tcp.ackNo[31:0] (tagalong capable) (deparsed)
- 32-bit PHV 258 (ingress): phv258[31:28] = tcp.dataOffset[3:0] (tagalong capable) (deparsed)
- 32-bit PHV 258 (ingress): phv258[27:25] = tcp.res[2:0] (tagalong capable) (deparsed)
- 32-bit PHV 258 (ingress): phv258[24:22] = tcp.ecn[2:0] (tagalong capable) (deparsed)
- 32-bit PHV 258 (ingress): phv258[21:16] = tcp.ctrl[5:0] (tagalong capable) (deparsed)
- 32-bit PHV 258 (ingress): phv258[15:0] = tcp.window[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 259 (ingress): phv259[31:16] = tcp.checksum[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 259 (ingress): phv259[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (egress): phv260[31:24] = ipv4.ttl[7:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (egress): phv260[23:16] = ipv4.protocol[7:0] (tagalong capable) (deparsed)
- 32-bit PHV 260 (egress): phv260[15:0] = ipv4.hdrChecksum[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 261 (egress): phv261[31:0] = ipv4.srcAddr[31:0] (tagalong capable) (deparsed)
- 32-bit PHV 262 (egress): phv262[31:0] = ipv4.dstAddr[31:0] (tagalong capable) (deparsed)
- 32-bit PHV 263 (egress): phv263[31:0] = tcp.ackNo[31:0] (tagalong capable) (deparsed)
- 32-bit PHV 263 (egress): phv263[31:16] = udp.length_[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 263 (egress): phv263[15:0] = udp.checksum[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 264 (egress): phv264[31:28] = tcp.dataOffset[3:0] (tagalong capable) (deparsed)
- 32-bit PHV 264 (egress): phv264[27:25] = tcp.res[2:0] (tagalong capable) (deparsed)
- 32-bit PHV 264 (egress): phv264[24:22] = tcp.ecn[2:0] (tagalong capable) (deparsed)
- 32-bit PHV 264 (egress): phv264[21:16] = tcp.ctrl[5:0] (tagalong capable) (deparsed)
- 32-bit PHV 264 (egress): phv264[15:0] = tcp.window[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 265 (egress): phv265[31:16] = tcp.checksum[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 265 (egress): phv265[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed)
- 32-bit PHV 266 (egress): phv266[31:0] = ethernet.dstAddr[39:8] (tagalong capable) (deparsed)
- 32-bit PHV 267 (egress): phv267[31:0] = ethernet.srcAddr[31:0] (tagalong capable) (deparsed)
- >> 4 in ingress and 8 in egress
+ 32-bit PHV 257 (ingress): phv257[31:28] = tcp.dataOffset[3:0] (tagalong capable) (deparsed)
+ 32-bit PHV 257 (ingress): phv257[27:25] = tcp.res[2:0] (tagalong capable) (deparsed)
+ 32-bit PHV 257 (ingress): phv257[24:22] = tcp.ecn[2:0] (tagalong capable) (deparsed)
+ 32-bit PHV 257 (ingress): phv257[21:16] = tcp.ctrl[5:0] (tagalong capable) (deparsed)
+ 32-bit PHV 257 (ingress): phv257[15:0] = tcp.window[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 258 (ingress): phv258[31:16] = tcp.checksum[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 258 (ingress): phv258[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 264 (egress): phv264[31:24] = ipv4.ttl[7:0] (tagalong capable) (deparsed)
+ 32-bit PHV 264 (egress): phv264[23:16] = ipv4.protocol[7:0] (tagalong capable) (deparsed)
+ 32-bit PHV 264 (egress): phv264[15:0] = ipv4.hdrChecksum[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 265 (egress): phv265[31:0] = ipv4.srcAddr[31:0] (tagalong capable) (deparsed)
+ 32-bit PHV 266 (egress): phv266[31:0] = ipv4.dstAddr[31:0] (tagalong capable) (deparsed)
+ 32-bit PHV 267 (egress): phv267[31:0] = tcp.ackNo[31:0] (tagalong capable) (deparsed)
+ 32-bit PHV 267 (egress): phv267[31:16] = udp.length_[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 267 (egress): phv267[15:0] = udp.checksum[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 268 (egress): phv268[31:28] = tcp.dataOffset[3:0] (tagalong capable) (deparsed)
+ 32-bit PHV 268 (egress): phv268[27:25] = tcp.res[2:0] (tagalong capable) (deparsed)
+ 32-bit PHV 268 (egress): phv268[24:22] = tcp.ecn[2:0] (tagalong capable) (deparsed)
+ 32-bit PHV 268 (egress): phv268[21:16] = tcp.ctrl[5:0] (tagalong capable) (deparsed)
+ 32-bit PHV 268 (egress): phv268[15:0] = tcp.window[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 269 (egress): phv269[31:16] = tcp.checksum[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 269 (egress): phv269[15:0] = tcp.urgentPtr[15:0] (tagalong capable) (deparsed)
+ 32-bit PHV 270 (egress): phv270[31:0] = ethernet.dstAddr[39:8] (tagalong capable) (deparsed)
+ 32-bit PHV 271 (egress): phv271[31:0] = ethernet.srcAddr[31:0] (tagalong capable) (deparsed)
+ >> 3 in ingress and 8 in egress
Allocations in Group 16 8 bits (tagalong)
8-bit PHV 288 (ingress): phv288[7:4] = ipv4.version[3:0] (tagalong capable) (deparsed)
@@ -161,74 +152,68 @@
8-bit PHV 289 (ingress): phv289[7:0] = udp.length_[15:8] (tagalong capable) (deparsed)
8-bit PHV 290 (ingress): phv290[7:0] = tcp.srcPort[7:0] (tagalong capable) (deparsed)
8-bit PHV 290 (ingress): phv290[7:0] = udp.length_[7:0] (tagalong capable) (deparsed)
- 8-bit PHV 292 (egress): phv292[7:4] = ipv4.version[3:0] (tagalong capable) (deparsed)
- 8-bit PHV 292 (egress): phv292[3:0] = ipv4.ihl[3:0] (tagalong capable) (deparsed)
- 8-bit PHV 293 (egress): phv293[7:0] = ipv4.diffserv[7:0] (tagalong capable) (deparsed)
- 8-bit PHV 294 (egress): phv294[7:0] = tcp.srcPort[15:8] (tagalong capable) (deparsed)
- 8-bit PHV 294 (egress): phv294[7:0] = udp.srcPort[15:8] (tagalong capable) (deparsed)
- 8-bit PHV 295 (egress): phv295[7:0] = tcp.srcPort[7:0] (tagalong capable) (deparsed)
- 8-bit PHV 295 (egress): phv295[7:0] = udp.srcPort[7:0] (tagalong capable) (deparsed)
- 8-bit PHV 296 (egress): phv296[7:0] = ethernet.dstAddr[47:40] (tagalong capable) (deparsed)
- 8-bit PHV 297 (egress): phv297[7:0] = ethernet.srcAddr[39:32] (tagalong capable) (deparsed)
- >> 3 in ingress and 6 in egress
+ 8-bit PHV 291 (ingress): phv291[7:0] = tcp.dstPort[15:8] (tagalong capable) (deparsed)
+ 8-bit PHV 292 (ingress): phv292[7:0] = tcp.dstPort[7:0] (tagalong capable) (deparsed)
+ 8-bit PHV 296 (egress): phv296[7:4] = ipv4.version[3:0] (tagalong capable) (deparsed)
+ 8-bit PHV 296 (egress): phv296[3:0] = ipv4.ihl[3:0] (tagalong capable) (deparsed)
+ 8-bit PHV 297 (egress): phv297[7:0] = ipv4.diffserv[7:0] (tagalong capable) (deparsed)
+ 8-bit PHV 298 (egress): phv298[7:0] = tcp.srcPort[15:8] (tagalong capable) (deparsed)
+ 8-bit PHV 298 (egress): phv298[7:0] = udp.srcPort[15:8] (tagalong capable) (deparsed)
+ 8-bit PHV 299 (egress): phv299[7:0] = tcp.srcPort[7:0] (tagalong capable) (deparsed)
+ 8-bit PHV 299 (egress): phv299[7:0] = udp.srcPort[7:0] (tagalong capable) (deparsed)
+ 8-bit PHV 300 (egress): phv300[7:0] = ethernet.dstAddr[47:40] (tagalong capable) (deparsed)
+ 8-bit PHV 301 (egress): phv301[7:0] = ethernet.srcAddr[39:32] (tagalong capable) (deparsed)
+ >> 5 in ingress and 6 in egress
Allocations in Group 18 16 bits (tagalong)
16-bit PHV 320 (ingress): phv320[15:8] = ipv4.diffserv[7:0] (tagalong capable) (deparsed)
16-bit PHV 320 (ingress): phv320[7:0] = ipv4.totalLen[15:8] (tagalong capable) (deparsed)
16-bit PHV 321 (ingress): phv321[15:8] = ipv4.totalLen[7:0] (tagalong capable) (deparsed)
16-bit PHV 321 (ingress): phv321[7:0] = ipv4.identification[15:8] (tagalong capable) (deparsed)
- 16-bit PHV 322 (ingress): phv322[15:0] = tcp.dstPort[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 322 (ingress): phv322[15:0] = tcp.seqNo[31:16] (tagalong capable) (deparsed)
16-bit PHV 322 (ingress): phv322[15:0] = udp.checksum[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 323 (ingress): phv323[15:0] = tcp.seqNo[31:16] (tagalong capable) (deparsed)
- 16-bit PHV 324 (ingress): phv324[15:0] = tcp.seqNo[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 326 (egress): phv326[15:0] = ipv4.totalLen[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 327 (egress): phv327[15:0] = ipv4.identification[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 328 (egress): phv328[15:13] = ipv4.flags[2:0] (tagalong capable) (deparsed)
- 16-bit PHV 328 (egress): phv328[12:0] = ipv4.fragOffset[12:0] (tagalong capable) (deparsed)
- 16-bit PHV 329 (egress): phv329[15:0] = tcp.dstPort[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 329 (egress): phv329[15:0] = udp.dstPort[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 330 (egress): phv330[15:0] = tcp.seqNo[31:16] (tagalong capable) (deparsed)
- 16-bit PHV 331 (egress): phv331[15:0] = tcp.seqNo[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 332 (egress): phv332[15:8] = ethernet.dstAddr[7:0] (tagalong capable) (deparsed)
- 16-bit PHV 332 (egress): phv332[7:0] = ethernet.srcAddr[47:40] (tagalong capable) (deparsed)
- 16-bit PHV 333 (egress): phv333[15:0] = ethernet.etherType[15:0] (tagalong capable) (deparsed)
- 16-bit PHV 334 (egress): phv334[15:7] = packet_out_hdr.egress_port[8:0] (tagalong capable) (deparsed)
- 16-bit PHV 334 (egress): phv334[6:0] = packet_out_hdr._padding[6:0] (tagalong capable) (deparsed)
- >> 5 in ingress and 9 in egress
+ 16-bit PHV 323 (ingress): phv323[15:0] = tcp.seqNo[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 324 (ingress): phv324[15:0] = tcp.ackNo[31:16] (tagalong capable) (deparsed)
+ 16-bit PHV 325 (ingress): phv325[15:0] = tcp.ackNo[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 332 (egress): phv332[15:0] = ipv4.totalLen[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 333 (egress): phv333[15:0] = ipv4.identification[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 334 (egress): phv334[15:13] = ipv4.flags[2:0] (tagalong capable) (deparsed)
+ 16-bit PHV 334 (egress): phv334[12:0] = ipv4.fragOffset[12:0] (tagalong capable) (deparsed)
+ 16-bit PHV 335 (egress): phv335[15:0] = tcp.dstPort[15:0] (tagalong capable) (deparsed)
+ >> 6 in ingress and 4 in egress
+
+Allocations in Group 19 16 bits (tagalong)
+ 16-bit PHV 336 (egress): phv336[15:0] = tcp.seqNo[31:16] (tagalong capable) (deparsed)
+ 16-bit PHV 336 (egress): phv336[15:0] = udp.dstPort[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 337 (egress): phv337[15:0] = tcp.seqNo[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 338 (egress): phv338[15:8] = ethernet.dstAddr[7:0] (tagalong capable) (deparsed)
+ 16-bit PHV 338 (egress): phv338[7:0] = ethernet.srcAddr[47:40] (tagalong capable) (deparsed)
+ 16-bit PHV 339 (egress): phv339[15:0] = ethernet.etherType[15:0] (tagalong capable) (deparsed)
+ 16-bit PHV 340 (egress): phv340[15:7] = packet_out_hdr.egress_port[8:0] (tagalong capable) (deparsed)
+ 16-bit PHV 340 (egress): phv340[15:7] = packet_in_hdr.ingress_port[8:0] (tagalong capable) (deparsed)
+ 16-bit PHV 340 (egress): phv340[6:0] = packet_out_hdr._padding[6:0] (tagalong capable) (deparsed)
+ 16-bit PHV 340 (egress): phv340[6:0] = packet_in_hdr._padding[6:0] (tagalong capable) (deparsed)
+ >> 0 in ingress and 5 in egress
Final POV layout (ingress):
- 32: --validity_check--packet_in_hdr (ingress) in container 68
- 33: --validity_check--packet_out_hdr (ingress) in container 68
- 34: --validity_check--ethernet (ingress) in container 68
- 35: --validity_check--ipv4 (ingress) in container 68
- 36: --validity_check--tcp (ingress) in container 68
- 37: --validity_check--udp (ingress) in container 68
- 38: --validity_check--metadata_bridge (ingress) in container 68
+ 32: --validity_check--packet_in_hdr (ingress) in container 67
+ 33: --validity_check--packet_out_hdr (ingress) in container 67
+ 34: --validity_check--ethernet (ingress) in container 67
+ 35: --validity_check--ipv4 (ingress) in container 67
+ 36: --validity_check--tcp (ingress) in container 67
+ 37: --validity_check--udp (ingress) in container 67
+ 38: --validity_check--metadata_bridge (ingress) in container 67
Final POV layout (egress):
- 0: --validity_check--packet_in_hdr (egress) in container 82
- 1: --validity_check--packet_out_hdr (egress) in container 82
- 2: --validity_check--ethernet (egress) in container 82
- 3: --validity_check--ipv4 (egress) in container 82
- 4: --validity_check--tcp (egress) in container 82
- 5: --validity_check--udp (egress) in container 82
+ 0: --validity_check--packet_in_hdr (egress) in container 81
+ 1: --validity_check--packet_out_hdr (egress) in container 81
+ 2: --validity_check--ethernet (egress) in container 81
+ 3: --validity_check--ipv4 (egress) in container 81
+ 4: --validity_check--tcp (egress) in container 81
+ 5: --validity_check--udp (egress) in container 81
--------------------------------------------
- Bridged metadata layout (9 bytes)
+ Bridged metadata layout (6 bytes)
--------------------------------------------
-Final ingress layout:
- -pad-0-[6:0]
- ig_intr_md_for_tm.copy_to_cpu[0:0]
- ig_intr_md.resubmit_flag[0:0]
- ig_intr_md._pad1[0:0]
- ig_intr_md._pad2[1:0]
- ig_intr_md._pad3[2:0]
- ig_intr_md.ingress_port[8:0]
-
-Final egress layout:
- -pad-0-[6:0]
- ig_intr_md_for_tm.copy_to_cpu[0:0]
- -pad-1-[6:0]
- ig_intr_md.ingress_port[8:0]
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.calcfields.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.calcfields.log
index b6cc53b..0e60adf 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.calcfields.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.calcfields.log
@@ -1,35 +1,37 @@
+---------------------------------------------------------------------+
| Log file: parde.calcfields.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
Reserving 0 16-bit ingress tphvs for residual checksums
Reserving 0 16-bit egress tphvs for residual checksums
Need 0 POV bits for checksum update control
-Number of reachable states from state parse_tcp : 1
+Number of reachable states from state parse_tcp//spilled : 1
+Number of reachable states from state parse_tcp : 2
Number of reachable states from state parse_udp : 1
-Number of reachable states from state parse_ipv4 : 3
-Number of reachable states from state parse_ethernet : 4
-Number of reachable states from state parse_pkt_in : 5
-Number of reachable states from state parse_pkt_out : 5
-Number of reachable states from state default_parser : 6
-Number of reachable states from state start : 8
-Number of reachable states from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0> : 9
-Number of reachable states from state <Shim start state> : 10
+Number of reachable states from state parse_ipv4 : 4
+Number of reachable states from state parse_ethernet : 5
+Number of reachable states from state parse_pkt_in : 6
+Number of reachable states from state parse_pkt_out : 6
+Number of reachable states from state default_parser : 7
+Number of reachable states from state start : 9
+Number of reachable states from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0> : 10
+Number of reachable states from state <Shim start state> : 11
parser_state_calculations:[
- parse_tcp_139934868577552
- parse_udp_139934868476048
- parse_ipv4_139934868574288
- parse_ethernet_139934868519760
- parse_pkt_in_139934868519632
- parse_pkt_out_139934868477136
- default_parser_139934868476944
- start_139934868576016
- <Phase 0>_139934860972112
- <Ingress intrinsic metadata>_139934861029072
- <POV initialization>_139934860972496
- <Shim start state>_139934860972816
+ parse_tcp_140162566980432
+ parse_tcp_140162565529552
+ parse_udp_140162565528592
+ parse_ipv4_140162562411728
+ parse_ethernet_140162562408656
+ parse_pkt_in_140162562411664
+ parse_pkt_out_140162565527504
+ default_parser_140162565527696
+ start_140162562410704
+ <Phase 0>_140162562277968
+ <Ingress intrinsic metadata>_140162562277648
+ <POV initialization>_140162562278352
+ <Shim start state>_140162562278672
]
parser_calculations: [
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.config.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.config.log
index 81c9815..3bfe6a7 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.config.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.config.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: parde.config.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
Configuring deparser.inp.iim.ii_phv_csum.csum_cfg[0].csum_cfg_entry[0].zero_m_s_b = 1
@@ -16059,12 +16059,12 @@
63 | g1w31:
|
8 bits
- 64 | I g2w0: [ig_intr_md_for_tm.copy_to_cpu]
- 65 | I g2w1: [ipv4.srcAddr[23:16]]
- 66 | I g2w2: [ethernet.dstAddr[47:40]]
- 67 | I g2w3: [ethernet.srcAddr[39:32]]
- 68 | I g2w4: [POV[39:32]]
- 69 | I g2w5: [ig_intr_md_for_tm.drop_ctl]
+ 64 | I g2w0: [ipv4.srcAddr[23:16]]
+ 65 | I g2w1: [ethernet.dstAddr[47:40]]
+ 66 | I g2w2: [ethernet.srcAddr[39:32]]
+ 67 | I g2w3: [POV[39:32]]
+ 68 | I g2w4: [ig_intr_md_for_tm.drop_ctl]
+ 69 | g2w5:
70 | g2w6:
71 | g2w7:
72 | g2w8:
@@ -16075,9 +16075,9 @@
77 | g2w13:
78 | g2w14:
79 | g2w15:
- 80 | E g2w16: [ig_intr_md_for_tm.copy_to_cpu]
- 81 | E g2w17: [eg_intr_md._pad7, eg_intr_md.egress_cos]
- 82 | E g2w18: [POV[7:0]]
+ 80 | E g2w16: [eg_intr_md._pad7, eg_intr_md.egress_cos]
+ 81 | E g2w17: [POV[7:0]]
+ 82 | g2w18:
83 | g2w19:
84 | g2w20:
85 | g2w21:
@@ -16143,9 +16143,9 @@
141 | g4w13:
142 | g4w14:
143 | g4w15:
- 144 | E g4w16: [ig_intr_md.ingress_port]
- 145 | E g4w17: [packet_in_hdr.ingress_port, packet_in_hdr._padding]
- 146 | E g4w18: [eg_intr_md._pad0, eg_intr_md.egress_port]
+ 144 | E g4w16: [eg_intr_md._pad0, eg_intr_md.egress_port]
+ 145 | g4w17:
+ 146 | g4w18:
147 | g4w19:
148 | g4w20:
149 | g4w21:
@@ -16232,21 +16232,21 @@
|
32 bits
256 | I g8w0: [ipv4.identification[7:0], ipv4.flags, ipv4.fragOffset, ipv4.ttl]
- 257 | I g8w1: [tcp.ackNo]
- 258 | I g8w2: [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]
- 259 | I g8w3: [tcp.checksum, tcp.urgentPtr]
- 260 | E g8w4: [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]
- 261 | E g8w5: [ipv4.srcAddr]
- 262 | E g8w6: [ipv4.dstAddr]
- 263 | E g8w7: [tcp.ackNo, udp.length_, udp.checksum]
- 264 | E g8w8: [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]
- 265 | E g8w9: [tcp.checksum, tcp.urgentPtr]
- 266 | E g8w10: [ethernet.dstAddr[39:8]]
- 267 | E g8w11: [ethernet.srcAddr[31:0]]
- 268 | g8w12:
- 269 | g8w13:
- 270 | g8w14:
- 271 | g8w15:
+ 257 | I g8w1: [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]
+ 258 | I g8w2: [tcp.checksum, tcp.urgentPtr]
+ 259 | g8w3:
+ 260 | g8w4:
+ 261 | g8w5:
+ 262 | g8w6:
+ 263 | g8w7:
+ 264 | E g8w8: [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]
+ 265 | E g8w9: [ipv4.srcAddr]
+ 266 | E g8w10: [ipv4.dstAddr]
+ 267 | E g8w11: [tcp.ackNo, udp.length_, udp.checksum]
+ 268 | E g8w12: [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]
+ 269 | E g8w13: [tcp.checksum, tcp.urgentPtr]
+ 270 | E g8w14: [ethernet.dstAddr[39:8]]
+ 271 | E g8w15: [ethernet.srcAddr[31:0]]
272 | g8w16:
273 | g8w17:
274 | g8w18:
@@ -16268,17 +16268,17 @@
288 | I g9w0: [ipv4.version, ipv4.ihl]
289 | I g9w1: [tcp.srcPort[15:8], udp.length_[15:8]]
290 | I g9w2: [tcp.srcPort[7:0], udp.length_[7:0]]
- 291 | g9w3:
- 292 | E g9w4: [ipv4.version, ipv4.ihl]
- 293 | E g9w5: [ipv4.diffserv]
- 294 | E g9w6: [tcp.srcPort[15:8], udp.srcPort[15:8]]
- 295 | E g9w7: [tcp.srcPort[7:0], udp.srcPort[7:0]]
- 296 | E g9w8: [ethernet.dstAddr[47:40]]
- 297 | E g9w9: [ethernet.srcAddr[39:32]]
- 298 | g9w10:
- 299 | g9w11:
- 300 | g9w12:
- 301 | g9w13:
+ 291 | I g9w3: [tcp.dstPort[15:8]]
+ 292 | I g9w4: [tcp.dstPort[7:0]]
+ 293 | g9w5:
+ 294 | g9w6:
+ 295 | g9w7:
+ 296 | E g9w8: [ipv4.version, ipv4.ihl]
+ 297 | E g9w9: [ipv4.diffserv]
+ 298 | E g9w10: [tcp.srcPort[15:8], udp.srcPort[15:8]]
+ 299 | E g9w11: [tcp.srcPort[7:0], udp.srcPort[7:0]]
+ 300 | E g9w12: [ethernet.dstAddr[47:40]]
+ 301 | E g9w13: [ethernet.srcAddr[39:32]]
302 | g9w14:
303 | g9w15:
304 | g9w16:
@@ -16301,25 +16301,25 @@
16 bits
320 | I g10w0: [ipv4.diffserv, ipv4.totalLen[15:8]]
321 | I g10w1: [ipv4.totalLen[7:0], ipv4.identification[15:8]]
- 322 | I g10w2: [tcp.dstPort, udp.checksum]
- 323 | I g10w3: [tcp.seqNo[31:16]]
- 324 | I g10w4: [tcp.seqNo[15:0]]
- 325 | g10w5:
- 326 | E g10w6: [ipv4.totalLen]
- 327 | E g10w7: [ipv4.identification]
- 328 | E g10w8: [ipv4.flags, ipv4.fragOffset]
- 329 | E g10w9: [tcp.dstPort, udp.dstPort]
- 330 | E g10w10: [tcp.seqNo[31:16]]
- 331 | E g10w11: [tcp.seqNo[15:0]]
- 332 | E g10w12: [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]
- 333 | E g10w13: [ethernet.etherType]
- 334 | E g10w14: [packet_out_hdr.egress_port, packet_out_hdr._padding]
- 335 | g10w15:
- 336 | g10w16:
- 337 | g10w17:
- 338 | g10w18:
- 339 | g10w19:
- 340 | g10w20:
+ 322 | I g10w2: [tcp.seqNo[31:16], udp.checksum]
+ 323 | I g10w3: [tcp.seqNo[15:0]]
+ 324 | I g10w4: [tcp.ackNo[31:16]]
+ 325 | I g10w5: [tcp.ackNo[15:0]]
+ 326 | g10w6:
+ 327 | g10w7:
+ 328 | g10w8:
+ 329 | g10w9:
+ 330 | g10w10:
+ 331 | g10w11:
+ 332 | E g10w12: [ipv4.totalLen]
+ 333 | E g10w13: [ipv4.identification]
+ 334 | E g10w14: [ipv4.flags, ipv4.fragOffset]
+ 335 | E g10w15: [tcp.dstPort]
+ 336 | E g10w16: [tcp.seqNo[31:16], udp.dstPort]
+ 337 | E g10w17: [tcp.seqNo[15:0]]
+ 338 | E g10w18: [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]
+ 339 | E g10w19: [ethernet.etherType]
+ 340 | E g10w20: [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]
341 | g10w21:
342 | g10w22:
343 | g10w23:
@@ -16363,6 +16363,7 @@
7: parse_pkt_out
8: <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>
9: start
+ 10: parse_tcp//spilled
Egress:
0: <Shim start state>
1: parse_ethernet
@@ -16371,7 +16372,7 @@
4: parse_udp
5: default_parser
6: parse_pkt_out
- 7: <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
+ 7: <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
8: parse_pkt_in
---------------
POV layout:
@@ -16395,10 +16396,7 @@
6-254 | -
---------------
Bridged metadata:
-Ingress:
-[64, 128]
-Egress:
-[80, 144]
+[None]
---------------
Deparse order:
Ingress: ['metadata_bridge', '_bridged_intr_md_', 'packet_out_hdr', 'packet_in_hdr', 'ethernet', 'ipv4', 'udp', 'tcp']
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.error.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.error.log
index 91060ce..e6b473b 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.error.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.error.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: parde.error.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.log
index 0eab321..1c409b9 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parde.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: parde.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
># Begin digest init (pre-PHV)
@@ -14,20 +14,18 @@
># End digest PHV reservations
># Begin digest init (post-PHV)
># End digest init (post-PHV)
-Bridge-MF:ig_intr_md_for_tm.copy_to_cpu
-Bridge-MF:ig_intr_md.ingress_port
Found parser entry point: start
># Begin unroll of HLIR parse graph
>## Create shadow parse graph and find loops
>## Entrypoint 'p4_parse_state.start'
-Creating shadow state: 'p4_parse_state.start' -> 'shadow_state (start, 139934868520464)'
-Creating shadow state: 'p4_parse_state.parse_pkt_in' -> 'shadow_state (parse_pkt_in, 139934868520016)'
-Creating shadow state: 'p4_parse_state.parse_ethernet' -> 'shadow_state (parse_ethernet, 139934868519824)'
-Creating shadow state: 'p4_parse_state.parse_ipv4' -> 'shadow_state (parse_ipv4, 139934868574608)'
-Creating shadow state: 'p4_parse_state.parse_tcp' -> 'shadow_state (parse_tcp, 139934868574800)'
-Creating shadow state: 'p4_parse_state.parse_udp' -> 'shadow_state (parse_udp, 139934868574736)'
-Creating shadow state: 'p4_parse_state.default_parser' -> 'shadow_state (default_parser, 139934868574864)'
-Creating shadow state: 'p4_parse_state.parse_pkt_out' -> 'shadow_state (parse_pkt_out, 139934868574928)'
+Creating shadow state: 'p4_parse_state.start' -> 'shadow_state (start, 140162565357008)'
+Creating shadow state: 'p4_parse_state.parse_pkt_in' -> 'shadow_state (parse_pkt_in, 140162565357072)'
+Creating shadow state: 'p4_parse_state.parse_ethernet' -> 'shadow_state (parse_ethernet, 140162562409616)'
+Creating shadow state: 'p4_parse_state.parse_ipv4' -> 'shadow_state (parse_ipv4, 140162562408912)'
+Creating shadow state: 'p4_parse_state.parse_tcp' -> 'shadow_state (parse_tcp, 140162562409680)'
+Creating shadow state: 'p4_parse_state.parse_udp' -> 'shadow_state (parse_udp, 140162562408528)'
+Creating shadow state: 'p4_parse_state.default_parser' -> 'shadow_state (default_parser, 140162562409744)'
+Creating shadow state: 'p4_parse_state.parse_pkt_out' -> 'shadow_state (parse_pkt_out, 140162562409808)'
># End unroll of HLIR parse graph
># Begin deparser init
>## Create records for gress 0
@@ -82,7 +80,6 @@
Add container 128 for ig_intr_md._pad3 to bmeta_ig_intr_md
Add container 128 for ig_intr_md.ingress_port to bmeta_ig_intr_md
>## Create deparser bridge record
-Bridge contains user-provided data
># End deparser init
Constructing parse graph for entry point start on ingress
Constructing parse graph for entry point start on egress
@@ -92,52 +89,57 @@
Stretch extraction of ingress_port to state <Ingress intrinsic metadata> offset 7
Stretch extraction of ig_intr_md.ingress_port to state <_parse_bridged_ingress_intrinsic_metadata> offset 7
># Begin scraping deparser POV allocation from raw PHV allocation
-PHV layout: [0, 0, 0, 0, 68, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
+PHV layout: [0, 0, 0, 0, 67, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
>## Scraping individual POV records
-POV 36 -> tcp
-POV 37 -> udp
-POV 32 -> packet_in_hdr
-POV 33 -> packet_out_hdr
-POV 38 -> pov_bmeta
POV 34 -> ethernet
POV 35 -> ipv4
+POV 36 -> tcp
+POV 37 -> udp
+POV 38 -> pov_bmeta
+POV 32 -> packet_in_hdr
+POV 33 -> packet_out_hdr
>## Setting up array bits
># End scraping deparser POV allocation from raw PHV allocation
># Begin parser POV rewrite
>## Filling in POV init state
>## Rewriting parser POV extractions
-POV for metadata_bridge -> PHV 68 |= 0x40
-POV for packet_in_hdr -> PHV 68 |= 0x1
-POV for ethernet -> PHV 68 |= 0x4
-POV for ipv4 -> PHV 68 |= 0x8
-POV for tcp -> PHV 68 |= 0x10
-POV for udp -> PHV 68 |= 0x20
-POV for packet_out_hdr -> PHV 68 |= 0x2
+POV for metadata_bridge -> PHV 67 |= 0x40
+POV for packet_in_hdr -> PHV 67 |= 0x1
+POV for ethernet -> PHV 67 |= 0x4
+POV for ipv4 -> PHV 67 |= 0x8
+POV for tcp -> PHV 67 |= 0x10
+POV for udp -> PHV 67 |= 0x20
+POV for packet_out_hdr -> PHV 67 |= 0x2
POV for ig_intr_md -> dropped (no deparser record)
POV for _bridged_intr_md_ -> PHV 0 |= 0x10000
>## Sampling not detected, deparsing at least 1 POV byte
>## Adding POV containers to metadata bridge: [0]
>## Set POV skip state's shift amount to 32
># Begin scraping deparser POV allocation from raw PHV allocation
-PHV layout: [82, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
+PHV layout: [81, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
>## Scraping individual POV records
+POV 2 -> ethernet
+POV 3 -> ipv4
POV 4 -> tcp
POV 5 -> udp
POV 0 -> packet_in_hdr
POV 1 -> packet_out_hdr
-POV 2 -> ethernet
-POV 3 -> ipv4
>## Setting up array bits
># End scraping deparser POV allocation from raw PHV allocation
># Begin parser POV rewrite
>## Filling in POV init state
>## Rewriting parser POV extractions
-POV for packet_in_hdr -> PHV 82 |= 0x1
-POV for ethernet -> PHV 82 |= 0x4
-POV for ipv4 -> PHV 82 |= 0x8
-POV for tcp -> PHV 82 |= 0x10
-POV for udp -> PHV 82 |= 0x20
-POV for packet_out_hdr -> PHV 82 |= 0x2
+POV for packet_in_hdr -> PHV 81 |= 0x1
+POV for ethernet -> PHV 81 |= 0x4
+POV for ipv4 -> PHV 81 |= 0x8
+POV for tcp -> PHV 81 |= 0x10
+POV for udp -> PHV 81 |= 0x20
+POV for packet_out_hdr -> PHV 81 |= 0x2
+Linear Chain parse_tcp -> parse_tcp//spilled
+Try merge parse_tcp <- parse_tcp//spilled
+merge output at offset 24
+Ran out of 8b extractors
+states will not be partially merged since S2 is end of chain
Linear Chain parse_pkt_in -> parse_ethernet
Try merge parse_pkt_in <- parse_ethernet
Multiple paths to state S2 : parse_ethernet <- 3
@@ -197,7 +199,7 @@
Multiple paths to state S2 : start <- 2
Remove state <Ingress intrinsic metadata>
Remove state <Phase 0>
-assign ids to 10 states, dir = 0
+assign ids to 11 states, dir = 0
------
State : <Shim start state>
shift: 0B
@@ -210,7 +212,7 @@
State : parse_pkt_in
shift: 2B
match_reservations: []
-outputs[addr, width]: ([68, 8], [129, 16])
+outputs[addr, width]: ([67, 8], [129, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
parent state start
@@ -219,7 +221,7 @@
State : parse_ethernet
shift: 14B
match_reservations: []
-outputs[addr, width]: ([68, 8], [66, 8], [3, 32], [132, 16], [67, 8], [4, 32], [133, 16])
+outputs[addr, width]: ([67, 8], [65, 8], [3, 32], [132, 16], [66, 8], [4, 32], [133, 16])
branch on = etherType, offset = 96b, dst = parse_ethernet
match_extractions: [match_window(hw_id=0, width=16)]
match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
@@ -232,7 +234,7 @@
State : parse_ipv4
shift: 20B
match_reservations: []
-outputs[addr, width]: ([68, 8], [288, 8], [320, 16], [321, 16], [256, 32], [1, 32], [65, 8], [131, 16], [2, 32])
+outputs[addr, width]: ([67, 8], [288, 8], [320, 16], [321, 16], [256, 32], [1, 32], [64, 8], [131, 16], [2, 32])
branch on = fragOffset, offset = 51b, dst = parse_ipv4
branch on = protocol, offset = 72b, dst = parse_ipv4
match_extractions: [match_window(hw_id=2, width=8), match_window(hw_id=0, width=16)]
@@ -244,17 +246,18 @@
------
State : parse_tcp
-shift: 20B
+shift: 0B
match_reservations: []
-outputs[addr, width]: ([68, 8], [289, 8], [290, 8], [322, 16], [323, 16], [324, 16], [257, 32], [258, 32], [259, 32])
+outputs[addr, width]: ([67, 8], [289, 8], [290, 8], [291, 8], [322, 16], [323, 16], [324, 16], [325, 16], [257, 32], [258, 32])
match_extractions: []
+next state parse_tcp//spilled val 0 mask [False]
parent state parse_ipv4
------
State : parse_udp
shift: 8B
match_reservations: []
-outputs[addr, width]: ([68, 8], [5, 32], [289, 8], [290, 8], [322, 16])
+outputs[addr, width]: ([67, 8], [5, 32], [289, 8], [290, 8], [322, 16])
match_extractions: []
parent state parse_ipv4
@@ -274,7 +277,7 @@
State : parse_pkt_out
shift: 2B
match_reservations: []
-outputs[addr, width]: ([68, 8], [129, 16])
+outputs[addr, width]: ([67, 8], [129, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
parent state default_parser
@@ -297,7 +300,7 @@
State : start
shift: 0B
match_reservations: [match_window(hw_id=0, width=16)]
-outputs[addr, width]: ([68, 8],)
+outputs[addr, width]: ([67, 8],)
branch on = None, offset = 96b, dst = start
match_extractions: [match_window(hw_id=2, width=8)]
match key = [0, 1, 2, 3, 4, 5, 6, 7]
@@ -305,6 +308,14 @@
next state default_parser val 0 mask [False]
parent state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>
+------
+State : parse_tcp//spilled
+shift: 20B
+match_reservations: []
+outputs[addr, width]: ([292, 8],)
+match_extractions: []
+parent state parse_tcp
+
Linear Chain parse_pkt_in -> parse_ethernet
Try merge parse_pkt_in <- parse_ethernet
Multiple paths to state S2 : parse_ethernet <- 3
@@ -326,7 +337,7 @@
S2: State : <Egress intrinsic metadata>
shift: 3B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8])
+outputs[addr, width]: ([144, 16], [80, 8])
branch on = None, offset = 24b, dst = <Egress intrinsic metadata>
match_extractions: []
next state <POV skip> val 0 mask [False]
@@ -340,7 +351,7 @@
S1: State : <POV initialization>_<Egress intrinsic metadata>
shift: 3B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8])
+outputs[addr, width]: ([144, 16], [80, 8])
branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>
match_extractions: []
next state <POV skip> val 0 mask [False]
@@ -352,45 +363,20 @@
match_reservations: []
outputs[addr, width]: ()
match_extractions: []
-next state <Metadata bridge> val 0 mask [False]
+next state <_parse_bridged_ingress_intrinsic_metadata> val 0 mask [False]
parent state <POV initialization>_<Egress intrinsic metadata>
Full merge done <POV initialization>_<Egress intrinsic metadata> <- <POV skip>
-Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <Metadata bridge>
-merge output at offset 0
-merge output at offset 8
-merge_offset = 24, complete_merge = True
+Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <_parse_bridged_ingress_intrinsic_metadata>
+merge_offset = 0, complete_merge = True
Before Merge ------
S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>
shift: 7B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8])
+outputs[addr, width]: ([144, 16], [80, 8])
branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>
match_extractions: []
-next state <Metadata bridge> val 0 mask [False]
-parent state <Shim start state>
-
-
-S2: State : <Metadata bridge>
-shift: 3B
-match_reservations: []
-outputs[addr, width]: ([80, 8], [144, 16])
-match_extractions: []
-next state <_parse_bridged_ingress_intrinsic_metadata> val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>
-
-
-Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <Metadata bridge>
-Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge> <- <_parse_bridged_ingress_intrinsic_metadata>
-merge_offset = 0, complete_merge = True
-Before Merge ------
-S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>
-shift: 10B
-match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8], [80, 8], [144, 16])
-branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>
-match_extractions: []
next state <_parse_bridged_ingress_intrinsic_metadata> val 0 mask [False]
parent state <Shim start state>
@@ -402,19 +388,19 @@
branch promise on = ingress_port, offset = 7b, dst = default_parser
match_extractions: []
next state start val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>
-Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge> <- <_parse_bridged_ingress_intrinsic_metadata>
-Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata> <- start
+Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip> <- <_parse_bridged_ingress_intrinsic_metadata>
+Try merge <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata> <- start
merge_offset = 0, complete_merge = True
Before Merge ------
-S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>
-shift: 12B
+S1: State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>
+shift: 9B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8], [80, 8], [144, 16])
-branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>
-branch promise on = ingress_port, offset = 87b, dst = default_parser
+outputs[addr, width]: ([144, 16], [80, 8])
+branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>
+branch promise on = ingress_port, offset = 63b, dst = default_parser
match_extractions: []
next state start val 0 mask [False]
parent state <Shim start state>
@@ -428,13 +414,12 @@
match_extractions: []
next state parse_pkt_in val 0 mask [True, True, True, True, True, True, True, True]
next state default_parser val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>
-Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata> <- start
+Full merge done <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata> <- start
Remove state <Egress intrinsic metadata>
Remove state <POV skip>
-Remove state <Metadata bridge>
Remove state <_parse_bridged_ingress_intrinsic_metadata>
Remove state start
assign ids to 9 states, dir = 1
@@ -444,13 +429,13 @@
match_reservations: []
outputs[addr, width]: ()
match_extractions: []
-next state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start val 0 mask [False]
+next state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start val 0 mask [False]
------
State : parse_ethernet
shift: 14B
match_reservations: []
-outputs[addr, width]: ([82, 8], [296, 8], [266, 32], [332, 16], [297, 8], [267, 32], [333, 16])
+outputs[addr, width]: ([81, 8], [300, 8], [270, 32], [338, 16], [301, 8], [271, 32], [339, 16])
branch on = etherType, offset = 96b, dst = parse_ethernet
match_extractions: [match_window(hw_id=0, width=16)]
match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
@@ -463,7 +448,7 @@
State : parse_ipv4
shift: 20B
match_reservations: []
-outputs[addr, width]: ([82, 8], [292, 8], [293, 8], [326, 16], [327, 16], [328, 16], [260, 32], [261, 32], [262, 32])
+outputs[addr, width]: ([81, 8], [296, 8], [297, 8], [332, 16], [333, 16], [334, 16], [264, 32], [265, 32], [266, 32])
branch on = fragOffset, offset = 51b, dst = parse_ipv4
branch on = protocol, offset = 72b, dst = parse_ipv4
match_extractions: [match_window(hw_id=2, width=8), match_window(hw_id=0, width=16)]
@@ -477,7 +462,7 @@
State : parse_tcp
shift: 20B
match_reservations: []
-outputs[addr, width]: ([82, 8], [294, 8], [295, 8], [329, 16], [330, 16], [331, 16], [263, 32], [264, 32], [265, 32])
+outputs[addr, width]: ([81, 8], [298, 8], [299, 8], [335, 16], [336, 16], [337, 16], [267, 32], [268, 32], [269, 32])
match_extractions: []
parent state parse_ipv4
@@ -485,7 +470,7 @@
State : parse_udp
shift: 8B
match_reservations: []
-outputs[addr, width]: ([82, 8], [294, 8], [295, 8], [329, 16], [263, 32])
+outputs[addr, width]: ([81, 8], [298, 8], [299, 8], [336, 16], [267, 32])
match_extractions: []
parent state parse_ipv4
@@ -494,30 +479,30 @@
shift: 0B
match_reservations: [match_window(hw_id=0, width=16)]
outputs[addr, width]: ()
-branch on = ingress_port, offset = 87b, dst = default_parser
+branch on = ingress_port, offset = 63b, dst = default_parser
match_extractions: [match_window(hw_id=0, width=16)]
match key = [0, 1, 2, 3, 4, 5, 6, 7, 8, None, None, None, None, None, None, None]
next state parse_pkt_out val 192 mask [True, True, True, True, True, True, True, True, True]
next state parse_ethernet val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
------
State : parse_pkt_out
shift: 2B
match_reservations: []
-outputs[addr, width]: ([82, 8], [334, 16])
+outputs[addr, width]: ([81, 8], [340, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
parent state default_parser
------
-State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
-shift: 12B
+State : <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
+shift: 9B
match_reservations: []
-outputs[addr, width]: ([146, 16], [81, 8], [80, 8], [144, 16])
-branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
-branch on = None, offset = 192b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
-branch promise on = ingress_port, offset = 87b, dst = default_parser
+outputs[addr, width]: ([144, 16], [80, 8])
+branch on = None, offset = 24b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
+branch on = None, offset = 168b, dst = <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
+branch promise on = ingress_port, offset = 63b, dst = default_parser
match_extractions: [match_window(hw_id=2, width=8), match_window(hw_id=0, width=16), match_window(hw_id=3, width=8)]
match key = [8, 9, 10, 11, 12, 13, 14, 15]
match key = [None, None, None, None, None, None, None, None, None, None, None, None, None, None, None, None]
@@ -530,8 +515,8 @@
State : parse_pkt_in
shift: 2B
match_reservations: []
-outputs[addr, width]: ([82, 8], [145, 16])
+outputs[addr, width]: ([81, 8], [340, 16])
match_extractions: []
next state parse_ethernet val 0 mask [False]
-parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start
+parent state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parser.characterize.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parser.characterize.log
index dd05fac..71507d1 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parser.characterize.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/parser.characterize.log
@@ -1,6 +1,6 @@
+---------------------------------------------------------------------+
| Log file: parser.characterize.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/transform.log b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/transform.log
index 0f8f689..1f4cd19 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/transform.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/logs/transform.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: transform.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Thu Sep 7 14:49:38 2017 |
+| Created on: Fri Sep 8 08:26:04 2017 |
+---------------------------------------------------------------------+
-------------------------------
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/name_lookup.c b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/name_lookup.c
index f6a37ba..c2c862d 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/name_lookup.c
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/name_lookup.c
@@ -5,7 +5,7 @@
const char * p4_table_name_lookup(int pipe, int stage, int table_index)
{
switch(stage) {
- case 3:
+ case 2:
{
switch(table_index) {
case 0:
@@ -24,22 +24,11 @@
case 0:
{
switch(table_index) {
- case 0:
- {
- return "ingress_pkt";
- }
- break;
case 1:
{
- return "egress_pkt";
+ return "process_packet_out_table";
}
break;
- }
- }
- break;
- case 1:
- {
- switch(table_index) {
case 0:
{
return "table0";
@@ -48,7 +37,7 @@
}
}
break;
- case 2:
+ case 1:
{
switch(table_index) {
case 0:
@@ -103,45 +92,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -188,16 +167,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -208,56 +177,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -276,33 +240,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -318,62 +292,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -414,45 +393,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -499,16 +468,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -519,56 +478,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -587,33 +541,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -629,62 +593,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -725,45 +694,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -810,16 +769,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -830,56 +779,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -898,33 +842,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -940,62 +894,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -1036,45 +995,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -1121,16 +1070,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -1141,56 +1080,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -1209,33 +1143,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -1251,62 +1195,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -1347,45 +1296,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -1432,16 +1371,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -1452,56 +1381,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -1520,33 +1444,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -1562,62 +1496,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -1658,45 +1597,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -1743,16 +1672,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -1763,56 +1682,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -1831,33 +1745,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -1873,62 +1797,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -1969,45 +1898,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -2054,16 +1973,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -2074,56 +1983,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -2142,33 +2046,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -2184,62 +2098,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -2280,45 +2199,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -2365,16 +2274,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -2385,56 +2284,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -2453,33 +2347,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -2495,62 +2399,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -2591,45 +2500,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -2676,16 +2575,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -2696,56 +2585,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -2764,33 +2648,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -2806,62 +2700,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -2902,45 +2801,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -2987,16 +2876,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -3007,56 +2886,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -3075,33 +2949,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -3117,62 +3001,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -3213,45 +3102,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -3298,16 +3177,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -3318,56 +3187,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -3386,33 +3250,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -3428,62 +3302,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
@@ -3524,45 +3403,35 @@
break;
case 64 :
{
- return "I [ig_intr_md_for_tm.copy_to_cpu]";
+ return "I [ipv4.srcAddr[23:16]]";
}
break;
case 65 :
{
- return "I [ipv4.srcAddr[23:16]]";
+ return "I [ethernet.dstAddr[47:40]]";
}
break;
case 66 :
{
- return "I [ethernet.dstAddr[47:40]]";
+ return "I [ethernet.srcAddr[39:32]]";
}
break;
case 67 :
{
- return "I [ethernet.srcAddr[39:32]]";
- }
- break;
- case 68 :
- {
return "I [POV[39:32]]";
}
break;
- case 69 :
+ case 68 :
{
return "I [ig_intr_md_for_tm.drop_ctl]";
}
break;
case 80 :
{
- return "E [ig_intr_md_for_tm.copy_to_cpu]";
- }
- break;
- case 81 :
- {
return "E [eg_intr_md._pad7, eg_intr_md.egress_cos]";
}
break;
- case 82 :
+ case 81 :
{
return "E [POV[7:0]]";
}
@@ -3609,16 +3478,6 @@
break;
case 144 :
{
- return "E [ig_intr_md.ingress_port]";
- }
- break;
- case 145 :
- {
- return "E [packet_in_hdr.ingress_port, packet_in_hdr._padding]";
- }
- break;
- case 146 :
- {
return "E [eg_intr_md._pad0, eg_intr_md.egress_port]";
}
break;
@@ -3629,56 +3488,51 @@
break;
case 257 :
{
- return "I [tcp.ackNo]";
+ return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
}
break;
case 258 :
{
- return "I [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
- }
- break;
- case 259 :
- {
return "I [tcp.checksum, tcp.urgentPtr]";
}
break;
- case 260 :
- {
- return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
- }
- break;
- case 261 :
- {
- return "E [ipv4.srcAddr]";
- }
- break;
- case 262 :
- {
- return "E [ipv4.dstAddr]";
- }
- break;
- case 263 :
- {
- return "E [tcp.ackNo, udp.length_, udp.checksum]";
- }
- break;
case 264 :
{
- return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ return "E [ipv4.ttl, ipv4.protocol, ipv4.hdrChecksum]";
}
break;
case 265 :
{
- return "E [tcp.checksum, tcp.urgentPtr]";
+ return "E [ipv4.srcAddr]";
}
break;
case 266 :
{
- return "E [ethernet.dstAddr[39:8]]";
+ return "E [ipv4.dstAddr]";
}
break;
case 267 :
{
+ return "E [tcp.ackNo, udp.length_, udp.checksum]";
+ }
+ break;
+ case 268 :
+ {
+ return "E [tcp.dataOffset, tcp.res, tcp.ecn, tcp.ctrl, tcp.window]";
+ }
+ break;
+ case 269 :
+ {
+ return "E [tcp.checksum, tcp.urgentPtr]";
+ }
+ break;
+ case 270 :
+ {
+ return "E [ethernet.dstAddr[39:8]]";
+ }
+ break;
+ case 271 :
+ {
return "E [ethernet.srcAddr[31:0]]";
}
break;
@@ -3697,33 +3551,43 @@
return "I [tcp.srcPort[7:0], udp.length_[7:0]]";
}
break;
+ case 291 :
+ {
+ return "I [tcp.dstPort[15:8]]";
+ }
+ break;
case 292 :
{
- return "E [ipv4.version, ipv4.ihl]";
- }
- break;
- case 293 :
- {
- return "E [ipv4.diffserv]";
- }
- break;
- case 294 :
- {
- return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
- }
- break;
- case 295 :
- {
- return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ return "I [tcp.dstPort[7:0]]";
}
break;
case 296 :
{
- return "E [ethernet.dstAddr[47:40]]";
+ return "E [ipv4.version, ipv4.ihl]";
}
break;
case 297 :
{
+ return "E [ipv4.diffserv]";
+ }
+ break;
+ case 298 :
+ {
+ return "E [tcp.srcPort[15:8], udp.srcPort[15:8]]";
+ }
+ break;
+ case 299 :
+ {
+ return "E [tcp.srcPort[7:0], udp.srcPort[7:0]]";
+ }
+ break;
+ case 300 :
+ {
+ return "E [ethernet.dstAddr[47:40]]";
+ }
+ break;
+ case 301 :
+ {
return "E [ethernet.srcAddr[39:32]]";
}
break;
@@ -3739,62 +3603,67 @@
break;
case 322 :
{
- return "I [tcp.dstPort, udp.checksum]";
+ return "I [tcp.seqNo[31:16], udp.checksum]";
}
break;
case 323 :
{
- return "I [tcp.seqNo[31:16]]";
+ return "I [tcp.seqNo[15:0]]";
}
break;
case 324 :
{
- return "I [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[31:16]]";
}
break;
- case 326 :
+ case 325 :
{
- return "E [ipv4.totalLen]";
- }
- break;
- case 327 :
- {
- return "E [ipv4.identification]";
- }
- break;
- case 328 :
- {
- return "E [ipv4.flags, ipv4.fragOffset]";
- }
- break;
- case 329 :
- {
- return "E [tcp.dstPort, udp.dstPort]";
- }
- break;
- case 330 :
- {
- return "E [tcp.seqNo[31:16]]";
- }
- break;
- case 331 :
- {
- return "E [tcp.seqNo[15:0]]";
+ return "I [tcp.ackNo[15:0]]";
}
break;
case 332 :
{
- return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ return "E [ipv4.totalLen]";
}
break;
case 333 :
{
- return "E [ethernet.etherType]";
+ return "E [ipv4.identification]";
}
break;
case 334 :
{
- return "E [packet_out_hdr.egress_port, packet_out_hdr._padding]";
+ return "E [ipv4.flags, ipv4.fragOffset]";
+ }
+ break;
+ case 335 :
+ {
+ return "E [tcp.dstPort]";
+ }
+ break;
+ case 336 :
+ {
+ return "E [tcp.seqNo[31:16], udp.dstPort]";
+ }
+ break;
+ case 337 :
+ {
+ return "E [tcp.seqNo[15:0]]";
+ }
+ break;
+ case 338 :
+ {
+ return "E [ethernet.dstAddr[7:0], ethernet.srcAddr[47:40]]";
+ }
+ break;
+ case 339 :
+ {
+ return "E [ethernet.etherType]";
+ }
+ break;
+ case 340 :
+ {
+ return "E [packet_out_hdr.egress_port, packet_out_hdr._padding, packet_in_hdr.ingress_port, packet_in_hdr._padding]";
}
break;
}
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/tofino.bin b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/tofino.bin
index 2fe7395..dc11a6e 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/tofino.bin
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/tofino.bin
Binary files differ
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/deparser.html b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/deparser.html
index 72be34c..9f5f96b 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/deparser.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/deparser.html
@@ -102,7 +102,7 @@
<td width=50 style="border: 1px solid black" align=center>120-127</td>
</tr><tr><td width=50 align=right>PHV </td>
<td height=50 colspan=4 align=center bgcolor=#DDDDDD>0</td>
-<td height=50 colspan=1 align=center bgcolor=#DDDDDD>68</td>
+<td height=50 colspan=1 align=center bgcolor=#DDDDDD>67</td>
<td height=50 colspan=11 align=center bgcolor=#FFFFFF>----</td>
</tr></table><br />
<table border=0 style="border: 1px solid black;"><tr><td width=50 align=right>POV </td>
@@ -129,13 +129,13 @@
<tr class=fde_row_0><td height=50 width=50>0-15</td><td>----</td><td> </td><td> </td></tr>
<tr class=fde_row_0><td height=50 width=50>16</td><td>_bridged_intr_md_</td><td>PHV 0 bit 16</td><td>(phv[0] & 0x10000)</td></tr>
<tr class=fde_row_0><td height=50 width=50>17-31</td><td>----</td><td> </td><td> </td></tr>
-<tr class=fde_row_0><td height=50 width=50>32</td><td>packet_in_hdr</td><td>PHV 68 bit 0</td><td>(phv[68] & 0x1)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>33</td><td>packet_out_hdr</td><td>PHV 68 bit 1</td><td>(phv[68] & 0x2)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>34</td><td>ethernet</td><td>PHV 68 bit 2</td><td>(phv[68] & 0x4)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>35</td><td>ipv4</td><td>PHV 68 bit 3</td><td>(phv[68] & 0x8)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>36</td><td>tcp</td><td>PHV 68 bit 4</td><td>(phv[68] & 0x10)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>37</td><td>udp</td><td>PHV 68 bit 5</td><td>(phv[68] & 0x20)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>38</td><td>metadata_bridge</td><td>PHV 68 bit 6</td><td>(phv[68] & 0x40)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>32</td><td>packet_in_hdr</td><td>PHV 67 bit 0</td><td>(phv[67] & 0x1)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>33</td><td>packet_out_hdr</td><td>PHV 67 bit 1</td><td>(phv[67] & 0x2)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>34</td><td>ethernet</td><td>PHV 67 bit 2</td><td>(phv[67] & 0x4)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>35</td><td>ipv4</td><td>PHV 67 bit 3</td><td>(phv[67] & 0x8)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>36</td><td>tcp</td><td>PHV 67 bit 4</td><td>(phv[67] & 0x10)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>37</td><td>udp</td><td>PHV 67 bit 5</td><td>(phv[67] & 0x20)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>38</td><td>metadata_bridge</td><td>PHV 67 bit 6</td><td>(phv[67] & 0x40)</td></tr>
<tr class=fde_row_0><td height=50 width=50>39-254</td><td>----</td><td> </td><td> </td></tr>
</table>
</div></div><br><br>
@@ -154,15 +154,6 @@
<tr class="fde_row_1">
- <td style="border-right: 1px solid black">metadata_bridge (38)</td>
- <td>64</td>
- <td>128</td>
- <td>128</td>
- <td>-</td>
- </tr>
-
-
- <tr class="fde_row_0">
<td style="border-right: 1px solid black">_bridged_intr_md_ (16)</td>
<td>128</td>
<td>128</td>
@@ -171,7 +162,7 @@
</tr>
- <tr class="fde_row_1">
+ <tr class="fde_row_0">
<td style="border-right: 1px solid black">packet_out_hdr (33)</td>
<td>129</td>
<td>129</td>
@@ -180,7 +171,7 @@
</tr>
- <tr class="fde_row_0">
+ <tr class="fde_row_1">
<td style="border-right: 1px solid black">packet_in_hdr (32)</td>
<td>129</td>
<td>129</td>
@@ -189,35 +180,35 @@
</tr>
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">ethernet (34)</td>
+ <td>65</td>
+ <td>3</td>
+ <td>3</td>
+ <td>3</td>
+ </tr>
+
+
<tr class="fde_row_1">
<td style="border-right: 1px solid black">ethernet (34)</td>
+ <td>3</td>
+ <td>132</td>
+ <td>132</td>
<td>66</td>
- <td>3</td>
- <td>3</td>
- <td>3</td>
</tr>
<tr class="fde_row_0">
<td style="border-right: 1px solid black">ethernet (34)</td>
- <td>3</td>
- <td>132</td>
- <td>132</td>
- <td>67</td>
+ <td>4</td>
+ <td>4</td>
+ <td>4</td>
+ <td>4</td>
</tr>
<tr class="fde_row_1">
<td style="border-right: 1px solid black">ethernet (34)</td>
- <td>4</td>
- <td>4</td>
- <td>4</td>
- <td>4</td>
- </tr>
-
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">ethernet (34)</td>
<td>133</td>
<td>133</td>
<td>-</td>
@@ -225,7 +216,7 @@
</tr>
- <tr class="fde_row_1">
+ <tr class="fde_row_0">
<td style="border-right: 1px solid black">ipv4 (35)</td>
<td><font color=#333333><i>288</i></font></td>
<td><font color=#333333><i>320</i></font></td>
@@ -234,7 +225,7 @@
</tr>
- <tr class="fde_row_0">
+ <tr class="fde_row_1">
<td style="border-right: 1px solid black">ipv4 (35)</td>
<td><font color=#333333><i>321</i></font></td>
<td><font color=#333333><i>256</i></font></td>
@@ -243,7 +234,7 @@
</tr>
- <tr class="fde_row_1">
+ <tr class="fde_row_0">
<td style="border-right: 1px solid black">ipv4 (35)</td>
<td><font color=#333333><i>256</i></font></td>
<td>1</td>
@@ -252,16 +243,16 @@
</tr>
- <tr class="fde_row_0">
+ <tr class="fde_row_1">
<td style="border-right: 1px solid black">ipv4 (35)</td>
<td>1</td>
- <td>65</td>
+ <td>64</td>
<td>131</td>
<td>131</td>
</tr>
- <tr class="fde_row_1">
+ <tr class="fde_row_0">
<td style="border-right: 1px solid black">ipv4 (35)</td>
<td>2</td>
<td>2</td>
@@ -270,7 +261,7 @@
</tr>
- <tr class="fde_row_0">
+ <tr class="fde_row_1">
<td style="border-right: 1px solid black">udp (37)</td>
<td>5</td>
<td>5</td>
@@ -279,7 +270,7 @@
</tr>
- <tr class="fde_row_1">
+ <tr class="fde_row_0">
<td style="border-right: 1px solid black">udp (37)</td>
<td><font color=#333333><i>289</i></font></td>
<td><font color=#333333><i>290</i></font></td>
@@ -288,21 +279,30 @@
</tr>
- <tr class="fde_row_0">
+ <tr class="fde_row_1">
<td style="border-right: 1px solid black">tcp (36)</td>
<td><font color=#333333><i>289</i></font></td>
<td><font color=#333333><i>290</i></font></td>
+ <td><font color=#333333><i>291</i></font></td>
+ <td><font color=#333333><i>292</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">tcp (36)</td>
<td><font color=#333333><i>322</i></font></td>
<td><font color=#333333><i>322</i></font></td>
+ <td><font color=#333333><i>323</i></font></td>
+ <td><font color=#333333><i>323</i></font></td>
</tr>
<tr class="fde_row_1">
<td style="border-right: 1px solid black">tcp (36)</td>
- <td><font color=#333333><i>323</i></font></td>
- <td><font color=#333333><i>323</i></font></td>
<td><font color=#333333><i>324</i></font></td>
<td><font color=#333333><i>324</i></font></td>
+ <td><font color=#333333><i>325</i></font></td>
+ <td><font color=#333333><i>325</i></font></td>
</tr>
@@ -323,17 +323,8 @@
<td><font color=#333333><i>258</i></font></td>
</tr>
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">tcp (36)</td>
- <td><font color=#333333><i>259</i></font></td>
- <td><font color=#333333><i>259</i></font></td>
- <td><font color=#333333><i>259</i></font></td>
- <td><font color=#333333><i>259</i></font></td>
- </tr>
-
</table>
-<br>21/192 entries populated<br>
+<br>20/192 entries populated<br>
</div></div><br><br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('resub_table');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#resub_table">Resubmit Table</a> <br><br><div id="resub_table" style="display: block;">
@@ -370,7 +361,7 @@
<td width=50 style="border: 1px solid black" align=center>112-119</td>
<td width=50 style="border: 1px solid black" align=center>120-127</td>
</tr><tr><td width=50 align=right>PHV </td>
-<td height=50 colspan=1 align=center bgcolor=#DDDDDD>82</td>
+<td height=50 colspan=1 align=center bgcolor=#DDDDDD>81</td>
<td height=50 colspan=15 align=center bgcolor=#FFFFFF>----</td>
</tr></table><br />
<table border=0 style="border: 1px solid black;"><tr><td width=50 align=right>POV </td>
@@ -394,12 +385,12 @@
<td height=50 colspan=16 align=center bgcolor=#FFFFFF>----</td>
</tr></table><br />
<table border=0 style="text-align: center; border: 1px solid black; border-bottom: 0px; border-spacing: 0px;"><tr><td>POV</td><td>Use</td><td>Location</td><td>Expression</td></tr>
-<tr class=fde_row_0><td height=50 width=50>0</td><td>packet_in_hdr</td><td>PHV 82 bit 0</td><td>(phv[82] & 0x1)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>1</td><td>packet_out_hdr</td><td>PHV 82 bit 1</td><td>(phv[82] & 0x2)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>2</td><td>ethernet</td><td>PHV 82 bit 2</td><td>(phv[82] & 0x4)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>3</td><td>ipv4</td><td>PHV 82 bit 3</td><td>(phv[82] & 0x8)</td></tr>
-<tr class=fde_row_0><td height=50 width=50>4</td><td>tcp</td><td>PHV 82 bit 4</td><td>(phv[82] & 0x10)</td></tr>
-<tr class=fde_row_1><td height=50 width=50>5</td><td>udp</td><td>PHV 82 bit 5</td><td>(phv[82] & 0x20)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>0</td><td>packet_in_hdr</td><td>PHV 81 bit 0</td><td>(phv[81] & 0x1)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>1</td><td>packet_out_hdr</td><td>PHV 81 bit 1</td><td>(phv[81] & 0x2)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>2</td><td>ethernet</td><td>PHV 81 bit 2</td><td>(phv[81] & 0x4)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>3</td><td>ipv4</td><td>PHV 81 bit 3</td><td>(phv[81] & 0x8)</td></tr>
+<tr class=fde_row_0><td height=50 width=50>4</td><td>tcp</td><td>PHV 81 bit 4</td><td>(phv[81] & 0x10)</td></tr>
+<tr class=fde_row_1><td height=50 width=50>5</td><td>udp</td><td>PHV 81 bit 5</td><td>(phv[81] & 0x20)</td></tr>
<tr class=fde_row_0><td height=50 width=50>6-254</td><td>----</td><td> </td><td> </td></tr>
</table>
</div></div><br><br>
@@ -410,8 +401,8 @@
<tr class="fde_row_0">
<td style="border-right: 1px solid black">packet_out_hdr (1)</td>
- <td><font color=#333333><i>334</i></font></td>
- <td><font color=#333333><i>334</i></font></td>
+ <td><font color=#333333><i>340</i></font></td>
+ <td><font color=#333333><i>340</i></font></td>
<td>-</td>
<td>-</td>
</tr>
@@ -419,8 +410,8 @@
<tr class="fde_row_1">
<td style="border-right: 1px solid black">packet_in_hdr (0)</td>
- <td>145</td>
- <td>145</td>
+ <td><font color=#333333><i>340</i></font></td>
+ <td><font color=#333333><i>340</i></font></td>
<td>-</td>
<td>-</td>
</tr>
@@ -428,145 +419,145 @@
<tr class="fde_row_0">
<td style="border-right: 1px solid black">ethernet (2)</td>
+ <td><font color=#333333><i>300</i></font></td>
+ <td><font color=#333333><i>270</i></font></td>
+ <td><font color=#333333><i>270</i></font></td>
+ <td><font color=#333333><i>270</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_1">
+ <td style="border-right: 1px solid black">ethernet (2)</td>
+ <td><font color=#333333><i>270</i></font></td>
+ <td><font color=#333333><i>338</i></font></td>
+ <td><font color=#333333><i>338</i></font></td>
+ <td><font color=#333333><i>301</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">ethernet (2)</td>
+ <td><font color=#333333><i>271</i></font></td>
+ <td><font color=#333333><i>271</i></font></td>
+ <td><font color=#333333><i>271</i></font></td>
+ <td><font color=#333333><i>271</i></font></td>
+ </tr>
+
+
+ <tr class="fde_row_1">
+ <td style="border-right: 1px solid black">ethernet (2)</td>
+ <td><font color=#333333><i>339</i></font></td>
+ <td><font color=#333333><i>339</i></font></td>
+ <td>-</td>
+ <td>-</td>
+ </tr>
+
+
+ <tr class="fde_row_0">
+ <td style="border-right: 1px solid black">ipv4 (3)</td>
<td><font color=#333333><i>296</i></font></td>
- <td><font color=#333333><i>266</i></font></td>
- <td><font color=#333333><i>266</i></font></td>
- <td><font color=#333333><i>266</i></font></td>
- </tr>
-
-
- <tr class="fde_row_1">
- <td style="border-right: 1px solid black">ethernet (2)</td>
- <td><font color=#333333><i>266</i></font></td>
- <td><font color=#333333><i>332</i></font></td>
- <td><font color=#333333><i>332</i></font></td>
<td><font color=#333333><i>297</i></font></td>
- </tr>
-
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">ethernet (2)</td>
- <td><font color=#333333><i>267</i></font></td>
- <td><font color=#333333><i>267</i></font></td>
- <td><font color=#333333><i>267</i></font></td>
- <td><font color=#333333><i>267</i></font></td>
+ <td><font color=#333333><i>332</i></font></td>
+ <td><font color=#333333><i>332</i></font></td>
</tr>
<tr class="fde_row_1">
- <td style="border-right: 1px solid black">ethernet (2)</td>
+ <td style="border-right: 1px solid black">ipv4 (3)</td>
<td><font color=#333333><i>333</i></font></td>
<td><font color=#333333><i>333</i></font></td>
- <td>-</td>
- <td>-</td>
+ <td><font color=#333333><i>334</i></font></td>
+ <td><font color=#333333><i>334</i></font></td>
</tr>
<tr class="fde_row_0">
<td style="border-right: 1px solid black">ipv4 (3)</td>
- <td><font color=#333333><i>292</i></font></td>
- <td><font color=#333333><i>293</i></font></td>
- <td><font color=#333333><i>326</i></font></td>
- <td><font color=#333333><i>326</i></font></td>
+ <td><font color=#333333><i>264</i></font></td>
+ <td><font color=#333333><i>264</i></font></td>
+ <td><font color=#333333><i>264</i></font></td>
+ <td><font color=#333333><i>264</i></font></td>
</tr>
<tr class="fde_row_1">
<td style="border-right: 1px solid black">ipv4 (3)</td>
- <td><font color=#333333><i>327</i></font></td>
- <td><font color=#333333><i>327</i></font></td>
- <td><font color=#333333><i>328</i></font></td>
- <td><font color=#333333><i>328</i></font></td>
+ <td><font color=#333333><i>265</i></font></td>
+ <td><font color=#333333><i>265</i></font></td>
+ <td><font color=#333333><i>265</i></font></td>
+ <td><font color=#333333><i>265</i></font></td>
</tr>
<tr class="fde_row_0">
<td style="border-right: 1px solid black">ipv4 (3)</td>
- <td><font color=#333333><i>260</i></font></td>
- <td><font color=#333333><i>260</i></font></td>
- <td><font color=#333333><i>260</i></font></td>
- <td><font color=#333333><i>260</i></font></td>
- </tr>
-
-
- <tr class="fde_row_1">
- <td style="border-right: 1px solid black">ipv4 (3)</td>
- <td><font color=#333333><i>261</i></font></td>
- <td><font color=#333333><i>261</i></font></td>
- <td><font color=#333333><i>261</i></font></td>
- <td><font color=#333333><i>261</i></font></td>
- </tr>
-
-
- <tr class="fde_row_0">
- <td style="border-right: 1px solid black">ipv4 (3)</td>
- <td><font color=#333333><i>262</i></font></td>
- <td><font color=#333333><i>262</i></font></td>
- <td><font color=#333333><i>262</i></font></td>
- <td><font color=#333333><i>262</i></font></td>
+ <td><font color=#333333><i>266</i></font></td>
+ <td><font color=#333333><i>266</i></font></td>
+ <td><font color=#333333><i>266</i></font></td>
+ <td><font color=#333333><i>266</i></font></td>
</tr>
<tr class="fde_row_1">
<td style="border-right: 1px solid black">udp (5)</td>
- <td><font color=#333333><i>294</i></font></td>
- <td><font color=#333333><i>295</i></font></td>
- <td><font color=#333333><i>329</i></font></td>
- <td><font color=#333333><i>329</i></font></td>
+ <td><font color=#333333><i>298</i></font></td>
+ <td><font color=#333333><i>299</i></font></td>
+ <td><font color=#333333><i>336</i></font></td>
+ <td><font color=#333333><i>336</i></font></td>
</tr>
<tr class="fde_row_0">
<td style="border-right: 1px solid black">udp (5)</td>
- <td><font color=#333333><i>263</i></font></td>
- <td><font color=#333333><i>263</i></font></td>
- <td><font color=#333333><i>263</i></font></td>
- <td><font color=#333333><i>263</i></font></td>
+ <td><font color=#333333><i>267</i></font></td>
+ <td><font color=#333333><i>267</i></font></td>
+ <td><font color=#333333><i>267</i></font></td>
+ <td><font color=#333333><i>267</i></font></td>
</tr>
<tr class="fde_row_1">
<td style="border-right: 1px solid black">tcp (4)</td>
- <td><font color=#333333><i>294</i></font></td>
- <td><font color=#333333><i>295</i></font></td>
- <td><font color=#333333><i>329</i></font></td>
- <td><font color=#333333><i>329</i></font></td>
+ <td><font color=#333333><i>298</i></font></td>
+ <td><font color=#333333><i>299</i></font></td>
+ <td><font color=#333333><i>335</i></font></td>
+ <td><font color=#333333><i>335</i></font></td>
</tr>
<tr class="fde_row_0">
<td style="border-right: 1px solid black">tcp (4)</td>
- <td><font color=#333333><i>330</i></font></td>
- <td><font color=#333333><i>330</i></font></td>
- <td><font color=#333333><i>331</i></font></td>
- <td><font color=#333333><i>331</i></font></td>
+ <td><font color=#333333><i>336</i></font></td>
+ <td><font color=#333333><i>336</i></font></td>
+ <td><font color=#333333><i>337</i></font></td>
+ <td><font color=#333333><i>337</i></font></td>
</tr>
<tr class="fde_row_1">
<td style="border-right: 1px solid black">tcp (4)</td>
- <td><font color=#333333><i>263</i></font></td>
- <td><font color=#333333><i>263</i></font></td>
- <td><font color=#333333><i>263</i></font></td>
- <td><font color=#333333><i>263</i></font></td>
+ <td><font color=#333333><i>267</i></font></td>
+ <td><font color=#333333><i>267</i></font></td>
+ <td><font color=#333333><i>267</i></font></td>
+ <td><font color=#333333><i>267</i></font></td>
</tr>
<tr class="fde_row_0">
<td style="border-right: 1px solid black">tcp (4)</td>
- <td><font color=#333333><i>264</i></font></td>
- <td><font color=#333333><i>264</i></font></td>
- <td><font color=#333333><i>264</i></font></td>
- <td><font color=#333333><i>264</i></font></td>
+ <td><font color=#333333><i>268</i></font></td>
+ <td><font color=#333333><i>268</i></font></td>
+ <td><font color=#333333><i>268</i></font></td>
+ <td><font color=#333333><i>268</i></font></td>
</tr>
<tr class="fde_row_1">
<td style="border-right: 1px solid black">tcp (4)</td>
- <td><font color=#333333><i>265</i></font></td>
- <td><font color=#333333><i>265</i></font></td>
- <td><font color=#333333><i>265</i></font></td>
- <td><font color=#333333><i>265</i></font></td>
+ <td><font color=#333333><i>269</i></font></td>
+ <td><font color=#333333><i>269</i></font></td>
+ <td><font color=#333333><i>269</i></font></td>
+ <td><font color=#333333><i>269</i></font></td>
</tr>
</table>
@@ -578,7 +569,7 @@
</div></div><br><br>
</td></tr>
</table>
-<br><i>Created on Thu Sep 7 14:50:00 2017</i>
+<br><i>Created on Fri Sep 8 08:26:25 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/mau.html b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/mau.html
index e352434..5d4d87a 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/mau.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/mau.html
@@ -4,7 +4,7 @@
<div id="content" style="width: 100%; height: 100%">
<h1>Pipeline 0 -- ecmp</h1>
-<h3>Stages Occupied: 4</h3>
+<h3>Stages Occupied: 3</h3>
<h3>Resource Usage Summary</h3>
<table border="1">
<tr>
@@ -29,31 +29,11 @@
</tr>
<tr>
<td align="center">0</td>
-<td align="center">2</td>
-<td align="center">0</td>
-<td align="center">2</td>
-<td align="center">0</td>
-<td align="center">2</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">1</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">2</td>
-</tr>
-<tr>
-<td align="center">1</td>
<td align="center">13</td>
<td align="center">16</td>
<td align="center">2</td>
<td align="center">1</td>
-<td align="center">1</td>
+<td align="center">2</td>
<td align="center">4</td>
<td align="center">3</td>
<td align="center">3</td>
@@ -65,10 +45,10 @@
<td align="center">0</td>
<td align="center">4</td>
<td align="center">2</td>
-<td align="center">1</td>
+<td align="center">2</td>
</tr>
<tr>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">4</td>
<td align="center">0</td>
<td align="center">30</td>
@@ -88,7 +68,7 @@
<td align="center">1</td>
</tr>
<tr>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">2</td>
<td align="center">0</td>
<td align="center">9</td>
@@ -108,6 +88,26 @@
<td align="center">2</td>
</tr>
<tr>
+<td align="center">3</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center">0</td>
+</tr>
+<tr>
<td align="center">4</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -289,15 +289,15 @@
</tr>
<tr>
<td align="center">Totals</td>
-<td align="center">21</td>
+<td align="center">19</td>
<td align="center">16</td>
-<td align="center">43</td>
+<td align="center">41</td>
<td align="center">1</td>
-<td align="center">5</td>
+<td align="center">4</td>
<td align="center">13</td>
<td align="center">9</td>
<td align="center">3</td>
-<td align="center">6</td>
+<td align="center">5</td>
<td align="center">0</td>
<td align="center">4</td>
<td align="center">0</td>
@@ -305,7 +305,7 @@
<td align="center">0</td>
<td align="center">6</td>
<td align="center">3</td>
-<td align="center">6</td>
+<td align="center">5</td>
</tr>
</table>
<h3>Resource Percentage Summary</h3>
@@ -332,31 +332,11 @@
</tr>
<tr>
<td align="center">0</td>
-<td align="center" bgcolor="#07fe00" >1.56%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#02fe00" >0.48%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#3ffe00" >12.50%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#0ffe00" >3.12%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#00c000" >0.00%</td>
-<td align="center" bgcolor="#3ffe00" >12.50%</td>
-</tr>
-<tr>
-<td align="center">1</td>
<td align="center" bgcolor="#33fe00" >10.16%</td>
<td align="center" bgcolor="#7bfe00" >24.24%</td>
<td align="center" bgcolor="#02fe00" >0.48%</td>
<td align="center" bgcolor="#55fe00" >16.67%</td>
-<td align="center" bgcolor="#1ffe00" >6.25%</td>
+<td align="center" bgcolor="#3ffe00" >12.50%</td>
<td align="center" bgcolor="#19fe00" >5.00%</td>
<td align="center" bgcolor="#1ffe00" >6.25%</td>
<td align="center" bgcolor="#3ffe00" >12.50%</td>
@@ -368,10 +348,10 @@
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#3ffe00" >12.50%</td>
<td align="center" bgcolor="#1ffe00" >6.25%</td>
-<td align="center" bgcolor="#1ffe00" >6.25%</td>
+<td align="center" bgcolor="#3ffe00" >12.50%</td>
</tr>
<tr>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center" bgcolor="#0ffe00" >3.12%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#24fe00" >7.21%</td>
@@ -391,7 +371,7 @@
<td align="center" bgcolor="#1ffe00" >6.25%</td>
</tr>
<tr>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center" bgcolor="#07fe00" >1.56%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#0bfe00" >2.16%</td>
@@ -411,6 +391,26 @@
<td align="center" bgcolor="#3ffe00" >12.50%</td>
</tr>
<tr>
+<td align="center">3</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+<td align="center" bgcolor="#00c000" >0.00%</td>
+</tr>
+<tr>
<td align="center">4</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
@@ -592,15 +592,15 @@
</tr>
<tr>
<td align="center">Average</td>
-<td align="center" bgcolor="#06fe00" >1.37%</td>
+<td align="center" bgcolor="#06fe00" >1.24%</td>
<td align="center" bgcolor="#0afe00" >2.02%</td>
-<td align="center" bgcolor="#04fe00" >0.86%</td>
+<td align="center" bgcolor="#04fe00" >0.82%</td>
<td align="center" bgcolor="#07fe00" >1.39%</td>
-<td align="center" bgcolor="#0dfe00" >2.60%</td>
+<td align="center" bgcolor="#0afe00" >2.08%</td>
<td align="center" bgcolor="#06fe00" >1.35%</td>
<td align="center" bgcolor="#07fe00" >1.56%</td>
<td align="center" bgcolor="#05fe00" >1.04%</td>
-<td align="center" bgcolor="#07fe00" >1.56%</td>
+<td align="center" bgcolor="#06fe00" >1.30%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#2afe00" >8.33%</td>
<td align="center" bgcolor="#00c000" >0.00%</td>
@@ -608,7 +608,7 @@
<td align="center" bgcolor="#00c000" >0.00%</td>
<td align="center" bgcolor="#07fe00" >1.56%</td>
<td align="center" bgcolor="#03fe00" >0.78%</td>
-<td align="center" bgcolor="#0ffe00" >3.12%</td>
+<td align="center" bgcolor="#0dfe00" >2.60%</td>
</tr>
</table>
<h2>Phase 0 is not in use.</h2>
@@ -618,2680 +618,55 @@
<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
<rect x="16" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 0 in exact Group 0 (parity group 0)
contains:
- {unused[6:0], ig_intr_md_for_tm.copy_to_cpu[0:0]} for table _condition_3
-</title></rect>
-<rect x="16" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 1 in exact Group 0 (parity group 0)
-contains:
- {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]} for table _condition_0
-</title></rect>
-<rect x="16" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 2 in exact Group 0 (parity group 0)</title></rect>
-<rect x="16" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 3 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 4 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 5 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 6 in exact Group 0 (parity group 0)</title></rect>
-<rect x="24" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 7 in exact Group 0 (parity group 0)</title></rect>
-<rect x="40" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 8 in exact Group 0 (parity group 1)</title></rect>
-<rect x="40" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 9 in exact Group 0 (parity group 1)</title></rect>
-<rect x="40" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 10 in exact Group 0 (parity group 1)</title></rect>
-<rect x="40" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 11 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 12 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 13 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 14 in exact Group 0 (parity group 1)</title></rect>
-<rect x="48" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 15 in exact Group 0 (parity group 1)</title></rect>
-<rect x="16" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 16 in exact Group 1 (parity group 2)</title></rect>
-<rect x="16" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 17 in exact Group 1 (parity group 2)</title></rect>
-<rect x="16" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 18 in exact Group 1 (parity group 2)</title></rect>
-<rect x="16" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 19 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 20 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 21 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 22 in exact Group 1 (parity group 2)</title></rect>
-<rect x="24" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 23 in exact Group 1 (parity group 2)</title></rect>
-<rect x="40" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 24 in exact Group 1 (parity group 3)</title></rect>
-<rect x="40" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 25 in exact Group 1 (parity group 3)</title></rect>
-<rect x="40" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 26 in exact Group 1 (parity group 3)</title></rect>
-<rect x="40" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 27 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 28 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 29 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 30 in exact Group 1 (parity group 3)</title></rect>
-<rect x="48" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 31 in exact Group 1 (parity group 3)</title></rect>
-<rect x="16" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 32 in exact Group 2 (parity group 4)</title></rect>
-<rect x="16" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 33 in exact Group 2 (parity group 4)</title></rect>
-<rect x="16" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 34 in exact Group 2 (parity group 4)</title></rect>
-<rect x="16" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 35 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 36 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 37 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 38 in exact Group 2 (parity group 4)</title></rect>
-<rect x="24" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 39 in exact Group 2 (parity group 4)</title></rect>
-<rect x="40" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 40 in exact Group 2 (parity group 5)</title></rect>
-<rect x="40" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 41 in exact Group 2 (parity group 5)</title></rect>
-<rect x="40" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 42 in exact Group 2 (parity group 5)</title></rect>
-<rect x="40" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 43 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 44 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 45 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 46 in exact Group 2 (parity group 5)</title></rect>
-<rect x="48" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 47 in exact Group 2 (parity group 5)</title></rect>
-<rect x="16" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 48 in exact Group 3 (parity group 6)</title></rect>
-<rect x="16" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 49 in exact Group 3 (parity group 6)</title></rect>
-<rect x="16" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 50 in exact Group 3 (parity group 6)</title></rect>
-<rect x="16" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 51 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 52 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 53 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 54 in exact Group 3 (parity group 6)</title></rect>
-<rect x="24" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 55 in exact Group 3 (parity group 6)</title></rect>
-<rect x="40" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 56 in exact Group 3 (parity group 7)</title></rect>
-<rect x="40" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 57 in exact Group 3 (parity group 7)</title></rect>
-<rect x="40" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 58 in exact Group 3 (parity group 7)</title></rect>
-<rect x="40" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 59 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 60 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 61 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 62 in exact Group 3 (parity group 7)</title></rect>
-<rect x="48" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 63 in exact Group 3 (parity group 7)</title></rect>
-<rect x="16" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 64 in exact Group 4 (parity group 8)</title></rect>
-<rect x="16" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 65 in exact Group 4 (parity group 8)</title></rect>
-<rect x="16" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 66 in exact Group 4 (parity group 8)</title></rect>
-<rect x="16" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 67 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 68 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 69 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 70 in exact Group 4 (parity group 8)</title></rect>
-<rect x="24" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 71 in exact Group 4 (parity group 8)</title></rect>
-<rect x="40" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 72 in exact Group 4 (parity group 9)</title></rect>
-<rect x="40" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 73 in exact Group 4 (parity group 9)</title></rect>
-<rect x="40" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 74 in exact Group 4 (parity group 9)</title></rect>
-<rect x="40" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 75 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 76 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 77 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 78 in exact Group 4 (parity group 9)</title></rect>
-<rect x="48" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 79 in exact Group 4 (parity group 9)</title></rect>
-<rect x="16" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 80 in exact Group 5 (parity group 10)</title></rect>
-<rect x="16" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 81 in exact Group 5 (parity group 10)</title></rect>
-<rect x="16" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 82 in exact Group 5 (parity group 10)</title></rect>
-<rect x="16" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 83 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 84 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 85 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 86 in exact Group 5 (parity group 10)</title></rect>
-<rect x="24" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 87 in exact Group 5 (parity group 10)</title></rect>
-<rect x="40" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 88 in exact Group 5 (parity group 11)</title></rect>
-<rect x="40" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 89 in exact Group 5 (parity group 11)</title></rect>
-<rect x="40" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 90 in exact Group 5 (parity group 11)</title></rect>
-<rect x="40" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 91 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 92 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 93 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 94 in exact Group 5 (parity group 11)</title></rect>
-<rect x="48" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 95 in exact Group 5 (parity group 11)</title></rect>
-<rect x="16" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 96 in exact Group 6 (parity group 12)</title></rect>
-<rect x="16" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 97 in exact Group 6 (parity group 12)</title></rect>
-<rect x="16" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 98 in exact Group 6 (parity group 12)</title></rect>
-<rect x="16" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 99 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 100 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 101 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 102 in exact Group 6 (parity group 12)</title></rect>
-<rect x="24" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 103 in exact Group 6 (parity group 12)</title></rect>
-<rect x="40" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 104 in exact Group 6 (parity group 13)</title></rect>
-<rect x="40" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 105 in exact Group 6 (parity group 13)</title></rect>
-<rect x="40" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 106 in exact Group 6 (parity group 13)</title></rect>
-<rect x="40" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 107 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 108 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 109 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 110 in exact Group 6 (parity group 13)</title></rect>
-<rect x="48" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 111 in exact Group 6 (parity group 13)</title></rect>
-<rect x="16" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 112 in exact Group 7 (parity group 14)</title></rect>
-<rect x="16" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 113 in exact Group 7 (parity group 14)</title></rect>
-<rect x="16" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 114 in exact Group 7 (parity group 14)</title></rect>
-<rect x="16" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 115 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 116 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 117 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 118 in exact Group 7 (parity group 14)</title></rect>
-<rect x="24" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 119 in exact Group 7 (parity group 14)</title></rect>
-<rect x="40" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 120 in exact Group 7 (parity group 15)</title></rect>
-<rect x="40" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 121 in exact Group 7 (parity group 15)</title></rect>
-<rect x="40" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 122 in exact Group 7 (parity group 15)</title></rect>
-<rect x="40" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 123 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 124 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 125 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 126 in exact Group 7 (parity group 15)</title></rect>
-<rect x="48" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 127 in exact Group 7 (parity group 15)</title></rect>
-<rect x="16" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 128 in ternary Group 0</title></rect>
-<rect x="16" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 129 in ternary Group 0</title></rect>
-<rect x="24" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 130 in ternary Group 0</title></rect>
-<rect x="24" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 131 in ternary Group 0</title></rect>
-<rect x="32" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 132 in ternary Group 0</title></rect>
-<rect x="48" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 133 in ternary Group 0</title></rect>
-<rect x="16" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 134 in ternary Group 1</title></rect>
-<rect x="16" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 135 in ternary Group 1</title></rect>
-<rect x="24" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 136 in ternary Group 1</title></rect>
-<rect x="24" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 137 in ternary Group 1</title></rect>
-<rect x="32" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 138 in ternary Group 1</title></rect>
-<rect x="16" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 139 in ternary Group 2</title></rect>
-<rect x="16" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 140 in ternary Group 2</title></rect>
-<rect x="24" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 141 in ternary Group 2</title></rect>
-<rect x="24" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 142 in ternary Group 2</title></rect>
-<rect x="32" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 143 in ternary Group 2</title></rect>
-<rect x="48" y="432" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 144 in ternary Group 1</title></rect>
-<rect x="16" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 145 in ternary Group 3</title></rect>
-<rect x="16" y="448" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 146 in ternary Group 3</title></rect>
-<rect x="24" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 147 in ternary Group 3</title></rect>
-<rect x="24" y="448" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 148 in ternary Group 3</title></rect>
-<rect x="32" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 149 in ternary Group 3</title></rect>
-<rect x="16" y="464" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 150 in ternary Group 4</title></rect>
-<rect x="16" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 151 in ternary Group 4</title></rect>
-<rect x="24" y="464" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 152 in ternary Group 4</title></rect>
-<rect x="24" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 153 in ternary Group 4</title></rect>
-<rect x="32" y="464" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 154 in ternary Group 4</title></rect>
-<rect x="48" y="480" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 155 in ternary Group 2</title></rect>
-<rect x="16" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 156 in ternary Group 5</title></rect>
-<rect x="16" y="496" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 157 in ternary Group 5</title></rect>
-<rect x="24" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 158 in ternary Group 5</title></rect>
-<rect x="24" y="496" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 159 in ternary Group 5</title></rect>
-<rect x="32" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 160 in ternary Group 5</title></rect>
-<rect x="16" y="512" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 161 in ternary Group 6</title></rect>
-<rect x="16" y="520" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 162 in ternary Group 6</title></rect>
-<rect x="24" y="512" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 163 in ternary Group 6</title></rect>
-<rect x="24" y="520" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 164 in ternary Group 6</title></rect>
-<rect x="32" y="512" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 165 in ternary Group 6</title></rect>
-<rect x="48" y="528" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 166 in ternary Group 3</title></rect>
-<rect x="16" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 167 in ternary Group 7</title></rect>
-<rect x="16" y="544" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 168 in ternary Group 7</title></rect>
-<rect x="24" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 169 in ternary Group 7</title></rect>
-<rect x="24" y="544" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 170 in ternary Group 7</title></rect>
-<rect x="32" y="536" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 171 in ternary Group 7</title></rect>
-<rect x="16" y="560" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 172 in ternary Group 8</title></rect>
-<rect x="16" y="568" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 173 in ternary Group 8</title></rect>
-<rect x="24" y="560" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 174 in ternary Group 8</title></rect>
-<rect x="24" y="568" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 175 in ternary Group 8</title></rect>
-<rect x="32" y="560" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 176 in ternary Group 8</title></rect>
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-<rect x="16" y="616" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 184 in ternary Group 10</title></rect>
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
- Depth: 1024</title></rect>
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
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- Entry Bit Width: 128
- Depth: 1024</title></rect>
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- Entry Bit Width: 128
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- Unit Number: 7
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="424" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 8 Col: 0
- Unit Number: 8
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 9 Col: 0
- Unit Number: 9
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 10 Col: 0
- Unit Number: 10
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="96" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 11 Col: 0
- Unit Number: 11
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="616" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 0 Col: 1
- Unit Number: 12
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="592" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 1 Col: 1
- Unit Number: 13
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="568" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 2 Col: 1
- Unit Number: 14
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="544" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 3 Col: 1
- Unit Number: 15
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="520" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 4 Col: 1
- Unit Number: 16
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="496" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 5 Col: 1
- Unit Number: 17
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="472" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 6 Col: 1
- Unit Number: 18
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="448" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 7 Col: 1
- Unit Number: 19
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="424" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 8 Col: 1
- Unit Number: 20
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 9 Col: 1
- Unit Number: 21
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 10 Col: 1
- Unit Number: 22
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<rect x="120" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
- Row: 11 Col: 1
- Unit Number: 23
- Entry Bit Width: 44
- Result Bit width: 1
- Depth: 512</title></rect>
-<text x="82" y="254" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Distr.</text>
-<rect x="80" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 0
- Group ID: 0
-</title></rect>
-<rect x="88" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 0
- Group ID: 1
-</title></rect>
-<rect x="96" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 0
- Group ID: 2
-</title></rect>
-<rect x="104" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 1
- Group ID: 0
-</title></rect>
-<rect x="112" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 1
- Group ID: 1
-</title></rect>
-<rect x="120" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
- Hash ID: 1
- Group ID: 2
-</title></rect>
-<text x="170" y="238" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Bits</text>
-<rect x="176" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 0</title></rect>
-<rect x="184" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 0</title></rect>
-<rect x="192" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 0</title></rect>
-<rect x="200" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 0</title></rect>
-<rect x="208" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 0</title></rect>
-<rect x="216" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 0</title></rect>
-<rect x="224" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 0</title></rect>
-<rect x="232" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 0</title></rect>
-<rect x="240" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 0</title></rect>
-<rect x="248" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 0</title></rect>
-<rect x="256" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 0</title></rect>
-<rect x="264" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 0</title></rect>
-<rect x="272" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 0</title></rect>
-<rect x="176" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 0</title></rect>
-<rect x="184" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 0</title></rect>
-<rect x="192" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 0</title></rect>
-<rect x="200" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 0</title></rect>
-<rect x="208" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 0</title></rect>
-<rect x="216" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 0</title></rect>
-<rect x="224" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 0</title></rect>
-<rect x="232" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 0</title></rect>
-<rect x="240" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 0</title></rect>
-<rect x="248" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 0</title></rect>
-<rect x="256" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 0</title></rect>
-<rect x="264" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 0</title></rect>
-<rect x="272" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 0</title></rect>
-<rect x="176" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 0</title></rect>
-<rect x="184" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 0</title></rect>
-<rect x="192" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 0</title></rect>
-<rect x="200" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 0</title></rect>
-<rect x="208" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 0</title></rect>
-<rect x="216" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 0</title></rect>
-<rect x="224" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 0</title></rect>
-<rect x="232" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 0</title></rect>
-<rect x="240" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 0</title></rect>
-<rect x="248" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 0</title></rect>
-<rect x="256" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 0</title></rect>
-<rect x="264" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 0</title></rect>
-<rect x="272" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 0</title></rect>
-<rect x="176" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 0</title></rect>
-<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Hash Bit 40 in hash match group 0
-Occupied by: _condition_3 for ('ig_intr_md_for_tm.copy_to_cpu', 0)</title></rect>
-<rect x="192" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Hash Bit 41 in hash match group 0
-Occupied by: _condition_0 for ('--validity_check--packet_out_hdr', 0)</title></rect>
-<rect x="200" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 0</title></rect>
-<rect x="208" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 0</title></rect>
-<rect x="216" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 0</title></rect>
-<rect x="224" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 0</title></rect>
-<rect x="232" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 0</title></rect>
-<rect x="240" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 0</title></rect>
-<rect x="248" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 0</title></rect>
-<rect x="256" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 0</title></rect>
-<rect x="264" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 0</title></rect>
-<rect x="272" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 0</title></rect>
-<rect x="296" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 1</title></rect>
-<rect x="304" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 1</title></rect>
-<rect x="312" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 1</title></rect>
-<rect x="320" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 1</title></rect>
-<rect x="328" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 1</title></rect>
-<rect x="336" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 1</title></rect>
-<rect x="344" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 1</title></rect>
-<rect x="352" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 1</title></rect>
-<rect x="360" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 1</title></rect>
-<rect x="368" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 1</title></rect>
-<rect x="376" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 1</title></rect>
-<rect x="384" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 1</title></rect>
-<rect x="392" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 1</title></rect>
-<rect x="296" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 1</title></rect>
-<rect x="304" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 1</title></rect>
-<rect x="312" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 1</title></rect>
-<rect x="320" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 1</title></rect>
-<rect x="328" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 1</title></rect>
-<rect x="336" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 1</title></rect>
-<rect x="344" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 1</title></rect>
-<rect x="352" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 1</title></rect>
-<rect x="360" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 1</title></rect>
-<rect x="368" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 1</title></rect>
-<rect x="376" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 1</title></rect>
-<rect x="384" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 1</title></rect>
-<rect x="392" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 1</title></rect>
-<rect x="296" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 1</title></rect>
-<rect x="304" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 1</title></rect>
-<rect x="312" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 1</title></rect>
-<rect x="320" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 1</title></rect>
-<rect x="328" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 1</title></rect>
-<rect x="336" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 1</title></rect>
-<rect x="344" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 1</title></rect>
-<rect x="352" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 1</title></rect>
-<rect x="360" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 1</title></rect>
-<rect x="368" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 1</title></rect>
-<rect x="376" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 1</title></rect>
-<rect x="384" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 1</title></rect>
-<rect x="392" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 1</title></rect>
-<rect x="296" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 1</title></rect>
-<rect x="304" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 1</title></rect>
-<rect x="312" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 1</title></rect>
-<rect x="320" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 1</title></rect>
-<rect x="328" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 1</title></rect>
-<rect x="336" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 1</title></rect>
-<rect x="344" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 1</title></rect>
-<rect x="352" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 1</title></rect>
-<rect x="360" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 1</title></rect>
-<rect x="368" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 1</title></rect>
-<rect x="376" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 1</title></rect>
-<rect x="384" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 1</title></rect>
-<rect x="392" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 1</title></rect>
-<rect x="176" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 2</title></rect>
-<rect x="184" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 2</title></rect>
-<rect x="192" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 2</title></rect>
-<rect x="200" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 2</title></rect>
-<rect x="208" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 2</title></rect>
-<rect x="216" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 2</title></rect>
-<rect x="224" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 2</title></rect>
-<rect x="232" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 2</title></rect>
-<rect x="240" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 2</title></rect>
-<rect x="248" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 2</title></rect>
-<rect x="256" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 2</title></rect>
-<rect x="264" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 2</title></rect>
-<rect x="272" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 2</title></rect>
-<rect x="176" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 2</title></rect>
-<rect x="184" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 2</title></rect>
-<rect x="192" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 2</title></rect>
-<rect x="200" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 2</title></rect>
-<rect x="208" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 2</title></rect>
-<rect x="216" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 2</title></rect>
-<rect x="224" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 2</title></rect>
-<rect x="232" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 2</title></rect>
-<rect x="240" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 2</title></rect>
-<rect x="248" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 2</title></rect>
-<rect x="256" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 2</title></rect>
-<rect x="264" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 2</title></rect>
-<rect x="272" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 2</title></rect>
-<rect x="176" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 2</title></rect>
-<rect x="184" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 2</title></rect>
-<rect x="192" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 2</title></rect>
-<rect x="200" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 2</title></rect>
-<rect x="208" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 2</title></rect>
-<rect x="216" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 2</title></rect>
-<rect x="224" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 2</title></rect>
-<rect x="232" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 2</title></rect>
-<rect x="240" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 2</title></rect>
-<rect x="248" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 2</title></rect>
-<rect x="256" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 2</title></rect>
-<rect x="264" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 2</title></rect>
-<rect x="272" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 2</title></rect>
-<rect x="176" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 2</title></rect>
-<rect x="184" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 2</title></rect>
-<rect x="192" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 2</title></rect>
-<rect x="200" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 2</title></rect>
-<rect x="208" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 2</title></rect>
-<rect x="216" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 2</title></rect>
-<rect x="224" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 2</title></rect>
-<rect x="232" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 2</title></rect>
-<rect x="240" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 2</title></rect>
-<rect x="248" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 2</title></rect>
-<rect x="256" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 2</title></rect>
-<rect x="264" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 2</title></rect>
-<rect x="272" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 2</title></rect>
-<rect x="296" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 3</title></rect>
-<rect x="304" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 3</title></rect>
-<rect x="312" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 3</title></rect>
-<rect x="320" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 3</title></rect>
-<rect x="328" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 3</title></rect>
-<rect x="336" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 3</title></rect>
-<rect x="344" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 3</title></rect>
-<rect x="352" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 3</title></rect>
-<rect x="360" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 3</title></rect>
-<rect x="368" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 3</title></rect>
-<rect x="376" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 3</title></rect>
-<rect x="384" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 3</title></rect>
-<rect x="392" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 3</title></rect>
-<rect x="296" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 3</title></rect>
-<rect x="304" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 3</title></rect>
-<rect x="312" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 3</title></rect>
-<rect x="320" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 3</title></rect>
-<rect x="328" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 3</title></rect>
-<rect x="336" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 3</title></rect>
-<rect x="344" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 3</title></rect>
-<rect x="352" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 3</title></rect>
-<rect x="360" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 3</title></rect>
-<rect x="368" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 3</title></rect>
-<rect x="376" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 3</title></rect>
-<rect x="384" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 3</title></rect>
-<rect x="392" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 3</title></rect>
-<rect x="296" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 3</title></rect>
-<rect x="304" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 3</title></rect>
-<rect x="312" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 3</title></rect>
-<rect x="320" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 3</title></rect>
-<rect x="328" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 3</title></rect>
-<rect x="336" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 3</title></rect>
-<rect x="344" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 3</title></rect>
-<rect x="352" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 3</title></rect>
-<rect x="360" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 3</title></rect>
-<rect x="368" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 3</title></rect>
-<rect x="376" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 3</title></rect>
-<rect x="384" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 3</title></rect>
-<rect x="392" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 3</title></rect>
-<rect x="296" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 3</title></rect>
-<rect x="304" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 3</title></rect>
-<rect x="312" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 3</title></rect>
-<rect x="320" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 3</title></rect>
-<rect x="328" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 3</title></rect>
-<rect x="336" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 3</title></rect>
-<rect x="344" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 3</title></rect>
-<rect x="352" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 3</title></rect>
-<rect x="360" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 3</title></rect>
-<rect x="368" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 3</title></rect>
-<rect x="376" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 3</title></rect>
-<rect x="384" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 3</title></rect>
-<rect x="392" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 3</title></rect>
-<rect x="176" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 4</title></rect>
-<rect x="184" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 4</title></rect>
-<rect x="192" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 4</title></rect>
-<rect x="200" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 4</title></rect>
-<rect x="208" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 4</title></rect>
-<rect x="216" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 4</title></rect>
-<rect x="224" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 4</title></rect>
-<rect x="232" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 4</title></rect>
-<rect x="240" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 4</title></rect>
-<rect x="248" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 4</title></rect>
-<rect x="256" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 4</title></rect>
-<rect x="264" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 4</title></rect>
-<rect x="272" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 4</title></rect>
-<rect x="176" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 4</title></rect>
-<rect x="184" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 4</title></rect>
-<rect x="192" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 4</title></rect>
-<rect x="200" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 4</title></rect>
-<rect x="208" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 4</title></rect>
-<rect x="216" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 4</title></rect>
-<rect x="224" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 4</title></rect>
-<rect x="232" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 4</title></rect>
-<rect x="240" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 4</title></rect>
-<rect x="248" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 4</title></rect>
-<rect x="256" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 4</title></rect>
-<rect x="264" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 4</title></rect>
-<rect x="272" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 4</title></rect>
-<rect x="176" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 4</title></rect>
-<rect x="184" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 4</title></rect>
-<rect x="192" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 4</title></rect>
-<rect x="200" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 4</title></rect>
-<rect x="208" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 4</title></rect>
-<rect x="216" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 4</title></rect>
-<rect x="224" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 4</title></rect>
-<rect x="232" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 4</title></rect>
-<rect x="240" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 4</title></rect>
-<rect x="248" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 4</title></rect>
-<rect x="256" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 4</title></rect>
-<rect x="264" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 4</title></rect>
-<rect x="272" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 4</title></rect>
-<rect x="176" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 4</title></rect>
-<rect x="184" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 4</title></rect>
-<rect x="192" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 4</title></rect>
-<rect x="200" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 4</title></rect>
-<rect x="208" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 4</title></rect>
-<rect x="216" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 4</title></rect>
-<rect x="224" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 4</title></rect>
-<rect x="232" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 4</title></rect>
-<rect x="240" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 4</title></rect>
-<rect x="248" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 4</title></rect>
-<rect x="256" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 4</title></rect>
-<rect x="264" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 4</title></rect>
-<rect x="272" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 4</title></rect>
-<rect x="296" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 5</title></rect>
-<rect x="304" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 5</title></rect>
-<rect x="312" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 5</title></rect>
-<rect x="320" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 5</title></rect>
-<rect x="328" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 5</title></rect>
-<rect x="336" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 5</title></rect>
-<rect x="344" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 5</title></rect>
-<rect x="352" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 5</title></rect>
-<rect x="360" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 5</title></rect>
-<rect x="368" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 5</title></rect>
-<rect x="376" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 5</title></rect>
-<rect x="384" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 5</title></rect>
-<rect x="392" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 5</title></rect>
-<rect x="296" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 5</title></rect>
-<rect x="304" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 5</title></rect>
-<rect x="312" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 5</title></rect>
-<rect x="320" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 5</title></rect>
-<rect x="328" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 5</title></rect>
-<rect x="336" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 5</title></rect>
-<rect x="344" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 5</title></rect>
-<rect x="352" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 5</title></rect>
-<rect x="360" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 5</title></rect>
-<rect x="368" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 5</title></rect>
-<rect x="376" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 5</title></rect>
-<rect x="384" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 5</title></rect>
-<rect x="392" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 5</title></rect>
-<rect x="296" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 5</title></rect>
-<rect x="304" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 5</title></rect>
-<rect x="312" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 5</title></rect>
-<rect x="320" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 5</title></rect>
-<rect x="328" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 5</title></rect>
-<rect x="336" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 5</title></rect>
-<rect x="344" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 5</title></rect>
-<rect x="352" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 5</title></rect>
-<rect x="360" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 5</title></rect>
-<rect x="368" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 5</title></rect>
-<rect x="376" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 5</title></rect>
-<rect x="384" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 5</title></rect>
-<rect x="392" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 5</title></rect>
-<rect x="296" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 5</title></rect>
-<rect x="304" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 5</title></rect>
-<rect x="312" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 5</title></rect>
-<rect x="320" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 5</title></rect>
-<rect x="328" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 5</title></rect>
-<rect x="336" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 5</title></rect>
-<rect x="344" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 5</title></rect>
-<rect x="352" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 5</title></rect>
-<rect x="360" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 5</title></rect>
-<rect x="368" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 5</title></rect>
-<rect x="376" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 5</title></rect>
-<rect x="384" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 5</title></rect>
-<rect x="392" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 5</title></rect>
-<rect x="176" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 6</title></rect>
-<rect x="184" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 6</title></rect>
-<rect x="192" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 6</title></rect>
-<rect x="200" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 6</title></rect>
-<rect x="208" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 6</title></rect>
-<rect x="216" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 6</title></rect>
-<rect x="224" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 6</title></rect>
-<rect x="232" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 6</title></rect>
-<rect x="240" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 6</title></rect>
-<rect x="248" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 6</title></rect>
-<rect x="256" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 6</title></rect>
-<rect x="264" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 6</title></rect>
-<rect x="272" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 6</title></rect>
-<rect x="176" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 6</title></rect>
-<rect x="184" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 6</title></rect>
-<rect x="192" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 6</title></rect>
-<rect x="200" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 6</title></rect>
-<rect x="208" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 6</title></rect>
-<rect x="216" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 6</title></rect>
-<rect x="224" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 6</title></rect>
-<rect x="232" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 6</title></rect>
-<rect x="240" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 6</title></rect>
-<rect x="248" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 6</title></rect>
-<rect x="256" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 6</title></rect>
-<rect x="264" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 6</title></rect>
-<rect x="272" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 6</title></rect>
-<rect x="176" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 6</title></rect>
-<rect x="184" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 6</title></rect>
-<rect x="192" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 6</title></rect>
-<rect x="200" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 6</title></rect>
-<rect x="208" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 6</title></rect>
-<rect x="216" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 6</title></rect>
-<rect x="224" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 6</title></rect>
-<rect x="232" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 6</title></rect>
-<rect x="240" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 6</title></rect>
-<rect x="248" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 6</title></rect>
-<rect x="256" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 6</title></rect>
-<rect x="264" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 6</title></rect>
-<rect x="272" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 6</title></rect>
-<rect x="176" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 6</title></rect>
-<rect x="184" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 6</title></rect>
-<rect x="192" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 6</title></rect>
-<rect x="200" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 6</title></rect>
-<rect x="208" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 6</title></rect>
-<rect x="216" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 6</title></rect>
-<rect x="224" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 6</title></rect>
-<rect x="232" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 6</title></rect>
-<rect x="240" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 6</title></rect>
-<rect x="248" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 6</title></rect>
-<rect x="256" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 6</title></rect>
-<rect x="264" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 6</title></rect>
-<rect x="272" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 6</title></rect>
-<rect x="296" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 7</title></rect>
-<rect x="304" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 7</title></rect>
-<rect x="312" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 7</title></rect>
-<rect x="320" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 7</title></rect>
-<rect x="328" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 7</title></rect>
-<rect x="336" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 7</title></rect>
-<rect x="344" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 7</title></rect>
-<rect x="352" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 7</title></rect>
-<rect x="360" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 7</title></rect>
-<rect x="368" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 7</title></rect>
-<rect x="376" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 7</title></rect>
-<rect x="384" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 7</title></rect>
-<rect x="392" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 7</title></rect>
-<rect x="296" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 7</title></rect>
-<rect x="304" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 7</title></rect>
-<rect x="312" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 7</title></rect>
-<rect x="320" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 7</title></rect>
-<rect x="328" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 7</title></rect>
-<rect x="336" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 7</title></rect>
-<rect x="344" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 7</title></rect>
-<rect x="352" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 7</title></rect>
-<rect x="360" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 7</title></rect>
-<rect x="368" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 7</title></rect>
-<rect x="376" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 7</title></rect>
-<rect x="384" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 7</title></rect>
-<rect x="392" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 7</title></rect>
-<rect x="296" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 7</title></rect>
-<rect x="304" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 7</title></rect>
-<rect x="312" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 7</title></rect>
-<rect x="320" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 7</title></rect>
-<rect x="328" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 7</title></rect>
-<rect x="336" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 7</title></rect>
-<rect x="344" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 7</title></rect>
-<rect x="352" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 7</title></rect>
-<rect x="360" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 7</title></rect>
-<rect x="368" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 7</title></rect>
-<rect x="376" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 7</title></rect>
-<rect x="384" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 7</title></rect>
-<rect x="392" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 7</title></rect>
-<rect x="296" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 7</title></rect>
-<rect x="304" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 7</title></rect>
-<rect x="312" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 7</title></rect>
-<rect x="320" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 7</title></rect>
-<rect x="328" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 7</title></rect>
-<rect x="336" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 7</title></rect>
-<rect x="344" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 7</title></rect>
-<rect x="352" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 7</title></rect>
-<rect x="360" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 7</title></rect>
-<rect x="368" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 7</title></rect>
-<rect x="376" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 7</title></rect>
-<rect x="384" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 7</title></rect>
-<rect x="392" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 7</title></rect>
-<text x="66" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Gateways</text>
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- Unit: 0
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 1
- Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
- Unit: 2
- Entry Bit Width: 44
- Depth: 4</title></rect>
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- Entry Bit Width: 11
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- Entry Bit Width: 11
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- Row: 2 Unit: 1
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- Entry Bit Width: 11
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- Entry Bit Width: 11
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- Unit Number: 15
- Entry Bit Width: 11
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- Entry Bit Width: 11
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- Row: 3 Unit: 1
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- Entry Bit Width: 11
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- Row: 3 Unit: 2
- Unit Number: 20
- Entry Bit Width: 11
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- Row: 3 Unit: 3
- Unit Number: 21
- Entry Bit Width: 11
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- Row: 3 Unit: 4
- Unit Number: 22
- Entry Bit Width: 11
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- Row: 3 Unit: 5
- Unit Number: 23
- Entry Bit Width: 11
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- Row: 4 Unit: 0
- Unit Number: 24
- Entry Bit Width: 11
- Depth: 1024</title></rect>
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- Row: 4 Unit: 1
- Unit Number: 25
- Entry Bit Width: 11
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- Row: 4 Unit: 2
- Unit Number: 26
- Entry Bit Width: 11
- Depth: 1024</title></rect>
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- Row: 4 Unit: 3
- Unit Number: 27
- Entry Bit Width: 11
- Depth: 1024</title></rect>
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- Row: 4 Unit: 4
- Unit Number: 28
- Entry Bit Width: 11
- Depth: 1024</title></rect>
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- Row: 4 Unit: 5
- Unit Number: 29
- Entry Bit Width: 11
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- Number: 10</title></rect>
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- Number: 16</title></rect>
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- Number: 21</title></rect>
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- Number: 22</title></rect>
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- Number: 23</title></rect>
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- Number: 24</title></rect>
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- Number: 25</title></rect>
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- Number: 26</title></rect>
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- Number: 27</title></rect>
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- Number: 28</title></rect>
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- Number: 29</title></rect>
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- Number: 30</title></rect>
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- Number: 31</title></rect>
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- Byte Number: 0
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- Byte Number: 1
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- Byte Number: 2
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- Byte Number: 3
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- Byte Number: 4
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- Byte Number: 5
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- Byte Number: 6
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- Byte Number: 7
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- Byte Number: 8
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- Byte Number: 9
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- Byte Number: 10
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- Byte Number: 11
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- Byte Number: 12
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- Byte Number: 13
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- Byte Number: 14
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- Byte Number: 15
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- Byte Number: 16
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- Byte Number: 17
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- Byte Number: 18
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- Byte Number: 19
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- Byte Number: 20
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- Byte Number: 21
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- Byte Number: 22
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- Byte Number: 23
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- Byte Number: 24
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- Byte Number: 25
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- Byte Number: 26
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- Byte Number: 27
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- Byte Number: 28
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- Byte Number: 29
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- Byte Number: 30
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- Byte Number: 31
-</title></rect>
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- Byte Number: 32
-</title></rect>
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- Byte Number: 33
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- Byte Number: 34
-</title></rect>
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- Byte Number: 35
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- Byte Number: 36
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- Byte Number: 37
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- Byte Number: 38
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- Byte Number: 39
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- Byte Number: 40
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- Byte Number: 41
-</title></rect>
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- Byte Number: 42
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- Byte Number: 43
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- Byte Number: 44
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- Byte Number: 45
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- Byte Number: 46
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- Byte Number: 47
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- Byte Number: 48
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- Byte Number: 49
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- Byte Number: 50
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- Byte Number: 51
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- Byte Number: 52
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- Byte Number: 53
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- Byte Number: 54
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- Byte Number: 55
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- Byte Number: 56
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- Byte Number: 57
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- Byte Number: 58
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- Byte Number: 59
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- Byte Number: 60
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- Byte Number: 61
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- Byte Number: 62
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- Byte Number: 63
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- Byte Number: 64
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- Byte Number: 65
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- Byte Number: 66
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- Byte Number: 67
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- Byte Number: 68
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- Byte Number: 69
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- Byte Number: 70
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- Byte Number: 71
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- Byte Number: 72
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- Byte Number: 73
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- Byte Number: 74
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- Byte Number: 75
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- Byte Number: 76
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- Byte Number: 77
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- Byte Number: 78
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- Byte Number: 79
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- Byte Number: 80
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- Byte Number: 81
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- Byte Number: 82
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- Byte Number: 83
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- Byte Number: 84
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- Byte Number: 85
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- Byte Number: 86
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- Byte Number: 87
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- Byte Number: 88
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- Byte Number: 89
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- Byte Number: 90
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- Byte Number: 91
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- Byte Number: 92
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- Byte Number: 93
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- Byte Number: 94
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- Byte Number: 95
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- Byte Number: 96
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- Byte Number: 97
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- Byte Number: 98
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- Byte Number: 99
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- Byte Number: 100
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- Byte Number: 101
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- Byte Number: 102
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- Byte Number: 103
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- Byte Number: 104
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- Byte Number: 105
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- Byte Number: 106
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- Byte Number: 107
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- Byte Number: 108
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- Byte Number: 109
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- Byte Number: 110
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- Byte Number: 111
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- Byte Number: 112
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- Byte Number: 113
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- Byte Number: 114
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- Byte Number: 115
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- Byte Number: 116
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- Byte Number: 117
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- Byte Number: 118
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- Byte Number: 119
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- Byte Number: 120
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- Byte Number: 121
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- Byte Number: 122
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- Byte Number: 123
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- Byte Number: 124
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- Byte Number: 125
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- Byte Number: 126
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- Byte Number: 127
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- ID: 0
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- Occupied By: ingress_pkt</title></rect>
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- ID: 1
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- Occupied By: egress_pkt</title></rect>
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- ID: 2
-</title></rect>
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- ID: 3
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-<rect x="216" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 4
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-<rect x="224" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 5
-</title></rect>
-<rect x="232" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 6
-</title></rect>
-<rect x="240" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 7
-</title></rect>
-<rect x="248" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 8
-</title></rect>
-<rect x="256" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 9
-</title></rect>
-<rect x="264" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 10
-</title></rect>
-<rect x="272" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 11
-</title></rect>
-<rect x="280" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 12
-</title></rect>
-<rect x="288" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 13
-</title></rect>
-<rect x="296" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 14
-</title></rect>
-<rect x="304" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
- ID: 15
-</title></rect>
-<text x="562" y="22" textLength="94" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">PHV Container Activity</text>
-<rect x="560" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 0</title></rect>
-<rect x="568" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 1</title></rect>
-<rect x="576" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 2</title></rect>
-<rect x="584" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 3</title></rect>
-<rect x="560" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 4</title></rect>
-<rect x="568" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 5</title></rect>
-<rect x="576" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 6</title></rect>
-<rect x="584" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 7</title></rect>
-<rect x="560" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 8</title></rect>
-<rect x="568" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 9</title></rect>
-<rect x="576" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 10</title></rect>
-<rect x="584" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 11</title></rect>
-<rect x="560" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 12</title></rect>
-<rect x="568" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 13</title></rect>
-<rect x="576" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 14</title></rect>
-<rect x="584" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 15</title></rect>
-<rect x="560" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 16</title></rect>
-<rect x="568" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 17</title></rect>
-<rect x="576" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 18</title></rect>
-<rect x="584" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 19</title></rect>
-<rect x="560" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 20</title></rect>
-<rect x="568" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 21</title></rect>
-<rect x="576" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 22</title></rect>
-<rect x="584" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 23</title></rect>
-<rect x="560" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 24</title></rect>
-<rect x="568" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 25</title></rect>
-<rect x="576" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 26</title></rect>
-<rect x="584" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 27</title></rect>
-<rect x="560" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 28</title></rect>
-<rect x="568" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 29</title></rect>
-<rect x="576" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 30</title></rect>
-<rect x="584" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 31</title></rect>
-<rect x="560" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 32</title></rect>
-<rect x="568" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 33</title></rect>
-<rect x="576" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 34</title></rect>
-<rect x="584" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 35</title></rect>
-<rect x="560" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 36</title></rect>
-<rect x="568" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 37</title></rect>
-<rect x="576" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 38</title></rect>
-<rect x="584" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 39</title></rect>
-<rect x="560" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 40</title></rect>
-<rect x="568" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 41</title></rect>
-<rect x="576" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 42</title></rect>
-<rect x="584" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 43</title></rect>
-<rect x="560" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 44</title></rect>
-<rect x="568" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 45</title></rect>
-<rect x="576" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 46</title></rect>
-<rect x="584" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 47</title></rect>
-<rect x="560" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 48</title></rect>
-<rect x="568" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 49</title></rect>
-<rect x="576" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 50</title></rect>
-<rect x="584" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 51</title></rect>
-<rect x="560" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 52</title></rect>
-<rect x="568" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 53</title></rect>
-<rect x="576" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 54</title></rect>
-<rect x="584" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 55</title></rect>
-<rect x="560" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 56</title></rect>
-<rect x="568" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 57</title></rect>
-<rect x="576" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 58</title></rect>
-<rect x="584" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 59</title></rect>
-<rect x="560" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 60</title></rect>
-<rect x="568" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 61</title></rect>
-<rect x="576" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 62</title></rect>
-<rect x="584" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
- Unit: 63</title></rect>
-<rect x="600" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 0</title></rect>
-<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 1</title></rect>
-<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>16-bit ALU:
- Unit: 2
- Occupied By:
-For Match Table ingress_pkt's action _packet_out:
- deposit-field Instruction at PHV Container Number: 130 has bit width 23
-</title></rect>
-<rect x="624" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 3</title></rect>
-<rect x="600" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 4</title></rect>
-<rect x="608" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 5</title></rect>
-<rect x="616" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 6</title></rect>
-<rect x="624" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 7</title></rect>
-<rect x="600" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 8</title></rect>
-<rect x="608" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 9</title></rect>
-<rect x="616" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 10</title></rect>
-<rect x="624" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 11</title></rect>
-<rect x="600" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 12</title></rect>
-<rect x="608" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 13</title></rect>
-<rect x="616" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 14</title></rect>
-<rect x="624" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 15</title></rect>
-<rect x="600" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 16</title></rect>
-<rect x="608" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>16-bit ALU:
- Unit: 17
- Occupied By:
-For Match Table egress_pkt's action add_packet_in_hdr:
- deposit-field Instruction at PHV Container Number: 145 has bit width 23
-</title></rect>
-<rect x="616" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 18</title></rect>
-<rect x="624" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 19</title></rect>
-<rect x="600" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 20</title></rect>
-<rect x="608" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 21</title></rect>
-<rect x="616" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 22</title></rect>
-<rect x="624" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 23</title></rect>
-<rect x="600" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 24</title></rect>
-<rect x="608" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 25</title></rect>
-<rect x="616" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 26</title></rect>
-<rect x="624" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 27</title></rect>
-<rect x="600" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 28</title></rect>
-<rect x="608" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 29</title></rect>
-<rect x="616" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 30</title></rect>
-<rect x="624" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 31</title></rect>
-<rect x="600" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 32</title></rect>
-<rect x="608" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 33</title></rect>
-<rect x="616" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 34</title></rect>
-<rect x="624" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 35</title></rect>
-<rect x="600" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 36</title></rect>
-<rect x="608" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 37</title></rect>
-<rect x="616" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 38</title></rect>
-<rect x="624" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 39</title></rect>
-<rect x="600" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 40</title></rect>
-<rect x="608" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 41</title></rect>
-<rect x="616" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 42</title></rect>
-<rect x="624" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 43</title></rect>
-<rect x="600" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 44</title></rect>
-<rect x="608" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 45</title></rect>
-<rect x="616" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 46</title></rect>
-<rect x="624" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 47</title></rect>
-<rect x="600" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 48</title></rect>
-<rect x="608" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 49</title></rect>
-<rect x="616" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 50</title></rect>
-<rect x="624" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 51</title></rect>
-<rect x="600" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 52</title></rect>
-<rect x="608" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 53</title></rect>
-<rect x="616" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 54</title></rect>
-<rect x="624" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 55</title></rect>
-<rect x="600" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 56</title></rect>
-<rect x="608" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 57</title></rect>
-<rect x="616" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 58</title></rect>
-<rect x="624" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 59</title></rect>
-<rect x="600" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 60</title></rect>
-<rect x="608" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 61</title></rect>
-<rect x="616" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 62</title></rect>
-<rect x="624" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 63</title></rect>
-<rect x="600" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 64</title></rect>
-<rect x="608" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 65</title></rect>
-<rect x="616" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 66</title></rect>
-<rect x="624" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 67</title></rect>
-<rect x="600" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 68</title></rect>
-<rect x="608" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 69</title></rect>
-<rect x="616" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 70</title></rect>
-<rect x="624" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 71</title></rect>
-<rect x="600" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 72</title></rect>
-<rect x="608" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 73</title></rect>
-<rect x="616" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 74</title></rect>
-<rect x="624" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 75</title></rect>
-<rect x="600" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 76</title></rect>
-<rect x="608" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 77</title></rect>
-<rect x="616" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 78</title></rect>
-<rect x="624" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 79</title></rect>
-<rect x="600" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 80</title></rect>
-<rect x="608" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 81</title></rect>
-<rect x="616" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 82</title></rect>
-<rect x="624" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 83</title></rect>
-<rect x="600" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 84</title></rect>
-<rect x="608" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 85</title></rect>
-<rect x="616" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 86</title></rect>
-<rect x="624" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 87</title></rect>
-<rect x="600" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 88</title></rect>
-<rect x="608" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 89</title></rect>
-<rect x="616" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 90</title></rect>
-<rect x="624" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 91</title></rect>
-<rect x="600" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 92</title></rect>
-<rect x="608" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 93</title></rect>
-<rect x="616" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 94</title></rect>
-<rect x="624" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 95</title></rect>
-<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 0</title></rect>
-<rect x="648" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 1</title></rect>
-<rect x="656" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 2</title></rect>
-<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 3</title></rect>
-<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>8-bit ALU:
- Unit: 4
- Occupied By:
-For Match Table ingress_pkt's action _packet_out:
- deposit-field Instruction at PHV Container Number: 68 has bit width 20
-</title></rect>
-<rect x="648" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 5</title></rect>
-<rect x="656" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 6</title></rect>
-<rect x="664" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 7</title></rect>
-<rect x="640" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 8</title></rect>
-<rect x="648" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 9</title></rect>
-<rect x="656" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 10</title></rect>
-<rect x="664" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 11</title></rect>
-<rect x="640" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 12</title></rect>
-<rect x="648" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 13</title></rect>
-<rect x="656" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 14</title></rect>
-<rect x="664" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 15</title></rect>
-<rect x="640" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 16</title></rect>
-<rect x="648" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 17</title></rect>
-<rect x="656" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>8-bit ALU:
- Unit: 18
- Occupied By:
-For Match Table egress_pkt's action add_packet_in_hdr:
- deposit-field Instruction at PHV Container Number: 82 has bit width 20
-</title></rect>
-<rect x="664" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 19</title></rect>
-<rect x="640" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 20</title></rect>
-<rect x="648" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 21</title></rect>
-<rect x="656" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 22</title></rect>
-<rect x="664" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 23</title></rect>
-<rect x="640" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 24</title></rect>
-<rect x="648" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 25</title></rect>
-<rect x="656" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 26</title></rect>
-<rect x="664" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 27</title></rect>
-<rect x="640" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 28</title></rect>
-<rect x="648" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 29</title></rect>
-<rect x="656" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 30</title></rect>
-<rect x="664" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 31</title></rect>
-<rect x="640" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 32</title></rect>
-<rect x="648" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 33</title></rect>
-<rect x="656" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 34</title></rect>
-<rect x="664" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 35</title></rect>
-<rect x="640" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 36</title></rect>
-<rect x="648" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 37</title></rect>
-<rect x="656" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 38</title></rect>
-<rect x="664" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 39</title></rect>
-<rect x="640" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 40</title></rect>
-<rect x="648" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 41</title></rect>
-<rect x="656" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 42</title></rect>
-<rect x="664" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 43</title></rect>
-<rect x="640" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 44</title></rect>
-<rect x="648" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 45</title></rect>
-<rect x="656" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 46</title></rect>
-<rect x="664" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 47</title></rect>
-<rect x="640" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 48</title></rect>
-<rect x="648" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 49</title></rect>
-<rect x="656" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 50</title></rect>
-<rect x="664" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 51</title></rect>
-<rect x="640" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 52</title></rect>
-<rect x="648" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 53</title></rect>
-<rect x="656" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 54</title></rect>
-<rect x="664" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 55</title></rect>
-<rect x="640" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 56</title></rect>
-<rect x="648" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 57</title></rect>
-<rect x="656" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 58</title></rect>
-<rect x="664" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 59</title></rect>
-<rect x="640" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 60</title></rect>
-<rect x="648" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 61</title></rect>
-<rect x="656" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 62</title></rect>
-<rect x="664" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 63</title></rect>
-<text x="570" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
-<text x="738" y="78" style="fill:black; font-weight:bold;">Ingress Tables</text>
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-<text x="738" y="102" style="fill:black;">ingress_pkt</text>
-<text x="738" y="126" style="fill:black; font-weight:bold;">Egress Tables</text>
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-<text x="738" y="150" style="fill:black;">egress_pkt</text>
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-
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-<line x1="720" y1="184" x2="736" y2="168" style="stroke:black; stroke-width:2" />
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-<text x="986" y="78" style="fill:black;">Exact Match Input xbar</text>
-<text x="994" y="102" style="fill:black;"> 2 of 128 (1.56%)</text>
-<text x="986" y="126" style="fill:black;">Ternary Match Input xbar</text>
-<text x="994" y="150" style="fill:black;"> 0 of 66 (0.00%)</text>
-<text x="986" y="174" style="fill:black;">Hash Bit</text>
-<text x="994" y="198" style="fill:black;"> 2 of 416 (0.48%)</text>
-<text x="986" y="222" style="fill:black;">Hash Dist Unit</text>
-<text x="994" y="246" style="fill:black;"> 0 of 6 (0.00%)</text>
-<text x="986" y="270" style="fill:black;">Gateway</text>
-<text x="994" y="294" style="fill:black;"> 2 of 16 (12.50%)</text>
-<text x="986" y="318" style="fill:black;">SRAM</text>
-<text x="994" y="342" style="fill:black;"> 0 of 80 (0.00%)</text>
-<text x="986" y="366" style="fill:black;">Map RAM</text>
-<text x="994" y="390" style="fill:black;"> 0 of 48 (0.00%)</text>
-<text x="986" y="414" style="fill:black;">TCAM</text>
-<text x="994" y="438" style="fill:black;"> 0 of 24 (0.00%)</text>
-<text x="986" y="462" style="fill:black;">VLIW Instr</text>
-<text x="994" y="486" style="fill:black;"> 1 of 32 (3.12%)</text>
-<text x="986" y="510" style="fill:black;">Meter ALU</text>
-<text x="994" y="534" style="fill:black;"> 0 of 4 (0.00%)</text>
-<text x="986" y="558" style="fill:black;">Stats ALU</text>
-<text x="994" y="582" style="fill:black;"> 0 of 4 (0.00%)</text>
-<text x="986" y="606" style="fill:black;">Stash</text>
-<text x="994" y="630" style="fill:black;"> 0 of 16 (0.00%)</text>
-<text x="986" y="654" style="fill:black;">Action Data Bus Bytes</text>
-<text x="994" y="678" style="fill:black;"> 0 of 128 (0.00%)</text>
-<text x="986" y="702" style="fill:black;">Logical TableID</text>
-<text x="994" y="726" style="fill:black;"> 2 of 16 (12.50%)</text>
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-</svg><br>
-
-<h2>MAU Stage 1</h2>
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{udp.dstPort[7:0]} for table table0__action__
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{udp.dstPort[15:8]} for table table0__action__
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contains:
{udp.srcPort[7:0]} for table table0__action__
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{udp.srcPort[15:8]} for table table0__action__
</title></rect>
-<rect x="24" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 4 in exact Group 0 (parity group 0)
+<rect x="24" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 4 in exact Group 0 (parity group 0)
contains:
{ipv4.dstAddr[7:0]} for table table0__action__
</title></rect>
-<rect x="24" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 5 in exact Group 0 (parity group 0)
+<rect x="24" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 5 in exact Group 0 (parity group 0)
contains:
{ipv4.dstAddr[15:8]} for table table0__action__
</title></rect>
-<rect x="24" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 6 in exact Group 0 (parity group 0)
+<rect x="24" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 6 in exact Group 0 (parity group 0)
contains:
{ipv4.dstAddr[23:16]} for table table0__action__
</title></rect>
-<rect x="24" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 7 in exact Group 0 (parity group 0)
+<rect x="24" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 7 in exact Group 0 (parity group 0)
contains:
{ipv4.dstAddr[31:24]} for table table0__action__
</title></rect>
-<rect x="40" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 8 in exact Group 0 (parity group 1)
+<rect x="40" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 8 in exact Group 0 (parity group 1)
contains:
{ipv4.srcAddr[31:24]} for table table0__action__
</title></rect>
-<rect x="40" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 9 in exact Group 0 (parity group 1)
+<rect x="40" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 9 in exact Group 0 (parity group 1)
contains:
{ipv4.srcAddr[15:8]} for table table0__action__
</title></rect>
-<rect x="40" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 10 in exact Group 0 (parity group 1)
+<rect x="40" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 10 in exact Group 0 (parity group 1)
contains:
{ipv4.srcAddr[7:0]} for table table0__action__
</title></rect>
-<rect x="40" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Crossbar Byte 11 in exact Group 0 (parity group 1)
+<rect x="40" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Crossbar Byte 11 in exact Group 0 (parity group 1)
contains:
{ipv4.srcAddr[23:16]} for table table0__action__
</title></rect>
-<rect x="48" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 12 in exact Group 0 (parity group 1)
+<rect x="48" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 12 in exact Group 0 (parity group 1)
contains:
- {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]} for table _condition_1
+ {unused[5:0], --validity_check--packet_out_hdr[0:0], unused[0:0]} for table _condition_0
</title></rect>
<rect x="48" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 13 in exact Group 0 (parity group 1)</title></rect>
<rect x="48" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 14 in exact Group 0 (parity group 1)</title></rect>
@@ -3408,68 +783,68 @@
<rect x="48" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 125 in exact Group 7 (parity group 15)</title></rect>
<rect x="48" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 126 in exact Group 7 (parity group 15)</title></rect>
<rect x="48" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 127 in exact Group 7 (parity group 15)</title></rect>
-<rect x="16" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 128 in ternary Group 0
+<rect x="16" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 128 in ternary Group 0
contains:
{ethernet.srcAddr[7:0]} for table table0
</title></rect>
-<rect x="16" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 129 in ternary Group 0
+<rect x="16" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 129 in ternary Group 0
contains:
{ethernet.srcAddr[15:8]} for table table0
</title></rect>
-<rect x="24" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 130 in ternary Group 0
+<rect x="24" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 130 in ternary Group 0
contains:
{ethernet.srcAddr[23:16]} for table table0
</title></rect>
-<rect x="24" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 131 in ternary Group 0
+<rect x="24" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 131 in ternary Group 0
contains:
{ethernet.srcAddr[31:24]} for table table0
</title></rect>
-<rect x="32" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 132 in ternary Group 0
+<rect x="32" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 132 in ternary Group 0
contains:
{ethernet.dstAddr[15:8]} for table table0
</title></rect>
-<rect x="48" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 133 in ternary Group 0
+<rect x="48" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 133 in ternary Group 0
contains:
version/valid
{unused[6:0], ig_intr_md.ingress_port[8:8]} for table table0
</title></rect>
-<rect x="16" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 134 in ternary Group 1
+<rect x="16" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 134 in ternary Group 1
contains:
{ethernet.dstAddr[31:24]} for table table0
</title></rect>
-<rect x="16" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 135 in ternary Group 1
+<rect x="16" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 135 in ternary Group 1
contains:
{ethernet.dstAddr[39:32]} for table table0
</title></rect>
-<rect x="24" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 136 in ternary Group 1
+<rect x="24" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 136 in ternary Group 1
contains:
{ethernet.etherType[7:0]} for table table0
</title></rect>
-<rect x="24" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 137 in ternary Group 1
+<rect x="24" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 137 in ternary Group 1
contains:
{ethernet.dstAddr[23:16]} for table table0
</title></rect>
-<rect x="32" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 138 in ternary Group 1
+<rect x="32" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 138 in ternary Group 1
contains:
{ethernet.srcAddr[47:40]} for table table0
</title></rect>
-<rect x="16" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 139 in ternary Group 2
+<rect x="16" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 139 in ternary Group 2
contains:
{ethernet.etherType[15:8]} for table table0
</title></rect>
-<rect x="16" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 140 in ternary Group 2
+<rect x="16" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 140 in ternary Group 2
contains:
{ig_intr_md.ingress_port[7:0]} for table table0
</title></rect>
-<rect x="24" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 141 in ternary Group 2
+<rect x="24" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 141 in ternary Group 2
contains:
{ethernet.dstAddr[7:0]} for table table0
</title></rect>
-<rect x="24" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 142 in ternary Group 2
+<rect x="24" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 142 in ternary Group 2
contains:
{ethernet.srcAddr[39:32]} for table table0
</title></rect>
-<rect x="32" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Crossbar Byte 143 in ternary Group 2
+<rect x="32" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Crossbar Byte 143 in ternary Group 2
contains:
{ethernet.dstAddr[47:40]} for table table0
</title></rect>
@@ -3525,7 +900,7 @@
<rect x="32" y="632" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 193 in ternary Group 11</title></rect>
<text x="146" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="14" heightAdjust="spacingAndGlyphs" style="fill:black;">SRAMs</text>
<text x="410" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="14" heightAdjust="spacingAndGlyphs" style="fill:black;">SRAMs</text>
-<rect x="144" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>SRAM:
+<rect x="144" y="200" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>SRAM:
Row: 0 Col: 2
Unit Number: 2
Entry Bit Width: 128
@@ -3736,7 +1111,7 @@
Unit Number: 66
Entry Bit Width: 128
Depth: 1024</title></rect>
-<rect x="360" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:burlywood""><title>SRAM:
+<rect x="360" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>SRAM:
Row: 6 Col: 6
Unit Number: 78
Entry Bit Width: 128
@@ -3799,7 +1174,7 @@
Unit Number: 67
Entry Bit Width: 128
Depth: 1024</title></rect>
-<rect x="384" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:burlywood""><title>SRAM:
+<rect x="384" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>SRAM:
Row: 6 Col: 7
Unit Number: 79
Entry Bit Width: 128
@@ -3862,7 +1237,7 @@
Unit Number: 68
Entry Bit Width: 128
Depth: 1024</title></rect>
-<rect x="408" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>SRAM:
+<rect x="408" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>SRAM:
Row: 6 Col: 8
Unit Number: 80
Entry Bit Width: 128
@@ -4140,7 +1515,7 @@
Entry Bit Width: 44
Result Bit width: 1
Depth: 512</title></rect>
-<rect x="120" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>TCAM:
+<rect x="120" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>TCAM:
Row: 9 Col: 1
Unit Number: 21
Entry Bit Width: 44
@@ -4153,7 +1528,7 @@
Entry bits [131:88]
Connected to buses:
Ram Data Bus TcamMatchSearch2 9 left_and_right is 44 bits</title></rect>
-<rect x="120" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>TCAM:
+<rect x="120" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>TCAM:
Row: 10 Col: 1
Unit Number: 22
Entry Bit Width: 44
@@ -4166,7 +1541,7 @@
Entry bits [87:44]
Connected to buses:
Ram Data Bus TcamMatchSearch2 10 left_and_right is 44 bits</title></rect>
-<rect x="120" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>TCAM:
+<rect x="120" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>TCAM:
Row: 11 Col: 1
Unit Number: 23
Entry Bit Width: 44
@@ -4180,7 +1555,7 @@
Connected to buses:
Ram Data Bus TcamMatchSearch2 11 left_and_right is 44 bits</title></rect>
<text x="82" y="254" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Distr.</text>
-<rect x="80" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Hash Distribution Group:
+<rect x="80" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Hash Distribution Group:
Hash ID: 0
Group ID: 0
@@ -4208,7 +1583,7 @@
Group ID: 2
</title></rect>
<text x="170" y="238" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Bits</text>
-<rect x="176" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Hash Bit 0 in hash match group 0
+<rect x="176" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Hash Bit 0 in hash match group 0
Occupied by: table0__action__ for Immediate</title></rect>
<rect x="184" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 0</title></rect>
<rect x="192" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 0</title></rect>
@@ -4249,8 +1624,8 @@
<rect x="264" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 0</title></rect>
<rect x="272" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 0</title></rect>
<rect x="176" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 0</title></rect>
-<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Hash Bit 40 in hash match group 0
-Occupied by: _condition_1 for ('--validity_check--packet_out_hdr', 0)</title></rect>
+<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Hash Bit 40 in hash match group 0
+Occupied by: _condition_0 for ('--validity_check--packet_out_hdr', 0)</title></rect>
<rect x="192" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 0</title></rect>
<rect x="200" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 0</title></rect>
<rect x="208" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 0</title></rect>
@@ -4683,15 +2058,16 @@
Unit: 13
Entry Bit Width: 44
Depth: 4</title></rect>
-<rect x="72" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+<rect x="72" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Gateway Table Gateway:
Unit: 14
Entry Bit Width: 44
- Depth: 4</title></rect>
-<rect x="72" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Gateway Table Gateway:
+ Depth: 4
+ Occupied By: process_packet_out_table_always_true_condition</title></rect>
+<rect x="72" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Gateway Table Gateway:
Unit: 15
Entry Bit Width: 44
Depth: 4
- Occupied By: _condition_1</title></rect>
+ Occupied By: _condition_0</title></rect>
<text x="242" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Stashes</text>
<rect x="248" y="208" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
Row: 0
@@ -4954,7 +2330,7 @@
Unit Number: 35
Entry Bit Width: 11
Depth: 1024</title></rect>
-<rect x="280" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:burlywood""><title>Map RAM:
+<rect x="280" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Map RAM:
Row: 6 Unit: 0
Unit Number: 36
Entry Bit Width: 11
@@ -4962,7 +2338,7 @@
Occupied By: table0_counter
Used For: synthetic two port
</title></rect>
-<rect x="288" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:burlywood""><title>Map RAM:
+<rect x="288" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Map RAM:
Row: 6 Unit: 1
Unit Number: 37
Entry Bit Width: 11
@@ -4990,7 +2366,7 @@
Unit Number: 41
Entry Bit Width: 11
Depth: 1024</title></rect>
-<rect x="280" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Map RAM:
+<rect x="280" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Map RAM:
Row: 7 Unit: 0
Unit Number: 42
Entry Bit Width: 11
@@ -5032,7 +2408,7 @@
Unit: 2 right</title></rect>
<rect x="336" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
Unit: 4 right</title></rect>
-<rect x="336" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:burlywood""><title>128-bit Statistics ALU:
+<rect x="336" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>128-bit Statistics ALU:
Unit: 6 right
Occupied By: table0_counter</title></rect>
<rect x="336" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
@@ -5044,26 +2420,31 @@
<rect x="336" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
Unit: 7 right</title></rect>
<text x="514" y="222" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">VLIW</text>
-<rect x="512" y="232" width="32" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>VLIW Instruction:
+<rect x="512" y="232" width="32" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>VLIW Instruction:
Number: 0
Occupied By: Match Table table0's action set_egress_port
with color 1 and direction ingress
</title></rect>
-<rect x="512" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>VLIW Instruction:
+<rect x="512" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>VLIW Instruction:
Number: 1
Occupied By: Match Table table0's action ecmp_group
with color 0 and direction ingress
</title></rect>
-<rect x="528" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>VLIW Instruction:
+<rect x="528" y="240" width="16" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>VLIW Instruction:
Number: 1
Occupied By: Match Table table0's action send_to_cpu
with color 1 and direction ingress
</title></rect>
-<rect x="512" y="248" width="32" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>VLIW Instruction:
+<rect x="512" y="248" width="16" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>VLIW Instruction:
Number: 2
Occupied By: Match Table table0's action _drop
with color 0 and direction ingress
</title></rect>
+<rect x="528" y="248" width="16" height="8" style="stroke:black; stroke-width:1; fill:burlywood""><title>VLIW Instruction:
+ Number: 2
+ Occupied By: Match Table process_packet_out_table's action _process_packet_out
+ with color 1 and direction ingress
+</title></rect>
<rect x="512" y="256" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
Number: 3</title></rect>
<rect x="512" y="264" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
@@ -5219,35 +2600,35 @@
<rect x="304" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Action Parameter Bus Byte:
Byte Number: 31
</title></rect>
-<rect x="184" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="184" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 32
Occupied By: table0__action__</title></rect>
-<rect x="192" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="192" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 33
Occupied By: table0__action__</title></rect>
-<rect x="200" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="200" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 34
Occupied By: table0__action__</title></rect>
-<rect x="208" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="208" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 35
Occupied By: table0__action__</title></rect>
-<rect x="216" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="216" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 36
Occupied By: table0__action__</title></rect>
-<rect x="224" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="224" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 37
Occupied By: table0__action__</title></rect>
-<rect x="232" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="232" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 38
Occupied By: table0__action__</title></rect>
-<rect x="240" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:blueviolet""><title>Action Parameter Bus Byte:
+<rect x="240" y="504" width="8" height="8" style="stroke:black; stroke-width:1; fill:aquamarine""><title>Action Parameter Bus Byte:
Byte Number: 39
Occupied By: table0__action__</title></rect>
@@ -5516,13 +2897,14 @@
Byte Number: 127
</title></rect>
<text x="202" y="590" textLength="78" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Logical Table IDs</text>
-<rect x="184" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>Logical Table ID:
+<rect x="184" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>Logical Table ID:
ID: 0
Occupied By: table0</title></rect>
-<rect x="192" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+<rect x="192" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:burlywood""><title>Logical Table ID:
ID: 1
-</title></rect>
+
+ Occupied By: process_packet_out_table</title></rect>
<rect x="200" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
ID: 2
</title></rect>
@@ -5696,13 +3078,23 @@
Unit: 63</title></rect>
<rect x="600" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
Unit: 0</title></rect>
-<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
- Unit: 1</title></rect>
-<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>16-bit ALU:
+<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>16-bit ALU:
+ Unit: 1
+ Occupied By:
+For Match Table table0's action send_to_cpu:
+ deposit-field Instruction at PHV Container Number: 129 has bit width 23
+</title></rect>
+<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:burlywood""><title>16-bit ALU:
Unit: 2
Occupied By:
For Match Table table0's action set_egress_port:
deposit-field Instruction at PHV Container Number: 130 has bit width 23
+
+For Match Table table0's action send_to_cpu:
+ deposit-field Instruction at PHV Container Number: 130 has bit width 23
+
+For Match Table process_packet_out_table's action _process_packet_out:
+ deposit-field Instruction at PHV Container Number: 130 has bit width 23
</title></rect>
<rect x="624" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
Unit: 3</title></rect>
@@ -5710,13 +3102,13 @@
Unit: 4</title></rect>
<rect x="608" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
Unit: 5</title></rect>
-<rect x="616" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>16-bit ALU:
+<rect x="616" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>16-bit ALU:
Unit: 6
Occupied By:
For Match Table table0's action ecmp_group:
alu_a Instruction at PHV Container Number: 134 has bit width 23
</title></rect>
-<rect x="624" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>16-bit ALU:
+<rect x="624" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>16-bit ALU:
Unit: 7
Occupied By:
For Match Table table0's action ecmp_group:
@@ -5898,26 +3290,29 @@
Unit: 94</title></rect>
<rect x="624" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
Unit: 95</title></rect>
-<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>8-bit ALU:
- Unit: 0
- Occupied By:
-For Match Table table0's action send_to_cpu:
- deposit-field Instruction at PHV Container Number: 64 has bit width 20
-</title></rect>
+<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 0</title></rect>
<rect x="648" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
Unit: 1</title></rect>
<rect x="656" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
Unit: 2</title></rect>
-<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 3</title></rect>
-<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
- Unit: 4</title></rect>
-<rect x="648" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:yellow""><title>8-bit ALU:
- Unit: 5
+<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:burlywood""><title>8-bit ALU:
+ Unit: 3
+ Occupied By:
+For Match Table table0's action send_to_cpu:
+ deposit-field Instruction at PHV Container Number: 67 has bit width 20
+
+For Match Table process_packet_out_table's action _process_packet_out:
+ deposit-field Instruction at PHV Container Number: 67 has bit width 20
+</title></rect>
+<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:blue""><title>8-bit ALU:
+ Unit: 4
Occupied By:
For Match Table table0's action _drop:
- deposit-field Instruction at PHV Container Number: 69 has bit width 20
+ deposit-field Instruction at PHV Container Number: 68 has bit width 20
</title></rect>
+<rect x="648" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 5</title></rect>
<rect x="656" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
Unit: 6</title></rect>
<rect x="664" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
@@ -6038,12 +3433,13 @@
<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
-<text x="738" y="78" style="fill:black; font-weight:bold;">Ingress Tables</text>
-<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:yellow""><title>table0</title></rect>
+<rect x="720" y="64" width="16" height="16" style="stroke:black; stroke-width:1; fill:burlywood""><title>process_packet_out_table</title></rect>
+<text x="738" y="78" style="fill:black;">process_packet_out_table</text>
+<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:blue""><title>table0</title></rect>
<text x="738" y="102" style="fill:black;">table0</text>
-<rect x="720" y="112" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>table0__action__</title></rect>
+<rect x="720" y="112" width="16" height="16" style="stroke:black; stroke-width:1; fill:aquamarine""><title>table0__action__</title></rect>
<text x="738" y="126" style="fill:black;">table0__action__</text>
-<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:burlywood""><title>table0_counter</title></rect>
+<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:blueviolet""><title>table0_counter</title></rect>
<text x="738" y="150" style="fill:black;">table0_counter</text>
<rect x="720" y="168" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
@@ -6062,7 +3458,7 @@
<text x="986" y="222" style="fill:black;">Hash Dist Unit</text>
<text x="994" y="246" style="fill:black;"> 1 of 6 (16.67%)</text>
<text x="986" y="270" style="fill:black;">Gateway</text>
-<text x="994" y="294" style="fill:black;"> 1 of 16 (6.25%)</text>
+<text x="994" y="294" style="fill:black;"> 2 of 16 (12.50%)</text>
<text x="986" y="318" style="fill:black;">SRAM</text>
<text x="994" y="342" style="fill:black;"> 4 of 80 (5.00%)</text>
<text x="986" y="366" style="fill:black;">Map RAM</text>
@@ -6080,13 +3476,13 @@
<text x="986" y="654" style="fill:black;">Action Data Bus Bytes</text>
<text x="994" y="678" style="fill:black;"> 8 of 128 (6.25%)</text>
<text x="986" y="702" style="fill:black;">Logical TableID</text>
-<text x="994" y="726" style="fill:black;"> 1 of 16 (6.25%)</text>
+<text x="994" y="726" style="fill:black;"> 2 of 16 (12.50%)</text>
<rect x="960" y="24" width="240" height="728" style="stroke:black; stroke-width:1; fill:none""></rect>
<rect x="968" y="32" width="224" height="712" style="stroke:black; stroke-width:1; fill:none""></rect>
<rect x="0" y="0" width="680" height="672" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
-<h2>MAU Stage 2</h2>
+<h2>MAU Stage 1</h2>
<svg width="95%" height="95%" viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
<rect x="16" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:chartreuse""><title>Crossbar Byte 0 in exact Group 0 (parity group 0)
@@ -8804,20 +6200,19 @@
<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
-<text x="738" y="78" style="fill:black; font-weight:bold;">Ingress Tables</text>
-<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:chartreuse""><title>ecmp_group_table</title></rect>
-<text x="738" y="102" style="fill:black;">ecmp_group_table</text>
-<rect x="720" y="112" width="16" height="16" style="stroke:black; stroke-width:1; fill:coral""><title>ecmp_group_table__action__</title></rect>
-<text x="738" y="126" style="fill:black;">ecmp_group_table__acti...</text>
-<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:chocolate""><title>ecmp_group_table_counter</title></rect>
-<text x="738" y="150" style="fill:black;">ecmp_group_table_counter</text>
-<rect x="720" y="168" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
+<rect x="720" y="64" width="16" height="16" style="stroke:black; stroke-width:1; fill:chartreuse""><title>ecmp_group_table</title></rect>
+<text x="738" y="78" style="fill:black;">ecmp_group_table</text>
+<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:coral""><title>ecmp_group_table__action__</title></rect>
+<text x="738" y="102" style="fill:black;">ecmp_group_table__acti...</text>
+<rect x="720" y="112" width="16" height="16" style="stroke:black; stroke-width:1; fill:chocolate""><title>ecmp_group_table_counter</title></rect>
+<text x="738" y="126" style="fill:black;">ecmp_group_table_counter</text>
+<rect x="720" y="144" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
-<line x1="720" y1="168" x2="736" y2="184" style="stroke:black; stroke-width:2" />
-<line x1="720" y1="184" x2="736" y2="168" style="stroke:black; stroke-width:2" />
-<text x="738" y="182" style="fill:black;">Unavailable</text>
-<rect x="704" y="24" width="240" height="184" style="stroke:black; stroke-width:1; fill:none""></rect>
-<rect x="712" y="32" width="224" height="168" style="stroke:black; stroke-width:1; fill:none""></rect>
+<line x1="720" y1="144" x2="736" y2="160" style="stroke:black; stroke-width:2" />
+<line x1="720" y1="160" x2="736" y2="144" style="stroke:black; stroke-width:2" />
+<text x="738" y="158" style="fill:black;">Unavailable</text>
+<rect x="704" y="24" width="240" height="160" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="712" y="32" width="224" height="144" style="stroke:black; stroke-width:1; fill:none""></rect>
<text x="978" y="54" style="fill:black;">Totals</text>
<text x="986" y="78" style="fill:black;">Exact Match Input xbar</text>
<text x="994" y="102" style="fill:black;"> 4 of 128 (3.12%)</text>
@@ -8852,7 +6247,7 @@
<rect x="0" y="0" width="680" height="672" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
-<h2>MAU Stage 3</h2>
+<h2>MAU Stage 2</h2>
<svg width="95%" height="95%" viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
<rect x="16" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:cornflowerblue""><title>Crossbar Byte 0 in exact Group 0 (parity group 0)
@@ -11532,22 +8927,21 @@
<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
-<text x="738" y="78" style="fill:black; font-weight:bold;">Ingress Tables</text>
-<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:darkorange""><title>egress_port_count_table</title></rect>
-<text x="738" y="102" style="fill:black;">egress_port_count_table</text>
-<rect x="720" y="112" width="16" height="16" style="stroke:black; stroke-width:1; fill:cyan""><title>egress_port_counter</title></rect>
-<text x="738" y="126" style="fill:black;">egress_port_counter</text>
-<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:cornflowerblue""><title>ingress_port_count_table</title></rect>
-<text x="738" y="150" style="fill:black;">ingress_port_count_table</text>
-<rect x="720" y="160" width="16" height="16" style="stroke:black; stroke-width:1; fill:crimson""><title>ingress_port_counter</title></rect>
-<text x="738" y="174" style="fill:black;">ingress_port_counter</text>
-<rect x="720" y="192" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
+<rect x="720" y="64" width="16" height="16" style="stroke:black; stroke-width:1; fill:darkorange""><title>egress_port_count_table</title></rect>
+<text x="738" y="78" style="fill:black;">egress_port_count_table</text>
+<rect x="720" y="88" width="16" height="16" style="stroke:black; stroke-width:1; fill:cyan""><title>egress_port_counter</title></rect>
+<text x="738" y="102" style="fill:black;">egress_port_counter</text>
+<rect x="720" y="112" width="16" height="16" style="stroke:black; stroke-width:1; fill:cornflowerblue""><title>ingress_port_count_table</title></rect>
+<text x="738" y="126" style="fill:black;">ingress_port_count_table</text>
+<rect x="720" y="136" width="16" height="16" style="stroke:black; stroke-width:1; fill:crimson""><title>ingress_port_counter</title></rect>
+<text x="738" y="150" style="fill:black;">ingress_port_counter</text>
+<rect x="720" y="168" width="16" height="16" style="stroke:black; stroke-width:1; fill:gray""><title>Unavailable</title></rect>
-<line x1="720" y1="192" x2="736" y2="208" style="stroke:black; stroke-width:2" />
-<line x1="720" y1="208" x2="736" y2="192" style="stroke:black; stroke-width:2" />
-<text x="738" y="206" style="fill:black;">Unavailable</text>
-<rect x="704" y="24" width="240" height="208" style="stroke:black; stroke-width:1; fill:none""></rect>
-<rect x="712" y="32" width="224" height="192" style="stroke:black; stroke-width:1; fill:none""></rect>
+<line x1="720" y1="168" x2="736" y2="184" style="stroke:black; stroke-width:2" />
+<line x1="720" y1="184" x2="736" y2="168" style="stroke:black; stroke-width:2" />
+<text x="738" y="182" style="fill:black;">Unavailable</text>
+<rect x="704" y="24" width="240" height="184" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="712" y="32" width="224" height="168" style="stroke:black; stroke-width:1; fill:none""></rect>
<text x="978" y="54" style="fill:black;">Totals</text>
<text x="986" y="78" style="fill:black;">Exact Match Input xbar</text>
<text x="994" y="102" style="fill:black;"> 2 of 128 (1.56%)</text>
@@ -11582,6 +8976,2589 @@
<rect x="0" y="0" width="680" height="672" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
+<h2>MAU Stage 3</h2>
+<svg width="95%" height="95%" viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
+<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
+<rect x="16" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 0 in exact Group 0 (parity group 0)</title></rect>
+<rect x="16" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 1 in exact Group 0 (parity group 0)</title></rect>
+<rect x="16" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 2 in exact Group 0 (parity group 0)</title></rect>
+<rect x="16" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 3 in exact Group 0 (parity group 0)</title></rect>
+<rect x="24" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 4 in exact Group 0 (parity group 0)</title></rect>
+<rect x="24" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 5 in exact Group 0 (parity group 0)</title></rect>
+<rect x="24" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 6 in exact Group 0 (parity group 0)</title></rect>
+<rect x="24" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 7 in exact Group 0 (parity group 0)</title></rect>
+<rect x="40" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 8 in exact Group 0 (parity group 1)</title></rect>
+<rect x="40" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 9 in exact Group 0 (parity group 1)</title></rect>
+<rect x="40" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 10 in exact Group 0 (parity group 1)</title></rect>
+<rect x="40" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 11 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 12 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 13 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 14 in exact Group 0 (parity group 1)</title></rect>
+<rect x="48" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 15 in exact Group 0 (parity group 1)</title></rect>
+<rect x="16" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 16 in exact Group 1 (parity group 2)</title></rect>
+<rect x="16" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 17 in exact Group 1 (parity group 2)</title></rect>
+<rect x="16" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 18 in exact Group 1 (parity group 2)</title></rect>
+<rect x="16" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 19 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 20 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 21 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 22 in exact Group 1 (parity group 2)</title></rect>
+<rect x="24" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 23 in exact Group 1 (parity group 2)</title></rect>
+<rect x="40" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 24 in exact Group 1 (parity group 3)</title></rect>
+<rect x="40" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 25 in exact Group 1 (parity group 3)</title></rect>
+<rect x="40" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 26 in exact Group 1 (parity group 3)</title></rect>
+<rect x="40" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 27 in exact Group 1 (parity group 3)</title></rect>
+<rect x="48" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 28 in exact Group 1 (parity group 3)</title></rect>
+<rect x="48" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 29 in exact Group 1 (parity group 3)</title></rect>
+<rect x="48" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 30 in exact Group 1 (parity group 3)</title></rect>
+<rect x="48" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 31 in exact Group 1 (parity group 3)</title></rect>
+<rect x="16" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 32 in exact Group 2 (parity group 4)</title></rect>
+<rect x="16" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 33 in exact Group 2 (parity group 4)</title></rect>
+<rect x="16" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 34 in exact Group 2 (parity group 4)</title></rect>
+<rect x="16" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 35 in exact Group 2 (parity group 4)</title></rect>
+<rect x="24" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 36 in exact Group 2 (parity group 4)</title></rect>
+<rect x="24" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 37 in exact Group 2 (parity group 4)</title></rect>
+<rect x="24" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 38 in exact Group 2 (parity group 4)</title></rect>
+<rect x="24" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 39 in exact Group 2 (parity group 4)</title></rect>
+<rect x="40" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 40 in exact Group 2 (parity group 5)</title></rect>
+<rect x="40" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 41 in exact Group 2 (parity group 5)</title></rect>
+<rect x="40" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 42 in exact Group 2 (parity group 5)</title></rect>
+<rect x="40" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 43 in exact Group 2 (parity group 5)</title></rect>
+<rect x="48" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 44 in exact Group 2 (parity group 5)</title></rect>
+<rect x="48" y="120" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 45 in exact Group 2 (parity group 5)</title></rect>
+<rect x="48" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 46 in exact Group 2 (parity group 5)</title></rect>
+<rect x="48" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 47 in exact Group 2 (parity group 5)</title></rect>
+<rect x="16" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 48 in exact Group 3 (parity group 6)</title></rect>
+<rect x="16" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 49 in exact Group 3 (parity group 6)</title></rect>
+<rect x="16" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 50 in exact Group 3 (parity group 6)</title></rect>
+<rect x="16" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 51 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 52 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 53 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 54 in exact Group 3 (parity group 6)</title></rect>
+<rect x="24" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 55 in exact Group 3 (parity group 6)</title></rect>
+<rect x="40" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 56 in exact Group 3 (parity group 7)</title></rect>
+<rect x="40" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 57 in exact Group 3 (parity group 7)</title></rect>
+<rect x="40" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 58 in exact Group 3 (parity group 7)</title></rect>
+<rect x="40" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 59 in exact Group 3 (parity group 7)</title></rect>
+<rect x="48" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 60 in exact Group 3 (parity group 7)</title></rect>
+<rect x="48" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 61 in exact Group 3 (parity group 7)</title></rect>
+<rect x="48" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 62 in exact Group 3 (parity group 7)</title></rect>
+<rect x="48" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 63 in exact Group 3 (parity group 7)</title></rect>
+<rect x="16" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 64 in exact Group 4 (parity group 8)</title></rect>
+<rect x="16" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 65 in exact Group 4 (parity group 8)</title></rect>
+<rect x="16" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 66 in exact Group 4 (parity group 8)</title></rect>
+<rect x="16" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 67 in exact Group 4 (parity group 8)</title></rect>
+<rect x="24" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 68 in exact Group 4 (parity group 8)</title></rect>
+<rect x="24" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 69 in exact Group 4 (parity group 8)</title></rect>
+<rect x="24" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 70 in exact Group 4 (parity group 8)</title></rect>
+<rect x="24" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 71 in exact Group 4 (parity group 8)</title></rect>
+<rect x="40" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 72 in exact Group 4 (parity group 9)</title></rect>
+<rect x="40" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 73 in exact Group 4 (parity group 9)</title></rect>
+<rect x="40" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 74 in exact Group 4 (parity group 9)</title></rect>
+<rect x="40" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 75 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 76 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 77 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 78 in exact Group 4 (parity group 9)</title></rect>
+<rect x="48" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 79 in exact Group 4 (parity group 9)</title></rect>
+<rect x="16" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 80 in exact Group 5 (parity group 10)</title></rect>
+<rect x="16" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 81 in exact Group 5 (parity group 10)</title></rect>
+<rect x="16" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 82 in exact Group 5 (parity group 10)</title></rect>
+<rect x="16" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 83 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 84 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 85 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 86 in exact Group 5 (parity group 10)</title></rect>
+<rect x="24" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 87 in exact Group 5 (parity group 10)</title></rect>
+<rect x="40" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 88 in exact Group 5 (parity group 11)</title></rect>
+<rect x="40" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 89 in exact Group 5 (parity group 11)</title></rect>
+<rect x="40" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 90 in exact Group 5 (parity group 11)</title></rect>
+<rect x="40" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 91 in exact Group 5 (parity group 11)</title></rect>
+<rect x="48" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 92 in exact Group 5 (parity group 11)</title></rect>
+<rect x="48" y="240" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 93 in exact Group 5 (parity group 11)</title></rect>
+<rect x="48" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 94 in exact Group 5 (parity group 11)</title></rect>
+<rect x="48" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 95 in exact Group 5 (parity group 11)</title></rect>
+<rect x="16" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 96 in exact Group 6 (parity group 12)</title></rect>
+<rect x="16" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 97 in exact Group 6 (parity group 12)</title></rect>
+<rect x="16" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 98 in exact Group 6 (parity group 12)</title></rect>
+<rect x="16" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 99 in exact Group 6 (parity group 12)</title></rect>
+<rect x="24" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 100 in exact Group 6 (parity group 12)</title></rect>
+<rect x="24" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 101 in exact Group 6 (parity group 12)</title></rect>
+<rect x="24" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 102 in exact Group 6 (parity group 12)</title></rect>
+<rect x="24" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 103 in exact Group 6 (parity group 12)</title></rect>
+<rect x="40" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 104 in exact Group 6 (parity group 13)</title></rect>
+<rect x="40" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 105 in exact Group 6 (parity group 13)</title></rect>
+<rect x="40" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 106 in exact Group 6 (parity group 13)</title></rect>
+<rect x="40" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 107 in exact Group 6 (parity group 13)</title></rect>
+<rect x="48" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 108 in exact Group 6 (parity group 13)</title></rect>
+<rect x="48" y="280" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 109 in exact Group 6 (parity group 13)</title></rect>
+<rect x="48" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 110 in exact Group 6 (parity group 13)</title></rect>
+<rect x="48" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 111 in exact Group 6 (parity group 13)</title></rect>
+<rect x="16" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 112 in exact Group 7 (parity group 14)</title></rect>
+<rect x="16" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 113 in exact Group 7 (parity group 14)</title></rect>
+<rect x="16" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 114 in exact Group 7 (parity group 14)</title></rect>
+<rect x="16" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 115 in exact Group 7 (parity group 14)</title></rect>
+<rect x="24" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 116 in exact Group 7 (parity group 14)</title></rect>
+<rect x="24" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 117 in exact Group 7 (parity group 14)</title></rect>
+<rect x="24" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 118 in exact Group 7 (parity group 14)</title></rect>
+<rect x="24" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 119 in exact Group 7 (parity group 14)</title></rect>
+<rect x="40" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 120 in exact Group 7 (parity group 15)</title></rect>
+<rect x="40" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 121 in exact Group 7 (parity group 15)</title></rect>
+<rect x="40" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 122 in exact Group 7 (parity group 15)</title></rect>
+<rect x="40" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 123 in exact Group 7 (parity group 15)</title></rect>
+<rect x="48" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 124 in exact Group 7 (parity group 15)</title></rect>
+<rect x="48" y="320" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 125 in exact Group 7 (parity group 15)</title></rect>
+<rect x="48" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 126 in exact Group 7 (parity group 15)</title></rect>
+<rect x="48" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 127 in exact Group 7 (parity group 15)</title></rect>
+<rect x="16" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 128 in ternary Group 0</title></rect>
+<rect x="16" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 129 in ternary Group 0</title></rect>
+<rect x="24" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 130 in ternary Group 0</title></rect>
+<rect x="24" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 131 in ternary Group 0</title></rect>
+<rect x="32" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 132 in ternary Group 0</title></rect>
+<rect x="48" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 133 in ternary Group 0</title></rect>
+<rect x="16" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 134 in ternary Group 1</title></rect>
+<rect x="16" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 135 in ternary Group 1</title></rect>
+<rect x="24" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 136 in ternary Group 1</title></rect>
+<rect x="24" y="400" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 137 in ternary Group 1</title></rect>
+<rect x="32" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 138 in ternary Group 1</title></rect>
+<rect x="16" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 139 in ternary Group 2</title></rect>
+<rect x="16" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 140 in ternary Group 2</title></rect>
+<rect x="24" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 141 in ternary Group 2</title></rect>
+<rect x="24" y="424" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 142 in ternary Group 2</title></rect>
+<rect x="32" y="416" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 143 in ternary Group 2</title></rect>
+<rect x="48" y="432" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 144 in ternary Group 1</title></rect>
+<rect x="16" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 145 in ternary Group 3</title></rect>
+<rect x="16" y="448" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 146 in ternary Group 3</title></rect>
+<rect x="24" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 147 in ternary Group 3</title></rect>
+<rect x="24" y="448" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 148 in ternary Group 3</title></rect>
+<rect x="32" y="440" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 149 in ternary Group 3</title></rect>
+<rect x="16" y="464" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 150 in ternary Group 4</title></rect>
+<rect x="16" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 151 in ternary Group 4</title></rect>
+<rect x="24" y="464" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 152 in ternary Group 4</title></rect>
+<rect x="24" y="472" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 153 in ternary Group 4</title></rect>
+<rect x="32" y="464" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 154 in ternary Group 4</title></rect>
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+<rect x="16" y="488" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Crossbar Byte 156 in ternary Group 5</title></rect>
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+ Row: 3 Col: 11
+ Unit Number: 47
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="480" y="104" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 4 Col: 11
+ Unit Number: 59
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="480" y="80" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 5 Col: 11
+ Unit Number: 71
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="480" y="56" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 6 Col: 11
+ Unit Number: 83
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<rect x="480" y="32" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>SRAM:
+ Row: 7 Col: 11
+ Unit Number: 95
+ Entry Bit Width: 128
+ Depth: 1024</title></rect>
+<text x="98" y="342" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="14" heightAdjust="spacingAndGlyphs" style="fill:black;">TCAMs</text>
+<rect x="96" y="616" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 0 Col: 0
+ Unit Number: 0
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="96" y="592" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 1 Col: 0
+ Unit Number: 1
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="96" y="568" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 2 Col: 0
+ Unit Number: 2
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="96" y="544" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 3 Col: 0
+ Unit Number: 3
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="96" y="520" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 4 Col: 0
+ Unit Number: 4
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="96" y="496" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 5 Col: 0
+ Unit Number: 5
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="96" y="472" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 6 Col: 0
+ Unit Number: 6
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="96" y="448" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 7 Col: 0
+ Unit Number: 7
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="96" y="424" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 8 Col: 0
+ Unit Number: 8
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="96" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 9 Col: 0
+ Unit Number: 9
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="96" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 10 Col: 0
+ Unit Number: 10
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="96" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 11 Col: 0
+ Unit Number: 11
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="120" y="616" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 0 Col: 1
+ Unit Number: 12
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="120" y="592" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 1 Col: 1
+ Unit Number: 13
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="120" y="568" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 2 Col: 1
+ Unit Number: 14
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="120" y="544" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 3 Col: 1
+ Unit Number: 15
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="120" y="520" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 4 Col: 1
+ Unit Number: 16
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="120" y="496" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 5 Col: 1
+ Unit Number: 17
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="120" y="472" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 6 Col: 1
+ Unit Number: 18
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="120" y="448" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 7 Col: 1
+ Unit Number: 19
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="120" y="424" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 8 Col: 1
+ Unit Number: 20
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="120" y="400" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 9 Col: 1
+ Unit Number: 21
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="120" y="376" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 10 Col: 1
+ Unit Number: 22
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<rect x="120" y="352" width="16" height="16" style="stroke:black; stroke-width:1; fill:white""><title>TCAM:
+ Row: 11 Col: 1
+ Unit Number: 23
+ Entry Bit Width: 44
+ Result Bit width: 1
+ Depth: 512</title></rect>
+<text x="82" y="254" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Distr.</text>
+<rect x="80" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
+ Hash ID: 0
+ Group ID: 0
+</title></rect>
+<rect x="88" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
+ Hash ID: 0
+ Group ID: 1
+</title></rect>
+<rect x="96" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
+ Hash ID: 0
+ Group ID: 2
+</title></rect>
+<rect x="104" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
+ Hash ID: 1
+ Group ID: 0
+</title></rect>
+<rect x="112" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
+ Hash ID: 1
+ Group ID: 1
+</title></rect>
+<rect x="120" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Distribution Group:
+ Hash ID: 1
+ Group ID: 2
+</title></rect>
+<text x="170" y="238" textLength="46" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Hash Bits</text>
+<rect x="176" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 0</title></rect>
+<rect x="184" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 0</title></rect>
+<rect x="192" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 0</title></rect>
+<rect x="200" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 0</title></rect>
+<rect x="208" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 0</title></rect>
+<rect x="216" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 0</title></rect>
+<rect x="224" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 0</title></rect>
+<rect x="232" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 0</title></rect>
+<rect x="240" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 0</title></rect>
+<rect x="248" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 0</title></rect>
+<rect x="256" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 0</title></rect>
+<rect x="264" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 0</title></rect>
+<rect x="272" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 0</title></rect>
+<rect x="176" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 0</title></rect>
+<rect x="184" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 0</title></rect>
+<rect x="192" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 0</title></rect>
+<rect x="200" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 0</title></rect>
+<rect x="208" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 0</title></rect>
+<rect x="216" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 0</title></rect>
+<rect x="224" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 0</title></rect>
+<rect x="232" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 0</title></rect>
+<rect x="240" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 0</title></rect>
+<rect x="248" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 0</title></rect>
+<rect x="256" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 0</title></rect>
+<rect x="264" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 0</title></rect>
+<rect x="272" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 0</title></rect>
+<rect x="176" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 0</title></rect>
+<rect x="184" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 0</title></rect>
+<rect x="192" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 0</title></rect>
+<rect x="200" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 0</title></rect>
+<rect x="208" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 0</title></rect>
+<rect x="216" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 0</title></rect>
+<rect x="224" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 0</title></rect>
+<rect x="232" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 0</title></rect>
+<rect x="240" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 0</title></rect>
+<rect x="248" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 0</title></rect>
+<rect x="256" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 0</title></rect>
+<rect x="264" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 0</title></rect>
+<rect x="272" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 0</title></rect>
+<rect x="176" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 0</title></rect>
+<rect x="184" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 0</title></rect>
+<rect x="192" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 0</title></rect>
+<rect x="200" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 0</title></rect>
+<rect x="208" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 0</title></rect>
+<rect x="216" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 0</title></rect>
+<rect x="224" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 0</title></rect>
+<rect x="232" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 0</title></rect>
+<rect x="240" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 0</title></rect>
+<rect x="248" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 0</title></rect>
+<rect x="256" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 0</title></rect>
+<rect x="264" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 0</title></rect>
+<rect x="272" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 0</title></rect>
+<rect x="296" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 1</title></rect>
+<rect x="304" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 1</title></rect>
+<rect x="312" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 1</title></rect>
+<rect x="320" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 1</title></rect>
+<rect x="328" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 1</title></rect>
+<rect x="336" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 1</title></rect>
+<rect x="344" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 1</title></rect>
+<rect x="352" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 1</title></rect>
+<rect x="360" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 1</title></rect>
+<rect x="368" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 1</title></rect>
+<rect x="376" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 1</title></rect>
+<rect x="384" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 1</title></rect>
+<rect x="392" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 1</title></rect>
+<rect x="296" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 1</title></rect>
+<rect x="304" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 1</title></rect>
+<rect x="312" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 1</title></rect>
+<rect x="320" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 1</title></rect>
+<rect x="328" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 1</title></rect>
+<rect x="336" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 1</title></rect>
+<rect x="344" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 1</title></rect>
+<rect x="352" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 1</title></rect>
+<rect x="360" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 1</title></rect>
+<rect x="368" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 1</title></rect>
+<rect x="376" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 1</title></rect>
+<rect x="384" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 1</title></rect>
+<rect x="392" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 1</title></rect>
+<rect x="296" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 1</title></rect>
+<rect x="304" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 1</title></rect>
+<rect x="312" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 1</title></rect>
+<rect x="320" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 1</title></rect>
+<rect x="328" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 1</title></rect>
+<rect x="336" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 1</title></rect>
+<rect x="344" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 1</title></rect>
+<rect x="352" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 1</title></rect>
+<rect x="360" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 1</title></rect>
+<rect x="368" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 1</title></rect>
+<rect x="376" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 1</title></rect>
+<rect x="384" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 1</title></rect>
+<rect x="392" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 1</title></rect>
+<rect x="296" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 1</title></rect>
+<rect x="304" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 1</title></rect>
+<rect x="312" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 1</title></rect>
+<rect x="320" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 1</title></rect>
+<rect x="328" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 1</title></rect>
+<rect x="336" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 1</title></rect>
+<rect x="344" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 1</title></rect>
+<rect x="352" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 1</title></rect>
+<rect x="360" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 1</title></rect>
+<rect x="368" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 1</title></rect>
+<rect x="376" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 1</title></rect>
+<rect x="384" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 1</title></rect>
+<rect x="392" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 1</title></rect>
+<rect x="176" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 2</title></rect>
+<rect x="184" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 2</title></rect>
+<rect x="192" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 2</title></rect>
+<rect x="200" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 2</title></rect>
+<rect x="208" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 2</title></rect>
+<rect x="216" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 2</title></rect>
+<rect x="224" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 2</title></rect>
+<rect x="232" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 2</title></rect>
+<rect x="240" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 2</title></rect>
+<rect x="248" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 2</title></rect>
+<rect x="256" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 2</title></rect>
+<rect x="264" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 2</title></rect>
+<rect x="272" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 2</title></rect>
+<rect x="176" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 2</title></rect>
+<rect x="184" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 2</title></rect>
+<rect x="192" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 2</title></rect>
+<rect x="200" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 2</title></rect>
+<rect x="208" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 2</title></rect>
+<rect x="216" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 2</title></rect>
+<rect x="224" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 2</title></rect>
+<rect x="232" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 2</title></rect>
+<rect x="240" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 2</title></rect>
+<rect x="248" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 2</title></rect>
+<rect x="256" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 2</title></rect>
+<rect x="264" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 2</title></rect>
+<rect x="272" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 2</title></rect>
+<rect x="176" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 2</title></rect>
+<rect x="184" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 2</title></rect>
+<rect x="192" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 2</title></rect>
+<rect x="200" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 2</title></rect>
+<rect x="208" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 2</title></rect>
+<rect x="216" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 2</title></rect>
+<rect x="224" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 2</title></rect>
+<rect x="232" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 2</title></rect>
+<rect x="240" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 2</title></rect>
+<rect x="248" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 2</title></rect>
+<rect x="256" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 2</title></rect>
+<rect x="264" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 2</title></rect>
+<rect x="272" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 2</title></rect>
+<rect x="176" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 2</title></rect>
+<rect x="184" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 2</title></rect>
+<rect x="192" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 2</title></rect>
+<rect x="200" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 2</title></rect>
+<rect x="208" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 2</title></rect>
+<rect x="216" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 2</title></rect>
+<rect x="224" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 2</title></rect>
+<rect x="232" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 2</title></rect>
+<rect x="240" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 2</title></rect>
+<rect x="248" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 2</title></rect>
+<rect x="256" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 2</title></rect>
+<rect x="264" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 2</title></rect>
+<rect x="272" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 2</title></rect>
+<rect x="296" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 3</title></rect>
+<rect x="304" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 3</title></rect>
+<rect x="312" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 3</title></rect>
+<rect x="320" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 3</title></rect>
+<rect x="328" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 3</title></rect>
+<rect x="336" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 3</title></rect>
+<rect x="344" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 3</title></rect>
+<rect x="352" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 3</title></rect>
+<rect x="360" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 3</title></rect>
+<rect x="368" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 3</title></rect>
+<rect x="376" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 3</title></rect>
+<rect x="384" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 3</title></rect>
+<rect x="392" y="288" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 3</title></rect>
+<rect x="296" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 3</title></rect>
+<rect x="304" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 3</title></rect>
+<rect x="312" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 3</title></rect>
+<rect x="320" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 3</title></rect>
+<rect x="328" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 3</title></rect>
+<rect x="336" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 3</title></rect>
+<rect x="344" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 3</title></rect>
+<rect x="352" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 3</title></rect>
+<rect x="360" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 3</title></rect>
+<rect x="368" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 3</title></rect>
+<rect x="376" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 3</title></rect>
+<rect x="384" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 3</title></rect>
+<rect x="392" y="296" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 3</title></rect>
+<rect x="296" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 3</title></rect>
+<rect x="304" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 3</title></rect>
+<rect x="312" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 3</title></rect>
+<rect x="320" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 3</title></rect>
+<rect x="328" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 3</title></rect>
+<rect x="336" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 3</title></rect>
+<rect x="344" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 3</title></rect>
+<rect x="352" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 3</title></rect>
+<rect x="360" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 3</title></rect>
+<rect x="368" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 3</title></rect>
+<rect x="376" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 3</title></rect>
+<rect x="384" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 3</title></rect>
+<rect x="392" y="304" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 3</title></rect>
+<rect x="296" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 3</title></rect>
+<rect x="304" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 3</title></rect>
+<rect x="312" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 3</title></rect>
+<rect x="320" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 3</title></rect>
+<rect x="328" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 3</title></rect>
+<rect x="336" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 3</title></rect>
+<rect x="344" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 3</title></rect>
+<rect x="352" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 3</title></rect>
+<rect x="360" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 3</title></rect>
+<rect x="368" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 3</title></rect>
+<rect x="376" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 3</title></rect>
+<rect x="384" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 3</title></rect>
+<rect x="392" y="312" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 3</title></rect>
+<rect x="176" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 4</title></rect>
+<rect x="184" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 4</title></rect>
+<rect x="192" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 4</title></rect>
+<rect x="200" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 4</title></rect>
+<rect x="208" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 4</title></rect>
+<rect x="216" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 4</title></rect>
+<rect x="224" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 4</title></rect>
+<rect x="232" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 4</title></rect>
+<rect x="240" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 4</title></rect>
+<rect x="248" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 4</title></rect>
+<rect x="256" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 4</title></rect>
+<rect x="264" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 4</title></rect>
+<rect x="272" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 4</title></rect>
+<rect x="176" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 4</title></rect>
+<rect x="184" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 4</title></rect>
+<rect x="192" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 4</title></rect>
+<rect x="200" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 4</title></rect>
+<rect x="208" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 4</title></rect>
+<rect x="216" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 4</title></rect>
+<rect x="224" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 4</title></rect>
+<rect x="232" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 4</title></rect>
+<rect x="240" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 4</title></rect>
+<rect x="248" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 4</title></rect>
+<rect x="256" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 4</title></rect>
+<rect x="264" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 4</title></rect>
+<rect x="272" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 4</title></rect>
+<rect x="176" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 4</title></rect>
+<rect x="184" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 4</title></rect>
+<rect x="192" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 4</title></rect>
+<rect x="200" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 4</title></rect>
+<rect x="208" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 4</title></rect>
+<rect x="216" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 4</title></rect>
+<rect x="224" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 4</title></rect>
+<rect x="232" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 4</title></rect>
+<rect x="240" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 4</title></rect>
+<rect x="248" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 4</title></rect>
+<rect x="256" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 4</title></rect>
+<rect x="264" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 4</title></rect>
+<rect x="272" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 4</title></rect>
+<rect x="176" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 4</title></rect>
+<rect x="184" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 4</title></rect>
+<rect x="192" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 4</title></rect>
+<rect x="200" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 4</title></rect>
+<rect x="208" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 4</title></rect>
+<rect x="216" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 4</title></rect>
+<rect x="224" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 4</title></rect>
+<rect x="232" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 4</title></rect>
+<rect x="240" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 4</title></rect>
+<rect x="248" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 4</title></rect>
+<rect x="256" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 4</title></rect>
+<rect x="264" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 4</title></rect>
+<rect x="272" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 4</title></rect>
+<rect x="296" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 5</title></rect>
+<rect x="304" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 5</title></rect>
+<rect x="312" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 5</title></rect>
+<rect x="320" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 5</title></rect>
+<rect x="328" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 5</title></rect>
+<rect x="336" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 5</title></rect>
+<rect x="344" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 5</title></rect>
+<rect x="352" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 5</title></rect>
+<rect x="360" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 5</title></rect>
+<rect x="368" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 5</title></rect>
+<rect x="376" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 5</title></rect>
+<rect x="384" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 5</title></rect>
+<rect x="392" y="328" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 5</title></rect>
+<rect x="296" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 5</title></rect>
+<rect x="304" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 5</title></rect>
+<rect x="312" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 5</title></rect>
+<rect x="320" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 5</title></rect>
+<rect x="328" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 5</title></rect>
+<rect x="336" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 5</title></rect>
+<rect x="344" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 5</title></rect>
+<rect x="352" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 5</title></rect>
+<rect x="360" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 5</title></rect>
+<rect x="368" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 5</title></rect>
+<rect x="376" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 5</title></rect>
+<rect x="384" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 5</title></rect>
+<rect x="392" y="336" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 5</title></rect>
+<rect x="296" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 5</title></rect>
+<rect x="304" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 5</title></rect>
+<rect x="312" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 5</title></rect>
+<rect x="320" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 5</title></rect>
+<rect x="328" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 5</title></rect>
+<rect x="336" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 5</title></rect>
+<rect x="344" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 5</title></rect>
+<rect x="352" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 5</title></rect>
+<rect x="360" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 5</title></rect>
+<rect x="368" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 5</title></rect>
+<rect x="376" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 5</title></rect>
+<rect x="384" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 5</title></rect>
+<rect x="392" y="344" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 5</title></rect>
+<rect x="296" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 5</title></rect>
+<rect x="304" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 5</title></rect>
+<rect x="312" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 5</title></rect>
+<rect x="320" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 5</title></rect>
+<rect x="328" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 5</title></rect>
+<rect x="336" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 5</title></rect>
+<rect x="344" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 5</title></rect>
+<rect x="352" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 5</title></rect>
+<rect x="360" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 5</title></rect>
+<rect x="368" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 5</title></rect>
+<rect x="376" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 5</title></rect>
+<rect x="384" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 5</title></rect>
+<rect x="392" y="352" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 5</title></rect>
+<rect x="176" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 6</title></rect>
+<rect x="184" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 6</title></rect>
+<rect x="192" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 6</title></rect>
+<rect x="200" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 6</title></rect>
+<rect x="208" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 6</title></rect>
+<rect x="216" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 6</title></rect>
+<rect x="224" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 6</title></rect>
+<rect x="232" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 6</title></rect>
+<rect x="240" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 6</title></rect>
+<rect x="248" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 6</title></rect>
+<rect x="256" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 6</title></rect>
+<rect x="264" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 6</title></rect>
+<rect x="272" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 6</title></rect>
+<rect x="176" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 6</title></rect>
+<rect x="184" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 6</title></rect>
+<rect x="192" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 6</title></rect>
+<rect x="200" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 6</title></rect>
+<rect x="208" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 6</title></rect>
+<rect x="216" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 6</title></rect>
+<rect x="224" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 6</title></rect>
+<rect x="232" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 6</title></rect>
+<rect x="240" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 6</title></rect>
+<rect x="248" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 6</title></rect>
+<rect x="256" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 6</title></rect>
+<rect x="264" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 6</title></rect>
+<rect x="272" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 6</title></rect>
+<rect x="176" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 6</title></rect>
+<rect x="184" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 6</title></rect>
+<rect x="192" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 6</title></rect>
+<rect x="200" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 6</title></rect>
+<rect x="208" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 6</title></rect>
+<rect x="216" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 6</title></rect>
+<rect x="224" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 6</title></rect>
+<rect x="232" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 6</title></rect>
+<rect x="240" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 6</title></rect>
+<rect x="248" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 6</title></rect>
+<rect x="256" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 6</title></rect>
+<rect x="264" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 6</title></rect>
+<rect x="272" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 6</title></rect>
+<rect x="176" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 6</title></rect>
+<rect x="184" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 6</title></rect>
+<rect x="192" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 6</title></rect>
+<rect x="200" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 6</title></rect>
+<rect x="208" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 6</title></rect>
+<rect x="216" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 6</title></rect>
+<rect x="224" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 6</title></rect>
+<rect x="232" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 6</title></rect>
+<rect x="240" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 6</title></rect>
+<rect x="248" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 6</title></rect>
+<rect x="256" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 6</title></rect>
+<rect x="264" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 6</title></rect>
+<rect x="272" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 6</title></rect>
+<rect x="296" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 0 in hash match group 7</title></rect>
+<rect x="304" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 1 in hash match group 7</title></rect>
+<rect x="312" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 2 in hash match group 7</title></rect>
+<rect x="320" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 3 in hash match group 7</title></rect>
+<rect x="328" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 4 in hash match group 7</title></rect>
+<rect x="336" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 5 in hash match group 7</title></rect>
+<rect x="344" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 6 in hash match group 7</title></rect>
+<rect x="352" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 7 in hash match group 7</title></rect>
+<rect x="360" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 8 in hash match group 7</title></rect>
+<rect x="368" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 9 in hash match group 7</title></rect>
+<rect x="376" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 10 in hash match group 7</title></rect>
+<rect x="384" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 11 in hash match group 7</title></rect>
+<rect x="392" y="368" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 12 in hash match group 7</title></rect>
+<rect x="296" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 13 in hash match group 7</title></rect>
+<rect x="304" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 14 in hash match group 7</title></rect>
+<rect x="312" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 15 in hash match group 7</title></rect>
+<rect x="320" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 16 in hash match group 7</title></rect>
+<rect x="328" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 17 in hash match group 7</title></rect>
+<rect x="336" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 18 in hash match group 7</title></rect>
+<rect x="344" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 19 in hash match group 7</title></rect>
+<rect x="352" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 20 in hash match group 7</title></rect>
+<rect x="360" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 21 in hash match group 7</title></rect>
+<rect x="368" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 22 in hash match group 7</title></rect>
+<rect x="376" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 23 in hash match group 7</title></rect>
+<rect x="384" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 24 in hash match group 7</title></rect>
+<rect x="392" y="376" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 25 in hash match group 7</title></rect>
+<rect x="296" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 26 in hash match group 7</title></rect>
+<rect x="304" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 27 in hash match group 7</title></rect>
+<rect x="312" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 28 in hash match group 7</title></rect>
+<rect x="320" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 29 in hash match group 7</title></rect>
+<rect x="328" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 30 in hash match group 7</title></rect>
+<rect x="336" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 31 in hash match group 7</title></rect>
+<rect x="344" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 32 in hash match group 7</title></rect>
+<rect x="352" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 33 in hash match group 7</title></rect>
+<rect x="360" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 34 in hash match group 7</title></rect>
+<rect x="368" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 35 in hash match group 7</title></rect>
+<rect x="376" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 36 in hash match group 7</title></rect>
+<rect x="384" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 37 in hash match group 7</title></rect>
+<rect x="392" y="384" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 38 in hash match group 7</title></rect>
+<rect x="296" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 39 in hash match group 7</title></rect>
+<rect x="304" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 40 in hash match group 7</title></rect>
+<rect x="312" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 41 in hash match group 7</title></rect>
+<rect x="320" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 42 in hash match group 7</title></rect>
+<rect x="328" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 43 in hash match group 7</title></rect>
+<rect x="336" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 44 in hash match group 7</title></rect>
+<rect x="344" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 45 in hash match group 7</title></rect>
+<rect x="352" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 46 in hash match group 7</title></rect>
+<rect x="360" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 47 in hash match group 7</title></rect>
+<rect x="368" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 48 in hash match group 7</title></rect>
+<rect x="376" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 49 in hash match group 7</title></rect>
+<rect x="384" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 50 in hash match group 7</title></rect>
+<rect x="392" y="392" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Hash Bit 51 in hash match group 7</title></rect>
+<text x="66" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Gateways</text>
+<rect x="72" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 0
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 1
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 2
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 3
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="160" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 4
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 5
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 6
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 7
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 8
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 9
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 10
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 11
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 12
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 13
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="40" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 14
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<rect x="72" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Gateway Table Gateway:
+ Unit: 15
+ Entry Bit Width: 44
+ Depth: 4</title></rect>
+<text x="242" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Stashes</text>
+<rect x="248" y="208" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 0
+ Unit ID: 0
+ Global ID: 0
+</title></rect>
+<rect x="248" y="200" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 0
+ Unit ID: 1
+ Global ID: 1
+</title></rect>
+<rect x="248" y="184" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 1
+ Unit ID: 0
+ Global ID: 2
+</title></rect>
+<rect x="248" y="176" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 1
+ Unit ID: 1
+ Global ID: 3
+</title></rect>
+<rect x="248" y="160" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 2
+ Unit ID: 0
+ Global ID: 4
+</title></rect>
+<rect x="248" y="152" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 2
+ Unit ID: 1
+ Global ID: 5
+</title></rect>
+<rect x="248" y="136" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 3
+ Unit ID: 0
+ Global ID: 6
+</title></rect>
+<rect x="248" y="128" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 3
+ Unit ID: 1
+ Global ID: 7
+</title></rect>
+<rect x="248" y="112" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 4
+ Unit ID: 0
+ Global ID: 8
+</title></rect>
+<rect x="248" y="104" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 4
+ Unit ID: 1
+ Global ID: 9
+</title></rect>
+<rect x="248" y="88" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 5
+ Unit ID: 0
+ Global ID: 10
+</title></rect>
+<rect x="248" y="80" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 5
+ Unit ID: 1
+ Global ID: 11
+</title></rect>
+<rect x="248" y="64" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 6
+ Unit ID: 0
+ Global ID: 12
+</title></rect>
+<rect x="248" y="56" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 6
+ Unit ID: 1
+ Global ID: 13
+</title></rect>
+<rect x="248" y="40" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 7
+ Unit ID: 0
+ Global ID: 14
+</title></rect>
+<rect x="248" y="32" width="16" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Stash Unit:
+ Row: 7
+ Unit ID: 1
+ Global ID: 15
+</title></rect>
+<text x="282" y="22" textLength="38" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Map RAMs</text>
+<rect x="280" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 0 Unit: 0
+ Unit Number: 0
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 0 Unit: 1
+ Unit Number: 1
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 0 Unit: 2
+ Unit Number: 2
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 0 Unit: 3
+ Unit Number: 3
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 0 Unit: 4
+ Unit Number: 4
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 0 Unit: 5
+ Unit Number: 5
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 0
+ Unit Number: 6
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 1
+ Unit Number: 7
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 2
+ Unit Number: 8
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 3
+ Unit Number: 9
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 4
+ Unit Number: 10
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 1 Unit: 5
+ Unit Number: 11
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 0
+ Unit Number: 12
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 1
+ Unit Number: 13
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 2
+ Unit Number: 14
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 3
+ Unit Number: 15
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 4
+ Unit Number: 16
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 2 Unit: 5
+ Unit Number: 17
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 3 Unit: 0
+ Unit Number: 18
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 3 Unit: 1
+ Unit Number: 19
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 3 Unit: 2
+ Unit Number: 20
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 3 Unit: 3
+ Unit Number: 21
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 3 Unit: 4
+ Unit Number: 22
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 3 Unit: 5
+ Unit Number: 23
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 4 Unit: 0
+ Unit Number: 24
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 4 Unit: 1
+ Unit Number: 25
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 4 Unit: 2
+ Unit Number: 26
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 4 Unit: 3
+ Unit Number: 27
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 4 Unit: 4
+ Unit Number: 28
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 4 Unit: 5
+ Unit Number: 29
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 5 Unit: 0
+ Unit Number: 30
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 5 Unit: 1
+ Unit Number: 31
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 5 Unit: 2
+ Unit Number: 32
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 5 Unit: 3
+ Unit Number: 33
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 5 Unit: 4
+ Unit Number: 34
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 5 Unit: 5
+ Unit Number: 35
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 6 Unit: 0
+ Unit Number: 36
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 6 Unit: 1
+ Unit Number: 37
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 6 Unit: 2
+ Unit Number: 38
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 6 Unit: 3
+ Unit Number: 39
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 6 Unit: 4
+ Unit Number: 40
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 6 Unit: 5
+ Unit Number: 41
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="280" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 7 Unit: 0
+ Unit Number: 42
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="288" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 7 Unit: 1
+ Unit Number: 43
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="296" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 7 Unit: 2
+ Unit Number: 44
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="304" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 7 Unit: 3
+ Unit Number: 45
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="312" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 7 Unit: 4
+ Unit Number: 46
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<rect x="320" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Map RAM:
+ Row: 7 Unit: 5
+ Unit Number: 47
+ Entry Bit Width: 11
+ Depth: 1024</title></rect>
+<text x="338" y="22" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">ALUs</text>
+<rect x="336" y="200" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
+ Unit: 0 right</title></rect>
+<rect x="336" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
+ Unit: 2 right</title></rect>
+<rect x="336" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
+ Unit: 4 right</title></rect>
+<rect x="336" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Statistics ALU:
+ Unit: 6 right</title></rect>
+<rect x="336" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
+ Unit: 1 right</title></rect>
+<rect x="336" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
+ Unit: 3 right</title></rect>
+<rect x="336" y="80" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
+ Unit: 5 right</title></rect>
+<rect x="336" y="32" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>128-bit Meter ALU:
+ Unit: 7 right</title></rect>
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+ Number: 0</title></rect>
+<rect x="512" y="240" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
+ Number: 1</title></rect>
+<rect x="512" y="248" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
+ Number: 2</title></rect>
+<rect x="512" y="256" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
+ Number: 3</title></rect>
+<rect x="512" y="264" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
+ Number: 4</title></rect>
+<rect x="512" y="272" width="32" height="8" style="stroke:black; stroke-width:1; fill:white""><title>VLIW Instruction:
+ Number: 5</title></rect>
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+ Byte Number: 113
+</title></rect>
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+ Byte Number: 114
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+ Byte Number: 115
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+ Byte Number: 116
+</title></rect>
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+ Byte Number: 117
+</title></rect>
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+ Byte Number: 118
+</title></rect>
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+ Byte Number: 119
+</title></rect>
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+ Byte Number: 120
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+ Byte Number: 121
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+ Byte Number: 122
+</title></rect>
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+ Byte Number: 123
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+ Byte Number: 124
+</title></rect>
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+ Byte Number: 125
+</title></rect>
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+ Byte Number: 126
+</title></rect>
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+ Byte Number: 127
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+<rect x="192" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
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+<rect x="208" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
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+ ID: 5
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+<rect x="232" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 6
+</title></rect>
+<rect x="240" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 7
+</title></rect>
+<rect x="248" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 8
+</title></rect>
+<rect x="256" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 9
+</title></rect>
+<rect x="264" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 10
+</title></rect>
+<rect x="272" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 11
+</title></rect>
+<rect x="280" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 12
+</title></rect>
+<rect x="288" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 13
+</title></rect>
+<rect x="296" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 14
+</title></rect>
+<rect x="304" y="600" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>Logical Table ID:
+ ID: 15
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+<text x="562" y="22" textLength="94" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">PHV Container Activity</text>
+<rect x="560" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 0</title></rect>
+<rect x="568" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 1</title></rect>
+<rect x="576" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 2</title></rect>
+<rect x="584" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 3</title></rect>
+<rect x="560" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 4</title></rect>
+<rect x="568" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 5</title></rect>
+<rect x="576" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 6</title></rect>
+<rect x="584" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 7</title></rect>
+<rect x="560" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 8</title></rect>
+<rect x="568" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 9</title></rect>
+<rect x="576" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 10</title></rect>
+<rect x="584" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 11</title></rect>
+<rect x="560" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 12</title></rect>
+<rect x="568" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 13</title></rect>
+<rect x="576" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 14</title></rect>
+<rect x="584" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 15</title></rect>
+<rect x="560" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 16</title></rect>
+<rect x="568" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 17</title></rect>
+<rect x="576" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 18</title></rect>
+<rect x="584" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 19</title></rect>
+<rect x="560" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 20</title></rect>
+<rect x="568" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 21</title></rect>
+<rect x="576" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 22</title></rect>
+<rect x="584" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 23</title></rect>
+<rect x="560" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 24</title></rect>
+<rect x="568" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 25</title></rect>
+<rect x="576" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 26</title></rect>
+<rect x="584" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 27</title></rect>
+<rect x="560" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 28</title></rect>
+<rect x="568" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 29</title></rect>
+<rect x="576" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 30</title></rect>
+<rect x="584" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 31</title></rect>
+<rect x="560" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 32</title></rect>
+<rect x="568" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 33</title></rect>
+<rect x="576" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 34</title></rect>
+<rect x="584" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 35</title></rect>
+<rect x="560" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 36</title></rect>
+<rect x="568" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 37</title></rect>
+<rect x="576" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 38</title></rect>
+<rect x="584" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 39</title></rect>
+<rect x="560" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 40</title></rect>
+<rect x="568" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 41</title></rect>
+<rect x="576" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 42</title></rect>
+<rect x="584" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 43</title></rect>
+<rect x="560" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 44</title></rect>
+<rect x="568" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 45</title></rect>
+<rect x="576" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 46</title></rect>
+<rect x="584" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 47</title></rect>
+<rect x="560" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 48</title></rect>
+<rect x="568" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 49</title></rect>
+<rect x="576" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 50</title></rect>
+<rect x="584" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 51</title></rect>
+<rect x="560" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 52</title></rect>
+<rect x="568" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 53</title></rect>
+<rect x="576" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 54</title></rect>
+<rect x="584" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 55</title></rect>
+<rect x="560" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 56</title></rect>
+<rect x="568" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 57</title></rect>
+<rect x="576" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 58</title></rect>
+<rect x="584" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 59</title></rect>
+<rect x="560" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 60</title></rect>
+<rect x="568" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 61</title></rect>
+<rect x="576" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 62</title></rect>
+<rect x="584" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>32-bit ALU:
+ Unit: 63</title></rect>
+<rect x="600" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 0</title></rect>
+<rect x="608" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 1</title></rect>
+<rect x="616" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 2</title></rect>
+<rect x="624" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 3</title></rect>
+<rect x="600" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 4</title></rect>
+<rect x="608" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 5</title></rect>
+<rect x="616" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 6</title></rect>
+<rect x="624" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 7</title></rect>
+<rect x="600" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 8</title></rect>
+<rect x="608" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 9</title></rect>
+<rect x="616" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 10</title></rect>
+<rect x="624" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 11</title></rect>
+<rect x="600" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 12</title></rect>
+<rect x="608" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 13</title></rect>
+<rect x="616" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 14</title></rect>
+<rect x="624" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 15</title></rect>
+<rect x="600" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 16</title></rect>
+<rect x="608" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 17</title></rect>
+<rect x="616" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 18</title></rect>
+<rect x="624" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 19</title></rect>
+<rect x="600" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 20</title></rect>
+<rect x="608" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 21</title></rect>
+<rect x="616" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 22</title></rect>
+<rect x="624" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 23</title></rect>
+<rect x="600" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 24</title></rect>
+<rect x="608" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 25</title></rect>
+<rect x="616" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 26</title></rect>
+<rect x="624" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 27</title></rect>
+<rect x="600" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 28</title></rect>
+<rect x="608" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 29</title></rect>
+<rect x="616" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 30</title></rect>
+<rect x="624" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 31</title></rect>
+<rect x="600" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 32</title></rect>
+<rect x="608" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 33</title></rect>
+<rect x="616" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 34</title></rect>
+<rect x="624" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 35</title></rect>
+<rect x="600" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 36</title></rect>
+<rect x="608" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 37</title></rect>
+<rect x="616" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 38</title></rect>
+<rect x="624" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 39</title></rect>
+<rect x="600" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 40</title></rect>
+<rect x="608" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 41</title></rect>
+<rect x="616" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 42</title></rect>
+<rect x="624" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 43</title></rect>
+<rect x="600" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 44</title></rect>
+<rect x="608" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 45</title></rect>
+<rect x="616" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 46</title></rect>
+<rect x="624" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 47</title></rect>
+<rect x="600" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 48</title></rect>
+<rect x="608" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 49</title></rect>
+<rect x="616" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 50</title></rect>
+<rect x="624" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 51</title></rect>
+<rect x="600" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 52</title></rect>
+<rect x="608" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 53</title></rect>
+<rect x="616" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 54</title></rect>
+<rect x="624" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 55</title></rect>
+<rect x="600" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 56</title></rect>
+<rect x="608" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 57</title></rect>
+<rect x="616" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 58</title></rect>
+<rect x="624" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 59</title></rect>
+<rect x="600" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 60</title></rect>
+<rect x="608" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 61</title></rect>
+<rect x="616" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 62</title></rect>
+<rect x="624" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 63</title></rect>
+<rect x="600" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 64</title></rect>
+<rect x="608" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 65</title></rect>
+<rect x="616" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 66</title></rect>
+<rect x="624" y="208" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 67</title></rect>
+<rect x="600" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 68</title></rect>
+<rect x="608" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 69</title></rect>
+<rect x="616" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 70</title></rect>
+<rect x="624" y="216" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 71</title></rect>
+<rect x="600" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 72</title></rect>
+<rect x="608" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 73</title></rect>
+<rect x="616" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 74</title></rect>
+<rect x="624" y="224" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 75</title></rect>
+<rect x="600" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 76</title></rect>
+<rect x="608" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 77</title></rect>
+<rect x="616" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 78</title></rect>
+<rect x="624" y="232" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 79</title></rect>
+<rect x="600" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 80</title></rect>
+<rect x="608" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 81</title></rect>
+<rect x="616" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 82</title></rect>
+<rect x="624" y="248" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 83</title></rect>
+<rect x="600" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 84</title></rect>
+<rect x="608" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 85</title></rect>
+<rect x="616" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 86</title></rect>
+<rect x="624" y="256" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 87</title></rect>
+<rect x="600" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 88</title></rect>
+<rect x="608" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 89</title></rect>
+<rect x="616" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 90</title></rect>
+<rect x="624" y="264" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 91</title></rect>
+<rect x="600" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 92</title></rect>
+<rect x="608" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 93</title></rect>
+<rect x="616" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 94</title></rect>
+<rect x="624" y="272" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>16-bit ALU:
+ Unit: 95</title></rect>
+<rect x="640" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 0</title></rect>
+<rect x="648" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 1</title></rect>
+<rect x="656" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 2</title></rect>
+<rect x="664" y="48" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 3</title></rect>
+<rect x="640" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 4</title></rect>
+<rect x="648" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 5</title></rect>
+<rect x="656" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 6</title></rect>
+<rect x="664" y="56" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 7</title></rect>
+<rect x="640" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 8</title></rect>
+<rect x="648" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 9</title></rect>
+<rect x="656" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 10</title></rect>
+<rect x="664" y="64" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 11</title></rect>
+<rect x="640" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 12</title></rect>
+<rect x="648" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 13</title></rect>
+<rect x="656" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 14</title></rect>
+<rect x="664" y="72" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 15</title></rect>
+<rect x="640" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 16</title></rect>
+<rect x="648" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 17</title></rect>
+<rect x="656" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 18</title></rect>
+<rect x="664" y="88" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 19</title></rect>
+<rect x="640" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 20</title></rect>
+<rect x="648" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 21</title></rect>
+<rect x="656" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 22</title></rect>
+<rect x="664" y="96" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 23</title></rect>
+<rect x="640" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 24</title></rect>
+<rect x="648" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 25</title></rect>
+<rect x="656" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 26</title></rect>
+<rect x="664" y="104" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 27</title></rect>
+<rect x="640" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 28</title></rect>
+<rect x="648" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 29</title></rect>
+<rect x="656" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 30</title></rect>
+<rect x="664" y="112" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 31</title></rect>
+<rect x="640" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 32</title></rect>
+<rect x="648" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 33</title></rect>
+<rect x="656" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 34</title></rect>
+<rect x="664" y="128" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 35</title></rect>
+<rect x="640" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 36</title></rect>
+<rect x="648" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 37</title></rect>
+<rect x="656" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 38</title></rect>
+<rect x="664" y="136" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 39</title></rect>
+<rect x="640" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 40</title></rect>
+<rect x="648" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 41</title></rect>
+<rect x="656" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 42</title></rect>
+<rect x="664" y="144" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 43</title></rect>
+<rect x="640" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 44</title></rect>
+<rect x="648" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 45</title></rect>
+<rect x="656" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 46</title></rect>
+<rect x="664" y="152" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 47</title></rect>
+<rect x="640" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 48</title></rect>
+<rect x="648" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 49</title></rect>
+<rect x="656" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 50</title></rect>
+<rect x="664" y="168" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 51</title></rect>
+<rect x="640" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 52</title></rect>
+<rect x="648" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 53</title></rect>
+<rect x="656" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 54</title></rect>
+<rect x="664" y="176" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 55</title></rect>
+<rect x="640" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 56</title></rect>
+<rect x="648" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 57</title></rect>
+<rect x="656" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 58</title></rect>
+<rect x="664" y="184" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 59</title></rect>
+<rect x="640" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 60</title></rect>
+<rect x="648" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 61</title></rect>
+<rect x="656" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 62</title></rect>
+<rect x="664" y="192" width="8" height="8" style="stroke:black; stroke-width:1; fill:white""><title>8-bit ALU:
+ Unit: 63</title></rect>
+<text x="570" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
+<text x="610" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<text x="650" y="38" textLength="14" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<text x="722" y="54" style="fill:black; font-weight:bold;">Legend</text>
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+<line x1="720" y1="88" x2="736" y2="72" style="stroke:black; stroke-width:2" />
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+<text x="986" y="126" style="fill:black;">Ternary Match Input xbar</text>
+<text x="994" y="150" style="fill:black;"> 0 of 66 (0.00%)</text>
+<text x="986" y="174" style="fill:black;">Hash Bit</text>
+<text x="994" y="198" style="fill:black;"> 0 of 416 (0.00%)</text>
+<text x="986" y="222" style="fill:black;">Hash Dist Unit</text>
+<text x="994" y="246" style="fill:black;"> 0 of 6 (0.00%)</text>
+<text x="986" y="270" style="fill:black;">Gateway</text>
+<text x="994" y="294" style="fill:black;"> 0 of 16 (0.00%)</text>
+<text x="986" y="318" style="fill:black;">SRAM</text>
+<text x="994" y="342" style="fill:black;"> 0 of 80 (0.00%)</text>
+<text x="986" y="366" style="fill:black;">Map RAM</text>
+<text x="994" y="390" style="fill:black;"> 0 of 48 (0.00%)</text>
+<text x="986" y="414" style="fill:black;">TCAM</text>
+<text x="994" y="438" style="fill:black;"> 0 of 24 (0.00%)</text>
+<text x="986" y="462" style="fill:black;">VLIW Instr</text>
+<text x="994" y="486" style="fill:black;"> 0 of 32 (0.00%)</text>
+<text x="986" y="510" style="fill:black;">Meter ALU</text>
+<text x="994" y="534" style="fill:black;"> 0 of 4 (0.00%)</text>
+<text x="986" y="558" style="fill:black;">Stats ALU</text>
+<text x="994" y="582" style="fill:black;"> 0 of 4 (0.00%)</text>
+<text x="986" y="606" style="fill:black;">Stash</text>
+<text x="994" y="630" style="fill:black;"> 0 of 16 (0.00%)</text>
+<text x="986" y="654" style="fill:black;">Action Data Bus Bytes</text>
+<text x="994" y="678" style="fill:black;"> 0 of 128 (0.00%)</text>
+<text x="986" y="702" style="fill:black;">Logical TableID</text>
+<text x="994" y="726" style="fill:black;"> 0 of 16 (0.00%)</text>
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+<rect x="968" y="32" width="224" height="712" style="stroke:black; stroke-width:1; fill:none""></rect>
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+</svg><br>
+
<h2>MAU Stage 4</h2>
<svg width="95%" height="95%" viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
<text x="18" y="22" textLength="30" lengthAdjust="spacingAndGlyphs" textHeight="6" heightAdjust="spacingAndGlyphs" style="fill:black;">Crossbar</text>
@@ -32247,7 +32224,7 @@
</svg><br>
-<br><i>Created on Thu Sep 7 14:49:56 2017</i>
+<br><i>Created on Fri Sep 8 08:26:21 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
</div>
</body>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/parser.egress.html b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/parser.egress.html
index f928d64..17ab0ca 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/parser.egress.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/parser.egress.html
@@ -625,7 +625,7 @@
<tr><td id="row255" class="row_cell">
<a href="#row255">Row 255</a> <br><br>
-State <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start (from state <Shim start state>)<br />
+State <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start (from state <Shim start state>)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_255');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_255">Raw register data</a> <br><br><div id="reg_data_255" style="display: none;">
@@ -684,18 +684,18 @@
<tr>
<td><center>0</center></td>
<td><center>ff</center></td>
-<td><center>c</center></td>
+<td><center>9</center></td>
<td><center>7</center></td>
-<td><center>18</center></td>
+<td><center>15</center></td>
<td><center>0</center></td>
<td><center>3</center></td>
<td><center>1</center></td>
<td><center>1</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
-<td><center>a</center></td>
+<td><center>7</center></td>
<td><center>0</center></td>
-<td><center>19</center></td>
+<td><center>16</center></td>
</tr>
</table> <br>
Action: <table border=1>
@@ -772,7 +772,7 @@
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>90</center></td>
-<td><center>92</center></td>
+<td><center>1ff</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -781,13 +781,13 @@
<td><center>1ff</center></td>
<td><center>1ff</center></td>
<td><center>50</center></td>
-<td><center>51</center></td>
+<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>8</center></td>
+<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1ff</center></td>
@@ -822,8 +822,8 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
+<td><center>0</center></td>
<td><center>2</center></td>
-<td><center>7</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
</tr>
@@ -851,12 +851,6 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
<div class="tcam_arrow" style="width:54px; bottom: 0px;">16</div>
</td>
<td height=1 style="position: relative">
@@ -902,6 +896,12 @@
</td>
<td height=1 style="position: relative">
</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
<td height=40></td></tr><tr>
<td align=right><font size=-3>Bytes </font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
@@ -912,10 +912,10 @@
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>8</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>11</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>13</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>14</center></font></td>
@@ -926,9 +926,9 @@
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>19</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>20</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>21</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>22</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>23</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>24</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
@@ -939,18 +939,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">146</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">81</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">144</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -958,7 +947,16 @@
<div class="extr_arrow" style="width:27px; top: 0px;">80</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">144</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
</td>
@@ -1171,19 +1169,19 @@
<td><center>0</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
-<td><center>148</center></td>
+<td><center>14e</center></td>
<td><center>0</center></td>
-<td><center>146</center></td>
-<td><center>147</center></td>
-<td><center>104</center></td>
+<td><center>14c</center></td>
+<td><center>14d</center></td>
+<td><center>108</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>125</center></td>
+<td><center>129</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
-<td><center>124</center></td>
+<td><center>51</center></td>
+<td><center>128</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -1204,9 +1202,9 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>105</center></td>
+<td><center>109</center></td>
<td><center>0</center></td>
-<td><center>106</center></td>
+<td><center>10a</center></td>
<td><center>c</center></td>
<td><center>8</center></td>
<td><center>0</center></td>
@@ -1340,28 +1338,28 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">292</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">296</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">293</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">297</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">326</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">332</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">327</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">333</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">328</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">334</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">260</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">264</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -1370,7 +1368,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">261</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">265</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -1379,7 +1377,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">262</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">266</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -1413,7 +1411,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x8<br>
+PHV 81 <font size=+1>|=</font> 0x8<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -1973,19 +1971,19 @@
<td><center>0</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
-<td><center>14b</center></td>
+<td><center>151</center></td>
<td><center>0</center></td>
-<td><center>149</center></td>
-<td><center>14a</center></td>
-<td><center>107</center></td>
+<td><center>14f</center></td>
+<td><center>150</center></td>
+<td><center>10b</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>127</center></td>
+<td><center>12b</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
-<td><center>126</center></td>
+<td><center>51</center></td>
+<td><center>12a</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -2006,9 +2004,9 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>108</center></td>
+<td><center>10c</center></td>
<td><center>0</center></td>
-<td><center>109</center></td>
+<td><center>10d</center></td>
<td><center>c</center></td>
<td><center>8</center></td>
<td><center>0</center></td>
@@ -2140,28 +2138,28 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">294</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">298</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">295</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">299</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">329</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">335</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">330</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">336</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">331</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">337</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">263</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">267</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -2170,7 +2168,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">264</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">268</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -2179,7 +2177,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">265</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">269</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -2213,7 +2211,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x10<br>
+PHV 81 <font size=+1>|=</font> 0x10<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -2372,17 +2370,17 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
-<td><center>149</center></td>
+<td><center>150</center></td>
<td><center>1ff</center></td>
-<td><center>107</center></td>
+<td><center>10b</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>127</center></td>
+<td><center>12b</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
-<td><center>126</center></td>
+<td><center>51</center></td>
+<td><center>12a</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -2537,18 +2535,18 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">294</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">298</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">295</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">299</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">329</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">336</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">263</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">267</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -2606,7 +2604,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x20<br>
+PHV 81 <font size=+1>|=</font> 0x20<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3152,7 +3150,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
-<td><center>14e</center></td>
+<td><center>154</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
@@ -3161,7 +3159,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -3317,7 +3315,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">334</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">340</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -3383,7 +3381,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x2<br>
+PHV 81 <font size=+1>|=</font> 0x2<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3548,17 +3546,17 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
-<td><center>14c</center></td>
-<td><center>14d</center></td>
-<td><center>10a</center></td>
+<td><center>152</center></td>
+<td><center>153</center></td>
+<td><center>10e</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>129</center></td>
+<td><center>12d</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
-<td><center>128</center></td>
+<td><center>51</center></td>
+<td><center>12c</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -3579,7 +3577,7 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>10b</center></td>
+<td><center>10f</center></td>
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>8</center></td>
@@ -3714,10 +3712,10 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">296</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">300</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">266</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">270</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -3726,15 +3724,15 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">332</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">338</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">297</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">301</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">267</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">271</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -3743,7 +3741,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">333</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">339</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -3785,7 +3783,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x4<br>
+PHV 81 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3954,17 +3952,17 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
-<td><center>14c</center></td>
-<td><center>14d</center></td>
-<td><center>10a</center></td>
+<td><center>152</center></td>
+<td><center>153</center></td>
+<td><center>10e</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>129</center></td>
+<td><center>12d</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
-<td><center>128</center></td>
+<td><center>51</center></td>
+<td><center>12c</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -3985,7 +3983,7 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>10b</center></td>
+<td><center>10f</center></td>
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>8</center></td>
@@ -4120,10 +4118,10 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">296</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">300</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">266</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">270</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -4132,15 +4130,15 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">332</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">338</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">297</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">301</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">267</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">271</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -4149,7 +4147,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">333</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">339</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -4191,7 +4189,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x4<br>
+PHV 81 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -4214,7 +4212,7 @@
<tr><td id="row246" class="row_cell">
<a href="#row246">Row 246</a> <br><br>
-State parse_pkt_in (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
+State parse_pkt_in (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_246');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_246">Raw register data</a> <br><br><div id="reg_data_246" style="display: none;">
@@ -4360,7 +4358,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
-<td><center>91</center></td>
+<td><center>154</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
@@ -4369,7 +4367,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
+<td><center>51</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -4525,7 +4523,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">145</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">340</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -4591,7 +4589,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x1<br>
+PHV 81 <font size=+1>|=</font> 0x1<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -4610,7 +4608,7 @@
<tr><td id="row245" class="row_cell">
<a href="#row245">Row 245</a> <br><br>
-State default_parser (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<Metadata bridge>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
+State default_parser (from state <POV initialization>_<Egress intrinsic metadata>_<POV skip>_<_parse_bridged_ingress_intrinsic_metadata>_start)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_245">Raw register data</a> <br><br><div id="reg_data_245" style="display: none;">
@@ -5158,17 +5156,17 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
-<td><center>14c</center></td>
-<td><center>14d</center></td>
-<td><center>10a</center></td>
+<td><center>152</center></td>
+<td><center>153</center></td>
+<td><center>10e</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>129</center></td>
+<td><center>12d</center></td>
<td><center>1ff</center></td>
-<td><center>52</center></td>
-<td><center>128</center></td>
+<td><center>51</center></td>
+<td><center>12c</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -5189,7 +5187,7 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>10b</center></td>
+<td><center>10f</center></td>
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>8</center></td>
@@ -5324,10 +5322,10 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">296</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">300</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">266</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">270</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -5336,15 +5334,15 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">332</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">338</div>
</td>
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">297</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">301</div>
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">267</div>
+<div class="extr_arrow" style="width:108px; top: 0px;">271</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -5353,7 +5351,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">333</div>
+<div class="extr_arrow" style="width:54px; top: 0px;">339</div>
</td>
<td height=1 style="position: relative">
</td>
@@ -5395,7 +5393,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 82 <font size=+1>|=</font> 0x4<br>
+PHV 81 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -6641,7 +6639,7 @@
<br></td></tr>
</table>
-<br><i>Created on Thu Sep 7 14:50:00 2017</i>
+<br><i>Created on Fri Sep 8 08:26:25 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/parser.ingress.html b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/parser.ingress.html
index d9b03dc..2fd6341 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/parser.ingress.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/parser.ingress.html
@@ -1013,7 +1013,7 @@
<tr>
<th> </th></tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row245">Row 245 (state start)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row244">Row 244 (state start)</a></td>
</tr>
</table>
</div></div><br><br>
@@ -1174,10 +1174,10 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>43</center></td>
-<td><center>1ff</center></td>
-<td><center>44</center></td>
<td><center>42</center></td>
+<td><center>1ff</center></td>
+<td><center>43</center></td>
+<td><center>41</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -1333,7 +1333,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">3</div>
@@ -1350,7 +1350,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">67</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">4</div>
@@ -1404,7 +1404,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x4<br>
+PHV 67 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -1421,7 +1421,7 @@
</tr>
</table>
<br>Previous states:
-<a href="#row244">Row 244</a><br>
+<a href="#row243">Row 243</a><br>
</div></div><br><br>
</td></tr>
@@ -1582,8 +1582,8 @@
<td><center>0</center></td>
<td><center>120</center></td>
<td><center>1ff</center></td>
-<td><center>44</center></td>
-<td><center>41</center></td>
+<td><center>43</center></td>
+<td><center>40</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -1771,7 +1771,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">64</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:54px; top: 0px;">131</div>
@@ -1813,7 +1813,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x8<br>
+PHV 67 <font size=+1>|=</font> 0x8<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -1836,7 +1836,7 @@
</tr>
</table>
<br>Previous states:
-<a href="#row254">Row 254</a>, <a href="#row246">Row 246</a>, <a href="#row247">Row 247</a><br>
+<a href="#row254">Row 254</a>, <a href="#row245">Row 245</a>, <a href="#row246">Row 246</a><br>
</div></div><br><br>
</td></tr>
@@ -2223,7 +2223,7 @@
[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_252');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_252">Transitions</a> <br><br><div id="transitions_252" style="display: block;">
End<br>
<br>Previous states:
-<a href="#row254">Row 254</a>, <a href="#row246">Row 246</a>, <a href="#row247">Row 247</a><br>
+<a href="#row254">Row 254</a>, <a href="#row245">Row 245</a>, <a href="#row246">Row 246</a><br>
</div></div><br><br>
</td></tr>
@@ -2287,8 +2287,9 @@
</tr>
<tr>
<td><center>0</center></td>
+<td><center>ff</center></td>
<td><center>0</center></td>
-<td><center>14</center></td>
+<td><center>4</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2296,7 +2297,6 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>1</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>14</center></td>
@@ -2383,19 +2383,19 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>122</center></td>
-<td><center>1ff</center></td>
-<td><center>44</center></td>
+<td><center>123</center></td>
+<td><center>43</center></td>
<td><center>121</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
<td><center>0</center></td>
-<td><center>4</center></td>
-<td><center>2</center></td>
-<td><center>0</center></td>
<td><center>6</center></td>
-<td><center>1ff</center></td>
-<td><center>10</center></td>
+<td><center>4</center></td>
+<td><center>a</center></td>
+<td><center>8</center></td>
+<td><center>145</center></td>
+<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2408,9 +2408,9 @@
<td><center>0</center></td>
<td><center>102</center></td>
<td><center>0</center></td>
-<td><center>103</center></td>
+<td><center>1ff</center></td>
+<td><center>10</center></td>
<td><center>c</center></td>
-<td><center>8</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2420,7 +2420,7 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>0</center></td>
+<td><center>2</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -2524,7 +2524,7 @@
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>16</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>17</center></font></td>
<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>18</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>19</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>19</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
@@ -2546,6 +2546,11 @@
<div class="extr_arrow" style="width:27px; top: 0px;">290</div>
</td>
<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">291</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
<div class="extr_arrow" style="width:54px; top: 0px;">322</div>
</td>
<td height=1 style="position: relative">
@@ -2561,6 +2566,11 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">325</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">257</div>
</td>
<td height=1 style="position: relative">
@@ -2579,15 +2589,6 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">259</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
</td>
@@ -2613,12 +2614,18 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x10<br>
+PHV 67 <font size=+1>|=</font> 0x10<br>
<br>
</div></div><br><br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_251');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_251">Transitions</a> <br><br><div id="transitions_251" style="display: block;">
-End<br>
+<table border=0 id="transitions_table_251" class="draggable transitions_table">
+<tr>
+<th> </th></tr>
+<td>Default</td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row248">Row 248 (state parse_tcp//spilled)</a></td>
+</tr>
+</table>
<br>Previous states:
<a href="#row253">Row 253</a><br>
</div></div><br><br>
@@ -2781,7 +2788,7 @@
<td><center>0</center></td>
<td><center>122</center></td>
<td><center>1ff</center></td>
-<td><center>44</center></td>
+<td><center>43</center></td>
<td><center>121</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -3006,7 +3013,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x20<br>
+PHV 67 <font size=+1>|=</font> 0x20<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -3406,7 +3413,7 @@
<tr><td id="row248" class="row_cell">
<a href="#row248">Row 248</a> <br><br>
-State parse_pkt_out (from state default_parser)<br />
+State parse_tcp//spilled (from state parse_tcp)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_248">Raw register data</a> <br><br><div id="reg_data_248" style="display: none;">
@@ -3424,6 +3431,394 @@
</tr>
<tr>
<td><center>value</center></td>
+<td><center>4</center></td>
+<td><center>ffff</center></td>
+<td><center>ff</center></td>
+<td><center>ff</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+</tr>
+<tr>
+<td><center>mask</center></td>
+<td><center>ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+</tr>
+</table> <br>
+Early action: <table border=1>
+<tr>
+<td><center><font size=-3>ctr_amt_idx</font></center></td>
+<td><center><font size=-3>nxt_state_mask</font></center></td>
+<td><center><font size=-3>shift_amt</font></center></td>
+<td><center><font size=-3>nxt_state</font></center></td>
+<td><center><font size=-3>lookup_offset_8[1]</font></center></td>
+<td><center><font size=-3>ctr_ld_src</font></center></td>
+<td><center><font size=-3>lookup_offset_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_16</font></center></td>
+<td><center><font size=-3>ld_lookup_8[1]</font></center></td>
+<td><center><font size=-3>done</font></center></td>
+<td><center><font size=-3>lookup_offset_16</font></center></td>
+<td><center><font size=-3>ctr_load</font></center></td>
+<td><center><font size=-3>buf_req</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>14</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>14</center></td>
+</tr>
+</table> <br>
+Action: <table border=1>
+<tr>
+<td><center><font size=-3>phv_8b_src_type_3</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_2</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_0</font></center></td>
+<td><center><font size=-3>csum_addr[1]</font></center></td>
+<td><center><font size=-3>phv_16b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_dst_1</font></center></td>
+<td><center><font size=-3>pri_upd_en_shr</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_1</font></center></td>
+<td><center><font size=-3>dst_offset_rst</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_3</font></center></td>
+<td><center><font size=-3>phv_16b_src_2</font></center></td>
+<td><center><font size=-3>phv_16b_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_src_2</font></center></td>
+<td><center><font size=-3>pri_upd_src</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>csum_en[1]</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>dst_offset_inc</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>csum_addr[0]</font></center></td>
+<td><center><font size=-3>pri_upd_type</font></center></td>
+<td><center><font size=-3>phv_32b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_3</font></center></td>
+<td><center><font size=-3>phv_32b_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_src_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_0</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_2</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_32b_dst_3</font></center></td>
+<td><center><font size=-3>pri_upd_val_mask</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_3</font></center></td>
+<td><center><font size=-3>csum_en[0]</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_2</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>1ff</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>1ff</center></td>
+<td><center>124</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>3</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+</tr>
+</table> <br>
+</div></div><br><br>
+
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_248">Input buffer</a> <br><br><div id="input_buffer_248" style="display: block;">
+<div style="min-width: 1060;"></div>
+<table border=0><tr>
+<td valign=bottom align=right><font size=-3>Matches </font></td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=20></td></tr><tr>
+<td align=right><font size=-3>Bytes </font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>1</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>2</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>3</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>4</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>13</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>14</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>15</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>16</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>17</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>18</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>19</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>28</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>29</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>30</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>31</center></font></td>
+</tr><tr>
+<td valign=top align=right><font size=-3>Extractions </font></td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">292</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+</tr></table>
+<div style="height:40px;"> </div>
+</div></div><br><br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_248">Transitions</a> <br><br><div id="transitions_248" style="display: block;">
+End<br>
+<br>Previous states:
+<a href="#row251">Row 251</a><br>
+</div></div><br><br>
+</td></tr>
+
+<tr><td id="row247" class="row_cell">
+<a href="#row247">Row 247</a> <br><br>
+State parse_pkt_out (from state default_parser)<br />
+<br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_247">Raw register data</a> <br><br><div id="reg_data_247" style="display: none;">
+TCAM word: <table border=1>
+<tr>
+<td><center><font size=-3></font></center></td>
+<td><center><font size=-3>curr_state</font></center></td>
+<td><center><font size=-3>lookup_16</font></center></td>
+<td><center><font size=-3>lookup_8[1]</font></center></td>
+<td><center><font size=-3>lookup_8[0]</font></center></td>
+<td><center><font size=-3>ver_1</font></center></td>
+<td><center><font size=-3>ver_0</font></center></td>
+<td><center><font size=-3>ctr_zero</font></center></td>
+<td><center><font size=-3>ctr_neg</font></center></td>
+</tr>
+<tr>
+<td><center>value</center></td>
<td><center>6</center></td>
<td><center>fec0</center></td>
<td><center>ff</center></td>
@@ -3561,7 +3956,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>44</center></td>
+<td><center>43</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -3612,7 +4007,7 @@
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_248">Input buffer</a> <br><br><div id="input_buffer_248" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_247">Input buffer</a> <br><br><div id="input_buffer_247" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -3783,29 +4178,29 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x2<br>
+PHV 67 <font size=+1>|=</font> 0x2<br>
<br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_248');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_248">Transitions</a> <br><br><div id="transitions_248" style="display: block;">
-<table border=0 id="transitions_table_248" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_247">Transitions</a> <br><br><div id="transitions_247" style="display: block;">
+<table border=0 id="transitions_table_247" class="draggable transitions_table">
<tr>
<th> </th></tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row246">Row 246 (state parse_ethernet)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row245">Row 245 (state parse_ethernet)</a></td>
</tr>
</table>
<br>Previous states:
-<a href="#row243">Row 243</a><br>
+<a href="#row242">Row 242</a><br>
</div></div><br><br>
</td></tr>
-<tr><td id="row247" class="row_cell">
-<a href="#row247">Row 247</a> <br><br>
+<tr><td id="row246" class="row_cell">
+<a href="#row246">Row 246</a> <br><br>
State parse_ethernet (from state default_parser)<br />
<br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_247">Raw register data</a> <br><br><div id="reg_data_247" style="display: none;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_246');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_246">Raw register data</a> <br><br><div id="reg_data_246" style="display: none;">
TCAM word: <table border=1>
<tr>
<td><center><font size=-3></font></center></td>
@@ -3955,416 +4350,10 @@
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
-<td><center>43</center></td>
-<td><center>1ff</center></td>
-<td><center>44</center></td>
<td><center>42</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>c</center></td>
-<td><center>5</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
<td><center>1ff</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>4</center></td>
-<td><center>0</center></td>
-<td><center>1ff</center></td>
-<td><center>8</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1ff</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>4</center></td>
-<td><center>0</center></td>
-<td><center>7</center></td>
-</tr>
-</table> <br>
-</div></div><br><br>
-
-<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_247">Input buffer</a> <br><br><div id="input_buffer_247" style="display: block;">
-<div style="min-width: 1060;"></div>
-<table border=0><tr>
-<td valign=bottom align=right><font size=-3>Matches </font></td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="tcam_arrow" style="width:54px; bottom: 0px;">16</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=40></td></tr><tr>
-<td align=right><font size=-3>Bytes </font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>1</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>2</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>3</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>4</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
-<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>13</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>14</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>15</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>16</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>17</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>18</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>19</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>28</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>29</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>30</center></font></td>
-<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>31</center></font></td>
-</tr><tr>
-<td valign=top align=right><font size=-3>Extractions </font></td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">3</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">132</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">67</div>
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:108px; top: 0px;">4</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:54px; top: 0px;">133</div>
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-<td height=1 style="position: relative">
-</td>
-</tr></table>
-<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x4<br>
-<br>
-</div></div><br><br>
-<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_247');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_247">Transitions</a> <br><br><div id="transitions_247" style="display: block;">
-<table border=0 id="transitions_table_247" class="draggable transitions_table">
-<tr>
-<th>16b</th>
-<th> </th></tr>
-<td>0800</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row253">Row 253 (state parse_ipv4)</a></td>
-</tr>
-<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row252">Row 252 (state <leaf>)</a></td>
-</tr>
-</table>
-<br>Previous states:
-<a href="#row243">Row 243</a><br>
-</div></div><br><br>
-</td></tr>
-
-<tr><td id="row246" class="row_cell">
-<a href="#row246">Row 246</a> <br><br>
-State parse_ethernet (from state parse_pkt_out)<br />
-<br>
-<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_246');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_246">Raw register data</a> <br><br><div id="reg_data_246" style="display: none;">
-TCAM word: <table border=1>
-<tr>
-<td><center><font size=-3></font></center></td>
-<td><center><font size=-3>curr_state</font></center></td>
-<td><center><font size=-3>lookup_16</font></center></td>
-<td><center><font size=-3>lookup_8[1]</font></center></td>
-<td><center><font size=-3>lookup_8[0]</font></center></td>
-<td><center><font size=-3>ver_1</font></center></td>
-<td><center><font size=-3>ver_0</font></center></td>
-<td><center><font size=-3>ctr_zero</font></center></td>
-<td><center><font size=-3>ctr_neg</font></center></td>
-</tr>
-<tr>
-<td><center>value</center></td>
-<td><center>7</center></td>
-<td><center>ffff</center></td>
-<td><center>ff</center></td>
-<td><center>ff</center></td>
-<td><center>1</center></td>
-<td><center>1</center></td>
-<td><center>1</center></td>
-<td><center>1</center></td>
-</tr>
-<tr>
-<td><center>mask</center></td>
-<td><center>ff</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-</tr>
-</table> <br>
-Early action: <table border=1>
-<tr>
-<td><center><font size=-3>ctr_amt_idx</font></center></td>
-<td><center><font size=-3>nxt_state_mask</font></center></td>
-<td><center><font size=-3>shift_amt</font></center></td>
-<td><center><font size=-3>nxt_state</font></center></td>
-<td><center><font size=-3>lookup_offset_8[1]</font></center></td>
-<td><center><font size=-3>ctr_ld_src</font></center></td>
-<td><center><font size=-3>lookup_offset_8[0]</font></center></td>
-<td><center><font size=-3>ld_lookup_8[0]</font></center></td>
-<td><center><font size=-3>ld_lookup_16</font></center></td>
-<td><center><font size=-3>ld_lookup_8[1]</font></center></td>
-<td><center><font size=-3>done</font></center></td>
-<td><center><font size=-3>lookup_offset_16</font></center></td>
-<td><center><font size=-3>ctr_load</font></center></td>
-<td><center><font size=-3>buf_req</font></center></td>
-</tr>
-<tr>
-<td><center>0</center></td>
-<td><center>ff</center></td>
-<td><center>e</center></td>
-<td><center>2</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>c</center></td>
-<td><center>0</center></td>
-<td><center>e</center></td>
-</tr>
-</table> <br>
-Action: <table border=1>
-<tr>
-<td><center><font size=-3>phv_8b_src_type_3</font></center></td>
-<td><center><font size=-3>phv_8b_src_type_2</font></center></td>
-<td><center><font size=-3>phv_8b_src_type_1</font></center></td>
-<td><center><font size=-3>phv_8b_src_type_0</font></center></td>
-<td><center><font size=-3>csum_addr[1]</font></center></td>
-<td><center><font size=-3>phv_16b_dst_2</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_0</font></center></td>
-<td><center><font size=-3>phv_16b_dst_0</font></center></td>
-<td><center><font size=-3>phv_16b_dst_1</font></center></td>
-<td><center><font size=-3>phv_32b_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_1</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_3</font></center></td>
-<td><center><font size=-3>phv_8b_offset_add_dst_2</font></center></td>
-<td><center><font size=-3>phv_8b_dst_2</font></center></td>
-<td><center><font size=-3>phv_8b_dst_3</font></center></td>
-<td><center><font size=-3>phv_8b_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_dst_1</font></center></td>
-<td><center><font size=-3>pri_upd_en_shr</font></center></td>
-<td><center><font size=-3>phv_32b_src_type_1</font></center></td>
-<td><center><font size=-3>dst_offset_rst</font></center></td>
-<td><center><font size=-3>phv_32b_src_type_0</font></center></td>
-<td><center><font size=-3>phv_16b_src_1</font></center></td>
-<td><center><font size=-3>phv_16b_src_0</font></center></td>
-<td><center><font size=-3>phv_16b_src_3</font></center></td>
-<td><center><font size=-3>phv_16b_src_2</font></center></td>
-<td><center><font size=-3>phv_16b_dst_3</font></center></td>
-<td><center><font size=-3>phv_32b_src_2</font></center></td>
-<td><center><font size=-3>pri_upd_src</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_3</font></center></td>
-<td><center><font size=-3>phv_16b_offset_rot_imm_1</font></center></td>
-<td><center><font size=-3>csum_en[1]</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_1</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_0</font></center></td>
-<td><center><font size=-3>dst_offset_inc</font></center></td>
-<td><center><font size=-3>phv_16b_offset_add_dst_2</font></center></td>
-<td><center><font size=-3>csum_addr[0]</font></center></td>
-<td><center><font size=-3>pri_upd_type</font></center></td>
-<td><center><font size=-3>phv_32b_dst_1</font></center></td>
-<td><center><font size=-3>phv_32b_src_3</font></center></td>
-<td><center><font size=-3>phv_32b_dst_2</font></center></td>
-<td><center><font size=-3>phv_32b_src_1</font></center></td>
-<td><center><font size=-3>phv_32b_src_0</font></center></td>
-<td><center><font size=-3>phv_32b_offset_rot_imm_1</font></center></td>
-<td><center><font size=-3>phv_32b_offset_rot_imm_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_3</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_2</font></center></td>
-<td><center><font size=-3>phv_16b_offset_rot_imm_0</font></center></td>
-<td><center><font size=-3>phv_32b_dst_3</font></center></td>
-<td><center><font size=-3>pri_upd_val_mask</font></center></td>
-<td><center><font size=-3>phv_16b_src_type_1</font></center></td>
-<td><center><font size=-3>phv_16b_src_type_0</font></center></td>
-<td><center><font size=-3>phv_8b_src_3</font></center></td>
-<td><center><font size=-3>csum_en[0]</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_3</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_2</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_1</font></center></td>
-<td><center><font size=-3>phv_32b_offset_add_dst_0</font></center></td>
-<td><center><font size=-3>phv_8b_src_1</font></center></td>
-<td><center><font size=-3>phv_8b_src_0</font></center></td>
-<td><center><font size=-3>phv_8b_offset_rot_imm_1</font></center></td>
-<td><center><font size=-3>phv_8b_src_2</font></center></td>
-</tr>
-<tr>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>1</center></td>
-<td><center>0</center></td>
-<td><center>1ff</center></td>
-<td><center>0</center></td>
-<td><center>84</center></td>
-<td><center>85</center></td>
-<td><center>3</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
-<td><center>0</center></td>
<td><center>43</center></td>
-<td><center>1ff</center></td>
-<td><center>44</center></td>
-<td><center>42</center></td>
+<td><center>41</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
<td><center>1</center></td>
@@ -4520,7 +4509,7 @@
</tr><tr>
<td valign=top align=right><font size=-3>Extractions </font></td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">3</div>
@@ -4537,7 +4526,7 @@
<td height=1 style="position: relative">
</td>
<td height=1 style="position: relative">
-<div class="extr_arrow" style="width:27px; top: 0px;">67</div>
+<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
</td>
<td height=1 style="position: relative">
<div class="extr_arrow" style="width:108px; top: 0px;">4</div>
@@ -4591,7 +4580,7 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x4<br>
+PHV 67 <font size=+1>|=</font> 0x4<br>
<br>
</div></div><br><br>
<div class="data_box">
@@ -4608,13 +4597,13 @@
</tr>
</table>
<br>Previous states:
-<a href="#row248">Row 248</a><br>
+<a href="#row242">Row 242</a><br>
</div></div><br><br>
</td></tr>
<tr><td id="row245" class="row_cell">
<a href="#row245">Row 245</a> <br><br>
-State start (from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>)<br />
+State parse_ethernet (from state parse_pkt_out)<br />
<br>
<div class="data_box">
[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_245">Raw register data</a> <br><br><div id="reg_data_245" style="display: none;">
@@ -4632,6 +4621,412 @@
</tr>
<tr>
<td><center>value</center></td>
+<td><center>7</center></td>
+<td><center>ffff</center></td>
+<td><center>ff</center></td>
+<td><center>ff</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+<td><center>1</center></td>
+</tr>
+<tr>
+<td><center>mask</center></td>
+<td><center>ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+</tr>
+</table> <br>
+Early action: <table border=1>
+<tr>
+<td><center><font size=-3>ctr_amt_idx</font></center></td>
+<td><center><font size=-3>nxt_state_mask</font></center></td>
+<td><center><font size=-3>shift_amt</font></center></td>
+<td><center><font size=-3>nxt_state</font></center></td>
+<td><center><font size=-3>lookup_offset_8[1]</font></center></td>
+<td><center><font size=-3>ctr_ld_src</font></center></td>
+<td><center><font size=-3>lookup_offset_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_8[0]</font></center></td>
+<td><center><font size=-3>ld_lookup_16</font></center></td>
+<td><center><font size=-3>ld_lookup_8[1]</font></center></td>
+<td><center><font size=-3>done</font></center></td>
+<td><center><font size=-3>lookup_offset_16</font></center></td>
+<td><center><font size=-3>ctr_load</font></center></td>
+<td><center><font size=-3>buf_req</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>ff</center></td>
+<td><center>e</center></td>
+<td><center>2</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>c</center></td>
+<td><center>0</center></td>
+<td><center>e</center></td>
+</tr>
+</table> <br>
+Action: <table border=1>
+<tr>
+<td><center><font size=-3>phv_8b_src_type_3</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_2</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_type_0</font></center></td>
+<td><center><font size=-3>csum_addr[1]</font></center></td>
+<td><center><font size=-3>phv_16b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_0</font></center></td>
+<td><center><font size=-3>phv_16b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_2</font></center></td>
+<td><center><font size=-3>phv_8b_dst_3</font></center></td>
+<td><center><font size=-3>phv_8b_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_dst_1</font></center></td>
+<td><center><font size=-3>pri_upd_en_shr</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_1</font></center></td>
+<td><center><font size=-3>dst_offset_rst</font></center></td>
+<td><center><font size=-3>phv_32b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_0</font></center></td>
+<td><center><font size=-3>phv_16b_src_3</font></center></td>
+<td><center><font size=-3>phv_16b_src_2</font></center></td>
+<td><center><font size=-3>phv_16b_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_src_2</font></center></td>
+<td><center><font size=-3>pri_upd_src</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>csum_en[1]</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>dst_offset_inc</font></center></td>
+<td><center><font size=-3>phv_16b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>csum_addr[0]</font></center></td>
+<td><center><font size=-3>pri_upd_type</font></center></td>
+<td><center><font size=-3>phv_32b_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_3</font></center></td>
+<td><center><font size=-3>phv_32b_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_src_1</font></center></td>
+<td><center><font size=-3>phv_32b_src_0</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_3</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_2</font></center></td>
+<td><center><font size=-3>phv_16b_offset_rot_imm_0</font></center></td>
+<td><center><font size=-3>phv_32b_dst_3</font></center></td>
+<td><center><font size=-3>pri_upd_val_mask</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_1</font></center></td>
+<td><center><font size=-3>phv_16b_src_type_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_3</font></center></td>
+<td><center><font size=-3>csum_en[0]</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_3</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_2</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_1</font></center></td>
+<td><center><font size=-3>phv_32b_offset_add_dst_0</font></center></td>
+<td><center><font size=-3>phv_8b_src_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_0</font></center></td>
+<td><center><font size=-3>phv_8b_offset_rot_imm_1</font></center></td>
+<td><center><font size=-3>phv_8b_src_2</font></center></td>
+</tr>
+<tr>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>84</center></td>
+<td><center>85</center></td>
+<td><center>3</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>42</center></td>
+<td><center>1ff</center></td>
+<td><center>43</center></td>
+<td><center>41</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>c</center></td>
+<td><center>5</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>4</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>8</center></td>
+<td><center>1</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>1ff</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>0</center></td>
+<td><center>4</center></td>
+<td><center>0</center></td>
+<td><center>7</center></td>
+</tr>
+</table> <br>
+</div></div><br><br>
+
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_245">Input buffer</a> <br><br><div id="input_buffer_245" style="display: block;">
+<div style="min-width: 1060;"></div>
+<table border=0><tr>
+<td valign=bottom align=right><font size=-3>Matches </font></td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="tcam_arrow" style="width:54px; bottom: 0px;">16</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=40></td></tr><tr>
+<td align=right><font size=-3>Bytes </font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>0</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>1</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>2</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>3</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>4</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>5</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>6</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>7</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>8</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>9</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>10</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>11</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; "><font color=#555555 size=-1><center>12</center></font></td>
+<td bgcolor=#AAAAAA style="width: 25px; height: 25px; border-right: 2px solid black;"><font color=#555555 size=-1><center>13</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>14</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>15</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>16</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>17</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>18</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>19</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>20</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>21</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>22</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>23</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>24</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>25</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>26</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>27</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>28</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>29</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>30</center></font></td>
+<td bgcolor=#DDDDDD style="width: 25px; height: 25px; "><font color=#777777 size=-1><center>31</center></font></td>
+</tr><tr>
+<td valign=top align=right><font size=-3>Extractions </font></td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">65</div>
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:108px; top: 0px;">3</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">132</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:27px; top: 0px;">66</div>
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:108px; top: 0px;">4</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+<div class="extr_arrow" style="width:54px; top: 0px;">133</div>
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+<td height=1 style="position: relative">
+</td>
+</tr></table>
+<div style="height:40px;"> </div>
+PHV 67 <font size=+1>|=</font> 0x4<br>
+<br>
+</div></div><br><br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_245">Transitions</a> <br><br><div id="transitions_245" style="display: block;">
+<table border=0 id="transitions_table_245" class="draggable transitions_table">
+<tr>
+<th>16b</th>
+<th> </th></tr>
+<td>0800</td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row253">Row 253 (state parse_ipv4)</a></td>
+</tr>
+<td>Default</td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row252">Row 252 (state <leaf>)</a></td>
+</tr>
+</table>
+<br>Previous states:
+<a href="#row247">Row 247</a><br>
+</div></div><br><br>
+</td></tr>
+
+<tr><td id="row244" class="row_cell">
+<a href="#row244">Row 244</a> <br><br>
+State start (from state <POV initialization>_<Ingress intrinsic metadata>_<Phase 0>)<br />
+<br>
+<div class="data_box">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_244">Raw register data</a> <br><br><div id="reg_data_244" style="display: none;">
+TCAM word: <table border=1>
+<tr>
+<td><center><font size=-3></font></center></td>
+<td><center><font size=-3>curr_state</font></center></td>
+<td><center><font size=-3>lookup_16</font></center></td>
+<td><center><font size=-3>lookup_8[1]</font></center></td>
+<td><center><font size=-3>lookup_8[0]</font></center></td>
+<td><center><font size=-3>ver_1</font></center></td>
+<td><center><font size=-3>ver_0</font></center></td>
+<td><center><font size=-3>ctr_zero</font></center></td>
+<td><center><font size=-3>ctr_neg</font></center></td>
+</tr>
+<tr>
+<td><center>value</center></td>
<td><center>8</center></td>
<td><center>ffff</center></td>
<td><center>ff</center></td>
@@ -4769,7 +5164,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>44</center></td>
+<td><center>43</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -4820,7 +5215,7 @@
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_245">Input buffer</a> <br><br><div id="input_buffer_245" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_244">Input buffer</a> <br><br><div id="input_buffer_244" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -4991,20 +5386,20 @@
</td>
</tr></table>
<div style="height:20px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x40<br>
+PHV 67 <font size=+1>|=</font> 0x40<br>
<br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_245');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_245">Transitions</a> <br><br><div id="transitions_245" style="display: block;">
-<table border=0 id="transitions_table_245" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_244">Transitions</a> <br><br><div id="transitions_244" style="display: block;">
+<table border=0 id="transitions_table_244" class="draggable transitions_table">
<tr>
<th>8b[0]</th>
<th> </th></tr>
<td>00</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row244">Row 244 (state parse_pkt_in)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row243">Row 243 (state parse_pkt_in)</a></td>
</tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row243">Row 243 (state default_parser)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row242">Row 242 (state default_parser)</a></td>
</tr>
</table>
<br>Previous states:
@@ -5012,12 +5407,12 @@
</div></div><br><br>
</td></tr>
-<tr><td id="row244" class="row_cell">
-<a href="#row244">Row 244</a> <br><br>
+<tr><td id="row243" class="row_cell">
+<a href="#row243">Row 243</a> <br><br>
State parse_pkt_in (from state start)<br />
<br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_244">Raw register data</a> <br><br><div id="reg_data_244" style="display: none;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_243">Raw register data</a> <br><br><div id="reg_data_243" style="display: none;">
TCAM word: <table border=1>
<tr>
<td><center><font size=-3></font></center></td>
@@ -5169,7 +5564,7 @@
<td><center>0</center></td>
<td><center>1ff</center></td>
<td><center>1ff</center></td>
-<td><center>44</center></td>
+<td><center>43</center></td>
<td><center>1ff</center></td>
<td><center>0</center></td>
<td><center>0</center></td>
@@ -5220,7 +5615,7 @@
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_244">Input buffer</a> <br><br><div id="input_buffer_244" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_243">Input buffer</a> <br><br><div id="input_buffer_243" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -5391,12 +5786,12 @@
</td>
</tr></table>
<div style="height:40px;"> </div>
-PHV 68 <font size=+1>|=</font> 0x1<br>
+PHV 67 <font size=+1>|=</font> 0x1<br>
<br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_244');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_244">Transitions</a> <br><br><div id="transitions_244" style="display: block;">
-<table border=0 id="transitions_table_244" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_243">Transitions</a> <br><br><div id="transitions_243" style="display: block;">
+<table border=0 id="transitions_table_243" class="draggable transitions_table">
<tr>
<th> </th></tr>
<td>Default</td>
@@ -5404,16 +5799,16 @@
</tr>
</table>
<br>Previous states:
-<a href="#row245">Row 245</a><br>
+<a href="#row244">Row 244</a><br>
</div></div><br><br>
</td></tr>
-<tr><td id="row243" class="row_cell">
-<a href="#row243">Row 243</a> <br><br>
+<tr><td id="row242" class="row_cell">
+<a href="#row242">Row 242</a> <br><br>
State default_parser (from state start)<br />
<br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_243">Raw register data</a> <br><br><div id="reg_data_243" style="display: none;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('reg_data_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#reg_data_242">Raw register data</a> <br><br><div id="reg_data_242" style="display: none;">
TCAM word: <table border=1>
<tr>
<td><center><font size=-3></font></center></td>
@@ -5615,13 +6010,13 @@
</table> <br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('saved_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#saved_243">Saved matches</a> <br><br><div id="saved_243" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('saved_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#saved_242">Saved matches</a> <br><br><div id="saved_242" style="display: block;">
16b
<font size=+1><-</font>
<a href="#row255">Row 255</a><br>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_243">Input buffer</a> <br><br><div id="input_buffer_243" style="display: block;">
+[<a href="javascript:void(0)" onclick="toggle_visibility('input_buffer_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#input_buffer_242">Input buffer</a> <br><br><div id="input_buffer_242" style="display: block;">
<div style="min-width: 1060;"></div>
<table border=0><tr>
<td valign=bottom align=right><font size=-3>Matches </font></td>
@@ -5793,28 +6188,23 @@
<div style="height:20px;"> </div>
</div></div><br><br>
<div class="data_box">
-[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_243');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_243">Transitions</a> <br><br><div id="transitions_243" style="display: block;">
-<table border=0 id="transitions_table_243" class="draggable transitions_table">
+[<a href="javascript:void(0)" onclick="toggle_visibility('transitions_242');" style="text-decoration: none;"><font size=+3><b>.</b></font></a>] <a style="text-decoration: none; color: #0000FF;" href="#transitions_242">Transitions</a> <br><br><div id="transitions_242" style="display: block;">
+<table border=0 id="transitions_table_242" class="draggable transitions_table">
<tr>
<th>16b</th>
<th> </th></tr>
<td>00c0 && 01ff</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row248">Row 248 (state parse_pkt_out)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row247">Row 247 (state parse_pkt_out)</a></td>
</tr>
<td>Default</td>
-<td style="text-align: left;"> <font size=+1>-></font> <a href="#row247">Row 247 (state parse_ethernet)</a></td>
+<td style="text-align: left;"> <font size=+1>-></font> <a href="#row246">Row 246 (state parse_ethernet)</a></td>
</tr>
</table>
<br>Previous states:
-<a href="#row245">Row 245</a><br>
+<a href="#row244">Row 244</a><br>
</div></div><br><br>
</td></tr>
-<tr><td id="row242" class="row_cell">
-<a href="#row242">Row 242</a> <br><br>
-Unmatchable
-</td></tr>
-
<tr><td id="row241" class="row_cell">
<a href="#row241">Row 241</a> <br><br>
Unmatchable
@@ -7026,11 +7416,11 @@
</td></tr>
<tr><td class="row_cell">
-Matchable row occupancy: 13/256 (5.08%)
+Matchable row occupancy: 14/256 (5.47%)
<br></td></tr>
</table>
-<br><i>Created on Thu Sep 7 14:50:00 2017</i>
+<br><i>Created on Fri Sep 8 08:26:25 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/phv_allocation.html b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/phv_allocation.html
index 3c8af19..61154ef 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/phv_allocation.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/phv_allocation.html
@@ -21,2676 +21,6 @@
ipv4.hdrChecksum[15:0] in container bits [23:8]
ipv4.srcAddr[31:24] in container bits [7:0]
-</title></rect>
-<rect x="9" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 2
-
-ipv4.dstAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="9" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 3
-
-ethernet.dstAddr[39:8] in container bits [31:0]
-
-</title></rect>
-<rect x="9" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 4
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="9" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 5
-
-udp.srcPort[15:0] in container bits [31:16]
-udp.dstPort[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="9" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 6
-
-
-</title></rect>
-<rect x="9" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 7
-
-
-</title></rect>
-<rect x="27" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 8
-
-
-</title></rect>
-<rect x="27" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 9
-
-
-</title></rect>
-<rect x="27" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 10
-
-
-</title></rect>
-<rect x="27" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 11
-
-
-</title></rect>
-<rect x="27" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 12
-
-
-</title></rect>
-<rect x="27" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 13
-
-
-</title></rect>
-<rect x="27" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 14
-
-
-</title></rect>
-<rect x="27" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
- Unassigned
- Container Bit Width: 32
- Container Address: 15
-
-
-</title></rect>
-<text x="20" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="54" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 16
-
-
-</title></rect>
-<rect x="54" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 17
-
-
-</title></rect>
-<rect x="54" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 18
-
-
-</title></rect>
-<rect x="54" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 19
-
-
-</title></rect>
-<rect x="54" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 20
-
-
-</title></rect>
-<rect x="54" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 21
-
-
-</title></rect>
-<rect x="54" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 22
-
-
-</title></rect>
-<rect x="54" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 23
-
-
-</title></rect>
-<rect x="72" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 24
-
-
-</title></rect>
-<rect x="72" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 25
-
-
-</title></rect>
-<rect x="72" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 26
-
-
-</title></rect>
-<rect x="72" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 27
-
-
-</title></rect>
-<rect x="72" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 28
-
-
-</title></rect>
-<rect x="72" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 29
-
-
-</title></rect>
-<rect x="72" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 30
-
-
-</title></rect>
-<rect x="72" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
- Unassigned
- Container Bit Width: 32
- Container Address: 31
-
-
-</title></rect>
-<text x="65" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="99" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 32
-
-
-</title></rect>
-<rect x="99" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 33
-
-
-</title></rect>
-<rect x="99" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 34
-
-
-</title></rect>
-<rect x="99" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 35
-
-
-</title></rect>
-<rect x="99" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 36
-
-
-</title></rect>
-<rect x="99" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 37
-
-
-</title></rect>
-<rect x="99" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 38
-
-
-</title></rect>
-<rect x="99" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 39
-
-
-</title></rect>
-<rect x="117" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
- Unassigned
- Container Bit Width: 32
- Container Address: 40
-
-
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-
-
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-
-
-</title></rect>
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-
-</title></rect>
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-
-
-</title></rect>
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-
-
-</title></rect>
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-
-
-</title></rect>
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-
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-
-
-</title></rect>
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-
-
-</title></rect>
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-
-
-</title></rect>
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-
-
-</title></rect>
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-
-
-</title></rect>
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-
-
-</title></rect>
-<rect x="144" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
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-
-
-</title></rect>
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- Unassigned
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-
-
-</title></rect>
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-
-</title></rect>
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-
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- Unassigned
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-
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- Unassigned
- Container Bit Width: 32
- Container Address: 59
-
-
-</title></rect>
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- Unassigned
- Container Bit Width: 32
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-
-
-</title></rect>
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- Unassigned
- Container Bit Width: 32
- Container Address: 61
-
-
-</title></rect>
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- Unassigned
- Container Bit Width: 32
- Container Address: 62
-
-
-</title></rect>
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- Unassigned
- Container Bit Width: 32
- Container Address: 63
-
-
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-<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
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- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 64
-
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
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- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 65
-
-ipv4.srcAddr[23:16] in container bits [7:0]
-
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- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 66
-
-ethernet.dstAddr[47:40] in container bits [7:0]
-
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- Assigned to Ingress
- Container Bit Width: 8
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-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
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- Assigned to Ingress
- Container Bit Width: 8
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-
-POV.POV[39:32] in container bits [7:0]
-
-Field --validity_check--packet_out_hdr read by table ingress_pkt for a gateway expression
-Field --validity_check--packet_out_hdr written by table ingress_pkt's action _packet_out
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- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 68
-
-POV.POV[39:32] in container bits [7:0]
-
-Field --validity_check--packet_out_hdr read by table ingress_pkt for a gateway expression
-Field --validity_check--packet_out_hdr written by table ingress_pkt's action _packet_out
-</title></text>
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- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 69
-
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
-
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-
-
-</title></rect>
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-
-</title></rect>
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-
-
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-
-
-</title></rect>
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- Unassigned
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-
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- Unassigned
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-
-
-</title></rect>
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- Unassigned
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-
-
-</title></rect>
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- Unassigned
- Container Bit Width: 8
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-
-
-</title></rect>
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- Unassigned
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-
-
-</title></rect>
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- Unassigned
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-
-
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- Assigned to Egress
- Container Bit Width: 8
- Container Address: 80
-
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-Field ig_intr_md_for_tm.copy_to_cpu read by table egress_pkt for a gateway expression
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- Assigned to Egress
- Container Bit Width: 8
- Container Address: 80
-
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-Field ig_intr_md_for_tm.copy_to_cpu read by table egress_pkt for a gateway expression
-</title></text>
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- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
-eg_intr_md._pad7[4:0] in container bits [7:3]
-eg_intr_md.egress_cos[2:0] in container bits [2:0]
-
-</title></rect>
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- Assigned to Egress
- Container Bit Width: 8
- Container Address: 82
-
-POV.POV[7:0] in container bits [7:0]
-
-Field --validity_check--packet_in_hdr written by table egress_pkt's action add_packet_in_hdr
-</title></rect>
-<text x="236" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 82
-
-POV.POV[7:0] in container bits [7:0]
-
-Field --validity_check--packet_in_hdr written by table egress_pkt's action add_packet_in_hdr
-</title></text>
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- Unassigned
- Container Bit Width: 8
- Container Address: 83
-
-
-</title></rect>
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- Unassigned
- Container Bit Width: 8
- Container Address: 84
-
-
-</title></rect>
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- Unassigned
- Container Bit Width: 8
- Container Address: 85
-
-
-</title></rect>
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- Unassigned
- Container Bit Width: 8
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-
-
-</title></rect>
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- Unassigned
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-
-
-</title></rect>
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- Unassigned
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-
-
-</title></rect>
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- Unassigned
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- Container Address: 89
-
-
-</title></rect>
-<rect x="252" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
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-
-
-</title></rect>
-<rect x="252" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
- Unassigned
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-
-
-</title></rect>
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- Unassigned
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-
-
-</title></rect>
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- Unassigned
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-
-
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- Unassigned
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-
-
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- Unassigned
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-
-
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- Unassigned
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-
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-
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-
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-</title></rect>
-<text x="335" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="369" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 128
-
-ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
-ig_intr_md._pad1[0:0] in container bits [14:14]
-ig_intr_md._pad2[1:0] in container bits [13:12]
-ig_intr_md._pad3[2:0] in container bits [11:9]
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-</title></rect>
-<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 129
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_out_hdr.egress_port read by table ingress_pkt's action _packet_out
-</title></rect>
-<text x="371" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 129
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_out_hdr.egress_port read by table ingress_pkt's action _packet_out
-</title></text>
-<rect x="369" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 130
-
-ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md_for_tm.ucast_egress_port written by table ingress_pkt's action _packet_out
-</title></rect>
-<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 130
-
-ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md_for_tm.ucast_egress_port written by table ingress_pkt's action _packet_out
-</title></text>
-<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 131
-
-ipv4.srcAddr[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="369" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 132
-
-ethernet.dstAddr[7:0] in container bits [15:8]
-ethernet.srcAddr[47:40] in container bits [7:0]
-
-</title></rect>
-<rect x="369" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 133
-
-ethernet.etherType[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="369" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:goldenrod""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 134
-
-ecmp_metadata.groupId[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="369" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:goldenrod""><title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 135
-
-ecmp_metadata.selector[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="387" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 136
-
-
-</title></rect>
-<rect x="387" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 137
-
-
-</title></rect>
-<rect x="387" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 138
-
-
-</title></rect>
-<rect x="387" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 139
-
-
-</title></rect>
-<rect x="387" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 140
-
-
-</title></rect>
-<rect x="387" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 141
-
-
-</title></rect>
-<rect x="387" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 142
-
-
-</title></rect>
-<rect x="387" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
- Unassigned
- Container Bit Width: 16
- Container Address: 143
-
-
-</title></rect>
-<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 144
-
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md.ingress_port read by table egress_pkt's action add_packet_in_hdr
-</title></rect>
-<text x="416" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 144
-
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md.ingress_port read by table egress_pkt's action add_packet_in_hdr
-</title></text>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 145
-
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_in_hdr.ingress_port written by table egress_pkt's action add_packet_in_hdr
-</title></rect>
-<text x="416" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 145
-
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
-
-Field packet_in_hdr.ingress_port written by table egress_pkt's action add_packet_in_hdr
-</title></text>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 146
-
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
-
-</title></rect>
-<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 147
-
-
-</title></rect>
-<rect x="414" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 148
-
-
-</title></rect>
-<rect x="414" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 149
-
-
-</title></rect>
-<rect x="414" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 150
-
-
-</title></rect>
-<rect x="414" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 151
-
-
-</title></rect>
-<rect x="432" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 152
-
-
-</title></rect>
-<rect x="432" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 153
-
-
-</title></rect>
-<rect x="432" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 154
-
-
-</title></rect>
-<rect x="432" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 155
-
-
-</title></rect>
-<rect x="432" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 156
-
-
-</title></rect>
-<rect x="432" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 157
-
-
-</title></rect>
-<rect x="432" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 158
-
-
-</title></rect>
-<rect x="432" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
- Unassigned
- Container Bit Width: 16
- Container Address: 159
-
-
-</title></rect>
-<text x="425" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="459" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 160
-
-
-</title></rect>
-<rect x="459" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 161
-
-
-</title></rect>
-<rect x="459" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 162
-
-
-</title></rect>
-<rect x="459" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 163
-
-
-</title></rect>
-<rect x="459" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 164
-
-
-</title></rect>
-<rect x="459" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 165
-
-
-</title></rect>
-<rect x="459" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 166
-
-
-</title></rect>
-<rect x="459" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 167
-
-
-</title></rect>
-<rect x="477" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 168
-
-
-</title></rect>
-<rect x="477" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 169
-
-
-</title></rect>
-<rect x="477" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 170
-
-
-</title></rect>
-<rect x="477" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 171
-
-
-</title></rect>
-<rect x="477" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 172
-
-
-</title></rect>
-<rect x="477" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 173
-
-
-</title></rect>
-<rect x="477" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 174
-
-
-</title></rect>
-<rect x="477" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 10
- Unassigned
- Container Bit Width: 16
- Container Address: 175
-
-
-</title></rect>
-<text x="470" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="504" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 176
-
-
-</title></rect>
-<rect x="504" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 177
-
-
-</title></rect>
-<rect x="504" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 178
-
-
-</title></rect>
-<rect x="504" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 179
-
-
-</title></rect>
-<rect x="504" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 180
-
-
-</title></rect>
-<rect x="504" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 181
-
-
-</title></rect>
-<rect x="504" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 182
-
-
-</title></rect>
-<rect x="504" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 183
-
-
-</title></rect>
-<rect x="522" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 184
-
-
-</title></rect>
-<rect x="522" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 185
-
-
-</title></rect>
-<rect x="522" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 186
-
-
-</title></rect>
-<rect x="522" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 187
-
-
-</title></rect>
-<rect x="522" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 188
-
-
-</title></rect>
-<rect x="522" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 189
-
-
-</title></rect>
-<rect x="522" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 190
-
-
-</title></rect>
-<rect x="522" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 11
- Unassigned
- Container Bit Width: 16
- Container Address: 191
-
-
-</title></rect>
-<text x="515" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="549" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 192
-
-
-</title></rect>
-<rect x="549" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 193
-
-
-</title></rect>
-<rect x="549" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 194
-
-
-</title></rect>
-<rect x="549" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 195
-
-
-</title></rect>
-<rect x="549" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 196
-
-
-</title></rect>
-<rect x="549" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 197
-
-
-</title></rect>
-<rect x="549" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 198
-
-
-</title></rect>
-<rect x="549" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 199
-
-
-</title></rect>
-<rect x="567" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 200
-
-
-</title></rect>
-<rect x="567" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 201
-
-
-</title></rect>
-<rect x="567" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 202
-
-
-</title></rect>
-<rect x="567" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 203
-
-
-</title></rect>
-<rect x="567" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 204
-
-
-</title></rect>
-<rect x="567" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 205
-
-
-</title></rect>
-<rect x="567" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 206
-
-
-</title></rect>
-<rect x="567" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 12
- Unassigned
- Container Bit Width: 16
- Container Address: 207
-
-
-</title></rect>
-<text x="560" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="594" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 208
-
-
-</title></rect>
-<rect x="594" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 209
-
-
-</title></rect>
-<rect x="594" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 210
-
-
-</title></rect>
-<rect x="594" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 211
-
-
-</title></rect>
-<rect x="594" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 212
-
-
-</title></rect>
-<rect x="594" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 213
-
-
-</title></rect>
-<rect x="594" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 214
-
-
-</title></rect>
-<rect x="594" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 215
-
-
-</title></rect>
-<rect x="612" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 216
-
-
-</title></rect>
-<rect x="612" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 217
-
-
-</title></rect>
-<rect x="612" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 218
-
-
-</title></rect>
-<rect x="612" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 219
-
-
-</title></rect>
-<rect x="612" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 220
-
-
-</title></rect>
-<rect x="612" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 221
-
-
-</title></rect>
-<rect x="612" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 222
-
-
-</title></rect>
-<rect x="612" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 13
- Unassigned
- Container Bit Width: 16
- Container Address: 223
-
-
-</title></rect>
-<text x="605" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="729" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 256
- Tag-Along Space
-
-ipv4.identification[7:0] in container bits [31:24]
-ipv4.flags[2:0] in container bits [23:21]
-ipv4.fragOffset[12:0] in container bits [20:8]
-ipv4.ttl[7:0] in container bits [7:0]
-
-</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 257
- Tag-Along Space
-
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
-tcp.dataOffset[3:0] in container bits [31:28]
-tcp.res[2:0] in container bits [27:25]
-tcp.ecn[2:0] in container bits [24:22]
-tcp.ctrl[5:0] in container bits [21:16]
-tcp.window[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 259
- Tag-Along Space
-
-tcp.checksum[15:0] in container bits [31:16]
-tcp.urgentPtr[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 260
- Tag-Along Space
-
-ipv4.ttl[7:0] in container bits [31:24]
-ipv4.protocol[7:0] in container bits [23:16]
-ipv4.hdrChecksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 261
- Tag-Along Space
-
-ipv4.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 262
- Tag-Along Space
-
-ipv4.dstAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 263
- Tag-Along Space
-
-udp.length_[15:0] in container bits [31:16]
-tcp.ackNo[31:0] in container bits [31:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 264
- Tag-Along Space
-
-tcp.dataOffset[3:0] in container bits [31:28]
-tcp.res[2:0] in container bits [27:25]
-tcp.ecn[2:0] in container bits [24:22]
-tcp.ctrl[5:0] in container bits [21:16]
-tcp.window[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 265
- Tag-Along Space
-
-tcp.checksum[15:0] in container bits [31:16]
-tcp.urgentPtr[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 266
- Tag-Along Space
-
-ethernet.dstAddr[39:8] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
- Assigned to Egress
- Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 271
- Tag-Along Space
-
-
-</title></rect>
-<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="774" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 272
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 273
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 274
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 275
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 276
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 277
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 278
- Tag-Along Space
-
-
-</title></rect>
-<rect x="774" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 279
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 280
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 281
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 282
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 283
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 284
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 285
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 286
- Tag-Along Space
-
-
-</title></rect>
-<rect x="792" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
- Unassigned
- Container Bit Width: 32
- Container Address: 287
- Tag-Along Space
-
-
-</title></rect>
-<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 288
- Tag-Along Space
-
-ipv4.version[3:0] in container bits [7:4]
-ipv4.ihl[3:0] in container bits [3:0]
-
-</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 289
- Tag-Along Space
-
-tcp.srcPort[15:8] in container bits [7:0]
-udp.length_[15:8] in container bits [7:0]
-
-</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 290
- Tag-Along Space
-
-tcp.srcPort[7:0] in container bits [7:0]
-udp.length_[7:0] in container bits [7:0]
-
-</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 291
- Tag-Along Space
-
-
-</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 292
- Tag-Along Space
-
-ipv4.version[3:0] in container bits [7:4]
-ipv4.ihl[3:0] in container bits [3:0]
-
-</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 293
- Tag-Along Space
-
-ipv4.diffserv[7:0] in container bits [7:0]
-
-</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 294
- Tag-Along Space
-
-tcp.srcPort[15:8] in container bits [7:0]
-udp.srcPort[15:8] in container bits [7:0]
-
-</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 295
- Tag-Along Space
-
-tcp.srcPort[7:0] in container bits [7:0]
-udp.srcPort[7:0] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 296
- Tag-Along Space
-
-ethernet.dstAddr[47:40] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 301
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 302
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 303
- Tag-Along Space
-
-
-</title></rect>
-<text x="830" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="864" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 304
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 305
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 306
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 307
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 308
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 309
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 310
- Tag-Along Space
-
-
-</title></rect>
-<rect x="864" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 311
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 312
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 313
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 314
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 315
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 316
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 317
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 318
- Tag-Along Space
-
-
-</title></rect>
-<rect x="882" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
- Unassigned
- Container Bit Width: 8
- Container Address: 319
- Tag-Along Space
-
-
-</title></rect>
-<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="909" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 320
- Tag-Along Space
-
-ipv4.diffserv[7:0] in container bits [15:8]
-ipv4.totalLen[15:8] in container bits [7:0]
-
-</title></rect>
-<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 321
- Tag-Along Space
-
-ipv4.totalLen[7:0] in container bits [15:8]
-ipv4.identification[15:8] in container bits [7:0]
-
-</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 322
- Tag-Along Space
-
-tcp.dstPort[15:0] in container bits [15:0]
-udp.checksum[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 323
- Tag-Along Space
-
-tcp.seqNo[31:16] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 324
- Tag-Along Space
-
-tcp.seqNo[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 325
- Tag-Along Space
-
-
-</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 326
- Tag-Along Space
-
-ipv4.totalLen[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 327
- Tag-Along Space
-
-ipv4.identification[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 328
- Tag-Along Space
-
-ipv4.flags[2:0] in container bits [15:13]
-ipv4.fragOffset[12:0] in container bits [12:0]
-
-</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 329
- Tag-Along Space
-
-tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 330
- Tag-Along Space
-
-tcp.seqNo[31:16] in container bits [15:0]
-
-</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 331
- Tag-Along Space
-
-tcp.seqNo[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 332
- Tag-Along Space
-
-ethernet.dstAddr[7:0] in container bits [15:8]
-ethernet.srcAddr[47:40] in container bits [7:0]
-
-</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 333
- Tag-Along Space
-
-ethernet.etherType[15:0] in container bits [15:0]
-
-</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
- Assigned to Egress
- Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 340
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 341
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 342
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 343
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 344
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 345
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 346
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 347
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 348
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 349
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 350
- Tag-Along Space
-
-
-</title></rect>
-<rect x="972" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 351
- Tag-Along Space
-
-
-</title></rect>
-<text x="965" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="999" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 352
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 353
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 354
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 355
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 356
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 357
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 358
- Tag-Along Space
-
-
-</title></rect>
-<rect x="999" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 359
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 360
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 361
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 362
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 363
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 364
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 365
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 366
- Tag-Along Space
-
-
-</title></rect>
-<rect x="1017" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
- Unassigned
- Container Bit Width: 16
- Container Address: 367
- Tag-Along Space
-
-
-</title></rect>
-<text x="1010" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="0" y="0" width="1053" height="198" style="stroke:black; stroke-width:2; fill:none""></rect>
-</svg><br>
-<h2>Stage 1</h2>
-<svg viewBox="0 0 1280 200" preserveAspectRatio="xmlMidYMid meet">
-<rect x="9" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 0
-
-POV.POV[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="9" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 0
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 1
-
-ipv4.protocol[7:0] in container bits [31:24]
-ipv4.hdrChecksum[15:0] in container bits [23:8]
-ipv4.srcAddr[31:24] in container bits [7:0]
-
Field ipv4.srcAddr read by table table0 for Immediate.
Field ipv4.srcAddr read by table table0's action ecmp_group (for field list)
</title></rect>
@@ -3208,116 +538,109 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-Field ig_intr_md_for_tm.copy_to_cpu written by table table0's action send_to_cpu
-</title></rect>
-<text x="191" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 64
-
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-Field ig_intr_md_for_tm.copy_to_cpu written by table table0's action send_to_cpu
-</title></text>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 65
-
ipv4.srcAddr[23:16] in container bits [7:0]
Field ipv4.srcAddr read by table table0 for Immediate.
Field ipv4.srcAddr read by table table0's action ecmp_group (for field list)
</title></rect>
+<text x="191" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
+ Assigned to Ingress
+ Container Bit Width: 8
+ Container Address: 64
+
+ipv4.srcAddr[23:16] in container bits [7:0]
+
+Field ipv4.srcAddr read by table table0 for Immediate.
+Field ipv4.srcAddr read by table table0's action ecmp_group (for field list)
+</title></text>
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+ Assigned to Ingress
+ Container Bit Width: 8
+ Container Address: 65
+
+ethernet.dstAddr[47:40] in container bits [7:0]
+
+Field ethernet.dstAddr read by table table0 for a match key
+</title></rect>
<text x="191" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
-Field ipv4.srcAddr read by table table0 for Immediate.
-Field ipv4.srcAddr read by table table0's action ecmp_group (for field list)
+Field ethernet.dstAddr read by table table0 for a match key
</title></text>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
-Field ethernet.dstAddr read by table table0 for a match key
+Field ethernet.srcAddr read by table table0 for a match key
</title></rect>
<text x="191" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
-
-Field ethernet.dstAddr read by table table0 for a match key
-</title></text>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 67
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-Field ethernet.srcAddr read by table table0 for a match key
-</title></rect>
-<text x="191" y="79" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
- Assigned to Ingress
- Container Bit Width: 8
- Container Address: 67
-
ethernet.srcAddr[39:32] in container bits [7:0]
Field ethernet.srcAddr read by table table0 for a match key
</title></text>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 68
+ Container Address: 67
POV.POV[39:32] in container bits [7:0]
Field --validity_check--packet_out_hdr read by table table0 for a gateway expression
+Field --validity_check--packet_out_hdr written by table process_packet_out_table's action _process_packet_out
+Field --validity_check--packet_in_hdr written by table table0's action send_to_cpu
</title></rect>
-<text x="191" y="97" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 4
+<text x="191" y="79" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">RW<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 68
+ Container Address: 67
POV.POV[39:32] in container bits [7:0]
Field --validity_check--packet_out_hdr read by table table0 for a gateway expression
+Field --validity_check--packet_out_hdr written by table process_packet_out_table's action _process_packet_out
+Field --validity_check--packet_in_hdr written by table table0's action send_to_cpu
</title></text>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 69
+ Container Address: 68
ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
Field ig_intr_md_for_tm.drop_ctl written by table table0's action _drop
</title></rect>
-<text x="191" y="115" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 4
+<text x="191" y="97" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
- Container Address: 69
+ Container Address: 68
ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
Field ig_intr_md_for_tm.drop_ctl written by table table0's action _drop
</title></text>
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 69
+
+
+</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
Unassigned
Container Bit Width: 8
@@ -3389,29 +712,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -3744,6 +1066,7 @@
ig_intr_md.ingress_port[8:0] in container bits [8:0]
Field ig_intr_md.ingress_port read by table table0 for a match key
+Field ig_intr_md.ingress_port read by table table0's action send_to_cpu
</title></rect>
<text x="371" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
Assigned to Ingress
@@ -3757,6 +1080,7 @@
ig_intr_md.ingress_port[8:0] in container bits [8:0]
Field ig_intr_md.ingress_port read by table table0 for a match key
+Field ig_intr_md.ingress_port read by table table0's action send_to_cpu
</title></text>
<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 8
Assigned to Ingress
@@ -3768,7 +1092,22 @@
packet_out_hdr._padding[6:0] in container bits [6:0]
packet_in_hdr._padding[6:0] in container bits [6:0]
+Field packet_out_hdr.egress_port read by table process_packet_out_table's action _process_packet_out
+Field packet_in_hdr.ingress_port written by table table0's action send_to_cpu
</title></rect>
+<text x="371" y="43" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">RW<title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 129
+
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
+
+Field packet_out_hdr.egress_port read by table process_packet_out_table's action _process_packet_out
+Field packet_in_hdr.ingress_port written by table table0's action send_to_cpu
+</title></text>
<rect x="369" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -3776,7 +1115,9 @@
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+Field ig_intr_md_for_tm.ucast_egress_port written by table process_packet_out_table's action _process_packet_out
Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action set_egress_port
+Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action send_to_cpu
</title></rect>
<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 8
Assigned to Ingress
@@ -3785,7 +1126,9 @@
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+Field ig_intr_md_for_tm.ucast_egress_port written by table process_packet_out_table's action _process_packet_out
Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action set_egress_port
+Field ig_intr_md_for_tm.ucast_egress_port written by table table0's action send_to_cpu
</title></text>
<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 8
Assigned to Ingress
@@ -3942,30 +1285,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -4524,21 +1864,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -4546,49 +1877,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -4596,10 +1967,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -4609,64 +1980,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -4809,7 +2148,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -4819,7 +2158,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -4829,101 +2168,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -5092,174 +2433,2800 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 340
+ Tag-Along Space
+
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
+
+</title></rect>
+<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 341
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="954" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 342
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="954" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 343
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 344
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 345
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 346
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 347
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 348
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 349
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
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+ Container Address: 350
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="972" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 351
+ Tag-Along Space
+
+
+</title></rect>
+<text x="965" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
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+ Unassigned
+ Container Bit Width: 16
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+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
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+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 354
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 355
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 356
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 357
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 358
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="999" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 359
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 360
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 361
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 362
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 363
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 364
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 365
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 366
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="1017" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 22
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 367
+ Tag-Along Space
+
+
+</title></rect>
+<text x="1010" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="0" y="0" width="1053" height="198" style="stroke:black; stroke-width:2; fill:none""></rect>
+</svg><br>
+<h2>Stage 1</h2>
+<svg viewBox="0 0 1280 200" preserveAspectRatio="xmlMidYMid meet">
+<rect x="9" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 0
+ Assigned to Ingress
+ Container Bit Width: 32
+ Container Address: 0
+
+POV.POV[31:0] in container bits [31:0]
+
+</title></rect>
+<rect x="9" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 0
+ Assigned to Ingress
+ Container Bit Width: 32
+ Container Address: 1
+
+ipv4.protocol[7:0] in container bits [31:24]
+ipv4.hdrChecksum[15:0] in container bits [23:8]
+ipv4.srcAddr[31:24] in container bits [7:0]
+
+</title></rect>
+<rect x="9" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 0
+ Assigned to Ingress
+ Container Bit Width: 32
+ Container Address: 2
+
+ipv4.dstAddr[31:0] in container bits [31:0]
+
+</title></rect>
+<rect x="9" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 0
+ Assigned to Ingress
+ Container Bit Width: 32
+ Container Address: 3
+
+ethernet.dstAddr[39:8] in container bits [31:0]
+
+</title></rect>
+<rect x="9" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 0
+ Assigned to Ingress
+ Container Bit Width: 32
+ Container Address: 4
+
+ethernet.srcAddr[31:0] in container bits [31:0]
+
+</title></rect>
+<rect x="9" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 0
+ Assigned to Ingress
+ Container Bit Width: 32
+ Container Address: 5
+
+udp.srcPort[15:0] in container bits [31:16]
+udp.dstPort[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="9" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 6
+
+
+</title></rect>
+<rect x="9" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 7
+
+
+</title></rect>
+<rect x="27" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 8
+
+
+</title></rect>
+<rect x="27" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 9
+
+
+</title></rect>
+<rect x="27" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 10
+
+
+</title></rect>
+<rect x="27" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 11
+
+
+</title></rect>
+<rect x="27" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 12
+
+
+</title></rect>
+<rect x="27" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 13
+
+
+</title></rect>
+<rect x="27" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 14
+
+
+</title></rect>
+<rect x="27" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 0
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 15
+
+
+</title></rect>
+<text x="20" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
+<rect x="54" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 16
+
+
+</title></rect>
+<rect x="54" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
+ Unassigned
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+ Container Address: 17
+
+
+</title></rect>
+<rect x="54" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
+ Unassigned
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+ Container Address: 18
+
+
+</title></rect>
+<rect x="54" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
+ Unassigned
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+ Container Address: 19
+
+
+</title></rect>
+<rect x="54" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
+ Unassigned
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+ Container Address: 20
+
+
+</title></rect>
+<rect x="54" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
+ Unassigned
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+ Container Address: 21
+
+
+</title></rect>
+<rect x="54" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
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+ Container Address: 22
+
+
+</title></rect>
+<rect x="54" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 1
+ Unassigned
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+ Container Address: 23
+
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+
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+
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+
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+ Container Address: 29
+
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+</title></rect>
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+
+</title></rect>
+<rect x="117" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 44
+
+
+</title></rect>
+<rect x="117" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 45
+
+
+</title></rect>
+<rect x="117" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 46
+
+
+</title></rect>
+<rect x="117" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 2
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 47
+
+
+</title></rect>
+<text x="110" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
+<rect x="144" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 48
+
+
+</title></rect>
+<rect x="144" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 49
+
+
+</title></rect>
+<rect x="144" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 50
+
+
+</title></rect>
+<rect x="144" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 51
+
+
+</title></rect>
+<rect x="144" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 52
+
+
+</title></rect>
+<rect x="144" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 53
+
+
+</title></rect>
+<rect x="144" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 54
+
+
+</title></rect>
+<rect x="144" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 55
+
+
+</title></rect>
+<rect x="162" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 56
+
+
+</title></rect>
+<rect x="162" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 57
+
+
+</title></rect>
+<rect x="162" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 58
+
+
+</title></rect>
+<rect x="162" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 59
+
+
+</title></rect>
+<rect x="162" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 60
+
+
+</title></rect>
+<rect x="162" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 61
+
+
+</title></rect>
+<rect x="162" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 62
+
+
+</title></rect>
+<rect x="162" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 3
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 63
+
+
+</title></rect>
+<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+ Assigned to Ingress
+ Container Bit Width: 8
+ Container Address: 64
+
+ipv4.srcAddr[23:16] in container bits [7:0]
+
+</title></rect>
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+ Assigned to Ingress
+ Container Bit Width: 8
+ Container Address: 65
+
+ethernet.dstAddr[47:40] in container bits [7:0]
+
+</title></rect>
+<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+ Assigned to Ingress
+ Container Bit Width: 8
+ Container Address: 66
+
+ethernet.srcAddr[39:32] in container bits [7:0]
+
+</title></rect>
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+ Assigned to Ingress
+ Container Bit Width: 8
+ Container Address: 67
+
+POV.POV[39:32] in container bits [7:0]
+
+</title></rect>
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+ Assigned to Ingress
+ Container Bit Width: 8
+ Container Address: 68
+
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
+
+</title></rect>
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 69
+
+
+</title></rect>
+<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 70
+
+
+</title></rect>
+<rect x="189" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 71
+
+
+</title></rect>
+<rect x="207" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 72
+
+
+</title></rect>
+<rect x="207" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 73
+
+
+</title></rect>
+<rect x="207" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 74
+
+
+</title></rect>
+<rect x="207" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 75
+
+
+</title></rect>
+<rect x="207" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 76
+
+
+</title></rect>
+<rect x="207" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 77
+
+
+</title></rect>
+<rect x="207" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 78
+
+
+</title></rect>
+<rect x="207" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 79
+
+
+</title></rect>
+<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 80
+
+eg_intr_md._pad7[4:0] in container bits [7:3]
+eg_intr_md.egress_cos[2:0] in container bits [2:0]
+
+</title></rect>
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 82
+
+
+</title></rect>
+<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 83
+
+
+</title></rect>
+<rect x="234" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 84
+
+
+</title></rect>
+<rect x="234" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 85
+
+
+</title></rect>
+<rect x="234" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 86
+
+
+</title></rect>
+<rect x="234" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 87
+
+
+</title></rect>
+<rect x="252" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 88
+
+
+</title></rect>
+<rect x="252" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 89
+
+
+</title></rect>
+<rect x="252" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 90
+
+
+</title></rect>
+<rect x="252" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 91
+
+
+</title></rect>
+<rect x="252" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 92
+
+
+</title></rect>
+<rect x="252" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 93
+
+
+</title></rect>
+<rect x="252" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 94
+
+
+</title></rect>
+<rect x="252" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 95
+
+
+</title></rect>
+<text x="245" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="279" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 96
+
+
+</title></rect>
+<rect x="279" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 97
+
+
+</title></rect>
+<rect x="279" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 98
+
+
+</title></rect>
+<rect x="279" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 99
+
+
+</title></rect>
+<rect x="279" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 100
+
+
+</title></rect>
+<rect x="279" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 101
+
+
+</title></rect>
+<rect x="279" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 102
+
+
+</title></rect>
+<rect x="279" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 103
+
+
+</title></rect>
+<rect x="297" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 104
+
+
+</title></rect>
+<rect x="297" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 105
+
+
+</title></rect>
+<rect x="297" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 106
+
+
+</title></rect>
+<rect x="297" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 107
+
+
+</title></rect>
+<rect x="297" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 108
+
+
+</title></rect>
+<rect x="297" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 109
+
+
+</title></rect>
+<rect x="297" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 110
+
+
+</title></rect>
+<rect x="297" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 6
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 111
+
+
+</title></rect>
+<text x="290" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="324" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 112
+
+
+</title></rect>
+<rect x="324" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 113
+
+
+</title></rect>
+<rect x="324" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 114
+
+
+</title></rect>
+<rect x="324" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 115
+
+
+</title></rect>
+<rect x="324" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 116
+
+
+</title></rect>
+<rect x="324" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 117
+
+
+</title></rect>
+<rect x="324" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 118
+
+
+</title></rect>
+<rect x="324" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 119
+
+
+</title></rect>
+<rect x="342" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 120
+
+
+</title></rect>
+<rect x="342" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 121
+
+
+</title></rect>
+<rect x="342" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 122
+
+
+</title></rect>
+<rect x="342" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 123
+
+
+</title></rect>
+<rect x="342" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 124
+
+
+</title></rect>
+<rect x="342" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 125
+
+
+</title></rect>
+<rect x="342" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 126
+
+
+</title></rect>
+<rect x="342" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 7
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 127
+
+
+</title></rect>
+<text x="335" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
+<rect x="369" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 128
+
+ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
+ig_intr_md._pad1[0:0] in container bits [14:14]
+ig_intr_md._pad2[1:0] in container bits [13:12]
+ig_intr_md._pad3[2:0] in container bits [11:9]
+ig_intr_md.ingress_port[8:0] in container bits [8:0]
+
+</title></rect>
+<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 129
+
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
+
+</title></rect>
+<rect x="369" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 130
+
+ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+
+Field ig_intr_md_for_tm.ucast_egress_port written by table ecmp_group_table's action set_egress_port
+</title></rect>
+<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 130
+
+ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
+
+Field ig_intr_md_for_tm.ucast_egress_port written by table ecmp_group_table's action set_egress_port
+</title></text>
+<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 131
+
+ipv4.srcAddr[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="369" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 132
+
+ethernet.dstAddr[7:0] in container bits [15:8]
+ethernet.srcAddr[47:40] in container bits [7:0]
+
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+ Container Bit Width: 16
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+
+ethernet.etherType[15:0] in container bits [15:0]
+
+</title></rect>
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+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 134
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+ecmp_metadata.groupId[15:0] in container bits [15:0]
+
+Field ecmp_metadata.groupId read by table ecmp_group_table for a match key
+</title></rect>
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+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 134
+
+ecmp_metadata.groupId[15:0] in container bits [15:0]
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+Field ecmp_metadata.groupId read by table ecmp_group_table for a match key
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+ Container Bit Width: 16
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+
+ecmp_metadata.selector[15:0] in container bits [15:0]
+
+Field ecmp_metadata.selector read by table ecmp_group_table for a match key
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+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 135
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+ecmp_metadata.selector[15:0] in container bits [15:0]
+
+Field ecmp_metadata.selector read by table ecmp_group_table for a match key
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+
+
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+ Container Address: 142
+
+
+</title></rect>
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+
+
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+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 144
+
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
+
+</title></rect>
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+ Container Address: 145
+
+
+</title></rect>
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+
+</title></rect>
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+ Unassigned
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+ Container Address: 147
+
+
+</title></rect>
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+
+
+</title></rect>
+<rect x="414" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
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+</title></rect>
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+ Unassigned
+ Container Bit Width: 16
+ Container Address: 150
+
+
+</title></rect>
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+
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+</title></rect>
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+
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+</title></rect>
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+</title></rect>
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+ Container Address: 158
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+
+
+</title></rect>
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+ipv4.flags[2:0] in container bits [23:21]
+ipv4.fragOffset[12:0] in container bits [20:8]
+ipv4.ttl[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
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+ Container Bit Width: 32
+ Container Address: 257
+ Tag-Along Space
+
+tcp.dataOffset[3:0] in container bits [31:28]
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+tcp.ctrl[5:0] in container bits [21:16]
+tcp.window[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
+ Assigned to Ingress
+ Container Bit Width: 32
+ Container Address: 258
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+
+tcp.checksum[15:0] in container bits [31:16]
+tcp.urgentPtr[15:0] in container bits [15:0]
+
+</title></rect>
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+
+</title></rect>
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+
+</title></rect>
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+
+</title></rect>
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+
+</title></rect>
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+
+</title></rect>
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+ Container Bit Width: 32
+ Container Address: 264
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+
+ipv4.ttl[7:0] in container bits [31:24]
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+
+</title></rect>
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
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+ Container Bit Width: 32
+ Container Address: 265
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+ipv4.srcAddr[31:0] in container bits [31:0]
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+</title></rect>
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
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+ipv4.dstAddr[31:0] in container bits [31:0]
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+</title></rect>
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+
+udp.length_[15:0] in container bits [31:16]
+tcp.ackNo[31:0] in container bits [31:0]
+udp.checksum[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
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+ Container Bit Width: 32
+ Container Address: 268
+ Tag-Along Space
+
+tcp.dataOffset[3:0] in container bits [31:28]
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+tcp.ecn[2:0] in container bits [24:22]
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+</title></rect>
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 269
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+
+tcp.checksum[15:0] in container bits [31:16]
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+</title></rect>
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 270
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+
+ethernet.dstAddr[39:8] in container bits [31:0]
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+</title></rect>
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+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 271
+ Tag-Along Space
+
+ethernet.srcAddr[31:0] in container bits [31:0]
+
+</title></rect>
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+</title></rect>
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+
+</title></rect>
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+
+
+</title></rect>
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+
+</title></rect>
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+
+</title></rect>
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+ Unassigned
+ Container Bit Width: 32
+ Container Address: 277
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="774" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
+ Unassigned
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+
+
+</title></rect>
+<rect x="774" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
+ Unassigned
+ Container Bit Width: 32
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+
+
+</title></rect>
+<rect x="792" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 280
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="792" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 281
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="792" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
+ Unassigned
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+
+
+</title></rect>
+<rect x="792" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 283
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+
+
+</title></rect>
+<rect x="792" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 284
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="792" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
+ Unassigned
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+ Container Address: 285
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+
+
+</title></rect>
+<rect x="792" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 286
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="792" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 17
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 287
+ Tag-Along Space
+
+
+</title></rect>
+<text x="785" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
+<rect x="819" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Ingress
+ Container Bit Width: 8
+ Container Address: 288
+ Tag-Along Space
+
+ipv4.version[3:0] in container bits [7:4]
+ipv4.ihl[3:0] in container bits [3:0]
+
+</title></rect>
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
+ Container Bit Width: 8
+ Container Address: 289
+ Tag-Along Space
+
+tcp.srcPort[15:8] in container bits [7:0]
+udp.length_[15:8] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
+ Container Bit Width: 8
+ Container Address: 290
+ Tag-Along Space
+
+tcp.srcPort[7:0] in container bits [7:0]
+udp.length_[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
+ Container Bit Width: 8
+ Container Address: 291
+ Tag-Along Space
+
+tcp.dstPort[15:8] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
+ Container Bit Width: 8
+ Container Address: 292
+ Tag-Along Space
+
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
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+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
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+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
+ipv4.version[3:0] in container bits [7:4]
+ipv4.ihl[3:0] in container bits [3:0]
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+</title></rect>
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 297
+ Tag-Along Space
+
+ipv4.diffserv[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 298
+ Tag-Along Space
+
+tcp.srcPort[15:8] in container bits [7:0]
+udp.srcPort[15:8] in container bits [7:0]
+
+</title></rect>
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 299
+ Tag-Along Space
+
+tcp.srcPort[7:0] in container bits [7:0]
+udp.srcPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 300
+ Tag-Along Space
+
+ethernet.dstAddr[47:40] in container bits [7:0]
+
+</title></rect>
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 301
+ Tag-Along Space
+
+ethernet.srcAddr[39:32] in container bits [7:0]
+
+</title></rect>
+<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
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+ Container Address: 302
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+
+
+</title></rect>
+<rect x="837" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 303
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+
+
+</title></rect>
+<text x="830" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
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+ Unassigned
+ Container Bit Width: 8
+ Container Address: 304
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 305
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
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+
+</title></rect>
+<rect x="864" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
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+
+
+</title></rect>
+<rect x="864" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
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+
+</title></rect>
+<rect x="864" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
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+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
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+ Tag-Along Space
+
+
+</title></rect>
+<rect x="864" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
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+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 312
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
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+
+
+</title></rect>
+<rect x="882" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
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+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
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+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
+ Container Bit Width: 8
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+ Tag-Along Space
+
+
+</title></rect>
+<rect x="882" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
+ Unassigned
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+
+
+</title></rect>
+<rect x="882" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
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+
+</title></rect>
+<rect x="882" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 19
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+
+</title></rect>
+<text x="875" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
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+ Assigned to Ingress
+ Container Bit Width: 16
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+ Tag-Along Space
+
+ipv4.diffserv[7:0] in container bits [15:8]
+ipv4.totalLen[15:8] in container bits [7:0]
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+</title></rect>
+<rect x="909" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
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+
+ipv4.totalLen[7:0] in container bits [15:8]
+ipv4.identification[15:8] in container bits [7:0]
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+</title></rect>
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 322
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+
+tcp.seqNo[31:16] in container bits [15:0]
+udp.checksum[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 323
+ Tag-Along Space
+
+tcp.seqNo[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 324
+ Tag-Along Space
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+tcp.ackNo[31:16] in container bits [15:0]
+
+</title></rect>
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 325
+ Tag-Along Space
+
+tcp.ackNo[15:0] in container bits [15:0]
+
+</title></rect>
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+ Unassigned
+ Container Bit Width: 16
+ Container Address: 326
+ Tag-Along Space
+
+
+</title></rect>
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+ Tag-Along Space
+
+
+</title></rect>
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+
+</title></rect>
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+
+</title></rect>
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+
+</title></rect>
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+
+</title></rect>
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+ Assigned to Egress
+ Container Bit Width: 16
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+ Tag-Along Space
+
+ipv4.totalLen[15:0] in container bits [15:0]
+
+</title></rect>
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+ Assigned to Egress
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+ Container Address: 333
+ Tag-Along Space
+
+ipv4.identification[15:0] in container bits [15:0]
+
+</title></rect>
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
Container Address: 334
Tag-Along Space
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
+ipv4.flags[2:0] in container bits [15:13]
+ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Egress
Container Bit Width: 16
Container Address: 335
Tag-Along Space
+tcp.dstPort[15:0] in container bits [15:0]
</title></rect>
<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
+ Assigned to Egress
Container Bit Width: 16
Container Address: 336
Tag-Along Space
+tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
+ Assigned to Egress
Container Bit Width: 16
Container Address: 337
Tag-Along Space
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
+ Assigned to Egress
Container Bit Width: 16
Container Address: 338
Tag-Along Space
+ethernet.dstAddr[7:0] in container bits [15:8]
+ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
+ Assigned to Egress
Container Bit Width: 16
Container Address: 339
Tag-Along Space
+ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
+ Assigned to Egress
Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -5945,20 +5912,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -5966,31 +5933,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -6064,29 +6030,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -6418,7 +6383,21 @@
ig_intr_md._pad3[2:0] in container bits [11:9]
ig_intr_md.ingress_port[8:0] in container bits [8:0]
+Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
</title></rect>
+<text x="371" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
+ Assigned to Ingress
+ Container Bit Width: 16
+ Container Address: 128
+
+ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
+ig_intr_md._pad1[0:0] in container bits [14:14]
+ig_intr_md._pad2[1:0] in container bits [13:12]
+ig_intr_md._pad3[2:0] in container bits [11:9]
+ig_intr_md.ingress_port[8:0] in container bits [8:0]
+
+Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
+</title></text>
<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -6437,16 +6416,18 @@
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-Field ig_intr_md_for_tm.ucast_egress_port written by table ecmp_group_table's action set_egress_port
+Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
+Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
</title></rect>
-<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">W<title>PHV Group: 8
+<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
Container Address: 130
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-Field ig_intr_md_for_tm.ucast_egress_port written by table ecmp_group_table's action set_egress_port
+Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
+Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
</title></text>
<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 8
Assigned to Ingress
@@ -6480,17 +6461,7 @@
ecmp_metadata.groupId[15:0] in container bits [15:0]
-Field ecmp_metadata.groupId read by table ecmp_group_table for a match key
</title></rect>
-<text x="371" y="133" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 134
-
-ecmp_metadata.groupId[15:0] in container bits [15:0]
-
-Field ecmp_metadata.groupId read by table ecmp_group_table for a match key
-</title></text>
<rect x="369" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:goldenrod""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -6498,17 +6469,7 @@
ecmp_metadata.selector[15:0] in container bits [15:0]
-Field ecmp_metadata.selector read by table ecmp_group_table for a match key
</title></rect>
-<text x="371" y="151" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 135
-
-ecmp_metadata.selector[15:0] in container bits [15:0]
-
-Field ecmp_metadata.selector read by table ecmp_group_table for a match key
-</title></text>
<rect x="387" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 8
Unassigned
Container Bit Width: 16
@@ -6566,30 +6527,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -7148,21 +7106,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -7170,49 +7119,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -7220,10 +7209,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -7233,64 +7222,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -7433,7 +7390,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -7443,7 +7400,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -7453,101 +7410,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -7716,174 +7675,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -8569,20 +8531,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -8590,31 +8552,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -8688,29 +8649,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -9042,21 +9002,7 @@
ig_intr_md._pad3[2:0] in container bits [11:9]
ig_intr_md.ingress_port[8:0] in container bits [8:0]
-Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
</title></rect>
-<text x="371" y="25" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 128
-
-ig_intr_md.resubmit_flag[0:0] in container bits [15:15]
-ig_intr_md._pad1[0:0] in container bits [14:14]
-ig_intr_md._pad2[1:0] in container bits [13:12]
-ig_intr_md._pad3[2:0] in container bits [11:9]
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md.ingress_port read by table ingress_port_count_table's action count_ingress
-</title></text>
<rect x="369" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -9075,19 +9021,7 @@
ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
-Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
</title></rect>
-<text x="371" y="61" textLength="11" lengthAdjust="spacingAndGlyphs" textHeight="11" heightAdjust="spacingAndGlyphs" style="fill:black;">R<title>PHV Group: 8
- Assigned to Ingress
- Container Bit Width: 16
- Container Address: 130
-
-ig_intr_md_for_tm.ucast_egress_port[8:0] in container bits [8:0]
-
-Field ig_intr_md_for_tm.ucast_egress_port read by table ingress_port_count_table for a gateway expression
-Field ig_intr_md_for_tm.ucast_egress_port read by table egress_port_count_table's action count_egress
-</title></text>
<rect x="369" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 8
Assigned to Ingress
Container Bit Width: 16
@@ -9186,30 +9120,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -9768,21 +9699,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -9790,49 +9712,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -9840,10 +9802,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -9853,64 +9815,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -10053,7 +9983,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -10063,7 +9993,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -10073,101 +10003,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -10336,174 +10268,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -11189,20 +11124,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -11210,31 +11145,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -11308,29 +11242,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -11780,30 +11713,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -12362,21 +12292,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -12384,49 +12305,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -12434,10 +12395,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -12447,64 +12408,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -12647,7 +12576,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -12657,7 +12586,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -12667,101 +12596,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -12930,174 +12861,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -13783,20 +13717,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -13804,31 +13738,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -13902,29 +13835,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -14374,30 +14306,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -14956,21 +14885,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -14978,49 +14898,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -15028,10 +14988,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -15041,64 +15001,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -15241,7 +15169,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -15251,7 +15179,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -15261,101 +15189,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -15524,174 +15454,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -16377,20 +16310,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -16398,31 +16331,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -16496,29 +16428,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -16968,30 +16899,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -17550,21 +17478,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -17572,49 +17491,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -17622,10 +17581,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -17635,64 +17594,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -17835,7 +17762,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -17845,7 +17772,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -17855,101 +17782,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -18118,174 +18047,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -18971,20 +18903,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -18992,31 +18924,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -19090,29 +19021,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -19562,30 +19492,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -20144,21 +20071,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -20166,49 +20084,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -20216,10 +20174,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -20229,64 +20187,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -20429,7 +20355,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -20439,7 +20365,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -20449,101 +20375,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -20712,174 +20640,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -21565,20 +21496,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -21586,31 +21517,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -21684,29 +21614,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -22156,30 +22085,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -22738,21 +22664,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -22760,49 +22677,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -22810,10 +22767,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -22823,64 +22780,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -23023,7 +22948,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -23033,7 +22958,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -23043,101 +22968,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -23306,174 +23233,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -24159,20 +24089,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -24180,31 +24110,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -24278,29 +24207,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -24750,30 +24678,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -25332,21 +25257,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -25354,49 +25270,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -25404,10 +25360,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -25417,64 +25373,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -25617,7 +25541,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -25627,7 +25551,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -25637,101 +25561,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -25900,174 +25826,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -26753,20 +26682,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -26774,31 +26703,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -26872,29 +26800,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -27344,30 +27271,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -27926,21 +27850,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -27948,49 +27863,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -27998,10 +27953,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -28011,64 +27966,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -28211,7 +28134,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -28221,7 +28144,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -28231,101 +28154,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -28494,174 +28419,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -29347,20 +29275,20 @@
</title></rect>
<text x="155" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
-<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
+<rect x="189" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 64
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
+ipv4.srcAddr[23:16] in container bits [7:0]
</title></rect>
-<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 4
+<rect x="189" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 65
-ipv4.srcAddr[23:16] in container bits [7:0]
+ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
<rect x="189" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
@@ -29368,31 +29296,30 @@
Container Bit Width: 8
Container Address: 66
-ethernet.dstAddr[47:40] in container bits [7:0]
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 4
+<rect x="189" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 67
-ethernet.srcAddr[39:32] in container bits [7:0]
+POV.POV[39:32] in container bits [7:0]
</title></rect>
-<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 4
+<rect x="189" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
Assigned to Ingress
Container Bit Width: 8
Container Address: 68
-POV.POV[39:32] in container bits [7:0]
+ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
-<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 4
- Assigned to Ingress
+<rect x="189" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
+ Unassigned
Container Bit Width: 8
Container Address: 69
-ig_intr_md_for_tm.drop_ctl[2:0] in container bits [7:5]
</title></rect>
<rect x="189" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 4
@@ -29466,29 +29393,28 @@
</title></rect>
<text x="200" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">8</text>
-<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:beige""><title>PHV Group: 5
+<rect x="234" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
Container Address: 80
-ig_intr_md_for_tm.copy_to_cpu[0:0] in container bits [0:0]
-
-</title></rect>
-<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 5
- Assigned to Egress
- Container Bit Width: 8
- Container Address: 81
-
eg_intr_md._pad7[4:0] in container bits [7:3]
eg_intr_md.egress_cos[2:0] in container bits [2:0]
</title></rect>
-<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
+<rect x="234" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkred""><title>PHV Group: 5
Assigned to Egress
Container Bit Width: 8
+ Container Address: 81
+
+POV.POV[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="234" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
+ Unassigned
+ Container Bit Width: 8
Container Address: 82
-POV.POV[7:0] in container bits [7:0]
</title></rect>
<rect x="234" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 5
@@ -29938,30 +29864,27 @@
</title></rect>
<text x="380" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deepskyblue""><title>PHV Group: 9
+<rect x="414" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
Assigned to Egress
Container Bit Width: 16
Container Address: 144
-ig_intr_md.ingress_port[8:0] in container bits [8:0]
+eg_intr_md._pad0[6:0] in container bits [15:9]
+eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
-<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 145
-packet_in_hdr.ingress_port[8:0] in container bits [15:7]
-packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
-<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:deeppink""><title>PHV Group: 9
- Assigned to Egress
+<rect x="414" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
+ Unassigned
Container Bit Width: 16
Container Address: 146
-eg_intr_md._pad0[6:0] in container bits [15:9]
-eg_intr_md.egress_port[8:0] in container bits [8:0]
</title></rect>
<rect x="414" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 9
@@ -30520,21 +30443,12 @@
ipv4.ttl[7:0] in container bits [7:0]
</title></rect>
-<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
Container Address: 257
Tag-Along Space
-tcp.ackNo[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
- Assigned to Ingress
- Container Bit Width: 32
- Container Address: 258
- Tag-Along Space
-
tcp.dataOffset[3:0] in container bits [31:28]
tcp.res[2:0] in container bits [27:25]
tcp.ecn[2:0] in container bits [24:22]
@@ -30542,49 +30456,89 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="729" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Ingress
Container Bit Width: 32
- Container Address: 259
+ Container Address: 258
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
- Assigned to Egress
+<rect x="729" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 259
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
Container Bit Width: 32
Container Address: 260
Tag-Along Space
+
+</title></rect>
+<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 261
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 262
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
+ Unassigned
+ Container Bit Width: 32
+ Container Address: 263
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+ Assigned to Egress
+ Container Bit Width: 32
+ Container Address: 264
+ Tag-Along Space
+
ipv4.ttl[7:0] in container bits [31:24]
ipv4.protocol[7:0] in container bits [23:16]
ipv4.hdrChecksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="729" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 261
+ Container Address: 265
Tag-Along Space
ipv4.srcAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
+<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 262
+ Container Address: 266
Tag-Along Space
ipv4.dstAddr[31:0] in container bits [31:0]
</title></rect>
-<rect x="729" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
+<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkturquoise""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 263
+ Container Address: 267
Tag-Along Space
udp.length_[15:0] in container bits [31:16]
@@ -30592,10 +30546,10 @@
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 264
+ Container Address: 268
Tag-Along Space
tcp.dataOffset[3:0] in container bits [31:28]
@@ -30605,64 +30559,32 @@
tcp.window[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 16
+<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 265
+ Container Address: 269
Tag-Along Space
tcp.checksum[15:0] in container bits [31:16]
tcp.urgentPtr[15:0] in container bits [15:0]
</title></rect>
-<rect x="747" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 266
+ Container Address: 270
Tag-Along Space
ethernet.dstAddr[39:8] in container bits [31:0]
</title></rect>
-<rect x="747" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
+<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 16
Assigned to Egress
Container Bit Width: 32
- Container Address: 267
- Tag-Along Space
-
-ethernet.srcAddr[31:0] in container bits [31:0]
-
-</title></rect>
-<rect x="747" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 268
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 269
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
- Container Address: 270
- Tag-Along Space
-
-
-</title></rect>
-<rect x="747" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 16
- Unassigned
- Container Bit Width: 32
Container Address: 271
Tag-Along Space
+ethernet.srcAddr[31:0] in container bits [31:0]
</title></rect>
<text x="740" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">32</text>
@@ -30805,7 +30727,7 @@
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 289
@@ -30815,7 +30737,7 @@
udp.length_[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="819" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Ingress
Container Bit Width: 8
Container Address: 290
@@ -30825,101 +30747,103 @@
udp.length_[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
+<rect x="819" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 291
Tag-Along Space
+tcp.dstPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
- Assigned to Egress
+<rect x="819" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
+ Assigned to Ingress
Container Bit Width: 8
Container Address: 292
Tag-Along Space
+tcp.dstPort[7:0] in container bits [7:0]
+
+</title></rect>
+<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 293
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 294
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
+ Unassigned
+ Container Bit Width: 8
+ Container Address: 295
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+ Assigned to Egress
+ Container Bit Width: 8
+ Container Address: 296
+ Tag-Along Space
+
ipv4.version[3:0] in container bits [7:4]
ipv4.ihl[3:0] in container bits [3:0]
</title></rect>
-<rect x="819" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
+<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 293
+ Container Address: 297
Tag-Along Space
ipv4.diffserv[7:0] in container bits [7:0]
</title></rect>
-<rect x="819" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 294
+ Container Address: 298
Tag-Along Space
tcp.srcPort[15:8] in container bits [7:0]
udp.srcPort[15:8] in container bits [7:0]
</title></rect>
-<rect x="819" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 18
+<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 295
+ Container Address: 299
Tag-Along Space
tcp.srcPort[7:0] in container bits [7:0]
udp.srcPort[7:0] in container bits [7:0]
</title></rect>
-<rect x="837" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 296
+ Container Address: 300
Tag-Along Space
ethernet.dstAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="837" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
+<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 18
Assigned to Egress
Container Bit Width: 8
- Container Address: 297
- Tag-Along Space
-
-ethernet.srcAddr[39:32] in container bits [7:0]
-
-</title></rect>
-<rect x="837" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 298
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 299
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
- Container Address: 300
- Tag-Along Space
-
-
-</title></rect>
-<rect x="837" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
- Unassigned
- Container Bit Width: 8
Container Address: 301
Tag-Along Space
+ethernet.srcAddr[39:32] in container bits [7:0]
</title></rect>
<rect x="837" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 18
@@ -31088,174 +31012,177 @@
ipv4.identification[15:8] in container bits [7:0]
</title></rect>
-<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 322
Tag-Along Space
-tcp.dstPort[15:0] in container bits [15:0]
+tcp.seqNo[31:16] in container bits [15:0]
udp.checksum[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 323
Tag-Along Space
-tcp.seqNo[31:16] in container bits [15:0]
+tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="909" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Ingress
Container Bit Width: 16
Container Address: 324
Tag-Along Space
-tcp.seqNo[15:0] in container bits [15:0]
+tcp.ackNo[31:16] in container bits [15:0]
</title></rect>
-<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
+<rect x="909" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
+ Assigned to Ingress
Container Bit Width: 16
Container Address: 325
Tag-Along Space
+tcp.ackNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
- Assigned to Egress
+<rect x="909" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
Container Bit Width: 16
Container Address: 326
Tag-Along Space
+
+</title></rect>
+<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 327
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 328
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 329
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 330
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
+ Unassigned
+ Container Bit Width: 16
+ Container Address: 331
+ Tag-Along Space
+
+
+</title></rect>
+<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+ Assigned to Egress
+ Container Bit Width: 16
+ Container Address: 332
+ Tag-Along Space
+
ipv4.totalLen[15:0] in container bits [15:0]
</title></rect>
-<rect x="909" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 327
+ Container Address: 333
Tag-Along Space
ipv4.identification[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
+<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:darksalmon""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 328
+ Container Address: 334
Tag-Along Space
ipv4.flags[2:0] in container bits [15:13]
ipv4.fragOffset[12:0] in container bits [12:0]
</title></rect>
-<rect x="927" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 20
Assigned to Egress
Container Bit Width: 16
- Container Address: 329
+ Container Address: 335
Tag-Along Space
tcp.dstPort[15:0] in container bits [15:0]
-udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
+<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 330
+ Container Address: 336
Tag-Along Space
tcp.seqNo[31:16] in container bits [15:0]
+udp.dstPort[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:khaki""><title>PHV Group: 20
+<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:greenyellow""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 331
+ Container Address: 337
Tag-Along Space
tcp.seqNo[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 332
+ Container Address: 338
Tag-Along Space
ethernet.dstAddr[7:0] in container bits [15:8]
ethernet.srcAddr[47:40] in container bits [7:0]
</title></rect>
-<rect x="927" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 20
+<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:darkseagreen""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 333
+ Container Address: 339
Tag-Along Space
ethernet.etherType[15:0] in container bits [15:0]
</title></rect>
-<rect x="927" y="117" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 20
+<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:gold""><title>PHV Group: 21
Assigned to Egress
Container Bit Width: 16
- Container Address: 334
- Tag-Along Space
-
-packet_out_hdr.egress_port[8:0] in container bits [15:7]
-packet_out_hdr._padding[6:0] in container bits [6:0]
-
-</title></rect>
-<rect x="927" y="135" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 20
- Unassigned
- Container Bit Width: 16
- Container Address: 335
- Tag-Along Space
-
-
-</title></rect>
-<text x="920" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
-<rect x="954" y="9" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 336
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="27" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 337
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="45" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 338
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="63" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
- Container Address: 339
- Tag-Along Space
-
-
-</title></rect>
-<rect x="954" y="81" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
- Unassigned
- Container Bit Width: 16
Container Address: 340
Tag-Along Space
+packet_out_hdr.egress_port[8:0] in container bits [15:7]
+packet_in_hdr.ingress_port[8:0] in container bits [15:7]
+packet_out_hdr._padding[6:0] in container bits [6:0]
+packet_in_hdr._padding[6:0] in container bits [6:0]
</title></rect>
<rect x="954" y="99" width="18" height="18" style="stroke:black; stroke-width:1; fill:white""><title>PHV Group: 21
@@ -31478,7 +31405,7 @@
<text x="1010" y="178" textLength="16" lengthAdjust="spacingAndGlyphs" textHeight="16" heightAdjust="spacingAndGlyphs" style="fill:black;">16</text>
<rect x="0" y="0" width="1053" height="198" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
-<br><i>Created on Thu Sep 7 14:49:56 2017</i>
+<br><i>Created on Fri Sep 8 08:26:22 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
</body>
</html>
\ No newline at end of file
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/table_placement.html b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/table_placement.html
index 21a44b4..9ea46b3 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/table_placement.html
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/ecmp/montara/visualization/table_placement.html
@@ -4,10 +4,13 @@
<h2>Pipeline 0</h2>
<svg viewBox="0 0 1280 800" preserveAspectRatio="xmlMidYMid meet">
-<rect x="0" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
-<rect x="13" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
-<rect x="26" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
-<rect x="39" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="0" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:aquamarine""><title>SRAM for table0__action__</title></rect>
+<rect x="0" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:blue""><title>TCAM for table0</title></rect>
+<rect x="13" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:blue""><title>TCAM for table0</title></rect>
+<rect x="26" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:blue""><title>TCAM for table0</title></rect>
+<rect x="13" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:blue""><title>SRAM for table0</title></rect>
+<rect x="26" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:blueviolet""><title>SRAM for table0_counter</title></rect>
+<rect x="39" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:blueviolet""><title>SRAM for table0_counter</title></rect>
<rect x="52" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="65" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="78" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
@@ -84,9 +87,6 @@
<rect x="65" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="78" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="91" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
-<rect x="0" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
-<rect x="13" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
-<rect x="26" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="39" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="52" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="65" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
@@ -110,14 +110,11 @@
<rect x="91" y="195" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="0" y="26" width="104" height="182" style="stroke:black; stroke-width:2; fill:none""></rect>
<text x="41" y="245" textLength="24" lengthAdjust="spacingAndGlyphs" textHeight="24" heightAdjust="spacingAndGlyphs" style="fill:black;">0</text>
-<rect x="117" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:blueviolet""><title>SRAM for table0__action__</title></rect>
-<rect x="117" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:yellow""><title>TCAM for table0</title></rect>
-<rect x="130" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:yellow""><title>TCAM for table0</title></rect>
-<rect x="143" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:yellow""><title>TCAM for table0</title></rect>
-<rect x="130" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:yellow""><title>SRAM for table0</title></rect>
-<rect x="143" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:burlywood""><title>SRAM for table0_counter</title></rect>
-<rect x="156" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:burlywood""><title>SRAM for table0_counter</title></rect>
-<rect x="169" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="117" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chartreuse""><title>SRAM for ecmp_group_table</title></rect>
+<rect x="130" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chartreuse""><title>SRAM for ecmp_group_table</title></rect>
+<rect x="143" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chartreuse""><title>SRAM for ecmp_group_table</title></rect>
+<rect x="156" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chocolate""><title>SRAM for ecmp_group_table_counter</title></rect>
+<rect x="169" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chocolate""><title>SRAM for ecmp_group_table_counter</title></rect>
<rect x="182" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="195" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="208" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
@@ -193,6 +190,9 @@
<rect x="182" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="195" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="208" y="143" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="117" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
+<rect x="130" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
+<rect x="143" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="156" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="169" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="182" y="169" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
@@ -216,11 +216,11 @@
<rect x="208" y="195" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="117" y="26" width="104" height="182" style="stroke:black; stroke-width:2; fill:none""></rect>
<text x="158" y="245" textLength="24" lengthAdjust="spacingAndGlyphs" textHeight="24" heightAdjust="spacingAndGlyphs" style="fill:black;">1</text>
-<rect x="234" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chartreuse""><title>SRAM for ecmp_group_table</title></rect>
-<rect x="247" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chartreuse""><title>SRAM for ecmp_group_table</title></rect>
-<rect x="260" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chartreuse""><title>SRAM for ecmp_group_table</title></rect>
-<rect x="273" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chocolate""><title>SRAM for ecmp_group_table_counter</title></rect>
-<rect x="286" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:chocolate""><title>SRAM for ecmp_group_table_counter</title></rect>
+<rect x="234" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:crimson""><title>SRAM for ingress_port_counter</title></rect>
+<rect x="247" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:crimson""><title>SRAM for ingress_port_counter</title></rect>
+<rect x="260" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:cyan""><title>SRAM for egress_port_counter</title></rect>
+<rect x="273" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:cyan""><title>SRAM for egress_port_counter</title></rect>
+<rect x="286" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="299" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="312" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="325" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
@@ -322,10 +322,10 @@
<rect x="325" y="195" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>TCAM</title></rect>
<rect x="234" y="26" width="104" height="182" style="stroke:black; stroke-width:2; fill:none""></rect>
<text x="275" y="245" textLength="24" lengthAdjust="spacingAndGlyphs" textHeight="24" heightAdjust="spacingAndGlyphs" style="fill:black;">2</text>
-<rect x="351" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:crimson""><title>SRAM for ingress_port_counter</title></rect>
-<rect x="364" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:crimson""><title>SRAM for ingress_port_counter</title></rect>
-<rect x="377" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:cyan""><title>SRAM for egress_port_counter</title></rect>
-<rect x="390" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:cyan""><title>SRAM for egress_port_counter</title></rect>
+<rect x="351" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="364" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="377" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
+<rect x="390" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="403" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="416" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
<rect x="429" y="26" width="13" height="13" style="stroke:black; stroke-width:1; fill:white""><title>SRAM</title></rect>
@@ -1277,23 +1277,22 @@
<rect x="585" y="260" width="104" height="182" style="stroke:black; stroke-width:2; fill:none""></rect>
<text x="626" y="479" textLength="24" lengthAdjust="spacingAndGlyphs" textHeight="24" heightAdjust="spacingAndGlyphs" style="fill:black;">11</text>
<text x="834" y="89" style="fill:black; font-weight:bold;">Legend</text>
-<text x="860" y="128" style="fill:black; font-weight:bold;">Ingress Tables</text>
-<rect x="832" y="143" width="26" height="26" style="stroke:black; stroke-width:1; fill:chartreuse""><title>ecmp_group_table</title></rect>
-<text x="860" y="167" style="fill:black;">ecmp_group_table</text>
-<rect x="832" y="182" width="26" height="26" style="stroke:black; stroke-width:1; fill:chocolate""><title>ecmp_group_table_counter</title></rect>
-<text x="860" y="206" style="fill:black;">ecmp_group_table_counter</text>
-<rect x="832" y="221" width="26" height="26" style="stroke:black; stroke-width:1; fill:cyan""><title>egress_port_counter</title></rect>
-<text x="860" y="245" style="fill:black;">egress_port_counter</text>
-<rect x="832" y="260" width="26" height="26" style="stroke:black; stroke-width:1; fill:crimson""><title>ingress_port_counter</title></rect>
-<text x="860" y="284" style="fill:black;">ingress_port_counter</text>
-<rect x="832" y="299" width="26" height="26" style="stroke:black; stroke-width:1; fill:yellow""><title>table0</title></rect>
-<text x="860" y="323" style="fill:black;">table0</text>
-<rect x="832" y="338" width="26" height="26" style="stroke:black; stroke-width:1; fill:blueviolet""><title>table0__action__</title></rect>
-<text x="860" y="362" style="fill:black;">table0__action__</text>
-<rect x="832" y="377" width="26" height="26" style="stroke:black; stroke-width:1; fill:burlywood""><title>table0_counter</title></rect>
-<text x="860" y="401" style="fill:black;">table0_counter</text>
-<rect x="806" y="39" width="390" height="403" style="stroke:black; stroke-width:1; fill:none""></rect>
-<rect x="819" y="52" width="364" height="377" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="832" y="104" width="26" height="26" style="stroke:black; stroke-width:1; fill:chartreuse""><title>ecmp_group_table</title></rect>
+<text x="860" y="128" style="fill:black;">ecmp_group_table</text>
+<rect x="832" y="143" width="26" height="26" style="stroke:black; stroke-width:1; fill:chocolate""><title>ecmp_group_table_counter</title></rect>
+<text x="860" y="167" style="fill:black;">ecmp_group_table_counter</text>
+<rect x="832" y="182" width="26" height="26" style="stroke:black; stroke-width:1; fill:cyan""><title>egress_port_counter</title></rect>
+<text x="860" y="206" style="fill:black;">egress_port_counter</text>
+<rect x="832" y="221" width="26" height="26" style="stroke:black; stroke-width:1; fill:crimson""><title>ingress_port_counter</title></rect>
+<text x="860" y="245" style="fill:black;">ingress_port_counter</text>
+<rect x="832" y="260" width="26" height="26" style="stroke:black; stroke-width:1; fill:blue""><title>table0</title></rect>
+<text x="860" y="284" style="fill:black;">table0</text>
+<rect x="832" y="299" width="26" height="26" style="stroke:black; stroke-width:1; fill:aquamarine""><title>table0__action__</title></rect>
+<text x="860" y="323" style="fill:black;">table0__action__</text>
+<rect x="832" y="338" width="26" height="26" style="stroke:black; stroke-width:1; fill:blueviolet""><title>table0_counter</title></rect>
+<text x="860" y="362" style="fill:black;">table0_counter</text>
+<rect x="806" y="39" width="390" height="364" style="stroke:black; stroke-width:1; fill:none""></rect>
+<rect x="819" y="52" width="364" height="338" style="stroke:black; stroke-width:1; fill:none""></rect>
<rect x="0" y="0" width="754" height="728" style="stroke:black; stroke-width:2; fill:none""></rect>
</svg><br>
<table border="1">
@@ -1322,19 +1321,7 @@
<td align="center">0</td>
</tr>
<tr>
-<td align="center">_condition_3</td>
-<td align="center">0</td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-</tr>
-<tr>
-<td align="center">ingress_pkt__action__</td>
+<td align="center">process_packet_out_table__action__</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1346,56 +1333,20 @@
<td align="center">0</td>
</tr>
<tr>
-<td align="center">ingress_pkt</td>
+<td align="center">process_packet_out_table</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">1</td>
-</tr>
-<tr>
-<td align="center">egress_pkt__action__</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-</tr>
-<tr>
-<td align="center">egress_pkt</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center">1</td>
-</tr>
-<tr>
-<td align="center">_condition_1</td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center">1</td>
<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
-<td align="center">0</td>
+<td align="center">1</td>
</tr>
<tr>
<td align="center">table0__action__</td>
-<td align="center">1</td>
+<td align="center">0</td>
<td align="center">12</td>
<td align="center">1</td>
<td align="center">0</td>
@@ -1407,7 +1358,7 @@
</tr>
<tr>
<td align="center">table0</td>
-<td align="center">1</td>
+<td align="center">0</td>
<td align="center">16</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1419,7 +1370,7 @@
</tr>
<tr>
<td align="center">table0_counter</td>
-<td align="center">1</td>
+<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1431,7 +1382,7 @@
</tr>
<tr>
<td align="center">ecmp_group_table__action__</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1443,7 +1394,7 @@
</tr>
<tr>
<td align="center">ecmp_group_table</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">4</td>
<td align="center">30</td>
<td align="center">0</td>
@@ -1455,7 +1406,7 @@
</tr>
<tr>
<td align="center">ecmp_group_table_counter</td>
-<td align="center">2</td>
+<td align="center">1</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1467,7 +1418,7 @@
</tr>
<tr>
<td align="center">_condition_2</td>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">2</td>
<td align="center">9</td>
<td align="center">1</td>
@@ -1479,7 +1430,7 @@
</tr>
<tr>
<td align="center">ingress_port_count_table__action__</td>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1491,7 +1442,7 @@
</tr>
<tr>
<td align="center">ingress_port_count_table</td>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1503,7 +1454,7 @@
</tr>
<tr>
<td align="center">egress_port_count_table__action__</td>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1515,7 +1466,7 @@
</tr>
<tr>
<td align="center">egress_port_count_table</td>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">1</td>
@@ -1527,7 +1478,7 @@
</tr>
<tr>
<td align="center">ingress_port_counter</td>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1539,7 +1490,7 @@
</tr>
<tr>
<td align="center">egress_port_counter</td>
-<td align="center">3</td>
+<td align="center">2</td>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">0</td>
@@ -1550,7 +1501,7 @@
<td align="center">0</td>
</tr>
</table>
-<br><i>Created on Thu Sep 7 14:49:56 2017</i>
+<br><i>Created on Fri Sep 8 08:26:21 2017</i>
<br><i>Compiler version: 5.1.0 (fca32d1)</i>
</body>
</html>
\ No newline at end of file
diff --git a/tools/test/p4src/p4-14/p4c-out/wcmp.json b/tools/test/p4src/p4-14/p4c-out/wcmp.json
index 16f8380..8b272b0 100644
--- a/tools/test/p4src/p4-14/p4c-out/wcmp.json
+++ b/tools/test/p4src/p4-14/p4c-out/wcmp.json
@@ -9,8 +9,8 @@
"name" : "scalars_0",
"id" : 0,
"fields" : [
- ["tmp_0", 112, false],
- ["tmp", 16, false],
+ ["tmp_0", 104, false],
+ ["tmp", 8, false],
["tmp_1", 32, false],
["tmp_2", 32, false]
]
@@ -406,7 +406,7 @@
},
{
"type" : "lookahead",
- "value" : [0, 112]
+ "value" : [0, 104]
}
],
"op" : "set"
@@ -429,7 +429,7 @@
},
"right" : {
"type" : "hexstr",
- "value" : "0xffff"
+ "value" : "0xff"
}
}
}
@@ -440,7 +440,7 @@
],
"transitions" : [
{
- "value" : "0x0000",
+ "value" : "0x00",
"mask" : null,
"next_state" : "parse_pkt_in"
},
@@ -484,13 +484,13 @@
{
"name" : "egress_port_counter",
"id" : 2,
- "size" : 511,
+ "size" : 254,
"is_direct" : false
},
{
"name" : "ingress_port_counter",
"id" : 3,
- "size" : 511,
+ "size" : 254,
"is_direct" : false
}
],
@@ -1315,7 +1315,7 @@
},
"right" : {
"type" : "hexstr",
- "value" : "0x01ff"
+ "value" : "0x00fe"
}
}
},
diff --git a/tools/test/p4src/p4-14/p4c-out/wcmp.p4info b/tools/test/p4src/p4-14/p4c-out/wcmp.p4info
index 9b12a53..848e9d5 100644
--- a/tools/test/p4src/p4-14/p4c-out/wcmp.p4info
+++ b/tools/test/p4src/p4-14/p4c-out/wcmp.p4info
@@ -207,7 +207,7 @@
spec {
unit: PACKETS
}
- size: 511
+ size: 254
}
counters {
preamble {
@@ -219,7 +219,7 @@
spec {
unit: PACKETS
}
- size: 511
+ size: 254
}
direct_counters {
preamble {
@@ -267,4 +267,4 @@
name: "egress_port"
bitwidth: 9
}
-}
+}
\ No newline at end of file