Workaround to counter-issue as suggested by Antonin
Manually modified via makefile context.json
Change-Id: Ibed9e0691bf1d552db28470da57955e8f3ca802a
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.log
index 0311aff..c36f6b92 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/montara/logs/pa.log
@@ -1,7 +1,7 @@
+---------------------------------------------------------------------+
| Log file: pa.log |
| Compiler version: 5.1.0 (fca32d1) |
-| Created on: Fri Sep 8 08:24:30 2017 |
+| Created on: Wed Sep 13 00:58:56 2017 |
+---------------------------------------------------------------------+
HLIR Version: 0.10.5
@@ -549,7 +549,7 @@
parse_pkt_in and parse_pkt_out are exclusive parse states
parse_tcp and parse_udp are exclusive parse states
->>Event 'pa_init' at time 1504859072.87
+>>Event 'pa_init' at time 1505264338.44
Took 0.01 seconds
--------------------------------------------
PHV MAU Groups: 90
@@ -827,7 +827,7 @@
eg_intr_md.egress_cos <3 bits egress parsed imeta>
->>Event 'pa_resv' at time 1504859072.88
+>>Event 'pa_resv' at time 1505264338.44
Took 0.00 seconds
-----------------------------------------------
@@ -869,7 +869,7 @@
Group 2 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv32
Group 3 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv48
Reserving 32-bit container for ingress: phv0
->>Event 'pa_bridge' at time 1504859072.91
+>>Event 'pa_bridge' at time 1505264338.48
Took 0.04 seconds
-----------------------------------------------
@@ -922,7 +922,7 @@
| Overall total | 1 (0.30%) | 32 (0.52%) | 6144 |
---------------------------------------------------------------------------
->>Event 'pa_phase0' at time 1504859072.92
+>>Event 'pa_phase0' at time 1505264338.48
Took 0.00 seconds
-----------------------------------------------
@@ -975,7 +975,7 @@
| Overall total | 1 (0.30%) | 32 (0.52%) | 6144 |
---------------------------------------------------------------------------
->>Event 'pa_critical' at time 1504859072.92
+>>Event 'pa_critical' at time 1505264338.49
Took 0.00 seconds
-----------------------------------------------
@@ -2023,8 +2023,8 @@
| Overall total | 52 (15.48%) | 968 (15.76%) | 6144 |
-----------------------------------------------------------------------------
->>Event 'pa_overlay' at time 1504859082.02
- Took 9.10 seconds
+>>Event 'pa_overlay' at time 1505264347.52
+ Took 9.03 seconds
-----------------------------------------------
Allocating remaining parsed fields
@@ -2288,8 +2288,8 @@
| Overall total | 0 (0.00%) | 0 (0.00%) | 6144 |
--------------------------------------------------------------------------
->>Event 'pa_meta1' at time 1504859082.54
- Took 0.52 seconds
+>>Event 'pa_meta1' at time 1505264348.03
+ Took 0.51 seconds
-----------------------------------------------
Allocating metadata (pass 1)
@@ -2433,7 +2433,7 @@
--------------------------------------------------------------------------
Sorted metadata field instances to allocate: 0 / 0 bits (0 ingress bits and 0 egress bits)
->>Event 'pa_pov' at time 1504859082.61
+>>Event 'pa_pov' at time 1505264348.10
Took 0.07 seconds
-----------------------------------------------
@@ -2590,7 +2590,7 @@
egress
phv81 (8 bits)
>> 8 total bits
->>Event 'pa_meta2' at time 1504859082.73
+>>Event 'pa_meta2' at time 1505264348.22
Took 0.12 seconds
-----------------------------------------------
@@ -2733,7 +2733,7 @@
final start_bit = 5
(1) msb_offset = 8
***Allocating phv67[7:5] for ig_intr_md_for_tm.drop_ctl[2:0]
->>Event 'pa_meta_init' at time 1504859082.80
+>>Event 'pa_meta_init' at time 1505264348.28
Took 0.06 seconds
-----------------------------------------------