| +---------------------------------------------------------------------+ |
| | Log file: mau.resources.log | |
| | Compiler version: 5.1.0 (fca32d1) | |
| | Created on: Wed Sep 13 12:57:41 2017 | |
| +---------------------------------------------------------------------+ |
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| ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
| | Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID | |
| ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
| | 0 | 13 | 16 | 2 | 1 | 2 | 4 | 3 | 3 | 3 | 0 | 1 | 0 | 8 | 0 | 4 | 2 | 2 | |
| | 1 | 4 | 0 | 30 | 0 | 0 | 5 | 2 | 0 | 1 | 0 | 1 | 0 | 4 | 0 | 2 | 1 | 1 | |
| | 2 | 6 | 0 | 29 | 2 | 2 | 4 | 4 | 0 | 1 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2 | |
| | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | 9 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | 10 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | 11 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | | | | | | | | | | | | | | | | | | | |
| | Totals | 23 | 16 | 61 | 3 | 4 | 13 | 9 | 3 | 5 | 0 | 4 | 0 | 12 | 0 | 6 | 3 | 5 | |
| ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
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| |
| ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
| | Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID | |
| ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
| | 0 | 10.16% | 24.24% | 0.48% | 16.67% | 12.50% | 5.00% | 6.25% | 12.50% | 9.38% | 0.00% | 25.00% | 0.00% | 6.25% | 0.00% | 12.50% | 6.25% | 12.50% | |
| | 1 | 3.12% | 0.00% | 7.21% | 0.00% | 0.00% | 6.25% | 4.17% | 0.00% | 3.12% | 0.00% | 25.00% | 0.00% | 3.12% | 0.00% | 6.25% | 3.12% | 6.25% | |
| | 2 | 4.69% | 0.00% | 6.97% | 33.33% | 12.50% | 5.00% | 8.33% | 0.00% | 3.12% | 0.00% | 50.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% | |
| | 3 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | |
| | 4 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | |
| | 5 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | |
| | 6 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | |
| | 7 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | |
| | 8 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | |
| | 9 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | |
| | 10 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | |
| | 11 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | |
| | | | | | | | | | | | | | | | | | | | |
| | Average | 1.50% | 2.02% | 1.22% | 4.17% | 2.08% | 1.35% | 1.56% | 1.04% | 1.30% | 0.00% | 8.33% | 0.00% | 0.78% | 0.00% | 1.56% | 0.78% | 2.60% | |
| ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
| |
| |
| Allocated Resource Usage |
| -------------------------------------------------------------------------------------------------------------------- |
| | Table | Stage | Crossbar | Hash | Gateways | RAMs | TCAMs | Map | Action | VLIW | |
| | Name | Number | Bytes | Bits | | | | RAMs | Data | Slots | |
| | | | | | | | | | Bus | | |
| | | | | | | | | | Bytes | | |
| -------------------------------------------------------------------------------------------------------------------- |
| | _condition_0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | |
| | process_packet_out_table__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | process_packet_out_table | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | |
| | table0__action__ | 0 | 12 | 1 | 0 | 1 | 0 | 0 | 8 | 0 | |
| | table0 | 0 | 16 | 0 | 0 | 1 | 3 | 1 | 0 | 4 | |
| | table0_counter | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | |
| | ecmp_group_table__action__ | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 | |
| | ecmp_group_table | 1 | 4 | 30 | 0 | 3 | 0 | 0 | 0 | 1 | |
| | ecmp_group_table_counter | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | |
| | _condition_2 | 2 | 2 | 9 | 1 | 0 | 0 | 0 | 0 | 0 | |
| | ingress_port_count_table__action__ | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | ingress_port_count_table | 2 | 2 | 10 | 0 | 0 | 0 | 0 | 0 | 1 | |
| | egress_port_count_table__action__ | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| | egress_port_count_table | 2 | 2 | 10 | 1 | 0 | 0 | 0 | 0 | 1 | |
| | ingress_port_counter | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | |
| | egress_port_counter | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | |
| -------------------------------------------------------------------------------------------------------------------- |
| |