Ken Chiang | 103e147 | 2013-05-13 17:21:57 -0700 | [diff] [blame] | 1 | // Copyright 2013, Big Switch Networks, Inc. |
| 2 | // |
| 3 | // LoxiGen is licensed under the Eclipse Public License, version 1.0 (EPL), with |
| 4 | // the following special exception: |
| 5 | // |
| 6 | // LOXI Exception |
| 7 | // |
| 8 | // As a special exception to the terms of the EPL, you may distribute libraries |
| 9 | // generated by LoxiGen (LoxiGen Libraries) under the terms of your choice, provided |
| 10 | // that copyright and licensing notices generated by LoxiGen are not altered or removed |
| 11 | // from the LoxiGen Libraries and the notice provided below is (i) included in |
| 12 | // the LoxiGen Libraries, if distributed in source code form and (ii) included in any |
| 13 | // documentation for the LoxiGen Libraries, if distributed in binary form. |
| 14 | // |
| 15 | // Notice: "Copyright 2013, Big Switch Networks, Inc. This library was generated by the LoxiGen Compiler." |
| 16 | // |
| 17 | // You may not use this file except in compliance with the EPL or LOXI Exception. You may obtain |
| 18 | // a copy of the EPL at: |
| 19 | // |
| 20 | // http://www.eclipse.org/legal/epl-v10.html |
| 21 | // |
| 22 | // Unless required by applicable law or agreed to in writing, software |
| 23 | // distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
| 24 | // WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the |
| 25 | // EPL for the specific language governing permissions and limitations |
| 26 | // under the EPL. |
| 27 | |
| 28 | #version 1 |
| 29 | |
| 30 | // BSN L2 table configuration messages |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame^] | 31 | struct of_bsn_set_l2_table_request : of_bsn_header { |
Ken Chiang | 103e147 | 2013-05-13 17:21:57 -0700 | [diff] [blame] | 32 | uint8_t version; |
Rich Lane | 4db4d04 | 2013-05-13 18:13:48 -0700 | [diff] [blame] | 33 | uint8_t type == 4; |
Ken Chiang | 103e147 | 2013-05-13 17:21:57 -0700 | [diff] [blame] | 34 | uint16_t length; |
| 35 | uint32_t xid; |
Rich Lane | 4db4d04 | 2013-05-13 18:13:48 -0700 | [diff] [blame] | 36 | uint32_t experimenter == 0x5c16c7; |
| 37 | uint32_t subtype == 12; |
Ken Chiang | 103e147 | 2013-05-13 17:21:57 -0700 | [diff] [blame] | 38 | uint8_t l2_table_enable; // 1 == enabled, 0 == disabled |
Rich Lane | e03e86f | 2013-05-31 10:20:57 -0700 | [diff] [blame] | 39 | pad(1); |
Ken Chiang | 103e147 | 2013-05-13 17:21:57 -0700 | [diff] [blame] | 40 | uint16_t l2_table_priority; // priority of all flows in L2 table |
Rich Lane | e03e86f | 2013-05-31 10:20:57 -0700 | [diff] [blame] | 41 | pad(4); |
Ken Chiang | 103e147 | 2013-05-13 17:21:57 -0700 | [diff] [blame] | 42 | }; |
| 43 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame^] | 44 | struct of_bsn_set_l2_table_reply : of_bsn_header { |
Dan Talayco | fc2eb49 | 2013-05-24 13:15:50 -0700 | [diff] [blame] | 45 | uint8_t version; |
Rich Lane | d071467 | 2013-05-29 14:22:35 -0700 | [diff] [blame] | 46 | uint8_t type == 4; |
Dan Talayco | fc2eb49 | 2013-05-24 13:15:50 -0700 | [diff] [blame] | 47 | uint16_t length; |
| 48 | uint32_t xid; |
Rich Lane | d071467 | 2013-05-29 14:22:35 -0700 | [diff] [blame] | 49 | uint32_t experimenter == 0x5c16c7; |
| 50 | uint32_t subtype == 24; |
Dan Talayco | fc2eb49 | 2013-05-24 13:15:50 -0700 | [diff] [blame] | 51 | uint8_t l2_table_enable; // Resulting state: 1 == enabled, 0 == disabled |
Rich Lane | e03e86f | 2013-05-31 10:20:57 -0700 | [diff] [blame] | 52 | pad(1); |
Dan Talayco | fc2eb49 | 2013-05-24 13:15:50 -0700 | [diff] [blame] | 53 | uint16_t l2_table_priority; // priority used, must match request if ok |
| 54 | uint32_t status; // 0 means success |
| 55 | }; |
| 56 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame^] | 57 | struct of_bsn_get_l2_table_request : of_bsn_header { |
Ken Chiang | 103e147 | 2013-05-13 17:21:57 -0700 | [diff] [blame] | 58 | uint8_t version; |
Rich Lane | 4db4d04 | 2013-05-13 18:13:48 -0700 | [diff] [blame] | 59 | uint8_t type == 4; |
Ken Chiang | 103e147 | 2013-05-13 17:21:57 -0700 | [diff] [blame] | 60 | uint16_t length; |
| 61 | uint32_t xid; |
Rich Lane | 4db4d04 | 2013-05-13 18:13:48 -0700 | [diff] [blame] | 62 | uint32_t experimenter == 0x5c16c7; |
| 63 | uint32_t subtype == 13; |
Ken Chiang | 103e147 | 2013-05-13 17:21:57 -0700 | [diff] [blame] | 64 | }; |
| 65 | |
Rich Lane | e9c37db | 2013-06-21 18:30:24 -0700 | [diff] [blame^] | 66 | struct of_bsn_get_l2_table_reply : of_bsn_header { |
Ken Chiang | 103e147 | 2013-05-13 17:21:57 -0700 | [diff] [blame] | 67 | uint8_t version; |
Rich Lane | 4db4d04 | 2013-05-13 18:13:48 -0700 | [diff] [blame] | 68 | uint8_t type == 4; |
Ken Chiang | 103e147 | 2013-05-13 17:21:57 -0700 | [diff] [blame] | 69 | uint16_t length; |
| 70 | uint32_t xid; |
Rich Lane | 4db4d04 | 2013-05-13 18:13:48 -0700 | [diff] [blame] | 71 | uint32_t experimenter == 0x5c16c7; |
| 72 | uint32_t subtype == 14; |
Ken Chiang | 103e147 | 2013-05-13 17:21:57 -0700 | [diff] [blame] | 73 | uint8_t l2_table_enable; // 1 == enabled, 0 == disabled |
Rich Lane | e03e86f | 2013-05-31 10:20:57 -0700 | [diff] [blame] | 74 | pad(1); |
Ken Chiang | 103e147 | 2013-05-13 17:21:57 -0700 | [diff] [blame] | 75 | uint16_t l2_table_priority; // priority of all flows in L2 table |
Rich Lane | e03e86f | 2013-05-31 10:20:57 -0700 | [diff] [blame] | 76 | pad(4); |
Ken Chiang | 103e147 | 2013-05-13 17:21:57 -0700 | [diff] [blame] | 77 | }; |