Rich Lane | b1f347d | 2013-05-16 16:39:12 -0700 | [diff] [blame] | 1 | -- binary |
Andreas Wundsam | f10ed08 | 2013-09-23 14:49:54 -0700 | [diff] [blame] | 2 | 01 0e # version, type |
| 3 | 00 70 # length |
| 4 | 12 34 56 78 # xid |
| 5 | |
| 6 | #### ofp_flow_mod |
| 7 | 00 30 00 e2 # wild cards=(OFPFW_DL_VLAN|OFPFW_NW_PROTO|OFPFW_TP_SRC|OFPFW_TP_DST|OFPFW_DL_VLAN_PCP|OFPFW_NW_TOS) |
| 8 | 00 03 # in_port |
| 9 | 01 23 45 67 89 ab # eth_src |
| 10 | cd ef 01 23 45 67 # eth_dst |
| 11 | 00 00 # dl_vlan |
| 12 | 00 00 # dl_pcp, pad |
| 13 | 08 00 # dl_type |
| 14 | 00 00 00 00 # nw_tos, nw_proto, pad[2] |
| 15 | c0 a8 03 7f # nw_src |
| 16 | ff ff ff ff # nw_dst |
| 17 | 00 00 00 00 # tcp_src, tcp_dst |
| 18 | |
| 19 | 00 00 00 00 00 00 00 00 # cookie |
| 20 | 00 00 # command |
| 21 | 00 05 # idle_timeout |
| 22 | 00 00 # hard_timeout |
| 23 | 00 00 # priority |
| 24 | 00 00 00 00 # buffer_id |
| 25 | 00 00 #out_port |
| 26 | 00 02 # flags (CHECK_OVERLAP) |
| 27 | |
| 28 | #list(ofp_action) |
| 29 | 00 00 00 08 # type=OUTPUT, len=8 |
| 30 | ff fb # port=FLOOD |
| 31 | 00 00 # maxLen=0 |
| 32 | ff ff 00 10 # type=VENDOR, len=16 |
| 33 | 00 00 23 20 # vendor = Nicira |
| 34 | 00 12 # subtype=dec_ttl |
| 35 | 00 00 00 00 00 00 # pad(6) |
| 36 | ff ff 00 10 # type=VENDOR, len=16 |
| 37 | 00 5c 16 c7 # vendor = BSN |
| 38 | 00 00 00 02 # subype = set_tunnel_dst |
| 39 | 00 00 00 00 # tunnel dst ip |
Rich Lane | b1f347d | 2013-05-16 16:39:12 -0700 | [diff] [blame] | 40 | -- python |
| 41 | ofp.message.flow_add( |
| 42 | xid=0x12345678, |
| 43 | match=ofp.match( |
Andreas Wundsam | f10ed08 | 2013-09-23 14:49:54 -0700 | [diff] [blame] | 44 | wildcards=ofp.OFPFW_DL_VLAN|ofp.OFPFW_NW_PROTO|ofp.OFPFW_TP_SRC|ofp.OFPFW_TP_DST|ofp.OFPFW_DL_VLAN_PCP|ofp.OFPFW_NW_TOS, |
Rich Lane | b1f347d | 2013-05-16 16:39:12 -0700 | [diff] [blame] | 45 | in_port=3, |
Andreas Wundsam | f10ed08 | 2013-09-23 14:49:54 -0700 | [diff] [blame] | 46 | eth_type=0x800, |
Rich Lane | b1f347d | 2013-05-16 16:39:12 -0700 | [diff] [blame] | 47 | ipv4_src=0xc0a8037f, |
| 48 | ipv4_dst=0xffffffff, |
| 49 | eth_src=[0x01, 0x23, 0x45, 0x67, 0x89, 0xab], |
| 50 | eth_dst=[0xcd, 0xef, 0x01, 0x23, 0x45, 0x67]), |
| 51 | idle_timeout=5, |
| 52 | flags=ofp.OFPFF_CHECK_OVERLAP, |
| 53 | actions=[ |
| 54 | ofp.action.output(port=ofp.OFPP_FLOOD), |
| 55 | ofp.action.nicira_dec_ttl(), |
| 56 | ofp.action.bsn_set_tunnel_dst()]) |
| 57 | -- python pretty-printer |
| 58 | flow_add { |
| 59 | xid = 0x12345678, |
| 60 | match = match_v1 { |
Andreas Wundsam | f10ed08 | 2013-09-23 14:49:54 -0700 | [diff] [blame] | 61 | wildcards = OFPFW_DL_VLAN|OFPFW_NW_PROTO|OFPFW_TP_SRC|OFPFW_TP_DST|OFPFW_DL_VLAN_PCP|OFPFW_NW_TOS, |
Rich Lane | b1f347d | 2013-05-16 16:39:12 -0700 | [diff] [blame] | 62 | in_port = 3, |
| 63 | eth_src = 01:23:45:67:89:ab, |
| 64 | eth_dst = cd:ef:01:23:45:67, |
| 65 | vlan_vid = 0x0, |
| 66 | vlan_pcp = 0x0, |
Andreas Wundsam | f10ed08 | 2013-09-23 14:49:54 -0700 | [diff] [blame] | 67 | eth_type = 0x800, |
Rich Lane | b1f347d | 2013-05-16 16:39:12 -0700 | [diff] [blame] | 68 | ip_dscp = 0x0, |
| 69 | ip_proto = 0x0, |
Rich Lane | b1f347d | 2013-05-16 16:39:12 -0700 | [diff] [blame] | 70 | ipv4_src = 192.168.3.127, |
| 71 | ipv4_dst = 255.255.255.255, |
| 72 | tcp_src = 0x0, |
| 73 | tcp_dst = 0x0 |
| 74 | }, |
| 75 | cookie = 0x0, |
| 76 | idle_timeout = 0x5, |
| 77 | hard_timeout = 0x0, |
| 78 | priority = 0x0, |
| 79 | buffer_id = 0x0, |
| 80 | out_port = 0, |
| 81 | flags = 0x2, |
| 82 | actions = [ |
| 83 | output { port = OFPP_FLOOD, max_len = 0x0 }, |
| 84 | nicira_dec_ttl { }, |
| 85 | bsn_set_tunnel_dst { dst = 0x0 } |
| 86 | ] |
| 87 | } |
Rich Lane | ccae031 | 2013-07-21 23:34:13 -0700 | [diff] [blame] | 88 | -- c |
| 89 | obj = of_flow_add_new(OF_VERSION_1_0); |
| 90 | of_flow_add_xid_set(obj, 0x12345678); |
| 91 | of_flow_add_idle_timeout_set(obj, 5); |
| 92 | of_flow_add_flags_set(obj, 2); |
| 93 | { |
| 94 | of_match_t match = { OF_VERSION_1_0 }; |
| 95 | match.fields.in_port = 3; |
| 96 | match.fields.eth_src = (of_mac_addr_t) { { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab } }; |
| 97 | match.fields.eth_dst = (of_mac_addr_t) { { 0xcd, 0xef, 0x01, 0x23, 0x45, 0x67 } }; |
Andreas Wundsam | f10ed08 | 2013-09-23 14:49:54 -0700 | [diff] [blame] | 98 | match.fields.eth_type = 0x800; |
Rich Lane | ccae031 | 2013-07-21 23:34:13 -0700 | [diff] [blame] | 99 | match.fields.ipv4_src = 0xc0a8037f; |
| 100 | match.fields.ipv4_dst = 0xffffffff; |
| 101 | OF_MATCH_MASK_IN_PORT_EXACT_SET(&match); |
| 102 | OF_MATCH_MASK_ETH_SRC_EXACT_SET(&match); |
| 103 | OF_MATCH_MASK_ETH_DST_EXACT_SET(&match); |
Andreas Wundsam | f10ed08 | 2013-09-23 14:49:54 -0700 | [diff] [blame] | 104 | OF_MATCH_MASK_ETH_TYPE_EXACT_SET(&match); |
Rich Lane | ccae031 | 2013-07-21 23:34:13 -0700 | [diff] [blame] | 105 | //OF_MATCH_MASK_VLAN_VID_EXACT_SET(&match); |
| 106 | //OF_MATCH_MASK_VLAN_PCP_EXACT_SET(&match); |
| 107 | OF_MATCH_MASK_ETH_TYPE_EXACT_SET(&match); |
Andreas Wundsam | f10ed08 | 2013-09-23 14:49:54 -0700 | [diff] [blame] | 108 | //OF_MATCH_MASK_IP_DSCP_EXACT_SET(&match); |
| 109 | //OF_MATCH_MASK_IP_PROTO_EXACT_SET(&match); |
Rich Lane | ccae031 | 2013-07-21 23:34:13 -0700 | [diff] [blame] | 110 | OF_MATCH_MASK_IPV4_SRC_EXACT_SET(&match); |
| 111 | OF_MATCH_MASK_IPV4_DST_EXACT_SET(&match); |
Andreas Wundsam | f10ed08 | 2013-09-23 14:49:54 -0700 | [diff] [blame] | 112 | //OF_MATCH_MASK_TCP_SRC_EXACT_SET(&match); |
| 113 | //OF_MATCH_MASK_TCP_DST_EXACT_SET(&match); |
Rich Lane | ccae031 | 2013-07-21 23:34:13 -0700 | [diff] [blame] | 114 | of_flow_add_match_set(obj, &match); |
| 115 | } |
| 116 | { |
| 117 | of_list_action_t actions; |
| 118 | of_flow_add_actions_bind(obj, &actions); |
| 119 | { |
Rich Lane | e499bd1 | 2014-10-28 15:25:09 -0700 | [diff] [blame^] | 120 | of_object_t action; |
| 121 | of_action_output_init(&action, OF_VERSION_1_0, -1, 1); |
Rich Lane | ccae031 | 2013-07-21 23:34:13 -0700 | [diff] [blame] | 122 | of_list_action_append_bind(&actions, &action); |
Rich Lane | e499bd1 | 2014-10-28 15:25:09 -0700 | [diff] [blame^] | 123 | of_action_output_port_set(&action, OF_PORT_DEST_FLOOD); |
Rich Lane | ccae031 | 2013-07-21 23:34:13 -0700 | [diff] [blame] | 124 | } |
| 125 | { |
Rich Lane | e499bd1 | 2014-10-28 15:25:09 -0700 | [diff] [blame^] | 126 | of_object_t action; |
| 127 | of_action_nicira_dec_ttl_init(&action, OF_VERSION_1_0, -1, 1); |
Rich Lane | ccae031 | 2013-07-21 23:34:13 -0700 | [diff] [blame] | 128 | of_list_action_append_bind(&actions, &action); |
| 129 | } |
| 130 | { |
Rich Lane | e499bd1 | 2014-10-28 15:25:09 -0700 | [diff] [blame^] | 131 | of_object_t action; |
| 132 | of_action_bsn_set_tunnel_dst_init(&action, OF_VERSION_1_0, -1, 1); |
Rich Lane | ccae031 | 2013-07-21 23:34:13 -0700 | [diff] [blame] | 133 | of_list_action_append_bind(&actions, &action); |
| 134 | } |
| 135 | } |
Andreas Wundsam | f10ed08 | 2013-09-23 14:49:54 -0700 | [diff] [blame] | 136 | -- java |
| 137 | builder.setXid(0x12345678) |
| 138 | .setMatch( |
| 139 | factory.buildMatch() |
| 140 | .setExact(MatchField.IN_PORT, OFPort.of(3)) |
| 141 | .setExact(MatchField.ETH_TYPE, EthType.IPv4) |
| 142 | .setExact(MatchField.IPV4_SRC, IPv4Address.of(0xc0a8037f)) |
| 143 | .setExact(MatchField.IPV4_DST, IPv4Address.of(0xffffffff)) |
| 144 | .setExact(MatchField.ETH_SRC, MacAddress.of("01:23:45:67:89:ab")) |
| 145 | .setExact(MatchField.ETH_DST, MacAddress.of("cd:ef:01:23:45:67")) |
| 146 | .build() |
| 147 | ) |
| 148 | .setIdleTimeout(5) |
| 149 | .setFlags(Sets.immutableEnumSet(OFFlowModFlags.CHECK_OVERLAP)) |
Rob Vaterlaus | fbd5b6b | 2013-09-24 15:55:47 -0700 | [diff] [blame] | 150 | .setBufferId(OFBufferId.of(0)) |
Andreas Wundsam | ad499c9 | 2013-09-28 18:56:49 -0700 | [diff] [blame] | 151 | .setOutPort(OFPort.of(0)) // doesn't make that much sense, but is in the example |
Andreas Wundsam | f10ed08 | 2013-09-23 14:49:54 -0700 | [diff] [blame] | 152 | .setActions( |
| 153 | ImmutableList.of( |
| 154 | factory.actions().output(OFPort.FLOOD, 0), |
| 155 | factory.actions().niciraDecTtl(), |
| 156 | factory.actions().bsnSetTunnelDst(0) |
| 157 | ) |
| 158 | ); |