blob: 10471275c4e8821891fb726d6c77868d7aadb21f [file] [log] [blame]
Rich Lanea06d0c32013-03-25 08:52:03 -07001// Copyright 2013, Big Switch Networks, Inc.
2//
3// LoxiGen is licensed under the Eclipse Public License, version 1.0 (EPL), with
4// the following special exception:
5//
6// LOXI Exception
7//
8// As a special exception to the terms of the EPL, you may distribute libraries
9// generated by LoxiGen (LoxiGen Libraries) under the terms of your choice, provided
10// that copyright and licensing notices generated by LoxiGen are not altered or removed
11// from the LoxiGen Libraries and the notice provided below is (i) included in
12// the LoxiGen Libraries, if distributed in source code form and (ii) included in any
13// documentation for the LoxiGen Libraries, if distributed in binary form.
14//
15// Notice: "Copyright 2013, Big Switch Networks, Inc. This library was generated by the LoxiGen Compiler."
16//
17// You may not use this file except in compliance with the EPL or LOXI Exception. You may obtain
18// a copy of the EPL at:
19//
20// http://www.eclipse.org/legal/epl-v10.html
21//
22// Unless required by applicable law or agreed to in writing, software
23// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
24// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
25// EPL for the specific language governing permissions and limitations
26// under the EPL.
Rich Lane5d33a622013-04-08 17:33:11 -070027//
28// Also derived from the OpenFlow header files which have these copyrights:
29// Copyright (c) 2008 The Board of Trustees of The Leland Stanford Junior University
30// Copyright (c) 2011, 2012 Open Networking Foundation
Rich Lanea06d0c32013-03-25 08:52:03 -070031
32#version 2
33
Rich Lane5d33a622013-04-08 17:33:11 -070034enum macro_definitions {
35 OFP_MAX_TABLE_NAME_LEN = 32,
36 OFP_MAX_PORT_NAME_LEN = 16,
37
38 OFP_TCP_PORT = 6633,
39 OFP_SSL_PORT = 6633,
40
41 OFP_ETH_ALEN = 6,
42
43 OFP_DEFAULT_MISS_SEND_LEN = 128,
44
45 OFPFW_ICMP_TYPE = 0x40,
46 OFPFW_ICMP_CODE = 0x80,
47
48 OFP_DL_TYPE_ETH2_CUTOFF = 0x600,
49 OFP_DL_TYPE_NOT_ETH_TYPE = 0x5ff,
50
51 OFP_VLAN_NONE = 0,
52
53 OFPMT_STANDARD_LENGTH = 88,
54
55 OFP_FLOW_PERMANENT = 0,
56
57 OFP_DEFAULT_PRIORITY = 0x8000,
58
59 DESC_STR_LEN = 256,
60 SERIAL_NUM_LEN = 32,
61
62 OFPQ_ALL = 0xffffffff,
63 OFPQ_MIN_RATE_UNCFG = 0xffff,
64};
65
Andreas Wundsam4ee51462013-07-30 11:00:37 -070066enum ofp_port(wire_type=uint32_t) {
Rich Lane5d33a622013-04-08 17:33:11 -070067 OFPP_MAX = 0xffffff00,
68 OFPP_IN_PORT = 0xfffffff8,
69 OFPP_TABLE = 0xfffffff9,
70 OFPP_NORMAL = 0xfffffffa,
71 OFPP_FLOOD = 0xfffffffb,
72 OFPP_ALL = 0xfffffffc,
73 OFPP_CONTROLLER = 0xfffffffd,
74 OFPP_LOCAL = 0xfffffffe,
75};
76
Andreas Wundsam7933beb2013-08-02 22:36:42 -070077enum ofp_port_no(wire_type=uint32_t, complete=False) {
Rich Lane5d33a622013-04-08 17:33:11 -070078 OFPP_ANY = 0xffffffff,
79};
80
Andreas Wundsam4ee51462013-07-30 11:00:37 -070081enum ofp_type(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -070082 OFPT_HELLO = 0,
83 OFPT_ERROR = 1,
84 OFPT_ECHO_REQUEST = 2,
85 OFPT_ECHO_REPLY = 3,
86 OFPT_EXPERIMENTER = 4,
87 OFPT_FEATURES_REQUEST = 5,
88 OFPT_FEATURES_REPLY = 6,
89 OFPT_GET_CONFIG_REQUEST = 7,
90 OFPT_GET_CONFIG_REPLY = 8,
91 OFPT_SET_CONFIG = 9,
92 OFPT_PACKET_IN = 10,
93 OFPT_FLOW_REMOVED = 11,
94 OFPT_PORT_STATUS = 12,
95 OFPT_PACKET_OUT = 13,
96 OFPT_FLOW_MOD = 14,
97 OFPT_GROUP_MOD = 15,
98 OFPT_PORT_MOD = 16,
99 OFPT_TABLE_MOD = 17,
100 OFPT_STATS_REQUEST = 18,
101 OFPT_STATS_REPLY = 19,
102 OFPT_BARRIER_REQUEST = 20,
103 OFPT_BARRIER_REPLY = 21,
104 OFPT_QUEUE_GET_CONFIG_REQUEST = 22,
105 OFPT_QUEUE_GET_CONFIG_REPLY = 23,
106};
107
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700108enum ofp_config_flags(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700109 OFPC_FRAG_NORMAL = 0,
110 OFPC_FRAG_DROP = 1,
111 OFPC_FRAG_REASM = 2,
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700112 OFPC_FRAG_MASK(virtual=True) = 3,
Rich Lane5d33a622013-04-08 17:33:11 -0700113 OFPC_INVALID_TTL_TO_CONTROLLER = 4,
114};
115
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700116enum ofp_table_config(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700117 OFPTC_TABLE_MISS_CONTROLLER = 0,
118 OFPTC_TABLE_MISS_CONTINUE = 1,
119 OFPTC_TABLE_MISS_DROP = 2,
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700120 OFPTC_TABLE_MISS_MASK(virtual=True) = 3,
Rich Lane5d33a622013-04-08 17:33:11 -0700121};
122
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700123enum ofp_capabilities(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700124 OFPC_FLOW_STATS = 0x1,
125 OFPC_TABLE_STATS = 0x2,
126 OFPC_PORT_STATS = 0x4,
127 OFPC_GROUP_STATS = 0x8,
128 OFPC_IP_REASM = 0x20,
129 OFPC_QUEUE_STATS = 0x40,
130 OFPC_ARP_MATCH_IP = 0x80,
131};
132
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700133enum ofp_port_config(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700134 OFPPC_PORT_DOWN = 0x1,
135 OFPPC_NO_RECV = 0x4,
136 OFPPC_NO_FWD = 0x20,
137 OFPPC_NO_PACKET_IN = 0x40,
138};
139
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700140enum ofp_port_state(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700141 OFPPS_LINK_DOWN = 0x1,
142 OFPPS_BLOCKED = 0x2,
143 OFPPS_LIVE = 0x4,
144};
145
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700146enum ofp_port_features(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700147 OFPPF_10MB_HD = 0x1,
148 OFPPF_10MB_FD = 0x2,
149 OFPPF_100MB_HD = 0x4,
150 OFPPF_100MB_FD = 0x8,
151 OFPPF_1GB_HD = 0x10,
152 OFPPF_1GB_FD = 0x20,
153 OFPPF_10GB_FD = 0x40,
154 OFPPF_40GB_FD = 0x80,
155 OFPPF_100GB_FD = 0x100,
156 OFPPF_1TB_FD = 0x200,
157 OFPPF_OTHER = 0x400,
158 OFPPF_COPPER = 0x800,
159 OFPPF_FIBER = 0x1000,
160 OFPPF_AUTONEG = 0x2000,
161 OFPPF_PAUSE = 0x4000,
162 OFPPF_PAUSE_ASYM = 0x8000,
163};
164
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700165enum ofp_port_reason(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700166 OFPPR_ADD = 0,
167 OFPPR_DELETE = 1,
168 OFPPR_MODIFY = 2,
169};
170
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700171enum ofp_packet_in_reason(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700172 OFPR_NO_MATCH = 0,
173 OFPR_ACTION = 1,
174};
175
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700176enum ofp_action_type(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700177 OFPAT_OUTPUT = 0,
178 OFPAT_SET_VLAN_VID = 1,
179 OFPAT_SET_VLAN_PCP = 2,
180 OFPAT_SET_DL_SRC = 3,
181 OFPAT_SET_DL_DST = 4,
182 OFPAT_SET_NW_SRC = 5,
183 OFPAT_SET_NW_DST = 6,
184 OFPAT_SET_NW_TOS = 7,
185 OFPAT_SET_NW_ECN = 8,
186 OFPAT_SET_TP_SRC = 9,
187 OFPAT_SET_TP_DST = 10,
188 OFPAT_COPY_TTL_OUT = 11,
189 OFPAT_COPY_TTL_IN = 12,
190 OFPAT_SET_MPLS_LABEL = 13,
191 OFPAT_SET_MPLS_TC = 14,
192 OFPAT_SET_MPLS_TTL = 15,
193 OFPAT_DEC_MPLS_TTL = 16,
194 OFPAT_PUSH_VLAN = 17,
195 OFPAT_POP_VLAN = 18,
196 OFPAT_PUSH_MPLS = 19,
197 OFPAT_POP_MPLS = 20,
198 OFPAT_SET_QUEUE = 21,
199 OFPAT_GROUP = 22,
200 OFPAT_SET_NW_TTL = 23,
201 OFPAT_DEC_NW_TTL = 24,
202 OFPAT_EXPERIMENTER = 0xffff,
203};
204
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700205enum ofp_flow_mod_command(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700206 OFPFC_ADD = 0,
207 OFPFC_MODIFY = 1,
208 OFPFC_MODIFY_STRICT = 2,
209 OFPFC_DELETE = 3,
210 OFPFC_DELETE_STRICT = 4,
211};
212
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700213enum ofp_group_mod_command(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700214 OFPGC_ADD = 0,
215 OFPGC_MODIFY = 1,
216 OFPGC_DELETE = 2,
217};
218
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700219enum ofp_flow_wildcards(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700220 OFPFW_IN_PORT = 0x1,
221 OFPFW_DL_VLAN = 0x2,
222 OFPFW_DL_VLAN_PCP = 0x4,
223 OFPFW_DL_TYPE = 0x8,
224 OFPFW_NW_TOS = 0x10,
225 OFPFW_NW_PROTO = 0x20,
226 OFPFW_TP_SRC = 0x40,
227 OFPFW_TP_DST = 0x80,
228 OFPFW_MPLS_LABEL = 0x100,
229 OFPFW_MPLS_TC = 0x200,
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700230 OFPFW_ALL(virtual=True) = 0x3ff,
Rich Lane5d33a622013-04-08 17:33:11 -0700231};
232
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700233enum ofp_vlan_id(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700234 OFPVID_ANY = 0xfffe,
235 OFPVID_NONE = 0xffff,
236};
237
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700238enum ofp_match_type(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700239 OFPMT_STANDARD = 0,
240};
241
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700242enum ofp_instruction_type(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700243 OFPIT_GOTO_TABLE = 0x1,
244 OFPIT_WRITE_METADATA = 0x2,
245 OFPIT_WRITE_ACTIONS = 0x3,
246 OFPIT_APPLY_ACTIONS = 0x4,
247 OFPIT_CLEAR_ACTIONS = 0x5,
248 OFPIT_EXPERIMENTER = 0xffff,
249};
250
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700251enum ofp_flow_mod_flags(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700252 OFPFF_SEND_FLOW_REM = 0x1,
253 OFPFF_CHECK_OVERLAP = 0x2,
254};
255
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700256enum ofp_group(wire_type=uint32_t, complete=False) {
Rich Lane5d33a622013-04-08 17:33:11 -0700257 OFPG_MAX = 0xffffff00,
258 OFPG_ALL = 0xfffffffc,
259 OFPG_ANY = 0xffffffff,
260};
261
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700262enum ofp_group_type(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700263 OFPGT_ALL = 0,
264 OFPGT_SELECT = 1,
265 OFPGT_INDIRECT = 2,
266 OFPGT_FF = 3,
267};
268
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700269enum ofp_flow_removed_reason(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700270 OFPRR_IDLE_TIMEOUT = 0,
271 OFPRR_HARD_TIMEOUT = 1,
272 OFPRR_DELETE = 2,
273 OFPRR_GROUP_DELETE = 3,
274};
275
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700276enum ofp_error_type(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700277 OFPET_HELLO_FAILED = 0,
278 OFPET_BAD_REQUEST = 1,
279 OFPET_BAD_ACTION = 2,
280 OFPET_BAD_INSTRUCTION = 3,
281 OFPET_BAD_MATCH = 4,
282 OFPET_FLOW_MOD_FAILED = 5,
283 OFPET_GROUP_MOD_FAILED = 6,
284 OFPET_PORT_MOD_FAILED = 7,
285 OFPET_TABLE_MOD_FAILED = 8,
286 OFPET_QUEUE_OP_FAILED = 9,
287 OFPET_SWITCH_CONFIG_FAILED = 10,
288};
289
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700290enum ofp_hello_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700291 OFPHFC_INCOMPATIBLE = 0,
292 OFPHFC_EPERM = 1,
293};
294
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700295enum ofp_bad_request_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700296 OFPBRC_BAD_VERSION = 0,
297 OFPBRC_BAD_TYPE = 1,
298 OFPBRC_BAD_STAT = 2,
299 OFPBRC_BAD_EXPERIMENTER = 3,
300 OFPBRC_BAD_SUBTYPE = 4,
301 OFPBRC_EPERM = 5,
302 OFPBRC_BAD_LEN = 6,
303 OFPBRC_BUFFER_EMPTY = 7,
304 OFPBRC_BUFFER_UNKNOWN = 8,
305 OFPBRC_BAD_TABLE_ID = 9,
306};
307
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700308enum ofp_bad_action_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700309 OFPBAC_BAD_TYPE = 0,
310 OFPBAC_BAD_LEN = 1,
311 OFPBAC_BAD_EXPERIMENTER = 2,
312 OFPBAC_BAD_EXPERIMENTER_TYPE = 3,
313 OFPBAC_BAD_OUT_PORT = 4,
314 OFPBAC_BAD_ARGUMENT = 5,
315 OFPBAC_EPERM = 6,
316 OFPBAC_TOO_MANY = 7,
317 OFPBAC_BAD_QUEUE = 8,
318 OFPBAC_BAD_OUT_GROUP = 9,
319 OFPBAC_MATCH_INCONSISTENT = 10,
320 OFPBAC_UNSUPPORTED_ORDER = 11,
321 OFPBAC_BAD_TAG = 12,
322};
323
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700324enum ofp_bad_instruction_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700325 OFPBIC_UNKNOWN_INST = 0,
326 OFPBIC_UNSUP_INST = 1,
327 OFPBIC_BAD_TABLE_ID = 2,
328 OFPBIC_UNSUP_METADATA = 3,
329 OFPBIC_UNSUP_METADATA_MASK = 4,
330 OFPBIC_UNSUP_EXP_INST = 5,
331};
332
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700333enum ofp_bad_match_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700334 OFPBMC_BAD_TYPE = 0,
335 OFPBMC_BAD_LEN = 1,
336 OFPBMC_BAD_TAG = 2,
337 OFPBMC_BAD_DL_ADDR_MASK = 3,
338 OFPBMC_BAD_NW_ADDR_MASK = 4,
339 OFPBMC_BAD_WILDCARDS = 5,
340 OFPBMC_BAD_FIELD = 6,
341 OFPBMC_BAD_VALUE = 7,
342};
343
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700344enum ofp_flow_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700345 OFPFMFC_UNKNOWN = 0,
346 OFPFMFC_TABLE_FULL = 1,
347 OFPFMFC_BAD_TABLE_ID = 2,
348 OFPFMFC_OVERLAP = 3,
349 OFPFMFC_EPERM = 4,
350 OFPFMFC_BAD_TIMEOUT = 5,
351 OFPFMFC_BAD_COMMAND = 6,
352};
353
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700354enum ofp_group_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700355 OFPGMFC_GROUP_EXISTS = 0,
356 OFPGMFC_INVALID_GROUP = 1,
357 OFPGMFC_WEIGHT_UNSUPPORTED = 2,
358 OFPGMFC_OUT_OF_GROUPS = 3,
359 OFPGMFC_OUT_OF_BUCKETS = 4,
360 OFPGMFC_CHAINING_UNSUPPORTED = 5,
361 OFPGMFC_WATCH_UNSUPPORTED = 6,
362 OFPGMFC_LOOP = 7,
363 OFPGMFC_UNKNOWN_GROUP = 8,
364};
365
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700366enum ofp_port_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700367 OFPPMFC_BAD_PORT = 0,
368 OFPPMFC_BAD_HW_ADDR = 1,
369 OFPPMFC_BAD_CONFIG = 2,
370 OFPPMFC_BAD_ADVERTISE = 3,
371};
372
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700373enum ofp_table_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700374 OFPTMFC_BAD_TABLE = 0,
375 OFPTMFC_BAD_CONFIG = 1,
376};
377
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700378enum ofp_queue_op_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700379 OFPQOFC_BAD_PORT = 0,
380 OFPQOFC_BAD_QUEUE = 1,
381 OFPQOFC_EPERM = 2,
382};
383
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700384enum ofp_switch_config_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700385 OFPSCFC_BAD_FLAGS = 0,
386 OFPSCFC_BAD_LEN = 1,
387};
388
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700389enum ofp_stats_types(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700390 OFPST_DESC = 0,
391 OFPST_FLOW = 1,
392 OFPST_AGGREGATE = 2,
393 OFPST_TABLE = 3,
394 OFPST_PORT = 4,
395 OFPST_QUEUE = 5,
396 OFPST_GROUP = 6,
397 OFPST_GROUP_DESC = 7,
398 OFPST_EXPERIMENTER = 0xffff,
399};
400
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700401enum ofp_stats_reply_flags(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700402 OFPSF_REPLY_MORE = 0x1,
403};
404
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700405enum ofp_queue_properties(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700406 OFPQT_NONE = 0,
407 OFPQT_MIN_RATE = 1,
408};
409
Rich Lanee9c37db2013-06-21 18:30:24 -0700410/* XXX rename to of_message */
Rich Lane68ae4d72013-05-09 10:55:19 -0700411struct of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700412 uint8_t version;
Andreas Wundsamc37ba3d2013-08-02 17:51:51 -0700413 uint8_t type == ?;
Rich Lanea06d0c32013-03-25 08:52:03 -0700414 uint16_t length;
415 uint32_t xid;
416};
417
Rich Lanee9c37db2013-06-21 18:30:24 -0700418struct of_hello : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700419 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700420 uint8_t type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -0700421 uint16_t length;
422 uint32_t xid;
423};
424
Rich Lanee9c37db2013-06-21 18:30:24 -0700425struct of_echo_request : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700426 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700427 uint8_t type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -0700428 uint16_t length;
429 uint32_t xid;
430 of_octets_t data;
431};
432
Rich Lanee9c37db2013-06-21 18:30:24 -0700433struct of_echo_reply : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700434 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700435 uint8_t type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -0700436 uint16_t length;
437 uint32_t xid;
438 of_octets_t data;
439};
440
Rich Lanee9c37db2013-06-21 18:30:24 -0700441struct of_experimenter : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700442 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700443 uint8_t type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -0700444 uint16_t length;
445 uint32_t xid;
446 uint32_t experimenter;
447 uint32_t subtype;
448 of_octets_t data;
449};
450
Rich Lanee9c37db2013-06-21 18:30:24 -0700451struct of_barrier_request : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700452 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700453 uint8_t type == 20;
Rich Lanea06d0c32013-03-25 08:52:03 -0700454 uint16_t length;
455 uint32_t xid;
456};
457
Rich Lanee9c37db2013-06-21 18:30:24 -0700458struct of_barrier_reply : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700459 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700460 uint8_t type == 21;
Rich Lanea06d0c32013-03-25 08:52:03 -0700461 uint16_t length;
462 uint32_t xid;
463};
464
Rich Lanee9c37db2013-06-21 18:30:24 -0700465struct of_get_config_request : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700466 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700467 uint8_t type == 7;
Rich Lanea06d0c32013-03-25 08:52:03 -0700468 uint16_t length;
469 uint32_t xid;
470};
471
Rich Lanee9c37db2013-06-21 18:30:24 -0700472struct of_get_config_reply : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700473 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700474 uint8_t type == 8;
Rich Lanea06d0c32013-03-25 08:52:03 -0700475 uint16_t length;
476 uint32_t xid;
477 uint16_t flags;
478 uint16_t miss_send_len;
479};
480
Rich Lanee9c37db2013-06-21 18:30:24 -0700481struct of_set_config : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700482 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700483 uint8_t type == 9;
Rich Lanea06d0c32013-03-25 08:52:03 -0700484 uint16_t length;
485 uint32_t xid;
486 uint16_t flags;
487 uint16_t miss_send_len;
488};
489
Rich Lanee9c37db2013-06-21 18:30:24 -0700490struct of_table_mod : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700491 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700492 uint8_t type == 17;
Rich Lanea06d0c32013-03-25 08:52:03 -0700493 uint16_t length;
494 uint32_t xid;
495 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700496 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700497 uint32_t config;
498};
499
Rich Lane68ae4d72013-05-09 10:55:19 -0700500struct of_port_desc {
Rich Lanea06d0c32013-03-25 08:52:03 -0700501 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700502 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700503 of_mac_addr_t hw_addr;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700504 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700505 of_port_name_t name;
506 uint32_t config;
507 uint32_t state;
508 uint32_t curr;
509 uint32_t advertised;
510 uint32_t supported;
511 uint32_t peer;
512 uint32_t curr_speed;
513 uint32_t max_speed;
514};
515
Rich Lanee9c37db2013-06-21 18:30:24 -0700516struct of_features_request : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700517 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700518 uint8_t type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -0700519 uint16_t length;
520 uint32_t xid;
521};
522
Rich Lanee9c37db2013-06-21 18:30:24 -0700523struct of_features_reply : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700524 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700525 uint8_t type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -0700526 uint16_t length;
527 uint32_t xid;
528 uint64_t datapath_id;
529 uint32_t n_buffers;
530 uint8_t n_tables;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700531 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700532 uint32_t capabilities;
533 uint32_t reserved;
534 list(of_port_desc_t) ports;
535};
536
Rich Lanee9c37db2013-06-21 18:30:24 -0700537struct of_port_status : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700538 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700539 uint8_t type == 12;
Rich Lanea06d0c32013-03-25 08:52:03 -0700540 uint16_t length;
541 uint32_t xid;
542 uint8_t reason;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700543 pad(7);
Rich Lanea06d0c32013-03-25 08:52:03 -0700544 of_port_desc_t desc;
545};
546
Rich Lanee9c37db2013-06-21 18:30:24 -0700547struct of_port_mod : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700548 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700549 uint8_t type == 16;
Rich Lanea06d0c32013-03-25 08:52:03 -0700550 uint16_t length;
551 uint32_t xid;
552 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700553 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700554 of_mac_addr_t hw_addr;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700555 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700556 uint32_t config;
557 uint32_t mask;
558 uint32_t advertise;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700559 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700560};
561
Rich Lanee9c37db2013-06-21 18:30:24 -0700562struct of_packet_in : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700563 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700564 uint8_t type == 10;
Rich Lanea06d0c32013-03-25 08:52:03 -0700565 uint16_t length;
566 uint32_t xid;
567 uint32_t buffer_id;
568 of_port_no_t in_port;
569 of_port_no_t in_phy_port;
570 uint16_t total_len;
571 uint8_t reason;
572 uint8_t table_id;
573 of_octets_t data;
574};
575
Rich Lanee9c37db2013-06-21 18:30:24 -0700576struct of_action_output : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700577 uint16_t type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -0700578 uint16_t len;
579 of_port_no_t port;
580 uint16_t max_len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700581 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -0700582};
583
Rich Lanee9c37db2013-06-21 18:30:24 -0700584struct of_action_set_vlan_vid : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700585 uint16_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -0700586 uint16_t len;
587 uint16_t vlan_vid;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700588 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700589};
590
Rich Lanee9c37db2013-06-21 18:30:24 -0700591struct of_action_set_vlan_pcp : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700592 uint16_t type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -0700593 uint16_t len;
594 uint8_t vlan_pcp;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700595 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700596};
597
Rich Lanee9c37db2013-06-21 18:30:24 -0700598struct of_action_set_dl_src : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700599 uint16_t type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -0700600 uint16_t len;
601 of_mac_addr_t dl_addr;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700602 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -0700603};
604
Rich Lanee9c37db2013-06-21 18:30:24 -0700605struct of_action_set_dl_dst : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700606 uint16_t type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -0700607 uint16_t len;
608 of_mac_addr_t dl_addr;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700609 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -0700610};
611
Rich Lanee9c37db2013-06-21 18:30:24 -0700612struct of_action_set_nw_src : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700613 uint16_t type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -0700614 uint16_t len;
615 uint32_t nw_addr;
616};
617
Rich Lanee9c37db2013-06-21 18:30:24 -0700618struct of_action_set_nw_dst : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700619 uint16_t type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -0700620 uint16_t len;
621 uint32_t nw_addr;
622};
623
Rich Lanee9c37db2013-06-21 18:30:24 -0700624struct of_action_set_nw_tos : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700625 uint16_t type == 7;
Rich Lanea06d0c32013-03-25 08:52:03 -0700626 uint16_t len;
627 uint8_t nw_tos;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700628 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700629};
630
Rich Lanee9c37db2013-06-21 18:30:24 -0700631struct of_action_set_nw_ecn : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700632 uint16_t type == 8;
Rich Lanea06d0c32013-03-25 08:52:03 -0700633 uint16_t len;
634 uint8_t nw_ecn;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700635 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700636};
637
Rich Lanee9c37db2013-06-21 18:30:24 -0700638struct of_action_set_tp_src : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700639 uint16_t type == 9;
Rich Lanea06d0c32013-03-25 08:52:03 -0700640 uint16_t len;
641 uint16_t tp_port;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700642 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700643};
644
Rich Lanee9c37db2013-06-21 18:30:24 -0700645struct of_action_set_tp_dst : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700646 uint16_t type == 10;
Rich Lanea06d0c32013-03-25 08:52:03 -0700647 uint16_t len;
648 uint16_t tp_port;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700649 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700650};
651
Rich Lanee9c37db2013-06-21 18:30:24 -0700652struct of_action_copy_ttl_out : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700653 uint16_t type == 11;
Rich Lanea06d0c32013-03-25 08:52:03 -0700654 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700655 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700656};
657
Rich Lanee9c37db2013-06-21 18:30:24 -0700658struct of_action_copy_ttl_in : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700659 uint16_t type == 12;
Rich Lanea06d0c32013-03-25 08:52:03 -0700660 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700661 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700662};
663
Rich Lanee9c37db2013-06-21 18:30:24 -0700664struct of_action_set_mpls_label : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700665 uint16_t type == 13;
Rich Lanea06d0c32013-03-25 08:52:03 -0700666 uint16_t len;
667 uint32_t mpls_label;
668};
669
Rich Lanee9c37db2013-06-21 18:30:24 -0700670struct of_action_set_mpls_tc : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700671 uint16_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700672 uint16_t len;
673 uint8_t mpls_tc;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700674 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700675};
676
Rich Lanee9c37db2013-06-21 18:30:24 -0700677struct of_action_set_mpls_ttl : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700678 uint16_t type == 15;
Rich Lanea06d0c32013-03-25 08:52:03 -0700679 uint16_t len;
680 uint8_t mpls_ttl;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700681 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700682};
683
Rich Lanee9c37db2013-06-21 18:30:24 -0700684struct of_action_dec_mpls_ttl : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700685 uint16_t type == 16;
Rich Lanea06d0c32013-03-25 08:52:03 -0700686 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700687 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700688};
689
Rich Lanee9c37db2013-06-21 18:30:24 -0700690struct of_action_push_vlan : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700691 uint16_t type == 17;
Rich Lanea06d0c32013-03-25 08:52:03 -0700692 uint16_t len;
693 uint16_t ethertype;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700694 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700695};
696
Rich Lanee9c37db2013-06-21 18:30:24 -0700697struct of_action_pop_vlan : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700698 uint16_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -0700699 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700700 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700701};
702
Rich Lanee9c37db2013-06-21 18:30:24 -0700703struct of_action_push_mpls : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700704 uint16_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -0700705 uint16_t len;
706 uint16_t ethertype;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700707 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700708};
709
Rich Lanee9c37db2013-06-21 18:30:24 -0700710struct of_action_pop_mpls : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700711 uint16_t type == 20;
Rich Lanea06d0c32013-03-25 08:52:03 -0700712 uint16_t len;
713 uint16_t ethertype;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700714 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700715};
716
Rich Lanee9c37db2013-06-21 18:30:24 -0700717struct of_action_set_queue : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700718 uint16_t type == 21;
Rich Lanea06d0c32013-03-25 08:52:03 -0700719 uint16_t len;
720 uint32_t queue_id;
721};
722
Rich Lanee9c37db2013-06-21 18:30:24 -0700723struct of_action_group : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700724 uint16_t type == 22;
Rich Lanea06d0c32013-03-25 08:52:03 -0700725 uint16_t len;
726 uint32_t group_id;
727};
728
Rich Lanee9c37db2013-06-21 18:30:24 -0700729struct of_action_set_nw_ttl : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700730 uint16_t type == 23;
Rich Lanea06d0c32013-03-25 08:52:03 -0700731 uint16_t len;
732 uint8_t nw_ttl;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700733 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700734};
735
Rich Lanee9c37db2013-06-21 18:30:24 -0700736struct of_action_dec_nw_ttl : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700737 uint16_t type == 24;
Rich Lanea06d0c32013-03-25 08:52:03 -0700738 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700739 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700740};
741
Rich Lanee9c37db2013-06-21 18:30:24 -0700742struct of_action_experimenter : of_action {
Rich Lane31b87142013-05-09 22:05:42 -0700743 uint16_t type == 65535;
Rich Lanea06d0c32013-03-25 08:52:03 -0700744 uint16_t len;
745 uint32_t experimenter;
746 of_octets_t data;
747};
748
Rich Lane68ae4d72013-05-09 10:55:19 -0700749struct of_action {
Andreas Wundsamc37ba3d2013-08-02 17:51:51 -0700750 uint16_t type == ?;
Rich Lanea06d0c32013-03-25 08:52:03 -0700751 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700752 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700753};
754
Rich Lanee9c37db2013-06-21 18:30:24 -0700755struct of_packet_out : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700756 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700757 uint8_t type == 13;
Rich Lanea06d0c32013-03-25 08:52:03 -0700758 uint16_t length;
759 uint32_t xid;
760 uint32_t buffer_id;
761 of_port_no_t in_port;
762 uint16_t actions_len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700763 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -0700764 list(of_action_t) actions;
765 of_octets_t data;
766};
767
Rich Lane68ae4d72013-05-09 10:55:19 -0700768struct of_match_v2 {
Rich Lane31b87142013-05-09 22:05:42 -0700769 uint16_t type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -0700770 uint16_t length;
771 of_port_no_t in_port;
772 of_wc_bmap_t wildcards;
773 of_mac_addr_t eth_src;
774 of_mac_addr_t eth_src_mask;
775 of_mac_addr_t eth_dst;
776 of_mac_addr_t eth_dst_mask;
777 uint16_t vlan_vid;
778 uint8_t vlan_pcp;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700779 pad(1);
Rich Lanea06d0c32013-03-25 08:52:03 -0700780 uint16_t eth_type;
781 uint8_t ip_dscp;
782 uint8_t ip_proto;
Andreas Wundsamb566a162013-07-18 19:30:23 -0700783 of_ipv4_t ipv4_src;
784 of_ipv4_t ipv4_src_mask;
785 of_ipv4_t ipv4_dst;
786 of_ipv4_t ipv4_dst_mask;
Rich Lanea06d0c32013-03-25 08:52:03 -0700787 uint16_t tcp_src;
788 uint16_t tcp_dst;
789 uint32_t mpls_label;
790 uint8_t mpls_tc;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700791 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700792 uint64_t metadata;
793 uint64_t metadata_mask;
794};
795
Rich Lane68ae4d72013-05-09 10:55:19 -0700796struct of_instruction {
Andreas Wundsamc37ba3d2013-08-02 17:51:51 -0700797 uint16_t type == ?;
Rich Lanea06d0c32013-03-25 08:52:03 -0700798 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700799 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700800};
801
Rich Lanee9c37db2013-06-21 18:30:24 -0700802struct of_instruction_goto_table : of_instruction {
Rich Lane31b87142013-05-09 22:05:42 -0700803 uint16_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -0700804 uint16_t len;
805 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700806 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700807};
808
Rich Lanee9c37db2013-06-21 18:30:24 -0700809struct of_instruction_write_metadata : of_instruction {
Rich Lane31b87142013-05-09 22:05:42 -0700810 uint16_t type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -0700811 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700812 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700813 uint64_t metadata;
814 uint64_t metadata_mask;
815};
816
Rich Lanee9c37db2013-06-21 18:30:24 -0700817struct of_instruction_write_actions : of_instruction {
Rich Lane31b87142013-05-09 22:05:42 -0700818 uint16_t type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -0700819 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700820 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700821 list(of_action_t) actions;
822};
823
Rich Lanee9c37db2013-06-21 18:30:24 -0700824struct of_instruction_apply_actions : of_instruction {
Rich Lane31b87142013-05-09 22:05:42 -0700825 uint16_t type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -0700826 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700827 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700828 list(of_action_t) actions;
829};
830
Rich Lanee9c37db2013-06-21 18:30:24 -0700831struct of_instruction_clear_actions : of_instruction {
Rich Lane31b87142013-05-09 22:05:42 -0700832 uint16_t type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -0700833 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700834 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700835};
836
Rich Lanee9c37db2013-06-21 18:30:24 -0700837struct of_instruction_experimenter : of_instruction {
Rich Lane31b87142013-05-09 22:05:42 -0700838 uint16_t type == 65535;
Rich Lanea06d0c32013-03-25 08:52:03 -0700839 uint16_t len;
840 uint32_t experimenter;
841 of_octets_t data;
842};
843
Rich Lanee9c37db2013-06-21 18:30:24 -0700844struct of_flow_mod : of_header {
845 uint8_t version;
846 uint8_t type == 14;
847 uint16_t length;
848 uint32_t xid;
849 uint64_t cookie;
850 uint64_t cookie_mask;
851 uint8_t table_id;
Andreas Wundsamc37ba3d2013-08-02 17:51:51 -0700852 of_fm_cmd_t _command == ?;
Rich Lanee9c37db2013-06-21 18:30:24 -0700853 uint16_t idle_timeout;
854 uint16_t hard_timeout;
855 uint16_t priority;
856 uint32_t buffer_id;
857 of_port_no_t out_port;
858 uint32_t out_group;
859 uint16_t flags;
860 pad(2);
861 of_match_t match;
862 list(of_instruction_t) instructions;
863};
864
865struct of_flow_add : of_flow_mod {
Rich Lanea06d0c32013-03-25 08:52:03 -0700866 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700867 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700868 uint16_t length;
869 uint32_t xid;
870 uint64_t cookie;
871 uint64_t cookie_mask;
872 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700873 of_fm_cmd_t _command == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -0700874 uint16_t idle_timeout;
875 uint16_t hard_timeout;
876 uint16_t priority;
877 uint32_t buffer_id;
878 of_port_no_t out_port;
879 uint32_t out_group;
880 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700881 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700882 of_match_t match;
883 list(of_instruction_t) instructions;
884};
885
Rich Lanee9c37db2013-06-21 18:30:24 -0700886struct of_flow_modify : of_flow_mod {
Rich Lanea06d0c32013-03-25 08:52:03 -0700887 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700888 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700889 uint16_t length;
890 uint32_t xid;
891 uint64_t cookie;
892 uint64_t cookie_mask;
893 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700894 of_fm_cmd_t _command == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -0700895 uint16_t idle_timeout;
896 uint16_t hard_timeout;
897 uint16_t priority;
898 uint32_t buffer_id;
899 of_port_no_t out_port;
900 uint32_t out_group;
901 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700902 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700903 of_match_t match;
904 list(of_instruction_t) instructions;
905};
906
Rich Lanee9c37db2013-06-21 18:30:24 -0700907struct of_flow_modify_strict : of_flow_mod {
Rich Lanea06d0c32013-03-25 08:52:03 -0700908 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700909 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700910 uint16_t length;
911 uint32_t xid;
912 uint64_t cookie;
913 uint64_t cookie_mask;
914 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700915 of_fm_cmd_t _command == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -0700916 uint16_t idle_timeout;
917 uint16_t hard_timeout;
918 uint16_t priority;
919 uint32_t buffer_id;
920 of_port_no_t out_port;
921 uint32_t out_group;
922 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700923 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700924 of_match_t match;
925 list(of_instruction_t) instructions;
926};
927
Rich Lanee9c37db2013-06-21 18:30:24 -0700928struct of_flow_delete : of_flow_mod {
Rich Lanea06d0c32013-03-25 08:52:03 -0700929 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700930 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700931 uint16_t length;
932 uint32_t xid;
933 uint64_t cookie;
934 uint64_t cookie_mask;
935 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700936 of_fm_cmd_t _command == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -0700937 uint16_t idle_timeout;
938 uint16_t hard_timeout;
939 uint16_t priority;
940 uint32_t buffer_id;
941 of_port_no_t out_port;
942 uint32_t out_group;
943 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700944 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700945 of_match_t match;
946 list(of_instruction_t) instructions;
947};
948
Rich Lanee9c37db2013-06-21 18:30:24 -0700949struct of_flow_delete_strict : of_flow_mod {
Rich Lanea06d0c32013-03-25 08:52:03 -0700950 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700951 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700952 uint16_t length;
953 uint32_t xid;
954 uint64_t cookie;
955 uint64_t cookie_mask;
956 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700957 of_fm_cmd_t _command == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -0700958 uint16_t idle_timeout;
959 uint16_t hard_timeout;
960 uint16_t priority;
961 uint32_t buffer_id;
962 of_port_no_t out_port;
963 uint32_t out_group;
964 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700965 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700966 of_match_t match;
967 list(of_instruction_t) instructions;
968};
969
Rich Lane68ae4d72013-05-09 10:55:19 -0700970struct of_bucket {
Rich Lanea06d0c32013-03-25 08:52:03 -0700971 uint16_t len;
972 uint16_t weight;
973 of_port_no_t watch_port;
974 uint32_t watch_group;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700975 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700976 list(of_action_t) actions;
977};
978
Rich Lanee9c37db2013-06-21 18:30:24 -0700979struct of_group_mod : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700980 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700981 uint8_t type == 15;
Rich Lanea06d0c32013-03-25 08:52:03 -0700982 uint16_t length;
983 uint32_t xid;
984 uint16_t command;
985 uint8_t group_type;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700986 pad(1);
Rich Lanea06d0c32013-03-25 08:52:03 -0700987 uint32_t group_id;
988 list(of_bucket_t) buckets;
989};
990
Rich Lanee9c37db2013-06-21 18:30:24 -0700991struct of_flow_removed : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700992 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700993 uint8_t type == 11;
Rich Lanea06d0c32013-03-25 08:52:03 -0700994 uint16_t length;
995 uint32_t xid;
996 uint64_t cookie;
997 uint16_t priority;
998 uint8_t reason;
999 uint8_t table_id;
1000 uint32_t duration_sec;
1001 uint32_t duration_nsec;
1002 uint16_t idle_timeout;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001003 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -07001004 uint64_t packet_count;
1005 uint64_t byte_count;
1006 of_match_t match;
1007};
1008
Rich Lanee9c37db2013-06-21 18:30:24 -07001009struct of_error_msg : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -07001010 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001011 uint8_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001012 uint16_t length;
1013 uint32_t xid;
1014 uint16_t err_type;
1015 uint16_t code;
1016 of_octets_t data;
1017};
1018
1019// STATS ENTRIES: flow, table, port, group, group_desc
1020
Rich Lane68ae4d72013-05-09 10:55:19 -07001021struct of_flow_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001022 uint16_t length;
1023 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001024 pad(1);
Rich Lanea06d0c32013-03-25 08:52:03 -07001025 uint32_t duration_sec;
1026 uint32_t duration_nsec;
1027 uint16_t priority;
1028 uint16_t idle_timeout;
1029 uint16_t hard_timeout;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001030 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -07001031 uint64_t cookie;
1032 uint64_t packet_count;
1033 uint64_t byte_count;
1034 of_match_t match;
1035 list(of_instruction_t) instructions;
1036};
1037
Rich Lane68ae4d72013-05-09 10:55:19 -07001038struct of_table_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001039 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001040 pad(7);
Rich Lanea06d0c32013-03-25 08:52:03 -07001041 of_table_name_t name;
1042 of_wc_bmap_t wildcards;
1043 of_match_bmap_t match;
1044 uint32_t instructions;
1045 uint32_t write_actions;
1046 uint32_t apply_actions;
1047 uint32_t config;
1048 uint32_t max_entries;
1049 uint32_t active_count;
1050 uint64_t lookup_count;
1051 uint64_t matched_count;
1052};
1053
Rich Lane68ae4d72013-05-09 10:55:19 -07001054struct of_port_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001055 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001056 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001057 uint64_t rx_packets;
1058 uint64_t tx_packets;
1059 uint64_t rx_bytes;
1060 uint64_t tx_bytes;
1061 uint64_t rx_dropped;
1062 uint64_t tx_dropped;
1063 uint64_t rx_errors;
1064 uint64_t tx_errors;
1065 uint64_t rx_frame_err;
1066 uint64_t rx_over_err;
1067 uint64_t rx_crc_err;
1068 uint64_t collisions;
1069};
1070
Rich Lane68ae4d72013-05-09 10:55:19 -07001071struct of_queue_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001072 of_port_no_t port_no;
1073 uint32_t queue_id;
1074 uint64_t tx_bytes;
1075 uint64_t tx_packets;
1076 uint64_t tx_errors;
1077};
1078
Rich Lane68ae4d72013-05-09 10:55:19 -07001079struct of_bucket_counter {
Rich Lanea06d0c32013-03-25 08:52:03 -07001080 uint64_t packet_count;
1081 uint64_t byte_count;
1082};
1083
Rich Lane68ae4d72013-05-09 10:55:19 -07001084struct of_group_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001085 uint16_t length;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001086 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -07001087 uint32_t group_id;
1088 uint32_t ref_count;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001089 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001090 uint64_t packet_count;
1091 uint64_t byte_count;
1092 list(of_bucket_counter_t) bucket_stats;
1093};
1094
Rich Lane68ae4d72013-05-09 10:55:19 -07001095struct of_group_desc_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001096 uint16_t length;
1097 uint8_t type;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001098 pad(1);
Rich Lanea06d0c32013-03-25 08:52:03 -07001099 uint32_t group_id;
1100 list(of_bucket_t) buckets;
1101};
1102
1103// STATS: Desc, flow, agg, table, port, queue, group, group_desc, experi
1104
Rich Lanee9c37db2013-06-21 18:30:24 -07001105struct of_stats_request : of_header {
1106 uint8_t version;
1107 uint8_t type == 18;
1108 uint16_t length;
1109 uint32_t xid;
Andreas Wundsamc37ba3d2013-08-02 17:51:51 -07001110 uint16_t stats_type == ?;
Rich Lanee9c37db2013-06-21 18:30:24 -07001111 uint16_t flags;
1112 pad(4);
1113};
1114
1115struct of_stats_reply : of_header {
1116 uint8_t version;
1117 uint8_t type == 19;
1118 uint16_t length;
1119 uint32_t xid;
Andreas Wundsamc37ba3d2013-08-02 17:51:51 -07001120 uint16_t stats_type == ?;
Rich Lanee9c37db2013-06-21 18:30:24 -07001121 uint16_t flags;
1122 pad(4);
1123};
1124
1125struct of_desc_stats_request : of_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001126 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001127 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001128 uint16_t length;
1129 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001130 uint16_t stats_type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -07001131 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001132 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001133};
1134
Rich Lanee9c37db2013-06-21 18:30:24 -07001135struct of_desc_stats_reply : of_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001136 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001137 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001138 uint16_t length;
1139 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001140 uint16_t stats_type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -07001141 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001142 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001143 of_desc_str_t mfr_desc;
1144 of_desc_str_t hw_desc;
1145 of_desc_str_t sw_desc;
1146 of_serial_num_t serial_num;
1147 of_desc_str_t dp_desc;
1148};
1149
Rich Lanee9c37db2013-06-21 18:30:24 -07001150struct of_flow_stats_request : of_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001151 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001152 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001153 uint16_t length;
1154 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001155 uint16_t stats_type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001156 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001157 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001158 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001159 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -07001160 of_port_no_t out_port;
1161 uint32_t out_group;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001162 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001163 uint64_t cookie;
1164 uint64_t cookie_mask;
1165 of_match_t match;
1166};
1167
Rich Lanee9c37db2013-06-21 18:30:24 -07001168struct of_flow_stats_reply : of_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001169 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001170 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001171 uint16_t length;
1172 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001173 uint16_t stats_type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001174 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001175 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001176 list(of_flow_stats_entry_t) entries;
1177};
1178
Rich Lanee9c37db2013-06-21 18:30:24 -07001179struct of_aggregate_stats_request : of_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001180 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001181 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001182 uint16_t length;
1183 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001184 uint16_t stats_type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -07001185 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001186 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001187 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001188 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -07001189 of_port_no_t out_port;
1190 uint32_t out_group;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001191 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001192 uint64_t cookie;
1193 uint64_t cookie_mask;
1194 of_match_t match;
1195};
1196
Rich Lanee9c37db2013-06-21 18:30:24 -07001197struct of_aggregate_stats_reply : of_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001198 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001199 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001200 uint16_t length;
1201 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001202 uint16_t stats_type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -07001203 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001204 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001205 uint64_t packet_count;
1206 uint64_t byte_count;
1207 uint32_t flow_count;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001208 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001209};
1210
Rich Lanee9c37db2013-06-21 18:30:24 -07001211struct of_table_stats_request : of_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001212 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001213 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001214 uint16_t length;
1215 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001216 uint16_t stats_type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -07001217 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001218 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001219};
1220
Rich Lanee9c37db2013-06-21 18:30:24 -07001221struct of_table_stats_reply : of_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001222 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001223 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001224 uint16_t length;
1225 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001226 uint16_t stats_type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -07001227 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001228 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001229 list(of_table_stats_entry_t) entries;
1230};
1231
Rich Lanee9c37db2013-06-21 18:30:24 -07001232struct of_port_stats_request : of_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001233 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001234 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001235 uint16_t length;
1236 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001237 uint16_t stats_type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -07001238 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001239 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001240 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001241 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001242};
1243
Rich Lanee9c37db2013-06-21 18:30:24 -07001244struct of_port_stats_reply : of_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001245 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001246 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001247 uint16_t length;
1248 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001249 uint16_t stats_type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -07001250 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001251 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001252 list(of_port_stats_entry_t) entries;
1253};
1254
Rich Lanee9c37db2013-06-21 18:30:24 -07001255struct of_queue_stats_request : of_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001256 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001257 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001258 uint16_t length;
1259 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001260 uint16_t stats_type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -07001261 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001262 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001263 of_port_no_t port_no;
1264 uint32_t queue_id;
1265};
1266
Rich Lanee9c37db2013-06-21 18:30:24 -07001267struct of_queue_stats_reply : of_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001268 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001269 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001270 uint16_t length;
1271 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001272 uint16_t stats_type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -07001273 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001274 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001275 list(of_queue_stats_entry_t) entries;
1276};
1277
Rich Lanee9c37db2013-06-21 18:30:24 -07001278struct of_group_stats_request : of_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001279 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001280 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001281 uint16_t length;
1282 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001283 uint16_t stats_type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -07001284 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001285 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001286 uint32_t group_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001287 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001288};
1289
Rich Lanee9c37db2013-06-21 18:30:24 -07001290struct of_group_stats_reply : of_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001291 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001292 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001293 uint16_t length;
1294 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001295 uint16_t stats_type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -07001296 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001297 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001298 list(of_group_stats_entry_t) entries;
1299};
1300
Rich Lanee9c37db2013-06-21 18:30:24 -07001301struct of_group_desc_stats_request : of_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001302 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001303 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001304 uint16_t length;
1305 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001306 uint16_t stats_type == 7;
Rich Lanea06d0c32013-03-25 08:52:03 -07001307 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001308 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001309};
1310
Rich Lanee9c37db2013-06-21 18:30:24 -07001311struct of_group_desc_stats_reply : of_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001312 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001313 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001314 uint16_t length;
1315 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001316 uint16_t stats_type == 7;
Rich Lanea06d0c32013-03-25 08:52:03 -07001317 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001318 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001319 list(of_group_desc_stats_entry_t) entries;
1320};
1321
Rich Lanee9c37db2013-06-21 18:30:24 -07001322struct of_experimenter_stats_request : of_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001323 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001324 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001325 uint16_t length;
1326 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001327 uint16_t stats_type == 0xffff;
Rich Lanea06d0c32013-03-25 08:52:03 -07001328 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001329 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001330 uint32_t experimenter;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001331 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001332 of_octets_t data;
1333};
1334
Rich Lanee9c37db2013-06-21 18:30:24 -07001335struct of_experimenter_stats_reply : of_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001336 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001337 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001338 uint16_t length;
1339 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001340 uint16_t stats_type == 0xffff;
Rich Lanea06d0c32013-03-25 08:52:03 -07001341 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001342 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001343 uint32_t experimenter;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001344 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001345 of_octets_t data;
1346};
1347
1348// END OF STATS OBJECTS
1349
Rich Lane68ae4d72013-05-09 10:55:19 -07001350struct of_queue_prop {
Andreas Wundsamc37ba3d2013-08-02 17:51:51 -07001351 uint16_t type == ?;
Rich Lanea06d0c32013-03-25 08:52:03 -07001352 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001353 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001354};
1355
Rich Lanee9c37db2013-06-21 18:30:24 -07001356struct of_queue_prop_min_rate : of_queue_prop {
Rich Lane31b87142013-05-09 22:05:42 -07001357 uint16_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001358 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001359 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001360 uint16_t rate;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001361 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -07001362};
1363
Rich Lane68ae4d72013-05-09 10:55:19 -07001364struct of_packet_queue {
Rich Lanea06d0c32013-03-25 08:52:03 -07001365 uint32_t queue_id;
1366 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001367 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -07001368 list(of_queue_prop_t) properties;
1369};
1370
Rich Lanee9c37db2013-06-21 18:30:24 -07001371struct of_queue_get_config_request : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -07001372 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001373 uint8_t type == 22;
Rich Lanea06d0c32013-03-25 08:52:03 -07001374 uint16_t length;
1375 uint32_t xid;
1376 of_port_no_t port;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001377 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001378};
1379
Rich Lanee9c37db2013-06-21 18:30:24 -07001380struct of_queue_get_config_reply : of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -07001381 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001382 uint8_t type == 23;
Rich Lanea06d0c32013-03-25 08:52:03 -07001383 uint16_t length;
1384 uint32_t xid;
1385 of_port_no_t port;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001386 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001387 list(of_packet_queue_t) queues;
1388};