blob: 18faaa8d6935befa3ededa683604e5f9dc4cb30a [file] [log] [blame]
Rich Lanea06d0c32013-03-25 08:52:03 -07001// Copyright 2013, Big Switch Networks, Inc.
2//
3// LoxiGen is licensed under the Eclipse Public License, version 1.0 (EPL), with
4// the following special exception:
5//
6// LOXI Exception
7//
8// As a special exception to the terms of the EPL, you may distribute libraries
9// generated by LoxiGen (LoxiGen Libraries) under the terms of your choice, provided
10// that copyright and licensing notices generated by LoxiGen are not altered or removed
11// from the LoxiGen Libraries and the notice provided below is (i) included in
12// the LoxiGen Libraries, if distributed in source code form and (ii) included in any
13// documentation for the LoxiGen Libraries, if distributed in binary form.
14//
15// Notice: "Copyright 2013, Big Switch Networks, Inc. This library was generated by the LoxiGen Compiler."
16//
17// You may not use this file except in compliance with the EPL or LOXI Exception. You may obtain
18// a copy of the EPL at:
19//
20// http://www.eclipse.org/legal/epl-v10.html
21//
22// Unless required by applicable law or agreed to in writing, software
23// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
24// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
25// EPL for the specific language governing permissions and limitations
26// under the EPL.
Rich Lane5d33a622013-04-08 17:33:11 -070027//
28// Also derived from the OpenFlow header files which have these copyrights:
29// Copyright (c) 2008 The Board of Trustees of The Leland Stanford Junior University
30// Copyright (c) 2011, 2012 Open Networking Foundation
Rich Lanea06d0c32013-03-25 08:52:03 -070031
32#version 2
33
Rich Lane5d33a622013-04-08 17:33:11 -070034enum macro_definitions {
35 OFP_MAX_TABLE_NAME_LEN = 32,
36 OFP_MAX_PORT_NAME_LEN = 16,
37
38 OFP_TCP_PORT = 6633,
39 OFP_SSL_PORT = 6633,
40
41 OFP_ETH_ALEN = 6,
42
43 OFP_DEFAULT_MISS_SEND_LEN = 128,
44
45 OFPFW_ICMP_TYPE = 0x40,
46 OFPFW_ICMP_CODE = 0x80,
47
48 OFP_DL_TYPE_ETH2_CUTOFF = 0x600,
49 OFP_DL_TYPE_NOT_ETH_TYPE = 0x5ff,
50
51 OFP_VLAN_NONE = 0,
52
53 OFPMT_STANDARD_LENGTH = 88,
54
55 OFP_FLOW_PERMANENT = 0,
56
57 OFP_DEFAULT_PRIORITY = 0x8000,
58
59 DESC_STR_LEN = 256,
60 SERIAL_NUM_LEN = 32,
61
62 OFPQ_ALL = 0xffffffff,
63 OFPQ_MIN_RATE_UNCFG = 0xffff,
64};
65
Andreas Wundsam4ee51462013-07-30 11:00:37 -070066enum ofp_port(wire_type=uint32_t) {
Rich Lane5d33a622013-04-08 17:33:11 -070067 OFPP_MAX = 0xffffff00,
68 OFPP_IN_PORT = 0xfffffff8,
69 OFPP_TABLE = 0xfffffff9,
70 OFPP_NORMAL = 0xfffffffa,
71 OFPP_FLOOD = 0xfffffffb,
72 OFPP_ALL = 0xfffffffc,
73 OFPP_CONTROLLER = 0xfffffffd,
74 OFPP_LOCAL = 0xfffffffe,
75};
76
Andreas Wundsam4ee51462013-07-30 11:00:37 -070077enum ofp_port_no(wire_type=uint32_t, complete=no) {
Rich Lane5d33a622013-04-08 17:33:11 -070078 OFPP_ANY = 0xffffffff,
79};
80
Andreas Wundsam4ee51462013-07-30 11:00:37 -070081enum ofp_type(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -070082 OFPT_HELLO = 0,
83 OFPT_ERROR = 1,
84 OFPT_ECHO_REQUEST = 2,
85 OFPT_ECHO_REPLY = 3,
86 OFPT_EXPERIMENTER = 4,
87 OFPT_FEATURES_REQUEST = 5,
88 OFPT_FEATURES_REPLY = 6,
89 OFPT_GET_CONFIG_REQUEST = 7,
90 OFPT_GET_CONFIG_REPLY = 8,
91 OFPT_SET_CONFIG = 9,
92 OFPT_PACKET_IN = 10,
93 OFPT_FLOW_REMOVED = 11,
94 OFPT_PORT_STATUS = 12,
95 OFPT_PACKET_OUT = 13,
96 OFPT_FLOW_MOD = 14,
97 OFPT_GROUP_MOD = 15,
98 OFPT_PORT_MOD = 16,
99 OFPT_TABLE_MOD = 17,
100 OFPT_STATS_REQUEST = 18,
101 OFPT_STATS_REPLY = 19,
102 OFPT_BARRIER_REQUEST = 20,
103 OFPT_BARRIER_REPLY = 21,
104 OFPT_QUEUE_GET_CONFIG_REQUEST = 22,
105 OFPT_QUEUE_GET_CONFIG_REPLY = 23,
106};
107
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700108enum ofp_config_flags(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700109 OFPC_FRAG_NORMAL = 0,
110 OFPC_FRAG_DROP = 1,
111 OFPC_FRAG_REASM = 2,
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700112 OFPC_FRAG_MASK(virtual=True) = 3,
Rich Lane5d33a622013-04-08 17:33:11 -0700113 OFPC_INVALID_TTL_TO_CONTROLLER = 4,
114};
115
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700116enum ofp_table_config(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700117 OFPTC_TABLE_MISS_CONTROLLER = 0,
118 OFPTC_TABLE_MISS_CONTINUE = 1,
119 OFPTC_TABLE_MISS_DROP = 2,
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700120 OFPTC_TABLE_MISS_MASK(virtual=True) = 3,
Rich Lane5d33a622013-04-08 17:33:11 -0700121};
122
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700123enum ofp_capabilities(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700124 OFPC_FLOW_STATS = 0x1,
125 OFPC_TABLE_STATS = 0x2,
126 OFPC_PORT_STATS = 0x4,
127 OFPC_GROUP_STATS = 0x8,
128 OFPC_IP_REASM = 0x20,
129 OFPC_QUEUE_STATS = 0x40,
130 OFPC_ARP_MATCH_IP = 0x80,
131};
132
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700133enum ofp_port_config(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700134 OFPPC_PORT_DOWN = 0x1,
135 OFPPC_NO_RECV = 0x4,
136 OFPPC_NO_FWD = 0x20,
137 OFPPC_NO_PACKET_IN = 0x40,
138};
139
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700140enum ofp_port_state(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700141 OFPPS_LINK_DOWN = 0x1,
142 OFPPS_BLOCKED = 0x2,
143 OFPPS_LIVE = 0x4,
144};
145
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700146enum ofp_port_features(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700147 OFPPF_10MB_HD = 0x1,
148 OFPPF_10MB_FD = 0x2,
149 OFPPF_100MB_HD = 0x4,
150 OFPPF_100MB_FD = 0x8,
151 OFPPF_1GB_HD = 0x10,
152 OFPPF_1GB_FD = 0x20,
153 OFPPF_10GB_FD = 0x40,
154 OFPPF_40GB_FD = 0x80,
155 OFPPF_100GB_FD = 0x100,
156 OFPPF_1TB_FD = 0x200,
157 OFPPF_OTHER = 0x400,
158 OFPPF_COPPER = 0x800,
159 OFPPF_FIBER = 0x1000,
160 OFPPF_AUTONEG = 0x2000,
161 OFPPF_PAUSE = 0x4000,
162 OFPPF_PAUSE_ASYM = 0x8000,
163};
164
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700165enum ofp_port_reason(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700166 OFPPR_ADD = 0,
167 OFPPR_DELETE = 1,
168 OFPPR_MODIFY = 2,
169};
170
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700171enum ofp_packet_in_reason(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700172 OFPR_NO_MATCH = 0,
173 OFPR_ACTION = 1,
174};
175
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700176enum ofp_action_type(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700177 OFPAT_OUTPUT = 0,
178 OFPAT_SET_VLAN_VID = 1,
179 OFPAT_SET_VLAN_PCP = 2,
180 OFPAT_SET_DL_SRC = 3,
181 OFPAT_SET_DL_DST = 4,
182 OFPAT_SET_NW_SRC = 5,
183 OFPAT_SET_NW_DST = 6,
184 OFPAT_SET_NW_TOS = 7,
185 OFPAT_SET_NW_ECN = 8,
186 OFPAT_SET_TP_SRC = 9,
187 OFPAT_SET_TP_DST = 10,
188 OFPAT_COPY_TTL_OUT = 11,
189 OFPAT_COPY_TTL_IN = 12,
190 OFPAT_SET_MPLS_LABEL = 13,
191 OFPAT_SET_MPLS_TC = 14,
192 OFPAT_SET_MPLS_TTL = 15,
193 OFPAT_DEC_MPLS_TTL = 16,
194 OFPAT_PUSH_VLAN = 17,
195 OFPAT_POP_VLAN = 18,
196 OFPAT_PUSH_MPLS = 19,
197 OFPAT_POP_MPLS = 20,
198 OFPAT_SET_QUEUE = 21,
199 OFPAT_GROUP = 22,
200 OFPAT_SET_NW_TTL = 23,
201 OFPAT_DEC_NW_TTL = 24,
202 OFPAT_EXPERIMENTER = 0xffff,
203};
204
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700205enum ofp_flow_mod_command(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700206 OFPFC_ADD = 0,
207 OFPFC_MODIFY = 1,
208 OFPFC_MODIFY_STRICT = 2,
209 OFPFC_DELETE = 3,
210 OFPFC_DELETE_STRICT = 4,
211};
212
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700213enum ofp_group_mod_command(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700214 OFPGC_ADD = 0,
215 OFPGC_MODIFY = 1,
216 OFPGC_DELETE = 2,
217};
218
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700219enum ofp_flow_wildcards(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700220 OFPFW_IN_PORT = 0x1,
221 OFPFW_DL_VLAN = 0x2,
222 OFPFW_DL_VLAN_PCP = 0x4,
223 OFPFW_DL_TYPE = 0x8,
224 OFPFW_NW_TOS = 0x10,
225 OFPFW_NW_PROTO = 0x20,
226 OFPFW_TP_SRC = 0x40,
227 OFPFW_TP_DST = 0x80,
228 OFPFW_MPLS_LABEL = 0x100,
229 OFPFW_MPLS_TC = 0x200,
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700230 OFPFW_ALL(virtual=True) = 0x3ff,
Rich Lane5d33a622013-04-08 17:33:11 -0700231};
232
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700233enum ofp_vlan_id(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700234 OFPVID_ANY = 0xfffe,
235 OFPVID_NONE = 0xffff,
236};
237
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700238enum ofp_match_type(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700239 OFPMT_STANDARD = 0,
240};
241
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700242enum ofp_instruction_type(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700243 OFPIT_GOTO_TABLE = 0x1,
244 OFPIT_WRITE_METADATA = 0x2,
245 OFPIT_WRITE_ACTIONS = 0x3,
246 OFPIT_APPLY_ACTIONS = 0x4,
247 OFPIT_CLEAR_ACTIONS = 0x5,
248 OFPIT_EXPERIMENTER = 0xffff,
249};
250
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700251enum ofp_flow_mod_flags(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700252 OFPFF_SEND_FLOW_REM = 0x1,
253 OFPFF_CHECK_OVERLAP = 0x2,
254};
255
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700256enum ofp_group(wire_type=uint32_t, complete=False) {
Rich Lane5d33a622013-04-08 17:33:11 -0700257 OFPG_MAX = 0xffffff00,
258 OFPG_ALL = 0xfffffffc,
259 OFPG_ANY = 0xffffffff,
260};
261
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700262enum ofp_group_type(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700263 OFPGT_ALL = 0,
264 OFPGT_SELECT = 1,
265 OFPGT_INDIRECT = 2,
266 OFPGT_FF = 3,
267};
268
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700269enum ofp_flow_removed_reason(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700270 OFPRR_IDLE_TIMEOUT = 0,
271 OFPRR_HARD_TIMEOUT = 1,
272 OFPRR_DELETE = 2,
273 OFPRR_GROUP_DELETE = 3,
274};
275
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700276enum ofp_error_type(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700277 OFPET_HELLO_FAILED = 0,
278 OFPET_BAD_REQUEST = 1,
279 OFPET_BAD_ACTION = 2,
280 OFPET_BAD_INSTRUCTION = 3,
281 OFPET_BAD_MATCH = 4,
282 OFPET_FLOW_MOD_FAILED = 5,
283 OFPET_GROUP_MOD_FAILED = 6,
284 OFPET_PORT_MOD_FAILED = 7,
285 OFPET_TABLE_MOD_FAILED = 8,
286 OFPET_QUEUE_OP_FAILED = 9,
287 OFPET_SWITCH_CONFIG_FAILED = 10,
288};
289
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700290enum ofp_hello_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700291 OFPHFC_INCOMPATIBLE = 0,
292 OFPHFC_EPERM = 1,
293};
294
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700295enum ofp_bad_request_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700296 OFPBRC_BAD_VERSION = 0,
297 OFPBRC_BAD_TYPE = 1,
298 OFPBRC_BAD_STAT = 2,
299 OFPBRC_BAD_EXPERIMENTER = 3,
300 OFPBRC_BAD_SUBTYPE = 4,
301 OFPBRC_EPERM = 5,
302 OFPBRC_BAD_LEN = 6,
303 OFPBRC_BUFFER_EMPTY = 7,
304 OFPBRC_BUFFER_UNKNOWN = 8,
305 OFPBRC_BAD_TABLE_ID = 9,
306};
307
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700308enum ofp_bad_action_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700309 OFPBAC_BAD_TYPE = 0,
310 OFPBAC_BAD_LEN = 1,
311 OFPBAC_BAD_EXPERIMENTER = 2,
312 OFPBAC_BAD_EXPERIMENTER_TYPE = 3,
313 OFPBAC_BAD_OUT_PORT = 4,
314 OFPBAC_BAD_ARGUMENT = 5,
315 OFPBAC_EPERM = 6,
316 OFPBAC_TOO_MANY = 7,
317 OFPBAC_BAD_QUEUE = 8,
318 OFPBAC_BAD_OUT_GROUP = 9,
319 OFPBAC_MATCH_INCONSISTENT = 10,
320 OFPBAC_UNSUPPORTED_ORDER = 11,
321 OFPBAC_BAD_TAG = 12,
322};
323
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700324enum ofp_bad_instruction_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700325 OFPBIC_UNKNOWN_INST = 0,
326 OFPBIC_UNSUP_INST = 1,
327 OFPBIC_BAD_TABLE_ID = 2,
328 OFPBIC_UNSUP_METADATA = 3,
329 OFPBIC_UNSUP_METADATA_MASK = 4,
330 OFPBIC_UNSUP_EXP_INST = 5,
331};
332
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700333enum ofp_bad_match_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700334 OFPBMC_BAD_TYPE = 0,
335 OFPBMC_BAD_LEN = 1,
336 OFPBMC_BAD_TAG = 2,
337 OFPBMC_BAD_DL_ADDR_MASK = 3,
338 OFPBMC_BAD_NW_ADDR_MASK = 4,
339 OFPBMC_BAD_WILDCARDS = 5,
340 OFPBMC_BAD_FIELD = 6,
341 OFPBMC_BAD_VALUE = 7,
342};
343
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700344enum ofp_flow_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700345 OFPFMFC_UNKNOWN = 0,
346 OFPFMFC_TABLE_FULL = 1,
347 OFPFMFC_BAD_TABLE_ID = 2,
348 OFPFMFC_OVERLAP = 3,
349 OFPFMFC_EPERM = 4,
350 OFPFMFC_BAD_TIMEOUT = 5,
351 OFPFMFC_BAD_COMMAND = 6,
352};
353
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700354enum ofp_group_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700355 OFPGMFC_GROUP_EXISTS = 0,
356 OFPGMFC_INVALID_GROUP = 1,
357 OFPGMFC_WEIGHT_UNSUPPORTED = 2,
358 OFPGMFC_OUT_OF_GROUPS = 3,
359 OFPGMFC_OUT_OF_BUCKETS = 4,
360 OFPGMFC_CHAINING_UNSUPPORTED = 5,
361 OFPGMFC_WATCH_UNSUPPORTED = 6,
362 OFPGMFC_LOOP = 7,
363 OFPGMFC_UNKNOWN_GROUP = 8,
364};
365
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700366enum ofp_port_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700367 OFPPMFC_BAD_PORT = 0,
368 OFPPMFC_BAD_HW_ADDR = 1,
369 OFPPMFC_BAD_CONFIG = 2,
370 OFPPMFC_BAD_ADVERTISE = 3,
371};
372
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700373enum ofp_table_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700374 OFPTMFC_BAD_TABLE = 0,
375 OFPTMFC_BAD_CONFIG = 1,
376};
377
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700378enum ofp_queue_op_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700379 OFPQOFC_BAD_PORT = 0,
380 OFPQOFC_BAD_QUEUE = 1,
381 OFPQOFC_EPERM = 2,
382};
383
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700384enum ofp_switch_config_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700385 OFPSCFC_BAD_FLAGS = 0,
386 OFPSCFC_BAD_LEN = 1,
387};
388
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700389enum ofp_stats_types(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700390 OFPST_DESC = 0,
391 OFPST_FLOW = 1,
392 OFPST_AGGREGATE = 2,
393 OFPST_TABLE = 3,
394 OFPST_PORT = 4,
395 OFPST_QUEUE = 5,
396 OFPST_GROUP = 6,
397 OFPST_GROUP_DESC = 7,
398 OFPST_EXPERIMENTER = 0xffff,
399};
400
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700401enum ofp_stats_reply_flags(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700402 OFPSF_REPLY_MORE = 0x1,
403};
404
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700405enum ofp_queue_properties(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700406 OFPQT_NONE = 0,
407 OFPQT_MIN_RATE = 1,
408};
409
Rich Lane68ae4d72013-05-09 10:55:19 -0700410struct of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700411 uint8_t version;
412 uint8_t type;
413 uint16_t length;
414 uint32_t xid;
415};
416
Rich Lane68ae4d72013-05-09 10:55:19 -0700417struct of_hello {
Rich Lanea06d0c32013-03-25 08:52:03 -0700418 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700419 uint8_t type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -0700420 uint16_t length;
421 uint32_t xid;
422};
423
Rich Lane68ae4d72013-05-09 10:55:19 -0700424struct of_echo_request {
Rich Lanea06d0c32013-03-25 08:52:03 -0700425 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700426 uint8_t type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -0700427 uint16_t length;
428 uint32_t xid;
429 of_octets_t data;
430};
431
Rich Lane68ae4d72013-05-09 10:55:19 -0700432struct of_echo_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -0700433 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700434 uint8_t type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -0700435 uint16_t length;
436 uint32_t xid;
437 of_octets_t data;
438};
439
Rich Lane68ae4d72013-05-09 10:55:19 -0700440struct of_experimenter {
Rich Lanea06d0c32013-03-25 08:52:03 -0700441 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700442 uint8_t type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -0700443 uint16_t length;
444 uint32_t xid;
445 uint32_t experimenter;
446 uint32_t subtype;
447 of_octets_t data;
448};
449
Rich Lane68ae4d72013-05-09 10:55:19 -0700450struct of_barrier_request {
Rich Lanea06d0c32013-03-25 08:52:03 -0700451 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700452 uint8_t type == 20;
Rich Lanea06d0c32013-03-25 08:52:03 -0700453 uint16_t length;
454 uint32_t xid;
455};
456
Rich Lane68ae4d72013-05-09 10:55:19 -0700457struct of_barrier_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -0700458 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700459 uint8_t type == 21;
Rich Lanea06d0c32013-03-25 08:52:03 -0700460 uint16_t length;
461 uint32_t xid;
462};
463
Rich Lane68ae4d72013-05-09 10:55:19 -0700464struct of_get_config_request {
Rich Lanea06d0c32013-03-25 08:52:03 -0700465 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700466 uint8_t type == 7;
Rich Lanea06d0c32013-03-25 08:52:03 -0700467 uint16_t length;
468 uint32_t xid;
469};
470
Rich Lane68ae4d72013-05-09 10:55:19 -0700471struct of_get_config_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -0700472 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700473 uint8_t type == 8;
Rich Lanea06d0c32013-03-25 08:52:03 -0700474 uint16_t length;
475 uint32_t xid;
476 uint16_t flags;
477 uint16_t miss_send_len;
478};
479
Rich Lane68ae4d72013-05-09 10:55:19 -0700480struct of_set_config {
Rich Lanea06d0c32013-03-25 08:52:03 -0700481 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700482 uint8_t type == 9;
Rich Lanea06d0c32013-03-25 08:52:03 -0700483 uint16_t length;
484 uint32_t xid;
485 uint16_t flags;
486 uint16_t miss_send_len;
487};
488
Rich Lane68ae4d72013-05-09 10:55:19 -0700489struct of_table_mod {
Rich Lanea06d0c32013-03-25 08:52:03 -0700490 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700491 uint8_t type == 17;
Rich Lanea06d0c32013-03-25 08:52:03 -0700492 uint16_t length;
493 uint32_t xid;
494 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700495 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700496 uint32_t config;
497};
498
Rich Lane68ae4d72013-05-09 10:55:19 -0700499struct of_port_desc {
Rich Lanea06d0c32013-03-25 08:52:03 -0700500 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700501 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700502 of_mac_addr_t hw_addr;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700503 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700504 of_port_name_t name;
505 uint32_t config;
506 uint32_t state;
507 uint32_t curr;
508 uint32_t advertised;
509 uint32_t supported;
510 uint32_t peer;
511 uint32_t curr_speed;
512 uint32_t max_speed;
513};
514
Rich Lane68ae4d72013-05-09 10:55:19 -0700515struct of_features_request {
Rich Lanea06d0c32013-03-25 08:52:03 -0700516 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700517 uint8_t type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -0700518 uint16_t length;
519 uint32_t xid;
520};
521
Rich Lane68ae4d72013-05-09 10:55:19 -0700522struct of_features_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -0700523 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700524 uint8_t type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -0700525 uint16_t length;
526 uint32_t xid;
527 uint64_t datapath_id;
528 uint32_t n_buffers;
529 uint8_t n_tables;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700530 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700531 uint32_t capabilities;
532 uint32_t reserved;
533 list(of_port_desc_t) ports;
534};
535
Rich Lane68ae4d72013-05-09 10:55:19 -0700536struct of_port_status {
Rich Lanea06d0c32013-03-25 08:52:03 -0700537 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700538 uint8_t type == 12;
Rich Lanea06d0c32013-03-25 08:52:03 -0700539 uint16_t length;
540 uint32_t xid;
541 uint8_t reason;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700542 pad(7);
Rich Lanea06d0c32013-03-25 08:52:03 -0700543 of_port_desc_t desc;
544};
545
Rich Lane68ae4d72013-05-09 10:55:19 -0700546struct of_port_mod {
Rich Lanea06d0c32013-03-25 08:52:03 -0700547 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700548 uint8_t type == 16;
Rich Lanea06d0c32013-03-25 08:52:03 -0700549 uint16_t length;
550 uint32_t xid;
551 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700552 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700553 of_mac_addr_t hw_addr;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700554 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700555 uint32_t config;
556 uint32_t mask;
557 uint32_t advertise;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700558 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700559};
560
Rich Lane68ae4d72013-05-09 10:55:19 -0700561struct of_packet_in {
Rich Lanea06d0c32013-03-25 08:52:03 -0700562 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700563 uint8_t type == 10;
Rich Lanea06d0c32013-03-25 08:52:03 -0700564 uint16_t length;
565 uint32_t xid;
566 uint32_t buffer_id;
567 of_port_no_t in_port;
568 of_port_no_t in_phy_port;
569 uint16_t total_len;
570 uint8_t reason;
571 uint8_t table_id;
572 of_octets_t data;
573};
574
Rich Lane68ae4d72013-05-09 10:55:19 -0700575struct of_action_output {
Rich Lane31b87142013-05-09 22:05:42 -0700576 uint16_t type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -0700577 uint16_t len;
578 of_port_no_t port;
579 uint16_t max_len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700580 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -0700581};
582
Rich Lane68ae4d72013-05-09 10:55:19 -0700583struct of_action_set_vlan_vid {
Rich Lane31b87142013-05-09 22:05:42 -0700584 uint16_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -0700585 uint16_t len;
586 uint16_t vlan_vid;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700587 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700588};
589
Rich Lane68ae4d72013-05-09 10:55:19 -0700590struct of_action_set_vlan_pcp {
Rich Lane31b87142013-05-09 22:05:42 -0700591 uint16_t type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -0700592 uint16_t len;
593 uint8_t vlan_pcp;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700594 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700595};
596
Rich Lane68ae4d72013-05-09 10:55:19 -0700597struct of_action_set_dl_src {
Rich Lane31b87142013-05-09 22:05:42 -0700598 uint16_t type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -0700599 uint16_t len;
600 of_mac_addr_t dl_addr;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700601 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -0700602};
603
Rich Lane68ae4d72013-05-09 10:55:19 -0700604struct of_action_set_dl_dst {
Rich Lane31b87142013-05-09 22:05:42 -0700605 uint16_t type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -0700606 uint16_t len;
607 of_mac_addr_t dl_addr;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700608 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -0700609};
610
Rich Lane68ae4d72013-05-09 10:55:19 -0700611struct of_action_set_nw_src {
Rich Lane31b87142013-05-09 22:05:42 -0700612 uint16_t type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -0700613 uint16_t len;
614 uint32_t nw_addr;
615};
616
Rich Lane68ae4d72013-05-09 10:55:19 -0700617struct of_action_set_nw_dst {
Rich Lane31b87142013-05-09 22:05:42 -0700618 uint16_t type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -0700619 uint16_t len;
620 uint32_t nw_addr;
621};
622
Rich Lane68ae4d72013-05-09 10:55:19 -0700623struct of_action_set_nw_tos {
Rich Lane31b87142013-05-09 22:05:42 -0700624 uint16_t type == 7;
Rich Lanea06d0c32013-03-25 08:52:03 -0700625 uint16_t len;
626 uint8_t nw_tos;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700627 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700628};
629
Rich Lane68ae4d72013-05-09 10:55:19 -0700630struct of_action_set_nw_ecn {
Rich Lane31b87142013-05-09 22:05:42 -0700631 uint16_t type == 8;
Rich Lanea06d0c32013-03-25 08:52:03 -0700632 uint16_t len;
633 uint8_t nw_ecn;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700634 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700635};
636
Rich Lane68ae4d72013-05-09 10:55:19 -0700637struct of_action_set_tp_src {
Rich Lane31b87142013-05-09 22:05:42 -0700638 uint16_t type == 9;
Rich Lanea06d0c32013-03-25 08:52:03 -0700639 uint16_t len;
640 uint16_t tp_port;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700641 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700642};
643
Rich Lane68ae4d72013-05-09 10:55:19 -0700644struct of_action_set_tp_dst {
Rich Lane31b87142013-05-09 22:05:42 -0700645 uint16_t type == 10;
Rich Lanea06d0c32013-03-25 08:52:03 -0700646 uint16_t len;
647 uint16_t tp_port;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700648 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700649};
650
Rich Lane68ae4d72013-05-09 10:55:19 -0700651struct of_action_copy_ttl_out {
Rich Lane31b87142013-05-09 22:05:42 -0700652 uint16_t type == 11;
Rich Lanea06d0c32013-03-25 08:52:03 -0700653 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700654 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700655};
656
Rich Lane68ae4d72013-05-09 10:55:19 -0700657struct of_action_copy_ttl_in {
Rich Lane31b87142013-05-09 22:05:42 -0700658 uint16_t type == 12;
Rich Lanea06d0c32013-03-25 08:52:03 -0700659 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700660 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700661};
662
Rich Lane68ae4d72013-05-09 10:55:19 -0700663struct of_action_set_mpls_label {
Rich Lane31b87142013-05-09 22:05:42 -0700664 uint16_t type == 13;
Rich Lanea06d0c32013-03-25 08:52:03 -0700665 uint16_t len;
666 uint32_t mpls_label;
667};
668
Rich Lane68ae4d72013-05-09 10:55:19 -0700669struct of_action_set_mpls_tc {
Rich Lane31b87142013-05-09 22:05:42 -0700670 uint16_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700671 uint16_t len;
672 uint8_t mpls_tc;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700673 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700674};
675
Rich Lane68ae4d72013-05-09 10:55:19 -0700676struct of_action_set_mpls_ttl {
Rich Lane31b87142013-05-09 22:05:42 -0700677 uint16_t type == 15;
Rich Lanea06d0c32013-03-25 08:52:03 -0700678 uint16_t len;
679 uint8_t mpls_ttl;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700680 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700681};
682
Rich Lane68ae4d72013-05-09 10:55:19 -0700683struct of_action_dec_mpls_ttl {
Rich Lane31b87142013-05-09 22:05:42 -0700684 uint16_t type == 16;
Rich Lanea06d0c32013-03-25 08:52:03 -0700685 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700686 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700687};
688
Rich Lane68ae4d72013-05-09 10:55:19 -0700689struct of_action_push_vlan {
Rich Lane31b87142013-05-09 22:05:42 -0700690 uint16_t type == 17;
Rich Lanea06d0c32013-03-25 08:52:03 -0700691 uint16_t len;
692 uint16_t ethertype;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700693 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700694};
695
Rich Lane68ae4d72013-05-09 10:55:19 -0700696struct of_action_pop_vlan {
Rich Lane31b87142013-05-09 22:05:42 -0700697 uint16_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -0700698 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700699 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700700};
701
Rich Lane68ae4d72013-05-09 10:55:19 -0700702struct of_action_push_mpls {
Rich Lane31b87142013-05-09 22:05:42 -0700703 uint16_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -0700704 uint16_t len;
705 uint16_t ethertype;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700706 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700707};
708
Rich Lane68ae4d72013-05-09 10:55:19 -0700709struct of_action_pop_mpls {
Rich Lane31b87142013-05-09 22:05:42 -0700710 uint16_t type == 20;
Rich Lanea06d0c32013-03-25 08:52:03 -0700711 uint16_t len;
712 uint16_t ethertype;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700713 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700714};
715
Rich Lane68ae4d72013-05-09 10:55:19 -0700716struct of_action_set_queue {
Rich Lane31b87142013-05-09 22:05:42 -0700717 uint16_t type == 21;
Rich Lanea06d0c32013-03-25 08:52:03 -0700718 uint16_t len;
719 uint32_t queue_id;
720};
721
Rich Lane68ae4d72013-05-09 10:55:19 -0700722struct of_action_group {
Rich Lane31b87142013-05-09 22:05:42 -0700723 uint16_t type == 22;
Rich Lanea06d0c32013-03-25 08:52:03 -0700724 uint16_t len;
725 uint32_t group_id;
726};
727
Rich Lane68ae4d72013-05-09 10:55:19 -0700728struct of_action_set_nw_ttl {
Rich Lane31b87142013-05-09 22:05:42 -0700729 uint16_t type == 23;
Rich Lanea06d0c32013-03-25 08:52:03 -0700730 uint16_t len;
731 uint8_t nw_ttl;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700732 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700733};
734
Rich Lane68ae4d72013-05-09 10:55:19 -0700735struct of_action_dec_nw_ttl {
Rich Lane31b87142013-05-09 22:05:42 -0700736 uint16_t type == 24;
Rich Lanea06d0c32013-03-25 08:52:03 -0700737 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700738 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700739};
740
Rich Lane68ae4d72013-05-09 10:55:19 -0700741struct of_action_experimenter {
Rich Lane31b87142013-05-09 22:05:42 -0700742 uint16_t type == 65535;
Rich Lanea06d0c32013-03-25 08:52:03 -0700743 uint16_t len;
744 uint32_t experimenter;
745 of_octets_t data;
746};
747
Rich Lane68ae4d72013-05-09 10:55:19 -0700748struct of_action {
Rich Lanea06d0c32013-03-25 08:52:03 -0700749 uint16_t type;
750 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700751 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700752};
753
Rich Lane68ae4d72013-05-09 10:55:19 -0700754struct of_packet_out {
Rich Lanea06d0c32013-03-25 08:52:03 -0700755 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700756 uint8_t type == 13;
Rich Lanea06d0c32013-03-25 08:52:03 -0700757 uint16_t length;
758 uint32_t xid;
759 uint32_t buffer_id;
760 of_port_no_t in_port;
761 uint16_t actions_len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700762 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -0700763 list(of_action_t) actions;
764 of_octets_t data;
765};
766
Rich Lane68ae4d72013-05-09 10:55:19 -0700767struct of_match_v2 {
Rich Lane31b87142013-05-09 22:05:42 -0700768 uint16_t type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -0700769 uint16_t length;
770 of_port_no_t in_port;
771 of_wc_bmap_t wildcards;
772 of_mac_addr_t eth_src;
773 of_mac_addr_t eth_src_mask;
774 of_mac_addr_t eth_dst;
775 of_mac_addr_t eth_dst_mask;
776 uint16_t vlan_vid;
777 uint8_t vlan_pcp;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700778 pad(1);
Rich Lanea06d0c32013-03-25 08:52:03 -0700779 uint16_t eth_type;
780 uint8_t ip_dscp;
781 uint8_t ip_proto;
Andreas Wundsamb566a162013-07-18 19:30:23 -0700782 of_ipv4_t ipv4_src;
783 of_ipv4_t ipv4_src_mask;
784 of_ipv4_t ipv4_dst;
785 of_ipv4_t ipv4_dst_mask;
Rich Lanea06d0c32013-03-25 08:52:03 -0700786 uint16_t tcp_src;
787 uint16_t tcp_dst;
788 uint32_t mpls_label;
789 uint8_t mpls_tc;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700790 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700791 uint64_t metadata;
792 uint64_t metadata_mask;
793};
794
Rich Lane68ae4d72013-05-09 10:55:19 -0700795struct of_instruction {
Rich Lanea06d0c32013-03-25 08:52:03 -0700796 uint16_t type;
797 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700798 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700799};
800
Rich Lane68ae4d72013-05-09 10:55:19 -0700801struct of_instruction_goto_table {
Rich Lane31b87142013-05-09 22:05:42 -0700802 uint16_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -0700803 uint16_t len;
804 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700805 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700806};
807
Rich Lane68ae4d72013-05-09 10:55:19 -0700808struct of_instruction_write_metadata {
Rich Lane31b87142013-05-09 22:05:42 -0700809 uint16_t type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -0700810 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700811 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700812 uint64_t metadata;
813 uint64_t metadata_mask;
814};
815
Rich Lane68ae4d72013-05-09 10:55:19 -0700816struct of_instruction_write_actions {
Rich Lane31b87142013-05-09 22:05:42 -0700817 uint16_t type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -0700818 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700819 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700820 list(of_action_t) actions;
821};
822
Rich Lane68ae4d72013-05-09 10:55:19 -0700823struct of_instruction_apply_actions {
Rich Lane31b87142013-05-09 22:05:42 -0700824 uint16_t type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -0700825 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700826 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700827 list(of_action_t) actions;
828};
829
Rich Lane68ae4d72013-05-09 10:55:19 -0700830struct of_instruction_clear_actions {
Rich Lane31b87142013-05-09 22:05:42 -0700831 uint16_t type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -0700832 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700833 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700834};
835
Rich Lane68ae4d72013-05-09 10:55:19 -0700836struct of_instruction_experimenter {
Rich Lane31b87142013-05-09 22:05:42 -0700837 uint16_t type == 65535;
Rich Lanea06d0c32013-03-25 08:52:03 -0700838 uint16_t len;
839 uint32_t experimenter;
840 of_octets_t data;
841};
842
Rich Lane68ae4d72013-05-09 10:55:19 -0700843struct of_flow_add {
Rich Lanea06d0c32013-03-25 08:52:03 -0700844 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700845 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700846 uint16_t length;
847 uint32_t xid;
848 uint64_t cookie;
849 uint64_t cookie_mask;
850 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700851 of_fm_cmd_t _command == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -0700852 uint16_t idle_timeout;
853 uint16_t hard_timeout;
854 uint16_t priority;
855 uint32_t buffer_id;
856 of_port_no_t out_port;
857 uint32_t out_group;
858 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700859 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700860 of_match_t match;
861 list(of_instruction_t) instructions;
862};
863
Rich Lane68ae4d72013-05-09 10:55:19 -0700864struct of_flow_modify {
Rich Lanea06d0c32013-03-25 08:52:03 -0700865 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700866 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700867 uint16_t length;
868 uint32_t xid;
869 uint64_t cookie;
870 uint64_t cookie_mask;
871 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700872 of_fm_cmd_t _command == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -0700873 uint16_t idle_timeout;
874 uint16_t hard_timeout;
875 uint16_t priority;
876 uint32_t buffer_id;
877 of_port_no_t out_port;
878 uint32_t out_group;
879 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700880 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700881 of_match_t match;
882 list(of_instruction_t) instructions;
883};
884
Rich Lane68ae4d72013-05-09 10:55:19 -0700885struct of_flow_modify_strict {
Rich Lanea06d0c32013-03-25 08:52:03 -0700886 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700887 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700888 uint16_t length;
889 uint32_t xid;
890 uint64_t cookie;
891 uint64_t cookie_mask;
892 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700893 of_fm_cmd_t _command == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -0700894 uint16_t idle_timeout;
895 uint16_t hard_timeout;
896 uint16_t priority;
897 uint32_t buffer_id;
898 of_port_no_t out_port;
899 uint32_t out_group;
900 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700901 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700902 of_match_t match;
903 list(of_instruction_t) instructions;
904};
905
Rich Lane68ae4d72013-05-09 10:55:19 -0700906struct of_flow_delete {
Rich Lanea06d0c32013-03-25 08:52:03 -0700907 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700908 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700909 uint16_t length;
910 uint32_t xid;
911 uint64_t cookie;
912 uint64_t cookie_mask;
913 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700914 of_fm_cmd_t _command == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -0700915 uint16_t idle_timeout;
916 uint16_t hard_timeout;
917 uint16_t priority;
918 uint32_t buffer_id;
919 of_port_no_t out_port;
920 uint32_t out_group;
921 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700922 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700923 of_match_t match;
924 list(of_instruction_t) instructions;
925};
926
Rich Lane68ae4d72013-05-09 10:55:19 -0700927struct of_flow_delete_strict {
Rich Lanea06d0c32013-03-25 08:52:03 -0700928 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700929 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700930 uint16_t length;
931 uint32_t xid;
932 uint64_t cookie;
933 uint64_t cookie_mask;
934 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700935 of_fm_cmd_t _command == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -0700936 uint16_t idle_timeout;
937 uint16_t hard_timeout;
938 uint16_t priority;
939 uint32_t buffer_id;
940 of_port_no_t out_port;
941 uint32_t out_group;
942 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700943 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700944 of_match_t match;
945 list(of_instruction_t) instructions;
946};
947
Rich Lane68ae4d72013-05-09 10:55:19 -0700948struct of_bucket {
Rich Lanea06d0c32013-03-25 08:52:03 -0700949 uint16_t len;
950 uint16_t weight;
951 of_port_no_t watch_port;
952 uint32_t watch_group;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700953 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700954 list(of_action_t) actions;
955};
956
Rich Lane68ae4d72013-05-09 10:55:19 -0700957struct of_group_mod {
Rich Lanea06d0c32013-03-25 08:52:03 -0700958 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700959 uint8_t type == 15;
Rich Lanea06d0c32013-03-25 08:52:03 -0700960 uint16_t length;
961 uint32_t xid;
962 uint16_t command;
963 uint8_t group_type;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700964 pad(1);
Rich Lanea06d0c32013-03-25 08:52:03 -0700965 uint32_t group_id;
966 list(of_bucket_t) buckets;
967};
968
Rich Lane68ae4d72013-05-09 10:55:19 -0700969struct of_flow_removed {
Rich Lanea06d0c32013-03-25 08:52:03 -0700970 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700971 uint8_t type == 11;
Rich Lanea06d0c32013-03-25 08:52:03 -0700972 uint16_t length;
973 uint32_t xid;
974 uint64_t cookie;
975 uint16_t priority;
976 uint8_t reason;
977 uint8_t table_id;
978 uint32_t duration_sec;
979 uint32_t duration_nsec;
980 uint16_t idle_timeout;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700981 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700982 uint64_t packet_count;
983 uint64_t byte_count;
984 of_match_t match;
985};
986
Rich Lane68ae4d72013-05-09 10:55:19 -0700987struct of_error_msg {
Rich Lanea06d0c32013-03-25 08:52:03 -0700988 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700989 uint8_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -0700990 uint16_t length;
991 uint32_t xid;
992 uint16_t err_type;
993 uint16_t code;
994 of_octets_t data;
995};
996
997// STATS ENTRIES: flow, table, port, group, group_desc
998
Rich Lane68ae4d72013-05-09 10:55:19 -0700999struct of_flow_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001000 uint16_t length;
1001 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001002 pad(1);
Rich Lanea06d0c32013-03-25 08:52:03 -07001003 uint32_t duration_sec;
1004 uint32_t duration_nsec;
1005 uint16_t priority;
1006 uint16_t idle_timeout;
1007 uint16_t hard_timeout;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001008 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -07001009 uint64_t cookie;
1010 uint64_t packet_count;
1011 uint64_t byte_count;
1012 of_match_t match;
1013 list(of_instruction_t) instructions;
1014};
1015
Rich Lane68ae4d72013-05-09 10:55:19 -07001016struct of_table_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001017 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001018 pad(7);
Rich Lanea06d0c32013-03-25 08:52:03 -07001019 of_table_name_t name;
1020 of_wc_bmap_t wildcards;
1021 of_match_bmap_t match;
1022 uint32_t instructions;
1023 uint32_t write_actions;
1024 uint32_t apply_actions;
1025 uint32_t config;
1026 uint32_t max_entries;
1027 uint32_t active_count;
1028 uint64_t lookup_count;
1029 uint64_t matched_count;
1030};
1031
Rich Lane68ae4d72013-05-09 10:55:19 -07001032struct of_port_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001033 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001034 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001035 uint64_t rx_packets;
1036 uint64_t tx_packets;
1037 uint64_t rx_bytes;
1038 uint64_t tx_bytes;
1039 uint64_t rx_dropped;
1040 uint64_t tx_dropped;
1041 uint64_t rx_errors;
1042 uint64_t tx_errors;
1043 uint64_t rx_frame_err;
1044 uint64_t rx_over_err;
1045 uint64_t rx_crc_err;
1046 uint64_t collisions;
1047};
1048
Rich Lane68ae4d72013-05-09 10:55:19 -07001049struct of_queue_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001050 of_port_no_t port_no;
1051 uint32_t queue_id;
1052 uint64_t tx_bytes;
1053 uint64_t tx_packets;
1054 uint64_t tx_errors;
1055};
1056
Rich Lane68ae4d72013-05-09 10:55:19 -07001057struct of_bucket_counter {
Rich Lanea06d0c32013-03-25 08:52:03 -07001058 uint64_t packet_count;
1059 uint64_t byte_count;
1060};
1061
Rich Lane68ae4d72013-05-09 10:55:19 -07001062struct of_group_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001063 uint16_t length;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001064 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -07001065 uint32_t group_id;
1066 uint32_t ref_count;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001067 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001068 uint64_t packet_count;
1069 uint64_t byte_count;
1070 list(of_bucket_counter_t) bucket_stats;
1071};
1072
Rich Lane68ae4d72013-05-09 10:55:19 -07001073struct of_group_desc_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001074 uint16_t length;
1075 uint8_t type;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001076 pad(1);
Rich Lanea06d0c32013-03-25 08:52:03 -07001077 uint32_t group_id;
1078 list(of_bucket_t) buckets;
1079};
1080
1081// STATS: Desc, flow, agg, table, port, queue, group, group_desc, experi
1082
Rich Lane68ae4d72013-05-09 10:55:19 -07001083struct of_desc_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001084 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001085 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001086 uint16_t length;
1087 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001088 uint16_t stats_type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -07001089 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001090 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001091};
1092
Rich Lane68ae4d72013-05-09 10:55:19 -07001093struct of_desc_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001094 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001095 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001096 uint16_t length;
1097 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001098 uint16_t stats_type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -07001099 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001100 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001101 of_desc_str_t mfr_desc;
1102 of_desc_str_t hw_desc;
1103 of_desc_str_t sw_desc;
1104 of_serial_num_t serial_num;
1105 of_desc_str_t dp_desc;
1106};
1107
Rich Lane68ae4d72013-05-09 10:55:19 -07001108struct of_flow_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001109 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001110 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001111 uint16_t length;
1112 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001113 uint16_t stats_type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001114 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001115 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001116 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001117 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -07001118 of_port_no_t out_port;
1119 uint32_t out_group;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001120 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001121 uint64_t cookie;
1122 uint64_t cookie_mask;
1123 of_match_t match;
1124};
1125
Rich Lane68ae4d72013-05-09 10:55:19 -07001126struct of_flow_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001127 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001128 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001129 uint16_t length;
1130 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001131 uint16_t stats_type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001132 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001133 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001134 list(of_flow_stats_entry_t) entries;
1135};
1136
Rich Lane68ae4d72013-05-09 10:55:19 -07001137struct of_aggregate_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001138 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001139 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001140 uint16_t length;
1141 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001142 uint16_t stats_type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -07001143 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001144 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001145 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001146 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -07001147 of_port_no_t out_port;
1148 uint32_t out_group;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001149 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001150 uint64_t cookie;
1151 uint64_t cookie_mask;
1152 of_match_t match;
1153};
1154
Rich Lane68ae4d72013-05-09 10:55:19 -07001155struct of_aggregate_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001156 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001157 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001158 uint16_t length;
1159 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001160 uint16_t stats_type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -07001161 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001162 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001163 uint64_t packet_count;
1164 uint64_t byte_count;
1165 uint32_t flow_count;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001166 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001167};
1168
Rich Lane68ae4d72013-05-09 10:55:19 -07001169struct of_table_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001170 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001171 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001172 uint16_t length;
1173 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001174 uint16_t stats_type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -07001175 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001176 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001177};
1178
Rich Lane68ae4d72013-05-09 10:55:19 -07001179struct of_table_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001180 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001181 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001182 uint16_t length;
1183 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001184 uint16_t stats_type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -07001185 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001186 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001187 list(of_table_stats_entry_t) entries;
1188};
1189
Rich Lane68ae4d72013-05-09 10:55:19 -07001190struct of_port_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001191 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001192 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001193 uint16_t length;
1194 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001195 uint16_t stats_type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -07001196 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001197 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001198 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001199 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001200};
1201
Rich Lane68ae4d72013-05-09 10:55:19 -07001202struct of_port_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001203 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001204 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001205 uint16_t length;
1206 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001207 uint16_t stats_type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -07001208 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001209 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001210 list(of_port_stats_entry_t) entries;
1211};
1212
Rich Lane68ae4d72013-05-09 10:55:19 -07001213struct of_queue_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001214 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001215 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001216 uint16_t length;
1217 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001218 uint16_t stats_type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -07001219 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001220 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001221 of_port_no_t port_no;
1222 uint32_t queue_id;
1223};
1224
Rich Lane68ae4d72013-05-09 10:55:19 -07001225struct of_queue_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001226 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001227 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001228 uint16_t length;
1229 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001230 uint16_t stats_type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -07001231 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001232 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001233 list(of_queue_stats_entry_t) entries;
1234};
1235
Rich Lane68ae4d72013-05-09 10:55:19 -07001236struct of_group_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001237 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001238 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001239 uint16_t length;
1240 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001241 uint16_t stats_type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -07001242 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001243 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001244 uint32_t group_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001245 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001246};
1247
Rich Lane68ae4d72013-05-09 10:55:19 -07001248struct of_group_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001249 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001250 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001251 uint16_t length;
1252 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001253 uint16_t stats_type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -07001254 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001255 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001256 list(of_group_stats_entry_t) entries;
1257};
1258
Rich Lane68ae4d72013-05-09 10:55:19 -07001259struct of_group_desc_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001260 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001261 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001262 uint16_t length;
1263 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001264 uint16_t stats_type == 7;
Rich Lanea06d0c32013-03-25 08:52:03 -07001265 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001266 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001267};
1268
Rich Lane68ae4d72013-05-09 10:55:19 -07001269struct of_group_desc_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001270 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001271 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001272 uint16_t length;
1273 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001274 uint16_t stats_type == 7;
Rich Lanea06d0c32013-03-25 08:52:03 -07001275 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001276 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001277 list(of_group_desc_stats_entry_t) entries;
1278};
1279
Rich Lane68ae4d72013-05-09 10:55:19 -07001280struct of_experimenter_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001281 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001282 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001283 uint16_t length;
1284 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001285 uint16_t stats_type == 0xffff;
Rich Lanea06d0c32013-03-25 08:52:03 -07001286 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001287 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001288 uint32_t experimenter;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001289 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001290 of_octets_t data;
1291};
1292
Rich Lane68ae4d72013-05-09 10:55:19 -07001293struct of_experimenter_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001294 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001295 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001296 uint16_t length;
1297 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001298 uint16_t stats_type == 0xffff;
Rich Lanea06d0c32013-03-25 08:52:03 -07001299 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001300 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001301 uint32_t experimenter;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001302 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001303 of_octets_t data;
1304};
1305
1306// END OF STATS OBJECTS
1307
Rich Lane68ae4d72013-05-09 10:55:19 -07001308struct of_queue_prop {
Rich Lanea06d0c32013-03-25 08:52:03 -07001309 uint16_t type;
1310 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001311 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001312};
1313
Rich Lane68ae4d72013-05-09 10:55:19 -07001314struct of_queue_prop_min_rate {
Rich Lane31b87142013-05-09 22:05:42 -07001315 uint16_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001316 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001317 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001318 uint16_t rate;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001319 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -07001320};
1321
Rich Lane68ae4d72013-05-09 10:55:19 -07001322struct of_packet_queue {
Rich Lanea06d0c32013-03-25 08:52:03 -07001323 uint32_t queue_id;
1324 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001325 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -07001326 list(of_queue_prop_t) properties;
1327};
1328
Rich Lane68ae4d72013-05-09 10:55:19 -07001329struct of_queue_get_config_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001330 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001331 uint8_t type == 22;
Rich Lanea06d0c32013-03-25 08:52:03 -07001332 uint16_t length;
1333 uint32_t xid;
1334 of_port_no_t port;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001335 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001336};
1337
Rich Lane68ae4d72013-05-09 10:55:19 -07001338struct of_queue_get_config_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001339 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001340 uint8_t type == 23;
Rich Lanea06d0c32013-03-25 08:52:03 -07001341 uint16_t length;
1342 uint32_t xid;
1343 of_port_no_t port;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001344 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001345 list(of_packet_queue_t) queues;
1346};