Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1 | // Copyright 2013, Big Switch Networks, Inc. |
| 2 | // |
| 3 | // LoxiGen is licensed under the Eclipse Public License, version 1.0 (EPL), with |
| 4 | // the following special exception: |
| 5 | // |
| 6 | // LOXI Exception |
| 7 | // |
| 8 | // As a special exception to the terms of the EPL, you may distribute libraries |
| 9 | // generated by LoxiGen (LoxiGen Libraries) under the terms of your choice, provided |
| 10 | // that copyright and licensing notices generated by LoxiGen are not altered or removed |
| 11 | // from the LoxiGen Libraries and the notice provided below is (i) included in |
| 12 | // the LoxiGen Libraries, if distributed in source code form and (ii) included in any |
| 13 | // documentation for the LoxiGen Libraries, if distributed in binary form. |
| 14 | // |
| 15 | // Notice: "Copyright 2013, Big Switch Networks, Inc. This library was generated by the LoxiGen Compiler." |
| 16 | // |
| 17 | // You may not use this file except in compliance with the EPL or LOXI Exception. You may obtain |
| 18 | // a copy of the EPL at: |
| 19 | // |
| 20 | // http://www.eclipse.org/legal/epl-v10.html |
| 21 | // |
| 22 | // Unless required by applicable law or agreed to in writing, software |
| 23 | // distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
| 24 | // WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the |
| 25 | // EPL for the specific language governing permissions and limitations |
| 26 | // under the EPL. |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 27 | // |
| 28 | // Also derived from the OpenFlow header files which have these copyrights: |
| 29 | // Copyright (c) 2008 The Board of Trustees of The Leland Stanford Junior University |
| 30 | // Copyright (c) 2011, 2012 Open Networking Foundation |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 31 | |
| 32 | #version 4 |
| 33 | |
Rich Lane | 5d33a62 | 2013-04-08 17:33:11 -0700 | [diff] [blame] | 34 | enum macro_definitions { |
| 35 | OFP_MAX_TABLE_NAME_LEN = 32, |
| 36 | OFP_MAX_PORT_NAME_LEN = 16, |
| 37 | |
| 38 | OFP_TCP_PORT = 6633, |
| 39 | OFP_SSL_PORT = 6633, |
| 40 | |
| 41 | OFP_ETH_ALEN = 6, |
| 42 | |
| 43 | OFP_DEFAULT_MISS_SEND_LEN = 128, |
| 44 | |
| 45 | OFP_VLAN_NONE = 0, |
| 46 | |
| 47 | OFP_FLOW_PERMANENT = 0, |
| 48 | |
| 49 | OFP_DEFAULT_PRIORITY = 0x8000, |
| 50 | |
| 51 | OFP_NO_BUFFER = 0xffffffff, |
| 52 | |
| 53 | DESC_STR_LEN = 256, |
| 54 | SERIAL_NUM_LEN = 32, |
| 55 | |
| 56 | OFPQ_ALL = 0xffffffff, |
| 57 | OFPQ_MAX_RATE_UNCFG = 0xffff, |
| 58 | OFPQ_MIN_RATE_UNCFG = 0xffff, |
| 59 | }; |
| 60 | |
| 61 | enum ofp_port_no { |
| 62 | OFPP_ANY = 0xffffffff, |
| 63 | }; |
| 64 | |
| 65 | enum ofp_port { |
| 66 | OFPP_MAX = 0xffffff00, |
| 67 | OFPP_IN_PORT = 0xfffffff8, |
| 68 | OFPP_TABLE = 0xfffffff9, |
| 69 | OFPP_NORMAL = 0xfffffffa, |
| 70 | OFPP_FLOOD = 0xfffffffb, |
| 71 | OFPP_ALL = 0xfffffffc, |
| 72 | OFPP_CONTROLLER = 0xfffffffd, |
| 73 | OFPP_LOCAL = 0xfffffffe, |
| 74 | }; |
| 75 | |
| 76 | enum ofp_type { |
| 77 | OFPT_HELLO = 0, |
| 78 | OFPT_ERROR = 1, |
| 79 | OFPT_ECHO_REQUEST = 2, |
| 80 | OFPT_ECHO_REPLY = 3, |
| 81 | OFPT_EXPERIMENTER = 4, |
| 82 | OFPT_FEATURES_REQUEST = 5, |
| 83 | OFPT_FEATURES_REPLY = 6, |
| 84 | OFPT_GET_CONFIG_REQUEST = 7, |
| 85 | OFPT_GET_CONFIG_REPLY = 8, |
| 86 | OFPT_SET_CONFIG = 9, |
| 87 | OFPT_PACKET_IN = 10, |
| 88 | OFPT_FLOW_REMOVED = 11, |
| 89 | OFPT_PORT_STATUS = 12, |
| 90 | OFPT_PACKET_OUT = 13, |
| 91 | OFPT_FLOW_MOD = 14, |
| 92 | OFPT_GROUP_MOD = 15, |
| 93 | OFPT_PORT_MOD = 16, |
| 94 | OFPT_TABLE_MOD = 17, |
| 95 | OFPT_MULTIPART_REQUEST = 18, |
| 96 | OFPT_MULTIPART_REPLY = 19, |
| 97 | OFPT_BARRIER_REQUEST = 20, |
| 98 | OFPT_BARRIER_REPLY = 21, |
| 99 | OFPT_QUEUE_GET_CONFIG_REQUEST = 22, |
| 100 | OFPT_QUEUE_GET_CONFIG_REPLY = 23, |
| 101 | OFPT_ROLE_REQUEST = 24, |
| 102 | OFPT_ROLE_REPLY = 25, |
| 103 | OFPT_GET_ASYNC_REQUEST = 26, |
| 104 | OFPT_GET_ASYNC_REPLY = 27, |
| 105 | OFPT_SET_ASYNC = 28, |
| 106 | OFPT_METER_MOD = 29, |
| 107 | }; |
| 108 | |
| 109 | enum ofp_config_flags { |
| 110 | OFPC_FRAG_NORMAL = 0, |
| 111 | OFPC_FRAG_DROP = 1, |
| 112 | OFPC_FRAG_REASM = 2, |
| 113 | OFPC_FRAG_MASK = 3, |
| 114 | }; |
| 115 | |
| 116 | enum ofp_table_config { |
| 117 | OFPTC_DEPRECATED_MASK = 0x3, |
| 118 | }; |
| 119 | |
| 120 | enum ofp_table { |
| 121 | OFPTT_MAX = 0xfe, |
| 122 | OFPTT_ALL = 0xff, |
| 123 | }; |
| 124 | |
| 125 | enum ofp_capabilities { |
| 126 | OFPC_FLOW_STATS = 0x1, |
| 127 | OFPC_TABLE_STATS = 0x2, |
| 128 | OFPC_PORT_STATS = 0x4, |
| 129 | OFPC_GROUP_STATS = 0x8, |
| 130 | OFPC_IP_REASM = 0x20, |
| 131 | OFPC_QUEUE_STATS = 0x40, |
| 132 | OFPC_PORT_BLOCKED = 0x100, |
| 133 | }; |
| 134 | |
| 135 | enum ofp_port_config { |
| 136 | OFPPC_PORT_DOWN = 0x1, |
| 137 | OFPPC_NO_RECV = 0x4, |
| 138 | OFPPC_NO_FWD = 0x20, |
| 139 | OFPPC_NO_PACKET_IN = 0x40, |
| 140 | }; |
| 141 | |
| 142 | enum ofp_port_state { |
| 143 | OFPPS_LINK_DOWN = 0x1, |
| 144 | OFPPS_BLOCKED = 0x2, |
| 145 | OFPPS_LIVE = 0x4, |
| 146 | }; |
| 147 | |
| 148 | enum ofp_port_features { |
| 149 | OFPPF_10MB_HD = 0x1, |
| 150 | OFPPF_10MB_FD = 0x2, |
| 151 | OFPPF_100MB_HD = 0x4, |
| 152 | OFPPF_100MB_FD = 0x8, |
| 153 | OFPPF_1GB_HD = 0x10, |
| 154 | OFPPF_1GB_FD = 0x20, |
| 155 | OFPPF_10GB_FD = 0x40, |
| 156 | OFPPF_40GB_FD = 0x80, |
| 157 | OFPPF_100GB_FD = 0x100, |
| 158 | OFPPF_1TB_FD = 0x200, |
| 159 | OFPPF_OTHER = 0x400, |
| 160 | OFPPF_COPPER = 0x800, |
| 161 | OFPPF_FIBER = 0x1000, |
| 162 | OFPPF_AUTONEG = 0x2000, |
| 163 | OFPPF_PAUSE = 0x4000, |
| 164 | OFPPF_PAUSE_ASYM = 0x8000, |
| 165 | }; |
| 166 | |
| 167 | enum ofp_port_reason { |
| 168 | OFPPR_ADD = 0, |
| 169 | OFPPR_DELETE = 1, |
| 170 | OFPPR_MODIFY = 2, |
| 171 | }; |
| 172 | |
| 173 | enum ofp_match_type { |
| 174 | OFPMT_STANDARD = 0, |
| 175 | OFPMT_OXM = 1, |
| 176 | }; |
| 177 | |
| 178 | enum ofp_oxm_class { |
| 179 | OFPXMC_NXM_0 = 0, |
| 180 | OFPXMC_NXM_1 = 1, |
| 181 | OFPXMC_OPENFLOW_BASIC = 0x8000, |
| 182 | OFPXMC_EXPERIMENTER = 0xffff, |
| 183 | }; |
| 184 | |
| 185 | enum ofp_vlan_id { |
| 186 | OFPVID_NONE = 0, |
| 187 | OFPVID_PRESENT = 0x1000, |
| 188 | }; |
| 189 | |
| 190 | enum ofp_ipv6exthdr_flags { |
| 191 | OFPIEH_NONEXT = 0x1, |
| 192 | OFPIEH_ESP = 0x2, |
| 193 | OFPIEH_AUTH = 0x4, |
| 194 | OFPIEH_DEST = 0x8, |
| 195 | OFPIEH_FRAG = 0x10, |
| 196 | OFPIEH_ROUTER = 0x20, |
| 197 | OFPIEH_HOP = 0x40, |
| 198 | OFPIEH_UNREP = 0x80, |
| 199 | OFPIEH_UNSEQ = 0x100, |
| 200 | }; |
| 201 | |
| 202 | enum ofp_action_type { |
| 203 | OFPAT_OUTPUT = 0, |
| 204 | OFPAT_COPY_TTL_OUT = 0xb, |
| 205 | OFPAT_COPY_TTL_IN = 0xc, |
| 206 | OFPAT_SET_MPLS_TTL = 0xf, |
| 207 | OFPAT_DEC_MPLS_TTL = 0x10, |
| 208 | OFPAT_PUSH_VLAN = 0x11, |
| 209 | OFPAT_POP_VLAN = 0x12, |
| 210 | OFPAT_PUSH_MPLS = 0x13, |
| 211 | OFPAT_POP_MPLS = 0x14, |
| 212 | OFPAT_SET_QUEUE = 0x15, |
| 213 | OFPAT_GROUP = 0x16, |
| 214 | OFPAT_SET_NW_TTL = 0x17, |
| 215 | OFPAT_DEC_NW_TTL = 0x18, |
| 216 | OFPAT_SET_FIELD = 0x19, |
| 217 | OFPAT_PUSH_PBB = 0x1a, |
| 218 | OFPAT_POP_PBB = 0x1b, |
| 219 | OFPAT_EXPERIMENTER = 0xffff, |
| 220 | }; |
| 221 | |
| 222 | enum ofp_controller_max_len { |
| 223 | OFPCML_MAX = 0xffe5, |
| 224 | OFPCML_NO_BUFFER = 0xffff, |
| 225 | }; |
| 226 | |
| 227 | enum ofp_instruction_type { |
| 228 | OFPIT_GOTO_TABLE = 0x1, |
| 229 | OFPIT_WRITE_METADATA = 0x2, |
| 230 | OFPIT_WRITE_ACTIONS = 0x3, |
| 231 | OFPIT_APPLY_ACTIONS = 0x4, |
| 232 | OFPIT_CLEAR_ACTIONS = 0x5, |
| 233 | OFPIT_METER = 0x6, |
| 234 | OFPIT_EXPERIMENTER = 0xffff, |
| 235 | }; |
| 236 | |
| 237 | enum ofp_flow_mod_command { |
| 238 | OFPFC_ADD = 0, |
| 239 | OFPFC_MODIFY = 1, |
| 240 | OFPFC_MODIFY_STRICT = 2, |
| 241 | OFPFC_DELETE = 3, |
| 242 | OFPFC_DELETE_STRICT = 4, |
| 243 | }; |
| 244 | |
| 245 | enum ofp_flow_mod_flags { |
| 246 | OFPFF_SEND_FLOW_REM = 0x1, |
| 247 | OFPFF_CHECK_OVERLAP = 0x2, |
| 248 | OFPFF_RESET_COUNTS = 0x4, |
| 249 | OFPFF_NO_PKT_COUNTS = 0x8, |
| 250 | OFPFF_NO_BYT_COUNTS = 0x10, |
| 251 | }; |
| 252 | |
| 253 | enum ofp_group { |
| 254 | OFPG_MAX = 0xffffff00, |
| 255 | OFPG_ALL = 0xfffffffc, |
| 256 | OFPG_ANY = 0xffffffff, |
| 257 | }; |
| 258 | |
| 259 | enum ofp_group_mod_command { |
| 260 | OFPGC_ADD = 0, |
| 261 | OFPGC_MODIFY = 1, |
| 262 | OFPGC_DELETE = 2, |
| 263 | }; |
| 264 | |
| 265 | enum ofp_group_type { |
| 266 | OFPGT_ALL = 0, |
| 267 | OFPGT_SELECT = 1, |
| 268 | OFPGT_INDIRECT = 2, |
| 269 | OFPGT_FF = 3, |
| 270 | }; |
| 271 | |
| 272 | enum ofp_packet_in_reason { |
| 273 | OFPR_NO_MATCH = 0, |
| 274 | OFPR_ACTION = 1, |
| 275 | OFPR_INVALID_TTL = 2, |
| 276 | }; |
| 277 | |
| 278 | enum ofp_flow_removed_reason { |
| 279 | OFPRR_IDLE_TIMEOUT = 0, |
| 280 | OFPRR_HARD_TIMEOUT = 1, |
| 281 | OFPRR_DELETE = 2, |
| 282 | OFPRR_GROUP_DELETE = 3, |
| 283 | }; |
| 284 | |
| 285 | enum ofp_meter { |
| 286 | OFPM_MAX = 0xffff0000, |
| 287 | OFPM_SLOWPATH = 0xfffffffd, |
| 288 | OFPM_CONTROLLER = 0xfffffffe, |
| 289 | OFPM_ALL = 0xffffffff, |
| 290 | }; |
| 291 | |
| 292 | enum ofp_meter_band_type { |
| 293 | OFPMBT_DROP = 0x1, |
| 294 | OFPMBT_DSCP_REMARK = 0x2, |
| 295 | OFPMBT_EXPERIMENTER = 0xffff, |
| 296 | }; |
| 297 | |
| 298 | enum ofp_meter_mod_command { |
| 299 | OFPMC_ADD = 0, |
| 300 | OFPMC_MODIFY = 1, |
| 301 | OFPMC_DELETE = 2, |
| 302 | }; |
| 303 | |
| 304 | enum ofp_meter_flags { |
| 305 | OFPMF_KBPS = 0x1, |
| 306 | OFPMF_PKTPS = 0x2, |
| 307 | OFPMF_BURST = 0x4, |
| 308 | OFPMF_STATS = 0x8, |
| 309 | }; |
| 310 | |
| 311 | enum ofp_error_type { |
| 312 | OFPET_HELLO_FAILED = 0, |
| 313 | OFPET_BAD_REQUEST = 1, |
| 314 | OFPET_BAD_ACTION = 2, |
| 315 | OFPET_BAD_INSTRUCTION = 3, |
| 316 | OFPET_BAD_MATCH = 4, |
| 317 | OFPET_FLOW_MOD_FAILED = 5, |
| 318 | OFPET_GROUP_MOD_FAILED = 6, |
| 319 | OFPET_PORT_MOD_FAILED = 7, |
| 320 | OFPET_TABLE_MOD_FAILED = 8, |
| 321 | OFPET_QUEUE_OP_FAILED = 9, |
| 322 | OFPET_SWITCH_CONFIG_FAILED = 10, |
| 323 | OFPET_ROLE_REQUEST_FAILED = 11, |
| 324 | OFPET_METER_MOD_FAILED = 12, |
| 325 | OFPET_TABLE_FEATURES_FAILED = 13, |
| 326 | OFPET_EXPERIMENTER = 0xffff, |
| 327 | }; |
| 328 | |
| 329 | enum ofp_hello_failed_code { |
| 330 | OFPHFC_INCOMPATIBLE = 0, |
| 331 | OFPHFC_EPERM = 1, |
| 332 | }; |
| 333 | |
| 334 | enum ofp_bad_request_code { |
| 335 | OFPBRC_BAD_VERSION = 0, |
| 336 | OFPBRC_BAD_TYPE = 1, |
| 337 | OFPBRC_BAD_MULTIPART = 2, |
| 338 | OFPBRC_BAD_EXPERIMENTER = 3, |
| 339 | OFPBRC_BAD_EXP_TYPE = 4, |
| 340 | OFPBRC_EPERM = 5, |
| 341 | OFPBRC_BAD_LEN = 6, |
| 342 | OFPBRC_BUFFER_EMPTY = 7, |
| 343 | OFPBRC_BUFFER_UNKNOWN = 8, |
| 344 | OFPBRC_BAD_TABLE_ID = 9, |
| 345 | OFPBRC_IS_SLAVE = 10, |
| 346 | OFPBRC_BAD_PORT = 11, |
| 347 | OFPBRC_BAD_PACKET = 12, |
| 348 | OFPBRC_MULTIPART_BUFFER_OVERFLOW = 13, |
| 349 | }; |
| 350 | |
| 351 | enum ofp_bad_action_code { |
| 352 | OFPBAC_BAD_TYPE = 0, |
| 353 | OFPBAC_BAD_LEN = 1, |
| 354 | OFPBAC_BAD_EXPERIMENTER = 2, |
| 355 | OFPBAC_BAD_EXP_TYPE = 3, |
| 356 | OFPBAC_BAD_OUT_PORT = 4, |
| 357 | OFPBAC_BAD_ARGUMENT = 5, |
| 358 | OFPBAC_EPERM = 6, |
| 359 | OFPBAC_TOO_MANY = 7, |
| 360 | OFPBAC_BAD_QUEUE = 8, |
| 361 | OFPBAC_BAD_OUT_GROUP = 9, |
| 362 | OFPBAC_MATCH_INCONSISTENT = 10, |
| 363 | OFPBAC_UNSUPPORTED_ORDER = 11, |
| 364 | OFPBAC_BAD_TAG = 12, |
| 365 | OFPBAC_BAD_SET_TYPE = 13, |
| 366 | OFPBAC_BAD_SET_LEN = 14, |
| 367 | OFPBAC_BAD_SET_ARGUMENT = 15, |
| 368 | }; |
| 369 | |
| 370 | enum ofp_bad_instruction_code { |
| 371 | OFPBIC_UNKNOWN_INST = 0, |
| 372 | OFPBIC_UNSUP_INST = 1, |
| 373 | OFPBIC_BAD_TABLE_ID = 2, |
| 374 | OFPBIC_UNSUP_METADATA = 3, |
| 375 | OFPBIC_UNSUP_METADATA_MASK = 4, |
| 376 | OFPBIC_BAD_EXPERIMENTER = 5, |
| 377 | OFPBIC_BAD_EXP_TYPE = 6, |
| 378 | OFPBIC_BAD_LEN = 7, |
| 379 | OFPBIC_EPERM = 8, |
| 380 | }; |
| 381 | |
| 382 | enum ofp_bad_match_code { |
| 383 | OFPBMC_BAD_TYPE = 0, |
| 384 | OFPBMC_BAD_LEN = 1, |
| 385 | OFPBMC_BAD_TAG = 2, |
| 386 | OFPBMC_BAD_DL_ADDR_MASK = 3, |
| 387 | OFPBMC_BAD_NW_ADDR_MASK = 4, |
| 388 | OFPBMC_BAD_WILDCARDS = 5, |
| 389 | OFPBMC_BAD_FIELD = 6, |
| 390 | OFPBMC_BAD_VALUE = 7, |
| 391 | OFPBMC_BAD_MASK = 8, |
| 392 | OFPBMC_BAD_PREREQ = 9, |
| 393 | OFPBMC_DUP_FIELD = 10, |
| 394 | OFPBMC_EPERM = 11, |
| 395 | }; |
| 396 | |
| 397 | enum ofp_flow_mod_failed_code { |
| 398 | OFPFMFC_UNKNOWN = 0, |
| 399 | OFPFMFC_TABLE_FULL = 1, |
| 400 | OFPFMFC_BAD_TABLE_ID = 2, |
| 401 | OFPFMFC_OVERLAP = 3, |
| 402 | OFPFMFC_EPERM = 4, |
| 403 | OFPFMFC_BAD_TIMEOUT = 5, |
| 404 | OFPFMFC_BAD_COMMAND = 6, |
| 405 | OFPFMFC_BAD_FLAGS = 7, |
| 406 | }; |
| 407 | |
| 408 | enum ofp_group_mod_failed_code { |
| 409 | OFPGMFC_GROUP_EXISTS = 0, |
| 410 | OFPGMFC_INVALID_GROUP = 1, |
| 411 | OFPGMFC_WEIGHT_UNSUPPORTED = 2, |
| 412 | OFPGMFC_OUT_OF_GROUPS = 3, |
| 413 | OFPGMFC_OUT_OF_BUCKETS = 4, |
| 414 | OFPGMFC_CHAINING_UNSUPPORTED = 5, |
| 415 | OFPGMFC_WATCH_UNSUPPORTED = 6, |
| 416 | OFPGMFC_LOOP = 7, |
| 417 | OFPGMFC_UNKNOWN_GROUP = 8, |
| 418 | OFPGMFC_CHAINED_GROUP = 9, |
| 419 | OFPGMFC_BAD_TYPE = 10, |
| 420 | OFPGMFC_BAD_COMMAND = 11, |
| 421 | OFPGMFC_BAD_BUCKET = 12, |
| 422 | OFPGMFC_BAD_WATCH = 13, |
| 423 | OFPGMFC_EPERM = 14, |
| 424 | }; |
| 425 | |
| 426 | enum ofp_port_mod_failed_code { |
| 427 | OFPPMFC_BAD_PORT = 0, |
| 428 | OFPPMFC_BAD_HW_ADDR = 1, |
| 429 | OFPPMFC_BAD_CONFIG = 2, |
| 430 | OFPPMFC_BAD_ADVERTISE = 3, |
| 431 | OFPPMFC_EPERM = 4, |
| 432 | }; |
| 433 | |
| 434 | enum ofp_table_mod_failed_code { |
| 435 | OFPTMFC_BAD_TABLE = 0, |
| 436 | OFPTMFC_BAD_CONFIG = 1, |
| 437 | OFPTMFC_EPERM = 2, |
| 438 | }; |
| 439 | |
| 440 | enum ofp_queue_op_failed_code { |
| 441 | OFPQOFC_BAD_PORT = 0, |
| 442 | OFPQOFC_BAD_QUEUE = 1, |
| 443 | OFPQOFC_EPERM = 2, |
| 444 | }; |
| 445 | |
| 446 | enum ofp_switch_config_failed_code { |
| 447 | OFPSCFC_BAD_FLAGS = 0, |
| 448 | OFPSCFC_BAD_LEN = 1, |
| 449 | OFPSCFC_EPERM = 2, |
| 450 | }; |
| 451 | |
| 452 | enum ofp_role_request_failed_code { |
| 453 | OFPRRFC_STALE = 0, |
| 454 | OFPRRFC_UNSUP = 1, |
| 455 | OFPRRFC_BAD_ROLE = 2, |
| 456 | }; |
| 457 | |
| 458 | enum ofp_meter_mod_failed_code { |
| 459 | OFPMMFC_UNKNOWN = 0, |
| 460 | OFPMMFC_METER_EXISTS = 1, |
| 461 | OFPMMFC_INVALID_METER = 2, |
| 462 | OFPMMFC_UNKNOWN_METER = 3, |
| 463 | OFPMMFC_BAD_COMMAND = 4, |
| 464 | OFPMMFC_BAD_FLAGS = 5, |
| 465 | OFPMMFC_BAD_RATE = 6, |
| 466 | OFPMMFC_BAD_BURST = 7, |
| 467 | OFPMMFC_BAD_BAND = 8, |
| 468 | OFPMMFC_BAD_BAND_VALUE = 9, |
| 469 | OFPMMFC_OUT_OF_METERS = 10, |
| 470 | OFPMMFC_OUT_OF_BANDS = 11, |
| 471 | }; |
| 472 | |
| 473 | enum ofp_table_features_failed_code { |
| 474 | OFPTFFC_BAD_TABLE = 0, |
| 475 | OFPTFFC_BAD_METADATA = 1, |
| 476 | OFPTFFC_BAD_TYPE = 2, |
| 477 | OFPTFFC_BAD_LEN = 3, |
| 478 | OFPTFFC_BAD_ARGUMENT = 4, |
| 479 | OFPTFFC_EPERM = 5, |
| 480 | }; |
| 481 | |
| 482 | enum ofp_multipart_types { |
| 483 | OFPMP_DESC = 0, |
| 484 | OFPMP_FLOW = 1, |
| 485 | OFPMP_AGGREGATE = 2, |
| 486 | OFPMP_TABLE = 3, |
| 487 | OFPMP_PORT_STATS = 4, |
| 488 | OFPMP_QUEUE = 5, |
| 489 | OFPMP_GROUP = 6, |
| 490 | OFPMP_GROUP_DESC = 7, |
| 491 | OFPMP_GROUP_FEATURES = 8, |
| 492 | OFPMP_METER = 9, |
| 493 | OFPMP_METER_CONFIG = 10, |
| 494 | OFPMP_METER_FEATURES = 11, |
| 495 | OFPMP_TABLE_FEATURES = 12, |
| 496 | OFPMP_PORT_DESC = 13, |
| 497 | OFPMP_EXPERIMENTER = 0xffff, |
| 498 | }; |
| 499 | |
| 500 | enum ofp_multipart_request_flags { |
| 501 | OFPMPF_REQ_MORE = 0x1, |
| 502 | }; |
| 503 | |
| 504 | enum ofp_multipart_reply_flags { |
| 505 | OFPMPF_REPLY_MORE = 0x1, |
| 506 | }; |
| 507 | |
| 508 | enum ofp_table_feature_prop_type { |
| 509 | OFPTFPT_INSTRUCTIONS = 0, |
| 510 | OFPTFPT_INSTRUCTIONS_MISS = 1, |
| 511 | OFPTFPT_NEXT_TABLES = 2, |
| 512 | OFPTFPT_NEXT_TABLES_MISS = 3, |
| 513 | OFPTFPT_WRITE_ACTIONS = 4, |
| 514 | OFPTFPT_WRITE_ACTIONS_MISS = 5, |
| 515 | OFPTFPT_APPLY_ACTIONS = 6, |
| 516 | OFPTFPT_APPLY_ACTIONS_MISS = 7, |
| 517 | OFPTFPT_MATCH = 8, |
| 518 | OFPTFPT_WILDCARDS = 0xa, |
| 519 | OFPTFPT_WRITE_SETFIELD = 0xc, |
| 520 | OFPTFPT_WRITE_SETFIELD_MISS = 0xd, |
| 521 | OFPTFPT_APPLY_SETFIELD = 0xe, |
| 522 | OFPTFPT_APPLY_SETFIELD_MISS = 0xf, |
| 523 | OFPTFPT_EXPERIMENTER = 0xfffe, |
| 524 | OFPTFPT_EXPERIMENTER_MISS = 0xffff, |
| 525 | }; |
| 526 | |
| 527 | enum ofp_group_capabilities { |
| 528 | OFPGFC_SELECT_WEIGHT = 0x1, |
| 529 | OFPGFC_SELECT_LIVENESS = 0x2, |
| 530 | OFPGFC_CHAINING = 0x4, |
| 531 | OFPGFC_CHAINING_CHECKS = 0x8, |
| 532 | }; |
| 533 | |
| 534 | enum ofp_queue_properties { |
| 535 | OFPQT_MIN_RATE = 0x1, |
| 536 | OFPQT_MAX_RATE = 0x2, |
| 537 | OFPQT_EXPERIMENTER = 0xffff, |
| 538 | }; |
| 539 | |
| 540 | enum ofp_controller_role { |
| 541 | OFPCR_ROLE_NOCHANGE = 0, |
| 542 | OFPCR_ROLE_EQUAL = 1, |
| 543 | OFPCR_ROLE_MASTER = 2, |
| 544 | OFPCR_ROLE_SLAVE = 3, |
| 545 | }; |
| 546 | |
Rich Lane | 0733cd6 | 2013-04-18 21:14:42 -0700 | [diff] [blame] | 547 | enum ofp_hello_elem_type { |
| 548 | OFPHET_VERSIONBITMAP = 1, |
| 549 | }; |
| 550 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 551 | struct of_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 552 | uint8_t version; |
| 553 | uint8_t type; |
| 554 | uint16_t length; |
| 555 | uint32_t xid; |
| 556 | }; |
| 557 | |
| 558 | // Special structures used for managing scalar list elements |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 559 | struct of_uint32 { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 560 | uint32_t value; |
| 561 | }; |
| 562 | |
| 563 | // Special structures used for managing scalar list elements |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 564 | struct of_uint8 { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 565 | uint8_t value; |
| 566 | }; |
| 567 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 568 | struct of_hello_elem { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 569 | uint16_t type; |
| 570 | uint16_t length; |
| 571 | }; |
| 572 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 573 | struct of_hello_elem_versionbitmap { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 574 | uint16_t type; |
| 575 | uint16_t length; |
| 576 | list(of_uint32_t) bitmaps; |
| 577 | }; |
| 578 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 579 | struct of_hello { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 580 | uint8_t version; |
| 581 | uint8_t type; |
| 582 | uint16_t length; |
| 583 | uint32_t xid; |
| 584 | list(of_hello_elem_t) elements; |
| 585 | }; |
| 586 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 587 | struct of_echo_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 588 | uint8_t version; |
| 589 | uint8_t type; |
| 590 | uint16_t length; |
| 591 | uint32_t xid; |
| 592 | of_octets_t data; |
| 593 | }; |
| 594 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 595 | struct of_echo_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 596 | uint8_t version; |
| 597 | uint8_t type; |
| 598 | uint16_t length; |
| 599 | uint32_t xid; |
| 600 | of_octets_t data; |
| 601 | }; |
| 602 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 603 | struct of_experimenter { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 604 | uint8_t version; |
| 605 | uint8_t type; |
| 606 | uint16_t length; |
| 607 | uint32_t xid; |
| 608 | uint32_t experimenter; |
| 609 | uint32_t subtype; |
| 610 | of_octets_t data; |
| 611 | }; |
| 612 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 613 | struct of_barrier_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 614 | uint8_t version; |
| 615 | uint8_t type; |
| 616 | uint16_t length; |
| 617 | uint32_t xid; |
| 618 | }; |
| 619 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 620 | struct of_barrier_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 621 | uint8_t version; |
| 622 | uint8_t type; |
| 623 | uint16_t length; |
| 624 | uint32_t xid; |
| 625 | }; |
| 626 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 627 | struct of_get_config_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 628 | uint8_t version; |
| 629 | uint8_t type; |
| 630 | uint16_t length; |
| 631 | uint32_t xid; |
| 632 | }; |
| 633 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 634 | struct of_get_config_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 635 | uint8_t version; |
| 636 | uint8_t type; |
| 637 | uint16_t length; |
| 638 | uint32_t xid; |
| 639 | uint16_t flags; |
| 640 | uint16_t miss_send_len; |
| 641 | }; |
| 642 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 643 | struct of_set_config { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 644 | uint8_t version; |
| 645 | uint8_t type; |
| 646 | uint16_t length; |
| 647 | uint32_t xid; |
| 648 | uint16_t flags; |
| 649 | uint16_t miss_send_len; |
| 650 | }; |
| 651 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 652 | struct of_table_mod { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 653 | uint8_t version; |
| 654 | uint8_t type; |
| 655 | uint16_t length; |
| 656 | uint32_t xid; |
| 657 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 658 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 659 | uint32_t config; |
| 660 | }; |
| 661 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 662 | struct of_port_desc { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 663 | of_port_no_t port_no; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 664 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 665 | of_mac_addr_t hw_addr; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 666 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 667 | of_port_name_t name; |
| 668 | uint32_t config; |
| 669 | uint32_t state; |
| 670 | uint32_t curr; |
| 671 | uint32_t advertised; |
| 672 | uint32_t supported; |
| 673 | uint32_t peer; |
| 674 | uint32_t curr_speed; |
| 675 | uint32_t max_speed; |
| 676 | }; |
| 677 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 678 | struct of_features_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 679 | uint8_t version; |
| 680 | uint8_t type; |
| 681 | uint16_t length; |
| 682 | uint32_t xid; |
| 683 | }; |
| 684 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 685 | struct of_features_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 686 | uint8_t version; |
| 687 | uint8_t type; |
| 688 | uint16_t length; |
| 689 | uint32_t xid; |
| 690 | uint64_t datapath_id; |
| 691 | uint32_t n_buffers; |
| 692 | uint8_t n_tables; |
| 693 | uint8_t auxiliary_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 694 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 695 | uint32_t capabilities; |
| 696 | uint32_t reserved; |
| 697 | }; |
| 698 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 699 | struct of_port_status { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 700 | uint8_t version; |
| 701 | uint8_t type; |
| 702 | uint16_t length; |
| 703 | uint32_t xid; |
| 704 | uint8_t reason; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 705 | pad(7); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 706 | of_port_desc_t desc; |
| 707 | }; |
| 708 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 709 | struct of_port_mod { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 710 | uint8_t version; |
| 711 | uint8_t type; |
| 712 | uint16_t length; |
| 713 | uint32_t xid; |
| 714 | of_port_no_t port_no; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 715 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 716 | of_mac_addr_t hw_addr; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 717 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 718 | uint32_t config; |
| 719 | uint32_t mask; |
| 720 | uint32_t advertise; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 721 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 722 | }; |
| 723 | |
| 724 | // FIXME Does this need to be v4? |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 725 | struct of_match_v3 { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 726 | uint16_t type; |
| 727 | uint16_t length; |
| 728 | list(of_oxm_t) oxm_list; |
| 729 | }; |
| 730 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 731 | struct of_oxm_experimenter_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 732 | uint32_t oxm_header; |
| 733 | uint32_t experimenter; |
| 734 | of_octets_t data; |
| 735 | }; |
| 736 | |
| 737 | // This looks like an action header, but is standalone. See |
| 738 | // ofp_table_features_prop_actions |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 739 | struct of_action_id { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 740 | uint16_t type; |
| 741 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 742 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 743 | }; |
| 744 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 745 | struct of_action_output { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 746 | uint16_t type; |
| 747 | uint16_t len; |
| 748 | of_port_no_t port; |
| 749 | uint16_t max_len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 750 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 751 | }; |
| 752 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 753 | struct of_action_copy_ttl_out { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 754 | uint16_t type; |
| 755 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 756 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 757 | }; |
| 758 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 759 | struct of_action_copy_ttl_in { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 760 | uint16_t type; |
| 761 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 762 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 763 | }; |
| 764 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 765 | struct of_action_set_mpls_ttl { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 766 | uint16_t type; |
| 767 | uint16_t len; |
| 768 | uint8_t mpls_ttl; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 769 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 770 | }; |
| 771 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 772 | struct of_action_dec_mpls_ttl { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 773 | uint16_t type; |
| 774 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 775 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 776 | }; |
| 777 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 778 | struct of_action_push_vlan { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 779 | uint16_t type; |
| 780 | uint16_t len; |
| 781 | uint16_t ethertype; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 782 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 783 | }; |
| 784 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 785 | struct of_action_pop_vlan { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 786 | uint16_t type; |
| 787 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 788 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 789 | }; |
| 790 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 791 | struct of_action_push_mpls { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 792 | uint16_t type; |
| 793 | uint16_t len; |
| 794 | uint16_t ethertype; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 795 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 796 | }; |
| 797 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 798 | struct of_action_pop_mpls { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 799 | uint16_t type; |
| 800 | uint16_t len; |
| 801 | uint16_t ethertype; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 802 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 803 | }; |
| 804 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 805 | struct of_action_set_queue { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 806 | uint16_t type; |
| 807 | uint16_t len; |
| 808 | uint32_t queue_id; |
| 809 | }; |
| 810 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 811 | struct of_action_group { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 812 | uint16_t type; |
| 813 | uint16_t len; |
| 814 | uint32_t group_id; |
| 815 | }; |
| 816 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 817 | struct of_action_set_nw_ttl { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 818 | uint16_t type; |
| 819 | uint16_t len; |
| 820 | uint8_t nw_ttl; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 821 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 822 | }; |
| 823 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 824 | struct of_action_dec_nw_ttl { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 825 | uint16_t type; |
| 826 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 827 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 828 | }; |
| 829 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 830 | struct of_action_set_field { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 831 | uint16_t type; |
| 832 | uint16_t len; |
| 833 | of_octets_t field; |
| 834 | }; |
| 835 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 836 | struct of_action_experimenter { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 837 | uint16_t type; |
| 838 | uint16_t len; |
| 839 | uint32_t experimenter; |
| 840 | of_octets_t data; |
| 841 | }; |
| 842 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 843 | struct of_action_pop_pbb { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 844 | uint16_t type; |
| 845 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 846 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 847 | }; |
| 848 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 849 | struct of_action_push_pbb { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 850 | uint16_t type; |
| 851 | uint16_t len; |
| 852 | uint16_t ethertype; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 853 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 854 | }; |
| 855 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 856 | struct of_action { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 857 | uint16_t type; |
| 858 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 859 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 860 | }; |
| 861 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 862 | struct of_instruction { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 863 | uint16_t type; |
| 864 | uint16_t len; |
| 865 | }; |
| 866 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 867 | struct of_instruction_goto_table { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 868 | uint16_t type; |
| 869 | uint16_t len; |
| 870 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 871 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 872 | }; |
| 873 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 874 | struct of_instruction_write_metadata { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 875 | uint16_t type; |
| 876 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 877 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 878 | uint64_t metadata; |
| 879 | uint64_t metadata_mask; |
| 880 | }; |
| 881 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 882 | struct of_instruction_write_actions { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 883 | uint16_t type; |
| 884 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 885 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 886 | list(of_action_t) actions; |
| 887 | }; |
| 888 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 889 | struct of_instruction_apply_actions { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 890 | uint16_t type; |
| 891 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 892 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 893 | list(of_action_t) actions; |
| 894 | }; |
| 895 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 896 | struct of_instruction_clear_actions { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 897 | uint16_t type; |
| 898 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 899 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 900 | }; |
| 901 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 902 | struct of_instruction_meter { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 903 | uint16_t type; |
| 904 | uint16_t len; |
| 905 | uint32_t meter_id; |
| 906 | }; |
| 907 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 908 | struct of_instruction_experimenter { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 909 | uint16_t type; |
| 910 | uint16_t len; |
| 911 | uint32_t experimenter; |
| 912 | of_octets_t data; |
| 913 | }; |
| 914 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 915 | struct of_flow_add { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 916 | uint8_t version; |
| 917 | uint8_t type; |
| 918 | uint16_t length; |
| 919 | uint32_t xid; |
| 920 | uint64_t cookie; |
| 921 | uint64_t cookie_mask; |
| 922 | uint8_t table_id; |
| 923 | of_fm_cmd_t _command; |
| 924 | uint16_t idle_timeout; |
| 925 | uint16_t hard_timeout; |
| 926 | uint16_t priority; |
| 927 | uint32_t buffer_id; |
| 928 | of_port_no_t out_port; |
| 929 | uint32_t out_group; |
| 930 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 931 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 932 | of_match_t match; |
| 933 | list(of_instruction_t) instructions; |
| 934 | }; |
| 935 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 936 | struct of_flow_modify { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 937 | uint8_t version; |
| 938 | uint8_t type; |
| 939 | uint16_t length; |
| 940 | uint32_t xid; |
| 941 | uint64_t cookie; |
| 942 | uint64_t cookie_mask; |
| 943 | uint8_t table_id; |
| 944 | of_fm_cmd_t _command; |
| 945 | uint16_t idle_timeout; |
| 946 | uint16_t hard_timeout; |
| 947 | uint16_t priority; |
| 948 | uint32_t buffer_id; |
| 949 | of_port_no_t out_port; |
| 950 | uint32_t out_group; |
| 951 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 952 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 953 | of_match_t match; |
| 954 | list(of_instruction_t) instructions; |
| 955 | }; |
| 956 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 957 | struct of_flow_modify_strict { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 958 | uint8_t version; |
| 959 | uint8_t type; |
| 960 | uint16_t length; |
| 961 | uint32_t xid; |
| 962 | uint64_t cookie; |
| 963 | uint64_t cookie_mask; |
| 964 | uint8_t table_id; |
| 965 | of_fm_cmd_t _command; |
| 966 | uint16_t idle_timeout; |
| 967 | uint16_t hard_timeout; |
| 968 | uint16_t priority; |
| 969 | uint32_t buffer_id; |
| 970 | of_port_no_t out_port; |
| 971 | uint32_t out_group; |
| 972 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 973 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 974 | of_match_t match; |
| 975 | list(of_instruction_t) instructions; |
| 976 | }; |
| 977 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 978 | struct of_flow_delete { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 979 | uint8_t version; |
| 980 | uint8_t type; |
| 981 | uint16_t length; |
| 982 | uint32_t xid; |
| 983 | uint64_t cookie; |
| 984 | uint64_t cookie_mask; |
| 985 | uint8_t table_id; |
| 986 | of_fm_cmd_t _command; |
| 987 | uint16_t idle_timeout; |
| 988 | uint16_t hard_timeout; |
| 989 | uint16_t priority; |
| 990 | uint32_t buffer_id; |
| 991 | of_port_no_t out_port; |
| 992 | uint32_t out_group; |
| 993 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 994 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 995 | of_match_t match; |
| 996 | list(of_instruction_t) instructions; |
| 997 | }; |
| 998 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 999 | struct of_flow_delete_strict { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1000 | uint8_t version; |
| 1001 | uint8_t type; |
| 1002 | uint16_t length; |
| 1003 | uint32_t xid; |
| 1004 | uint64_t cookie; |
| 1005 | uint64_t cookie_mask; |
| 1006 | uint8_t table_id; |
| 1007 | of_fm_cmd_t _command; |
| 1008 | uint16_t idle_timeout; |
| 1009 | uint16_t hard_timeout; |
| 1010 | uint16_t priority; |
| 1011 | uint32_t buffer_id; |
| 1012 | of_port_no_t out_port; |
| 1013 | uint32_t out_group; |
| 1014 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1015 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1016 | of_match_t match; |
| 1017 | list(of_instruction_t) instructions; |
| 1018 | }; |
| 1019 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1020 | struct of_bucket { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1021 | uint16_t len; |
| 1022 | uint16_t weight; |
| 1023 | of_port_no_t watch_port; |
| 1024 | uint32_t watch_group; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1025 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1026 | list(of_action_t) actions; |
| 1027 | }; |
| 1028 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1029 | struct of_group_mod { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1030 | uint8_t version; |
| 1031 | uint8_t type; |
| 1032 | uint16_t length; |
| 1033 | uint32_t xid; |
| 1034 | uint16_t command; |
| 1035 | uint8_t group_type; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1036 | pad(1); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1037 | uint32_t group_id; |
| 1038 | list(of_bucket_t) buckets; |
| 1039 | }; |
| 1040 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1041 | struct of_packet_out { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1042 | uint8_t version; |
| 1043 | uint8_t type; |
| 1044 | uint16_t length; |
| 1045 | uint32_t xid; |
| 1046 | uint32_t buffer_id; |
| 1047 | of_port_no_t in_port; |
| 1048 | uint16_t actions_len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1049 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1050 | list(of_action_t) actions; |
| 1051 | of_octets_t data; |
| 1052 | }; |
| 1053 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1054 | struct of_packet_in { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1055 | uint8_t version; |
| 1056 | uint8_t type; |
| 1057 | uint16_t length; |
| 1058 | uint32_t xid; |
| 1059 | uint32_t buffer_id; |
| 1060 | uint16_t total_len; |
| 1061 | uint8_t reason; |
| 1062 | uint8_t table_id; |
| 1063 | uint64_t cookie; |
| 1064 | of_match_t match; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1065 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1066 | of_octets_t data; /* FIXME: Ensure total_len gets updated */ |
| 1067 | }; |
| 1068 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1069 | struct of_flow_removed { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1070 | uint8_t version; |
| 1071 | uint8_t type; |
| 1072 | uint16_t length; |
| 1073 | uint32_t xid; |
| 1074 | uint64_t cookie; |
| 1075 | uint16_t priority; |
| 1076 | uint8_t reason; |
| 1077 | uint8_t table_id; |
| 1078 | uint32_t duration_sec; |
| 1079 | uint32_t duration_nsec; |
| 1080 | uint16_t idle_timeout; |
| 1081 | uint16_t hard_timeout; |
| 1082 | uint64_t packet_count; |
| 1083 | uint64_t byte_count; |
| 1084 | of_match_t match; |
| 1085 | }; |
| 1086 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1087 | struct of_meter_band { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1088 | uint16_t type; |
| 1089 | uint16_t len; |
| 1090 | // uint32_t rate; // These are excluded b/c this is the header |
| 1091 | // uint32_t burst_size; // These are excluded b/c this is the header |
| 1092 | }; |
| 1093 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1094 | struct of_meter_band_drop { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1095 | uint16_t type; |
| 1096 | uint16_t len; |
| 1097 | uint32_t rate; |
| 1098 | uint32_t burst_size; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1099 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1100 | }; |
| 1101 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1102 | struct of_meter_band_dscp_remark { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1103 | uint16_t type; |
| 1104 | uint16_t len; |
| 1105 | uint32_t rate; |
| 1106 | uint32_t burst_size; |
| 1107 | uint8_t prec_level; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1108 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1109 | }; |
| 1110 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1111 | struct of_meter_band_experimenter { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1112 | uint16_t type; |
| 1113 | uint16_t len; |
| 1114 | uint32_t rate; |
| 1115 | uint32_t burst_size; |
| 1116 | uint32_t experimenter; |
| 1117 | }; |
| 1118 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1119 | struct of_meter_mod { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1120 | uint8_t version; |
| 1121 | uint8_t type; |
| 1122 | uint16_t length; |
| 1123 | uint32_t xid; |
| 1124 | uint16_t command; |
| 1125 | uint16_t flags; |
| 1126 | uint32_t meter_id; |
| 1127 | list(of_meter_band_t) meters; |
| 1128 | }; |
| 1129 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1130 | struct of_error_msg { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1131 | uint8_t version; |
| 1132 | uint8_t type; |
| 1133 | uint16_t length; |
| 1134 | uint32_t xid; |
| 1135 | uint16_t err_type; |
| 1136 | uint16_t code; |
| 1137 | of_octets_t data; |
| 1138 | }; |
| 1139 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1140 | //struct of_error_experimenter_msg { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1141 | // uint8_t version; |
| 1142 | // uint8_t type; |
| 1143 | // uint16_t length; |
| 1144 | // uint32_t xid; |
| 1145 | // uint16_t err_type; |
| 1146 | // uint16_t subtype; |
| 1147 | // uint32_t experimenter; |
| 1148 | // of_octets_t data; |
| 1149 | //}; |
| 1150 | |
| 1151 | // STATS ENTRIES: flow, table, port, queue, group stats, group desc stats |
| 1152 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1153 | struct of_flow_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1154 | uint16_t length; |
| 1155 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1156 | pad(1); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1157 | uint32_t duration_sec; |
| 1158 | uint32_t duration_nsec; |
| 1159 | uint16_t priority; |
| 1160 | uint16_t idle_timeout; |
| 1161 | uint16_t hard_timeout; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1162 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1163 | uint64_t cookie; |
| 1164 | uint64_t packet_count; |
| 1165 | uint64_t byte_count; |
| 1166 | of_match_t match; |
| 1167 | list(of_instruction_t) instructions; |
| 1168 | }; |
| 1169 | |
| 1170 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1171 | struct of_table_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1172 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1173 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1174 | uint32_t active_count; |
| 1175 | uint64_t lookup_count; |
| 1176 | uint64_t matched_count; |
| 1177 | }; |
| 1178 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1179 | struct of_port_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1180 | of_port_no_t port_no; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1181 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1182 | uint64_t rx_packets; |
| 1183 | uint64_t tx_packets; |
| 1184 | uint64_t rx_bytes; |
| 1185 | uint64_t tx_bytes; |
| 1186 | uint64_t rx_dropped; |
| 1187 | uint64_t tx_dropped; |
| 1188 | uint64_t rx_errors; |
| 1189 | uint64_t tx_errors; |
| 1190 | uint64_t rx_frame_err; |
| 1191 | uint64_t rx_over_err; |
| 1192 | uint64_t rx_crc_err; |
| 1193 | uint64_t collisions; |
| 1194 | uint32_t duration_sec; |
| 1195 | uint32_t duration_nsec; |
| 1196 | }; |
| 1197 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1198 | struct of_queue_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1199 | of_port_no_t port_no; |
| 1200 | uint32_t queue_id; |
| 1201 | uint64_t tx_bytes; |
| 1202 | uint64_t tx_packets; |
| 1203 | uint64_t tx_errors; |
| 1204 | uint32_t duration_sec; |
| 1205 | uint32_t duration_nsec; |
| 1206 | }; |
| 1207 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1208 | struct of_bucket_counter { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1209 | uint64_t packet_count; |
| 1210 | uint64_t byte_count; |
| 1211 | }; |
| 1212 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1213 | struct of_group_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1214 | uint16_t length; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1215 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1216 | uint32_t group_id; |
| 1217 | uint32_t ref_count; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1218 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1219 | uint64_t packet_count; |
| 1220 | uint64_t byte_count; |
| 1221 | uint32_t duration_sec; |
| 1222 | uint32_t duration_nsec; |
| 1223 | list(of_bucket_counter_t) bucket_stats; |
| 1224 | }; |
| 1225 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1226 | struct of_group_desc_stats_entry { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1227 | uint16_t length; |
| 1228 | uint8_t type; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1229 | pad(1); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1230 | uint32_t group_id; |
| 1231 | list(of_bucket_t) buckets; |
| 1232 | }; |
| 1233 | |
| 1234 | // STATS: |
| 1235 | // Desc, flow, agg, table, port, queue, group, group_desc, group_feat, experi |
| 1236 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1237 | struct of_desc_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1238 | uint8_t version; |
| 1239 | uint8_t type; |
| 1240 | uint16_t length; |
| 1241 | uint32_t xid; |
| 1242 | uint16_t stats_type; |
| 1243 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1244 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1245 | }; |
| 1246 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1247 | struct of_desc_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1248 | uint8_t version; |
| 1249 | uint8_t type; |
| 1250 | uint16_t length; |
| 1251 | uint32_t xid; |
| 1252 | uint16_t stats_type; |
| 1253 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1254 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1255 | of_desc_str_t mfr_desc; |
| 1256 | of_desc_str_t hw_desc; |
| 1257 | of_desc_str_t sw_desc; |
| 1258 | of_serial_num_t serial_num; |
| 1259 | of_desc_str_t dp_desc; |
| 1260 | }; |
| 1261 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1262 | struct of_flow_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1263 | uint8_t version; |
| 1264 | uint8_t type; |
| 1265 | uint16_t length; |
| 1266 | uint32_t xid; |
| 1267 | uint16_t stats_type; |
| 1268 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1269 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1270 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1271 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1272 | of_port_no_t out_port; |
| 1273 | uint32_t out_group; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1274 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1275 | uint64_t cookie; |
| 1276 | uint64_t cookie_mask; |
| 1277 | of_match_t match; |
| 1278 | }; |
| 1279 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1280 | struct of_flow_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1281 | uint8_t version; |
| 1282 | uint8_t type; |
| 1283 | uint16_t length; |
| 1284 | uint32_t xid; |
| 1285 | uint16_t stats_type; |
| 1286 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1287 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1288 | list(of_flow_stats_entry_t) entries; |
| 1289 | }; |
| 1290 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1291 | struct of_aggregate_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1292 | uint8_t version; |
| 1293 | uint8_t type; |
| 1294 | uint16_t length; |
| 1295 | uint32_t xid; |
| 1296 | uint16_t stats_type; |
| 1297 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1298 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1299 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1300 | pad(3); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1301 | of_port_no_t out_port; |
| 1302 | uint32_t out_group; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1303 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1304 | uint64_t cookie; |
| 1305 | uint64_t cookie_mask; |
| 1306 | of_match_t match; |
| 1307 | }; |
| 1308 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1309 | struct of_aggregate_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1310 | uint8_t version; |
| 1311 | uint8_t type; |
| 1312 | uint16_t length; |
| 1313 | uint32_t xid; |
| 1314 | uint16_t stats_type; |
| 1315 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1316 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1317 | uint64_t packet_count; |
| 1318 | uint64_t byte_count; |
| 1319 | uint32_t flow_count; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1320 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1321 | }; |
| 1322 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1323 | struct of_table_stats_request { |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1324 | uint8_t version; |
| 1325 | uint8_t type; |
| 1326 | uint16_t length; |
| 1327 | uint32_t xid; |
| 1328 | uint16_t stats_type; |
| 1329 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1330 | pad(4); |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1331 | }; |
| 1332 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1333 | struct of_table_stats_reply { |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1334 | uint8_t version; |
| 1335 | uint8_t type; |
| 1336 | uint16_t length; |
| 1337 | uint32_t xid; |
| 1338 | uint16_t stats_type; |
| 1339 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1340 | pad(4); |
Rich Lane | 8bfdafc | 2013-05-02 14:54:42 -0700 | [diff] [blame] | 1341 | list(of_table_stats_entry_t) entries; |
| 1342 | }; |
| 1343 | |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1344 | // FIXME: These are padded to 8 byte align beyond the length indicated |
| 1345 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1346 | struct of_table_feature_prop { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1347 | uint16_t type; |
| 1348 | uint16_t length; |
| 1349 | }; |
| 1350 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1351 | struct of_table_feature_prop_instructions { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1352 | uint16_t type; |
| 1353 | uint16_t length; |
| 1354 | // FIXME Check if instruction_t is right for ids here |
| 1355 | list(of_instruction_t) instruction_ids; |
| 1356 | }; |
| 1357 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1358 | struct of_table_feature_prop_instructions_miss { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1359 | uint16_t type; |
| 1360 | uint16_t length; |
| 1361 | list(of_instruction_t) instruction_ids; |
| 1362 | }; |
| 1363 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1364 | struct of_table_feature_prop_next_tables { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1365 | uint16_t type; |
| 1366 | uint16_t length; |
| 1367 | list(of_uint8_t) next_table_ids; |
| 1368 | }; |
| 1369 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1370 | struct of_table_feature_prop_next_tables_miss { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1371 | uint16_t type; |
| 1372 | uint16_t length; |
| 1373 | list(of_uint8_t) next_table_ids; |
| 1374 | }; |
| 1375 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1376 | struct of_table_feature_prop_write_actions { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1377 | uint16_t type; |
| 1378 | uint16_t length; |
| 1379 | list(of_action_id_t) action_ids; |
| 1380 | }; |
| 1381 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1382 | struct of_table_feature_prop_write_actions_miss { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1383 | uint16_t type; |
| 1384 | uint16_t length; |
| 1385 | list(of_action_id_t) action_ids; |
| 1386 | }; |
| 1387 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1388 | struct of_table_feature_prop_apply_actions { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1389 | uint16_t type; |
| 1390 | uint16_t length; |
| 1391 | list(of_action_id_t) action_ids; |
| 1392 | }; |
| 1393 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1394 | struct of_table_feature_prop_apply_actions_miss { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1395 | uint16_t type; |
| 1396 | uint16_t length; |
| 1397 | list(of_action_id_t) action_ids; |
| 1398 | }; |
| 1399 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1400 | struct of_table_feature_prop_match { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1401 | uint16_t type; |
| 1402 | uint16_t length; |
| 1403 | list(of_uint32_t) oxm_ids; |
| 1404 | }; |
| 1405 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1406 | struct of_table_feature_prop_wildcards { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1407 | uint16_t type; |
| 1408 | uint16_t length; |
| 1409 | list(of_uint32_t) oxm_ids; |
| 1410 | }; |
| 1411 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1412 | struct of_table_feature_prop_write_setfield { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1413 | uint16_t type; |
| 1414 | uint16_t length; |
| 1415 | list(of_uint32_t) oxm_ids; |
| 1416 | }; |
| 1417 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1418 | struct of_table_feature_prop_write_setfield_miss { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1419 | uint16_t type; |
| 1420 | uint16_t length; |
| 1421 | list(of_uint32_t) oxm_ids; |
| 1422 | }; |
| 1423 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1424 | struct of_table_feature_prop_apply_setfield { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1425 | uint16_t type; |
| 1426 | uint16_t length; |
| 1427 | list(of_uint32_t) oxm_ids; |
| 1428 | }; |
| 1429 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1430 | struct of_table_feature_prop_apply_setfield_miss { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1431 | uint16_t type; |
| 1432 | uint16_t length; |
| 1433 | list(of_uint32_t) oxm_ids; |
| 1434 | }; |
| 1435 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1436 | struct of_table_feature_prop_experimenter { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1437 | uint16_t type; |
| 1438 | uint16_t length; |
| 1439 | uint32_t experimenter; |
| 1440 | uint32_t subtype; |
| 1441 | of_octets_t experimenter_data; |
| 1442 | }; |
| 1443 | |
| 1444 | // Not yet supported |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1445 | // struct of_table_feature_prop_experimenter_miss { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1446 | // uint16_t type; |
| 1447 | // uint16_t length; |
| 1448 | // uint32_t experimenter; |
| 1449 | // uint32_t subtype; |
| 1450 | // of_octets_t experimenter_data; |
| 1451 | // }; |
| 1452 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1453 | struct of_table_features { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1454 | uint16_t length; |
| 1455 | uint8_t table_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1456 | pad(5); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1457 | of_table_name_t name; |
| 1458 | uint64_t metadata_match; |
| 1459 | uint64_t metadata_write; |
| 1460 | uint32_t config; |
| 1461 | uint32_t max_entries; |
| 1462 | list(of_table_feature_prop_t) properties; |
| 1463 | }; |
| 1464 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1465 | struct of_meter_features { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1466 | uint32_t max_meter; |
| 1467 | uint32_t band_types; |
| 1468 | uint32_t capabilities; |
| 1469 | uint8_t max_bands; |
| 1470 | uint8_t max_color; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1471 | pad(2); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1472 | }; |
| 1473 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1474 | struct of_port_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1475 | uint8_t version; |
| 1476 | uint8_t type; |
| 1477 | uint16_t length; |
| 1478 | uint32_t xid; |
| 1479 | uint16_t stats_type; |
| 1480 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1481 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1482 | of_port_no_t port_no; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1483 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1484 | }; |
| 1485 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1486 | struct of_port_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1487 | uint8_t version; |
| 1488 | uint8_t type; |
| 1489 | uint16_t length; |
| 1490 | uint32_t xid; |
| 1491 | uint16_t stats_type; |
| 1492 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1493 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1494 | list(of_port_stats_entry_t) entries; |
| 1495 | }; |
| 1496 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1497 | struct of_queue_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1498 | uint8_t version; |
| 1499 | uint8_t type; |
| 1500 | uint16_t length; |
| 1501 | uint32_t xid; |
| 1502 | uint16_t stats_type; |
| 1503 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1504 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1505 | of_port_no_t port_no; |
| 1506 | uint32_t queue_id; |
| 1507 | }; |
| 1508 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1509 | struct of_queue_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1510 | uint8_t version; |
| 1511 | uint8_t type; |
| 1512 | uint16_t length; |
| 1513 | uint32_t xid; |
| 1514 | uint16_t stats_type; |
| 1515 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1516 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1517 | list(of_queue_stats_entry_t) entries; |
| 1518 | }; |
| 1519 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1520 | struct of_group_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1521 | uint8_t version; |
| 1522 | uint8_t type; |
| 1523 | uint16_t length; |
| 1524 | uint32_t xid; |
| 1525 | uint16_t stats_type; |
| 1526 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1527 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1528 | uint32_t group_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1529 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1530 | }; |
| 1531 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1532 | struct of_group_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1533 | uint8_t version; |
| 1534 | uint8_t type; |
| 1535 | uint16_t length; |
| 1536 | uint32_t xid; |
| 1537 | uint16_t stats_type; |
| 1538 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1539 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1540 | list(of_group_stats_entry_t) entries; |
| 1541 | }; |
| 1542 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1543 | struct of_group_desc_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1544 | uint8_t version; |
| 1545 | uint8_t type; |
| 1546 | uint16_t length; |
| 1547 | uint32_t xid; |
| 1548 | uint16_t stats_type; |
| 1549 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1550 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1551 | }; |
| 1552 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1553 | struct of_group_desc_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1554 | uint8_t version; |
| 1555 | uint8_t type; |
| 1556 | uint16_t length; |
| 1557 | uint32_t xid; |
| 1558 | uint16_t stats_type; |
| 1559 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1560 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1561 | list(of_group_desc_stats_entry_t) entries; |
| 1562 | }; |
| 1563 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1564 | struct of_group_features_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1565 | uint8_t version; |
| 1566 | uint8_t type; |
| 1567 | uint16_t length; |
| 1568 | uint32_t xid; |
| 1569 | uint16_t stats_type; |
| 1570 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1571 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1572 | }; |
| 1573 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1574 | struct of_group_features_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1575 | uint8_t version; |
| 1576 | uint8_t type; |
| 1577 | uint16_t length; |
| 1578 | uint32_t xid; |
| 1579 | uint16_t stats_type; |
| 1580 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1581 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1582 | uint32_t types; |
| 1583 | uint32_t capabilities; |
| 1584 | uint32_t max_groups_all; |
| 1585 | uint32_t max_groups_select; |
| 1586 | uint32_t max_groups_indirect; |
| 1587 | uint32_t max_groups_ff; |
| 1588 | uint32_t actions_all; |
| 1589 | uint32_t actions_select; |
| 1590 | uint32_t actions_indirect; |
| 1591 | uint32_t actions_ff; |
| 1592 | }; |
| 1593 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1594 | struct of_meter_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1595 | uint8_t version; |
| 1596 | uint8_t type; |
| 1597 | uint16_t length; |
| 1598 | uint32_t xid; |
| 1599 | uint16_t stats_type; |
| 1600 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1601 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1602 | uint32_t meter_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1603 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1604 | }; |
| 1605 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1606 | struct of_meter_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1607 | uint8_t version; |
| 1608 | uint8_t type; |
| 1609 | uint16_t length; |
| 1610 | uint32_t xid; |
| 1611 | uint16_t stats_type; |
| 1612 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1613 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1614 | list(of_meter_stats_t) entries; |
| 1615 | }; |
| 1616 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1617 | struct of_meter_config_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1618 | uint8_t version; |
| 1619 | uint8_t type; |
| 1620 | uint16_t length; |
| 1621 | uint32_t xid; |
| 1622 | uint16_t stats_type; |
| 1623 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1624 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1625 | uint32_t meter_id; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1626 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1627 | }; |
| 1628 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1629 | struct of_meter_config_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1630 | uint8_t version; |
| 1631 | uint8_t type; |
| 1632 | uint16_t length; |
| 1633 | uint32_t xid; |
| 1634 | uint16_t stats_type; |
| 1635 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1636 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1637 | list(of_meter_band_t) entries; |
| 1638 | }; |
| 1639 | |
| 1640 | // FIXME stats added to get things working |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1641 | struct of_meter_features_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1642 | uint8_t version; |
| 1643 | uint8_t type; |
| 1644 | uint16_t length; |
| 1645 | uint32_t xid; |
| 1646 | uint16_t stats_type; |
| 1647 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1648 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1649 | }; |
| 1650 | |
| 1651 | // FIXME stats added to get things working |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1652 | struct of_meter_features_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1653 | uint8_t version; |
| 1654 | uint8_t type; |
| 1655 | uint16_t length; |
| 1656 | uint32_t xid; |
| 1657 | uint16_t stats_type; |
| 1658 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1659 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1660 | of_meter_features_t features; |
| 1661 | }; |
| 1662 | |
| 1663 | // FIXME stats added to get things working |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1664 | struct of_table_features_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1665 | uint8_t version; |
| 1666 | uint8_t type; |
| 1667 | uint16_t length; |
| 1668 | uint32_t xid; |
| 1669 | uint16_t stats_type; |
| 1670 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1671 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1672 | list(of_table_features_t) entries; |
| 1673 | }; |
| 1674 | |
| 1675 | // FIXME stats added to get things working |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1676 | struct of_table_features_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1677 | uint8_t version; |
| 1678 | uint8_t type; |
| 1679 | uint16_t length; |
| 1680 | uint32_t xid; |
| 1681 | uint16_t stats_type; |
| 1682 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1683 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1684 | list(of_table_features_t) entries; |
| 1685 | }; |
| 1686 | |
| 1687 | // FIXME stats added to get things working |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1688 | struct of_port_desc_stats_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1689 | uint8_t version; |
| 1690 | uint8_t type; |
| 1691 | uint16_t length; |
| 1692 | uint32_t xid; |
| 1693 | uint16_t stats_type; |
| 1694 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1695 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1696 | }; |
| 1697 | |
| 1698 | // FIXME stats added to get things working |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1699 | struct of_port_desc_stats_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1700 | uint8_t version; |
| 1701 | uint8_t type; |
| 1702 | uint16_t length; |
| 1703 | uint32_t xid; |
| 1704 | uint16_t stats_type; |
| 1705 | uint16_t flags; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1706 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1707 | list(of_port_desc_t) entries; |
| 1708 | }; |
| 1709 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1710 | struct of_meter_band_stats { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1711 | uint64_t packet_band_count; |
| 1712 | uint64_t byte_band_count; |
| 1713 | }; |
| 1714 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1715 | struct of_meter_stats { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1716 | uint32_t meter_id; |
| 1717 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1718 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1719 | uint32_t flow_count; |
| 1720 | uint64_t packet_in_count; |
| 1721 | uint64_t byte_in_count; |
| 1722 | uint32_t duration_sec; |
| 1723 | uint32_t duration_nsec; |
| 1724 | list(of_meter_band_stats_t) band_stats; |
| 1725 | }; |
| 1726 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1727 | struct of_meter_config { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1728 | uint16_t length; |
| 1729 | uint16_t flags; |
| 1730 | uint32_t meter_id; |
| 1731 | list(of_meter_band_t) entries; |
| 1732 | }; |
| 1733 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1734 | struct of_experimenter_multipart_header { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1735 | uint32_t experimenter; |
| 1736 | uint32_t subtype; |
| 1737 | }; |
| 1738 | |
| 1739 | // END OF STATS OBJECTS |
| 1740 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1741 | struct of_queue_prop { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1742 | uint16_t type; |
| 1743 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1744 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1745 | }; |
| 1746 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1747 | struct of_queue_prop_min_rate { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1748 | uint16_t type; |
| 1749 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1750 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1751 | uint16_t rate; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1752 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1753 | }; |
| 1754 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1755 | struct of_queue_prop_max_rate { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1756 | uint16_t type; |
| 1757 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1758 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1759 | uint16_t rate; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1760 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1761 | }; |
| 1762 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1763 | struct of_queue_prop_experimenter { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1764 | uint16_t type; |
| 1765 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1766 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1767 | uint32_t experimenter; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1768 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1769 | of_octets_t data; |
| 1770 | }; |
| 1771 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1772 | struct of_packet_queue { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1773 | uint32_t queue_id; |
| 1774 | of_port_no_t port; |
| 1775 | uint16_t len; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1776 | pad(6); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1777 | list(of_queue_prop_t) properties; |
| 1778 | }; |
| 1779 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1780 | struct of_queue_get_config_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1781 | uint8_t version; |
| 1782 | uint8_t type; |
| 1783 | uint16_t length; |
| 1784 | uint32_t xid; |
| 1785 | of_port_no_t port; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1786 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1787 | }; |
| 1788 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1789 | struct of_queue_get_config_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1790 | uint8_t version; |
| 1791 | uint8_t type; |
| 1792 | uint16_t length; |
| 1793 | uint32_t xid; |
| 1794 | of_port_no_t port; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1795 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1796 | list(of_packet_queue_t) queues; |
| 1797 | }; |
| 1798 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1799 | struct of_role_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1800 | uint8_t version; |
| 1801 | uint8_t type; |
| 1802 | uint16_t length; |
| 1803 | uint32_t xid; |
| 1804 | uint32_t role; |
Rich Lane | e2af4ee | 2013-05-09 11:04:06 -0700 | [diff] [blame] | 1805 | pad(4); |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1806 | uint64_t generation_id; |
| 1807 | }; |
| 1808 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1809 | struct of_role_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1810 | uint8_t version; |
| 1811 | uint8_t type; |
| 1812 | uint16_t length; |
| 1813 | uint32_t xid; |
| 1814 | of_octets_t data; |
| 1815 | }; |
| 1816 | |
| 1817 | //////////////////////////////////////////////////////////////// |
| 1818 | // FIXME understand async; where do bitmasks live? |
| 1819 | // Determine bitmap type for masks below. |
| 1820 | // DOCUMENT masks where uint32_t[0] is interest for equal/master |
| 1821 | // while uint32_t[1] is interest for slave |
| 1822 | //////////////////////////////////////////////////////////////// |
| 1823 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1824 | struct of_async_get_request { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1825 | uint8_t version; |
| 1826 | uint8_t type; |
| 1827 | uint16_t length; |
| 1828 | uint32_t xid; |
| 1829 | uint32_t packet_in_mask_equal_master; |
| 1830 | uint32_t packet_in_mask_slave; |
| 1831 | uint32_t port_status_mask_equal_master; |
| 1832 | uint32_t port_status_mask_slave; |
| 1833 | uint32_t flow_removed_mask_equal_master; |
| 1834 | uint32_t flow_removed_mask_slave; |
| 1835 | }; |
| 1836 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1837 | struct of_async_get_reply { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1838 | uint8_t version; |
| 1839 | uint8_t type; |
| 1840 | uint16_t length; |
| 1841 | uint32_t xid; |
| 1842 | uint32_t packet_in_mask_equal_master; |
| 1843 | uint32_t packet_in_mask_slave; |
| 1844 | uint32_t port_status_mask_equal_master; |
| 1845 | uint32_t port_status_mask_slave; |
| 1846 | uint32_t flow_removed_mask_equal_master; |
| 1847 | uint32_t flow_removed_mask_slave; |
| 1848 | }; |
| 1849 | |
Rich Lane | 68ae4d7 | 2013-05-09 10:55:19 -0700 | [diff] [blame] | 1850 | struct of_async_set { |
Rich Lane | a06d0c3 | 2013-03-25 08:52:03 -0700 | [diff] [blame] | 1851 | uint8_t version; |
| 1852 | uint8_t type; |
| 1853 | uint16_t length; |
| 1854 | uint32_t xid; |
| 1855 | uint32_t packet_in_mask_equal_master; |
| 1856 | uint32_t packet_in_mask_slave; |
| 1857 | uint32_t port_status_mask_equal_master; |
| 1858 | uint32_t port_status_mask_slave; |
| 1859 | uint32_t flow_removed_mask_equal_master; |
| 1860 | uint32_t flow_removed_mask_slave; |
| 1861 | }; |