+---------------------------------------------------------------------+
|  Log file: pa.log                                                   |
|  Compiler version: 5.1.0 (fca32d1)                                  |
|  Created on: Thu Sep  7 13:56:08 2017                               |
+---------------------------------------------------------------------+

HLIR Version: 0.10.5
PHV container sizes are: [8, 16, 32]
Parser state extraction bandwidth: 224
  8-bit: 4 extracts
  16-bit: 4 extracts
  32-bit: 4 extracts
Free containers to start for 8 bits:
  Group 4 8 bits has 16 available
  Group 5 8 bits has 16 available
  Group 6 8 bits has 16 available
  Group 7 8 bits has 16 available
  Group 16 8 bits (tagalong) has 16 available
  Group 17 8 bits (tagalong) has 16 available
Free containers to start for 16 bits:
  Group 8 16 bits has 16 available
  Group 9 16 bits has 16 available
  Group 10 16 bits has 16 available
  Group 11 16 bits has 16 available
  Group 12 16 bits has 16 available
  Group 13 16 bits has 16 available
  Group 18 16 bits (tagalong) has 16 available
  Group 19 16 bits (tagalong) has 16 available
  Group 20 16 bits (tagalong) has 16 available
Free containers to start for 32 bits:
  Group 0 32 bits has 16 available
  Group 1 32 bits has 16 available
  Group 2 32 bits has 16 available
  Group 3 32 bits has 16 available
  Group 14 32 bits (tagalong) has 16 available
  Group 15 32 bits (tagalong) has 16 available


Initializing PHV allocation...
Ingress intrinsic metadata fields branch on includes:
  ig_intr_md.ingress_port

-----------------------------------------------
   User added PHV constraints
-----------------------------------------------
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.ucast_egress_port <9 bits ingress imeta R W> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.level2_mcast_hash <13 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.level2_exclusion_id <9 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.mcast_grp_b <16 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.level1_exclusion_id <16 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.rid <16 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.level1_mcast_hash <13 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.mcast_grp_a <16 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_mb.ingress_mirror_id <10 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: eg_intr_md.egress_port <9 bits egress parsed imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: eg_intr_md_for_mb.egress_mirror_id <10 bits egress imeta> -- max split: 1

-----------------------------------------------
  Scanning for field list calculations
-----------------------------------------------

-----------------------------------------------
   Eliminating unused metadata (98 instances)
-----------------------------------------------
Removing standard_metadata.ingress_port in ingress
Removing standard_metadata.packet_length in ingress
Removing standard_metadata.egress_spec in ingress
Removing standard_metadata.egress_port in ingress
Removing standard_metadata.egress_instance in ingress
Removing standard_metadata.instance_type in ingress
Removing standard_metadata.clone_spec in ingress
Removing standard_metadata._padding in ingress
Removing standard_metadata.valid in ingress
Removing ig_intr_md.ingress_mac_tstamp in ingress
Removing ig_intr_md.valid in ingress
Removing ig_intr_md_for_tm._pad1 in ingress
Removing ig_intr_md_for_tm.bypass_egress in ingress
Removing ig_intr_md_for_tm.deflect_on_drop in ingress
Removing ig_intr_md_for_tm.ingress_cos in ingress
Removing ig_intr_md_for_tm.qid in ingress
Removing ig_intr_md_for_tm.icos_for_copy_to_cpu in ingress
Removing ig_intr_md_for_tm._pad2 in ingress
Removing ig_intr_md_for_tm.packet_color in ingress
Removing ig_intr_md_for_tm.disable_ucast_cutthru in ingress
Removing ig_intr_md_for_tm.enable_mcast_cutthru in ingress
Removing ig_intr_md_for_tm.mcast_grp_a in ingress
Removing ig_intr_md_for_tm.mcast_grp_b in ingress
Removing ig_intr_md_for_tm._pad3 in ingress
Removing ig_intr_md_for_tm.level1_mcast_hash in ingress
Removing ig_intr_md_for_tm._pad4 in ingress
Removing ig_intr_md_for_tm.level2_mcast_hash in ingress
Removing ig_intr_md_for_tm.level1_exclusion_id in ingress
Removing ig_intr_md_for_tm._pad5 in ingress
Removing ig_intr_md_for_tm.level2_exclusion_id in ingress
Removing ig_intr_md_for_tm.rid in ingress
Removing ig_intr_md_for_tm.valid in ingress
Removing ig_intr_md_for_mb._pad1 in ingress
Removing ig_intr_md_for_mb.ingress_mirror_id in ingress
Removing ig_intr_md_for_mb.valid in ingress
Removing eg_intr_md._pad0 in ingress
Removing eg_intr_md.egress_port in ingress
Removing eg_intr_md._pad1 in ingress
Removing eg_intr_md.enq_qdepth in ingress
Removing eg_intr_md._pad2 in ingress
Removing eg_intr_md.enq_congest_stat in ingress
Removing eg_intr_md.enq_tstamp in ingress
Removing eg_intr_md._pad3 in ingress
Removing eg_intr_md.deq_qdepth in ingress
Removing eg_intr_md._pad4 in ingress
Removing eg_intr_md.deq_congest_stat in ingress
Removing eg_intr_md.app_pool_congest_stat in ingress
Removing eg_intr_md.deq_timedelta in ingress
Removing eg_intr_md.egress_rid in ingress
Removing eg_intr_md._pad5 in ingress
Removing eg_intr_md.egress_rid_first in ingress
Removing eg_intr_md._pad6 in ingress
Removing eg_intr_md.egress_qid in ingress
Removing eg_intr_md._pad7 in ingress
Removing eg_intr_md.egress_cos in ingress
Removing eg_intr_md._pad8 in ingress
Removing eg_intr_md.deflection_flag in ingress
Removing eg_intr_md.pkt_length in ingress
Removing eg_intr_md.valid in ingress
Removing eg_intr_md_for_mb._pad1 in ingress
Removing eg_intr_md_for_mb.egress_mirror_id in ingress
Removing eg_intr_md_for_mb.coalesce_flush in ingress
Removing eg_intr_md_for_mb.coalesce_length in ingress
Removing eg_intr_md_for_mb.valid in ingress
Removing eg_intr_md_for_oport._pad1 in ingress
Removing eg_intr_md_for_oport.capture_tstamp_on_tx in ingress
Removing eg_intr_md_for_oport.update_delay_on_tx in ingress
Removing eg_intr_md_for_oport.force_tx_error in ingress
Removing eg_intr_md_for_oport.drop_ctl in ingress
Removing eg_intr_md_for_oport.valid in ingress
Removing eg_intr_md._pad1 in egress
Removing eg_intr_md.enq_qdepth in egress
Removing eg_intr_md._pad2 in egress
Removing eg_intr_md.enq_congest_stat in egress
Removing eg_intr_md.enq_tstamp in egress
Removing eg_intr_md._pad3 in egress
Removing eg_intr_md.deq_qdepth in egress
Removing eg_intr_md._pad4 in egress
Removing eg_intr_md.deq_congest_stat in egress
Removing eg_intr_md.app_pool_congest_stat in egress
Removing eg_intr_md.deq_timedelta in egress
Removing eg_intr_md.egress_rid in egress
Removing eg_intr_md._pad5 in egress
Removing eg_intr_md.egress_rid_first in egress
Removing eg_intr_md._pad6 in egress
Removing eg_intr_md.egress_qid in egress
Removing eg_intr_md._pad8 in egress
Removing eg_intr_md.deflection_flag in egress
Removing eg_intr_md.pkt_length in egress
Removing eg_intr_md_for_oport._pad1 in egress
Removing eg_intr_md_for_oport.capture_tstamp_on_tx in egress
Removing eg_intr_md_for_oport.update_delay_on_tx in egress
Removing eg_intr_md_for_oport.force_tx_error in egress
Removing eg_intr_md_for_oport.drop_ctl in egress
Removing eg_intr_md_for_mb._pad1 in egress
Removing eg_intr_md_for_mb.egress_mirror_id in egress
Removing eg_intr_md_for_mb.coalesce_flush in egress
Removing eg_intr_md_for_mb.coalesce_length in egress

-----------------------------------------------
   Eliminating unused packet fields (6 instances)
-----------------------------------------------
Removing packet_in_hdr.valid in ingress
Removing packet_out_hdr.valid in ingress
Removing ethernet.valid in ingress
Removing ipv4.valid in ingress
Removing tcp.valid in ingress
Removing udp.valid in ingress

--------------------------------------------
  ingress field instance bit width histogram
--------------------------------------------
   Total fields: 49
   Max value: 13

    1 : xxxxxxxxxx (10)
    2 : x (1)
    3 : xxxxx (5)
    4 : xxx (3)
    6 : x (1)
    7 : xx (2)
    8 : xxx (3)
    9 : xxxx (4)
   13 : x (1)
   16 : xxxxxxxxxxxxx (13)
   32 : xxxx (4)
   48 : xx (2)

--------------------------------------------
  egress field instance bit width histogram
--------------------------------------------
   Total fields: 46
   Max value: 13

    1 : xxxxxxx (7)
    3 : xxxx (4)
    4 : xxx (3)
    5 : x (1)
    6 : x (1)
    7 : xxx (3)
    8 : xxx (3)
    9 : xxxx (4)
   13 : x (1)
   16 : xxxxxxxxxxxxx (13)
   32 : xxxx (4)
   48 : xx (2)

HLIR Version: 0.10.5
PHV container sizes are: [8, 16, 32]
Parser state extraction bandwidth: 224
  8-bit: 4 extracts
  16-bit: 4 extracts
  32-bit: 4 extracts
Free containers to start for 8 bits:
  Group 4 8 bits has 16 available
  Group 5 8 bits has 16 available
  Group 6 8 bits has 16 available
  Group 7 8 bits has 16 available
  Group 16 8 bits (tagalong) has 16 available
  Group 17 8 bits (tagalong) has 16 available
Free containers to start for 16 bits:
  Group 8 16 bits has 16 available
  Group 9 16 bits has 16 available
  Group 10 16 bits has 16 available
  Group 11 16 bits has 16 available
  Group 12 16 bits has 16 available
  Group 13 16 bits has 16 available
  Group 18 16 bits (tagalong) has 16 available
  Group 19 16 bits (tagalong) has 16 available
  Group 20 16 bits (tagalong) has 16 available
Free containers to start for 32 bits:
  Group 0 32 bits has 16 available
  Group 1 32 bits has 16 available
  Group 2 32 bits has 16 available
  Group 3 32 bits has 16 available
  Group 14 32 bits (tagalong) has 16 available
  Group 15 32 bits (tagalong) has 16 available


Initializing PHV allocation...
Ingress intrinsic metadata fields branch on includes:
  ig_intr_md.ingress_port

-----------------------------------------------
   User added PHV constraints
-----------------------------------------------
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.ucast_egress_port <9 bits ingress imeta R W> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.level2_mcast_hash <13 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.level2_exclusion_id <9 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.mcast_grp_b <16 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.level1_exclusion_id <16 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.rid <16 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.level1_mcast_hash <13 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_tm.mcast_grp_a <16 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: ig_intr_md_for_mb.ingress_mirror_id <10 bits ingress imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: eg_intr_md.egress_port <9 bits egress parsed imeta> -- max split: 1
User added constraint MaxFieldSplit Constraint: eg_intr_md_for_mb.egress_mirror_id <10 bits egress imeta> -- max split: 1

-----------------------------------------------
  Scanning for field list calculations
-----------------------------------------------

-----------------------------------------------
   Eliminating unused metadata (98 instances)
-----------------------------------------------
Removing standard_metadata.ingress_port in ingress
Removing standard_metadata.packet_length in ingress
Removing standard_metadata.egress_spec in ingress
Removing standard_metadata.egress_port in ingress
Removing standard_metadata.egress_instance in ingress
Removing standard_metadata.instance_type in ingress
Removing standard_metadata.clone_spec in ingress
Removing standard_metadata._padding in ingress
Removing standard_metadata.valid in ingress
Removing ig_intr_md.ingress_mac_tstamp in ingress
Removing ig_intr_md.valid in ingress
Removing ig_intr_md_for_tm._pad1 in ingress
Removing ig_intr_md_for_tm.bypass_egress in ingress
Removing ig_intr_md_for_tm.deflect_on_drop in ingress
Removing ig_intr_md_for_tm.ingress_cos in ingress
Removing ig_intr_md_for_tm.qid in ingress
Removing ig_intr_md_for_tm.icos_for_copy_to_cpu in ingress
Removing ig_intr_md_for_tm._pad2 in ingress
Removing ig_intr_md_for_tm.packet_color in ingress
Removing ig_intr_md_for_tm.disable_ucast_cutthru in ingress
Removing ig_intr_md_for_tm.enable_mcast_cutthru in ingress
Removing ig_intr_md_for_tm.mcast_grp_a in ingress
Removing ig_intr_md_for_tm.mcast_grp_b in ingress
Removing ig_intr_md_for_tm._pad3 in ingress
Removing ig_intr_md_for_tm.level1_mcast_hash in ingress
Removing ig_intr_md_for_tm._pad4 in ingress
Removing ig_intr_md_for_tm.level2_mcast_hash in ingress
Removing ig_intr_md_for_tm.level1_exclusion_id in ingress
Removing ig_intr_md_for_tm._pad5 in ingress
Removing ig_intr_md_for_tm.level2_exclusion_id in ingress
Removing ig_intr_md_for_tm.rid in ingress
Removing ig_intr_md_for_tm.valid in ingress
Removing ig_intr_md_for_mb._pad1 in ingress
Removing ig_intr_md_for_mb.ingress_mirror_id in ingress
Removing ig_intr_md_for_mb.valid in ingress
Removing eg_intr_md._pad0 in ingress
Removing eg_intr_md.egress_port in ingress
Removing eg_intr_md._pad1 in ingress
Removing eg_intr_md.enq_qdepth in ingress
Removing eg_intr_md._pad2 in ingress
Removing eg_intr_md.enq_congest_stat in ingress
Removing eg_intr_md.enq_tstamp in ingress
Removing eg_intr_md._pad3 in ingress
Removing eg_intr_md.deq_qdepth in ingress
Removing eg_intr_md._pad4 in ingress
Removing eg_intr_md.deq_congest_stat in ingress
Removing eg_intr_md.app_pool_congest_stat in ingress
Removing eg_intr_md.deq_timedelta in ingress
Removing eg_intr_md.egress_rid in ingress
Removing eg_intr_md._pad5 in ingress
Removing eg_intr_md.egress_rid_first in ingress
Removing eg_intr_md._pad6 in ingress
Removing eg_intr_md.egress_qid in ingress
Removing eg_intr_md._pad7 in ingress
Removing eg_intr_md.egress_cos in ingress
Removing eg_intr_md._pad8 in ingress
Removing eg_intr_md.deflection_flag in ingress
Removing eg_intr_md.pkt_length in ingress
Removing eg_intr_md.valid in ingress
Removing eg_intr_md_for_mb._pad1 in ingress
Removing eg_intr_md_for_mb.egress_mirror_id in ingress
Removing eg_intr_md_for_mb.coalesce_flush in ingress
Removing eg_intr_md_for_mb.coalesce_length in ingress
Removing eg_intr_md_for_mb.valid in ingress
Removing eg_intr_md_for_oport._pad1 in ingress
Removing eg_intr_md_for_oport.capture_tstamp_on_tx in ingress
Removing eg_intr_md_for_oport.update_delay_on_tx in ingress
Removing eg_intr_md_for_oport.force_tx_error in ingress
Removing eg_intr_md_for_oport.drop_ctl in ingress
Removing eg_intr_md_for_oport.valid in ingress
Removing eg_intr_md._pad1 in egress
Removing eg_intr_md.enq_qdepth in egress
Removing eg_intr_md._pad2 in egress
Removing eg_intr_md.enq_congest_stat in egress
Removing eg_intr_md.enq_tstamp in egress
Removing eg_intr_md._pad3 in egress
Removing eg_intr_md.deq_qdepth in egress
Removing eg_intr_md._pad4 in egress
Removing eg_intr_md.deq_congest_stat in egress
Removing eg_intr_md.app_pool_congest_stat in egress
Removing eg_intr_md.deq_timedelta in egress
Removing eg_intr_md.egress_rid in egress
Removing eg_intr_md._pad5 in egress
Removing eg_intr_md.egress_rid_first in egress
Removing eg_intr_md._pad6 in egress
Removing eg_intr_md.egress_qid in egress
Removing eg_intr_md._pad8 in egress
Removing eg_intr_md.deflection_flag in egress
Removing eg_intr_md.pkt_length in egress
Removing eg_intr_md_for_oport._pad1 in egress
Removing eg_intr_md_for_oport.capture_tstamp_on_tx in egress
Removing eg_intr_md_for_oport.update_delay_on_tx in egress
Removing eg_intr_md_for_oport.force_tx_error in egress
Removing eg_intr_md_for_oport.drop_ctl in egress
Removing eg_intr_md_for_mb._pad1 in egress
Removing eg_intr_md_for_mb.egress_mirror_id in egress
Removing eg_intr_md_for_mb.coalesce_flush in egress
Removing eg_intr_md_for_mb.coalesce_length in egress

-----------------------------------------------
   Eliminating unused packet fields (6 instances)
-----------------------------------------------
Removing packet_in_hdr.valid in ingress
Removing packet_out_hdr.valid in ingress
Removing ethernet.valid in ingress
Removing ipv4.valid in ingress
Removing tcp.valid in ingress
Removing udp.valid in ingress

--------------------------------------------
  ingress field instance bit width histogram
--------------------------------------------
   Total fields: 49
   Max value: 13

    1 : xxxxxxxxxx (10)
    2 : x (1)
    3 : xxxxx (5)
    4 : xxx (3)
    6 : x (1)
    7 : xx (2)
    8 : xxx (3)
    9 : xxxx (4)
   13 : x (1)
   16 : xxxxxxxxxxxxx (13)
   32 : xxxx (4)
   48 : xx (2)

--------------------------------------------
  egress field instance bit width histogram
--------------------------------------------
   Total fields: 46
   Max value: 13

    1 : xxxxxxx (7)
    3 : xxxx (4)
    4 : xxx (3)
    5 : x (1)
    6 : x (1)
    7 : xxx (3)
    8 : xxx (3)
    9 : xxxx (4)
   13 : x (1)
   16 : xxxxxxxxxxxxx (13)
   32 : xxxx (4)
   48 : xx (2)

---------------------------------------------------------------------------------------------------------------------------------
|              Field Name             | Bit Width | Direction | Parsed? | Deparsed? | Metadata? | Read in MAU? | Write in MAU? |
---------------------------------------------------------------------------------------------------------------------------------
|      --validity_check--ethernet     |     1     |   egress  |    x    |     x     |           |              |               |
|        --validity_check--ipv4       |     1     |   egress  |    x    |     x     |           |              |               |
|   --validity_check--packet_in_hdr   |     1     |   egress  |    x    |     x     |           |              |       x       |
|   --validity_check--packet_out_hdr  |     1     |   egress  |    x    |     x     |           |              |               |
|        --validity_check--tcp        |     1     |   egress  |    x    |     x     |           |              |               |
|        --validity_check--udp        |     1     |   egress  |    x    |     x     |           |              |               |
|           eg_intr_md._pad0          |     7     |   egress  |    x    |           |     x     |              |               |
|           eg_intr_md._pad7          |     5     |   egress  |    x    |           |     x     |              |               |
|        eg_intr_md.egress_cos        |     3     |   egress  |    x    |     x     |     x     |              |               |
|        eg_intr_md.egress_port       |     9     |   egress  |    x    |     x     |     x     |              |               |
|           ethernet.dstAddr          |     48    |   egress  |    x    |     x     |           |              |               |
|          ethernet.etherType         |     16    |   egress  |    x    |     x     |           |              |               |
|           ethernet.srcAddr          |     48    |   egress  |    x    |     x     |           |              |               |
|       ig_intr_md.ingress_port       |     9     |   egress  |    x    |           |     x     |      x       |               |
|    ig_intr_md_for_tm.copy_to_cpu    |     1     |   egress  |    x    |           |     x     |      x       |               |
|            ipv4.diffserv            |     8     |   egress  |    x    |     x     |           |              |               |
|             ipv4.dstAddr            |     32    |   egress  |    x    |     x     |           |              |               |
|              ipv4.flags             |     3     |   egress  |    x    |     x     |           |              |               |
|           ipv4.fragOffset           |     13    |   egress  |    x    |     x     |           |              |               |
|           ipv4.hdrChecksum          |     16    |   egress  |    x    |     x     |           |              |               |
|         ipv4.identification         |     16    |   egress  |    x    |     x     |           |              |               |
|               ipv4.ihl              |     4     |   egress  |    x    |     x     |           |              |               |
|            ipv4.protocol            |     8     |   egress  |    x    |     x     |           |              |               |
|             ipv4.srcAddr            |     32    |   egress  |    x    |     x     |           |              |               |
|            ipv4.totalLen            |     16    |   egress  |    x    |     x     |           |              |               |
|               ipv4.ttl              |     8     |   egress  |    x    |     x     |           |              |               |
|             ipv4.version            |     4     |   egress  |    x    |     x     |           |              |               |
|        packet_in_hdr._padding       |     7     |   egress  |    x    |     x     |           |              |               |
|      packet_in_hdr.ingress_port     |     9     |   egress  |    x    |     x     |           |              |       x       |
|       packet_out_hdr._padding       |     7     |   egress  |    x    |     x     |           |              |               |
|      packet_out_hdr.egress_port     |     9     |   egress  |    x    |     x     |           |              |               |
|              tcp.ackNo              |     32    |   egress  |    x    |     x     |           |              |               |
|             tcp.checksum            |     16    |   egress  |    x    |     x     |           |              |               |
|               tcp.ctrl              |     6     |   egress  |    x    |     x     |           |              |               |
|            tcp.dataOffset           |     4     |   egress  |    x    |     x     |           |              |               |
|             tcp.dstPort             |     16    |   egress  |    x    |     x     |           |              |               |
|               tcp.ecn               |     3     |   egress  |    x    |     x     |           |              |               |
|               tcp.res               |     3     |   egress  |    x    |     x     |           |              |               |
|              tcp.seqNo              |     32    |   egress  |    x    |     x     |           |              |               |
|             tcp.srcPort             |     16    |   egress  |    x    |     x     |           |              |               |
|            tcp.urgentPtr            |     16    |   egress  |    x    |     x     |           |              |               |
|              tcp.window             |     16    |   egress  |    x    |     x     |           |              |               |
|             udp.checksum            |     16    |   egress  |    x    |     x     |           |              |               |
|             udp.dstPort             |     16    |   egress  |    x    |     x     |           |              |               |
|             udp.length_             |     16    |   egress  |    x    |     x     |           |              |               |
|             udp.srcPort             |     16    |   egress  |    x    |     x     |           |              |               |
|      --validity_check--ethernet     |     1     |  ingress  |    x    |     x     |           |              |               |
|        --validity_check--ipv4       |     1     |  ingress  |    x    |     x     |           |              |               |
|  --validity_check--metadata_bridge  |     1     |  ingress  |    x    |     x     |           |              |               |
|   --validity_check--packet_in_hdr   |     1     |  ingress  |    x    |     x     |           |              |               |
|   --validity_check--packet_out_hdr  |     1     |  ingress  |    x    |     x     |           |      x       |       x       |
|        --validity_check--tcp        |     1     |  ingress  |    x    |     x     |           |              |               |
|        --validity_check--udp        |     1     |  ingress  |    x    |     x     |           |              |               |
|           ethernet.dstAddr          |     48    |  ingress  |    x    |     x     |           |      x       |               |
|          ethernet.etherType         |     16    |  ingress  |    x    |     x     |           |      x       |               |
|           ethernet.srcAddr          |     48    |  ingress  |    x    |     x     |           |      x       |               |
|           ig_intr_md._pad1          |     1     |  ingress  |    x    |           |     x     |              |               |
|           ig_intr_md._pad2          |     2     |  ingress  |    x    |           |     x     |              |               |
|           ig_intr_md._pad3          |     3     |  ingress  |    x    |           |     x     |              |               |
|       ig_intr_md.ingress_port       |     9     |  ingress  |    x    |     x     |     x     |      x       |               |
|       ig_intr_md.resubmit_flag      |     1     |  ingress  |    x    |           |     x     |              |               |
|    ig_intr_md_for_tm.copy_to_cpu    |     1     |  ingress  |         |     x     |     x     |              |       x       |
|      ig_intr_md_for_tm.drop_ctl     |     3     |  ingress  |         |     x     |     x     |              |       x       |
| ig_intr_md_for_tm.ucast_egress_port |     9     |  ingress  |         |     x     |     x     |      x       |       x       |
|            ipv4.diffserv            |     8     |  ingress  |    x    |     x     |           |              |               |
|             ipv4.dstAddr            |     32    |  ingress  |    x    |     x     |           |              |               |
|              ipv4.flags             |     3     |  ingress  |    x    |     x     |           |              |               |
|           ipv4.fragOffset           |     13    |  ingress  |    x    |     x     |           |              |               |
|           ipv4.hdrChecksum          |     16    |  ingress  |    x    |     x     |           |              |               |
|         ipv4.identification         |     16    |  ingress  |    x    |     x     |           |              |               |
|               ipv4.ihl              |     4     |  ingress  |    x    |     x     |           |              |               |
|            ipv4.protocol            |     8     |  ingress  |    x    |     x     |           |              |               |
|             ipv4.srcAddr            |     32    |  ingress  |    x    |     x     |           |              |               |
|            ipv4.totalLen            |     16    |  ingress  |    x    |     x     |           |              |               |
|               ipv4.ttl              |     8     |  ingress  |    x    |     x     |           |              |               |
|             ipv4.version            |     4     |  ingress  |    x    |     x     |           |              |               |
|        packet_in_hdr._padding       |     7     |  ingress  |    x    |     x     |           |              |               |
|      packet_in_hdr.ingress_port     |     9     |  ingress  |    x    |     x     |           |              |               |
|       packet_out_hdr._padding       |     7     |  ingress  |    x    |     x     |           |              |               |
|      packet_out_hdr.egress_port     |     9     |  ingress  |    x    |     x     |           |      x       |               |
|              tcp.ackNo              |     32    |  ingress  |    x    |     x     |           |              |               |
|             tcp.checksum            |     16    |  ingress  |    x    |     x     |           |              |               |
|               tcp.ctrl              |     6     |  ingress  |    x    |     x     |           |              |               |
|            tcp.dataOffset           |     4     |  ingress  |    x    |     x     |           |              |               |
|             tcp.dstPort             |     16    |  ingress  |    x    |     x     |           |              |               |
|               tcp.ecn               |     3     |  ingress  |    x    |     x     |           |              |               |
|               tcp.res               |     3     |  ingress  |    x    |     x     |           |              |               |
|              tcp.seqNo              |     32    |  ingress  |    x    |     x     |           |              |               |
|             tcp.srcPort             |     16    |  ingress  |    x    |     x     |           |              |               |
|            tcp.urgentPtr            |     16    |  ingress  |    x    |     x     |           |              |               |
|              tcp.window             |     16    |  ingress  |    x    |     x     |           |              |               |
|             udp.checksum            |     16    |  ingress  |    x    |     x     |           |              |               |
|             udp.dstPort             |     16    |  ingress  |    x    |     x     |           |              |               |
|             udp.length_             |     16    |  ingress  |    x    |     x     |           |              |               |
|             udp.srcPort             |     16    |  ingress  |    x    |     x     |           |              |               |
---------------------------------------------------------------------------------------------------------------------------------

Performing PHV allocation...
ingress_parser critical path: 464 bits
  start of 0 bits
  ingress_intrinsic_metadata of 16 bits
  default_parser of 0 bits
  parse_pkt_out of 16 bits
  parse_ethernet of 112 bits
  parse_ipv4 of 160 bits
  parse_tcp of 160 bits
  --ingress-- of 0 bits

--------------------------------------
   Exclusive parse states in ingress_parser
--------------------------------------
  parse_pkt_in and default_parser are exclusive parse states
  parse_pkt_in and parse_pkt_out are exclusive parse states
  parse_tcp and parse_udp are exclusive parse states

egress_parser critical path: 472 bits
  start of 0 bits
  egress_intrinsic_metadata of 24 bits
  default_parser of 0 bits
  parse_pkt_out of 16 bits
  parse_ethernet of 112 bits
  parse_ipv4 of 160 bits
  parse_tcp of 160 bits
  egress_for_mirror_buffer of 0 bits
  --egress-- of 0 bits

--------------------------------------
   Exclusive parse states in egress_parser
--------------------------------------
  parse_pkt_in and default_parser are exclusive parse states
  parse_pkt_in and parse_pkt_out are exclusive parse states
  parse_tcp and parse_udp are exclusive parse states

>>Event 'pa_init' at time 1504792570.39
   Took 0.01 seconds
--------------------------------------------
PHV MAU Groups: 93
--------------------------------------------
Phv Mau Group (ingress) -- 2 instances for total bit width of 18.
  ig_intr_md_for_tm.ucast_egress_port <9 bits ingress imeta R W>
  packet_out_hdr.egress_port <9 bits ingress parsed R>

Phv Mau Group (egress) -- 2 instances for total bit width of 18.
  packet_in_hdr.ingress_port <9 bits egress parsed W>
  ig_intr_md.ingress_port <9 bits egress parsed imeta R>

Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
  ig_intr_md.resubmit_flag <1 bits ingress parsed imeta>

Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
  ig_intr_md._pad1 <1 bits ingress parsed imeta>

Phv Mau Group (ingress) -- 1 instance for total bit width of 2.
  ig_intr_md._pad2 <2 bits ingress parsed imeta>

Phv Mau Group (ingress) -- 1 instance for total bit width of 3.
  ig_intr_md._pad3 <3 bits ingress parsed imeta>

Phv Mau Group (ingress) -- 1 instance for total bit width of 9.
  ig_intr_md.ingress_port <9 bits ingress parsed imeta R>

Phv Mau Group (ingress) -- 1 instance for total bit width of 3.
  ig_intr_md_for_tm.drop_ctl <3 bits ingress imeta W>

Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
  ig_intr_md_for_tm.copy_to_cpu <1 bits ingress imeta W>

Phv Mau Group (ingress) -- 1 instance for total bit width of 9.
  packet_in_hdr.ingress_port <9 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
  --validity_check--packet_in_hdr <1 bits ingress parsed pov>

Phv Mau Group (ingress) -- 1 instance for total bit width of 7.
  packet_in_hdr._padding <7 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
  --validity_check--packet_out_hdr <1 bits ingress parsed pov R W>

Phv Mau Group (ingress) -- 1 instance for total bit width of 7.
  packet_out_hdr._padding <7 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 48.
  ethernet.dstAddr <48 bits ingress parsed R>

Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
  --validity_check--ethernet <1 bits ingress parsed pov>

Phv Mau Group (ingress) -- 1 instance for total bit width of 48.
  ethernet.srcAddr <48 bits ingress parsed R>

Phv Mau Group (ingress) -- 1 instance for total bit width of 16.
  ethernet.etherType <16 bits ingress parsed R>

Phv Mau Group (ingress) -- 1 instance for total bit width of 4.
  ipv4.version <4 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
  --validity_check--ipv4 <1 bits ingress parsed pov>

Phv Mau Group (ingress) -- 1 instance for total bit width of 4.
  ipv4.ihl <4 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 8.
  ipv4.diffserv <8 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 16.
  ipv4.totalLen <16 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 16.
  ipv4.identification <16 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 3.
  ipv4.flags <3 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 13.
  ipv4.fragOffset <13 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 8.
  ipv4.ttl <8 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 8.
  ipv4.protocol <8 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 16.
  ipv4.hdrChecksum <16 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 32.
  ipv4.srcAddr <32 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 32.
  ipv4.dstAddr <32 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 16.
  tcp.srcPort <16 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
  --validity_check--tcp <1 bits ingress parsed pov>

Phv Mau Group (ingress) -- 1 instance for total bit width of 16.
  tcp.dstPort <16 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 32.
  tcp.seqNo <32 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 32.
  tcp.ackNo <32 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 4.
  tcp.dataOffset <4 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 3.
  tcp.res <3 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 3.
  tcp.ecn <3 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 6.
  tcp.ctrl <6 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 16.
  tcp.window <16 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 16.
  tcp.checksum <16 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 16.
  tcp.urgentPtr <16 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 16.
  udp.srcPort <16 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
  --validity_check--udp <1 bits ingress parsed pov>

Phv Mau Group (ingress) -- 1 instance for total bit width of 16.
  udp.dstPort <16 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 16.
  udp.length_ <16 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 16.
  udp.checksum <16 bits ingress parsed tagalong>

Phv Mau Group (ingress) -- 1 instance for total bit width of 1.
  --validity_check--metadata_bridge <1 bits ingress parsed pov>

Phv Mau Group (egress) -- 1 instance for total bit width of 1.
  --validity_check--packet_in_hdr <1 bits egress parsed pov W>

Phv Mau Group (egress) -- 1 instance for total bit width of 7.
  packet_in_hdr._padding <7 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 9.
  packet_out_hdr.egress_port <9 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 1.
  --validity_check--packet_out_hdr <1 bits egress parsed pov>

Phv Mau Group (egress) -- 1 instance for total bit width of 7.
  packet_out_hdr._padding <7 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 48.
  ethernet.dstAddr <48 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 1.
  --validity_check--ethernet <1 bits egress parsed pov>

Phv Mau Group (egress) -- 1 instance for total bit width of 48.
  ethernet.srcAddr <48 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 16.
  ethernet.etherType <16 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 4.
  ipv4.version <4 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 1.
  --validity_check--ipv4 <1 bits egress parsed pov>

Phv Mau Group (egress) -- 1 instance for total bit width of 4.
  ipv4.ihl <4 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 8.
  ipv4.diffserv <8 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 16.
  ipv4.totalLen <16 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 16.
  ipv4.identification <16 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 3.
  ipv4.flags <3 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 13.
  ipv4.fragOffset <13 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 8.
  ipv4.ttl <8 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 8.
  ipv4.protocol <8 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 16.
  ipv4.hdrChecksum <16 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 32.
  ipv4.srcAddr <32 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 32.
  ipv4.dstAddr <32 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 16.
  tcp.srcPort <16 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 1.
  --validity_check--tcp <1 bits egress parsed pov>

Phv Mau Group (egress) -- 1 instance for total bit width of 16.
  tcp.dstPort <16 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 32.
  tcp.seqNo <32 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 32.
  tcp.ackNo <32 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 4.
  tcp.dataOffset <4 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 3.
  tcp.res <3 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 3.
  tcp.ecn <3 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 6.
  tcp.ctrl <6 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 16.
  tcp.window <16 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 16.
  tcp.checksum <16 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 16.
  tcp.urgentPtr <16 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 16.
  udp.srcPort <16 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 1.
  --validity_check--udp <1 bits egress parsed pov>

Phv Mau Group (egress) -- 1 instance for total bit width of 16.
  udp.dstPort <16 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 16.
  udp.length_ <16 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 16.
  udp.checksum <16 bits egress parsed tagalong>

Phv Mau Group (egress) -- 1 instance for total bit width of 1.
  ig_intr_md_for_tm.copy_to_cpu <1 bits egress parsed imeta R>

Phv Mau Group (egress) -- 1 instance for total bit width of 7.
  eg_intr_md._pad0 <7 bits egress parsed imeta>

Phv Mau Group (egress) -- 1 instance for total bit width of 9.
  eg_intr_md.egress_port <9 bits egress parsed imeta>

Phv Mau Group (egress) -- 1 instance for total bit width of 5.
  eg_intr_md._pad7 <5 bits egress parsed imeta>

Phv Mau Group (egress) -- 1 instance for total bit width of 3.
  eg_intr_md.egress_cos <3 bits egress parsed imeta>


>>Event 'pa_resv' at time 1504792570.39
   Took 0.00 seconds

-----------------------------------------------
  Container reservations
-----------------------------------------------
Allocation Step
ingress reservations:
   8-bit containers: 0
   16-bit containers: 0
   32-bit containers: 0
egress reservations:
   8-bit containers: 0
   16-bit containers: 0
   32-bit containers: 0
   None required.

-----------------------------------------------
  Tagalong container reservations
-----------------------------------------------
Allocation Step
ingress reservations:
   8-bit containers: 0
   16-bit containers: 0
   32-bit containers: 0
egress reservations:
   8-bit containers: 0
   16-bit containers: 0
   32-bit containers: 0
   None required.

-----------------------------------------------
  POV bit index reservations
-----------------------------------------------
Allocation Step
POV bit indicies requested for ingress: [16]

MAU groups: 3
  Group 0 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv0
  Group 2 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv32
  Group 3 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv48
Reserving 32-bit container for ingress: phv0
>>Event 'pa_bridge' at time 1504792570.43
   Took 0.04 seconds

-----------------------------------------------
  Allocating fields related to bridged metadata
-----------------------------------------------
Allocation Step
  ig_intr_md.ingress_port <9 bits ingress parsed imeta R> and ig_intr_md.ingress_port <9 bits egress parsed imeta R>
  ig_intr_md_for_tm.copy_to_cpu <1 bits ingress imeta W> and ig_intr_md_for_tm.copy_to_cpu <1 bits egress parsed imeta R>


Allowed alignment for fields:
  ig_intr_md.ingress_port -> [0, 8, 16, 24]
  ig_intr_md_for_tm.copy_to_cpu -> [0, 1, 2, 3, 4, 5, 6, 7]

Required packing for bridged metadata: 1
  ig_intr_md.ingress_port (ingress)
    phv[15:15] = ig_intr_md.resubmit_flag[0:0]
    phv[14:14] = ig_intr_md._pad1[0:0]
    phv[13:12] = ig_intr_md._pad2[1:0]
    phv[11:9] = ig_intr_md._pad3[2:0]
    phv[8:0] = ig_intr_md.ingress_port[8:0]
ig_intr_md_for_tm.copy_to_cpu cannot share with any fields:  total bits 1


All combinations = 1
Valid combinations = 1
Choosing to pack non-byte multiple metadata as below, which wastes 0 bits

Sharing capabilities of groups: (2)
Group ['ig_intr_md.resubmit_flag', 'ig_intr_md._pad1', 'ig_intr_md._pad2', 'ig_intr_md._pad3', 'ig_intr_md.ingress_port'] can share with 0 other groups:
Group ['ig_intr_md_for_tm.copy_to_cpu'] can share with 0 other groups:

Merged sharing capabilities of groups: (2)
Group ['ig_intr_md.resubmit_flag', 'ig_intr_md._pad1', 'ig_intr_md._pad2', 'ig_intr_md._pad3', 'ig_intr_md.ingress_port'] can share with 0 other groups (16 bits):
Group ['ig_intr_md_for_tm.copy_to_cpu'] can share with 0 other groups (1 bits):

Final group packing:
Group 0:
  ['ig_intr_md_for_tm.copy_to_cpu']
Group 1:
  ['ig_intr_md.resubmit_flag', 'ig_intr_md._pad1', 'ig_intr_md._pad2', 'ig_intr_md._pad3', 'ig_intr_md.ingress_port']
Preferred packing is [8, 16]

Final ingress bridged metadata packing: 24 bits (3 bytes)
  -pad-0- / 7 bits
  ig_intr_md_for_tm.copy_to_cpu / 1 bits
  ig_intr_md.resubmit_flag / 1 bits
  ig_intr_md._pad1 / 1 bits
  ig_intr_md._pad2 / 2 bits
  ig_intr_md._pad3 / 3 bits
  ig_intr_md.ingress_port / 9 bits

Final egress bridged metadata packing: 24 bits (3 bytes)
  -pad-0- / 7 bits
  ig_intr_md_for_tm.copy_to_cpu / 1 bits
  -pad-1- / 7 bits
  ig_intr_md.ingress_port / 9 bits

-------------------------------------------
Allocating parsed header: pkt fields (7) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 24
Set metadata bits: 0
Gress: ingress
bits_will_need_to_parse = 24
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 24
Parse state 0 (24 bits)
  -pad-0- [6:0]
  ig_intr_md_for_tm.copy_to_cpu [0:0]
  ig_intr_md.resubmit_flag [0:0]
  ig_intr_md._pad1 [0:0]
  ig_intr_md._pad2 [1:0]
  ig_intr_md._pad3 [2:0]
  ig_intr_md.ingress_port [8:0]
----------------------------------------------------------------------------------------------------
|              Name             | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
----------------------------------------------------------------------------------------------------
|            -pad-0-            | 7  |    True   |  -  |  -   |     -     |   None   |     1      |
| ig_intr_md_for_tm.copy_to_cpu | 1  |   False   |  -  |  -   |     -     |    1     |     1      |
|    ig_intr_md.resubmit_flag   | 1  |   False   |  -  |  -   |     -     |    1     |     1      |
|        ig_intr_md._pad1       | 1  |   False   |  -  |  -   |     -     |    1     |     1      |
|        ig_intr_md._pad2       | 2  |   False   |  -  |  -   |     -     |    1     |     1      |
|        ig_intr_md._pad3       | 3  |   False   |  -  |  -   |     -     |    1     |     1      |
|    ig_intr_md.ingress_port    | 9  |   False   |  -  |  -   |     -     |    2     |     1      |
----------------------------------------------------------------------------------------------------

Packing options: 5
MAU containers available:
  8-bit: 48
  16-bit: 80
  32-bit: 47
Tagalong containers available:
  8-bit: 32
  16-bit: 48
  32-bit: 32
Initial packing options: 5

Packing option 0:  [8, 16]
MAU containers after:
  8-bit: 47
  16-bit: 79
  32-bit: 47
+----------------------------------------+
|  -pad-0- [6:0]                         |
|  ig_intr_md_for_tm.copy_to_cpu [0:0]   |
+----------------------------------------+
|  ig_intr_md.resubmit_flag [0:0]        |
|  ig_intr_md._pad1 [0:0]                |
|  ig_intr_md._pad2 [1:0]                |
|  ig_intr_md._pad3 [2:0]                |
|  ig_intr_md.ingress_port [8:0]         |
+----------------------------------------+

Looking at -pad-0- (ingress) [6:0], with test_alloc = False
Looking at ig_intr_md_for_tm.copy_to_cpu (ingress) [0:0], with test_alloc = True
----> ig_intr_md_for_tm.copy_to_cpu (ingress) is allocated? False
Checking if can overlay metadata field.
No required PHV group.
Could not find container to overlay in.

MAU groups: 3
  Group 4 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv64
  Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
  Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
***Allocating phv64[7:1] for -pad-0-[6:0]
***Allocating phv64[0:0] for ig_intr_md_for_tm.copy_to_cpu[0:0]
Looking at ig_intr_md.resubmit_flag (ingress) [0:0], with test_alloc = True
----> ig_intr_md.resubmit_flag (ingress) is allocated? False
Looking at ig_intr_md._pad1 (ingress) [0:0], with test_alloc = True
Looking at ig_intr_md._pad2 (ingress) [1:0], with test_alloc = True
Looking at ig_intr_md._pad3 (ingress) [2:0], with test_alloc = True
Looking at ig_intr_md.ingress_port (ingress) [8:0], with test_alloc = True
Checking if can overlay metadata field.
No required PHV group.
Could not find container to overlay in.

MAU groups: 5
  Group 8 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv128
  Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv160
  Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv176
  Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv192
  Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
***Allocating phv128[15:15] for ig_intr_md.resubmit_flag[0:0]
***Allocating phv128[14:14] for ig_intr_md._pad1[0:0]
***Allocating phv128[13:12] for ig_intr_md._pad2[1:0]
***Allocating phv128[11:9] for ig_intr_md._pad3[2:0]
***Allocating phv128[8:0] for ig_intr_md.ingress_port[8:0]
Packing options tried: 1
Packing options skipped: 0


-------------------------------------------
Allocating parsed header: pkt fields (4) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 24
Set metadata bits: 0
Gress: egress
bits_will_need_to_parse = 24
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 24
Parse state 0 (24 bits)
  -pad-0- [6:0]
  ig_intr_md_for_tm.copy_to_cpu [0:0]
  -pad-1- [6:0]
  ig_intr_md.ingress_port [8:0]
----------------------------------------------------------------------------------------------------
|              Name             | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
----------------------------------------------------------------------------------------------------
|            -pad-0-            | 7  |    True   |  -  |  -   |     -     |   None   |     1      |
| ig_intr_md_for_tm.copy_to_cpu | 1  |   False   |  -  |  -   |     -     |   None   |     1      |
|            -pad-1-            | 7  |    True   |  -  |  -   |     -     |   None   |     1      |
|    ig_intr_md.ingress_port    | 9  |   False   |  -  |  -   |    [32]   |   None   |     2      |
----------------------------------------------------------------------------------------------------

Packing options: 5
MAU containers available:
  8-bit: 48
  16-bit: 80
  32-bit: 48
Tagalong containers available:
  8-bit: 32
  16-bit: 48
  32-bit: 32
Initial packing options: 5

Packing option 0:  [8, 16]
MAU containers after:
  8-bit: 47
  16-bit: 78
  32-bit: 48
+----------------------------------------+
|  -pad-0- [6:0]                         |
|  ig_intr_md_for_tm.copy_to_cpu [0:0]   |
+----------------------------------------+
|  -pad-1- [6:0]                         |
|  ig_intr_md.ingress_port [8:0]         |
+----------------------------------------+

Looking at -pad-0- (egress) [6:0], with test_alloc = False
Looking at ig_intr_md_for_tm.copy_to_cpu (egress) [0:0], with test_alloc = True
----> ig_intr_md_for_tm.copy_to_cpu (egress) is allocated? False
Checking if can overlay metadata field.
No required PHV group.
Could not find container to overlay in.

MAU groups: 3
  Group 5 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv80
  Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv96
  Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv112
***Allocating phv80[7:1] for -pad-0-[6:0]
***Allocating phv80[0:0] for ig_intr_md_for_tm.copy_to_cpu[0:0]
Looking at -pad-1- (egress) [6:0], with test_alloc = False
Looking at ig_intr_md.ingress_port (egress) [8:0], with test_alloc = True
----> ig_intr_md.ingress_port (egress) is allocated? False
Checking if can overlay metadata field.
No required PHV group.
Could not find container to overlay in.

MAU groups: 5
  Group 9 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv144
  Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv160
  Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv176
  Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv192
  Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 14 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv208
***Allocating phv144[15:9] for -pad-1-[6:0]
***Allocating phv144[8:0] for ig_intr_md.ingress_port[8:0]
Packing options tried: 1
Packing options skipped: 0


After allocating bridged metadata:
Allocation state: Final Allocation
---------------------------------------------------------------------------
|       PHV Group        | Containers Used | Bits Used  | Bits Available |
| (container bit widths) |     (% used)    |  (% used)  |                |
---------------------------------------------------------------------------
|         0 (32)         |    1 (6.25%)    | 32 (6.25%) |      512       |
|         1 (32)         |    0 (0.00%)    | 0 (0.00%)  |      512       |
|         2 (32)         |    0 (0.00%)    | 0 (0.00%)  |      512       |
|         3 (32)         |    0 (0.00%)    | 0 (0.00%)  |      512       |
|    Total for 32 bit    |    1 (1.56%)    | 32 (1.56%) |      2048      |
|                        |                 |            |                |
|         4 (8)          |    1 (6.25%)    | 8 (6.25%)  |      128       |
|         5 (8)          |    1 (6.25%)    | 8 (6.25%)  |      128       |
|         6 (8)          |    0 (0.00%)    | 0 (0.00%)  |      128       |
|         7 (8)          |    0 (0.00%)    | 0 (0.00%)  |      128       |
|    Total for 8 bit     |    2 (3.12%)    | 16 (3.12%) |      512       |
|                        |                 |            |                |
|         8 (16)         |    1 (6.25%)    | 16 (6.25%) |      256       |
|         9 (16)         |    1 (6.25%)    | 16 (6.25%) |      256       |
|        10 (16)         |    0 (0.00%)    | 0 (0.00%)  |      256       |
|        11 (16)         |    0 (0.00%)    | 0 (0.00%)  |      256       |
|        12 (16)         |    0 (0.00%)    | 0 (0.00%)  |      256       |
|        13 (16)         |    0 (0.00%)    | 0 (0.00%)  |      256       |
|    Total for 16 bit    |    2 (2.08%)    | 32 (2.08%) |      1536      |
|                        |                 |            |                |
|       14 (32) T        |    0 (0.00%)    | 0 (0.00%)  |      512       |
|       15 (32) T        |    0 (0.00%)    | 0 (0.00%)  |      512       |
|    Total for 32 bit    |    0 (0.00%)    | 0 (0.00%)  |      1024      |
|                        |                 |            |                |
|        16 (8) T        |    0 (0.00%)    | 0 (0.00%)  |      128       |
|        17 (8) T        |    0 (0.00%)    | 0 (0.00%)  |      128       |
|    Total for 8 bit     |    0 (0.00%)    | 0 (0.00%)  |      256       |
|                        |                 |            |                |
|       18 (16) T        |    0 (0.00%)    | 0 (0.00%)  |      256       |
|       19 (16) T        |    0 (0.00%)    | 0 (0.00%)  |      256       |
|       20 (16) T        |    0 (0.00%)    | 0 (0.00%)  |      256       |
|    Total for 16 bit    |    0 (0.00%)    | 0 (0.00%)  |      768       |
|                        |                 |            |                |
|       MAU total        |    5 (2.23%)    | 80 (1.95%) |      4096      |
|     Tagalong total     |    0 (0.00%)    | 0 (0.00%)  |      2048      |
|     Overall total      |    5 (1.49%)    | 80 (1.30%) |      6144      |
---------------------------------------------------------------------------

>>Event 'pa_phase0' at time 1504792570.84
   Took 0.41 seconds

-----------------------------------------------
  Allocating Phase 0-related metadata
-----------------------------------------------
Allocation Step
  Phase 0 not in use.

After allocating data written by Phase 0:
Allocation state: Final Allocation
---------------------------------------------------------------------------
|       PHV Group        | Containers Used | Bits Used  | Bits Available |
| (container bit widths) |     (% used)    |  (% used)  |                |
---------------------------------------------------------------------------
|         0 (32)         |    1 (6.25%)    | 32 (6.25%) |      512       |
|         1 (32)         |    0 (0.00%)    | 0 (0.00%)  |      512       |
|         2 (32)         |    0 (0.00%)    | 0 (0.00%)  |      512       |
|         3 (32)         |    0 (0.00%)    | 0 (0.00%)  |      512       |
|    Total for 32 bit    |    1 (1.56%)    | 32 (1.56%) |      2048      |
|                        |                 |            |                |
|         4 (8)          |    1 (6.25%)    | 8 (6.25%)  |      128       |
|         5 (8)          |    1 (6.25%)    | 8 (6.25%)  |      128       |
|         6 (8)          |    0 (0.00%)    | 0 (0.00%)  |      128       |
|         7 (8)          |    0 (0.00%)    | 0 (0.00%)  |      128       |
|    Total for 8 bit     |    2 (3.12%)    | 16 (3.12%) |      512       |
|                        |                 |            |                |
|         8 (16)         |    1 (6.25%)    | 16 (6.25%) |      256       |
|         9 (16)         |    1 (6.25%)    | 16 (6.25%) |      256       |
|        10 (16)         |    0 (0.00%)    | 0 (0.00%)  |      256       |
|        11 (16)         |    0 (0.00%)    | 0 (0.00%)  |      256       |
|        12 (16)         |    0 (0.00%)    | 0 (0.00%)  |      256       |
|        13 (16)         |    0 (0.00%)    | 0 (0.00%)  |      256       |
|    Total for 16 bit    |    2 (2.08%)    | 32 (2.08%) |      1536      |
|                        |                 |            |                |
|       14 (32) T        |    0 (0.00%)    | 0 (0.00%)  |      512       |
|       15 (32) T        |    0 (0.00%)    | 0 (0.00%)  |      512       |
|    Total for 32 bit    |    0 (0.00%)    | 0 (0.00%)  |      1024      |
|                        |                 |            |                |
|        16 (8) T        |    0 (0.00%)    | 0 (0.00%)  |      128       |
|        17 (8) T        |    0 (0.00%)    | 0 (0.00%)  |      128       |
|    Total for 8 bit     |    0 (0.00%)    | 0 (0.00%)  |      256       |
|                        |                 |            |                |
|       18 (16) T        |    0 (0.00%)    | 0 (0.00%)  |      256       |
|       19 (16) T        |    0 (0.00%)    | 0 (0.00%)  |      256       |
|       20 (16) T        |    0 (0.00%)    | 0 (0.00%)  |      256       |
|    Total for 16 bit    |    0 (0.00%)    | 0 (0.00%)  |      768       |
|                        |                 |            |                |
|       MAU total        |    5 (2.23%)    | 80 (1.95%) |      4096      |
|     Tagalong total     |    0 (0.00%)    | 0 (0.00%)  |      2048      |
|     Overall total      |    5 (1.49%)    | 80 (1.30%) |      6144      |
---------------------------------------------------------------------------

>>Event 'pa_critical' at time 1504792570.84
   Took 0.00 seconds

-----------------------------------------------
  Allocating headers on longest parse paths
-----------------------------------------------
Allocation Step

All Sorted parse nodes:
  parse_pkt_out (ingress) with bits = 16 and max = 2
  parse_ipv4 (ingress) with bits = 160 and max = 1
  parse_tcp (ingress) with bits = 160 and max = 1
  parse_ipv4 (egress) with bits = 160 and max = 1
  parse_tcp (egress) with bits = 160 and max = 1
  parse_ethernet (ingress) with bits = 112 and max = 1
  parse_ethernet (egress) with bits = 112 and max = 1
  egress_intrinsic_metadata (egress) with bits = 24 and max = 1
  ingress_intrinsic_metadata (ingress) with bits = 16 and max = 1
  parse_pkt_out (egress) with bits = 16 and max = 1
  start () with bits = 0 and max = 0
  default_parser () with bits = 0 and max = 0
  --ingress-- () with bits = 0 and max = 0
  start () with bits = 0 and max = 0
  default_parser () with bits = 0 and max = 0
  egress_for_mirror_buffer () with bits = 0 and max = 0
  --egress-- () with bits = 0 and max = 0
Total packet bits: 936
Total meta bits: 0
Total bits: 936
Working on parse node parse_pkt_out (4) (ingress)

-------------------------------------------
Allocating parsed header: pkt fields (2) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 16
Set metadata bits: 0
Gress: ingress
bits_will_need_to_parse = 16
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 16
Parse state 0 (16 bits)
  packet_out_hdr.egress_port [8:0]
  packet_out_hdr._padding [6:0]
-------------------------------------------------------------------------------------------------
|            Name            | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-------------------------------------------------------------------------------------------------
| packet_out_hdr.egress_port | 9  |   False   |  -  |  -   |  [8, 32]  |    2     |     2      |
|  packet_out_hdr._padding   | 7  |    True   |  -  |  -   |    [32]   |    1     |     1      |
-------------------------------------------------------------------------------------------------

min_extracts[8] = 1
min_extracts[16] = 1
min_extracts[32] = 1
Packing options: 2
MAU containers available:
  8-bit: 47
  16-bit: 79
  32-bit: 47
Tagalong containers available:
  8-bit: 32
  16-bit: 48
  32-bit: 32
Initial packing options: 2

Packing option 0:  [16]
MAU containers after:
  8-bit: 47
  16-bit: 77
  32-bit: 47
+-------------------------------------+
|  packet_out_hdr.egress_port [8:0]   |
|  packet_out_hdr._padding [6:0]      |
+-------------------------------------+

Looking at packet_out_hdr.egress_port (ingress) [8:0], with test_alloc = True
----> packet_out_hdr.egress_port (ingress) is allocated? False
Looking at packet_out_hdr._padding (ingress) [6:0], with test_alloc = True

MAU groups: 5
  Group 8 16 bits -- avail 15 -- ingress avail 15 and remain 13 and promised 2 and req 2 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv129
  Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv160
  Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv176
  Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv192
  Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 14 and promised 2 and req 2 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
***Allocating phv129[15:7] for packet_out_hdr.egress_port[8:0]
***Allocating phv129[6:0] for packet_out_hdr._padding[6:0]
Packing options tried: 1
Packing options skipped: 0

Working on parse node parse_ipv4 (6) (ingress)

-------------------------------------------
Allocating parsed header: pkt fields (12) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 160
Set metadata bits: 0
Gress: ingress
bits_will_need_to_parse = 160
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 160
Parse state 0 (160 bits)
  ipv4.version [3:0]
  ipv4.ihl [3:0]
  ipv4.diffserv [7:0]
  ipv4.totalLen [15:0]
  ipv4.identification [15:0]
  ipv4.flags [2:0]
  ipv4.fragOffset [12:0]
  ipv4.ttl [7:0]
  ipv4.protocol [7:0]
  ipv4.hdrChecksum [15:0]
  ipv4.srcAddr [31:0]
  ipv4.dstAddr [31:0]
------------------------------------------------------------------------------------------
|         Name        | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
------------------------------------------------------------------------------------------
|     ipv4.version    | 4  |    True   |  -  |  -   |     -     |    1     |     1      |
|       ipv4.ihl      | 4  |    True   |  -  |  -   |     -     |    1     |     1      |
|    ipv4.diffserv    | 8  |    True   |  -  |  -   |     -     |    1     |     1      |
|    ipv4.totalLen    | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
| ipv4.identification | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
|      ipv4.flags     | 3  |    True   |  -  |  -   |     -     |    1     |     1      |
|   ipv4.fragOffset   | 13 |    True   |  -  |  -   |     -     |    2     |     1      |
|       ipv4.ttl      | 8  |    True   |  -  |  -   |     -     |    1     |     1      |
|    ipv4.protocol    | 8  |    True   |  -  |  -   |     -     |    1     |     1      |
|   ipv4.hdrChecksum  | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
|     ipv4.srcAddr    | 32 |    True   |  -  |  -   |     -     |    4     |     1      |
|     ipv4.dstAddr    | 32 |    True   |  -  |  -   |     -     |    4     |     1      |
------------------------------------------------------------------------------------------

min_extracts[8] = 1
min_extracts[16] = 1
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
  8-bit: 47
  16-bit: 77
  32-bit: 47
Tagalong containers available:
  8-bit: 32
  16-bit: 48
  32-bit: 32
Initial packing options: 5196

Packing option 0:  [8, 8, 16, 16, 16, 32, 32, 32]
MAU containers after:
  8-bit: 47
  16-bit: 77
  32-bit: 47
+------------------------------+
|  ipv4.version [3:0]          |
|  ipv4.ihl [3:0]              |
+------------------------------+
|  ipv4.diffserv [7:0]         |
+------------------------------+
|  ipv4.totalLen [15:0]        |
+------------------------------+
|  ipv4.identification [15:0]  |
+------------------------------+
|  ipv4.flags [2:0]            |
|  ipv4.fragOffset [12:0]      |
+------------------------------+
|  ipv4.ttl [7:0]              |
|  ipv4.protocol [7:0]         |
|  ipv4.hdrChecksum [15:0]     |
+------------------------------+
|  ipv4.srcAddr [31:0]         |
+------------------------------+
|  ipv4.dstAddr [31:0]         |
+------------------------------+

Looking at ipv4.version (ingress) [3:0], with test_alloc = True
----> ipv4.version (ingress) is allocated? False
Looking at ipv4.ihl (ingress) [3:0], with test_alloc = True
***Allocating phv288[7:4] for ipv4.version[3:0]
***Allocating phv288[3:0] for ipv4.ihl[3:0]
Looking at ipv4.diffserv (ingress) [7:0], with test_alloc = True
----> ipv4.diffserv (ingress) is allocated? False
***Allocating phv289[7:0] for ipv4.diffserv[7:0]
Looking at ipv4.totalLen (ingress) [15:0], with test_alloc = True
----> ipv4.totalLen (ingress) is allocated? False
***Allocating phv320[15:0] for ipv4.totalLen[15:0]
Looking at ipv4.identification (ingress) [15:0], with test_alloc = True
----> ipv4.identification (ingress) is allocated? False
***Allocating phv321[15:0] for ipv4.identification[15:0]
Looking at ipv4.flags (ingress) [2:0], with test_alloc = True
----> ipv4.flags (ingress) is allocated? False
Looking at ipv4.fragOffset (ingress) [12:0], with test_alloc = True
***Allocating phv322[15:13] for ipv4.flags[2:0]
***Allocating phv322[12:0] for ipv4.fragOffset[12:0]
Looking at ipv4.ttl (ingress) [7:0], with test_alloc = True
----> ipv4.ttl (ingress) is allocated? False
Looking at ipv4.protocol (ingress) [7:0], with test_alloc = True
Looking at ipv4.hdrChecksum (ingress) [15:0], with test_alloc = True
***Allocating phv256[31:24] for ipv4.ttl[7:0]
***Allocating phv256[23:16] for ipv4.protocol[7:0]
***Allocating phv256[15:0] for ipv4.hdrChecksum[15:0]
Looking at ipv4.srcAddr (ingress) [31:0], with test_alloc = True
----> ipv4.srcAddr (ingress) is allocated? False
***Allocating phv257[31:0] for ipv4.srcAddr[31:0]
Looking at ipv4.dstAddr (ingress) [31:0], with test_alloc = True
----> ipv4.dstAddr (ingress) is allocated? False
***Allocating phv258[31:0] for ipv4.dstAddr[31:0]
Packing options tried: 1
Packing options skipped: 0

Working on parse node parse_tcp (7) (ingress)

-------------------------------------------
Allocating parsed header: pkt fields (11) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 160
Set metadata bits: 0
Gress: ingress
bits_will_need_to_parse = 160
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 160
Parse state 0 (160 bits)
  tcp.srcPort [15:0]
  tcp.dstPort [15:0]
  tcp.seqNo [31:0]
  tcp.ackNo [31:0]
  tcp.dataOffset [3:0]
  tcp.res [2:0]
  tcp.ecn [2:0]
  tcp.ctrl [5:0]
  tcp.window [15:0]
  tcp.checksum [15:0]
  tcp.urgentPtr [15:0]
-------------------------------------------------------------------------------------
|      Name      | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-------------------------------------------------------------------------------------
|  tcp.srcPort   | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
|  tcp.dstPort   | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
|   tcp.seqNo    | 32 |    True   |  -  |  -   |     -     |    4     |     1      |
|   tcp.ackNo    | 32 |    True   |  -  |  -   |     -     |    4     |     1      |
| tcp.dataOffset | 4  |    True   |  -  |  -   |     -     |    1     |     1      |
|    tcp.res     | 3  |    True   |  -  |  -   |     -     |    1     |     1      |
|    tcp.ecn     | 3  |    True   |  -  |  -   |     -     |    2     |     1      |
|    tcp.ctrl    | 6  |    True   |  -  |  -   |     -     |    1     |     1      |
|   tcp.window   | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
|  tcp.checksum  | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
| tcp.urgentPtr  | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
-------------------------------------------------------------------------------------

min_extracts[8] = 1
min_extracts[16] = 1
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
  8-bit: 47
  16-bit: 77
  32-bit: 47
Tagalong containers available:
  8-bit: 30
  16-bit: 45
  32-bit: 29
Initial packing options: 5196

Packing option 0:  [8, 8, 16, 16, 16, 32, 32, 32]
MAU containers after:
  8-bit: 47
  16-bit: 77
  32-bit: 47
+-------------------------+
|  tcp.srcPort [15:8]     |
+-------------------------+
|  tcp.srcPort [7:0]      |
+-------------------------+
|  tcp.dstPort [15:0]     |
+-------------------------+
|  tcp.seqNo [31:16]      |
+-------------------------+
|  tcp.seqNo [15:0]       |
+-------------------------+
|  tcp.ackNo [31:0]       |
+-------------------------+
|  tcp.dataOffset [3:0]   |
|  tcp.res [2:0]          |
|  tcp.ecn [2:0]          |
|  tcp.ctrl [5:0]         |
|  tcp.window [15:0]      |
+-------------------------+
|  tcp.checksum [15:0]    |
|  tcp.urgentPtr [15:0]   |
+-------------------------+

Looking at tcp.srcPort (ingress) [15:8], with test_alloc = True
----> tcp.srcPort (ingress) is allocated? False
***Allocating phv290[7:0] for tcp.srcPort[15:8]
Looking at tcp.srcPort (ingress) [7:0], with test_alloc = True
----> tcp.srcPort (ingress) is allocated? False
***Allocating phv291[7:0] for tcp.srcPort[7:0]
Looking at tcp.dstPort (ingress) [15:0], with test_alloc = True
----> tcp.dstPort (ingress) is allocated? False
***Allocating phv323[15:0] for tcp.dstPort[15:0]
Looking at tcp.seqNo (ingress) [31:16], with test_alloc = True
----> tcp.seqNo (ingress) is allocated? False
***Allocating phv324[15:0] for tcp.seqNo[31:16]
Looking at tcp.seqNo (ingress) [15:0], with test_alloc = True
----> tcp.seqNo (ingress) is allocated? False
***Allocating phv325[15:0] for tcp.seqNo[15:0]
Looking at tcp.ackNo (ingress) [31:0], with test_alloc = True
----> tcp.ackNo (ingress) is allocated? False
***Allocating phv259[31:0] for tcp.ackNo[31:0]
Looking at tcp.dataOffset (ingress) [3:0], with test_alloc = True
----> tcp.dataOffset (ingress) is allocated? False
Looking at tcp.res (ingress) [2:0], with test_alloc = True
Looking at tcp.ecn (ingress) [2:0], with test_alloc = True
Looking at tcp.ctrl (ingress) [5:0], with test_alloc = True
Looking at tcp.window (ingress) [15:0], with test_alloc = True
***Allocating phv260[31:28] for tcp.dataOffset[3:0]
***Allocating phv260[27:25] for tcp.res[2:0]
***Allocating phv260[24:22] for tcp.ecn[2:0]
***Allocating phv260[21:16] for tcp.ctrl[5:0]
***Allocating phv260[15:0] for tcp.window[15:0]
Looking at tcp.checksum (ingress) [15:0], with test_alloc = True
----> tcp.checksum (ingress) is allocated? False
Looking at tcp.urgentPtr (ingress) [15:0], with test_alloc = True
***Allocating phv261[31:16] for tcp.checksum[15:0]
***Allocating phv261[15:0] for tcp.urgentPtr[15:0]
Packing options tried: 1
Packing options skipped: 0

Working on parse node parse_ipv4 (6) (egress)

-------------------------------------------
Allocating parsed header: pkt fields (12) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 160
Set metadata bits: 0
Gress: egress
bits_will_need_to_parse = 160
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 160
Parse state 0 (160 bits)
  ipv4.version [3:0]
  ipv4.ihl [3:0]
  ipv4.diffserv [7:0]
  ipv4.totalLen [15:0]
  ipv4.identification [15:0]
  ipv4.flags [2:0]
  ipv4.fragOffset [12:0]
  ipv4.ttl [7:0]
  ipv4.protocol [7:0]
  ipv4.hdrChecksum [15:0]
  ipv4.srcAddr [31:0]
  ipv4.dstAddr [31:0]
------------------------------------------------------------------------------------------
|         Name        | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
------------------------------------------------------------------------------------------
|     ipv4.version    | 4  |    True   |  -  |  -   |     -     |    1     |     1      |
|       ipv4.ihl      | 4  |    True   |  -  |  -   |     -     |    1     |     1      |
|    ipv4.diffserv    | 8  |    True   |  -  |  -   |     -     |    1     |     1      |
|    ipv4.totalLen    | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
| ipv4.identification | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
|      ipv4.flags     | 3  |    True   |  -  |  -   |     -     |    1     |     1      |
|   ipv4.fragOffset   | 13 |    True   |  -  |  -   |     -     |    2     |     1      |
|       ipv4.ttl      | 8  |    True   |  -  |  -   |     -     |    1     |     1      |
|    ipv4.protocol    | 8  |    True   |  -  |  -   |     -     |    1     |     1      |
|   ipv4.hdrChecksum  | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
|     ipv4.srcAddr    | 32 |    True   |  -  |  -   |     -     |    4     |     1      |
|     ipv4.dstAddr    | 32 |    True   |  -  |  -   |     -     |    4     |     1      |
------------------------------------------------------------------------------------------

min_extracts[8] = 1
min_extracts[16] = 1
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
  8-bit: 47
  16-bit: 78
  32-bit: 48
Tagalong containers available:
  8-bit: 24
  16-bit: 36
  32-bit: 24
Initial packing options: 5196

Packing option 0:  [8, 8, 16, 16, 16, 32, 32, 32]
MAU containers after:
  8-bit: 47
  16-bit: 78
  32-bit: 48
+------------------------------+
|  ipv4.version [3:0]          |
|  ipv4.ihl [3:0]              |
+------------------------------+
|  ipv4.diffserv [7:0]         |
+------------------------------+
|  ipv4.totalLen [15:0]        |
+------------------------------+
|  ipv4.identification [15:0]  |
+------------------------------+
|  ipv4.flags [2:0]            |
|  ipv4.fragOffset [12:0]      |
+------------------------------+
|  ipv4.ttl [7:0]              |
|  ipv4.protocol [7:0]         |
|  ipv4.hdrChecksum [15:0]     |
+------------------------------+
|  ipv4.srcAddr [31:0]         |
+------------------------------+
|  ipv4.dstAddr [31:0]         |
+------------------------------+

Looking at ipv4.version (egress) [3:0], with test_alloc = True
----> ipv4.version (egress) is allocated? False
Looking at ipv4.ihl (egress) [3:0], with test_alloc = True
***Allocating phv296[7:4] for ipv4.version[3:0]
***Allocating phv296[3:0] for ipv4.ihl[3:0]
Looking at ipv4.diffserv (egress) [7:0], with test_alloc = True
----> ipv4.diffserv (egress) is allocated? False
***Allocating phv297[7:0] for ipv4.diffserv[7:0]
Looking at ipv4.totalLen (egress) [15:0], with test_alloc = True
----> ipv4.totalLen (egress) is allocated? False
***Allocating phv332[15:0] for ipv4.totalLen[15:0]
Looking at ipv4.identification (egress) [15:0], with test_alloc = True
----> ipv4.identification (egress) is allocated? False
***Allocating phv333[15:0] for ipv4.identification[15:0]
Looking at ipv4.flags (egress) [2:0], with test_alloc = True
----> ipv4.flags (egress) is allocated? False
Looking at ipv4.fragOffset (egress) [12:0], with test_alloc = True
***Allocating phv334[15:13] for ipv4.flags[2:0]
***Allocating phv334[12:0] for ipv4.fragOffset[12:0]
Looking at ipv4.ttl (egress) [7:0], with test_alloc = True
----> ipv4.ttl (egress) is allocated? False
Looking at ipv4.protocol (egress) [7:0], with test_alloc = True
Looking at ipv4.hdrChecksum (egress) [15:0], with test_alloc = True
***Allocating phv264[31:24] for ipv4.ttl[7:0]
***Allocating phv264[23:16] for ipv4.protocol[7:0]
***Allocating phv264[15:0] for ipv4.hdrChecksum[15:0]
Looking at ipv4.srcAddr (egress) [31:0], with test_alloc = True
----> ipv4.srcAddr (egress) is allocated? False
***Allocating phv265[31:0] for ipv4.srcAddr[31:0]
Looking at ipv4.dstAddr (egress) [31:0], with test_alloc = True
----> ipv4.dstAddr (egress) is allocated? False
***Allocating phv266[31:0] for ipv4.dstAddr[31:0]
Packing options tried: 1
Packing options skipped: 0

Working on parse node parse_tcp (7) (egress)

-------------------------------------------
Allocating parsed header: pkt fields (11) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 160
Set metadata bits: 0
Gress: egress
bits_will_need_to_parse = 160
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 160
Parse state 0 (160 bits)
  tcp.srcPort [15:0]
  tcp.dstPort [15:0]
  tcp.seqNo [31:0]
  tcp.ackNo [31:0]
  tcp.dataOffset [3:0]
  tcp.res [2:0]
  tcp.ecn [2:0]
  tcp.ctrl [5:0]
  tcp.window [15:0]
  tcp.checksum [15:0]
  tcp.urgentPtr [15:0]
-------------------------------------------------------------------------------------
|      Name      | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-------------------------------------------------------------------------------------
|  tcp.srcPort   | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
|  tcp.dstPort   | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
|   tcp.seqNo    | 32 |    True   |  -  |  -   |     -     |    4     |     1      |
|   tcp.ackNo    | 32 |    True   |  -  |  -   |     -     |    4     |     1      |
| tcp.dataOffset | 4  |    True   |  -  |  -   |     -     |    1     |     1      |
|    tcp.res     | 3  |    True   |  -  |  -   |     -     |    1     |     1      |
|    tcp.ecn     | 3  |    True   |  -  |  -   |     -     |    2     |     1      |
|    tcp.ctrl    | 6  |    True   |  -  |  -   |     -     |    1     |     1      |
|   tcp.window   | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
|  tcp.checksum  | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
| tcp.urgentPtr  | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
-------------------------------------------------------------------------------------

min_extracts[8] = 1
min_extracts[16] = 1
min_extracts[32] = 1
Packing options: 5196
MAU containers available:
  8-bit: 47
  16-bit: 78
  32-bit: 48
Tagalong containers available:
  8-bit: 22
  16-bit: 33
  32-bit: 21
Initial packing options: 5196

Packing option 0:  [8, 8, 16, 16, 16, 32, 32, 32]
MAU containers after:
  8-bit: 47
  16-bit: 78
  32-bit: 48
+-------------------------+
|  tcp.srcPort [15:8]     |
+-------------------------+
|  tcp.srcPort [7:0]      |
+-------------------------+
|  tcp.dstPort [15:0]     |
+-------------------------+
|  tcp.seqNo [31:16]      |
+-------------------------+
|  tcp.seqNo [15:0]       |
+-------------------------+
|  tcp.ackNo [31:0]       |
+-------------------------+
|  tcp.dataOffset [3:0]   |
|  tcp.res [2:0]          |
|  tcp.ecn [2:0]          |
|  tcp.ctrl [5:0]         |
|  tcp.window [15:0]      |
+-------------------------+
|  tcp.checksum [15:0]    |
|  tcp.urgentPtr [15:0]   |
+-------------------------+

Looking at tcp.srcPort (egress) [15:8], with test_alloc = True
----> tcp.srcPort (egress) is allocated? False
***Allocating phv298[7:0] for tcp.srcPort[15:8]
Looking at tcp.srcPort (egress) [7:0], with test_alloc = True
----> tcp.srcPort (egress) is allocated? False
***Allocating phv299[7:0] for tcp.srcPort[7:0]
Looking at tcp.dstPort (egress) [15:0], with test_alloc = True
----> tcp.dstPort (egress) is allocated? False
***Allocating phv335[15:0] for tcp.dstPort[15:0]
Looking at tcp.seqNo (egress) [31:16], with test_alloc = True
----> tcp.seqNo (egress) is allocated? False
***Allocating phv336[15:0] for tcp.seqNo[31:16]
Looking at tcp.seqNo (egress) [15:0], with test_alloc = True
----> tcp.seqNo (egress) is allocated? False
***Allocating phv337[15:0] for tcp.seqNo[15:0]
Looking at tcp.ackNo (egress) [31:0], with test_alloc = True
----> tcp.ackNo (egress) is allocated? False
***Allocating phv267[31:0] for tcp.ackNo[31:0]
Looking at tcp.dataOffset (egress) [3:0], with test_alloc = True
----> tcp.dataOffset (egress) is allocated? False
Looking at tcp.res (egress) [2:0], with test_alloc = True
Looking at tcp.ecn (egress) [2:0], with test_alloc = True
Looking at tcp.ctrl (egress) [5:0], with test_alloc = True
Looking at tcp.window (egress) [15:0], with test_alloc = True
***Allocating phv268[31:28] for tcp.dataOffset[3:0]
***Allocating phv268[27:25] for tcp.res[2:0]
***Allocating phv268[24:22] for tcp.ecn[2:0]
***Allocating phv268[21:16] for tcp.ctrl[5:0]
***Allocating phv268[15:0] for tcp.window[15:0]
Looking at tcp.checksum (egress) [15:0], with test_alloc = True
----> tcp.checksum (egress) is allocated? False
Looking at tcp.urgentPtr (egress) [15:0], with test_alloc = True
***Allocating phv269[31:16] for tcp.checksum[15:0]
***Allocating phv269[15:0] for tcp.urgentPtr[15:0]
Packing options tried: 1
Packing options skipped: 0

Working on parse node parse_ethernet (5) (ingress)

-------------------------------------------
Allocating parsed header: pkt fields (3) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 112
Set metadata bits: 0
Gress: ingress
bits_will_need_to_parse = 112
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 112
Parse state 0 (112 bits)
  ethernet.dstAddr [47:0]
  ethernet.srcAddr [47:0]
  ethernet.etherType [15:0]
-----------------------------------------------------------------------------------------
|        Name        | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-----------------------------------------------------------------------------------------
|  ethernet.dstAddr  | 48 |   False   |  -  |  -   |     -     |    6     |     1      |
|  ethernet.srcAddr  | 48 |   False   |  -  |  -   |     -     |    6     |     1      |
| ethernet.etherType | 16 |   False   |  -  |  -   |     -     |    2     |     1      |
-----------------------------------------------------------------------------------------

min_extracts[8] = 1
min_extracts[16] = 1
min_extracts[32] = 1
Packing options: 604
MAU containers available:
  8-bit: 47
  16-bit: 77
  32-bit: 47
Tagalong containers available:
  8-bit: 20
  16-bit: 30
  32-bit: 18
Initial packing options: 604

Packing option 0:  [8, 32, 16, 8, 32, 16]
MAU containers after:
  8-bit: 45
  16-bit: 75
  32-bit: 45
+-----------------------------+
|  ethernet.dstAddr [47:40]   |
+-----------------------------+
|  ethernet.dstAddr [39:8]    |
+-----------------------------+
|  ethernet.dstAddr [7:0]     |
|  ethernet.srcAddr [47:40]   |
+-----------------------------+
|  ethernet.srcAddr [39:32]   |
+-----------------------------+
|  ethernet.srcAddr [31:0]    |
+-----------------------------+
|  ethernet.etherType [15:0]  |
+-----------------------------+

Looking at ethernet.dstAddr (ingress) [47:40], with test_alloc = True
----> ethernet.dstAddr (ingress) is allocated? False

MAU groups: 3
  Group 4 8 bits -- avail 15 -- ingress avail 15 and remain 14 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv65
  Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
  Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
***Allocating phv65[7:0] for ethernet.dstAddr[47:40]
Looking at ethernet.dstAddr (ingress) [39:8], with test_alloc = True
----> ethernet.dstAddr (ingress) is allocated? False

MAU groups: 3
  Group 0 32 bits -- avail 15 -- ingress avail 15 and remain 14 and promised 1 and req 1 -- egress avail 12 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv1
  Group 2 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv32
  Group 3 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv48
***Allocating phv1[31:0] for ethernet.dstAddr[39:8]
Looking at ethernet.dstAddr (ingress) [7:0], with test_alloc = True
----> ethernet.dstAddr (ingress) is allocated? False
Looking at ethernet.srcAddr (ingress) [47:40], with test_alloc = True

MAU groups: 5
  Group 8 16 bits -- avail 14 -- ingress avail 14 and remain 12 and promised 2 and req 2 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv131
  Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv160
  Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv176
  Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv192
  Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
***Allocating phv131[15:8] for ethernet.dstAddr[7:0]
***Allocating phv131[7:0] for ethernet.srcAddr[47:40]
Looking at ethernet.srcAddr (ingress) [39:32], with test_alloc = True
----> ethernet.srcAddr (ingress) is allocated? False

MAU groups: 3
  Group 4 8 bits -- avail 14 -- ingress avail 14 and remain 13 and promised 1 and req 1 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv66
  Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv96
  Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv112
***Allocating phv66[7:0] for ethernet.srcAddr[39:32]
Looking at ethernet.srcAddr (ingress) [31:0], with test_alloc = True
----> ethernet.srcAddr (ingress) is allocated? False

MAU groups: 3
  Group 0 32 bits -- avail 14 -- ingress avail 14 and remain 13 and promised 1 and req 1 -- egress avail 12 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv2
  Group 2 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv32
  Group 3 32 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 12 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv48
***Allocating phv2[31:0] for ethernet.srcAddr[31:0]
Looking at ethernet.etherType (ingress) [15:0], with test_alloc = True
----> ethernet.etherType (ingress) is allocated? False

MAU groups: 5
  Group 8 16 bits -- avail 13 -- ingress avail 13 and remain 11 and promised 2 and req 2 -- egress avail 8 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv132
  Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv160
  Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv176
  Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv192
  Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 15 and promised 1 and req 1 -- egress avail 16 and remain 8 and promised 0 and req 0 -- as if deparsed True -- container_to_use phv208
***Allocating phv132[15:0] for ethernet.etherType[15:0]
Packing options tried: 1
Packing options skipped: 0

Working on parse node parse_ethernet (5) (egress)

-------------------------------------------
Allocating parsed header: pkt fields (3) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 112
Set metadata bits: 0
Gress: egress
bits_will_need_to_parse = 112
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 112
Parse state 0 (112 bits)
  ethernet.dstAddr [47:0]
  ethernet.srcAddr [47:0]
  ethernet.etherType [15:0]
-----------------------------------------------------------------------------------------
|        Name        | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-----------------------------------------------------------------------------------------
|  ethernet.dstAddr  | 48 |    True   |  -  |  -   |     -     |    6     |     1      |
|  ethernet.srcAddr  | 48 |    True   |  -  |  -   |     -     |    6     |     1      |
| ethernet.etherType | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
-----------------------------------------------------------------------------------------

min_extracts[8] = 1
min_extracts[16] = 1
min_extracts[32] = 1
Packing options: 604
MAU containers available:
  8-bit: 47
  16-bit: 78
  32-bit: 48
Tagalong containers available:
  8-bit: 20
  16-bit: 30
  32-bit: 18
Initial packing options: 604

Packing option 0:  [8, 32, 16, 8, 32, 16]
MAU containers after:
  8-bit: 47
  16-bit: 78
  32-bit: 48
+-----------------------------+
|  ethernet.dstAddr [47:40]   |
+-----------------------------+
|  ethernet.dstAddr [39:8]    |
+-----------------------------+
|  ethernet.dstAddr [7:0]     |
|  ethernet.srcAddr [47:40]   |
+-----------------------------+
|  ethernet.srcAddr [39:32]   |
+-----------------------------+
|  ethernet.srcAddr [31:0]    |
+-----------------------------+
|  ethernet.etherType [15:0]  |
+-----------------------------+

Looking at ethernet.dstAddr (egress) [47:40], with test_alloc = True
----> ethernet.dstAddr (egress) is allocated? False
***Allocating phv300[7:0] for ethernet.dstAddr[47:40]
Looking at ethernet.dstAddr (egress) [39:8], with test_alloc = True
----> ethernet.dstAddr (egress) is allocated? False
***Allocating phv270[31:0] for ethernet.dstAddr[39:8]
Looking at ethernet.dstAddr (egress) [7:0], with test_alloc = True
----> ethernet.dstAddr (egress) is allocated? False
Looking at ethernet.srcAddr (egress) [47:40], with test_alloc = True
***Allocating phv338[15:8] for ethernet.dstAddr[7:0]
***Allocating phv338[7:0] for ethernet.srcAddr[47:40]
Looking at ethernet.srcAddr (egress) [39:32], with test_alloc = True
----> ethernet.srcAddr (egress) is allocated? False
***Allocating phv301[7:0] for ethernet.srcAddr[39:32]
Looking at ethernet.srcAddr (egress) [31:0], with test_alloc = True
----> ethernet.srcAddr (egress) is allocated? False
***Allocating phv271[31:0] for ethernet.srcAddr[31:0]
Looking at ethernet.etherType (egress) [15:0], with test_alloc = True
----> ethernet.etherType (egress) is allocated? False
***Allocating phv339[15:0] for ethernet.etherType[15:0]
Packing options tried: 1
Packing options skipped: 0

Working on parse node egress_intrinsic_metadata (9) (egress)

-------------------------------------------
Allocating parsed header: pkt fields (4) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 24
Set metadata bits: 0
Gress: egress
bits_will_need_to_parse = 24
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 24
Parse state 0 (24 bits)
  eg_intr_md._pad0 [6:0]
  eg_intr_md.egress_port [8:0]
  eg_intr_md._pad7 [4:0]
  eg_intr_md.egress_cos [2:0]
---------------------------------------------------------------------------------------------
|          Name          | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
---------------------------------------------------------------------------------------------
|    eg_intr_md._pad0    | 7  |   False   |  -  |  -   |     -     |    1     |     1      |
| eg_intr_md.egress_port | 9  |   False   |  -  |  -   |    [8]    |    1     |     1      |
|    eg_intr_md._pad7    | 5  |   False   |  -  |  -   |     -     |    1     |     1      |
| eg_intr_md.egress_cos  | 3  |   False   |  -  |  -   |     -     |    1     |     1      |
---------------------------------------------------------------------------------------------

min_extracts[8] = 1
min_extracts[16] = 1
min_extracts[32] = 1
Packing options: 3
MAU containers available:
  8-bit: 47
  16-bit: 78
  32-bit: 48
Tagalong containers available:
  8-bit: 18
  16-bit: 28
  32-bit: 16
Initial packing options: 3

Packing option 1:  [16, 8]
MAU containers after:
  8-bit: 46
  16-bit: 77
  32-bit: 48
+---------------------------------+
|  eg_intr_md._pad0 [6:0]         |
|  eg_intr_md.egress_port [8:0]   |
+---------------------------------+
|  eg_intr_md._pad7 [4:0]         |
|  eg_intr_md.egress_cos [2:0]    |
+---------------------------------+

Looking at eg_intr_md._pad0 (egress) [6:0], with test_alloc = True
----> eg_intr_md._pad0 (egress) is allocated? False
Looking at eg_intr_md.egress_port (egress) [8:0], with test_alloc = True
Checking if can overlay metadata field.
No required PHV group.
  Group 9 16 bits -- deparsed True -- avail 15 and promised 2 -- ingress promised 0 and remain 0 and req 8 -- egress promised 2 and remain 13 and req 2 -- act like deparsed True -- container_to_use phv146 -- fails False
Could not find container to overlay in.

MAU groups: 5
  Group 9 16 bits -- avail 15 -- ingress avail 8 and remain 8 and promised 0 and req 0 -- egress avail 15 and remain 13 and promised 2 and req 2 -- as if deparsed True -- container_to_use phv146
  Group 10 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv160
  Group 11 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv176
  Group 12 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv192
  Group 13 16 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv208
***Allocating phv146[15:9] for eg_intr_md._pad0[6:0]
***Allocating phv146[8:0] for eg_intr_md.egress_port[8:0]
Looking at eg_intr_md._pad7 (egress) [4:0], with test_alloc = True
----> eg_intr_md._pad7 (egress) is allocated? False
Looking at eg_intr_md.egress_cos (egress) [2:0], with test_alloc = True
Checking if can overlay metadata field.
No required PHV group.
  Group 5 8 bits -- deparsed True -- avail 15 and promised 1 -- ingress promised 0 and remain 0 and req 8 -- egress promised 1 and remain 14 and req 1 -- act like deparsed True -- container_to_use phv81 -- fails False
Could not find container to overlay in.

MAU groups: 3
  Group 5 8 bits -- avail 15 -- ingress avail 8 and remain 8 and promised 0 and req 0 -- egress avail 15 and remain 14 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv81
  Group 6 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv96
  Group 7 8 bits -- avail 16 -- ingress avail 16 and remain 8 and promised 0 and req 0 -- egress avail 16 and remain 15 and promised 1 and req 1 -- as if deparsed True -- container_to_use phv112
***Allocating phv81[7:3] for eg_intr_md._pad7[4:0]
***Allocating phv81[2:0] for eg_intr_md.egress_cos[2:0]
Packing options tried: 2
Packing options skipped: 0
Failure Reasons:
  Field in disallowed list (case 3) -- tried 1 variants
    field: eg_intr_md.egress_port
    with constraints: [
      ParsedAlignment Constraint: eg_intr_md.egress_cos <3 bits egress parsed imeta> -- lsb bit: 0
      MaxFieldSplit Constraint: eg_intr_md.egress_cos <3 bits egress parsed imeta> -- max split: 1
      RightAdjacentAlignment Constraint: (left) eg_intr_md._pad7 <5 bits egress parsed imeta>  -- (right) eg_intr_md.egress_cos <3 bits egress parsed imeta>
      ContainerAlignment Constraint: eg_intr_md.egress_cos <3 bits egress parsed imeta> -- field_bit: 0 -- bits_list: [0, 1, 2, 3, 4, 5, 6, 7]
]

Working on parse node ingress_intrinsic_metadata (9) (ingress)

-------------------------------------------
Allocating parsed header: pkt fields (5) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 16
Set metadata bits: 0
Gress: ingress
bits_will_need_to_parse = 16
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 16
Already allocated? ig_intr_md.resubmit_flag (ingress)
Already allocated? ig_intr_md._pad1 (ingress)
Already allocated? ig_intr_md._pad2 (ingress)
Already allocated? ig_intr_md._pad3 (ingress)
Already allocated? ig_intr_md.ingress_port (ingress)
Already allocated? ig_intr_md.ingress_port (ingress)
Parse state 0 (16 bits)
  ig_intr_md.resubmit_flag [0:0]
  ig_intr_md._pad1 [0:0]
  ig_intr_md._pad2 [1:0]
  ig_intr_md._pad3 [2:0]
  ig_intr_md.ingress_port [8:0]
-----------------------------------------------------------------------------------------------------
|           Name           | BW | Tagalong? |    Req    | Pref | Not Allow | MaxSplit | Group Size |
-----------------------------------------------------------------------------------------------------
| ig_intr_md.resubmit_flag | 1  |   False   | [(16, 1)] |  -   |     -     |    1     |     1      |
|     ig_intr_md._pad1     | 1  |   False   | [(16, 1)] |  -   |     -     |    1     |     1      |
|     ig_intr_md._pad2     | 2  |   False   | [(16, 2)] |  -   |     -     |    1     |     1      |
|     ig_intr_md._pad3     | 3  |   False   | [(16, 3)] |  -   |     -     |    1     |     1      |
| ig_intr_md.ingress_port  | 9  |   False   | [(16, 9)] |  -   |     -     |    2     |     1      |
-----------------------------------------------------------------------------------------------------

min_extracts[8] = 1
min_extracts[16] = 6
min_extracts[32] = 1
Packing options: 2
MAU containers available:
  8-bit: 45
  16-bit: 75
  32-bit: 45
Tagalong containers available:
  8-bit: 20
  16-bit: 30
  32-bit: 18
Initial packing options: 2

Packing option 0:  [16]
MAU containers after:
  8-bit: 45
  16-bit: 75
  32-bit: 45
+-----------------------------------+
|  ig_intr_md.resubmit_flag [0:0]   |
|  ig_intr_md._pad1 [0:0]           |
|  ig_intr_md._pad2 [1:0]           |
|  ig_intr_md._pad3 [2:0]           |
|  ig_intr_md.ingress_port [8:0]    |
+-----------------------------------+

Looking at ig_intr_md.resubmit_flag (ingress) [0:0], with test_alloc = True
----> ig_intr_md.resubmit_flag (ingress) is allocated? True
Looking at ig_intr_md._pad1 (ingress) [0:0], with test_alloc = True
----> ig_intr_md._pad1 (ingress) is allocated? True
Looking at ig_intr_md._pad2 (ingress) [1:0], with test_alloc = True
----> ig_intr_md._pad2 (ingress) is allocated? True
Looking at ig_intr_md._pad3 (ingress) [2:0], with test_alloc = True
----> ig_intr_md._pad3 (ingress) is allocated? True
Looking at ig_intr_md.ingress_port (ingress) [8:0], with test_alloc = True
----> ig_intr_md.ingress_port (ingress) is allocated? True
Fields for container 16 at index 0 already allocated.  No need to overlay or allocate new.
  ig_intr_md.resubmit_flag[0:0]
  ig_intr_md._pad1[0:0]
  ig_intr_md._pad2[1:0]
  ig_intr_md._pad3[2:0]
  ig_intr_md.ingress_port[8:0]
Packing options tried: 1
Packing options skipped: 0

Working on parse node parse_pkt_out (4) (egress)

-------------------------------------------
Allocating parsed header: pkt fields (2) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 16
Set metadata bits: 0
Gress: egress
bits_will_need_to_parse = 16
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 16
Parse state 0 (16 bits)
  packet_out_hdr.egress_port [8:0]
  packet_out_hdr._padding [6:0]
-------------------------------------------------------------------------------------------------
|            Name            | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-------------------------------------------------------------------------------------------------
| packet_out_hdr.egress_port | 9  |    True   |  -  |  -   |    [32]   |    2     |     1      |
|  packet_out_hdr._padding   | 7  |    True   |  -  |  -   |    [32]   |    1     |     1      |
-------------------------------------------------------------------------------------------------

min_extracts[8] = 1
min_extracts[16] = 1
min_extracts[32] = 1
Packing options: 2
MAU containers available:
  8-bit: 46
  16-bit: 77
  32-bit: 48
Tagalong containers available:
  8-bit: 18
  16-bit: 28
  32-bit: 16
Initial packing options: 2

Packing option 0:  [16]
MAU containers after:
  8-bit: 46
  16-bit: 77
  32-bit: 48
+-------------------------------------+
|  packet_out_hdr.egress_port [8:0]   |
|  packet_out_hdr._padding [6:0]      |
+-------------------------------------+

Looking at packet_out_hdr.egress_port (egress) [8:0], with test_alloc = True
----> packet_out_hdr.egress_port (egress) is allocated? False
Looking at packet_out_hdr._padding (egress) [6:0], with test_alloc = True
***Allocating phv340[15:7] for packet_out_hdr.egress_port[8:0]
***Allocating phv340[6:0] for packet_out_hdr._padding[6:0]
Packing options tried: 1
Packing options skipped: 0

Working on parse node start (1) ()
Working on parse node default_parser (3) ()
Working on parse node --ingress-- (0) ()
Working on parse node start (1) ()
Working on parse node default_parser (3) ()
Working on parse node egress_for_mirror_buffer (10) ()
Working on parse node --egress-- (0) ()

After allocating critical parse paths:
Allocation state: Final Allocation
------------------------------------------------------------------------------
|       PHV Group        | Containers Used |   Bits Used   | Bits Available |
| (container bit widths) |     (% used)    |    (% used)   |                |
------------------------------------------------------------------------------
|         0 (32)         |    3 (18.75%)   |  96 (18.75%)  |      512       |
|         1 (32)         |    0 (0.00%)    |   0 (0.00%)   |      512       |
|         2 (32)         |    0 (0.00%)    |   0 (0.00%)   |      512       |
|         3 (32)         |    0 (0.00%)    |   0 (0.00%)   |      512       |
|    Total for 32 bit    |    3 (4.69%)    |   96 (4.69%)  |      2048      |
|                        |                 |               |                |
|         4 (8)          |    3 (18.75%)   |  24 (18.75%)  |      128       |
|         5 (8)          |    2 (12.50%)   |  16 (12.50%)  |      128       |
|         6 (8)          |    0 (0.00%)    |   0 (0.00%)   |      128       |
|         7 (8)          |    0 (0.00%)    |   0 (0.00%)   |      128       |
|    Total for 8 bit     |    5 (7.81%)    |   40 (7.81%)  |      512       |
|                        |                 |               |                |
|         8 (16)         |    4 (25.00%)   |  64 (25.00%)  |      256       |
|         9 (16)         |    2 (12.50%)   |  32 (12.50%)  |      256       |
|        10 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|        11 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|        12 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|        13 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|    Total for 16 bit    |    6 (6.25%)    |   96 (6.25%)  |      1536      |
|                        |                 |               |                |
|       14 (32) T        |   14 (87.50%)   |  448 (87.50%) |      512       |
|       15 (32) T        |    0 (0.00%)    |   0 (0.00%)   |      512       |
|    Total for 32 bit    |   14 (43.75%)   |  448 (43.75%) |      1024      |
|                        |                 |               |                |
|        16 (8) T        |   10 (62.50%)   |  80 (62.50%)  |      128       |
|        17 (8) T        |    0 (0.00%)    |   0 (0.00%)   |      128       |
|    Total for 8 bit     |   10 (31.25%)   |  80 (31.25%)  |      256       |
|                        |                 |               |                |
|       18 (16) T        |   10 (62.50%)   |  160 (62.50%) |      256       |
|       19 (16) T        |    5 (31.25%)   |  80 (31.25%)  |      256       |
|       20 (16) T        |    0 (0.00%)    |   0 (0.00%)   |      256       |
|    Total for 16 bit    |   15 (31.25%)   |  240 (31.25%) |      768       |
|                        |                 |               |                |
|       MAU total        |    14 (6.25%)   |  232 (5.66%)  |      4096      |
|     Tagalong total     |   39 (34.82%)   |  768 (37.50%) |      2048      |
|     Overall total      |   53 (15.77%)   | 1000 (16.28%) |      6144      |
------------------------------------------------------------------------------

>>Event 'pa_overlay' at time 1504792579.77
   Took 8.93 seconds

-----------------------------------------------
  Allocating remaining parsed fields
-----------------------------------------------
Allocation Step

All Sorted parse nodes (non-critical):
  parse_pkt_in (egress) with bits = 16 and max = 2
  parse_udp (ingress) with bits = 64 and max = 1
  parse_udp (egress) with bits = 64 and max = 1
  parse_pkt_in (ingress) with bits = 16 and max = 1
Total packet bits: 160
Total meta bits: 0
Total bits: 160
Working on parse node parse_pkt_in (2) (egress)

-------------------------------------------
Overlaying parsed header: pkt fields (2) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 16
Set metadata bits: 0
Gress: egress
bits_will_need_to_parse = 16
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 16
Parse state 0 (16 bits)
  packet_in_hdr.ingress_port [8:0]
  packet_in_hdr._padding [6:0]
-------------------------------------------------------------------------------------------------------
|            Name            | BW | Tagalong? |    Req    | Pref | Not Allow | MaxSplit | Group Size |
-------------------------------------------------------------------------------------------------------
| packet_in_hdr.ingress_port | 9  |   False   | [(16, 9)] |  -   |    [32]   |    2     |     2      |
|   packet_in_hdr._padding   | 7  |    True   |     -     |  -   |    [32]   |    1     |     1      |
-------------------------------------------------------------------------------------------------------

MAU containers available:
  8-bit: 46
  16-bit: 77
  32-bit: 48
Packing options: 2
Initial packing options: 2

Packing option 0:  [16]
>>Can pack using [16] if open up 1 new containers.
Packing options tried: 2
Packing options skipped: 0
Trying to place using best packing [16]
***Allocating phv145[15:7] for packet_in_hdr.ingress_port[8:0]
***Allocating phv145[6:0] for packet_in_hdr._padding[6:0]
Working on parse node parse_udp (8) (ingress)

-------------------------------------------
Overlaying parsed header: pkt fields (4) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 64
Set metadata bits: 0
Gress: ingress
bits_will_need_to_parse = 64
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 64
Parse state 0 (64 bits)
  udp.srcPort [15:0]
  udp.dstPort [15:0]
  udp.length_ [15:0]
  udp.checksum [15:0]
-----------------------------------------------------------------------------------
|     Name     | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-----------------------------------------------------------------------------------
| udp.srcPort  | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
| udp.dstPort  | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
| udp.length_  | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
| udp.checksum | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
-----------------------------------------------------------------------------------

MAU containers available:
  8-bit: 45
  16-bit: 75
  32-bit: 45
Packing options: 47
Initial packing options: 47

Packing option 0:  [8, 8, 16, 32]
>>Can pack using [8, 8, 16, 32] if open up 0 new containers.
Packing options tried: 1
Packing options skipped: 0
Trying to place using best packing [8, 8, 16, 32]
***Allocating phv290[7:0] for udp.srcPort[15:8]
***Allocating phv291[7:0] for udp.srcPort[7:0]
***Allocating phv323[15:0] for udp.dstPort[15:0]
***Allocating phv259[31:16] for udp.length_[15:0]
***Allocating phv259[15:0] for udp.checksum[15:0]
Working on parse node parse_udp (8) (egress)

-------------------------------------------
Overlaying parsed header: pkt fields (4) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 64
Set metadata bits: 0
Gress: egress
bits_will_need_to_parse = 64
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 64
Parse state 0 (64 bits)
  udp.srcPort [15:0]
  udp.dstPort [15:0]
  udp.length_ [15:0]
  udp.checksum [15:0]
-----------------------------------------------------------------------------------
|     Name     | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-----------------------------------------------------------------------------------
| udp.srcPort  | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
| udp.dstPort  | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
| udp.length_  | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
| udp.checksum | 16 |    True   |  -  |  -   |     -     |    2     |     1      |
-----------------------------------------------------------------------------------

MAU containers available:
  8-bit: 46
  16-bit: 77
  32-bit: 48
Packing options: 47
Initial packing options: 47

Packing option 0:  [8, 8, 16, 32]
>>Can pack using [8, 8, 16, 32] if open up 0 new containers.
Packing options tried: 1
Packing options skipped: 0
Trying to place using best packing [8, 8, 16, 32]
***Allocating phv298[7:0] for udp.srcPort[15:8]
***Allocating phv299[7:0] for udp.srcPort[7:0]
***Allocating phv336[15:0] for udp.dstPort[15:0]
***Allocating phv267[31:16] for udp.length_[15:0]
***Allocating phv267[15:0] for udp.checksum[15:0]
Working on parse node parse_pkt_in (2) (ingress)

-------------------------------------------
Overlaying parsed header: pkt fields (2) / meta fields (0) using extraction bandwidth 224
-------------------------------------------
Extracted bits: 16
Set metadata bits: 0
Gress: ingress
bits_will_need_to_parse = 16
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 16
Parse state 0 (16 bits)
  packet_in_hdr.ingress_port [8:0]
  packet_in_hdr._padding [6:0]
-------------------------------------------------------------------------------------------------
|            Name            | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-------------------------------------------------------------------------------------------------
| packet_in_hdr.ingress_port | 9  |    True   |  -  |  -   |    [32]   |    2     |     1      |
|   packet_in_hdr._padding   | 7  |    True   |  -  |  -   |    [32]   |    1     |     1      |
-------------------------------------------------------------------------------------------------

MAU containers available:
  8-bit: 45
  16-bit: 75
  32-bit: 45
Packing options: 2
Initial packing options: 2

Packing option 0:  [16]
>>Can pack using [16] if open up 0 new containers.
Packing options tried: 1
Packing options skipped: 0
Trying to place using best packing [16]
***Allocating phv129[15:7] for packet_in_hdr.ingress_port[8:0]
***Allocating phv129[6:0] for packet_in_hdr._padding[6:0]

After allocating remaining parse nodes:
Allocation state: Final Allocation
------------------------------------------------------------------------------
|       PHV Group        | Containers Used |   Bits Used   | Bits Available |
| (container bit widths) |     (% used)    |    (% used)   |                |
------------------------------------------------------------------------------
|         0 (32)         |    3 (18.75%)   |  96 (18.75%)  |      512       |
|         1 (32)         |    0 (0.00%)    |   0 (0.00%)   |      512       |
|         2 (32)         |    0 (0.00%)    |   0 (0.00%)   |      512       |
|         3 (32)         |    0 (0.00%)    |   0 (0.00%)   |      512       |
|    Total for 32 bit    |    3 (4.69%)    |   96 (4.69%)  |      2048      |
|                        |                 |               |                |
|         4 (8)          |    3 (18.75%)   |  24 (18.75%)  |      128       |
|         5 (8)          |    2 (12.50%)   |  16 (12.50%)  |      128       |
|         6 (8)          |    0 (0.00%)    |   0 (0.00%)   |      128       |
|         7 (8)          |    0 (0.00%)    |   0 (0.00%)   |      128       |
|    Total for 8 bit     |    5 (7.81%)    |   40 (7.81%)  |      512       |
|                        |                 |               |                |
|         8 (16)         |    4 (25.00%)   |  64 (25.00%)  |      256       |
|         9 (16)         |    3 (18.75%)   |  48 (18.75%)  |      256       |
|        10 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|        11 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|        12 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|        13 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|    Total for 16 bit    |    7 (7.29%)    |  112 (7.29%)  |      1536      |
|                        |                 |               |                |
|       14 (32) T        |   14 (87.50%)   |  448 (87.50%) |      512       |
|       15 (32) T        |    0 (0.00%)    |   0 (0.00%)   |      512       |
|    Total for 32 bit    |   14 (43.75%)   |  448 (43.75%) |      1024      |
|                        |                 |               |                |
|        16 (8) T        |   10 (62.50%)   |  80 (62.50%)  |      128       |
|        17 (8) T        |    0 (0.00%)    |   0 (0.00%)   |      128       |
|    Total for 8 bit     |   10 (31.25%)   |  80 (31.25%)  |      256       |
|                        |                 |               |                |
|       18 (16) T        |   10 (62.50%)   |  160 (62.50%) |      256       |
|       19 (16) T        |    5 (31.25%)   |  80 (31.25%)  |      256       |
|       20 (16) T        |    0 (0.00%)    |   0 (0.00%)   |      256       |
|    Total for 16 bit    |   15 (31.25%)   |  240 (31.25%) |      768       |
|                        |                 |               |                |
|       MAU total        |    15 (6.70%)   |  248 (6.05%)  |      4096      |
|     Tagalong total     |   39 (34.82%)   |  768 (37.50%) |      2048      |
|     Overall total      |   54 (16.07%)   | 1016 (16.54%) |      6144      |
------------------------------------------------------------------------------


Difference in allocation between critical parse path and overlaying headers:
Allocation state: Diff
---------------------------------------------------------------------------
|       PHV Group        | Containers Used | Bits Used  | Bits Available |
| (container bit widths) |     (% used)    |  (% used)  |                |
---------------------------------------------------------------------------
|         0 (32)         |    0 (0.00%)    | 0 (0.00%)  |      512       |
|         1 (32)         |    0 (0.00%)    | 0 (0.00%)  |      512       |
|         2 (32)         |    0 (0.00%)    | 0 (0.00%)  |      512       |
|         3 (32)         |    0 (0.00%)    | 0 (0.00%)  |      512       |
|    Total for 32 bit    |    0 (0.00%)    | 0 (0.00%)  |      2048      |
|                        |                 |            |                |
|         4 (8)          |    0 (0.00%)    | 0 (0.00%)  |      128       |
|         5 (8)          |    0 (0.00%)    | 0 (0.00%)  |      128       |
|         6 (8)          |    0 (0.00%)    | 0 (0.00%)  |      128       |
|         7 (8)          |    0 (0.00%)    | 0 (0.00%)  |      128       |
|    Total for 8 bit     |    0 (0.00%)    | 0 (0.00%)  |      512       |
|                        |                 |            |                |
|         8 (16)         |    0 (0.00%)    | 0 (0.00%)  |      256       |
|         9 (16)         |    1 (6.25%)    | 16 (6.25%) |      256       |
|        10 (16)         |    0 (0.00%)    | 0 (0.00%)  |      256       |
|        11 (16)         |    0 (0.00%)    | 0 (0.00%)  |      256       |
|        12 (16)         |    0 (0.00%)    | 0 (0.00%)  |      256       |
|        13 (16)         |    0 (0.00%)    | 0 (0.00%)  |      256       |
|    Total for 16 bit    |    1 (1.04%)    | 16 (1.04%) |      1536      |
|                        |                 |            |                |
|       14 (32) T        |    0 (0.00%)    | 0 (0.00%)  |      512       |
|       15 (32) T        |    0 (0.00%)    | 0 (0.00%)  |      512       |
|    Total for 32 bit    |    0 (0.00%)    | 0 (0.00%)  |      1024      |
|                        |                 |            |                |
|        16 (8) T        |    0 (0.00%)    | 0 (0.00%)  |      128       |
|        17 (8) T        |    0 (0.00%)    | 0 (0.00%)  |      128       |
|    Total for 8 bit     |    0 (0.00%)    | 0 (0.00%)  |      256       |
|                        |                 |            |                |
|       18 (16) T        |    0 (0.00%)    | 0 (0.00%)  |      256       |
|       19 (16) T        |    0 (0.00%)    | 0 (0.00%)  |      256       |
|       20 (16) T        |    0 (0.00%)    | 0 (0.00%)  |      256       |
|    Total for 16 bit    |    0 (0.00%)    | 0 (0.00%)  |      768       |
|                        |                 |            |                |
|       MAU total        |    1 (0.45%)    | 16 (0.39%) |      4096      |
|     Tagalong total     |    0 (0.00%)    | 0 (0.00%)  |      2048      |
|     Overall total      |    1 (0.30%)    | 16 (0.26%) |      6144      |
---------------------------------------------------------------------------

>>Event 'pa_meta1' at time 1504792580.28
   Took 0.50 seconds

-----------------------------------------------
  Allocating metadata (pass 1)
-----------------------------------------------
Allocation Step
Total metadata field instances to allocate: 2  / 12 bits (12 ingress bits and 0 egress bits)
Promised metadata field instances to allocate: 1 / 9 bits (9 ingress bits and 0 egress bits)
     0: ig_intr_md_for_tm.ucast_egress_port (ingress) (highly=0, mau_group_size=2, max_overlay=0, max_share=0, max_split=1, bit_width=9, initial_usage_read=3, earliest_use=0, latest_use=12)

--------------
Working on:
ig_intr_md_for_tm.ucast_egress_port <9 bits ingress imeta R W>
bits_will_need_to_parse = 9
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 16
extracted_bits = 9 while meta_fi.bit_width = 9
Parse state 0 (9 bits)
  ig_intr_md_for_tm.ucast_egress_port [8:0]
----------------------------------------------------------------------------------------------------------------
|                 Name                | BW | Tagalong? |    Req    | Pref | Not Allow | MaxSplit | Group Size |
----------------------------------------------------------------------------------------------------------------
| ig_intr_md_for_tm.ucast_egress_port | 9  |   False   | [(16, 9)] |  -   |  [8, 32]  |    1     |     2      |
----------------------------------------------------------------------------------------------------------------

max_split = 1, adj = False
required_packing = [(16, 9)]
Packing options: 1
Valid packing options: 1

Attempting to overlay...
  [16]
  case 2: looking at allowed start bits [0]
    final start_bit = 0
  (1) msb_offset = 9
>> HEY!:  Adjusted msb_offset!
>>Can pack using [16] if open up 1 new containers.

Attempting to share...

  [16]
  (2a) msb_offset = 16
>>Can pack using [16] if open up 1 new containers.

>>Choose overlay option
  case 2: looking at allowed start bits [0]
    final start_bit = 0
  (1) msb_offset = 9
>> HEY!:  Adjusted msb_offset!
***Allocating phv130[8:0] for ig_intr_md_for_tm.ucast_egress_port[8:0]
Allocation state after promised meta allocated:
Allocation state: Final Allocation
------------------------------------------------------------------------------
|       PHV Group        | Containers Used |   Bits Used   | Bits Available |
| (container bit widths) |     (% used)    |    (% used)   |                |
------------------------------------------------------------------------------
|         0 (32)         |    3 (18.75%)   |  96 (18.75%)  |      512       |
|         1 (32)         |    0 (0.00%)    |   0 (0.00%)   |      512       |
|         2 (32)         |    0 (0.00%)    |   0 (0.00%)   |      512       |
|         3 (32)         |    0 (0.00%)    |   0 (0.00%)   |      512       |
|    Total for 32 bit    |    3 (4.69%)    |   96 (4.69%)  |      2048      |
|                        |                 |               |                |
|         4 (8)          |    3 (18.75%)   |  24 (18.75%)  |      128       |
|         5 (8)          |    2 (12.50%)   |  16 (12.50%)  |      128       |
|         6 (8)          |    0 (0.00%)    |   0 (0.00%)   |      128       |
|         7 (8)          |    0 (0.00%)    |   0 (0.00%)   |      128       |
|    Total for 8 bit     |    5 (7.81%)    |   40 (7.81%)  |      512       |
|                        |                 |               |                |
|         8 (16)         |    5 (31.25%)   |  73 (28.52%)  |      256       |
|         9 (16)         |    3 (18.75%)   |  48 (18.75%)  |      256       |
|        10 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|        11 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|        12 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|        13 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|    Total for 16 bit    |    8 (8.33%)    |  121 (7.88%)  |      1536      |
|                        |                 |               |                |
|       14 (32) T        |   14 (87.50%)   |  448 (87.50%) |      512       |
|       15 (32) T        |    0 (0.00%)    |   0 (0.00%)   |      512       |
|    Total for 32 bit    |   14 (43.75%)   |  448 (43.75%) |      1024      |
|                        |                 |               |                |
|        16 (8) T        |   10 (62.50%)   |  80 (62.50%)  |      128       |
|        17 (8) T        |    0 (0.00%)    |   0 (0.00%)   |      128       |
|    Total for 8 bit     |   10 (31.25%)   |  80 (31.25%)  |      256       |
|                        |                 |               |                |
|       18 (16) T        |   10 (62.50%)   |  160 (62.50%) |      256       |
|       19 (16) T        |    5 (31.25%)   |  80 (31.25%)  |      256       |
|       20 (16) T        |    0 (0.00%)    |   0 (0.00%)   |      256       |
|    Total for 16 bit    |   15 (31.25%)   |  240 (31.25%) |      768       |
|                        |                 |               |                |
|       MAU total        |    16 (7.14%)   |  257 (6.27%)  |      4096      |
|     Tagalong total     |   39 (34.82%)   |  768 (37.50%) |      2048      |
|     Overall total      |   55 (16.37%)   | 1025 (16.68%) |      6144      |
------------------------------------------------------------------------------

Allocation state difference after promised meta allocated:
Allocation state: Diff
--------------------------------------------------------------------------
|       PHV Group        | Containers Used | Bits Used | Bits Available |
| (container bit widths) |     (% used)    |  (% used) |                |
--------------------------------------------------------------------------
|         0 (32)         |    0 (0.00%)    | 0 (0.00%) |      512       |
|         1 (32)         |    0 (0.00%)    | 0 (0.00%) |      512       |
|         2 (32)         |    0 (0.00%)    | 0 (0.00%) |      512       |
|         3 (32)         |    0 (0.00%)    | 0 (0.00%) |      512       |
|    Total for 32 bit    |    0 (0.00%)    | 0 (0.00%) |      2048      |
|                        |                 |           |                |
|         4 (8)          |    0 (0.00%)    | 0 (0.00%) |      128       |
|         5 (8)          |    0 (0.00%)    | 0 (0.00%) |      128       |
|         6 (8)          |    0 (0.00%)    | 0 (0.00%) |      128       |
|         7 (8)          |    0 (0.00%)    | 0 (0.00%) |      128       |
|    Total for 8 bit     |    0 (0.00%)    | 0 (0.00%) |      512       |
|                        |                 |           |                |
|         8 (16)         |    1 (6.25%)    | 9 (3.52%) |      256       |
|         9 (16)         |    0 (0.00%)    | 0 (0.00%) |      256       |
|        10 (16)         |    0 (0.00%)    | 0 (0.00%) |      256       |
|        11 (16)         |    0 (0.00%)    | 0 (0.00%) |      256       |
|        12 (16)         |    0 (0.00%)    | 0 (0.00%) |      256       |
|        13 (16)         |    0 (0.00%)    | 0 (0.00%) |      256       |
|    Total for 16 bit    |    1 (1.04%)    | 9 (0.59%) |      1536      |
|                        |                 |           |                |
|       14 (32) T        |    0 (0.00%)    | 0 (0.00%) |      512       |
|       15 (32) T        |    0 (0.00%)    | 0 (0.00%) |      512       |
|    Total for 32 bit    |    0 (0.00%)    | 0 (0.00%) |      1024      |
|                        |                 |           |                |
|        16 (8) T        |    0 (0.00%)    | 0 (0.00%) |      128       |
|        17 (8) T        |    0 (0.00%)    | 0 (0.00%) |      128       |
|    Total for 8 bit     |    0 (0.00%)    | 0 (0.00%) |      256       |
|                        |                 |           |                |
|       18 (16) T        |    0 (0.00%)    | 0 (0.00%) |      256       |
|       19 (16) T        |    0 (0.00%)    | 0 (0.00%) |      256       |
|       20 (16) T        |    0 (0.00%)    | 0 (0.00%) |      256       |
|    Total for 16 bit    |    0 (0.00%)    | 0 (0.00%) |      768       |
|                        |                 |           |                |
|       MAU total        |    1 (0.45%)    | 9 (0.22%) |      4096      |
|     Tagalong total     |    0 (0.00%)    | 0 (0.00%) |      2048      |
|     Overall total      |    1 (0.30%)    | 9 (0.15%) |      6144      |
--------------------------------------------------------------------------

Sorted metadata field instances to allocate: 0 / 0 bits (0 ingress bits and 0 egress bits)
>>Event 'pa_pov' at time 1504792580.33
   Took 0.05 seconds

-----------------------------------------------
  Allocating POV
-----------------------------------------------
Allocation Step
Allocation state: Final Allocation
------------------------------------------------------------------------------
|       PHV Group        | Containers Used |   Bits Used   | Bits Available |
| (container bit widths) |     (% used)    |    (% used)   |                |
------------------------------------------------------------------------------
|         0 (32)         |    3 (18.75%)   |  96 (18.75%)  |      512       |
|         1 (32)         |    0 (0.00%)    |   0 (0.00%)   |      512       |
|         2 (32)         |    0 (0.00%)    |   0 (0.00%)   |      512       |
|         3 (32)         |    0 (0.00%)    |   0 (0.00%)   |      512       |
|    Total for 32 bit    |    3 (4.69%)    |   96 (4.69%)  |      2048      |
|                        |                 |               |                |
|         4 (8)          |    3 (18.75%)   |  24 (18.75%)  |      128       |
|         5 (8)          |    2 (12.50%)   |  16 (12.50%)  |      128       |
|         6 (8)          |    0 (0.00%)    |   0 (0.00%)   |      128       |
|         7 (8)          |    0 (0.00%)    |   0 (0.00%)   |      128       |
|    Total for 8 bit     |    5 (7.81%)    |   40 (7.81%)  |      512       |
|                        |                 |               |                |
|         8 (16)         |    5 (31.25%)   |  73 (28.52%)  |      256       |
|         9 (16)         |    3 (18.75%)   |  48 (18.75%)  |      256       |
|        10 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|        11 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|        12 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|        13 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|    Total for 16 bit    |    8 (8.33%)    |  121 (7.88%)  |      1536      |
|                        |                 |               |                |
|       14 (32) T        |   14 (87.50%)   |  448 (87.50%) |      512       |
|       15 (32) T        |    0 (0.00%)    |   0 (0.00%)   |      512       |
|    Total for 32 bit    |   14 (43.75%)   |  448 (43.75%) |      1024      |
|                        |                 |               |                |
|        16 (8) T        |   10 (62.50%)   |  80 (62.50%)  |      128       |
|        17 (8) T        |    0 (0.00%)    |   0 (0.00%)   |      128       |
|    Total for 8 bit     |   10 (31.25%)   |  80 (31.25%)  |      256       |
|                        |                 |               |                |
|       18 (16) T        |   10 (62.50%)   |  160 (62.50%) |      256       |
|       19 (16) T        |    5 (31.25%)   |  80 (31.25%)  |      256       |
|       20 (16) T        |    0 (0.00%)    |   0 (0.00%)   |      256       |
|    Total for 16 bit    |   15 (31.25%)   |  240 (31.25%) |      768       |
|                        |                 |               |                |
|       MAU total        |    16 (7.14%)   |  257 (6.27%)  |      4096      |
|     Tagalong total     |   39 (34.82%)   |  768 (37.50%) |      2048      |
|     Overall total      |   55 (16.37%)   | 1025 (16.68%) |      6144      |
------------------------------------------------------------------------------

Sorted POV field instances to allocate (with best pack): 13
    0: --validity_check--packet_in_hdr (ingress)  -- max pov share 6 / best pack 5
    1: --validity_check--packet_out_hdr (ingress)  -- max pov share 6 / best pack 5
    2: --validity_check--ethernet (ingress)  -- max pov share 6 / best pack 5
    3: --validity_check--ipv4 (ingress)  -- max pov share 6 / best pack 5
    4: --validity_check--tcp (ingress)  -- max pov share 6 / best pack 5
    5: --validity_check--udp (ingress)  -- max pov share 6 / best pack 5
    6: --validity_check--metadata_bridge (ingress)  -- max pov share 6 / best pack 5
    7: --validity_check--packet_in_hdr (egress)  -- max pov share 5 / best pack 4
    8: --validity_check--packet_out_hdr (egress)  -- max pov share 5 / best pack 4
    9: --validity_check--ethernet (egress)  -- max pov share 5 / best pack 4
   10: --validity_check--ipv4 (egress)  -- max pov share 5 / best pack 4
   11: --validity_check--tcp (egress)  -- max pov share 5 / best pack 4
   12: --validity_check--udp (egress)  -- max pov share 5 / best pack 4

Working on
--validity_check--packet_in_hdr <1 bits ingress parsed pov>
Call to _allocate_pov_helper for:
  --validity_check--packet_in_hdr (ingress)
  Best pack group: (6)

Looking for container to share POV bit in from already allocated containers for POV.
Container availability (not used yet for POV): total 197 / partial 1

Looking for container to share POV bit in from already allocated containers that have not been used for POV.
>>Choose container phv67, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 7).
  >> Decided to allocate new container
Required container phv67
***Allocating phv67[0:0] for --validity_check--packet_in_hdr[0:0]
***Allocating phv67[1:1] for --validity_check--packet_out_hdr[0:0]
***Allocating phv67[2:2] for --validity_check--ethernet[0:0]
***Allocating phv67[3:3] for --validity_check--ipv4[0:0]
***Allocating phv67[4:4] for --validity_check--tcp[0:0]
***Allocating phv67[5:5] for --validity_check--udp[0:0]
***Allocating phv67[6:6] for --validity_check--metadata_bridge[0:0]

Working on
--validity_check--packet_out_hdr <1 bits ingress parsed pov R W>
  Already allocated.

Working on
--validity_check--ethernet <1 bits ingress parsed pov>
  Already allocated.

Working on
--validity_check--ipv4 <1 bits ingress parsed pov>
  Already allocated.

Working on
--validity_check--tcp <1 bits ingress parsed pov>
  Already allocated.

Working on
--validity_check--udp <1 bits ingress parsed pov>
  Already allocated.

Working on
--validity_check--metadata_bridge <1 bits ingress parsed pov>
  Already allocated.

Working on
--validity_check--packet_in_hdr <1 bits egress parsed pov W>
Call to _allocate_pov_helper for:
  --validity_check--packet_in_hdr (egress)
  Best pack group: (5)

Looking for container to share POV bit in from already allocated containers for POV.
Container availability (not used yet for POV): total 199 / partial 0

Looking for container to share POV bit in from already allocated containers that have not been used for POV.
>>Choose container phv82, starting at container bit 0, which results in 7 bits still available (unused = 8 and could fit = 6).
  >> Decided to allocate new container
Required container phv82
***Allocating phv82[0:0] for --validity_check--packet_in_hdr[0:0]
***Allocating phv82[1:1] for --validity_check--packet_out_hdr[0:0]
***Allocating phv82[2:2] for --validity_check--ethernet[0:0]
***Allocating phv82[3:3] for --validity_check--ipv4[0:0]
***Allocating phv82[4:4] for --validity_check--tcp[0:0]
***Allocating phv82[5:5] for --validity_check--udp[0:0]

Working on
--validity_check--packet_out_hdr <1 bits egress parsed pov>
  Already allocated.

Working on
--validity_check--ethernet <1 bits egress parsed pov>
  Already allocated.

Working on
--validity_check--ipv4 <1 bits egress parsed pov>
  Already allocated.

Working on
--validity_check--tcp <1 bits egress parsed pov>
  Already allocated.

Working on
--validity_check--udp <1 bits egress parsed pov>
  Already allocated.

Sum of container bit widths POVs found in: 16
 ingress
    phv67 (8 bits)
  >> 8 total bits
 egress
    phv82 (8 bits)
  >> 8 total bits
>>Event 'pa_meta2' at time 1504792580.45
   Took 0.12 seconds

-----------------------------------------------
  Allocating metadata (pass 2)
-----------------------------------------------
Allocation Step
Total metadata field instances to allocate: 1  / 3 bits (3 ingress bits and 0 egress bits)
Promised metadata field instances to allocate: 0 / 0 bits (0 ingress bits and 0 egress bits)
Allocation state after promised meta allocated:
Allocation state: Final Allocation
------------------------------------------------------------------------------
|       PHV Group        | Containers Used |   Bits Used   | Bits Available |
| (container bit widths) |     (% used)    |    (% used)   |                |
------------------------------------------------------------------------------
|         0 (32)         |    3 (18.75%)   |  96 (18.75%)  |      512       |
|         1 (32)         |    0 (0.00%)    |   0 (0.00%)   |      512       |
|         2 (32)         |    0 (0.00%)    |   0 (0.00%)   |      512       |
|         3 (32)         |    0 (0.00%)    |   0 (0.00%)   |      512       |
|    Total for 32 bit    |    3 (4.69%)    |   96 (4.69%)  |      2048      |
|                        |                 |               |                |
|         4 (8)          |    4 (25.00%)   |  31 (24.22%)  |      128       |
|         5 (8)          |    3 (18.75%)   |  22 (17.19%)  |      128       |
|         6 (8)          |    0 (0.00%)    |   0 (0.00%)   |      128       |
|         7 (8)          |    0 (0.00%)    |   0 (0.00%)   |      128       |
|    Total for 8 bit     |    7 (10.94%)   |  53 (10.35%)  |      512       |
|                        |                 |               |                |
|         8 (16)         |    5 (31.25%)   |  73 (28.52%)  |      256       |
|         9 (16)         |    3 (18.75%)   |  48 (18.75%)  |      256       |
|        10 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|        11 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|        12 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|        13 (16)         |    0 (0.00%)    |   0 (0.00%)   |      256       |
|    Total for 16 bit    |    8 (8.33%)    |  121 (7.88%)  |      1536      |
|                        |                 |               |                |
|       14 (32) T        |   14 (87.50%)   |  448 (87.50%) |      512       |
|       15 (32) T        |    0 (0.00%)    |   0 (0.00%)   |      512       |
|    Total for 32 bit    |   14 (43.75%)   |  448 (43.75%) |      1024      |
|                        |                 |               |                |
|        16 (8) T        |   10 (62.50%)   |  80 (62.50%)  |      128       |
|        17 (8) T        |    0 (0.00%)    |   0 (0.00%)   |      128       |
|    Total for 8 bit     |   10 (31.25%)   |  80 (31.25%)  |      256       |
|                        |                 |               |                |
|       18 (16) T        |   10 (62.50%)   |  160 (62.50%) |      256       |
|       19 (16) T        |    5 (31.25%)   |  80 (31.25%)  |      256       |
|       20 (16) T        |    0 (0.00%)    |   0 (0.00%)   |      256       |
|    Total for 16 bit    |   15 (31.25%)   |  240 (31.25%) |      768       |
|                        |                 |               |                |
|       MAU total        |    18 (8.04%)   |  270 (6.59%)  |      4096      |
|     Tagalong total     |   39 (34.82%)   |  768 (37.50%) |      2048      |
|     Overall total      |   57 (16.96%)   | 1038 (16.89%) |      6144      |
------------------------------------------------------------------------------

Allocation state difference after promised meta allocated:
Allocation state: Diff
--------------------------------------------------------------------------
|       PHV Group        | Containers Used | Bits Used | Bits Available |
| (container bit widths) |     (% used)    |  (% used) |                |
--------------------------------------------------------------------------
|         0 (32)         |    0 (0.00%)    | 0 (0.00%) |      512       |
|         1 (32)         |    0 (0.00%)    | 0 (0.00%) |      512       |
|         2 (32)         |    0 (0.00%)    | 0 (0.00%) |      512       |
|         3 (32)         |    0 (0.00%)    | 0 (0.00%) |      512       |
|    Total for 32 bit    |    0 (0.00%)    | 0 (0.00%) |      2048      |
|                        |                 |           |                |
|         4 (8)          |    0 (0.00%)    | 0 (0.00%) |      128       |
|         5 (8)          |    0 (0.00%)    | 0 (0.00%) |      128       |
|         6 (8)          |    0 (0.00%)    | 0 (0.00%) |      128       |
|         7 (8)          |    0 (0.00%)    | 0 (0.00%) |      128       |
|    Total for 8 bit     |    0 (0.00%)    | 0 (0.00%) |      512       |
|                        |                 |           |                |
|         8 (16)         |    0 (0.00%)    | 0 (0.00%) |      256       |
|         9 (16)         |    0 (0.00%)    | 0 (0.00%) |      256       |
|        10 (16)         |    0 (0.00%)    | 0 (0.00%) |      256       |
|        11 (16)         |    0 (0.00%)    | 0 (0.00%) |      256       |
|        12 (16)         |    0 (0.00%)    | 0 (0.00%) |      256       |
|        13 (16)         |    0 (0.00%)    | 0 (0.00%) |      256       |
|    Total for 16 bit    |    0 (0.00%)    | 0 (0.00%) |      1536      |
|                        |                 |           |                |
|       14 (32) T        |    0 (0.00%)    | 0 (0.00%) |      512       |
|       15 (32) T        |    0 (0.00%)    | 0 (0.00%) |      512       |
|    Total for 32 bit    |    0 (0.00%)    | 0 (0.00%) |      1024      |
|                        |                 |           |                |
|        16 (8) T        |    0 (0.00%)    | 0 (0.00%) |      128       |
|        17 (8) T        |    0 (0.00%)    | 0 (0.00%) |      128       |
|    Total for 8 bit     |    0 (0.00%)    | 0 (0.00%) |      256       |
|                        |                 |           |                |
|       18 (16) T        |    0 (0.00%)    | 0 (0.00%) |      256       |
|       19 (16) T        |    0 (0.00%)    | 0 (0.00%) |      256       |
|       20 (16) T        |    0 (0.00%)    | 0 (0.00%) |      256       |
|    Total for 16 bit    |    0 (0.00%)    | 0 (0.00%) |      768       |
|                        |                 |           |                |
|       MAU total        |    0 (0.00%)    | 0 (0.00%) |      4096      |
|     Tagalong total     |    0 (0.00%)    | 0 (0.00%) |      2048      |
|     Overall total      |    0 (0.00%)    | 0 (0.00%) |      6144      |
--------------------------------------------------------------------------

Sorted metadata field instances to allocate: 1 / 3 bits (3 ingress bits and 0 egress bits)
     0: ig_intr_md_for_tm.drop_ctl (ingress) (highly=0, mau_group_size=1, max_overlay=0, best_overlay_pack=0, max_share=0, best_share_pack=0, max_split=1, bit_width=3, initial_usage_read=2, earliest_use=1, latest_use=12)

---------------------------------------
Working on:
ig_intr_md_for_tm.drop_ctl <3 bits ingress imeta W>
max_split = 1, adj = False
Of remaining metadata fields to allocate
   max_overlay = 0 (0 bits)
   max_share = 0 (0 bits)
bits_will_need_to_parse = 3
unused_metadata_container_bits = 0
min_parse_states = 1
bits_per_state = 8
Parse state 0 (3 bits)
  ig_intr_md_for_tm.drop_ctl [2:0]
-------------------------------------------------------------------------------------------------
|            Name            | BW | Tagalong? | Req | Pref | Not Allow | MaxSplit | Group Size |
-------------------------------------------------------------------------------------------------
| ig_intr_md_for_tm.drop_ctl | 3  |   False   |  -  |  -   |     -     |    1     |     1      |
-------------------------------------------------------------------------------------------------

  req packing: [None]
  disallowed packing: [None]
  Group 0 32 bits -- avail 13 and promised 1 -- ingress promised 1 and remain 12 and req 1 -- egress promised 0 and remain 12 and req 0 -- as if deparsed True -- container_to_use phv3 -- fails False
  Group 1 32 bits -- avail 16 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
  Group 2 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 12 and req 0 -- as if deparsed True -- container_to_use phv32 -- fails False
  Group 3 32 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 12 and req 0 -- as if deparsed True -- container_to_use phv48 -- fails False
  Group 4 8 bits -- avail 12 and promised 1 -- ingress promised 1 and remain 11 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv68 -- fails False
  Group 5 8 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
  Group 6 8 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv96 -- fails False
  Group 7 8 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv112 -- fails False
  Group 8 16 bits -- avail 11 and promised 1 -- ingress promised 1 and remain 10 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv133 -- fails False
  Group 9 16 bits -- avail 13 and promised None -- ingress promised None and remain None and req None -- egress promised None and remain None and req None -- as if deparsed False -- container_to_use None -- fails True
  Group 10 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv160 -- fails False
  Group 11 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv176 -- fails False
  Group 12 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv192 -- fails False
  Group 13 16 bits -- avail 16 and promised 1 -- ingress promised 1 and remain 15 and req 1 -- egress promised 0 and remain 8 and req 0 -- as if deparsed True -- container_to_use phv208 -- fails False
Metadata instance: ig_intr_md_for_tm.drop_ctl <3 bits ingress imeta W>
>>req_alignment = None
>>allowed_container_start_bits = [0, 1, 2, 3, 4, 5, 6, 7]
>>req_container = None
  case 2: looking at allowed start bits [0, 1, 2, 3, 4, 5, 6, 7]
    final start_bit = 5
  (1) msb_offset = 8
***Allocating phv68[7:5] for ig_intr_md_for_tm.drop_ctl[2:0]
>>Event 'pa_meta_init' at time 1504792580.52
   Took 0.07 seconds

-----------------------------------------------
  Adding metadata initialization
-----------------------------------------------

+------------------------+

Performing inject metadata initialization instructions: (0)
tbl_name_to_common_edge_groups: 0
all_edge: 0

Performing replace metadata initialization instructions: (0)

Performing remove metadata initialization instructions: (0)

Performing clear metadata initialization instructions: (0)

Performing invalidate metadata initialization instructions: (0)

 Total overlay containers examined for initialization: 0

-----------------------------------------------
  Checking constraints satisfied
-----------------------------------------------
  No constraints violated.