Support for different tofino systems (mavericks and montara)
The tofino driver will now register two pipeconf, one for each system.
The right one should be injected via netcfg.
Change-Id: I0fc3e8afa6fedef13d1ab7067811707748e8e916
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.resources.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.resources.log
new file mode 100644
index 0000000..80ecadc
--- /dev/null
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.resources.log
@@ -0,0 +1,73 @@
++---------------------------------------------------------------------+
+| Log file: mau.resources.log |
+| Compiler version: 5.1.0 (fca32d1) |
+| Created on: Thu Sep 7 13:56:08 2017 |
++---------------------------------------------------------------------+
+
+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+| Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+| 0 | 2 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 |
+| 1 | 1 | 16 | 1 | 0 | 1 | 3 | 3 | 3 | 2 | 0 | 1 | 0 | 4 | 0 | 2 | 1 | 1 |
+| 2 | 2 | 0 | 9 | 0 | 2 | 4 | 4 | 0 | 1 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2 |
+| 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| 9 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| 10 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| 11 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| | | | | | | | | | | | | | | | | | |
+| Totals | 5 | 16 | 12 | 0 | 5 | 7 | 7 | 3 | 4 | 0 | 3 | 0 | 4 | 0 | 2 | 1 | 5 |
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+| Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+| 0 | 1.56% | 0.00% | 0.48% | 0.00% | 12.50% | 0.00% | 0.00% | 0.00% | 3.12% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
+| 1 | 0.78% | 24.24% | 0.24% | 0.00% | 6.25% | 3.75% | 6.25% | 12.50% | 6.25% | 0.00% | 25.00% | 0.00% | 3.12% | 0.00% | 6.25% | 3.12% | 6.25% |
+| 2 | 1.56% | 0.00% | 2.16% | 0.00% | 12.50% | 5.00% | 8.33% | 0.00% | 3.12% | 0.00% | 50.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
+| 3 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
+| 4 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
+| 5 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
+| 6 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
+| 7 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
+| 8 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
+| 9 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
+| 10 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
+| 11 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
+| | | | | | | | | | | | | | | | | | |
+| Average | 0.33% | 2.02% | 0.24% | 0.00% | 2.60% | 0.73% | 1.22% | 1.04% | 1.04% | 0.00% | 6.25% | 0.00% | 0.26% | 0.00% | 0.52% | 0.26% | 2.60% |
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+
+Allocated Resource Usage
+--------------------------------------------------------------------------------------------------------------------
+| Table | Stage | Crossbar | Hash | Gateways | RAMs | TCAMs | Map | Action | VLIW |
+| Name | Number | Bytes | Bits | | | | RAMs | Data | Slots |
+| | | | | | | | | Bus | |
+| | | | | | | | | Bytes | |
+--------------------------------------------------------------------------------------------------------------------
+| _condition_0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
+| _condition_3 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
+| ingress_pkt__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| ingress_pkt | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
+| egress_pkt__action__ | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| egress_pkt | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
+| _condition_1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
+| table0__action__ | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
+| table0 | 1 | 16 | 0 | 0 | 1 | 3 | 1 | 0 | 3 |
+| table0_counter | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| _condition_2 | 2 | 2 | 9 | 1 | 0 | 0 | 0 | 0 | 0 |
+| ingress_port_count_table__action__ | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| ingress_port_count_table | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
+| egress_port_count_table__action__ | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
+| egress_port_count_table | 2 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
+| ingress_port_counter | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+| egress_port_counter | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 |
+--------------------------------------------------------------------------------------------------------------------
+