Use 64 bits counters to mitigate wrapping

Change-Id: I5c1f6a936fcd0d5d38c95a9fe6344fd7bf440e91
diff --git a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.config.log b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.config.log
index 4ac479c..0ecaef8 100644
--- a/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.config.log
+++ b/tools/test/p4src/p4-14/p4c-out/tofino/default/mavericks/logs/mau.config.log
@@ -1,7 +1,7 @@
 +---------------------------------------------------------------------+
 |  Log file: mau.config.log                                           |
 |  Compiler version: 5.1.0 (fca32d1)                                  |
-|  Created on: Wed Sep 13 01:39:13 2017                               |
+|  Created on: Wed Sep 13 12:56:12 2017                               |
 +---------------------------------------------------------------------+
 
 Final Stage dependencies are:
@@ -836,7 +836,7 @@
 Configuring rams.match.merge.mau_hash_group_config.hash_group_enable to be 1. (old value = 0 OR new value = 1).
 Configuring rams.match.merge.mau_hash_group_config.hash_group_sel to be 8. (old value = 0 OR new value = 8).
 Configuring rams.match.merge.mau_hash_group_config.hash_group_ctl to be 1. (old value = 0 OR new value = 1).
-Configuring rams.match.merge.mau_hash_group_shiftcount.mau_hash_group_shiftcount to be 0x1. (old value = 0x0 OR new value = 0x1).
+Configuring rams.match.merge.mau_hash_group_shiftcount.mau_hash_group_shiftcount to be 0x2. (old value = 0x0 OR new value = 0x2).
 Configuring rams.match.merge.mau_hash_group_mask[which_16=0].mau_hash_group_mask to be 0x3ff.  (previous value = 0x0  OR new value = 0x3ff)
 Configuring rams.match.merge.mau_hash_group_xbar_ctl[output_type_index=3][control_group_index=0].mau_hash_group_xbar_ctl to be 0x8 (old value = 0x0 OR new value = 0x8).
 Configuring rams.match.merge.mau_payload_shifter_enable[table_type=0][result_bus=1].stats_adr_payload_shifter_en to be 1.
@@ -898,7 +898,7 @@
 Configuring rams.match.merge.mau_hash_group_config.hash_group_enable to be 9. (old value = 1 OR new value = 8).
 Configuring rams.match.merge.mau_hash_group_config.hash_group_sel to be 152. (old value = 8 OR new value = 144).
 Configuring rams.match.merge.mau_hash_group_config.hash_group_ctl to be 65. (old value = 1 OR new value = 64).
-Configuring rams.match.merge.mau_hash_group_shiftcount.mau_hash_group_shiftcount to be 0x201. (old value = 0x1 OR new value = 0x200).
+Configuring rams.match.merge.mau_hash_group_shiftcount.mau_hash_group_shiftcount to be 0x402. (old value = 0x2 OR new value = 0x400).
 Configuring rams.match.merge.mau_hash_group_mask[which_16=3].mau_hash_group_mask to be 0x3ff.  (previous value = 0x0  OR new value = 0x3ff)
 Configuring rams.match.merge.mau_hash_group_xbar_ctl[output_type_index=3][control_group_index=0].mau_hash_group_xbar_ctl to be 0xb8 (old value = 0x8 OR new value = 0xb0).
 --> Stage Gateway Table for condition egress_port_count_table_always_true_condition in stage 1
@@ -998,33 +998,18 @@
 Configuring rams.map_alu.row[row=4].adrmux.ram_address_mux_ctl[array_half_index=1][map_ram_half_index=1].map_ram_wadr_mux_select to be 1.
 Configuring rams.map_alu.row[row=4].adrmux.ram_address_mux_ctl[array_half_index=1][map_ram_half_index=1].map_ram_wadr_mux_enable to be 1.
 Configuring rams.map_alu.row[row=4].adrmux.ram_address_mux_ctl[array_half_index=1][map_ram_half_index=1].map_ram_radr_mux_select_smoflo to be 1.
-For counter width 32 and N = 4096
-  number iterations = 32
-  b_cur = 379488672.0
-  eqn(b_cur) = 4294964039.26
-  max_counter_value = 4294967295
-Configuring rams.map_alu.stats_wrap[stats_group_index=2].stats.lrt_threshold[threshold_index=0].lrt_threshold to be 0x169e89a.
-Configuring rams.map_alu.stats_wrap[stats_group_index=2].stats.lrt_update_interval[threshold_index=0].lrt_update_interval to be 0x169e89.
-Configuring rams.map_alu.stats_wrap[stats_group_index=2].stats.lrt_threshold[threshold_index=1].lrt_threshold to be 0x169e89a.
-Configuring rams.map_alu.stats_wrap[stats_group_index=2].stats.lrt_update_interval[threshold_index=1].lrt_update_interval to be 0x169e89.
-Configuring rams.map_alu.stats_wrap[stats_group_index=2].stats.lrt_threshold[threshold_index=2].lrt_threshold to be 0x169e89a.
-Configuring rams.map_alu.stats_wrap[stats_group_index=2].stats.lrt_update_interval[threshold_index=2].lrt_update_interval to be 0x169e89.
-Configuring rams.map_alu.stats_wrap[stats_group_index=2].stats.statistics_ctl.stats_entries_per_word to be 4.
+Configuring rams.map_alu.stats_wrap[stats_group_index=2].stats.statistics_ctl.stats_entries_per_word to be 2.
 Configuring rams.map_alu.stats_wrap[stats_group_index=2].stats.statistics_ctl.stats_process_bytes to be 1.
-Configuring rams.map_alu.stats_wrap[stats_group_index=2].stats.statistics_ctl.lrt_enable to be 1.
 TODO: Temporarily configuring rams.map_alu.stats_wrap[stats_group_index=2].stats.statistics_ctl.stats_alu_error_enable to be 0.
 Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=2].mau_cfg_stats_alu_lt to be 0x0.
-Configuring cfg_regs.stats_dump_ctl[logical_table=0].stats_dump_entries_per_word be 0x4.
+Configuring cfg_regs.stats_dump_ctl[logical_table=0].stats_dump_entries_per_word be 0x2.
 Configuring cfg_regs.stats_dump_ctl[logical_table=0].stats_dump_has_bytes be 0x1.
 Configuring cfg_regs.stats_dump_ctl[logical_table=0].stats_dump_offset be 0x0.
 Configuring cfg_regs.stats_dump_ctl[logical_table=0].stats_dump_size be 0x0.
-Configuring rams.match.adrdist.stats_lrt_fsm_sweep_size[stats_group_index=2].stats_lrt_fsm_sweep_size to be 0x0.
-Configuring rams.match.adrdist.stats_lrt_fsm_sweep_offset[stats_group_index=2].stats_lrt_fsm_sweep_offset to be 0x0.
-Configuring rams.match.adrdist.stats_lrt_sweep_adr[stats_group_index=2].stats_lrt_sweep_adr to be 0x0.
 Configuring rams.map_alu.row[row=4].i2portctl.synth2port_vpn_ctl.synth2port_vpn_base to be 0x0.
 Configuring rams.map_alu.row[row=4].i2portctl.synth2port_vpn_ctl.synth2port_vpn_limit to be 0x0.
 Configuring rams.match.adrdist.deferred_ram_ctl[deferred_ram_type=0][deferred_ram_index=2].deferred_ram_en to be 1.
-Configuring rams.match.adrdist.movereg_stats_ctl[stat_alu_index=2].movereg_stats_ctl_size be 3.
+Configuring rams.match.adrdist.movereg_stats_ctl[stat_alu_index=2].movereg_stats_ctl_size be 1.
 Configuring rams.match.adrdist.movereg_stats_ctl[stat_alu_index=2].movereg_stats_ctl_deferred be 1.
 Configuring rams.match.adrdist.movereg_stats_ctl[stat_alu_index=2].movereg_stats_ctl_lt be 0x0.
 Configuring rams.match.adrdist.movereg_ad_stats_alu_to_logical_xbar_ctl[logical_index=0].movereg_ad_stats_alu_to_logical_xbar_ctl be 0x6.  ( previous value = 0x0  OR  new value = 0x6)
@@ -1083,33 +1068,18 @@
 Configuring rams.map_alu.row[row=6].adrmux.ram_address_mux_ctl[array_half_index=1][map_ram_half_index=1].map_ram_wadr_mux_select to be 1.
 Configuring rams.map_alu.row[row=6].adrmux.ram_address_mux_ctl[array_half_index=1][map_ram_half_index=1].map_ram_wadr_mux_enable to be 1.
 Configuring rams.map_alu.row[row=6].adrmux.ram_address_mux_ctl[array_half_index=1][map_ram_half_index=1].map_ram_radr_mux_select_smoflo to be 1.
-For counter width 32 and N = 4096
-  number iterations = 32
-  b_cur = 379488672.0
-  eqn(b_cur) = 4294964039.26
-  max_counter_value = 4294967295
-Configuring rams.map_alu.stats_wrap[stats_group_index=3].stats.lrt_threshold[threshold_index=0].lrt_threshold to be 0x169e89a.
-Configuring rams.map_alu.stats_wrap[stats_group_index=3].stats.lrt_update_interval[threshold_index=0].lrt_update_interval to be 0x169e89.
-Configuring rams.map_alu.stats_wrap[stats_group_index=3].stats.lrt_threshold[threshold_index=1].lrt_threshold to be 0x169e89a.
-Configuring rams.map_alu.stats_wrap[stats_group_index=3].stats.lrt_update_interval[threshold_index=1].lrt_update_interval to be 0x169e89.
-Configuring rams.map_alu.stats_wrap[stats_group_index=3].stats.lrt_threshold[threshold_index=2].lrt_threshold to be 0x169e89a.
-Configuring rams.map_alu.stats_wrap[stats_group_index=3].stats.lrt_update_interval[threshold_index=2].lrt_update_interval to be 0x169e89.
-Configuring rams.map_alu.stats_wrap[stats_group_index=3].stats.statistics_ctl.stats_entries_per_word to be 4.
+Configuring rams.map_alu.stats_wrap[stats_group_index=3].stats.statistics_ctl.stats_entries_per_word to be 2.
 Configuring rams.map_alu.stats_wrap[stats_group_index=3].stats.statistics_ctl.stats_process_bytes to be 1.
-Configuring rams.map_alu.stats_wrap[stats_group_index=3].stats.statistics_ctl.lrt_enable to be 1.
 TODO: Temporarily configuring rams.map_alu.stats_wrap[stats_group_index=3].stats.statistics_ctl.stats_alu_error_enable to be 0.
 Configuring cfg_regs.mau_cfg_stats_alu_lt.[stats_group_index=3].mau_cfg_stats_alu_lt to be 0x1.
-Configuring cfg_regs.stats_dump_ctl[logical_table=1].stats_dump_entries_per_word be 0x4.
+Configuring cfg_regs.stats_dump_ctl[logical_table=1].stats_dump_entries_per_word be 0x2.
 Configuring cfg_regs.stats_dump_ctl[logical_table=1].stats_dump_has_bytes be 0x1.
 Configuring cfg_regs.stats_dump_ctl[logical_table=1].stats_dump_offset be 0x0.
 Configuring cfg_regs.stats_dump_ctl[logical_table=1].stats_dump_size be 0x0.
-Configuring rams.match.adrdist.stats_lrt_fsm_sweep_size[stats_group_index=3].stats_lrt_fsm_sweep_size to be 0x0.
-Configuring rams.match.adrdist.stats_lrt_fsm_sweep_offset[stats_group_index=3].stats_lrt_fsm_sweep_offset to be 0x0.
-Configuring rams.match.adrdist.stats_lrt_sweep_adr[stats_group_index=3].stats_lrt_sweep_adr to be 0x0.
 Configuring rams.map_alu.row[row=6].i2portctl.synth2port_vpn_ctl.synth2port_vpn_base to be 0x0.
 Configuring rams.map_alu.row[row=6].i2portctl.synth2port_vpn_ctl.synth2port_vpn_limit to be 0x0.
 Configuring rams.match.adrdist.deferred_ram_ctl[deferred_ram_type=0][deferred_ram_index=3].deferred_ram_en to be 1.
-Configuring rams.match.adrdist.movereg_stats_ctl[stat_alu_index=3].movereg_stats_ctl_size be 3.
+Configuring rams.match.adrdist.movereg_stats_ctl[stat_alu_index=3].movereg_stats_ctl_size be 1.
 Configuring rams.match.adrdist.movereg_stats_ctl[stat_alu_index=3].movereg_stats_ctl_deferred be 1.
 Configuring rams.match.adrdist.movereg_stats_ctl[stat_alu_index=3].movereg_stats_ctl_lt be 0x1.
 Configuring rams.match.adrdist.movereg_ad_stats_alu_to_logical_xbar_ctl[logical_index=3].movereg_ad_stats_alu_to_logical_xbar_ctl be 0x3e.  ( previous value = 0x6  OR  new value = 0x38)
@@ -2012,7 +1982,7 @@
 Configuring dp.phv_fifo_enable.phv_fifo_egress_final_output_enable to be 0.
 
 +------------------------------------------------------------------------
-|  Number of configuration field values set in Match-Action Stages: 1619
+|  Number of configuration field values set in Match-Action Stages: 1599
 +------------------------------------------------------------------------
 
 +------------------------------------------------------------------------