blob: b0aa2420a6024ab46243ed83095eef6fcd9d1a81 [file] [log] [blame]
Rich Lanea06d0c32013-03-25 08:52:03 -07001// Copyright 2013, Big Switch Networks, Inc.
2//
3// LoxiGen is licensed under the Eclipse Public License, version 1.0 (EPL), with
4// the following special exception:
5//
6// LOXI Exception
7//
8// As a special exception to the terms of the EPL, you may distribute libraries
9// generated by LoxiGen (LoxiGen Libraries) under the terms of your choice, provided
10// that copyright and licensing notices generated by LoxiGen are not altered or removed
11// from the LoxiGen Libraries and the notice provided below is (i) included in
12// the LoxiGen Libraries, if distributed in source code form and (ii) included in any
13// documentation for the LoxiGen Libraries, if distributed in binary form.
14//
15// Notice: "Copyright 2013, Big Switch Networks, Inc. This library was generated by the LoxiGen Compiler."
16//
17// You may not use this file except in compliance with the EPL or LOXI Exception. You may obtain
18// a copy of the EPL at:
19//
20// http://www.eclipse.org/legal/epl-v10.html
21//
22// Unless required by applicable law or agreed to in writing, software
23// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
24// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
25// EPL for the specific language governing permissions and limitations
26// under the EPL.
Rich Lane5d33a622013-04-08 17:33:11 -070027//
28// Also derived from the OpenFlow header files which have these copyrights:
29// Copyright (c) 2008 The Board of Trustees of The Leland Stanford Junior University
30// Copyright (c) 2011, 2012 Open Networking Foundation
Rich Lanea06d0c32013-03-25 08:52:03 -070031
32#version 4
33
Rich Lane5d33a622013-04-08 17:33:11 -070034enum macro_definitions {
35 OFP_MAX_TABLE_NAME_LEN = 32,
36 OFP_MAX_PORT_NAME_LEN = 16,
37
38 OFP_TCP_PORT = 6633,
39 OFP_SSL_PORT = 6633,
40
41 OFP_ETH_ALEN = 6,
42
43 OFP_DEFAULT_MISS_SEND_LEN = 128,
44
45 OFP_VLAN_NONE = 0,
46
47 OFP_FLOW_PERMANENT = 0,
48
49 OFP_DEFAULT_PRIORITY = 0x8000,
50
51 OFP_NO_BUFFER = 0xffffffff,
52
53 DESC_STR_LEN = 256,
54 SERIAL_NUM_LEN = 32,
55
56 OFPQ_ALL = 0xffffffff,
57 OFPQ_MAX_RATE_UNCFG = 0xffff,
58 OFPQ_MIN_RATE_UNCFG = 0xffff,
59};
60
Andreas Wundsam4ee51462013-07-30 11:00:37 -070061enum ofp_port_no(wire_type=uint32_t, complete=no) {
Rich Lane5d33a622013-04-08 17:33:11 -070062 OFPP_ANY = 0xffffffff,
63};
64
Andreas Wundsam4ee51462013-07-30 11:00:37 -070065enum ofp_port(wire_type=uint32_t) {
Rich Lane5d33a622013-04-08 17:33:11 -070066 OFPP_MAX = 0xffffff00,
67 OFPP_IN_PORT = 0xfffffff8,
68 OFPP_TABLE = 0xfffffff9,
69 OFPP_NORMAL = 0xfffffffa,
70 OFPP_FLOOD = 0xfffffffb,
71 OFPP_ALL = 0xfffffffc,
72 OFPP_CONTROLLER = 0xfffffffd,
73 OFPP_LOCAL = 0xfffffffe,
74};
75
Andreas Wundsam4ee51462013-07-30 11:00:37 -070076enum ofp_type(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -070077 OFPT_HELLO = 0,
78 OFPT_ERROR = 1,
79 OFPT_ECHO_REQUEST = 2,
80 OFPT_ECHO_REPLY = 3,
81 OFPT_EXPERIMENTER = 4,
82 OFPT_FEATURES_REQUEST = 5,
83 OFPT_FEATURES_REPLY = 6,
84 OFPT_GET_CONFIG_REQUEST = 7,
85 OFPT_GET_CONFIG_REPLY = 8,
86 OFPT_SET_CONFIG = 9,
87 OFPT_PACKET_IN = 10,
88 OFPT_FLOW_REMOVED = 11,
89 OFPT_PORT_STATUS = 12,
90 OFPT_PACKET_OUT = 13,
91 OFPT_FLOW_MOD = 14,
92 OFPT_GROUP_MOD = 15,
93 OFPT_PORT_MOD = 16,
94 OFPT_TABLE_MOD = 17,
95 OFPT_MULTIPART_REQUEST = 18,
96 OFPT_MULTIPART_REPLY = 19,
97 OFPT_BARRIER_REQUEST = 20,
98 OFPT_BARRIER_REPLY = 21,
99 OFPT_QUEUE_GET_CONFIG_REQUEST = 22,
100 OFPT_QUEUE_GET_CONFIG_REPLY = 23,
101 OFPT_ROLE_REQUEST = 24,
102 OFPT_ROLE_REPLY = 25,
103 OFPT_GET_ASYNC_REQUEST = 26,
104 OFPT_GET_ASYNC_REPLY = 27,
105 OFPT_SET_ASYNC = 28,
106 OFPT_METER_MOD = 29,
107};
108
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700109enum ofp_config_flags(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700110 OFPC_FRAG_NORMAL = 0,
111 OFPC_FRAG_DROP = 1,
112 OFPC_FRAG_REASM = 2,
113 OFPC_FRAG_MASK = 3,
114};
115
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700116enum ofp_table_config(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700117 OFPTC_DEPRECATED_MASK = 0x3,
118};
119
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700120enum ofp_table(wire_type=uint8_t, complete=False) {
Rich Lane5d33a622013-04-08 17:33:11 -0700121 OFPTT_MAX = 0xfe,
122 OFPTT_ALL = 0xff,
123};
124
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700125enum ofp_capabilities(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700126 OFPC_FLOW_STATS = 0x1,
127 OFPC_TABLE_STATS = 0x2,
128 OFPC_PORT_STATS = 0x4,
129 OFPC_GROUP_STATS = 0x8,
130 OFPC_IP_REASM = 0x20,
131 OFPC_QUEUE_STATS = 0x40,
132 OFPC_PORT_BLOCKED = 0x100,
133};
134
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700135enum ofp_port_config(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700136 OFPPC_PORT_DOWN = 0x1,
137 OFPPC_NO_RECV = 0x4,
138 OFPPC_NO_FWD = 0x20,
139 OFPPC_NO_PACKET_IN = 0x40,
140};
141
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700142enum ofp_port_state(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700143 OFPPS_LINK_DOWN = 0x1,
144 OFPPS_BLOCKED = 0x2,
145 OFPPS_LIVE = 0x4,
146};
147
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700148enum ofp_port_features(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700149 OFPPF_10MB_HD = 0x1,
150 OFPPF_10MB_FD = 0x2,
151 OFPPF_100MB_HD = 0x4,
152 OFPPF_100MB_FD = 0x8,
153 OFPPF_1GB_HD = 0x10,
154 OFPPF_1GB_FD = 0x20,
155 OFPPF_10GB_FD = 0x40,
156 OFPPF_40GB_FD = 0x80,
157 OFPPF_100GB_FD = 0x100,
158 OFPPF_1TB_FD = 0x200,
159 OFPPF_OTHER = 0x400,
160 OFPPF_COPPER = 0x800,
161 OFPPF_FIBER = 0x1000,
162 OFPPF_AUTONEG = 0x2000,
163 OFPPF_PAUSE = 0x4000,
164 OFPPF_PAUSE_ASYM = 0x8000,
165};
166
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700167enum ofp_port_reason(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700168 OFPPR_ADD = 0,
169 OFPPR_DELETE = 1,
170 OFPPR_MODIFY = 2,
171};
172
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700173enum ofp_match_type(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700174 OFPMT_STANDARD = 0,
175 OFPMT_OXM = 1,
176};
177
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700178enum ofp_oxm_class(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700179 OFPXMC_NXM_0 = 0,
180 OFPXMC_NXM_1 = 1,
181 OFPXMC_OPENFLOW_BASIC = 0x8000,
182 OFPXMC_EXPERIMENTER = 0xffff,
183};
184
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700185enum ofp_vlan_id(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700186 OFPVID_NONE = 0,
187 OFPVID_PRESENT = 0x1000,
188};
189
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700190// FIXME: OF spec specified this as '9' bits, implicitly adding
191// to full byte
192enum ofp_ipv6exthdr_flags(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700193 OFPIEH_NONEXT = 0x1,
194 OFPIEH_ESP = 0x2,
195 OFPIEH_AUTH = 0x4,
196 OFPIEH_DEST = 0x8,
197 OFPIEH_FRAG = 0x10,
198 OFPIEH_ROUTER = 0x20,
199 OFPIEH_HOP = 0x40,
200 OFPIEH_UNREP = 0x80,
201 OFPIEH_UNSEQ = 0x100,
202};
203
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700204enum ofp_action_type(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700205 OFPAT_OUTPUT = 0,
206 OFPAT_COPY_TTL_OUT = 0xb,
207 OFPAT_COPY_TTL_IN = 0xc,
208 OFPAT_SET_MPLS_TTL = 0xf,
209 OFPAT_DEC_MPLS_TTL = 0x10,
210 OFPAT_PUSH_VLAN = 0x11,
211 OFPAT_POP_VLAN = 0x12,
212 OFPAT_PUSH_MPLS = 0x13,
213 OFPAT_POP_MPLS = 0x14,
214 OFPAT_SET_QUEUE = 0x15,
215 OFPAT_GROUP = 0x16,
216 OFPAT_SET_NW_TTL = 0x17,
217 OFPAT_DEC_NW_TTL = 0x18,
218 OFPAT_SET_FIELD = 0x19,
219 OFPAT_PUSH_PBB = 0x1a,
220 OFPAT_POP_PBB = 0x1b,
221 OFPAT_EXPERIMENTER = 0xffff,
222};
223
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700224enum ofp_controller_max_len(wire_type=uint16_t, complete=False) {
Rich Lane5d33a622013-04-08 17:33:11 -0700225 OFPCML_MAX = 0xffe5,
226 OFPCML_NO_BUFFER = 0xffff,
227};
228
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700229enum ofp_instruction_type(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700230 OFPIT_GOTO_TABLE = 0x1,
231 OFPIT_WRITE_METADATA = 0x2,
232 OFPIT_WRITE_ACTIONS = 0x3,
233 OFPIT_APPLY_ACTIONS = 0x4,
234 OFPIT_CLEAR_ACTIONS = 0x5,
235 OFPIT_METER = 0x6,
236 OFPIT_EXPERIMENTER = 0xffff,
237};
238
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700239enum ofp_flow_mod_command(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700240 OFPFC_ADD = 0,
241 OFPFC_MODIFY = 1,
242 OFPFC_MODIFY_STRICT = 2,
243 OFPFC_DELETE = 3,
244 OFPFC_DELETE_STRICT = 4,
245};
246
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700247enum ofp_flow_mod_flags(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700248 OFPFF_SEND_FLOW_REM = 0x1,
249 OFPFF_CHECK_OVERLAP = 0x2,
250 OFPFF_RESET_COUNTS = 0x4,
251 OFPFF_NO_PKT_COUNTS = 0x8,
252 OFPFF_NO_BYT_COUNTS = 0x10,
253};
254
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700255enum ofp_group(wire_type=uint32_t, complete=False) {
Rich Lane5d33a622013-04-08 17:33:11 -0700256 OFPG_MAX = 0xffffff00,
257 OFPG_ALL = 0xfffffffc,
258 OFPG_ANY = 0xffffffff,
259};
260
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700261enum ofp_group_mod_command(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700262 OFPGC_ADD = 0,
263 OFPGC_MODIFY = 1,
264 OFPGC_DELETE = 2,
265};
266
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700267enum ofp_group_type(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700268 OFPGT_ALL = 0,
269 OFPGT_SELECT = 1,
270 OFPGT_INDIRECT = 2,
271 OFPGT_FF = 3,
272};
273
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700274enum ofp_packet_in_reason(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700275 OFPR_NO_MATCH = 0,
276 OFPR_ACTION = 1,
277 OFPR_INVALID_TTL = 2,
278};
279
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700280enum ofp_flow_removed_reason(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700281 OFPRR_IDLE_TIMEOUT = 0,
282 OFPRR_HARD_TIMEOUT = 1,
283 OFPRR_DELETE = 2,
284 OFPRR_GROUP_DELETE = 3,
285};
286
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700287enum ofp_meter(wire_type=uint32_t, complete=False) {
Rich Lane5d33a622013-04-08 17:33:11 -0700288 OFPM_MAX = 0xffff0000,
289 OFPM_SLOWPATH = 0xfffffffd,
290 OFPM_CONTROLLER = 0xfffffffe,
291 OFPM_ALL = 0xffffffff,
292};
293
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700294enum ofp_meter_band_type(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700295 OFPMBT_DROP = 0x1,
296 OFPMBT_DSCP_REMARK = 0x2,
297 OFPMBT_EXPERIMENTER = 0xffff,
298};
299
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700300enum ofp_meter_mod_command(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700301 OFPMC_ADD = 0,
302 OFPMC_MODIFY = 1,
303 OFPMC_DELETE = 2,
304};
305
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700306enum ofp_meter_flags(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700307 OFPMF_KBPS = 0x1,
308 OFPMF_PKTPS = 0x2,
309 OFPMF_BURST = 0x4,
310 OFPMF_STATS = 0x8,
311};
312
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700313enum ofp_error_type(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700314 OFPET_HELLO_FAILED = 0,
315 OFPET_BAD_REQUEST = 1,
316 OFPET_BAD_ACTION = 2,
317 OFPET_BAD_INSTRUCTION = 3,
318 OFPET_BAD_MATCH = 4,
319 OFPET_FLOW_MOD_FAILED = 5,
320 OFPET_GROUP_MOD_FAILED = 6,
321 OFPET_PORT_MOD_FAILED = 7,
322 OFPET_TABLE_MOD_FAILED = 8,
323 OFPET_QUEUE_OP_FAILED = 9,
324 OFPET_SWITCH_CONFIG_FAILED = 10,
325 OFPET_ROLE_REQUEST_FAILED = 11,
326 OFPET_METER_MOD_FAILED = 12,
327 OFPET_TABLE_FEATURES_FAILED = 13,
328 OFPET_EXPERIMENTER = 0xffff,
329};
330
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700331enum ofp_hello_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700332 OFPHFC_INCOMPATIBLE = 0,
333 OFPHFC_EPERM = 1,
334};
335
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700336enum ofp_bad_request_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700337 OFPBRC_BAD_VERSION = 0,
338 OFPBRC_BAD_TYPE = 1,
339 OFPBRC_BAD_MULTIPART = 2,
340 OFPBRC_BAD_EXPERIMENTER = 3,
341 OFPBRC_BAD_EXP_TYPE = 4,
342 OFPBRC_EPERM = 5,
343 OFPBRC_BAD_LEN = 6,
344 OFPBRC_BUFFER_EMPTY = 7,
345 OFPBRC_BUFFER_UNKNOWN = 8,
346 OFPBRC_BAD_TABLE_ID = 9,
347 OFPBRC_IS_SLAVE = 10,
348 OFPBRC_BAD_PORT = 11,
349 OFPBRC_BAD_PACKET = 12,
350 OFPBRC_MULTIPART_BUFFER_OVERFLOW = 13,
351};
352
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700353enum ofp_bad_action_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700354 OFPBAC_BAD_TYPE = 0,
355 OFPBAC_BAD_LEN = 1,
356 OFPBAC_BAD_EXPERIMENTER = 2,
357 OFPBAC_BAD_EXP_TYPE = 3,
358 OFPBAC_BAD_OUT_PORT = 4,
359 OFPBAC_BAD_ARGUMENT = 5,
360 OFPBAC_EPERM = 6,
361 OFPBAC_TOO_MANY = 7,
362 OFPBAC_BAD_QUEUE = 8,
363 OFPBAC_BAD_OUT_GROUP = 9,
364 OFPBAC_MATCH_INCONSISTENT = 10,
365 OFPBAC_UNSUPPORTED_ORDER = 11,
366 OFPBAC_BAD_TAG = 12,
367 OFPBAC_BAD_SET_TYPE = 13,
368 OFPBAC_BAD_SET_LEN = 14,
369 OFPBAC_BAD_SET_ARGUMENT = 15,
370};
371
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700372enum ofp_bad_instruction_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700373 OFPBIC_UNKNOWN_INST = 0,
374 OFPBIC_UNSUP_INST = 1,
375 OFPBIC_BAD_TABLE_ID = 2,
376 OFPBIC_UNSUP_METADATA = 3,
377 OFPBIC_UNSUP_METADATA_MASK = 4,
378 OFPBIC_BAD_EXPERIMENTER = 5,
379 OFPBIC_BAD_EXP_TYPE = 6,
380 OFPBIC_BAD_LEN = 7,
381 OFPBIC_EPERM = 8,
382};
383
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700384enum ofp_bad_match_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700385 OFPBMC_BAD_TYPE = 0,
386 OFPBMC_BAD_LEN = 1,
387 OFPBMC_BAD_TAG = 2,
388 OFPBMC_BAD_DL_ADDR_MASK = 3,
389 OFPBMC_BAD_NW_ADDR_MASK = 4,
390 OFPBMC_BAD_WILDCARDS = 5,
391 OFPBMC_BAD_FIELD = 6,
392 OFPBMC_BAD_VALUE = 7,
393 OFPBMC_BAD_MASK = 8,
394 OFPBMC_BAD_PREREQ = 9,
395 OFPBMC_DUP_FIELD = 10,
396 OFPBMC_EPERM = 11,
397};
398
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700399enum ofp_flow_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700400 OFPFMFC_UNKNOWN = 0,
401 OFPFMFC_TABLE_FULL = 1,
402 OFPFMFC_BAD_TABLE_ID = 2,
403 OFPFMFC_OVERLAP = 3,
404 OFPFMFC_EPERM = 4,
405 OFPFMFC_BAD_TIMEOUT = 5,
406 OFPFMFC_BAD_COMMAND = 6,
407 OFPFMFC_BAD_FLAGS = 7,
408};
409
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700410enum ofp_group_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700411 OFPGMFC_GROUP_EXISTS = 0,
412 OFPGMFC_INVALID_GROUP = 1,
413 OFPGMFC_WEIGHT_UNSUPPORTED = 2,
414 OFPGMFC_OUT_OF_GROUPS = 3,
415 OFPGMFC_OUT_OF_BUCKETS = 4,
416 OFPGMFC_CHAINING_UNSUPPORTED = 5,
417 OFPGMFC_WATCH_UNSUPPORTED = 6,
418 OFPGMFC_LOOP = 7,
419 OFPGMFC_UNKNOWN_GROUP = 8,
420 OFPGMFC_CHAINED_GROUP = 9,
421 OFPGMFC_BAD_TYPE = 10,
422 OFPGMFC_BAD_COMMAND = 11,
423 OFPGMFC_BAD_BUCKET = 12,
424 OFPGMFC_BAD_WATCH = 13,
425 OFPGMFC_EPERM = 14,
426};
427
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700428enum ofp_port_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700429 OFPPMFC_BAD_PORT = 0,
430 OFPPMFC_BAD_HW_ADDR = 1,
431 OFPPMFC_BAD_CONFIG = 2,
432 OFPPMFC_BAD_ADVERTISE = 3,
433 OFPPMFC_EPERM = 4,
434};
435
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700436enum ofp_table_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700437 OFPTMFC_BAD_TABLE = 0,
438 OFPTMFC_BAD_CONFIG = 1,
439 OFPTMFC_EPERM = 2,
440};
441
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700442enum ofp_queue_op_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700443 OFPQOFC_BAD_PORT = 0,
444 OFPQOFC_BAD_QUEUE = 1,
445 OFPQOFC_EPERM = 2,
446};
447
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700448enum ofp_switch_config_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700449 OFPSCFC_BAD_FLAGS = 0,
450 OFPSCFC_BAD_LEN = 1,
451 OFPSCFC_EPERM = 2,
452};
453
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700454enum ofp_role_request_failed_code(wire_type=uint16_t){
Rich Lane5d33a622013-04-08 17:33:11 -0700455 OFPRRFC_STALE = 0,
456 OFPRRFC_UNSUP = 1,
457 OFPRRFC_BAD_ROLE = 2,
458};
459
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700460enum ofp_meter_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700461 OFPMMFC_UNKNOWN = 0,
462 OFPMMFC_METER_EXISTS = 1,
463 OFPMMFC_INVALID_METER = 2,
464 OFPMMFC_UNKNOWN_METER = 3,
465 OFPMMFC_BAD_COMMAND = 4,
466 OFPMMFC_BAD_FLAGS = 5,
467 OFPMMFC_BAD_RATE = 6,
468 OFPMMFC_BAD_BURST = 7,
469 OFPMMFC_BAD_BAND = 8,
470 OFPMMFC_BAD_BAND_VALUE = 9,
471 OFPMMFC_OUT_OF_METERS = 10,
472 OFPMMFC_OUT_OF_BANDS = 11,
473};
474
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700475enum ofp_table_features_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700476 OFPTFFC_BAD_TABLE = 0,
477 OFPTFFC_BAD_METADATA = 1,
478 OFPTFFC_BAD_TYPE = 2,
479 OFPTFFC_BAD_LEN = 3,
480 OFPTFFC_BAD_ARGUMENT = 4,
481 OFPTFFC_EPERM = 5,
482};
483
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700484enum ofp_multipart_types(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700485 OFPMP_DESC = 0,
486 OFPMP_FLOW = 1,
487 OFPMP_AGGREGATE = 2,
488 OFPMP_TABLE = 3,
489 OFPMP_PORT_STATS = 4,
490 OFPMP_QUEUE = 5,
491 OFPMP_GROUP = 6,
492 OFPMP_GROUP_DESC = 7,
493 OFPMP_GROUP_FEATURES = 8,
494 OFPMP_METER = 9,
495 OFPMP_METER_CONFIG = 10,
496 OFPMP_METER_FEATURES = 11,
497 OFPMP_TABLE_FEATURES = 12,
498 OFPMP_PORT_DESC = 13,
499 OFPMP_EXPERIMENTER = 0xffff,
500};
501
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700502enum ofp_multipart_request_flags(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700503 OFPMPF_REQ_MORE = 0x1,
504};
505
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700506enum ofp_multipart_reply_flags(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700507 OFPMPF_REPLY_MORE = 0x1,
508};
509
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700510enum ofp_table_feature_prop_type(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700511 OFPTFPT_INSTRUCTIONS = 0,
512 OFPTFPT_INSTRUCTIONS_MISS = 1,
513 OFPTFPT_NEXT_TABLES = 2,
514 OFPTFPT_NEXT_TABLES_MISS = 3,
515 OFPTFPT_WRITE_ACTIONS = 4,
516 OFPTFPT_WRITE_ACTIONS_MISS = 5,
517 OFPTFPT_APPLY_ACTIONS = 6,
518 OFPTFPT_APPLY_ACTIONS_MISS = 7,
519 OFPTFPT_MATCH = 8,
520 OFPTFPT_WILDCARDS = 0xa,
521 OFPTFPT_WRITE_SETFIELD = 0xc,
522 OFPTFPT_WRITE_SETFIELD_MISS = 0xd,
523 OFPTFPT_APPLY_SETFIELD = 0xe,
524 OFPTFPT_APPLY_SETFIELD_MISS = 0xf,
525 OFPTFPT_EXPERIMENTER = 0xfffe,
526 OFPTFPT_EXPERIMENTER_MISS = 0xffff,
527};
528
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700529enum ofp_group_capabilities(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700530 OFPGFC_SELECT_WEIGHT = 0x1,
531 OFPGFC_SELECT_LIVENESS = 0x2,
532 OFPGFC_CHAINING = 0x4,
533 OFPGFC_CHAINING_CHECKS = 0x8,
534};
535
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700536enum ofp_queue_properties(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700537 OFPQT_MIN_RATE = 0x1,
538 OFPQT_MAX_RATE = 0x2,
539 OFPQT_EXPERIMENTER = 0xffff,
540};
541
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700542enum ofp_controller_role(wire_type=uint32_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700543 OFPCR_ROLE_NOCHANGE = 0,
544 OFPCR_ROLE_EQUAL = 1,
545 OFPCR_ROLE_MASTER = 2,
546 OFPCR_ROLE_SLAVE = 3,
547};
548
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700549enum ofp_hello_elem_type(wire_type=uint16_t) {
Rich Lane0733cd62013-04-18 21:14:42 -0700550 OFPHET_VERSIONBITMAP = 1,
551};
552
Rich Lane68ae4d72013-05-09 10:55:19 -0700553struct of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700554 uint8_t version;
555 uint8_t type;
556 uint16_t length;
557 uint32_t xid;
558};
559
560// Special structures used for managing scalar list elements
Rich Lane68ae4d72013-05-09 10:55:19 -0700561struct of_uint32 {
Rich Lanea06d0c32013-03-25 08:52:03 -0700562 uint32_t value;
563};
564
565// Special structures used for managing scalar list elements
Rich Lane68ae4d72013-05-09 10:55:19 -0700566struct of_uint8 {
Rich Lanea06d0c32013-03-25 08:52:03 -0700567 uint8_t value;
568};
569
Rich Lane68ae4d72013-05-09 10:55:19 -0700570struct of_hello_elem {
Rich Lanea06d0c32013-03-25 08:52:03 -0700571 uint16_t type;
572 uint16_t length;
573};
574
Rich Lane68ae4d72013-05-09 10:55:19 -0700575struct of_hello_elem_versionbitmap {
Rich Lane31b87142013-05-09 22:05:42 -0700576 uint16_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -0700577 uint16_t length;
578 list(of_uint32_t) bitmaps;
579};
580
Rich Lane68ae4d72013-05-09 10:55:19 -0700581struct of_hello {
Rich Lanea06d0c32013-03-25 08:52:03 -0700582 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700583 uint8_t type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -0700584 uint16_t length;
585 uint32_t xid;
586 list(of_hello_elem_t) elements;
587};
588
Rich Lane68ae4d72013-05-09 10:55:19 -0700589struct of_echo_request {
Rich Lanea06d0c32013-03-25 08:52:03 -0700590 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700591 uint8_t type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -0700592 uint16_t length;
593 uint32_t xid;
594 of_octets_t data;
595};
596
Rich Lane68ae4d72013-05-09 10:55:19 -0700597struct of_echo_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -0700598 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700599 uint8_t type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -0700600 uint16_t length;
601 uint32_t xid;
602 of_octets_t data;
603};
604
Rich Lane68ae4d72013-05-09 10:55:19 -0700605struct of_experimenter {
Rich Lanea06d0c32013-03-25 08:52:03 -0700606 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700607 uint8_t type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -0700608 uint16_t length;
609 uint32_t xid;
610 uint32_t experimenter;
611 uint32_t subtype;
612 of_octets_t data;
613};
614
Rich Lane68ae4d72013-05-09 10:55:19 -0700615struct of_barrier_request {
Rich Lanea06d0c32013-03-25 08:52:03 -0700616 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700617 uint8_t type == 20;
Rich Lanea06d0c32013-03-25 08:52:03 -0700618 uint16_t length;
619 uint32_t xid;
620};
621
Rich Lane68ae4d72013-05-09 10:55:19 -0700622struct of_barrier_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -0700623 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700624 uint8_t type == 21;
Rich Lanea06d0c32013-03-25 08:52:03 -0700625 uint16_t length;
626 uint32_t xid;
627};
628
Rich Lane68ae4d72013-05-09 10:55:19 -0700629struct of_get_config_request {
Rich Lanea06d0c32013-03-25 08:52:03 -0700630 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700631 uint8_t type == 7;
Rich Lanea06d0c32013-03-25 08:52:03 -0700632 uint16_t length;
633 uint32_t xid;
634};
635
Rich Lane68ae4d72013-05-09 10:55:19 -0700636struct of_get_config_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -0700637 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700638 uint8_t type == 8;
Rich Lanea06d0c32013-03-25 08:52:03 -0700639 uint16_t length;
640 uint32_t xid;
641 uint16_t flags;
642 uint16_t miss_send_len;
643};
644
Rich Lane68ae4d72013-05-09 10:55:19 -0700645struct of_set_config {
Rich Lanea06d0c32013-03-25 08:52:03 -0700646 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700647 uint8_t type == 9;
Rich Lanea06d0c32013-03-25 08:52:03 -0700648 uint16_t length;
649 uint32_t xid;
650 uint16_t flags;
651 uint16_t miss_send_len;
652};
653
Rich Lane68ae4d72013-05-09 10:55:19 -0700654struct of_table_mod {
Rich Lanea06d0c32013-03-25 08:52:03 -0700655 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700656 uint8_t type == 17;
Rich Lanea06d0c32013-03-25 08:52:03 -0700657 uint16_t length;
658 uint32_t xid;
659 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700660 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700661 uint32_t config;
662};
663
Rich Lane68ae4d72013-05-09 10:55:19 -0700664struct of_port_desc {
Rich Lanea06d0c32013-03-25 08:52:03 -0700665 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700666 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700667 of_mac_addr_t hw_addr;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700668 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700669 of_port_name_t name;
670 uint32_t config;
671 uint32_t state;
672 uint32_t curr;
673 uint32_t advertised;
674 uint32_t supported;
675 uint32_t peer;
676 uint32_t curr_speed;
677 uint32_t max_speed;
678};
679
Rich Lane68ae4d72013-05-09 10:55:19 -0700680struct of_features_request {
Rich Lanea06d0c32013-03-25 08:52:03 -0700681 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700682 uint8_t type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -0700683 uint16_t length;
684 uint32_t xid;
685};
686
Rich Lane68ae4d72013-05-09 10:55:19 -0700687struct of_features_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -0700688 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700689 uint8_t type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -0700690 uint16_t length;
691 uint32_t xid;
692 uint64_t datapath_id;
693 uint32_t n_buffers;
694 uint8_t n_tables;
695 uint8_t auxiliary_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700696 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700697 uint32_t capabilities;
698 uint32_t reserved;
699};
700
Rich Lane68ae4d72013-05-09 10:55:19 -0700701struct of_port_status {
Rich Lanea06d0c32013-03-25 08:52:03 -0700702 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700703 uint8_t type == 12;
Rich Lanea06d0c32013-03-25 08:52:03 -0700704 uint16_t length;
705 uint32_t xid;
706 uint8_t reason;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700707 pad(7);
Rich Lanea06d0c32013-03-25 08:52:03 -0700708 of_port_desc_t desc;
709};
710
Rich Lane68ae4d72013-05-09 10:55:19 -0700711struct of_port_mod {
Rich Lanea06d0c32013-03-25 08:52:03 -0700712 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700713 uint8_t type == 16;
Rich Lanea06d0c32013-03-25 08:52:03 -0700714 uint16_t length;
715 uint32_t xid;
716 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700717 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700718 of_mac_addr_t hw_addr;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700719 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700720 uint32_t config;
721 uint32_t mask;
722 uint32_t advertise;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700723 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700724};
725
726// FIXME Does this need to be v4?
Rich Lane68ae4d72013-05-09 10:55:19 -0700727struct of_match_v3 {
Rich Lane31b87142013-05-09 22:05:42 -0700728 uint16_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -0700729 uint16_t length;
730 list(of_oxm_t) oxm_list;
731};
732
Rich Lanea06d0c32013-03-25 08:52:03 -0700733// This looks like an action header, but is standalone. See
734// ofp_table_features_prop_actions
Rich Lane68ae4d72013-05-09 10:55:19 -0700735struct of_action_id {
Rich Lanea06d0c32013-03-25 08:52:03 -0700736 uint16_t type;
737 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700738 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700739};
740
Rich Lane68ae4d72013-05-09 10:55:19 -0700741struct of_action_output {
Rich Lane31b87142013-05-09 22:05:42 -0700742 uint16_t type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -0700743 uint16_t len;
744 of_port_no_t port;
745 uint16_t max_len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700746 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -0700747};
748
Rich Lane68ae4d72013-05-09 10:55:19 -0700749struct of_action_copy_ttl_out {
Rich Lane31b87142013-05-09 22:05:42 -0700750 uint16_t type == 11;
Rich Lanea06d0c32013-03-25 08:52:03 -0700751 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700752 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700753};
754
Rich Lane68ae4d72013-05-09 10:55:19 -0700755struct of_action_copy_ttl_in {
Rich Lane31b87142013-05-09 22:05:42 -0700756 uint16_t type == 12;
Rich Lanea06d0c32013-03-25 08:52:03 -0700757 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700758 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700759};
760
Rich Lane68ae4d72013-05-09 10:55:19 -0700761struct of_action_set_mpls_ttl {
Rich Lane31b87142013-05-09 22:05:42 -0700762 uint16_t type == 15;
Rich Lanea06d0c32013-03-25 08:52:03 -0700763 uint16_t len;
764 uint8_t mpls_ttl;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700765 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700766};
767
Rich Lane68ae4d72013-05-09 10:55:19 -0700768struct of_action_dec_mpls_ttl {
Rich Lane31b87142013-05-09 22:05:42 -0700769 uint16_t type == 16;
Rich Lanea06d0c32013-03-25 08:52:03 -0700770 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700771 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700772};
773
Rich Lane68ae4d72013-05-09 10:55:19 -0700774struct of_action_push_vlan {
Rich Lane31b87142013-05-09 22:05:42 -0700775 uint16_t type == 17;
Rich Lanea06d0c32013-03-25 08:52:03 -0700776 uint16_t len;
777 uint16_t ethertype;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700778 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700779};
780
Rich Lane68ae4d72013-05-09 10:55:19 -0700781struct of_action_pop_vlan {
Rich Lane31b87142013-05-09 22:05:42 -0700782 uint16_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -0700783 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700784 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700785};
786
Rich Lane68ae4d72013-05-09 10:55:19 -0700787struct of_action_push_mpls {
Rich Lane31b87142013-05-09 22:05:42 -0700788 uint16_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -0700789 uint16_t len;
790 uint16_t ethertype;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700791 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700792};
793
Rich Lane68ae4d72013-05-09 10:55:19 -0700794struct of_action_pop_mpls {
Rich Lane31b87142013-05-09 22:05:42 -0700795 uint16_t type == 20;
Rich Lanea06d0c32013-03-25 08:52:03 -0700796 uint16_t len;
797 uint16_t ethertype;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700798 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700799};
800
Rich Lane68ae4d72013-05-09 10:55:19 -0700801struct of_action_set_queue {
Rich Lane31b87142013-05-09 22:05:42 -0700802 uint16_t type == 21;
Rich Lanea06d0c32013-03-25 08:52:03 -0700803 uint16_t len;
804 uint32_t queue_id;
805};
806
Rich Lane68ae4d72013-05-09 10:55:19 -0700807struct of_action_group {
Rich Lane31b87142013-05-09 22:05:42 -0700808 uint16_t type == 22;
Rich Lanea06d0c32013-03-25 08:52:03 -0700809 uint16_t len;
810 uint32_t group_id;
811};
812
Rich Lane68ae4d72013-05-09 10:55:19 -0700813struct of_action_set_nw_ttl {
Rich Lane31b87142013-05-09 22:05:42 -0700814 uint16_t type == 23;
Rich Lanea06d0c32013-03-25 08:52:03 -0700815 uint16_t len;
816 uint8_t nw_ttl;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700817 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700818};
819
Rich Lane68ae4d72013-05-09 10:55:19 -0700820struct of_action_dec_nw_ttl {
Rich Lane31b87142013-05-09 22:05:42 -0700821 uint16_t type == 24;
Rich Lanea06d0c32013-03-25 08:52:03 -0700822 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700823 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700824};
825
Rich Lane68ae4d72013-05-09 10:55:19 -0700826struct of_action_set_field {
Rich Lane31b87142013-05-09 22:05:42 -0700827 uint16_t type == 25;
Rich Lanea06d0c32013-03-25 08:52:03 -0700828 uint16_t len;
Rich Lanebe90eae2013-07-22 16:44:26 -0700829 of_oxm_t field;
Rich Lanea06d0c32013-03-25 08:52:03 -0700830};
831
Rich Lane68ae4d72013-05-09 10:55:19 -0700832struct of_action_experimenter {
Rich Lane31b87142013-05-09 22:05:42 -0700833 uint16_t type == 65535;
Rich Lanea06d0c32013-03-25 08:52:03 -0700834 uint16_t len;
835 uint32_t experimenter;
836 of_octets_t data;
837};
838
Rich Lane68ae4d72013-05-09 10:55:19 -0700839struct of_action_pop_pbb {
Rich Lane31b87142013-05-09 22:05:42 -0700840 uint16_t type == 27;
Rich Lanea06d0c32013-03-25 08:52:03 -0700841 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700842 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700843};
844
Rich Lane68ae4d72013-05-09 10:55:19 -0700845struct of_action_push_pbb {
Rich Lane31b87142013-05-09 22:05:42 -0700846 uint16_t type == 26;
Rich Lanea06d0c32013-03-25 08:52:03 -0700847 uint16_t len;
848 uint16_t ethertype;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700849 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700850};
851
Rich Lane68ae4d72013-05-09 10:55:19 -0700852struct of_action {
Rich Lanea06d0c32013-03-25 08:52:03 -0700853 uint16_t type;
854 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700855 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700856};
857
Rich Lane68ae4d72013-05-09 10:55:19 -0700858struct of_instruction {
Rich Lanea06d0c32013-03-25 08:52:03 -0700859 uint16_t type;
860 uint16_t len;
861};
862
Rich Lane68ae4d72013-05-09 10:55:19 -0700863struct of_instruction_goto_table {
Rich Lane31b87142013-05-09 22:05:42 -0700864 uint16_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -0700865 uint16_t len;
866 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700867 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700868};
869
Rich Lane68ae4d72013-05-09 10:55:19 -0700870struct of_instruction_write_metadata {
Rich Lane31b87142013-05-09 22:05:42 -0700871 uint16_t type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -0700872 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700873 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700874 uint64_t metadata;
875 uint64_t metadata_mask;
876};
877
Rich Lane68ae4d72013-05-09 10:55:19 -0700878struct of_instruction_write_actions {
Rich Lane31b87142013-05-09 22:05:42 -0700879 uint16_t type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -0700880 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700881 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700882 list(of_action_t) actions;
883};
884
Rich Lane68ae4d72013-05-09 10:55:19 -0700885struct of_instruction_apply_actions {
Rich Lane31b87142013-05-09 22:05:42 -0700886 uint16_t type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -0700887 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700888 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700889 list(of_action_t) actions;
890};
891
Rich Lane68ae4d72013-05-09 10:55:19 -0700892struct of_instruction_clear_actions {
Rich Lane31b87142013-05-09 22:05:42 -0700893 uint16_t type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -0700894 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700895 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700896};
897
Rich Lane68ae4d72013-05-09 10:55:19 -0700898struct of_instruction_meter {
Rich Lane31b87142013-05-09 22:05:42 -0700899 uint16_t type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -0700900 uint16_t len;
901 uint32_t meter_id;
902};
903
Rich Lane68ae4d72013-05-09 10:55:19 -0700904struct of_instruction_experimenter {
Rich Lane31b87142013-05-09 22:05:42 -0700905 uint16_t type == 65535;
Rich Lanea06d0c32013-03-25 08:52:03 -0700906 uint16_t len;
907 uint32_t experimenter;
908 of_octets_t data;
909};
910
Rich Lane68ae4d72013-05-09 10:55:19 -0700911struct of_flow_add {
Rich Lanea06d0c32013-03-25 08:52:03 -0700912 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700913 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700914 uint16_t length;
915 uint32_t xid;
916 uint64_t cookie;
917 uint64_t cookie_mask;
918 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700919 of_fm_cmd_t _command == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -0700920 uint16_t idle_timeout;
921 uint16_t hard_timeout;
922 uint16_t priority;
923 uint32_t buffer_id;
924 of_port_no_t out_port;
925 uint32_t out_group;
926 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700927 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700928 of_match_t match;
929 list(of_instruction_t) instructions;
930};
931
Rich Lane68ae4d72013-05-09 10:55:19 -0700932struct of_flow_modify {
Rich Lanea06d0c32013-03-25 08:52:03 -0700933 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700934 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700935 uint16_t length;
936 uint32_t xid;
937 uint64_t cookie;
938 uint64_t cookie_mask;
939 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700940 of_fm_cmd_t _command == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -0700941 uint16_t idle_timeout;
942 uint16_t hard_timeout;
943 uint16_t priority;
944 uint32_t buffer_id;
945 of_port_no_t out_port;
946 uint32_t out_group;
947 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700948 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700949 of_match_t match;
950 list(of_instruction_t) instructions;
951};
952
Rich Lane68ae4d72013-05-09 10:55:19 -0700953struct of_flow_modify_strict {
Rich Lanea06d0c32013-03-25 08:52:03 -0700954 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700955 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700956 uint16_t length;
957 uint32_t xid;
958 uint64_t cookie;
959 uint64_t cookie_mask;
960 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700961 of_fm_cmd_t _command == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -0700962 uint16_t idle_timeout;
963 uint16_t hard_timeout;
964 uint16_t priority;
965 uint32_t buffer_id;
966 of_port_no_t out_port;
967 uint32_t out_group;
968 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700969 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700970 of_match_t match;
971 list(of_instruction_t) instructions;
972};
973
Rich Lane68ae4d72013-05-09 10:55:19 -0700974struct of_flow_delete {
Rich Lanea06d0c32013-03-25 08:52:03 -0700975 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700976 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700977 uint16_t length;
978 uint32_t xid;
979 uint64_t cookie;
980 uint64_t cookie_mask;
981 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700982 of_fm_cmd_t _command == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -0700983 uint16_t idle_timeout;
984 uint16_t hard_timeout;
985 uint16_t priority;
986 uint32_t buffer_id;
987 of_port_no_t out_port;
988 uint32_t out_group;
989 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700990 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700991 of_match_t match;
992 list(of_instruction_t) instructions;
993};
994
Rich Lane68ae4d72013-05-09 10:55:19 -0700995struct of_flow_delete_strict {
Rich Lanea06d0c32013-03-25 08:52:03 -0700996 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700997 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700998 uint16_t length;
999 uint32_t xid;
1000 uint64_t cookie;
1001 uint64_t cookie_mask;
1002 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -07001003 of_fm_cmd_t _command == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -07001004 uint16_t idle_timeout;
1005 uint16_t hard_timeout;
1006 uint16_t priority;
1007 uint32_t buffer_id;
1008 of_port_no_t out_port;
1009 uint32_t out_group;
1010 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001011 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -07001012 of_match_t match;
1013 list(of_instruction_t) instructions;
1014};
1015
Rich Lane68ae4d72013-05-09 10:55:19 -07001016struct of_bucket {
Rich Lanea06d0c32013-03-25 08:52:03 -07001017 uint16_t len;
1018 uint16_t weight;
1019 of_port_no_t watch_port;
1020 uint32_t watch_group;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001021 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001022 list(of_action_t) actions;
1023};
1024
Rich Lane68ae4d72013-05-09 10:55:19 -07001025struct of_group_mod {
Rich Lanea06d0c32013-03-25 08:52:03 -07001026 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001027 uint8_t type == 15;
Rich Lanea06d0c32013-03-25 08:52:03 -07001028 uint16_t length;
1029 uint32_t xid;
1030 uint16_t command;
1031 uint8_t group_type;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001032 pad(1);
Rich Lanea06d0c32013-03-25 08:52:03 -07001033 uint32_t group_id;
1034 list(of_bucket_t) buckets;
1035};
1036
Rich Lane68ae4d72013-05-09 10:55:19 -07001037struct of_packet_out {
Rich Lanea06d0c32013-03-25 08:52:03 -07001038 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001039 uint8_t type == 13;
Rich Lanea06d0c32013-03-25 08:52:03 -07001040 uint16_t length;
1041 uint32_t xid;
1042 uint32_t buffer_id;
1043 of_port_no_t in_port;
1044 uint16_t actions_len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001045 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -07001046 list(of_action_t) actions;
1047 of_octets_t data;
1048};
1049
Rich Lane68ae4d72013-05-09 10:55:19 -07001050struct of_packet_in {
Rich Lanea06d0c32013-03-25 08:52:03 -07001051 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001052 uint8_t type == 10;
Rich Lanea06d0c32013-03-25 08:52:03 -07001053 uint16_t length;
1054 uint32_t xid;
1055 uint32_t buffer_id;
1056 uint16_t total_len;
1057 uint8_t reason;
1058 uint8_t table_id;
1059 uint64_t cookie;
1060 of_match_t match;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001061 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -07001062 of_octets_t data; /* FIXME: Ensure total_len gets updated */
1063};
1064
Rich Lane68ae4d72013-05-09 10:55:19 -07001065struct of_flow_removed {
Rich Lanea06d0c32013-03-25 08:52:03 -07001066 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001067 uint8_t type == 11;
Rich Lanea06d0c32013-03-25 08:52:03 -07001068 uint16_t length;
1069 uint32_t xid;
1070 uint64_t cookie;
1071 uint16_t priority;
1072 uint8_t reason;
1073 uint8_t table_id;
1074 uint32_t duration_sec;
1075 uint32_t duration_nsec;
1076 uint16_t idle_timeout;
1077 uint16_t hard_timeout;
1078 uint64_t packet_count;
1079 uint64_t byte_count;
1080 of_match_t match;
1081};
1082
Rich Lane68ae4d72013-05-09 10:55:19 -07001083struct of_meter_band {
Rich Lanea06d0c32013-03-25 08:52:03 -07001084 uint16_t type;
1085 uint16_t len;
1086// uint32_t rate; // These are excluded b/c this is the header
1087// uint32_t burst_size; // These are excluded b/c this is the header
1088};
1089
Rich Lane68ae4d72013-05-09 10:55:19 -07001090struct of_meter_band_drop {
Rich Lane31b87142013-05-09 22:05:42 -07001091 uint16_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001092 uint16_t len;
1093 uint32_t rate;
1094 uint32_t burst_size;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001095 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001096};
1097
Rich Lane68ae4d72013-05-09 10:55:19 -07001098struct of_meter_band_dscp_remark {
Rich Lane31b87142013-05-09 22:05:42 -07001099 uint16_t type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -07001100 uint16_t len;
1101 uint32_t rate;
1102 uint32_t burst_size;
1103 uint8_t prec_level;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001104 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -07001105};
1106
Rich Lane68ae4d72013-05-09 10:55:19 -07001107struct of_meter_band_experimenter {
Rich Lane31b87142013-05-09 22:05:42 -07001108 uint16_t type == 65535;
Rich Lanea06d0c32013-03-25 08:52:03 -07001109 uint16_t len;
1110 uint32_t rate;
1111 uint32_t burst_size;
1112 uint32_t experimenter;
1113};
1114
Rich Lane68ae4d72013-05-09 10:55:19 -07001115struct of_meter_mod {
Rich Lanea06d0c32013-03-25 08:52:03 -07001116 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001117 uint8_t type == 29;
Rich Lanea06d0c32013-03-25 08:52:03 -07001118 uint16_t length;
1119 uint32_t xid;
1120 uint16_t command;
1121 uint16_t flags;
1122 uint32_t meter_id;
1123 list(of_meter_band_t) meters;
1124};
1125
Rich Lane68ae4d72013-05-09 10:55:19 -07001126struct of_error_msg {
Rich Lanea06d0c32013-03-25 08:52:03 -07001127 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001128 uint8_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001129 uint16_t length;
1130 uint32_t xid;
1131 uint16_t err_type;
1132 uint16_t code;
1133 of_octets_t data;
1134};
1135
Rich Lane68ae4d72013-05-09 10:55:19 -07001136//struct of_error_experimenter_msg {
Rich Lanea06d0c32013-03-25 08:52:03 -07001137// uint8_t version;
1138// uint8_t type;
1139// uint16_t length;
1140// uint32_t xid;
1141// uint16_t err_type;
1142// uint16_t subtype;
1143// uint32_t experimenter;
1144// of_octets_t data;
1145//};
1146
1147// STATS ENTRIES: flow, table, port, queue, group stats, group desc stats
1148
Rich Lane68ae4d72013-05-09 10:55:19 -07001149struct of_flow_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001150 uint16_t length;
1151 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001152 pad(1);
Rich Lanea06d0c32013-03-25 08:52:03 -07001153 uint32_t duration_sec;
1154 uint32_t duration_nsec;
1155 uint16_t priority;
1156 uint16_t idle_timeout;
1157 uint16_t hard_timeout;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001158 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -07001159 uint64_t cookie;
1160 uint64_t packet_count;
1161 uint64_t byte_count;
1162 of_match_t match;
1163 list(of_instruction_t) instructions;
1164};
1165
1166
Rich Lane68ae4d72013-05-09 10:55:19 -07001167struct of_table_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001168 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001169 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -07001170 uint32_t active_count;
1171 uint64_t lookup_count;
1172 uint64_t matched_count;
1173};
1174
Rich Lane68ae4d72013-05-09 10:55:19 -07001175struct of_port_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001176 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001177 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001178 uint64_t rx_packets;
1179 uint64_t tx_packets;
1180 uint64_t rx_bytes;
1181 uint64_t tx_bytes;
1182 uint64_t rx_dropped;
1183 uint64_t tx_dropped;
1184 uint64_t rx_errors;
1185 uint64_t tx_errors;
1186 uint64_t rx_frame_err;
1187 uint64_t rx_over_err;
1188 uint64_t rx_crc_err;
1189 uint64_t collisions;
1190 uint32_t duration_sec;
1191 uint32_t duration_nsec;
1192};
1193
Rich Lane68ae4d72013-05-09 10:55:19 -07001194struct of_queue_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001195 of_port_no_t port_no;
1196 uint32_t queue_id;
1197 uint64_t tx_bytes;
1198 uint64_t tx_packets;
1199 uint64_t tx_errors;
1200 uint32_t duration_sec;
1201 uint32_t duration_nsec;
1202};
1203
Rich Lane68ae4d72013-05-09 10:55:19 -07001204struct of_bucket_counter {
Rich Lanea06d0c32013-03-25 08:52:03 -07001205 uint64_t packet_count;
1206 uint64_t byte_count;
1207};
1208
Rich Lane68ae4d72013-05-09 10:55:19 -07001209struct of_group_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001210 uint16_t length;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001211 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -07001212 uint32_t group_id;
1213 uint32_t ref_count;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001214 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001215 uint64_t packet_count;
1216 uint64_t byte_count;
1217 uint32_t duration_sec;
1218 uint32_t duration_nsec;
1219 list(of_bucket_counter_t) bucket_stats;
1220};
1221
Rich Lane68ae4d72013-05-09 10:55:19 -07001222struct of_group_desc_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001223 uint16_t length;
1224 uint8_t type;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001225 pad(1);
Rich Lanea06d0c32013-03-25 08:52:03 -07001226 uint32_t group_id;
1227 list(of_bucket_t) buckets;
1228};
1229
1230// STATS:
1231// Desc, flow, agg, table, port, queue, group, group_desc, group_feat, experi
1232
Rich Lane68ae4d72013-05-09 10:55:19 -07001233struct of_desc_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001234 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001235 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001236 uint16_t length;
1237 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001238 uint16_t stats_type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -07001239 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001240 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001241};
1242
Rich Lane68ae4d72013-05-09 10:55:19 -07001243struct of_desc_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001244 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001245 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001246 uint16_t length;
1247 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001248 uint16_t stats_type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -07001249 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001250 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001251 of_desc_str_t mfr_desc;
1252 of_desc_str_t hw_desc;
1253 of_desc_str_t sw_desc;
1254 of_serial_num_t serial_num;
1255 of_desc_str_t dp_desc;
1256};
1257
Rich Lane68ae4d72013-05-09 10:55:19 -07001258struct of_flow_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001259 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001260 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001261 uint16_t length;
1262 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001263 uint16_t stats_type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001264 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001265 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001266 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001267 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -07001268 of_port_no_t out_port;
1269 uint32_t out_group;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001270 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001271 uint64_t cookie;
1272 uint64_t cookie_mask;
1273 of_match_t match;
1274};
1275
Rich Lane68ae4d72013-05-09 10:55:19 -07001276struct of_flow_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001277 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001278 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001279 uint16_t length;
1280 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001281 uint16_t stats_type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001282 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001283 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001284 list(of_flow_stats_entry_t) entries;
1285};
1286
Rich Lane68ae4d72013-05-09 10:55:19 -07001287struct of_aggregate_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001288 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001289 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001290 uint16_t length;
1291 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001292 uint16_t stats_type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -07001293 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001294 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001295 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001296 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -07001297 of_port_no_t out_port;
1298 uint32_t out_group;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001299 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001300 uint64_t cookie;
1301 uint64_t cookie_mask;
1302 of_match_t match;
1303};
1304
Rich Lane68ae4d72013-05-09 10:55:19 -07001305struct of_aggregate_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001306 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001307 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001308 uint16_t length;
1309 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001310 uint16_t stats_type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -07001311 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001312 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001313 uint64_t packet_count;
1314 uint64_t byte_count;
1315 uint32_t flow_count;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001316 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001317};
1318
Rich Lane68ae4d72013-05-09 10:55:19 -07001319struct of_table_stats_request {
Rich Lane8bfdafc2013-05-02 14:54:42 -07001320 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001321 uint8_t type == 18;
Rich Lane8bfdafc2013-05-02 14:54:42 -07001322 uint16_t length;
1323 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001324 uint16_t stats_type == 3;
Rich Lane8bfdafc2013-05-02 14:54:42 -07001325 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001326 pad(4);
Rich Lane8bfdafc2013-05-02 14:54:42 -07001327};
1328
Rich Lane68ae4d72013-05-09 10:55:19 -07001329struct of_table_stats_reply {
Rich Lane8bfdafc2013-05-02 14:54:42 -07001330 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001331 uint8_t type == 19;
Rich Lane8bfdafc2013-05-02 14:54:42 -07001332 uint16_t length;
1333 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001334 uint16_t stats_type == 3;
Rich Lane8bfdafc2013-05-02 14:54:42 -07001335 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001336 pad(4);
Rich Lane8bfdafc2013-05-02 14:54:42 -07001337 list(of_table_stats_entry_t) entries;
1338};
1339
Rich Lanea06d0c32013-03-25 08:52:03 -07001340// FIXME: These are padded to 8 byte align beyond the length indicated
1341
Rich Lane68ae4d72013-05-09 10:55:19 -07001342struct of_table_feature_prop {
Rich Lanea06d0c32013-03-25 08:52:03 -07001343 uint16_t type;
1344 uint16_t length;
1345};
1346
Rich Lane68ae4d72013-05-09 10:55:19 -07001347struct of_table_feature_prop_instructions {
Rich Lane31b87142013-05-09 22:05:42 -07001348 uint16_t type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -07001349 uint16_t length;
1350 // FIXME Check if instruction_t is right for ids here
1351 list(of_instruction_t) instruction_ids;
1352};
1353
Rich Lane68ae4d72013-05-09 10:55:19 -07001354struct of_table_feature_prop_instructions_miss {
Rich Lane31b87142013-05-09 22:05:42 -07001355 uint16_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001356 uint16_t length;
1357 list(of_instruction_t) instruction_ids;
1358};
1359
Rich Lane68ae4d72013-05-09 10:55:19 -07001360struct of_table_feature_prop_next_tables {
Rich Lane31b87142013-05-09 22:05:42 -07001361 uint16_t type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -07001362 uint16_t length;
1363 list(of_uint8_t) next_table_ids;
1364};
1365
Rich Lane68ae4d72013-05-09 10:55:19 -07001366struct of_table_feature_prop_next_tables_miss {
Rich Lane31b87142013-05-09 22:05:42 -07001367 uint16_t type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -07001368 uint16_t length;
1369 list(of_uint8_t) next_table_ids;
1370};
1371
Rich Lane68ae4d72013-05-09 10:55:19 -07001372struct of_table_feature_prop_write_actions {
Rich Lane31b87142013-05-09 22:05:42 -07001373 uint16_t type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -07001374 uint16_t length;
1375 list(of_action_id_t) action_ids;
1376};
1377
Rich Lane68ae4d72013-05-09 10:55:19 -07001378struct of_table_feature_prop_write_actions_miss {
Rich Lane31b87142013-05-09 22:05:42 -07001379 uint16_t type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -07001380 uint16_t length;
1381 list(of_action_id_t) action_ids;
1382};
1383
Rich Lane68ae4d72013-05-09 10:55:19 -07001384struct of_table_feature_prop_apply_actions {
Rich Lane31b87142013-05-09 22:05:42 -07001385 uint16_t type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -07001386 uint16_t length;
1387 list(of_action_id_t) action_ids;
1388};
1389
Rich Lane68ae4d72013-05-09 10:55:19 -07001390struct of_table_feature_prop_apply_actions_miss {
Rich Lane31b87142013-05-09 22:05:42 -07001391 uint16_t type == 7;
Rich Lanea06d0c32013-03-25 08:52:03 -07001392 uint16_t length;
1393 list(of_action_id_t) action_ids;
1394};
1395
Rich Lane68ae4d72013-05-09 10:55:19 -07001396struct of_table_feature_prop_match {
Rich Lane31b87142013-05-09 22:05:42 -07001397 uint16_t type == 8;
Rich Lanea06d0c32013-03-25 08:52:03 -07001398 uint16_t length;
1399 list(of_uint32_t) oxm_ids;
1400};
1401
Rich Lane68ae4d72013-05-09 10:55:19 -07001402struct of_table_feature_prop_wildcards {
Rich Lane31b87142013-05-09 22:05:42 -07001403 uint16_t type == 10;
Rich Lanea06d0c32013-03-25 08:52:03 -07001404 uint16_t length;
1405 list(of_uint32_t) oxm_ids;
1406};
1407
Rich Lane68ae4d72013-05-09 10:55:19 -07001408struct of_table_feature_prop_write_setfield {
Rich Lane31b87142013-05-09 22:05:42 -07001409 uint16_t type == 12;
Rich Lanea06d0c32013-03-25 08:52:03 -07001410 uint16_t length;
1411 list(of_uint32_t) oxm_ids;
1412};
1413
Rich Lane68ae4d72013-05-09 10:55:19 -07001414struct of_table_feature_prop_write_setfield_miss {
Rich Lane31b87142013-05-09 22:05:42 -07001415 uint16_t type == 13;
Rich Lanea06d0c32013-03-25 08:52:03 -07001416 uint16_t length;
1417 list(of_uint32_t) oxm_ids;
1418};
1419
Rich Lane68ae4d72013-05-09 10:55:19 -07001420struct of_table_feature_prop_apply_setfield {
Rich Lane31b87142013-05-09 22:05:42 -07001421 uint16_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -07001422 uint16_t length;
1423 list(of_uint32_t) oxm_ids;
1424};
1425
Rich Lane68ae4d72013-05-09 10:55:19 -07001426struct of_table_feature_prop_apply_setfield_miss {
Rich Lane31b87142013-05-09 22:05:42 -07001427 uint16_t type == 15;
Rich Lanea06d0c32013-03-25 08:52:03 -07001428 uint16_t length;
1429 list(of_uint32_t) oxm_ids;
1430};
1431
Rich Lane68ae4d72013-05-09 10:55:19 -07001432struct of_table_feature_prop_experimenter {
Rich Lane31b87142013-05-09 22:05:42 -07001433 uint16_t type == 65535;
Rich Lanea06d0c32013-03-25 08:52:03 -07001434 uint16_t length;
1435 uint32_t experimenter;
1436 uint32_t subtype;
1437 of_octets_t experimenter_data;
1438};
1439
1440// Not yet supported
Rich Lane68ae4d72013-05-09 10:55:19 -07001441// struct of_table_feature_prop_experimenter_miss {
Rich Lanea06d0c32013-03-25 08:52:03 -07001442// uint16_t type;
1443// uint16_t length;
1444// uint32_t experimenter;
1445// uint32_t subtype;
1446// of_octets_t experimenter_data;
1447// };
1448
Rich Lane68ae4d72013-05-09 10:55:19 -07001449struct of_table_features {
Rich Lanea06d0c32013-03-25 08:52:03 -07001450 uint16_t length;
1451 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001452 pad(5);
Rich Lanea06d0c32013-03-25 08:52:03 -07001453 of_table_name_t name;
1454 uint64_t metadata_match;
1455 uint64_t metadata_write;
1456 uint32_t config;
1457 uint32_t max_entries;
1458 list(of_table_feature_prop_t) properties;
1459};
1460
Rich Lane68ae4d72013-05-09 10:55:19 -07001461struct of_meter_features {
Rich Lanea06d0c32013-03-25 08:52:03 -07001462 uint32_t max_meter;
1463 uint32_t band_types;
1464 uint32_t capabilities;
1465 uint8_t max_bands;
1466 uint8_t max_color;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001467 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -07001468};
1469
Rich Lane68ae4d72013-05-09 10:55:19 -07001470struct of_port_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001471 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001472 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001473 uint16_t length;
1474 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001475 uint16_t stats_type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -07001476 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001477 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001478 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001479 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001480};
1481
Rich Lane68ae4d72013-05-09 10:55:19 -07001482struct of_port_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001483 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001484 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001485 uint16_t length;
1486 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001487 uint16_t stats_type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -07001488 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001489 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001490 list(of_port_stats_entry_t) entries;
1491};
1492
Rich Lane68ae4d72013-05-09 10:55:19 -07001493struct of_queue_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001494 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001495 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001496 uint16_t length;
1497 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001498 uint16_t stats_type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -07001499 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001500 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001501 of_port_no_t port_no;
1502 uint32_t queue_id;
1503};
1504
Rich Lane68ae4d72013-05-09 10:55:19 -07001505struct of_queue_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001506 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001507 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001508 uint16_t length;
1509 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001510 uint16_t stats_type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -07001511 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001512 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001513 list(of_queue_stats_entry_t) entries;
1514};
1515
Rich Lane68ae4d72013-05-09 10:55:19 -07001516struct of_group_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001517 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001518 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001519 uint16_t length;
1520 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001521 uint16_t stats_type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -07001522 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001523 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001524 uint32_t group_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001525 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001526};
1527
Rich Lane68ae4d72013-05-09 10:55:19 -07001528struct of_group_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001529 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001530 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001531 uint16_t length;
1532 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001533 uint16_t stats_type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -07001534 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001535 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001536 list(of_group_stats_entry_t) entries;
1537};
1538
Rich Lane68ae4d72013-05-09 10:55:19 -07001539struct of_group_desc_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001540 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001541 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001542 uint16_t length;
1543 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001544 uint16_t stats_type == 7;
Rich Lanea06d0c32013-03-25 08:52:03 -07001545 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001546 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001547};
1548
Rich Lane68ae4d72013-05-09 10:55:19 -07001549struct of_group_desc_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001550 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001551 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001552 uint16_t length;
1553 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001554 uint16_t stats_type == 7;
Rich Lanea06d0c32013-03-25 08:52:03 -07001555 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001556 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001557 list(of_group_desc_stats_entry_t) entries;
1558};
1559
Rich Lane68ae4d72013-05-09 10:55:19 -07001560struct of_group_features_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001561 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001562 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001563 uint16_t length;
1564 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001565 uint16_t stats_type == 8;
Rich Lanea06d0c32013-03-25 08:52:03 -07001566 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001567 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001568};
1569
Rich Lane68ae4d72013-05-09 10:55:19 -07001570struct of_group_features_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001571 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001572 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001573 uint16_t length;
1574 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001575 uint16_t stats_type == 8;
Rich Lanea06d0c32013-03-25 08:52:03 -07001576 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001577 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001578 uint32_t types;
1579 uint32_t capabilities;
1580 uint32_t max_groups_all;
1581 uint32_t max_groups_select;
1582 uint32_t max_groups_indirect;
1583 uint32_t max_groups_ff;
1584 uint32_t actions_all;
1585 uint32_t actions_select;
1586 uint32_t actions_indirect;
1587 uint32_t actions_ff;
1588};
1589
Rich Lane68ae4d72013-05-09 10:55:19 -07001590struct of_meter_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001591 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001592 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001593 uint16_t length;
1594 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001595 uint16_t stats_type == 9;
Rich Lanea06d0c32013-03-25 08:52:03 -07001596 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001597 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001598 uint32_t meter_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001599 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001600};
1601
Rich Lane68ae4d72013-05-09 10:55:19 -07001602struct of_meter_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001603 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001604 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001605 uint16_t length;
1606 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001607 uint16_t stats_type == 9;
Rich Lanea06d0c32013-03-25 08:52:03 -07001608 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001609 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001610 list(of_meter_stats_t) entries;
1611};
1612
Rich Lane68ae4d72013-05-09 10:55:19 -07001613struct of_meter_config_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001614 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001615 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001616 uint16_t length;
1617 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001618 uint16_t stats_type == 10;
Rich Lanea06d0c32013-03-25 08:52:03 -07001619 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001620 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001621 uint32_t meter_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001622 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001623};
1624
Rich Lane68ae4d72013-05-09 10:55:19 -07001625struct of_meter_config_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001626 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001627 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001628 uint16_t length;
1629 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001630 uint16_t stats_type == 10;
Rich Lanea06d0c32013-03-25 08:52:03 -07001631 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001632 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001633 list(of_meter_band_t) entries;
1634};
1635
1636// FIXME stats added to get things working
Rich Lane68ae4d72013-05-09 10:55:19 -07001637struct of_meter_features_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001638 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001639 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001640 uint16_t length;
1641 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001642 uint16_t stats_type == 11;
Rich Lanea06d0c32013-03-25 08:52:03 -07001643 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001644 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001645};
1646
1647// FIXME stats added to get things working
Rich Lane68ae4d72013-05-09 10:55:19 -07001648struct of_meter_features_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001649 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001650 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001651 uint16_t length;
1652 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001653 uint16_t stats_type == 11;
Rich Lanea06d0c32013-03-25 08:52:03 -07001654 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001655 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001656 of_meter_features_t features;
1657};
1658
1659// FIXME stats added to get things working
Rich Lane68ae4d72013-05-09 10:55:19 -07001660struct of_table_features_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001661 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001662 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001663 uint16_t length;
1664 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001665 uint16_t stats_type == 12;
Rich Lanea06d0c32013-03-25 08:52:03 -07001666 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001667 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001668 list(of_table_features_t) entries;
1669};
1670
1671// FIXME stats added to get things working
Rich Lane68ae4d72013-05-09 10:55:19 -07001672struct of_table_features_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001673 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001674 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001675 uint16_t length;
1676 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001677 uint16_t stats_type == 12;
Rich Lanea06d0c32013-03-25 08:52:03 -07001678 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001679 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001680 list(of_table_features_t) entries;
1681};
1682
1683// FIXME stats added to get things working
Rich Lane68ae4d72013-05-09 10:55:19 -07001684struct of_port_desc_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001685 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001686 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001687 uint16_t length;
1688 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001689 uint16_t stats_type == 13;
Rich Lanea06d0c32013-03-25 08:52:03 -07001690 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001691 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001692};
1693
1694// FIXME stats added to get things working
Rich Lane68ae4d72013-05-09 10:55:19 -07001695struct of_port_desc_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001696 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001697 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001698 uint16_t length;
1699 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001700 uint16_t stats_type == 13;
Rich Lanea06d0c32013-03-25 08:52:03 -07001701 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001702 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001703 list(of_port_desc_t) entries;
1704};
1705
Rich Lane68ae4d72013-05-09 10:55:19 -07001706struct of_meter_band_stats {
Rich Lanea06d0c32013-03-25 08:52:03 -07001707 uint64_t packet_band_count;
1708 uint64_t byte_band_count;
1709};
1710
Rich Lane68ae4d72013-05-09 10:55:19 -07001711struct of_meter_stats {
Rich Lanea06d0c32013-03-25 08:52:03 -07001712 uint32_t meter_id;
1713 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001714 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -07001715 uint32_t flow_count;
1716 uint64_t packet_in_count;
1717 uint64_t byte_in_count;
1718 uint32_t duration_sec;
1719 uint32_t duration_nsec;
1720 list(of_meter_band_stats_t) band_stats;
1721};
1722
Rich Lane68ae4d72013-05-09 10:55:19 -07001723struct of_meter_config {
Rich Lanea06d0c32013-03-25 08:52:03 -07001724 uint16_t length;
1725 uint16_t flags;
1726 uint32_t meter_id;
1727 list(of_meter_band_t) entries;
1728};
1729
Rich Lane68ae4d72013-05-09 10:55:19 -07001730struct of_experimenter_multipart_header {
Rich Lanea06d0c32013-03-25 08:52:03 -07001731 uint32_t experimenter;
1732 uint32_t subtype;
1733};
1734
1735// END OF STATS OBJECTS
1736
Rich Lane68ae4d72013-05-09 10:55:19 -07001737struct of_queue_prop {
Rich Lanea06d0c32013-03-25 08:52:03 -07001738 uint16_t type;
1739 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001740 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001741};
1742
Rich Lane68ae4d72013-05-09 10:55:19 -07001743struct of_queue_prop_min_rate {
Rich Lane31b87142013-05-09 22:05:42 -07001744 uint16_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001745 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001746 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001747 uint16_t rate;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001748 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -07001749};
1750
Rich Lane68ae4d72013-05-09 10:55:19 -07001751struct of_queue_prop_max_rate {
Rich Lane31b87142013-05-09 22:05:42 -07001752 uint16_t type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -07001753 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001754 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001755 uint16_t rate;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001756 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -07001757};
1758
Rich Lane68ae4d72013-05-09 10:55:19 -07001759struct of_queue_prop_experimenter {
Rich Lane31b87142013-05-09 22:05:42 -07001760 uint16_t type == 65535;
Rich Lanea06d0c32013-03-25 08:52:03 -07001761 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001762 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001763 uint32_t experimenter;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001764 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001765 of_octets_t data;
1766};
1767
Rich Lane68ae4d72013-05-09 10:55:19 -07001768struct of_packet_queue {
Rich Lanea06d0c32013-03-25 08:52:03 -07001769 uint32_t queue_id;
1770 of_port_no_t port;
1771 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001772 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -07001773 list(of_queue_prop_t) properties;
1774};
1775
Rich Lane68ae4d72013-05-09 10:55:19 -07001776struct of_queue_get_config_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001777 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001778 uint8_t type == 22;
Rich Lanea06d0c32013-03-25 08:52:03 -07001779 uint16_t length;
1780 uint32_t xid;
1781 of_port_no_t port;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001782 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001783};
1784
Rich Lane68ae4d72013-05-09 10:55:19 -07001785struct of_queue_get_config_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001786 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001787 uint8_t type == 23;
Rich Lanea06d0c32013-03-25 08:52:03 -07001788 uint16_t length;
1789 uint32_t xid;
1790 of_port_no_t port;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001791 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001792 list(of_packet_queue_t) queues;
1793};
1794
Rich Lane68ae4d72013-05-09 10:55:19 -07001795struct of_role_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001796 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001797 uint8_t type == 24;
Rich Lanea06d0c32013-03-25 08:52:03 -07001798 uint16_t length;
1799 uint32_t xid;
1800 uint32_t role;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001801 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001802 uint64_t generation_id;
1803};
1804
Rich Lane68ae4d72013-05-09 10:55:19 -07001805struct of_role_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001806 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001807 uint8_t type == 25;
Rich Lanea06d0c32013-03-25 08:52:03 -07001808 uint16_t length;
1809 uint32_t xid;
1810 of_octets_t data;
1811};
1812
1813////////////////////////////////////////////////////////////////
1814// FIXME understand async; where do bitmasks live?
1815// Determine bitmap type for masks below.
1816// DOCUMENT masks where uint32_t[0] is interest for equal/master
1817// while uint32_t[1] is interest for slave
1818////////////////////////////////////////////////////////////////
1819
Rich Lane68ae4d72013-05-09 10:55:19 -07001820struct of_async_get_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001821 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001822 uint8_t type == 26;
Rich Lanea06d0c32013-03-25 08:52:03 -07001823 uint16_t length;
1824 uint32_t xid;
1825 uint32_t packet_in_mask_equal_master;
1826 uint32_t packet_in_mask_slave;
1827 uint32_t port_status_mask_equal_master;
1828 uint32_t port_status_mask_slave;
1829 uint32_t flow_removed_mask_equal_master;
1830 uint32_t flow_removed_mask_slave;
1831};
1832
Rich Lane68ae4d72013-05-09 10:55:19 -07001833struct of_async_get_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001834 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001835 uint8_t type == 27;
Rich Lanea06d0c32013-03-25 08:52:03 -07001836 uint16_t length;
1837 uint32_t xid;
1838 uint32_t packet_in_mask_equal_master;
1839 uint32_t packet_in_mask_slave;
1840 uint32_t port_status_mask_equal_master;
1841 uint32_t port_status_mask_slave;
1842 uint32_t flow_removed_mask_equal_master;
1843 uint32_t flow_removed_mask_slave;
1844};
1845
Rich Lane68ae4d72013-05-09 10:55:19 -07001846struct of_async_set {
Rich Lanea06d0c32013-03-25 08:52:03 -07001847 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001848 uint8_t type == 28;
Rich Lanea06d0c32013-03-25 08:52:03 -07001849 uint16_t length;
1850 uint32_t xid;
1851 uint32_t packet_in_mask_equal_master;
1852 uint32_t packet_in_mask_slave;
1853 uint32_t port_status_mask_equal_master;
1854 uint32_t port_status_mask_slave;
1855 uint32_t flow_removed_mask_equal_master;
1856 uint32_t flow_removed_mask_slave;
1857};