blob: f4d31d6ae4aa9199c967dd44eba1c357e6be6f44 [file] [log] [blame]
Rich Lanea06d0c32013-03-25 08:52:03 -07001// Copyright 2013, Big Switch Networks, Inc.
2//
3// LoxiGen is licensed under the Eclipse Public License, version 1.0 (EPL), with
4// the following special exception:
5//
6// LOXI Exception
7//
8// As a special exception to the terms of the EPL, you may distribute libraries
9// generated by LoxiGen (LoxiGen Libraries) under the terms of your choice, provided
10// that copyright and licensing notices generated by LoxiGen are not altered or removed
11// from the LoxiGen Libraries and the notice provided below is (i) included in
12// the LoxiGen Libraries, if distributed in source code form and (ii) included in any
13// documentation for the LoxiGen Libraries, if distributed in binary form.
14//
15// Notice: "Copyright 2013, Big Switch Networks, Inc. This library was generated by the LoxiGen Compiler."
16//
17// You may not use this file except in compliance with the EPL or LOXI Exception. You may obtain
18// a copy of the EPL at:
19//
20// http://www.eclipse.org/legal/epl-v10.html
21//
22// Unless required by applicable law or agreed to in writing, software
23// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
24// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
25// EPL for the specific language governing permissions and limitations
26// under the EPL.
Rich Lane5d33a622013-04-08 17:33:11 -070027//
28// Also derived from the OpenFlow header files which have these copyrights:
29// Copyright (c) 2008 The Board of Trustees of The Leland Stanford Junior University
30// Copyright (c) 2011, 2012 Open Networking Foundation
Rich Lanea06d0c32013-03-25 08:52:03 -070031
32#version 3
33
Rich Lane5d33a622013-04-08 17:33:11 -070034enum macro_definitions {
35 OFP_MAX_TABLE_NAME_LEN = 32,
36 OFP_MAX_PORT_NAME_LEN = 16,
37
38 OFP_TCP_PORT = 6633,
39 OFP_SSL_PORT = 6633,
40
41 OFP_ETH_ALEN = 6,
42
43 OFP_DEFAULT_MISS_SEND_LEN = 128,
44
45 OFP_VLAN_NONE = 0,
46
47 OFP_FLOW_PERMANENT = 0,
48
49 OFP_DEFAULT_PRIORITY = 0x8000,
50
51 OFP_NO_BUFFER = 0xffffffff,
52
53 DESC_STR_LEN = 256,
54 SERIAL_NUM_LEN = 32,
55
56 OFPQ_ALL = 0xffffffff,
57
58 OFPQ_MIN_RATE_UNCFG = 0xffff,
59 OFPQ_MAX_RATE_UNCFG = 0xffff,
60};
61
Andreas Wundsam4ee51462013-07-30 11:00:37 -070062enum ofp_port(wire_type=uint32_t) {
Rich Lane5d33a622013-04-08 17:33:11 -070063 OFPP_MAX = 0xffffff00,
64 OFPP_IN_PORT = 0xfffffff8,
65 OFPP_TABLE = 0xfffffff9,
66 OFPP_NORMAL = 0xfffffffa,
67 OFPP_FLOOD = 0xfffffffb,
68 OFPP_ALL = 0xfffffffc,
69 OFPP_CONTROLLER = 0xfffffffd,
70 OFPP_LOCAL = 0xfffffffe,
71};
72
Andreas Wundsam4ee51462013-07-30 11:00:37 -070073enum ofp_port_no(wire_type=uint32_t, complete=no) {
Rich Lane5d33a622013-04-08 17:33:11 -070074 OFPP_ANY = 0xffffffff,
75};
76
Andreas Wundsam4ee51462013-07-30 11:00:37 -070077enum ofp_type(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -070078 OFPT_HELLO = 0,
79 OFPT_ERROR = 1,
80 OFPT_ECHO_REQUEST = 2,
81 OFPT_ECHO_REPLY = 3,
82 OFPT_EXPERIMENTER = 4,
83 OFPT_FEATURES_REQUEST = 5,
84 OFPT_FEATURES_REPLY = 6,
85 OFPT_GET_CONFIG_REQUEST = 7,
86 OFPT_GET_CONFIG_REPLY = 8,
87 OFPT_SET_CONFIG = 9,
88 OFPT_PACKET_IN = 10,
89 OFPT_FLOW_REMOVED = 11,
90 OFPT_PORT_STATUS = 12,
91 OFPT_PACKET_OUT = 13,
92 OFPT_FLOW_MOD = 14,
93 OFPT_GROUP_MOD = 15,
94 OFPT_PORT_MOD = 16,
95 OFPT_TABLE_MOD = 17,
96 OFPT_STATS_REQUEST = 18,
97 OFPT_STATS_REPLY = 19,
98 OFPT_BARRIER_REQUEST = 20,
99 OFPT_BARRIER_REPLY = 21,
100 OFPT_QUEUE_GET_CONFIG_REQUEST = 22,
101 OFPT_QUEUE_GET_CONFIG_REPLY = 23,
102 OFPT_ROLE_REQUEST = 24,
103 OFPT_ROLE_REPLY = 25,
104};
105
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700106enum ofp_config_flags(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700107 OFPC_FRAG_NORMAL = 0,
108 OFPC_FRAG_DROP = 1,
109 OFPC_FRAG_REASM = 2,
110 OFPC_FRAG_MASK = 3,
111 OFPC_INVALID_TTL_TO_CONTROLLER = 4,
112};
113
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700114enum ofp_table_config(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700115 OFPTC_TABLE_MISS_CONTROLLER = 0,
116 OFPTC_TABLE_MISS_CONTINUE = 1,
117 OFPTC_TABLE_MISS_DROP = 2,
118 OFPTC_TABLE_MISS_MASK = 3,
119};
120
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700121enum ofp_table(wire_type=uint8_t, complete=False) {
Rich Lane5d33a622013-04-08 17:33:11 -0700122 OFPTT_MAX = 0xfe,
123 OFPTT_ALL = 0xff,
124};
125
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700126enum ofp_capabilities(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700127 OFPC_FLOW_STATS = 0x1,
128 OFPC_TABLE_STATS = 0x2,
129 OFPC_PORT_STATS = 0x4,
130 OFPC_GROUP_STATS = 0x8,
131 OFPC_IP_REASM = 0x20,
132 OFPC_QUEUE_STATS = 0x40,
133 OFPC_PORT_BLOCKED = 0x100,
134};
135
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700136enum ofp_port_config(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700137 OFPPC_PORT_DOWN = 0x1,
138 OFPPC_NO_RECV = 0x4,
139 OFPPC_NO_FWD = 0x20,
140 OFPPC_NO_PACKET_IN = 0x40,
141};
142
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700143enum ofp_port_state(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700144 OFPPS_LINK_DOWN = 0x1,
145 OFPPS_BLOCKED = 0x2,
146 OFPPS_LIVE = 0x4,
147};
148
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700149enum ofp_port_features(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700150 OFPPF_10MB_HD = 0x1,
151 OFPPF_10MB_FD = 0x2,
152 OFPPF_100MB_HD = 0x4,
153 OFPPF_100MB_FD = 0x8,
154 OFPPF_1GB_HD = 0x10,
155 OFPPF_1GB_FD = 0x20,
156 OFPPF_10GB_FD = 0x40,
157 OFPPF_40GB_FD = 0x80,
158 OFPPF_100GB_FD = 0x100,
159 OFPPF_1TB_FD = 0x200,
160 OFPPF_OTHER = 0x400,
161 OFPPF_COPPER = 0x800,
162 OFPPF_FIBER = 0x1000,
163 OFPPF_AUTONEG = 0x2000,
164 OFPPF_PAUSE = 0x4000,
165 OFPPF_PAUSE_ASYM = 0x8000,
166};
167
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700168enum ofp_port_reason(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700169 OFPPR_ADD = 0,
170 OFPPR_DELETE = 1,
171 OFPPR_MODIFY = 2,
172};
173
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700174enum ofp_match_type(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700175 OFPMT_STANDARD = 0,
176 OFPMT_OXM = 1,
177};
178
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700179enum ofp_oxm_class(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700180 OFPXMC_NXM_0 = 0,
181 OFPXMC_NXM_1 = 1,
182 OFPXMC_OPENFLOW_BASIC = 0x8000,
183 OFPXMC_EXPERIMENTER = 0xffff,
184};
185
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700186enum ofp_vlan_id(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700187 OFPVID_NONE = 0,
188 OFPVID_PRESENT = 0x1000,
189};
190
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700191enum ofp_action_type(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700192 OFPAT_OUTPUT = 0,
193 OFPAT_COPY_TTL_OUT = 0xb,
194 OFPAT_COPY_TTL_IN = 0xc,
195 OFPAT_SET_MPLS_TTL = 0xf,
196 OFPAT_DEC_MPLS_TTL = 0x10,
197 OFPAT_PUSH_VLAN = 0x11,
198 OFPAT_POP_VLAN = 0x12,
199 OFPAT_PUSH_MPLS = 0x13,
200 OFPAT_POP_MPLS = 0x14,
201 OFPAT_SET_QUEUE = 0x15,
202 OFPAT_GROUP = 0x16,
203 OFPAT_SET_NW_TTL = 0x17,
204 OFPAT_DEC_NW_TTL = 0x18,
205 OFPAT_SET_FIELD = 0x19,
206 OFPAT_EXPERIMENTER = 0xffff,
207};
208
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700209enum ofp_controller_max_len(wire_type=uint16_t, complete=False) {
Rich Lane5d33a622013-04-08 17:33:11 -0700210 OFPCML_MAX = 0xffe5,
211 OFPCML_NO_BUFFER = 0xffff,
212};
213
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700214enum ofp_instruction_type(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700215 OFPIT_GOTO_TABLE = 0x1,
216 OFPIT_WRITE_METADATA = 0x2,
217 OFPIT_WRITE_ACTIONS = 0x3,
218 OFPIT_APPLY_ACTIONS = 0x4,
219 OFPIT_CLEAR_ACTIONS = 0x5,
220 OFPIT_EXPERIMENTER = 0xffff,
221};
222
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700223enum ofp_flow_mod_command(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700224 OFPFC_ADD = 0,
225 OFPFC_MODIFY = 1,
226 OFPFC_MODIFY_STRICT = 2,
227 OFPFC_DELETE = 3,
228 OFPFC_DELETE_STRICT = 4,
229};
230
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700231enum ofp_flow_mod_flags(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700232 OFPFF_SEND_FLOW_REM = 0x1,
233 OFPFF_CHECK_OVERLAP = 0x2,
234 OFPFF_RESET_COUNTS = 0x4,
235};
236
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700237enum ofp_group(wire_type=uint32_t, complete=False) {
Rich Lane5d33a622013-04-08 17:33:11 -0700238 OFPG_MAX = 0xffffff00,
239 OFPG_ALL = 0xfffffffc,
240 OFPG_ANY = 0xffffffff,
241};
242
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700243enum ofp_group_mod_command(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700244 OFPGC_ADD = 0,
245 OFPGC_MODIFY = 1,
246 OFPGC_DELETE = 2,
247};
248
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700249enum ofp_group_type(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700250 OFPGT_ALL = 0,
251 OFPGT_SELECT = 1,
252 OFPGT_INDIRECT = 2,
253 OFPGT_FF = 3,
254};
255
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700256enum ofp_packet_in_reason(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700257 OFPR_NO_MATCH = 0,
258 OFPR_ACTION = 1,
259 OFPR_INVALID_TTL = 2,
260};
261
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700262enum ofp_flow_removed_reason(wire_type=uint8_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700263 OFPRR_IDLE_TIMEOUT = 0,
264 OFPRR_HARD_TIMEOUT = 1,
265 OFPRR_DELETE = 2,
266 OFPRR_GROUP_DELETE = 3,
267};
268
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700269enum ofp_error_type(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700270 OFPET_HELLO_FAILED = 0,
271 OFPET_BAD_REQUEST = 1,
272 OFPET_BAD_ACTION = 2,
273 OFPET_BAD_INSTRUCTION = 3,
274 OFPET_BAD_MATCH = 4,
275 OFPET_FLOW_MOD_FAILED = 5,
276 OFPET_GROUP_MOD_FAILED = 6,
277 OFPET_PORT_MOD_FAILED = 7,
278 OFPET_TABLE_MOD_FAILED = 8,
279 OFPET_QUEUE_OP_FAILED = 9,
280 OFPET_SWITCH_CONFIG_FAILED = 10,
281 OFPET_ROLE_REQUEST_FAILED = 11,
282 OFPET_EXPERIMENTER = 0xffff,
283};
284
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700285enum ofp_hello_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700286 OFPHFC_INCOMPATIBLE = 0,
287 OFPHFC_EPERM = 1,
288};
289
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700290enum ofp_bad_request_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700291 OFPBRC_BAD_VERSION = 0,
292 OFPBRC_BAD_TYPE = 1,
293 OFPBRC_BAD_STAT = 2,
294 OFPBRC_BAD_EXPERIMENTER = 3,
295 OFPBRC_BAD_EXP_TYPE = 4,
296 OFPBRC_EPERM = 5,
297 OFPBRC_BAD_LEN = 6,
298 OFPBRC_BUFFER_EMPTY = 7,
299 OFPBRC_BUFFER_UNKNOWN = 8,
300 OFPBRC_BAD_TABLE_ID = 9,
301 OFPBRC_IS_SLAVE = 10,
302 OFPBRC_BAD_PORT = 11,
303 OFPBRC_BAD_PACKET = 12,
304};
305
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700306enum ofp_bad_action_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700307 OFPBAC_BAD_TYPE = 0,
308 OFPBAC_BAD_LEN = 1,
309 OFPBAC_BAD_EXPERIMENTER = 2,
310 OFPBAC_BAD_EXP_TYPE = 3,
311 OFPBAC_BAD_OUT_PORT = 4,
312 OFPBAC_BAD_ARGUMENT = 5,
313 OFPBAC_EPERM = 6,
314 OFPBAC_TOO_MANY = 7,
315 OFPBAC_BAD_QUEUE = 8,
316 OFPBAC_BAD_OUT_GROUP = 9,
317 OFPBAC_MATCH_INCONSISTENT = 10,
318 OFPBAC_UNSUPPORTED_ORDER = 11,
319 OFPBAC_BAD_TAG = 12,
320 OFPBAC_BAD_SET_TYPE = 13,
321 OFPBAC_BAD_SET_LEN = 14,
322 OFPBAC_BAD_SET_ARGUMENT = 15,
323};
324
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700325enum ofp_bad_instruction_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700326 OFPBIC_UNKNOWN_INST = 0,
327 OFPBIC_UNSUP_INST = 1,
328 OFPBIC_BAD_TABLE_ID = 2,
329 OFPBIC_UNSUP_METADATA = 3,
330 OFPBIC_UNSUP_METADATA_MASK = 4,
331 OFPBIC_BAD_EXPERIMENTER = 5,
332 OFPBIC_BAD_EXP_TYPE = 6,
333 OFPBIC_BAD_LEN = 7,
334 OFPBIC_EPERM = 8,
335};
336
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700337enum ofp_bad_match_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700338 OFPBMC_BAD_TYPE = 0,
339 OFPBMC_BAD_LEN = 1,
340 OFPBMC_BAD_TAG = 2,
341 OFPBMC_BAD_DL_ADDR_MASK = 3,
342 OFPBMC_BAD_NW_ADDR_MASK = 4,
343 OFPBMC_BAD_WILDCARDS = 5,
344 OFPBMC_BAD_FIELD = 6,
345 OFPBMC_BAD_VALUE = 7,
346 OFPBMC_BAD_MASK = 8,
347 OFPBMC_BAD_PREREQ = 9,
348 OFPBMC_DUP_FIELD = 10,
349 OFPBMC_EPERM = 11,
350};
351
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700352enum ofp_flow_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700353 OFPFMFC_UNKNOWN = 0,
354 OFPFMFC_TABLE_FULL = 1,
355 OFPFMFC_BAD_TABLE_ID = 2,
356 OFPFMFC_OVERLAP = 3,
357 OFPFMFC_EPERM = 4,
358 OFPFMFC_BAD_TIMEOUT = 5,
359 OFPFMFC_BAD_COMMAND = 6,
360 OFPFMFC_BAD_FLAGS = 7,
361};
362
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700363enum ofp_group_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700364 OFPGMFC_GROUP_EXISTS = 0,
365 OFPGMFC_INVALID_GROUP = 1,
366 OFPGMFC_WEIGHT_UNSUPPORTED = 2,
367 OFPGMFC_OUT_OF_GROUPS = 3,
368 OFPGMFC_OUT_OF_BUCKETS = 4,
369 OFPGMFC_CHAINING_UNSUPPORTED = 5,
370 OFPGMFC_WATCH_UNSUPPORTED = 6,
371 OFPGMFC_LOOP = 7,
372 OFPGMFC_UNKNOWN_GROUP = 8,
373 OFPGMFC_CHAINED_GROUP = 9,
374 OFPGMFC_BAD_TYPE = 10,
375 OFPGMFC_BAD_COMMAND = 11,
376 OFPGMFC_BAD_BUCKET = 12,
377 OFPGMFC_BAD_WATCH = 13,
378 OFPGMFC_EPERM = 14,
379};
380
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700381enum ofp_port_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700382 OFPPMFC_BAD_PORT = 0,
383 OFPPMFC_BAD_HW_ADDR = 1,
384 OFPPMFC_BAD_CONFIG = 2,
385 OFPPMFC_BAD_ADVERTISE = 3,
386 OFPPMFC_EPERM = 4,
387};
388
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700389enum ofp_table_mod_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700390 OFPTMFC_BAD_TABLE = 0,
391 OFPTMFC_BAD_CONFIG = 1,
392 OFPTMFC_EPERM = 2,
393};
394
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700395enum ofp_queue_op_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700396 OFPQOFC_BAD_PORT = 0,
397 OFPQOFC_BAD_QUEUE = 1,
398 OFPQOFC_EPERM = 2,
399};
400
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700401enum ofp_switch_config_failed_code(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700402 OFPSCFC_BAD_FLAGS = 0,
403 OFPSCFC_BAD_LEN = 1,
404 OFPSCFC_EPERM = 2,
405};
406
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700407enum ofp_role_request_failed_code (wire_type=uint16_t){
Rich Lane5d33a622013-04-08 17:33:11 -0700408 OFPRRFC_STALE = 0,
409 OFPRRFC_UNSUP = 1,
410 OFPRRFC_BAD_ROLE = 2,
411};
412
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700413enum ofp_stats_types(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700414 OFPST_DESC = 0,
415 OFPST_FLOW = 1,
416 OFPST_AGGREGATE = 2,
417 OFPST_TABLE = 3,
418 OFPST_PORT = 4,
419 OFPST_QUEUE = 5,
420 OFPST_GROUP = 6,
421 OFPST_GROUP_DESC = 7,
422 OFPST_GROUP_FEATURES = 8,
423 OFPST_EXPERIMENTER = 0xffff,
424};
425
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700426enum ofp_stats_reply_flags(wire_type=uint16_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700427 OFPSF_REPLY_MORE = 0x1,
428};
429
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700430enum ofp_group_capabilities(wire_type=uint32_t, bitmask=True) {
Rich Lane5d33a622013-04-08 17:33:11 -0700431 OFPGFC_SELECT_WEIGHT = 0x1,
432 OFPGFC_SELECT_LIVENESS = 0x2,
433 OFPGFC_CHAINING = 0x4,
434 OFPGFC_CHAINING_CHECKS = 0x8,
435};
436
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700437enum ofp_queue_properties(wire_type=uint16_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700438 OFPQT_MIN_RATE = 0x1,
439 OFPQT_MAX_RATE = 0x2,
440 OFPQT_EXPERIMENTER = 0xffff,
441};
442
Andreas Wundsam4ee51462013-07-30 11:00:37 -0700443enum ofp_controller_role(wire_type=uint32_t) {
Rich Lane5d33a622013-04-08 17:33:11 -0700444 OFPCR_ROLE_NOCHANGE = 0,
445 OFPCR_ROLE_EQUAL = 1,
446 OFPCR_ROLE_MASTER = 2,
447 OFPCR_ROLE_SLAVE = 3,
448};
449
Rich Lane68ae4d72013-05-09 10:55:19 -0700450struct of_header {
Rich Lanea06d0c32013-03-25 08:52:03 -0700451 uint8_t version;
452 uint8_t type;
453 uint16_t length;
454 uint32_t xid;
455};
456
Rich Lane68ae4d72013-05-09 10:55:19 -0700457struct of_hello {
Rich Lanea06d0c32013-03-25 08:52:03 -0700458 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700459 uint8_t type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -0700460 uint16_t length;
461 uint32_t xid;
462};
463
Rich Lane68ae4d72013-05-09 10:55:19 -0700464struct of_echo_request {
Rich Lanea06d0c32013-03-25 08:52:03 -0700465 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700466 uint8_t type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -0700467 uint16_t length;
468 uint32_t xid;
469 of_octets_t data;
470};
471
Rich Lane68ae4d72013-05-09 10:55:19 -0700472struct of_echo_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -0700473 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700474 uint8_t type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -0700475 uint16_t length;
476 uint32_t xid;
477 of_octets_t data;
478};
479
Rich Lane68ae4d72013-05-09 10:55:19 -0700480struct of_experimenter {
Rich Lanea06d0c32013-03-25 08:52:03 -0700481 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700482 uint8_t type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -0700483 uint16_t length;
484 uint32_t xid;
485 uint32_t experimenter;
486 uint32_t subtype;
487 of_octets_t data;
488};
489
Rich Lane68ae4d72013-05-09 10:55:19 -0700490struct of_barrier_request {
Rich Lanea06d0c32013-03-25 08:52:03 -0700491 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700492 uint8_t type == 20;
Rich Lanea06d0c32013-03-25 08:52:03 -0700493 uint16_t length;
494 uint32_t xid;
495};
496
Rich Lane68ae4d72013-05-09 10:55:19 -0700497struct of_barrier_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -0700498 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700499 uint8_t type == 21;
Rich Lanea06d0c32013-03-25 08:52:03 -0700500 uint16_t length;
501 uint32_t xid;
502};
503
Rich Lane68ae4d72013-05-09 10:55:19 -0700504struct of_get_config_request {
Rich Lanea06d0c32013-03-25 08:52:03 -0700505 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700506 uint8_t type == 7;
Rich Lanea06d0c32013-03-25 08:52:03 -0700507 uint16_t length;
508 uint32_t xid;
509};
510
Rich Lane68ae4d72013-05-09 10:55:19 -0700511struct of_get_config_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -0700512 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700513 uint8_t type == 8;
Rich Lanea06d0c32013-03-25 08:52:03 -0700514 uint16_t length;
515 uint32_t xid;
516 uint16_t flags;
517 uint16_t miss_send_len;
518};
519
Rich Lane68ae4d72013-05-09 10:55:19 -0700520struct of_set_config {
Rich Lanea06d0c32013-03-25 08:52:03 -0700521 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700522 uint8_t type == 9;
Rich Lanea06d0c32013-03-25 08:52:03 -0700523 uint16_t length;
524 uint32_t xid;
525 uint16_t flags;
526 uint16_t miss_send_len;
527};
528
Rich Lane68ae4d72013-05-09 10:55:19 -0700529struct of_table_mod {
Rich Lanea06d0c32013-03-25 08:52:03 -0700530 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700531 uint8_t type == 17;
Rich Lanea06d0c32013-03-25 08:52:03 -0700532 uint16_t length;
533 uint32_t xid;
534 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700535 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700536 uint32_t config;
537};
538
Rich Lane68ae4d72013-05-09 10:55:19 -0700539struct of_port_desc {
Rich Lanea06d0c32013-03-25 08:52:03 -0700540 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700541 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700542 of_mac_addr_t hw_addr;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700543 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700544 of_port_name_t name;
545 uint32_t config;
546 uint32_t state;
547 uint32_t curr;
548 uint32_t advertised;
549 uint32_t supported;
550 uint32_t peer;
551 uint32_t curr_speed;
552 uint32_t max_speed;
553};
554
Rich Lane68ae4d72013-05-09 10:55:19 -0700555struct of_features_request {
Rich Lanea06d0c32013-03-25 08:52:03 -0700556 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700557 uint8_t type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -0700558 uint16_t length;
559 uint32_t xid;
560};
561
Rich Lane68ae4d72013-05-09 10:55:19 -0700562struct of_features_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -0700563 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700564 uint8_t type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -0700565 uint16_t length;
566 uint32_t xid;
567 uint64_t datapath_id;
568 uint32_t n_buffers;
569 uint8_t n_tables;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700570 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700571 uint32_t capabilities;
572 uint32_t reserved;
573 list(of_port_desc_t) ports;
574};
575
Rich Lane68ae4d72013-05-09 10:55:19 -0700576struct of_port_status {
Rich Lanea06d0c32013-03-25 08:52:03 -0700577 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700578 uint8_t type == 12;
Rich Lanea06d0c32013-03-25 08:52:03 -0700579 uint16_t length;
580 uint32_t xid;
581 uint8_t reason;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700582 pad(7);
Rich Lanea06d0c32013-03-25 08:52:03 -0700583 of_port_desc_t desc;
584};
585
Rich Lane68ae4d72013-05-09 10:55:19 -0700586struct of_port_mod {
Rich Lanea06d0c32013-03-25 08:52:03 -0700587 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700588 uint8_t type == 16;
Rich Lanea06d0c32013-03-25 08:52:03 -0700589 uint16_t length;
590 uint32_t xid;
591 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700592 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700593 of_mac_addr_t hw_addr;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700594 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700595 uint32_t config;
596 uint32_t mask;
597 uint32_t advertise;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700598 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700599};
600
Rich Lane68ae4d72013-05-09 10:55:19 -0700601struct of_match_v3 {
Rich Lane31b87142013-05-09 22:05:42 -0700602 uint16_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -0700603 uint16_t length;
604 list(of_oxm_t) oxm_list;
605};
606
Rich Lane68ae4d72013-05-09 10:55:19 -0700607struct of_action_output {
Rich Lane31b87142013-05-09 22:05:42 -0700608 uint16_t type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -0700609 uint16_t len;
610 of_port_no_t port;
611 uint16_t max_len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700612 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -0700613};
614
Rich Lane68ae4d72013-05-09 10:55:19 -0700615struct of_action_copy_ttl_out {
Rich Lane31b87142013-05-09 22:05:42 -0700616 uint16_t type == 11;
Rich Lanea06d0c32013-03-25 08:52:03 -0700617 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700618 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700619};
620
Rich Lane68ae4d72013-05-09 10:55:19 -0700621struct of_action_copy_ttl_in {
Rich Lane31b87142013-05-09 22:05:42 -0700622 uint16_t type == 12;
Rich Lanea06d0c32013-03-25 08:52:03 -0700623 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700624 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700625};
626
Rich Lane68ae4d72013-05-09 10:55:19 -0700627struct of_action_set_mpls_ttl {
Rich Lane31b87142013-05-09 22:05:42 -0700628 uint16_t type == 15;
Rich Lanea06d0c32013-03-25 08:52:03 -0700629 uint16_t len;
630 uint8_t mpls_ttl;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700631 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700632};
633
Rich Lane68ae4d72013-05-09 10:55:19 -0700634struct of_action_dec_mpls_ttl {
Rich Lane31b87142013-05-09 22:05:42 -0700635 uint16_t type == 16;
Rich Lanea06d0c32013-03-25 08:52:03 -0700636 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700637 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700638};
639
Rich Lane68ae4d72013-05-09 10:55:19 -0700640struct of_action_push_vlan {
Rich Lane31b87142013-05-09 22:05:42 -0700641 uint16_t type == 17;
Rich Lanea06d0c32013-03-25 08:52:03 -0700642 uint16_t len;
643 uint16_t ethertype;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700644 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700645};
646
Rich Lane68ae4d72013-05-09 10:55:19 -0700647struct of_action_pop_vlan {
Rich Lane31b87142013-05-09 22:05:42 -0700648 uint16_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -0700649 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700650 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700651};
652
Rich Lane68ae4d72013-05-09 10:55:19 -0700653struct of_action_push_mpls {
Rich Lane31b87142013-05-09 22:05:42 -0700654 uint16_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -0700655 uint16_t len;
656 uint16_t ethertype;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700657 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700658};
659
Rich Lane68ae4d72013-05-09 10:55:19 -0700660struct of_action_pop_mpls {
Rich Lane31b87142013-05-09 22:05:42 -0700661 uint16_t type == 20;
Rich Lanea06d0c32013-03-25 08:52:03 -0700662 uint16_t len;
663 uint16_t ethertype;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700664 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700665};
666
Rich Lane68ae4d72013-05-09 10:55:19 -0700667struct of_action_set_queue {
Rich Lane31b87142013-05-09 22:05:42 -0700668 uint16_t type == 21;
Rich Lanea06d0c32013-03-25 08:52:03 -0700669 uint16_t len;
670 uint32_t queue_id;
671};
672
Rich Lane68ae4d72013-05-09 10:55:19 -0700673struct of_action_group {
Rich Lane31b87142013-05-09 22:05:42 -0700674 uint16_t type == 22;
Rich Lanea06d0c32013-03-25 08:52:03 -0700675 uint16_t len;
676 uint32_t group_id;
677};
678
Rich Lane68ae4d72013-05-09 10:55:19 -0700679struct of_action_set_nw_ttl {
Rich Lane31b87142013-05-09 22:05:42 -0700680 uint16_t type == 23;
Rich Lanea06d0c32013-03-25 08:52:03 -0700681 uint16_t len;
682 uint8_t nw_ttl;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700683 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700684};
685
Rich Lane68ae4d72013-05-09 10:55:19 -0700686struct of_action_dec_nw_ttl {
Rich Lane31b87142013-05-09 22:05:42 -0700687 uint16_t type == 24;
Rich Lanea06d0c32013-03-25 08:52:03 -0700688 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700689 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700690};
691
Rich Lane68ae4d72013-05-09 10:55:19 -0700692struct of_action_set_field {
Rich Lane31b87142013-05-09 22:05:42 -0700693 uint16_t type == 25;
Rich Lanea06d0c32013-03-25 08:52:03 -0700694 uint16_t len;
Rich Lanebe90eae2013-07-22 16:44:26 -0700695 of_oxm_t field;
Rich Lanea06d0c32013-03-25 08:52:03 -0700696};
697
Rich Lane68ae4d72013-05-09 10:55:19 -0700698struct of_action_experimenter {
Rich Lane31b87142013-05-09 22:05:42 -0700699 uint16_t type == 65535;
Rich Lanea06d0c32013-03-25 08:52:03 -0700700 uint16_t len;
701 uint32_t experimenter;
702 of_octets_t data;
703};
704
Rich Lane68ae4d72013-05-09 10:55:19 -0700705struct of_action {
Rich Lanea06d0c32013-03-25 08:52:03 -0700706 uint16_t type;
707 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700708 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700709};
710
Rich Lane68ae4d72013-05-09 10:55:19 -0700711struct of_instruction {
Rich Lanea06d0c32013-03-25 08:52:03 -0700712 uint16_t type;
713 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700714 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700715};
716
Rich Lane68ae4d72013-05-09 10:55:19 -0700717struct of_instruction_goto_table {
Rich Lane31b87142013-05-09 22:05:42 -0700718 uint16_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -0700719 uint16_t len;
720 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700721 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -0700722};
723
Rich Lane68ae4d72013-05-09 10:55:19 -0700724struct of_instruction_write_metadata {
Rich Lane31b87142013-05-09 22:05:42 -0700725 uint16_t type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -0700726 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700727 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700728 uint64_t metadata;
729 uint64_t metadata_mask;
730};
731
Rich Lane68ae4d72013-05-09 10:55:19 -0700732struct of_instruction_write_actions {
Rich Lane31b87142013-05-09 22:05:42 -0700733 uint16_t type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -0700734 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700735 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700736 list(of_action_t) actions;
737};
738
Rich Lane68ae4d72013-05-09 10:55:19 -0700739struct of_instruction_apply_actions {
Rich Lane31b87142013-05-09 22:05:42 -0700740 uint16_t type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -0700741 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700742 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700743 list(of_action_t) actions;
744};
745
Rich Lane68ae4d72013-05-09 10:55:19 -0700746struct of_instruction_clear_actions {
Rich Lane31b87142013-05-09 22:05:42 -0700747 uint16_t type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -0700748 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700749 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700750};
751
Rich Lane68ae4d72013-05-09 10:55:19 -0700752struct of_instruction_experimenter {
Rich Lane31b87142013-05-09 22:05:42 -0700753 uint16_t type == 65535;
Rich Lanea06d0c32013-03-25 08:52:03 -0700754 uint16_t len;
755 uint32_t experimenter;
756 of_octets_t data;
757};
758
Rich Lane68ae4d72013-05-09 10:55:19 -0700759struct of_flow_add {
Rich Lanea06d0c32013-03-25 08:52:03 -0700760 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700761 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700762 uint16_t length;
763 uint32_t xid;
764 uint64_t cookie;
765 uint64_t cookie_mask;
766 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700767 of_fm_cmd_t _command == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -0700768 uint16_t idle_timeout;
769 uint16_t hard_timeout;
770 uint16_t priority;
771 uint32_t buffer_id;
772 of_port_no_t out_port;
773 uint32_t out_group;
774 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700775 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700776 of_match_t match;
777 list(of_instruction_t) instructions;
778};
779
Rich Lane68ae4d72013-05-09 10:55:19 -0700780struct of_flow_modify {
Rich Lanea06d0c32013-03-25 08:52:03 -0700781 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700782 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700783 uint16_t length;
784 uint32_t xid;
785 uint64_t cookie;
786 uint64_t cookie_mask;
787 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700788 of_fm_cmd_t _command == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -0700789 uint16_t idle_timeout;
790 uint16_t hard_timeout;
791 uint16_t priority;
792 uint32_t buffer_id;
793 of_port_no_t out_port;
794 uint32_t out_group;
795 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700796 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700797 of_match_t match;
798 list(of_instruction_t) instructions;
799};
800
Rich Lane68ae4d72013-05-09 10:55:19 -0700801struct of_flow_modify_strict {
Rich Lanea06d0c32013-03-25 08:52:03 -0700802 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700803 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700804 uint16_t length;
805 uint32_t xid;
806 uint64_t cookie;
807 uint64_t cookie_mask;
808 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700809 of_fm_cmd_t _command == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -0700810 uint16_t idle_timeout;
811 uint16_t hard_timeout;
812 uint16_t priority;
813 uint32_t buffer_id;
814 of_port_no_t out_port;
815 uint32_t out_group;
816 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700817 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700818 of_match_t match;
819 list(of_instruction_t) instructions;
820};
821
Rich Lane68ae4d72013-05-09 10:55:19 -0700822struct of_flow_delete {
Rich Lanea06d0c32013-03-25 08:52:03 -0700823 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700824 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700825 uint16_t length;
826 uint32_t xid;
827 uint64_t cookie;
828 uint64_t cookie_mask;
829 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700830 of_fm_cmd_t _command == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -0700831 uint16_t idle_timeout;
832 uint16_t hard_timeout;
833 uint16_t priority;
834 uint32_t buffer_id;
835 of_port_no_t out_port;
836 uint32_t out_group;
837 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700838 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700839 of_match_t match;
840 list(of_instruction_t) instructions;
841};
842
Rich Lane68ae4d72013-05-09 10:55:19 -0700843struct of_flow_delete_strict {
Rich Lanea06d0c32013-03-25 08:52:03 -0700844 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700845 uint8_t type == 14;
Rich Lanea06d0c32013-03-25 08:52:03 -0700846 uint16_t length;
847 uint32_t xid;
848 uint64_t cookie;
849 uint64_t cookie_mask;
850 uint8_t table_id;
Rich Lane31b87142013-05-09 22:05:42 -0700851 of_fm_cmd_t _command == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -0700852 uint16_t idle_timeout;
853 uint16_t hard_timeout;
854 uint16_t priority;
855 uint32_t buffer_id;
856 of_port_no_t out_port;
857 uint32_t out_group;
858 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700859 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700860 of_match_t match;
861 list(of_instruction_t) instructions;
862};
863
Rich Lane68ae4d72013-05-09 10:55:19 -0700864struct of_bucket {
Rich Lanea06d0c32013-03-25 08:52:03 -0700865 uint16_t len;
866 uint16_t weight;
867 of_port_no_t watch_port;
868 uint32_t watch_group;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700869 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700870 list(of_action_t) actions;
871};
872
Rich Lane68ae4d72013-05-09 10:55:19 -0700873struct of_group_mod {
Rich Lanea06d0c32013-03-25 08:52:03 -0700874 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700875 uint8_t type == 15;
Rich Lanea06d0c32013-03-25 08:52:03 -0700876 uint16_t length;
877 uint32_t xid;
878 uint16_t command;
879 uint8_t group_type;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700880 pad(1);
Rich Lanea06d0c32013-03-25 08:52:03 -0700881 uint32_t group_id;
882 list(of_bucket_t) buckets;
883};
884
Rich Lane68ae4d72013-05-09 10:55:19 -0700885struct of_packet_out {
Rich Lanea06d0c32013-03-25 08:52:03 -0700886 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700887 uint8_t type == 13;
Rich Lanea06d0c32013-03-25 08:52:03 -0700888 uint16_t length;
889 uint32_t xid;
890 uint32_t buffer_id;
891 of_port_no_t in_port;
892 uint16_t actions_len;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700893 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -0700894 list(of_action_t) actions;
895 of_octets_t data;
896};
897
Rich Lane68ae4d72013-05-09 10:55:19 -0700898struct of_packet_in {
Rich Lanea06d0c32013-03-25 08:52:03 -0700899 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700900 uint8_t type == 10;
Rich Lanea06d0c32013-03-25 08:52:03 -0700901 uint16_t length;
902 uint32_t xid;
903 uint32_t buffer_id;
904 uint16_t total_len;
905 uint8_t reason;
906 uint8_t table_id;
907 of_match_t match;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700908 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -0700909 of_octets_t data; /* FIXME: Ensure total_len gets updated */
910};
911
Rich Lane68ae4d72013-05-09 10:55:19 -0700912struct of_flow_removed {
Rich Lanea06d0c32013-03-25 08:52:03 -0700913 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700914 uint8_t type == 11;
Rich Lanea06d0c32013-03-25 08:52:03 -0700915 uint16_t length;
916 uint32_t xid;
917 uint64_t cookie;
918 uint16_t priority;
919 uint8_t reason;
920 uint8_t table_id;
921 uint32_t duration_sec;
922 uint32_t duration_nsec;
923 uint16_t idle_timeout;
924 uint16_t hard_timeout;
925 uint64_t packet_count;
926 uint64_t byte_count;
927 of_match_t match;
928};
929
Rich Lane68ae4d72013-05-09 10:55:19 -0700930struct of_error_msg {
Rich Lanea06d0c32013-03-25 08:52:03 -0700931 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -0700932 uint8_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -0700933 uint16_t length;
934 uint32_t xid;
935 uint16_t err_type;
936 uint16_t code;
937 of_octets_t data;
938};
939
Rich Lane68ae4d72013-05-09 10:55:19 -0700940// struct of_error_experimenter_msg {
Rich Lanea06d0c32013-03-25 08:52:03 -0700941// uint8_t version;
942// uint8_t type;
943// uint16_t length;
944// uint32_t xid;
945// uint16_t err_type;
946// uint16_t subtype;
947// uint32_t experimenter;
948// of_octets_t data;
949//};
950
951// STATS ENTRIES: flow, table, port, queue, group stats, group desc stats
952// FIXME: Verify disambiguation w/ length in object and entry
953
Rich Lane68ae4d72013-05-09 10:55:19 -0700954struct of_flow_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -0700955 uint16_t length;
956 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700957 pad(1);
Rich Lanea06d0c32013-03-25 08:52:03 -0700958 uint32_t duration_sec;
959 uint32_t duration_nsec;
960 uint16_t priority;
961 uint16_t idle_timeout;
962 uint16_t hard_timeout;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700963 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -0700964 uint64_t cookie;
965 uint64_t packet_count;
966 uint64_t byte_count;
967 of_match_t match;
968 list(of_instruction_t) instructions;
969};
970
Rich Lane68ae4d72013-05-09 10:55:19 -0700971struct of_table_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -0700972 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700973 pad(7);
Rich Lanea06d0c32013-03-25 08:52:03 -0700974 of_table_name_t name;
975 of_match_bmap_t match;
976 of_wc_bmap_t wildcards;
977 uint32_t write_actions;
978 uint32_t apply_actions;
979 uint64_t write_setfields;
980 uint64_t apply_setfields;
981 uint64_t metadata_match;
982 uint64_t metadata_write;
983 uint32_t instructions;
984 uint32_t config;
985 uint32_t max_entries;
986 uint32_t active_count;
987 uint64_t lookup_count;
988 uint64_t matched_count;
989};
990
Rich Lane68ae4d72013-05-09 10:55:19 -0700991struct of_port_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -0700992 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -0700993 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -0700994 uint64_t rx_packets;
995 uint64_t tx_packets;
996 uint64_t rx_bytes;
997 uint64_t tx_bytes;
998 uint64_t rx_dropped;
999 uint64_t tx_dropped;
1000 uint64_t rx_errors;
1001 uint64_t tx_errors;
1002 uint64_t rx_frame_err;
1003 uint64_t rx_over_err;
1004 uint64_t rx_crc_err;
1005 uint64_t collisions;
1006};
1007
Rich Lane68ae4d72013-05-09 10:55:19 -07001008struct of_queue_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001009 of_port_no_t port_no;
1010 uint32_t queue_id;
1011 uint64_t tx_bytes;
1012 uint64_t tx_packets;
1013 uint64_t tx_errors;
1014};
1015
Rich Lane68ae4d72013-05-09 10:55:19 -07001016struct of_bucket_counter {
Rich Lanea06d0c32013-03-25 08:52:03 -07001017 uint64_t packet_count;
1018 uint64_t byte_count;
1019};
1020
Rich Lane68ae4d72013-05-09 10:55:19 -07001021struct of_group_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001022 uint16_t length;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001023 pad(2);
Rich Lanea06d0c32013-03-25 08:52:03 -07001024 uint32_t group_id;
1025 uint32_t ref_count;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001026 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001027 uint64_t packet_count;
1028 uint64_t byte_count;
1029 list(of_bucket_counter_t) bucket_stats;
1030};
1031
Rich Lane68ae4d72013-05-09 10:55:19 -07001032struct of_group_desc_stats_entry {
Rich Lanea06d0c32013-03-25 08:52:03 -07001033 uint16_t length;
1034 uint8_t type;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001035 pad(1);
Rich Lanea06d0c32013-03-25 08:52:03 -07001036 uint32_t group_id;
1037 list(of_bucket_t) buckets;
1038};
1039
1040// STATS:
1041// Desc, flow, agg, table, port, queue, group, group_desc, group_feat, experi
1042
Rich Lane68ae4d72013-05-09 10:55:19 -07001043struct of_desc_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001044 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001045 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001046 uint16_t length;
1047 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001048 uint16_t stats_type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -07001049 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001050 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001051};
1052
Rich Lane68ae4d72013-05-09 10:55:19 -07001053struct of_desc_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001054 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001055 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001056 uint16_t length;
1057 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001058 uint16_t stats_type == 0;
Rich Lanea06d0c32013-03-25 08:52:03 -07001059 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001060 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001061 of_desc_str_t mfr_desc;
1062 of_desc_str_t hw_desc;
1063 of_desc_str_t sw_desc;
1064 of_serial_num_t serial_num;
1065 of_desc_str_t dp_desc;
1066};
1067
Rich Lane68ae4d72013-05-09 10:55:19 -07001068struct of_flow_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001069 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001070 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001071 uint16_t length;
1072 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001073 uint16_t stats_type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001074 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001075 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001076 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001077 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -07001078 of_port_no_t out_port;
1079 uint32_t out_group;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001080 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001081 uint64_t cookie;
1082 uint64_t cookie_mask;
1083 of_match_t match;
1084};
1085
Rich Lane68ae4d72013-05-09 10:55:19 -07001086struct of_flow_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001087 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001088 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001089 uint16_t length;
1090 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001091 uint16_t stats_type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001092 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001093 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001094 list(of_flow_stats_entry_t) entries;
1095};
1096
Rich Lane68ae4d72013-05-09 10:55:19 -07001097struct of_aggregate_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001098 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001099 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001100 uint16_t length;
1101 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001102 uint16_t stats_type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -07001103 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001104 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001105 uint8_t table_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001106 pad(3);
Rich Lanea06d0c32013-03-25 08:52:03 -07001107 of_port_no_t out_port;
1108 uint32_t out_group;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001109 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001110 uint64_t cookie;
1111 uint64_t cookie_mask;
1112 of_match_t match;
1113};
1114
Rich Lane68ae4d72013-05-09 10:55:19 -07001115struct of_aggregate_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001116 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001117 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001118 uint16_t length;
1119 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001120 uint16_t stats_type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -07001121 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001122 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001123 uint64_t packet_count;
1124 uint64_t byte_count;
1125 uint32_t flow_count;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001126 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001127};
1128
Rich Lane68ae4d72013-05-09 10:55:19 -07001129struct of_table_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001130 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001131 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001132 uint16_t length;
1133 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001134 uint16_t stats_type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -07001135 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001136 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001137};
1138
Rich Lane68ae4d72013-05-09 10:55:19 -07001139struct of_table_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001140 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001141 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001142 uint16_t length;
1143 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001144 uint16_t stats_type == 3;
Rich Lanea06d0c32013-03-25 08:52:03 -07001145 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001146 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001147 list(of_table_stats_entry_t) entries;
1148};
1149
Rich Lane68ae4d72013-05-09 10:55:19 -07001150struct of_port_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001151 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001152 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001153 uint16_t length;
1154 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001155 uint16_t stats_type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -07001156 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001157 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001158 of_port_no_t port_no;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001159 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001160};
1161
Rich Lane68ae4d72013-05-09 10:55:19 -07001162struct of_port_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001163 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001164 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001165 uint16_t length;
1166 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001167 uint16_t stats_type == 4;
Rich Lanea06d0c32013-03-25 08:52:03 -07001168 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001169 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001170 list(of_port_stats_entry_t) entries;
1171};
1172
Rich Lane68ae4d72013-05-09 10:55:19 -07001173struct of_queue_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001174 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001175 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001176 uint16_t length;
1177 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001178 uint16_t stats_type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -07001179 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001180 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001181 of_port_no_t port_no;
1182 uint32_t queue_id;
1183};
1184
Rich Lane68ae4d72013-05-09 10:55:19 -07001185struct of_queue_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001186 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001187 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001188 uint16_t length;
1189 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001190 uint16_t stats_type == 5;
Rich Lanea06d0c32013-03-25 08:52:03 -07001191 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001192 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001193 list(of_queue_stats_entry_t) entries;
1194};
1195
Rich Lane68ae4d72013-05-09 10:55:19 -07001196struct of_group_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001197 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001198 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001199 uint16_t length;
1200 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001201 uint16_t stats_type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -07001202 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001203 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001204 uint32_t group_id;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001205 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001206};
1207
Rich Lane68ae4d72013-05-09 10:55:19 -07001208struct of_group_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001209 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001210 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001211 uint16_t length;
1212 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001213 uint16_t stats_type == 6;
Rich Lanea06d0c32013-03-25 08:52:03 -07001214 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001215 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001216 list(of_group_stats_entry_t) entries;
1217};
1218
Rich Lane68ae4d72013-05-09 10:55:19 -07001219struct of_group_desc_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001220 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001221 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001222 uint16_t length;
1223 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001224 uint16_t stats_type == 7;
Rich Lanea06d0c32013-03-25 08:52:03 -07001225 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001226 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001227};
1228
Rich Lane68ae4d72013-05-09 10:55:19 -07001229struct of_group_desc_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001230 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001231 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001232 uint16_t length;
1233 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001234 uint16_t stats_type == 7;
Rich Lanea06d0c32013-03-25 08:52:03 -07001235 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001236 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001237 list(of_group_desc_stats_entry_t) entries;
1238};
1239
Rich Lane68ae4d72013-05-09 10:55:19 -07001240struct of_group_features_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001241 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001242 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001243 uint16_t length;
1244 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001245 uint16_t stats_type == 8;
Rich Lanea06d0c32013-03-25 08:52:03 -07001246 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001247 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001248};
1249
Rich Lane68ae4d72013-05-09 10:55:19 -07001250struct of_group_features_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001251 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001252 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001253 uint16_t length;
1254 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001255 uint16_t stats_type == 8;
Rich Lanea06d0c32013-03-25 08:52:03 -07001256 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001257 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001258 uint32_t types;
1259 uint32_t capabilities;
1260 uint32_t max_groups_all;
1261 uint32_t max_groups_select;
1262 uint32_t max_groups_indirect;
1263 uint32_t max_groups_ff;
1264 uint32_t actions_all;
1265 uint32_t actions_select;
1266 uint32_t actions_indirect;
1267 uint32_t actions_ff;
1268};
1269
Rich Lane68ae4d72013-05-09 10:55:19 -07001270struct of_experimenter_stats_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001271 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001272 uint8_t type == 18;
Rich Lanea06d0c32013-03-25 08:52:03 -07001273 uint16_t length;
1274 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001275 uint16_t stats_type == 0xffff;
Rich Lanea06d0c32013-03-25 08:52:03 -07001276 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001277 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001278 uint32_t experimenter;
1279 uint32_t subtype;
1280 of_octets_t data;
1281};
1282
Rich Lane68ae4d72013-05-09 10:55:19 -07001283struct of_experimenter_stats_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001284 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001285 uint8_t type == 19;
Rich Lanea06d0c32013-03-25 08:52:03 -07001286 uint16_t length;
1287 uint32_t xid;
Rich Lane31b87142013-05-09 22:05:42 -07001288 uint16_t stats_type == 0xffff;
Rich Lanea06d0c32013-03-25 08:52:03 -07001289 uint16_t flags;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001290 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001291 uint32_t experimenter;
1292 uint32_t subtype;
1293 of_octets_t data;
1294};
1295
1296// END OF STATS OBJECTS
1297
Rich Lane68ae4d72013-05-09 10:55:19 -07001298struct of_queue_prop {
Rich Lanea06d0c32013-03-25 08:52:03 -07001299 uint16_t type;
1300 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001301 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001302};
1303
Rich Lane68ae4d72013-05-09 10:55:19 -07001304struct of_queue_prop_min_rate {
Rich Lane31b87142013-05-09 22:05:42 -07001305 uint16_t type == 1;
Rich Lanea06d0c32013-03-25 08:52:03 -07001306 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001307 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001308 uint16_t rate;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001309 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -07001310};
1311
Rich Lane68ae4d72013-05-09 10:55:19 -07001312struct of_queue_prop_max_rate {
Rich Lane31b87142013-05-09 22:05:42 -07001313 uint16_t type == 2;
Rich Lanea06d0c32013-03-25 08:52:03 -07001314 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001315 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001316 uint16_t rate;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001317 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -07001318};
1319
Rich Lane68ae4d72013-05-09 10:55:19 -07001320struct of_queue_prop_experimenter {
Rich Lane31b87142013-05-09 22:05:42 -07001321 uint16_t type == 65535;
Rich Lanea06d0c32013-03-25 08:52:03 -07001322 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001323 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001324 uint32_t experimenter;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001325 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001326 of_octets_t data;
1327};
1328
Rich Lane68ae4d72013-05-09 10:55:19 -07001329struct of_packet_queue {
Rich Lanea06d0c32013-03-25 08:52:03 -07001330 uint32_t queue_id;
1331 of_port_no_t port;
1332 uint16_t len;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001333 pad(6);
Rich Lanea06d0c32013-03-25 08:52:03 -07001334 list(of_queue_prop_t) properties;
1335};
1336
Rich Lane68ae4d72013-05-09 10:55:19 -07001337struct of_queue_get_config_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001338 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001339 uint8_t type == 22;
Rich Lanea06d0c32013-03-25 08:52:03 -07001340 uint16_t length;
1341 uint32_t xid;
1342 of_port_no_t port;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001343 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001344};
1345
Rich Lane68ae4d72013-05-09 10:55:19 -07001346struct of_queue_get_config_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001347 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001348 uint8_t type == 23;
Rich Lanea06d0c32013-03-25 08:52:03 -07001349 uint16_t length;
1350 uint32_t xid;
1351 of_port_no_t port;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001352 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001353 list(of_packet_queue_t) queues;
1354};
1355
Rich Lane68ae4d72013-05-09 10:55:19 -07001356struct of_role_request {
Rich Lanea06d0c32013-03-25 08:52:03 -07001357 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001358 uint8_t type == 24;
Rich Lanea06d0c32013-03-25 08:52:03 -07001359 uint16_t length;
1360 uint32_t xid;
1361 uint32_t role;
Rich Lanee2af4ee2013-05-09 11:04:06 -07001362 pad(4);
Rich Lanea06d0c32013-03-25 08:52:03 -07001363 uint64_t generation_id;
1364};
1365
Rich Lane68ae4d72013-05-09 10:55:19 -07001366struct of_role_reply {
Rich Lanea06d0c32013-03-25 08:52:03 -07001367 uint8_t version;
Rich Lane31b87142013-05-09 22:05:42 -07001368 uint8_t type == 25;
Rich Lanea06d0c32013-03-25 08:52:03 -07001369 uint16_t length;
1370 uint32_t xid;
1371 of_octets_t data;
1372};