Merge pull request #23 from capveg/master
Removed $BIGCODE hack in Makefile
diff --git a/Makefile b/Makefile
index d1c0d75..591aa79 100644
--- a/Makefile
+++ b/Makefile
@@ -98,10 +98,17 @@
PYTHONPATH=${LOXI_OUTPUT_DIR}/pyloxi:. python py_gen/tests/of12.py
PYTHONPATH=${LOXI_OUTPUT_DIR}/pyloxi:. python py_gen/tests/of13.py
+CTEST_EXEC = ${LOXI_OUTPUT_DIR}/locitest/locitest
+CTEST_SOURCE = ${LOXI_OUTPUT_DIR}/locitest/src/*.c
+CTEST_SOURCE += ${LOXI_OUTPUT_DIR}/loci/src/*.c
+CTEST_INC = -I ${LOXI_OUTPUT_DIR}/loci/inc
+CTEST_INC += -I ${LOXI_OUTPUT_DIR}/locitest/inc
+CTEST_INC += -I ${LOXI_OUTPUT_DIR}/loci/src
+CTEST_CFLAGS = -Wall -Werror -g
+
check-c: c
- gcc -o ${LOXI_OUTPUT_DIR}/locitest/locitest ${LOXI_OUTPUT_DIR}/locitest/src/*.c ${LOXI_OUTPUT_DIR}/loci/src/*.c \
- -I ${LOXI_OUTPUT_DIR}/loci/inc -I ${LOXI_OUTPUT_DIR}/locitest/inc -I ${LOXI_OUTPUT_DIR}/loci/src
- ${LOXI_OUTPUT_DIR}/locitest/locitest
+ gcc ${CTEST_CFLAGS} -o ${CTEST_EXEC} ${CTEST_SOURCE} ${CTEST_INC}
+ ${CTEST_EXEC}
pylint:
pylint -E ${LOXI_PY_FILES}
diff --git a/openflow_input/bsn_vport b/openflow_input/bsn_vport
index cb197dd..476527a 100644
--- a/openflow_input/bsn_vport
+++ b/openflow_input/bsn_vport
@@ -80,11 +80,12 @@
uint32_t xid; // Must match create_request
uint32_t experimenter == 0x5c16c7;
uint32_t subtype == 16;
+ uint32_t status; // 0 means success
uint32_t vport_no; // The OF port number created. 16-bits for OF 1.0
};
// Request from controller to switch to remove a vport
-struct of_bsn_virtual_port_remove {
+struct of_bsn_virtual_port_remove_request {
uint8_t version;
uint8_t type == 4;
uint16_t length;
@@ -93,3 +94,14 @@
uint32_t subtype == 17;
uint32_t vport_no; // The OF port number to be removed
};
+
+// Request from controller to switch to remove a vport
+struct of_bsn_virtual_port_remove_reply {
+ uint8_t version;
+ uint8_t type == 4;
+ uint16_t length;
+ uint32_t xid; // Must match request xid
+ uint32_t experimenter == 0x5c16c7;
+ uint32_t subtype == 26;
+ uint32_t status; // 0 means success
+};