| Tseng, Yi | e9bc235 | 2022-06-23 08:48:03 -0700 | [diff] [blame^] | 1 | # TRex Port ID=0 --> PCI BUS: 88:00.1, NUMA: 1, connected to leaf1 port 30 |
| 2 | # TRex Port ID=1 --> PCI BUS: 88:00.0, NUMA: 1, connected to leaf2 port 30 |
| 3 | # TRex Port ID=2 --> PCI BUS: 1c:00.1, NUMA: 0, connected to leaf2 port 32 |
| 4 | # TRex Port ID=3 --> PCI BUS: 1c:00.0, NUMA: 0, connected to leaf2 port 31 |
| Daniele Moro | 8088956 | 2021-09-08 10:09:26 +0200 | [diff] [blame] | 5 | |
| 6 | - version: 2 |
| 7 | port_limit: 4 |
| Tseng, Yi | e9bc235 | 2022-06-23 08:48:03 -0700 | [diff] [blame^] | 8 | interfaces: ['88:00.1', '88:00.0', '1c:00.1', '1c:00.0'] |
| Daniele Moro | 8088956 | 2021-09-08 10:09:26 +0200 | [diff] [blame] | 9 | port_bandwidth_gb: 40 |
| Tseng, Yi | e9bc235 | 2022-06-23 08:48:03 -0700 | [diff] [blame^] | 10 | c: 16 |
| Daniele Moro | 8088956 | 2021-09-08 10:09:26 +0200 | [diff] [blame] | 11 | port_info: |
| 12 | - src_mac: 40:A6:B7:22:AB:40 |
| 13 | dest_mac: 00:00:0A:4C:1C:46 |
| 14 | - src_mac: 40:A6:B7:22:AB:41 |
| 15 | dest_mac: 00:00:0A:4C:1C:46 |
| 16 | - src_mac: 40:A6:B7:22:AB:20 |
| 17 | dest_mac: 00:00:0A:4C:1C:46 |
| 18 | - src_mac: 40:A6:B7:22:AB:21 |
| 19 | dest_mac: 00:00:0A:4C:1C:46 |